More change sets for 4.16: - Many improvements for selftests and other igt tests (Chris) - Forcewake with PUNIT->PMIC bus fixes and robustness (Hans) - Define an engine class for uABI (Tvrtko) - Context switch fixes and improvements (Chris) - GT powersavings and power gating simplification and fixes (Chris) - Other general driver clean-ups (Chris, Lucas, Ville) - Removing old, useless and/or bad workarounds (Chris, Oscar, Radhakrishna) - IPS, pipe config, etc in preparation for another Fast Boot attempt (Maarten) - OA perf fixes and support to Coffee Lake and Cannonlake (Lionel) - Fixes around GPU fault registers (Michel) - GEM Proxy (Tina) - Refactor of Geminilake and Cannonlake plane color handling (James) - Generalize transcoder loop (Mika Kahola) - New HW Workaround for Cannonlake and Geminilake (Rodrigo) - Resume GuC before using GEM (Chris) - Stolen Memory handling improvements (Ville) - Initialize entry in PPAT for older compilers (Chris) - Other fixes and robustness improvements on execbuf (Chris) - Improve logs of GEM_BUG_ON (Mika Kuoppala) - Rework with massive rename of GuC functions and files (Sagar) - Don't sanitize frame start delay if pipe is off (Ville) - Cannonlake clock fixes (Rodrigo) - Cannonlake HDMI 2.0 support (Rodrigo) - Add a GuC doorbells selftest (Michel) - Add might_sleep() check to our wait_for() (Chris) Many GVT changes for 4.16: - CSB HWSP update support (Weinan) - GVT debug helpers, dyndbg and debugfs (Chuanxiao, Shuo) - full virtualized opregion (Xiaolin) - VM health check for sane fallback (Fred) - workload submission code refactor for future enabling (Zhi) - Updated repo URL in MAINTAINERS (Zhenyu) - other many misc fixes * tag 'drm-intel-next-2017-11-17-1' of git://anongit.freedesktop.org/drm/drm-intel: (260 commits) drm/i915: Update DRIVER_DATE to 20171117 drm/i915: Add a policy note for removing workarounds drm/i915/selftests: Report ENOMEM clearly for an allocation failure Revert "drm/i915: Display WA #1133 WaFbcSkipSegments:cnl, glk" drm/i915: Calculate g4x intermediate watermarks correctly drm/i915: Calculate vlv/chv intermediate watermarks correctly, v3. drm/i915: Pass crtc_state to ips toggle functions, v2 drm/i915: Pass idle crtc_state to intel_dp_sink_crc drm/i915: Enable FIFO underrun reporting after initial fastset, v4. drm/i915: Mark the userptr invalidate workqueue as WQ_MEM_RECLAIM drm/i915: Add might_sleep() check to wait_for() drm/i915/selftests: Add a GuC doorbells selftest drm/i915/cnl: Extend HDMI 2.0 support to CNL. drm/i915/cnl: Simplify dco_fraction calculation. drm/i915/cnl: Don't blindly replace qdiv. drm/i915/cnl: Fix wrpll math for higher freqs. drm/i915/cnl: Fix, simplify and unify wrpll variable sizes. drm/i915/cnl: Remove useless conversion. drm/i915/cnl: Remove spurious central_freq. drm/i915/selftests: exercise_ggtt may have nothing to do ...
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| @@ -86,6 +86,22 @@ enum i915_mocs_table_index { · 85 unmodified lines | |||
| 86 | I915_MOCS_CACHED, | 86 | I915_MOCS_CACHED, |
| 87 | }; | 87 | }; |
| 88 | 88 | ||
| 89 | /* | ||
| 90 | * Different engines serve different roles, and there may be more than one | ||
| 91 | * engine serving each role. enum drm_i915_gem_engine_class provides a | ||
| 92 | * classification of the role of the engine, which may be used when requesting | ||
| 93 | * operations to be performed on a certain subset of engines, or for providing | ||
| 94 | * information about that group. | ||
| 95 | */ | ||
| 96 | enum drm_i915_gem_engine_class { | ||
| 97 | I915_ENGINE_CLASS_RENDER = 0, | ||
| 98 | I915_ENGINE_CLASS_COPY = 1, | ||
| 99 | I915_ENGINE_CLASS_VIDEO = 2, | ||
| 100 | I915_ENGINE_CLASS_VIDEO_ENHANCE = 3, | ||
| 101 | |||
| 102 | I915_ENGINE_CLASS_INVALID = -1 | ||
| 103 | }; | ||
| 104 | |||
| 89 | /* Each region is a minimum of 16k, and there are at most 255 of them. | 105 | /* Each region is a minimum of 16k, and there are at most 255 of them. |
| 90 | */ | 106 | */ |
| 91 | #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use | 107 | #define I915_NR_TEX_REGIONS 255 /* table size 2k - maximum due to use |
| @@ -450,6 +466,27 @@ typedef struct drm_i915_irq_wait { · 358 unmodified lines | |||
| 450 | */ | 466 | */ |
| 451 | #define I915_PARAM_HAS_EXEC_FENCE_ARRAY 49 | 467 | #define I915_PARAM_HAS_EXEC_FENCE_ARRAY 49 |
| 452 | 468 | ||
| 469 | /* | ||
| 470 | * Query whether every context (both per-file default and user created) is | ||
| 471 | * isolated (insofar as HW supports). If this parameter is not true, then | ||
| 472 | * freshly created contexts may inherit values from an existing context, | ||
| 473 | * rather than default HW values. If true, it also ensures (insofar as HW | ||
| 474 | * supports) that all state set by this context will not leak to any other | ||
| 475 | * context. | ||
| 476 | * | ||
| 477 | * As not every engine across every gen support contexts, the returned | ||
| 478 | * value reports the support of context isolation for individual engines by | ||
| 479 | * returning a bitmask of each engine class set to true if that class supports | ||
| 480 | * isolation. | ||
| 481 | */ | ||
| 482 | #define I915_PARAM_HAS_CONTEXT_ISOLATION 50 | ||
| 483 | |||
| 484 | /* Frequency of the command streamer timestamps given by the *_TIMESTAMP | ||
| 485 | * registers. This used to be fixed per platform but from CNL onwards, this | ||
| 486 | * might vary depending on the parts. | ||
| 487 | */ | ||
| 488 | #define I915_PARAM_CS_TIMESTAMP_FREQUENCY 51 | ||
| 489 | |||
| 453 | typedef struct drm_i915_getparam { | 490 | typedef struct drm_i915_getparam { |
| 454 | __s32 param; | 491 | __s32 param; |
| 455 | /* | 492 | /* |