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Merge master.kernel.org:/home/rmk/linux-2.6-arm

Linus Torvalds committed 20 years ago

Commit ca98f822 parents b67c26e 11849fe6 files · +51 −10Browse files

Unified · Split

6 files
  1. arch/arm/configs/spitz_defconfig +18 −1
  2. arch/arm/mach-ixp4xx/ixdp425-setup.c +1 −1
  3. arch/arm/mach-pxa/Kconfig +2 −0
  4. arch/arm/mm/flush.c +6 −1
  5. include/asm-arm/semaphore.h +0 −5
  6. include/asm-arm/spinlock.h +24 −2
arch/arm/configs/spitz_defconfig+18−1
@@ -897,7 +897,24 @@ CONFIG_UNIX98_PTYS=y · 896 unmodified lines
897#897#
898# I2C support898# I2C support
899#899#
900# CONFIG_I2C is not set900CONFIG_I2C=y
901# CONFIG_I2C_CHARDEV is not set
902
903#
904# I2C Algorithms
905#
906# CONFIG_I2C_ALGOBIT is not set
907# CONFIG_I2C_ALGOPCF is not set
908# CONFIG_I2C_ALGOPCA is not set
909
910#
911# I2C Hardware Bus support
912#
913CONFIG_I2C_PXA=y
914# CONFIG_I2C_PXA_SLAVE is not set
915# CONFIG_I2C_PARPORT_LIGHT is not set
916# CONFIG_I2C_STUB is not set
917# CONFIG_I2C_PCA_ISA is not set
901 918
902#919#
903# Hardware Monitoring support920# Hardware Monitoring support
arch/arm/mach-ixp4xx/ixdp425-setup.c+1−1
@@ -85,7 +85,7 @@ static struct plat_serial8250_port ixdp425_uart_data[] = { · 84 unmodified lines
85 {85 {
86 .mapbase = IXP4XX_UART2_BASE_PHYS,86 .mapbase = IXP4XX_UART2_BASE_PHYS,
87 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,87 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
88 .irq = IRQ_IXP4XX_UART1,88 .irq = IRQ_IXP4XX_UART2,
89 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,89 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
90 .iotype = UPIO_MEM,90 .iotype = UPIO_MEM,
91 .regshift = 2,91 .regshift = 2,
arch/arm/mach-pxa/Kconfig+2−0
@@ -77,6 +77,8 @@ config MACH_AKITA · 76 unmodified lines
77 depends PXA_SHARPSL_27x77 depends PXA_SHARPSL_27x
78 select PXA_SHARP_Cxx0078 select PXA_SHARP_Cxx00
79 select MACH_SPITZ79 select MACH_SPITZ
80 select I2C
81 select I2C_PXA
80 82
81config MACH_SPITZ83config MACH_SPITZ
82 bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"84 bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
arch/arm/mm/flush.c+6−1
@@ -155,14 +155,19 @@ static void __flush_dcache_aliases(struct address_space *mapping, struct page *p · 154 unmodified lines
155 * space mappings, we can be lazy and remember that we may have dirty155 * space mappings, we can be lazy and remember that we may have dirty
156 * kernel cache lines for later. Otherwise, we assume we have156 * kernel cache lines for later. Otherwise, we assume we have
157 * aliasing mappings.157 * aliasing mappings.
158 *
159 * Note that we disable the lazy flush for SMP.
158 */160 */
159void flush_dcache_page(struct page *page)161void flush_dcache_page(struct page *page)
160{162{
161 struct address_space *mapping = page_mapping(page);163 struct address_space *mapping = page_mapping(page);
162 164
165#ifndef CONFIG_SMP
163 if (mapping && !mapping_mapped(mapping))166 if (mapping && !mapping_mapped(mapping))
164 set_bit(PG_dcache_dirty, &page->flags);167 set_bit(PG_dcache_dirty, &page->flags);
165 else {168 else
169#endif
170 {
166 __flush_dcache_page(mapping, page);171 __flush_dcache_page(mapping, page);
167 if (mapping && cache_is_vivt())172 if (mapping && cache_is_vivt())
168 __flush_dcache_aliases(mapping, page);173 __flush_dcache_aliases(mapping, page);
include/asm-arm/semaphore.h+0−5
@@ -47,11 +47,6 @@ static inline void init_MUTEX_LOCKED(struct semaphore *sem) · 46 unmodified lines
47 sema_init(sem, 0);47 sema_init(sem, 0);
48}48}
49 49
50static inline int sema_count(struct semaphore *sem)
51{
52 return atomic_read(&sem->count);
53}
54
55/*50/*
56 * special register calling convention51 * special register calling convention
57 */52 */
include/asm-arm/spinlock.h+24−2
@@ -30,6 +30,9 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) · 29 unmodified lines
30 __asm__ __volatile__(30 __asm__ __volatile__(
31"1: ldrex %0, [%1]\n"31"1: ldrex %0, [%1]\n"
32" teq %0, #0\n"32" teq %0, #0\n"
33#ifdef CONFIG_CPU_32v6K
34" wfene\n"
35#endif
33" strexeq %0, %2, [%1]\n"36" strexeq %0, %2, [%1]\n"
34" teqeq %0, #0\n"37" teqeq %0, #0\n"
35" bne 1b"38" bne 1b"
@@ -65,7 +68,11 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock) · 29 unmodified lines
65 smp_mb();68 smp_mb();
66 69
67 __asm__ __volatile__(70 __asm__ __volatile__(
68" str %1, [%0]"71" str %1, [%0]\n"
72#ifdef CONFIG_CPU_32v6K
73" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
74" sev"
75#endif
69 :76 :
70 : "r" (&lock->lock), "r" (0)77 : "r" (&lock->lock), "r" (0)
71 : "cc");78 : "cc");
@@ -87,6 +94,9 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) · 15 unmodified lines
87 __asm__ __volatile__(94 __asm__ __volatile__(
88"1: ldrex %0, [%1]\n"95"1: ldrex %0, [%1]\n"
89" teq %0, #0\n"96" teq %0, #0\n"
97#ifdef CONFIG_CPU_32v6K
98" wfene\n"
99#endif
90" strexeq %0, %2, [%1]\n"100" strexeq %0, %2, [%1]\n"
91" teq %0, #0\n"101" teq %0, #0\n"
92" bne 1b"102" bne 1b"
@@ -122,7 +132,11 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw) · 29 unmodified lines
122 smp_mb();132 smp_mb();
123 133
124 __asm__ __volatile__(134 __asm__ __volatile__(
125 "str %1, [%0]"135 "str %1, [%0]\n"
136#ifdef CONFIG_CPU_32v6K
137" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */
138" sev\n"
139#endif
126 :140 :
127 : "r" (&rw->lock), "r" (0)141 : "r" (&rw->lock), "r" (0)
128 : "cc");142 : "cc");
@@ -148,6 +162,9 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) · 19 unmodified lines
148"1: ldrex %0, [%2]\n"162"1: ldrex %0, [%2]\n"
149" adds %0, %0, #1\n"163" adds %0, %0, #1\n"
150" strexpl %1, %0, [%2]\n"164" strexpl %1, %0, [%2]\n"
165#ifdef CONFIG_CPU_32v6K
166" wfemi\n"
167#endif
151" rsbpls %0, %1, #0\n"168" rsbpls %0, %1, #0\n"
152" bmi 1b"169" bmi 1b"
153 : "=&r" (tmp), "=&r" (tmp2)170 : "=&r" (tmp), "=&r" (tmp2)
@@ -169,6 +186,11 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw) · 15 unmodified lines
169" strex %1, %0, [%2]\n"186" strex %1, %0, [%2]\n"
170" teq %1, #0\n"187" teq %1, #0\n"
171" bne 1b"188" bne 1b"
189#ifdef CONFIG_CPU_32v6K
190"\n cmp %0, #0\n"
191" mcreq p15, 0, %0, c7, c10, 4\n"
192" seveq"
193#endif
172 : "=&r" (tmp), "=&r" (tmp2)194 : "=&r" (tmp), "=&r" (tmp2)
173 : "r" (&rw->lock)195 : "r" (&rw->lock)
174 : "cc");196 : "cc");