On discrete platforms like DG2, we need to support a minimum page size of 64K when dealing with device local-memory. This is quite tricky for various reasons, so try to document the new implicit uapi for this. v4: Kdoc modification. v3: fix typos and less emphasis v2: Fixed suggestions on formatting [Daniel]
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| @@ -1118,10 +1118,16 @@ struct drm_i915_gem_exec_object2 { · 1117 unmodified lines | ||
| 1118 | 1118 | /** |
| 1119 | 1119 | * When the EXEC_OBJECT_PINNED flag is specified this is populated by |
| 1120 | 1120 | * the user with the GTT offset at which this object will be pinned. |
| 1121 | + * | |
| 1121 | 1122 | * When the I915_EXEC_NO_RELOC flag is specified this must contain the |
| 1122 | 1123 | * presumed_offset of the object. |
| 1124 | + * | |
| 1123 | 1125 | * During execbuffer2 the kernel populates it with the value of the |
| 1124 | 1126 | * current GTT offset of the object, for future presumed_offset writes. |
| 1127 | + * | |
| 1128 | + * See struct drm_i915_gem_create_ext for the rules when dealing with | |
| 1129 | + * alignment restrictions with I915_MEMORY_CLASS_DEVICE, on devices with | |
| 1130 | + * minimum page sizes, like DG2. | |
| 1125 | 1131 | */ |
| 1126 | 1132 | __u64 offset; |
| 1127 | 1133 | |
| @@ -3144,11 +3150,40 @@ struct drm_i915_gem_create_ext { · 2016 unmodified lines | ||
| 3144 | 3150 | * |
| 3145 | 3151 | * The (page-aligned) allocated size for the object will be returned. |
| 3146 | 3152 | * |
| 3147 | − * Note that for some devices we have might have further minimum | |
| 3148 | − * page-size restrictions(larger than 4K), like for device local-memory. | |
| 3149 | − * However in general the final size here should always reflect any | |
| 3150 | − * rounding up, if for example using the I915_GEM_CREATE_EXT_MEMORY_REGIONS | |
| 3151 | − * extension to place the object in device local-memory. | |
| 3153 | + * | |
| 3154 | + * DG2 64K min page size implications: | |
| 3155 | + * | |
| 3156 | + * On discrete platforms, starting from DG2, we have to contend with GTT | |
| 3157 | + * page size restrictions when dealing with I915_MEMORY_CLASS_DEVICE | |
| 3158 | + * objects. Specifically the hardware only supports 64K or larger GTT | |
| 3159 | + * page sizes for such memory. The kernel will already ensure that all | |
| 3160 | + * I915_MEMORY_CLASS_DEVICE memory is allocated using 64K or larger page | |
| 3161 | + * sizes underneath. | |
| 3162 | + * | |
| 3163 | + * Note that the returned size here will always reflect any required | |
| 3164 | + * rounding up done by the kernel, i.e 4K will now become 64K on devices | |
| 3165 | + * such as DG2. | |
| 3166 | + * | |
| 3167 | + * Special DG2 GTT address alignment requirement: | |
| 3168 | + * | |
| 3169 | + * The GTT alignment will also need to be at least 2M for such objects. | |
| 3170 | + * | |
| 3171 | + * Note that due to how the hardware implements 64K GTT page support, we | |
| 3172 | + * have some further complications: | |
| 3173 | + * | |
| 3174 | + * 1) The entire PDE (which covers a 2MB virtual address range), must | |
| 3175 | + * contain only 64K PTEs, i.e mixing 4K and 64K PTEs in the same | |
| 3176 | + * PDE is forbidden by the hardware. | |
| 3177 | + * | |
| 3178 | + * 2) We still need to support 4K PTEs for I915_MEMORY_CLASS_SYSTEM | |
| 3179 | + * objects. | |
| 3180 | + * | |
| 3181 | + * To keep things simple for userland, we mandate that any GTT mappings | |
| 3182 | + * must be aligned to and rounded up to 2MB. The kernel will internally | |
| 3183 | + * pad them out to the next 2MB boundary. As this only wastes virtual | |
| 3184 | + * address space and avoids userland having to copy any needlessly | |
| 3185 | + * complicated PDE sharing scheme (coloring) and only affects DG2, this | |
| 3186 | + * is deemed to be a good compromise. | |
| 3152 | 3187 | */ |
| 3153 | 3188 | __u64 size; |
| 3154 | 3189 | /** |