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kvm: x86: Toggling CR4.PKE does not load PDPTEs in PAE mode

See the SDM, volume 3, section 4.4.1: If PAE paging would be in use following an execution of MOV to CR0 or MOV to CR4 (see Section 4.1.1) and the instruction is modifying any of CR0.CD, CR0.NW, CR0.PG, CR4.PAE, CR4.PGE, CR4.PSE, or CR4.SMEP; then the PDPTEs are loaded from the address in CR3.

Jim Mattson committed 6 years ago

Commit cb957ad1 parent 427890a1 file · +1 −1Browse files

Unified · Split

arch/x86/kvm/x86.c+1−1
@@ -975,7 +975,7 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) · 974 unmodified lines
975975 {
976976 unsigned long old_cr4 = kvm_read_cr4(vcpu);
977977 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
978− X86_CR4_SMEP | X86_CR4_PKE;
978+ X86_CR4_SMEP;
979979
980980 if (kvm_valid_cr4(vcpu, cr4))
981981 return 1;

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