lael-labs/linux

.mailmap+4−0

 Felix Moeller <felix@derklecks.de>
 Filipe Lautert <filipe@icewall.org>
 Franck Bui-Huu <vagabon.xyz@gmail.com>
+Frank Rowand <frowand.list@gmail.com> <frowand@mvista.com>
+Frank Rowand <frowand.list@gmail.com> <frank.rowand@am.sony.com>
+Frank Rowand <frowand.list@gmail.com> <frank.rowand@sonymobile.com>
 Frank Zago <fzago@systemfabricworks.com>
 Greg Kroah-Hartman <greg@echidna.(none)>
 Greg Kroah-Hartman <gregkh@suse.de>
 Kenneth W Chen <kenneth.w.chen@intel.com>
 Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
 Koushik <raghavendra.koushik@neterion.com>
+Krzysztof Kozlowski <krzk@kernel.org> <k.kozlowski.k@gmail.com>
 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
 Leonid I Ananiev <leonid.i.ananiev@intel.com>
 Linas Vepstas <linas@austin.ibm.com>

Documentation/devicetree/bindings/arc/archs-pct.txt+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2		2
3	The ARC HS can be configured with a pipeline performance monitor for counting	3	The ARC HS can be configured with a pipeline performance monitor for counting
4	CPU and cache events like cache misses and hits. Like conventional PCT there	4	CPU and cache events like cache misses and hits. Like conventional PCT there
5	are 100+ hardware conditions dynamically mapped to upto 32 counters.	5	are 100+ hardware conditions dynamically mapped to up to 32 counters.
6	It also supports overflow interrupts.	6	It also supports overflow interrupts.
7		7
8	Required properties:	8	Required properties:

Documentation/devicetree/bindings/arc/pct.txt+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2		2
3	The ARC700 can be configured with a pipeline performance monitor for counting	3	The ARC700 can be configured with a pipeline performance monitor for counting
4	CPU and cache events like cache misses and hits. Like conventional PCT there	4	CPU and cache events like cache misses and hits. Like conventional PCT there
5	are 100+ hardware conditions dynamically mapped to upto 32 counters	5	are 100+ hardware conditions dynamically mapped to up to 32 counters
6		6
7	Note that:	7	Note that:
8	* The ARC 700 PCT does not support interrupts; although HW events may be	8	* The ARC 700 PCT does not support interrupts; although HW events may be

Documentation/devicetree/bindings/i2c/i2c-rk3x.txt+2−2

@@ -6,8 +6,8 @@ RK3xxx SoCs. · 5 unmodified lines
6	Required properties :	6	Required properties :
7		7
8	- reg : Offset and length of the register set for the device	8	- reg : Offset and length of the register set for the device
9	- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or	9	- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c",
10	"rockchip,rk3288-i2c".	10	"rockchip,rk3228-i2c" or "rockchip,rk3288-i2c".
11	- interrupts : interrupt number	11	- interrupts : interrupt number
12	- clocks : parent clock	12	- clocks : parent clock
13		13

Documentation/devicetree/bindings/net/cpsw.txt+3−3

@@ -45,13 +45,13 @@ Required properties: · 44 unmodified lines
45	Optional properties:	45	Optional properties:
46	- dual_emac_res_vlan : Specifies VID to be used to segregate the ports	46	- dual_emac_res_vlan : Specifies VID to be used to segregate the ports
47	- mac-address : See ethernet.txt file in the same directory	47	- mac-address : See ethernet.txt file in the same directory
48	- phy_id : Specifies slave phy id	48	- phy_id : Specifies slave phy id (deprecated, use phy-handle)
49	- phy-handle : See ethernet.txt file in the same directory	49	- phy-handle : See ethernet.txt file in the same directory
50		50
51	Slave sub-nodes:	51	Slave sub-nodes:
52	- fixed-link : See fixed-link.txt file in the same directory	52	- fixed-link : See fixed-link.txt file in the same directory
53	Either the property phy_id, or the sub-node	53
54	fixed-link can be specified	54	Note: Exactly one of phy_id, phy-handle, or fixed-link must be specified.
55		55
56	Note: "ti,hwmods" field is used to fetch the base address and irq	56	Note: "ti,hwmods" field is used to fetch the base address and irq
57	resources from TI, omap hwmod data base during device registration.	57	resources from TI, omap hwmod data base during device registration.

Documentation/networking/altera_tse.txt+3−3

Documentation/networking/ipvlan.txt+3−3

Documentation/networking/pktgen.txt+3−3

Documentation/networking/vrf.txt+1−1

@@ -41,7 +41,7 @@ using an rx_handler which gives the impression that packets flow through · 40 unmodified lines
41	the VRF device. Similarly on egress routing rules are used to send packets	41	the VRF device. Similarly on egress routing rules are used to send packets
42	to the VRF device driver before getting sent out the actual interface. This	42	to the VRF device driver before getting sent out the actual interface. This
43	allows tcpdump on a VRF device to capture all packets into and out of the	43	allows tcpdump on a VRF device to capture all packets into and out of the
44	VRF as a whole.[1] Similiarly, netfilter [2] and tc rules can be applied	44	VRF as a whole.[1] Similarly, netfilter [2] and tc rules can be applied
45	using the VRF device to specify rules that apply to the VRF domain as a whole.	45	using the VRF device to specify rules that apply to the VRF domain as a whole.
46		46
47	[1] Packets in the forwarded state do not flow through the device, so those	47	[1] Packets in the forwarded state do not flow through the device, so those

Documentation/networking/xfrm_sync.txt+3−3

Documentation/sysctl/vm.txt+10−9

@@ -581,15 +581,16 @@ Specify "[Nn]ode" for node order · 580 unmodified lines
581	"Zone Order" orders the zonelists by zone type, then by node within each	581	"Zone Order" orders the zonelists by zone type, then by node within each
582	zone. Specify "[Zz]one" for zone order.	582	zone. Specify "[Zz]one" for zone order.
583		583
584	Specify "[Dd]efault" to request automatic configuration. Autoconfiguration	584	Specify "[Dd]efault" to request automatic configuration.
585	will select "node" order in following case.	585
586	(1) if the DMA zone does not exist or	586	On 32-bit, the Normal zone needs to be preserved for allocations accessible
587	(2) if the DMA zone comprises greater than 50% of the available memory or	587	by the kernel, so "zone" order will be selected.
588	(3) if any node's DMA zone comprises greater than 70% of its local memory and	588
589	the amount of local memory is big enough.	589	On 64-bit, devices that require DMA32/DMA are relatively rare, so "node"
590		590	order will be selected.
591	Otherwise, "zone" order will be selected. Default order is recommended unless	591
592	this is causing problems for your system/application.	592	Default order is recommended unless this is causing problems for your
		593	system/application.
593		594
594	==============================================================	595	==============================================================
595		596

MAINTAINERS+7−6

 FUSE: FILESYSTEM IN USERSPACE
 M:	Miklos Szeredi <miklos@szeredi.hu>
-L:	fuse-devel@lists.sourceforge.net
+L:	linux-fsdevel@vger.kernel.org
 W:	http://fuse.sourceforge.net/
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git
 S:	Maintained
 F:	include/net/gre.h
 GRETH 10/100/1G Ethernet MAC device driver
-M:	Kristoffer Glembo <kristoffer@gaisler.com>
+M:	Andreas Larsson <andreas@gaisler.com>
 L:	netdev@vger.kernel.org
 S:	Maintained
 F:	drivers/net/ethernet/aeroflex/
 ISCSI EXTENSIONS FOR RDMA (ISER) INITIATOR
 M:	Or Gerlitz <ogerlitz@mellanox.com>
-M:	Sagi Grimberg <sagig@mellanox.com>
+M:	Sagi Grimberg <sagi@grimberg.me>
 M:	Roi Dayan <roid@mellanox.com>
 L:	linux-rdma@vger.kernel.org
 S:	Supported
 F:	drivers/infiniband/ulp/iser/
 ISCSI EXTENSIONS FOR RDMA (ISER) TARGET
-M:	Sagi Grimberg <sagig@mellanox.com>
+M:	Sagi Grimberg <sagi@grimberg.me>
 T:	git git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending.git master
 L:	linux-rdma@vger.kernel.org
 L:	target-devel@vger.kernel.org
 F:	mm/kmemleak-test.c
 KPROBES
-M:	Ananth N Mavinakayanahalli <ananth@in.ibm.com>
+M:	Ananth N Mavinakayanahalli <ananth@linux.vnet.ibm.com>
 M:	Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
 M:	"David S. Miller" <davem@davemloft.net>
 M:	Masami Hiramatsu <mhiramat@kernel.org>
 SFC NETWORK DRIVER
 M:	Solarflare linux maintainers <linux-net-drivers@solarflare.com>
-M:	Shradha Shah <sshah@solarflare.com>
+M:	Edward Cree <ecree@solarflare.com>
+M:	Bert Kenward <bkenward@solarflare.com>
 L:	netdev@vger.kernel.org
 S:	Supported
 F:	drivers/net/ethernet/sfc/

Makefile+2−2

@@ -1,8 +1,8 @@
1	VERSION = 4	1	VERSION = 4
2	PATCHLEVEL = 6	2	PATCHLEVEL = 6
3	SUBLEVEL = 0	3	SUBLEVEL = 0
4	EXTRAVERSION = -rc5	4	EXTRAVERSION = -rc6
5	NAME = Blurry Fish Butt	5	NAME = Charred Weasel
6		6
7	# DOCUMENTATION	7	# DOCUMENTATION
8	# To see a list of typical targets execute "make help"	8	# To see a list of typical targets execute "make help"

arch/arc/Kconfig+2−0

 	select NO_BOOTMEM
 	select OF
 	select OF_EARLY_FLATTREE
+	select OF_RESERVED_MEM
 	select PERF_USE_VMALLOC
 	select HAVE_DEBUG_STACKOVERFLOW
+	select HAVE_GENERIC_DMA_COHERENT
 config MIGHT_HAVE_PCI
 	bool

arch/arc/include/asm/irqflags-arcv2.h+35−1

@@ -18,6 +18,12 @@ · 17 unmodified lines
18	#define STATUS_AD_MASK (1<<STATUS_AD_BIT)	18	#define STATUS_AD_MASK (1<<STATUS_AD_BIT)
19	#define STATUS_IE_MASK (1<<STATUS_IE_BIT)	19	#define STATUS_IE_MASK (1<<STATUS_IE_BIT)
20		20
		21	/* status32 Bits as encoded/expected by CLRI/SETI */
		22	#define CLRI_STATUS_IE_BIT 4
		23
		24	#define CLRI_STATUS_E_MASK 0xF
		25	#define CLRI_STATUS_IE_MASK (1 << CLRI_STATUS_IE_BIT)
		26
21	#define AUX_USER_SP 0x00D	27	#define AUX_USER_SP 0x00D
22	#define AUX_IRQ_CTRL 0x00E	28	#define AUX_IRQ_CTRL 0x00E
23	#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */	29	#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
@@ -100,6 +106,13 @@ static inline long arch_local_save_flags(void) · 76 unmodified lines
100	:	106	:
101	: "memory");	107	: "memory");
102		108
		109	/* To be compatible with irq_save()/irq_restore()
		110	* encode the irq bits as expected by CLRI/SETI
		111	* (this was needed to make CONFIG_TRACE_IRQFLAGS work)
		112	*/
		113	temp = (1 << 5) \|
		114	((!!(temp & STATUS_IE_MASK)) << CLRI_STATUS_IE_BIT) \|
		115	(temp & CLRI_STATUS_E_MASK);
103	return temp;	116	return temp;
104	}	117	}
105		118
@@ -108,7 +121,7 @@ static inline long arch_local_save_flags(void) · 2 unmodified lines
108	*/	121	*/
109	static inline int arch_irqs_disabled_flags(unsigned long flags)	122	static inline int arch_irqs_disabled_flags(unsigned long flags)
110	{	123	{
111	return !(flags & (STATUS_IE_MASK));	124	return !(flags & CLRI_STATUS_IE_MASK);
112	}	125	}
113		126
114	static inline int arch_irqs_disabled(void)	127	static inline int arch_irqs_disabled(void)
@@ -128,11 +141,32 @@ static inline void arc_softirq_clear(int irq) · 13 unmodified lines
128		141
129	#else	142	#else
130		143
		144	#ifdef CONFIG_TRACE_IRQFLAGS
		145
		146	.macro TRACE_ASM_IRQ_DISABLE
		147	bl trace_hardirqs_off
		148	.endm
		149
		150	.macro TRACE_ASM_IRQ_ENABLE
		151	bl trace_hardirqs_on
		152	.endm
		153
		154	#else
		155
		156	.macro TRACE_ASM_IRQ_DISABLE
		157	.endm
		158
		159	.macro TRACE_ASM_IRQ_ENABLE
		160	.endm
		161
		162	#endif
131	.macro IRQ_DISABLE scratch	163	.macro IRQ_DISABLE scratch
132	clri	164	clri
		165	TRACE_ASM_IRQ_DISABLE
133	.endm	166	.endm
134		167
135	.macro IRQ_ENABLE scratch	168	.macro IRQ_ENABLE scratch
		169	TRACE_ASM_IRQ_ENABLE
136	seti	170	seti
137	.endm	171	.endm
138		172

arch/arc/kernel/entry-arcv2.S+9−1

 	clri		; To make status32.IE agree with CPU internal state
-	lr  r0, [ICAUSE]
+#ifdef CONFIG_TRACE_IRQFLAGS
+	TRACE_ASM_IRQ_DISABLE
+#endif
+	lr  r0, [ICAUSE]
 	mov   blink, ret_from_exception
 	b.d  arch_do_IRQ
 .Lrestore_regs:
+	# Interrpts are actually disabled from this point on, but will get
+	# reenabled after we return from interrupt/exception.
+	# But irq tracer needs to be told now...
+	TRACE_ASM_IRQ_ENABLE
 	ld	r0, [sp, PT_status32]	; U/K mode at time of entry
 	lr	r10, [AUX_IRQ_ACT]

arch/arc/kernel/entry-compact.S+3−0

@@ -341,6 +341,9 @@ END(call_do_page_fault) · 340 unmodified lines
341		341
342	.Lrestore_regs:	342	.Lrestore_regs:
343		343
		344	# Interrpts are actually disabled from this point on, but will get
		345	# reenabled after we return from interrupt/exception.
		346	# But irq tracer needs to be told now...
344	TRACE_ASM_IRQ_ENABLE	347	TRACE_ASM_IRQ_ENABLE
345		348
346	lr r10, [status32]	349	lr r10, [status32]

arch/arc/mm/init.c+4−0

 #ifdef CONFIG_BLK_DEV_INITRD
 #include <linux/initrd.h>
 #endif
+#include <linux/of_fdt.h>
 #include <linux/swap.h>
 #include <linux/module.h>
 #include <linux/highmem.h>
 		memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
 #endif
+	early_init_fdt_reserve_self();
+	early_init_fdt_scan_reserved_mem();
 	memblock_dump_all();
 	/*----------------- node/zones setup --------------------------*/

arch/nios2/lib/memset.c+1−1

@@ -68,7 +68,7 @@ void memset(void s, int c, size_t count) · 67 unmodified lines
68	"=r" (charcnt), /* %1 Output */	68	"=r" (charcnt), /* %1 Output */
69	"=r" (dwordcnt), /* %2 Output */	69	"=r" (dwordcnt), /* %2 Output */
70	"=r" (fill8reg), /* %3 Output */	70	"=r" (fill8reg), /* %3 Output */
71	"=r" (wrkrega) /* %4 Output */	71	"=&r" (wrkrega) /* %4 Output only */
72	: "r" (c), /* %5 Input */	72	: "r" (c), /* %5 Input */
73	"0" (s), /* %0 Input/Output */	73	"0" (s), /* %0 Input/Output */
74	"1" (count) /* %1 Input/Output */	74	"1" (count) /* %1 Input/Output */

arch/powerpc/include/asm/systbl.h+2−0

@@ -384,3 +384,5 @@ SYSCALL(ni_syscall) · 383 unmodified lines
384	SYSCALL(ni_syscall)	384	SYSCALL(ni_syscall)
385	SYSCALL(mlock2)	385	SYSCALL(mlock2)
386	SYSCALL(copy_file_range)	386	SYSCALL(copy_file_range)
		387	COMPAT_SYS_SPU(preadv2)
		388	COMPAT_SYS_SPU(pwritev2)

arch/powerpc/include/asm/unistd.h+1−1

@@ -12,7 +12,7 @@ · 11 unmodified lines
12	#include <uapi/asm/unistd.h>	12	#include <uapi/asm/unistd.h>
13		13
14		14
15	#define NR_syscalls 380	15	#define NR_syscalls 382
16		16
17	#define __NR__exit __NR_exit	17	#define __NR__exit __NR_exit
18		18

arch/powerpc/include/uapi/asm/unistd.h+2−0

@@ -390,5 +390,7 @@ · 389 unmodified lines
390	#define __NR_membarrier 365	390	#define __NR_membarrier 365
391	#define __NR_mlock2 378	391	#define __NR_mlock2 378
392	#define __NR_copy_file_range 379	392	#define __NR_copy_file_range 379
		393	#define __NR_preadv2 380
		394	#define __NR_pwritev2 381
393		395
394	#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */	396	#endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */

arch/s390/include/asm/mmu.h+1−1

@@ -11,7 +11,7 @@ typedef struct { · 10 unmodified lines
11	spinlock_t list_lock;	11	spinlock_t list_lock;
12	struct list_head pgtable_list;	12	struct list_head pgtable_list;
13	struct list_head gmap_list;	13	struct list_head gmap_list;
14	unsigned long asce_bits;	14	unsigned long asce;
15	unsigned long asce_limit;	15	unsigned long asce_limit;
16	unsigned long vdso_base;	16	unsigned long vdso_base;
17	/* The mmu context allocates 4K page tables. */	17	/* The mmu context allocates 4K page tables. */

arch/s390/include/asm/mmu_context.h+22−6

 	mm->context.has_pgste = 0;
 	mm->context.use_skey = 0;
 #endif
-	if (mm->context.asce_limit == 0) {
+	switch (mm->context.asce_limit) {
+	case 1UL << 42:
+		/*
+		 * forked 3-level task, fall through to set new asce with new
+		 * mm->pgd
+		 */
+	case 0:
 		/* context created by exec, set asce limit to 4TB */
-		mm->context.asce_bits = _ASCE_TABLE_LENGTH |
-			_ASCE_USER_BITS | _ASCE_TYPE_REGION3;
 		mm->context.asce_limit = STACK_TOP_MAX;
-	} else if (mm->context.asce_limit == (1UL << 31)) {
+		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
+				   _ASCE_USER_BITS | _ASCE_TYPE_REGION3;
+		break;
+	case 1UL << 53:
+		/* forked 4-level task, set new asce with new mm->pgd */
+		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
+				   _ASCE_USER_BITS | _ASCE_TYPE_REGION2;
+		break;
+	case 1UL << 31:
+		/* forked 2-level compat task, set new asce with new mm->pgd */
+		mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
+				   _ASCE_USER_BITS | _ASCE_TYPE_SEGMENT;
+		/* pgd_alloc() did not increase mm->nr_pmds */
 		mm_inc_nr_pmds(mm);
 	}
 	crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm));
 static inline void set_user_asce(struct mm_struct *mm)
 {
-	S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
+	S390_lowcore.user_asce = mm->context.asce;
 	if (current->thread.mm_segment.ar4)
 		__ctl_load(S390_lowcore.user_asce, 7, 7);
 	set_cpu_flag(CIF_ASCE);
 {
 	int cpu = smp_processor_id();
-	S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
+	S390_lowcore.user_asce = next->context.asce;
 	if (prev == next)
 		return;
 	if (MACHINE_HAS_TLB_LC)

arch/s390/include/asm/pgalloc.h+2−2

@@ -52,8 +52,8 @@ static inline unsigned long pgd_entry_type(struct mm_struct *mm) · 51 unmodified lines
52	return _REGION2_ENTRY_EMPTY;	52	return _REGION2_ENTRY_EMPTY;
53	}	53	}
54		54
55	int crst_table_upgrade(struct mm_struct *, unsigned long limit);	55	int crst_table_upgrade(struct mm_struct *);
56	void crst_table_downgrade(struct mm_struct *, unsigned long limit);	56	void crst_table_downgrade(struct mm_struct *);
57		57
58	static inline pud_t pud_alloc_one(struct mm_struct mm, unsigned long address)	58	static inline pud_t pud_alloc_one(struct mm_struct mm, unsigned long address)
59	{	59	{

arch/s390/include/asm/processor.h+1−1

@@ -175,7 +175,7 @@ extern __vector128 init_task_fpu_regs[__NUM_VXRS]; · 174 unmodified lines
175	regs->psw.mask = PSW_USER_BITS \| PSW_MASK_BA; \	175	regs->psw.mask = PSW_USER_BITS \| PSW_MASK_BA; \
176	regs->psw.addr = new_psw; \	176	regs->psw.addr = new_psw; \
177	regs->gprs[15] = new_stackp; \	177	regs->gprs[15] = new_stackp; \
178	crst_table_downgrade(current->mm, 1UL << 31); \	178	crst_table_downgrade(current->mm); \
179	execve_tail(); \	179	execve_tail(); \
180	} while (0)	180	} while (0)
181		181

arch/s390/include/asm/tlbflush.h+3−6

 static inline void __tlb_flush_kernel(void)
 {
 	if (MACHINE_HAS_IDTE)
-		__tlb_flush_idte((unsigned long) init_mm.pgd |
+		__tlb_flush_idte(init_mm.context.asce);
-				 init_mm.context.asce_bits);
 	else
 		__tlb_flush_global();
 }
 static inline void __tlb_flush_kernel(void)
 {
 	if (MACHINE_HAS_TLB_LC)
-		__tlb_flush_idte_local((unsigned long) init_mm.pgd |
+		__tlb_flush_idte_local(init_mm.context.asce);
-				       init_mm.context.asce_bits);
 	else
 		__tlb_flush_local();
 }
 	 * only ran on the local cpu.
 	 */
 	if (MACHINE_HAS_IDTE && list_empty(&mm->context.gmap_list))
-		__tlb_flush_asce(mm, (unsigned long) mm->pgd |
+		__tlb_flush_asce(mm, mm->context.asce);
-				 mm->context.asce_bits);
 	else
 		__tlb_flush_full(mm);
 }

arch/s390/mm/init.c+2−1

 		asce_bits = _ASCE_TYPE_REGION3 | _ASCE_TABLE_LENGTH;
 		pgd_type = _REGION3_ENTRY_EMPTY;
 	}
-	S390_lowcore.kernel_asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
+	init_mm.context.asce = (__pa(init_mm.pgd) & PAGE_MASK) | asce_bits;
+	S390_lowcore.kernel_asce = init_mm.context.asce;
 	clear_table((unsigned long *) init_mm.pgd, pgd_type,
 		    sizeof(unsigned long)*2048);
 	vmem_map_init();

arch/s390/mm/mmap.c+3−3

@@ -174,7 +174,7 @@ int s390_mmap_check(unsigned long addr, unsigned long len, unsigned long flags) · 173 unmodified lines
174	if (!(flags & MAP_FIXED))	174	if (!(flags & MAP_FIXED))
175	addr = 0;	175	addr = 0;
176	if ((addr + len) >= TASK_SIZE)	176	if ((addr + len) >= TASK_SIZE)
177	return crst_table_upgrade(current->mm, TASK_MAX_SIZE);	177	return crst_table_upgrade(current->mm);
178	return 0;	178	return 0;
179	}	179	}
180		180
@@ -191,7 +191,7 @@ s390_get_unmapped_area(struct file *filp, unsigned long addr, · 10 unmodified lines
191	return area;	191	return area;
192	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {	192	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {
193	/* Upgrade the page table to 4 levels and retry. */	193	/* Upgrade the page table to 4 levels and retry. */
194	rc = crst_table_upgrade(mm, TASK_MAX_SIZE);	194	rc = crst_table_upgrade(mm);
195	if (rc)	195	if (rc)
196	return (unsigned long) rc;	196	return (unsigned long) rc;
197	area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);	197	area = arch_get_unmapped_area(filp, addr, len, pgoff, flags);
@@ -213,7 +213,7 @@ s390_get_unmapped_area_topdown(struct file *filp, const unsigned long addr, · 15 unmodified lines
213	return area;	213	return area;
214	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {	214	if (area == -ENOMEM && !is_compat_task() && TASK_SIZE < TASK_MAX_SIZE) {
215	/* Upgrade the page table to 4 levels and retry. */	215	/* Upgrade the page table to 4 levels and retry. */
216	rc = crst_table_upgrade(mm, TASK_MAX_SIZE);	216	rc = crst_table_upgrade(mm);
217	if (rc)	217	if (rc)
218	return (unsigned long) rc;	218	return (unsigned long) rc;
219	area = arch_get_unmapped_area_topdown(filp, addr, len,	219	area = arch_get_unmapped_area_topdown(filp, addr, len,

arch/s390/mm/pgalloc.c+28−57

@@ -76,81 +76,52 @@ static void __crst_table_upgrade(void *arg) · 75 unmodified lines
76	__tlb_flush_local();	76	__tlb_flush_local();
77	}	77	}
78		78
79	int crst_table_upgrade(struct mm_struct *mm, unsigned long limit)	79	int crst_table_upgrade(struct mm_struct *mm)
80	{	80	{
81	unsigned long table, pgd;	81	unsigned long table, pgd;
82	unsigned long entry;
83	int flush;
84		82
85	BUG_ON(limit > TASK_MAX_SIZE);	83	/* upgrade should only happen from 3 to 4 levels */
86	flush = 0;	84	BUG_ON(mm->context.asce_limit != (1UL << 42));
87	repeat:	85
88	table = crst_table_alloc(mm);	86	table = crst_table_alloc(mm);
89	if (!table)	87	if (!table)
90	return -ENOMEM;	88	return -ENOMEM;
		89
91	spin_lock_bh(&mm->page_table_lock);	90	spin_lock_bh(&mm->page_table_lock);
92	if (mm->context.asce_limit < limit) {	91	pgd = (unsigned long *) mm->pgd;
93	pgd = (unsigned long *) mm->pgd;	92	crst_table_init(table, _REGION2_ENTRY_EMPTY);
94	if (mm->context.asce_limit <= (1UL << 31)) {	93	pgd_populate(mm, (pgd_t ) table, (pud_t ) pgd);
95	entry = _REGION3_ENTRY_EMPTY;	94	mm->pgd = (pgd_t *) table;
96	mm->context.asce_limit = 1UL << 42;	95	mm->context.asce_limit = 1UL << 53;
97	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|	96	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
98	_ASCE_USER_BITS \|	97	_ASCE_USER_BITS \| _ASCE_TYPE_REGION2;
99	_ASCE_TYPE_REGION3;	98	mm->task_size = mm->context.asce_limit;
100	} else {
101	entry = _REGION2_ENTRY_EMPTY;
102	mm->context.asce_limit = 1UL << 53;
103	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
104	_ASCE_USER_BITS \|
105	_ASCE_TYPE_REGION2;
106	}
107	crst_table_init(table, entry);
108	pgd_populate(mm, (pgd_t ) table, (pud_t ) pgd);
109	mm->pgd = (pgd_t *) table;
110	mm->task_size = mm->context.asce_limit;
111	table = NULL;
112	flush = 1;
113	}
114	spin_unlock_bh(&mm->page_table_lock);	99	spin_unlock_bh(&mm->page_table_lock);
115	if (table)	100
116	crst_table_free(mm, table);	101	on_each_cpu(__crst_table_upgrade, mm, 0);
117	if (mm->context.asce_limit < limit)
118	goto repeat;
119	if (flush)
120	on_each_cpu(__crst_table_upgrade, mm, 0);
121	return 0;	102	return 0;
122	}	103	}
123		104
124	void crst_table_downgrade(struct mm_struct *mm, unsigned long limit)	105	void crst_table_downgrade(struct mm_struct *mm)
125	{	106	{
126	pgd_t *pgd;	107	pgd_t *pgd;
127		108
		109	/* downgrade should only happen from 3 to 2 levels (compat only) */
		110	BUG_ON(mm->context.asce_limit != (1UL << 42));
		111
128	if (current->active_mm == mm) {	112	if (current->active_mm == mm) {
129	clear_user_asce();	113	clear_user_asce();
130	__tlb_flush_mm(mm);	114	__tlb_flush_mm(mm);
131	}	115	}
132	while (mm->context.asce_limit > limit) {	116
133	pgd = mm->pgd;	117	pgd = mm->pgd;
134	switch (pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) {	118	mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
135	case _REGION_ENTRY_TYPE_R2:	119	mm->context.asce_limit = 1UL << 31;
136	mm->context.asce_limit = 1UL << 42;	120	mm->context.asce = __pa(mm->pgd) \| _ASCE_TABLE_LENGTH \|
137	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|	121	_ASCE_USER_BITS \| _ASCE_TYPE_SEGMENT;
138	_ASCE_USER_BITS \|	122	mm->task_size = mm->context.asce_limit;
139	_ASCE_TYPE_REGION3;	123	crst_table_free(mm, (unsigned long *) pgd);
140	break;	124
141	case _REGION_ENTRY_TYPE_R3:
142	mm->context.asce_limit = 1UL << 31;
143	mm->context.asce_bits = _ASCE_TABLE_LENGTH \|
144	_ASCE_USER_BITS \|
145	_ASCE_TYPE_SEGMENT;
146	break;
147	default:
148	BUG();
149	}
150	mm->pgd = (pgd_t ) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN);
151	mm->task_size = mm->context.asce_limit;
152	crst_table_free(mm, (unsigned long *) pgd);
153	}
154	if (current->active_mm == mm)	125	if (current->active_mm == mm)
155	set_user_asce(mm);	126	set_user_asce(mm);
156	}	127	}

arch/s390/pci/pci_dma.c+10−6

 	zdev->dma_table = dma_alloc_cpu_table();
 	if (!zdev->dma_table) {
 		rc = -ENOMEM;
-		goto out_clean;
+		goto out;
 	}
 	/*
 	zdev->iommu_bitmap = vzalloc(zdev->iommu_pages / 8);
 	if (!zdev->iommu_bitmap) {
 		rc = -ENOMEM;
-		goto out_reg;
+		goto free_dma_table;
 	}
 	rc = zpci_register_ioat(zdev, 0, zdev->start_dma, zdev->end_dma,
 				(u64) zdev->dma_table);
 	if (rc)
-		goto out_reg;
+		goto free_bitmap;
-	return 0;
-out_reg:
+	return 0;
+free_bitmap:
+	vfree(zdev->iommu_bitmap);
+	zdev->iommu_bitmap = NULL;
+free_dma_table:
 	dma_free_cpu_table(zdev->dma_table);
-out_clean:
+	zdev->dma_table = NULL;
+out:
 	return rc;
 }

arch/sparc/configs/sparc32_defconfig+0−1

@@ -24,7 +24,6 @@ CONFIG_INET_AH=y · 23 unmodified lines
24	CONFIG_INET_ESP=y	24	CONFIG_INET_ESP=y
25	CONFIG_INET_IPCOMP=y	25	CONFIG_INET_IPCOMP=y
26	# CONFIG_INET_LRO is not set	26	# CONFIG_INET_LRO is not set
27	CONFIG_IPV6_PRIVACY=y
28	CONFIG_INET6_AH=m	27	CONFIG_INET6_AH=m
29	CONFIG_INET6_ESP=m	28	CONFIG_INET6_ESP=m
30	CONFIG_INET6_IPCOMP=m	29	CONFIG_INET6_IPCOMP=m

arch/sparc/configs/sparc64_defconfig+0−1

@@ -48,7 +48,6 @@ CONFIG_SYN_COOKIES=y · 47 unmodified lines
48	CONFIG_INET_AH=y	48	CONFIG_INET_AH=y
49	CONFIG_INET_ESP=y	49	CONFIG_INET_ESP=y
50	CONFIG_INET_IPCOMP=y	50	CONFIG_INET_IPCOMP=y
51	CONFIG_IPV6_PRIVACY=y
52	CONFIG_IPV6_ROUTER_PREF=y	51	CONFIG_IPV6_ROUTER_PREF=y
53	CONFIG_IPV6_ROUTE_INFO=y	52	CONFIG_IPV6_ROUTE_INFO=y
54	CONFIG_IPV6_OPTIMISTIC_DAD=y	53	CONFIG_IPV6_OPTIMISTIC_DAD=y

arch/sparc/include/asm/spitfire.h+1−0

@@ -48,6 +48,7 @@ · 47 unmodified lines
48	#define SUN4V_CHIP_SPARC_M6 0x06	48	#define SUN4V_CHIP_SPARC_M6 0x06
49	#define SUN4V_CHIP_SPARC_M7 0x07	49	#define SUN4V_CHIP_SPARC_M7 0x07
50	#define SUN4V_CHIP_SPARC64X 0x8a	50	#define SUN4V_CHIP_SPARC64X 0x8a
		51	#define SUN4V_CHIP_SPARC_SN 0x8b
51	#define SUN4V_CHIP_UNKNOWN 0xff	52	#define SUN4V_CHIP_UNKNOWN 0xff
52		53
53	#ifndef __ASSEMBLY__	54	#ifndef __ASSEMBLY__

arch/sparc/include/uapi/asm/unistd.h+3−1

 #define __NR_setsockopt		355
 #define __NR_mlock2		356
 #define __NR_copy_file_range	357
+#define __NR_preadv2		358
+#define __NR_pwritev2		359
-#define NR_syscalls		358
+#define NR_syscalls		360
 /* Bitmask values returned from kern_features system call.  */
 #define KERN_FEATURE_MIXED_MODE_STACK	0x00000001

arch/sparc/kernel/cherrs.S+5−9

 	subcc		%g1, %g2, %g1		! Next cacheline
 	bge,pt		%icc, 1b
 	 nop
-	ba,pt		%xcc, dcpe_icpe_tl1_common
+	ba,a,pt		%xcc, dcpe_icpe_tl1_common
-	 nop
 do_dcpe_tl1_fatal:
 	sethi		%hi(1f), %g7
 	mov		0x2, %o0
 	call		cheetah_plus_parity_error
 	 add		%sp, PTREGS_OFF, %o1
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_dcpe_tl1,.-do_dcpe_tl1
 	.globl		do_icpe_tl1
 	subcc		%g1, %g2, %g1
 	bge,pt		%icc, 1b
 	 nop
-	ba,pt		%xcc, dcpe_icpe_tl1_common
+	ba,a,pt		%xcc, dcpe_icpe_tl1_common
-	 nop
 do_icpe_tl1_fatal:
 	sethi		%hi(1f), %g7
 	mov		0x3, %o0
 	call		cheetah_plus_parity_error
 	 add		%sp, PTREGS_OFF, %o1
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_icpe_tl1,.-do_icpe_tl1
 	.type		dcpe_icpe_tl1_common,#function
 	 cmp		%g2, 0x63
 	be		c_cee
 	 nop
-	ba,pt		%xcc, c_deferred
+	ba,a,pt		%xcc, c_deferred
 	.size		__cheetah_log_error,.-__cheetah_log_error
 	/* Cheetah FECC trap handling, we get here from tl{0,1}_fecc

arch/sparc/kernel/cpu.c+6−0

 		sparc_pmu_type = "sparc-m7";
 		break;
+	case SUN4V_CHIP_SPARC_SN:
+		sparc_cpu_type = "SPARC-SN";
+		sparc_fpu_type = "SPARC-SN integrated FPU";
+		sparc_pmu_type = "sparc-sn";
+		break;
 	case SUN4V_CHIP_SPARC64X:
 		sparc_cpu_type = "SPARC64-X";
 		sparc_fpu_type = "SPARC64-X integrated FPU";

arch/sparc/kernel/cpumap.c+1−0

@@ -328,6 +328,7 @@ static int iterate_cpu(struct cpuinfo_tree *t, unsigned int root_index) · 327 unmodified lines
328	case SUN4V_CHIP_NIAGARA5:	328	case SUN4V_CHIP_NIAGARA5:
329	case SUN4V_CHIP_SPARC_M6:	329	case SUN4V_CHIP_SPARC_M6:
330	case SUN4V_CHIP_SPARC_M7:	330	case SUN4V_CHIP_SPARC_M7:
		331	case SUN4V_CHIP_SPARC_SN:
331	case SUN4V_CHIP_SPARC64X:	332	case SUN4V_CHIP_SPARC64X:
332	rover_inc_table = niagara_iterate_method;	333	rover_inc_table = niagara_iterate_method;
333	break;	334	break;

arch/sparc/kernel/fpu_traps.S+5−6

@@ -100,8 +100,8 @@ do_fpdis: · 99 unmodified lines
100	fmuld %f0, %f2, %f26	100	fmuld %f0, %f2, %f26
101	faddd %f0, %f2, %f28	101	faddd %f0, %f2, %f28
102	fmuld %f0, %f2, %f30	102	fmuld %f0, %f2, %f30
103	b,pt %xcc, fpdis_exit	103	ba,a,pt %xcc, fpdis_exit
104	nop	104
105	2: andcc %g5, FPRS_DU, %g0	105	2: andcc %g5, FPRS_DU, %g0
106	bne,pt %icc, 3f	106	bne,pt %icc, 3f
107	fzero %f32	107	fzero %f32
@@ -144,8 +144,8 @@ do_fpdis: · 36 unmodified lines
144	fmuld %f32, %f34, %f58	144	fmuld %f32, %f34, %f58
145	faddd %f32, %f34, %f60	145	faddd %f32, %f34, %f60
146	fmuld %f32, %f34, %f62	146	fmuld %f32, %f34, %f62
147	ba,pt %xcc, fpdis_exit	147	ba,a,pt %xcc, fpdis_exit
148	nop	148
149	3: mov SECONDARY_CONTEXT, %g3	149	3: mov SECONDARY_CONTEXT, %g3
150	add %g6, TI_FPREGS, %g1	150	add %g6, TI_FPREGS, %g1
151		151
@@ -197,8 +197,7 @@ fpdis_exit2: · 45 unmodified lines
197	fp_other_bounce:	197	fp_other_bounce:
198	call do_fpother	198	call do_fpother
199	add %sp, PTREGS_OFF, %o0	199	add %sp, PTREGS_OFF, %o0
200	ba,pt %xcc, rtrap	200	ba,a,pt %xcc, rtrap
201	nop
202	.size fp_other_bounce,.-fp_other_bounce	201	.size fp_other_bounce,.-fp_other_bounce
203		202
204	.align 32	203	.align 32

arch/sparc/kernel/head_64.S+16−16

 	cmp	%g2, 'T'
 	be,pt	%xcc, 70f
 	 cmp	%g2, 'M'
+	be,pt	%xcc, 70f
+	 cmp	%g2, 'S'
 	bne,pn	%xcc, 49f
 	 nop
 	cmp	%g2, '7'
 	be,pt	%xcc, 5f
 	 mov	SUN4V_CHIP_SPARC_M7, %g4
+	cmp	%g2, 'N'
+	be,pt	%xcc, 5f
+	 mov	SUN4V_CHIP_SPARC_SN, %g4
 	ba,pt	%xcc, 49f
 	 nop
 	subcc	%g3, 1, %g3
 	bne,pt	%xcc, 41b
 	add	%g1, 1, %g1
-	mov	SUN4V_CHIP_SPARC64X, %g4
 	ba,pt	%xcc, 5f
-	nop
+	 mov	SUN4V_CHIP_SPARC64X, %g4
 49:
 	mov	SUN4V_CHIP_UNKNOWN, %g4
 	stxa		%g0, [%g7] ASI_DMMU
 	membar	#Sync
-	ba,pt		%xcc, sun4u_continue
+	ba,a,pt		%xcc, sun4u_continue
-	 nop
 sun4v_init:
 	/* Set ctx 0 */
 	mov		SECONDARY_CONTEXT, %g7
 	stxa		%g0, [%g7] ASI_MMU
 	membar		#Sync
-	ba,pt		%xcc, niagara_tlb_fixup
+	ba,a,pt		%xcc, niagara_tlb_fixup
-	 nop
 sun4u_continue:
 	BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
-	ba,pt	%xcc, spitfire_tlb_fixup
+	ba,a,pt	%xcc, spitfire_tlb_fixup
-	 nop
 niagara_tlb_fixup:
 	mov	3, %g2		/* Set TLB type to hypervisor. */
 	be,pt	%xcc, niagara4_patch
 	 nop
 	cmp	%g1, SUN4V_CHIP_SPARC_M7
+	be,pt	%xcc, niagara4_patch
+	 nop
+	cmp	%g1, SUN4V_CHIP_SPARC_SN
 	be,pt	%xcc, niagara4_patch
 	 nop
 	call	hypervisor_patch_cachetlbops
 	 nop
-	ba,pt	%xcc, tlb_fixup_done
+	ba,a,pt	%xcc, tlb_fixup_done
-	 nop
 cheetah_tlb_fixup:
 	mov	2, %g2		/* Set TLB type to cheetah+. */
 	call	cheetah_patch_cachetlbops
 	 nop
-	ba,pt	%xcc, tlb_fixup_done
+	ba,a,pt	%xcc, tlb_fixup_done
-	 nop
 spitfire_tlb_fixup:
 	/* Set TLB type to spitfire. */
 	call	%o1
 	 add	%sp, (2047 + 128), %o0
-	ba,pt	%xcc, 2f
+	ba,a,pt	%xcc, 2f
-	 nop
 1:	sethi	%hi(sparc64_ttable_tl0), %o0
 	set	prom_set_trap_table_name, %g2
 	BRANCH_IF_ANY_CHEETAH(o2, o3, 1f)
-	ba,pt	%xcc, 2f
+	ba,a,pt	%xcc, 2f
-	 nop
 	/* Disable STICK_INT interrupts. */
 1:

arch/sparc/kernel/misctrap.S+4−8

 109:	or		%g7, %lo(109b), %g7
 	call		do_privact
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__do_privact,.-__do_privact
 	.type		do_mna,#function
 	mov		%l5, %o2
 	call		mem_address_unaligned
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_mna,.-do_mna
 	.type		do_lddfmna,#function
 	mov		%l5, %o2
 	call		handle_lddfmna
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_lddfmna,.-do_lddfmna
 	.type		do_stdfmna,#function
 	mov		%l5, %o2
 	call		handle_stdfmna
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		do_stdfmna,.-do_stdfmna
 	.type		breakpoint_trap,#function

arch/sparc/kernel/pci.c+36−6

@@ -245,6 +245,18 @@ static void pci_parse_of_addrs(struct platform_device *op, · 244 unmodified lines
245	}	245	}
246	}	246	}
247		247
		248	static void pci_init_dev_archdata(struct dev_archdata sd, void iommu,
		249	void stc, void host_controller,
		250	struct platform_device *op,
		251	int numa_node)
		252	{
		253	sd->iommu = iommu;
		254	sd->stc = stc;
		255	sd->host_controller = host_controller;
		256	sd->op = op;
		257	sd->numa_node = numa_node;
		258	}
		259
248	static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm,	260	static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm,
249	struct device_node *node,	261	struct device_node *node,
250	struct pci_bus *bus, int devfn)	262	struct pci_bus *bus, int devfn)
@@ -259,13 +271,10 @@ static struct pci_dev of_create_pci_dev(struct pci_pbm_info pbm, · 8 unmodified lines
259	if (!dev)	271	if (!dev)
260	return NULL;	272	return NULL;
261		273
		274	op = of_find_device_by_node(node);
262	sd = &dev->dev.archdata;	275	sd = &dev->dev.archdata;
263	sd->iommu = pbm->iommu;	276	pci_init_dev_archdata(sd, pbm->iommu, &pbm->stc, pbm, op,
264	sd->stc = &pbm->stc;	277	pbm->numa_node);
265	sd->host_controller = pbm;
266	sd->op = op = of_find_device_by_node(node);
267	sd->numa_node = pbm->numa_node;
268
269	sd = &op->dev.archdata;	278	sd = &op->dev.archdata;
270	sd->iommu = pbm->iommu;	279	sd->iommu = pbm->iommu;
271	sd->stc = &pbm->stc;	280	sd->stc = &pbm->stc;
@@ -994,6 +1003,27 @@ void pcibios_set_master(struct pci_dev *dev) · 722 unmodified lines
994	/* No special bus mastering setup handling */	1003	/* No special bus mastering setup handling */
995	}	1004	}
996		1005
		1006	#ifdef CONFIG_PCI_IOV
		1007	int pcibios_add_device(struct pci_dev *dev)
		1008	{
		1009	struct pci_dev *pdev;
		1010
		1011	/* Add sriov arch specific initialization here.
		1012	* Copy dev_archdata from PF to VF
		1013	*/
		1014	if (dev->is_virtfn) {
		1015	struct dev_archdata *psd;
		1016
		1017	pdev = dev->physfn;
		1018	psd = &pdev->dev.archdata;
		1019	pci_init_dev_archdata(&dev->dev.archdata, psd->iommu,
		1020	psd->stc, psd->host_controller, NULL,
		1021	psd->numa_node);
		1022	}
		1023	return 0;
		1024	}
		1025	#endif /* CONFIG_PCI_IOV */
		1026
997	static int __init pcibios_init(void)	1027	static int __init pcibios_init(void)
998	{	1028	{
999	pci_dfl_cache_line_size = 64 >> 2;	1029	pci_dfl_cache_line_size = 64 >> 2;

arch/sparc/kernel/setup_64.c+6−1

 	sun4v_patch_2insn_range(&__sun4v_2insn_patch,
 				&__sun4v_2insn_patch_end);
-	if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7)
+	if (sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+	    sun4v_chip_type == SUN4V_CHIP_SPARC_SN)
 		sun_m7_patch_2insn_range(&__sun_m7_2insn_patch,
 					 &__sun_m7_2insn_patch_end);
 		    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+		    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 			cap |= HWCAP_SPARC_BLKINIT;
 		if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2 ||
 		    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+		    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 		    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 			cap |= HWCAP_SPARC_N2;
 	}
 			    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+			    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 				cap |= (AV_SPARC_VIS | AV_SPARC_VIS2 |
 					AV_SPARC_ASI_BLK_INIT |
 			    sun4v_chip_type == SUN4V_CHIP_NIAGARA5 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M6 ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC_M7 ||
+			    sun4v_chip_type == SUN4V_CHIP_SPARC_SN ||
 			    sun4v_chip_type == SUN4V_CHIP_SPARC64X)
 				cap |= (AV_SPARC_VIS3 | AV_SPARC_HPC |
 					AV_SPARC_FMAF);

arch/sparc/kernel/spiterrs.S+6−12

 	ba,pt		%xcc, etraptl1
 	 rd		%pc, %g7
-	ba,pt		%xcc, 2f
+	ba,a,pt		%xcc, 2f
-	 nop
 1:	ba,pt		%xcc, etrap_irq
 	 rd		%pc, %g7
 	mov		%l5, %o2
 	call		spitfire_access_error
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_access_error,.-__spitfire_access_error
 	/* This is the trap handler entry point for ECC correctable
 	mov		%l5, %o2
 	call		spitfire_data_access_exception_tl1
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_data_access_exception_tl1,.-__spitfire_data_access_exception_tl1
 	.type		__spitfire_data_access_exception,#function
 	mov		%l5, %o2
 	call		spitfire_data_access_exception
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_data_access_exception,.-__spitfire_data_access_exception
 	.type		__spitfire_insn_access_exception_tl1,#function
 	mov		%l5, %o2
 	call		spitfire_insn_access_exception_tl1
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_insn_access_exception_tl1,.-__spitfire_insn_access_exception_tl1
 	.type		__spitfire_insn_access_exception,#function
 	mov		%l5, %o2
 	call		spitfire_insn_access_exception
 	 add		%sp, PTREGS_OFF, %o0
-	ba,pt		%xcc, rtrap
+	ba,a,pt		%xcc, rtrap
-	 nop
 	.size		__spitfire_insn_access_exception,.-__spitfire_insn_access_exception

arch/sparc/kernel/systbls_32.S+1−1

@@ -88,4 +88,4 @@ sys_call_table: · 87 unmodified lines
88	/340/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr	88	/340/ .long sys_ni_syscall, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
89	/345/ .long sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf	89	/345/ .long sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
90	/350/ .long sys_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen	90	/350/ .long sys_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen
91	/355/ .long sys_setsockopt, sys_mlock2, sys_copy_file_range	91	/355/ .long sys_setsockopt, sys_mlock2, sys_copy_file_range, sys_preadv2, sys_pwritev2

arch/sparc/kernel/systbls_64.S+2−2

@@ -89,7 +89,7 @@ sys_call_table32: · 88 unmodified lines
89	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr	89	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
90	.word sys32_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf	90	.word sys32_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
91	/350/ .word sys32_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen	91	/350/ .word sys32_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen
92	.word compat_sys_setsockopt, sys_mlock2, sys_copy_file_range	92	.word compat_sys_setsockopt, sys_mlock2, sys_copy_file_range, compat_sys_preadv2, compat_sys_pwritev2
93		93
94	#endif /* CONFIG_COMPAT */	94	#endif /* CONFIG_COMPAT */
95		95
@@ -170,4 +170,4 @@ sys_call_table: · 74 unmodified lines
170	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr	170	/340/ .word sys_kern_features, sys_kcmp, sys_finit_module, sys_sched_setattr, sys_sched_getattr
171	.word sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf	171	.word sys_renameat2, sys_seccomp, sys_getrandom, sys_memfd_create, sys_bpf
172	/350/ .word sys64_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen	172	/350/ .word sys64_execveat, sys_membarrier, sys_userfaultfd, sys_bind, sys_listen
173	.word sys_setsockopt, sys_mlock2, sys_copy_file_range	173	.word sys_setsockopt, sys_mlock2, sys_copy_file_range, sys_preadv2, sys_pwritev2

arch/sparc/kernel/utrap.S+1−2

@@ -11,8 +11,7 @@ utrap_trap: /* %g3=handler,%g4=level */ · 10 unmodified lines
11	mov %l4, %o1	11	mov %l4, %o1
12	call bad_trap	12	call bad_trap
13	add %sp, PTREGS_OFF, %o0	13	add %sp, PTREGS_OFF, %o0
14	ba,pt %xcc, rtrap	14	ba,a,pt %xcc, rtrap
15	nop
16		15
17	invoke_utrap:	16	invoke_utrap:
18	sllx %g3, 3, %g3	17	sllx %g3, 3, %g3

arch/sparc/kernel/vio.c+18−0

 	return NULL;
 }
+static int vio_hotplug(struct device *dev, struct kobj_uevent_env *env)
+{
+	const struct vio_dev *vio_dev = to_vio_dev(dev);
+	add_uevent_var(env, "MODALIAS=vio:T%sS%s", vio_dev->type, vio_dev->compat);
+	return 0;
+}
 static int vio_bus_match(struct device *dev, struct device_driver *drv)
 {
 	struct vio_dev *vio_dev = to_vio_dev(dev);
 	return sprintf(buf, "%s\n", vdev->type);
 }
+static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
+			     char *buf)
+{
+	const struct vio_dev *vdev = to_vio_dev(dev);
+	return sprintf(buf, "vio:T%sS%s\n", vdev->type, vdev->compat);
+}
 static struct device_attribute vio_dev_attrs[] = {
 	__ATTR_RO(devspec),
 	__ATTR_RO(type),
+	__ATTR_RO(modalias),
 	__ATTR_NULL
 };
 static struct bus_type vio_bus_type = {
 	.name		= "vio",
 	.dev_attrs	= vio_dev_attrs,
+	.uevent         = vio_hotplug,
 	.match		= vio_bus_match,
 	.probe		= vio_device_probe,
 	.remove		= vio_device_remove,

arch/sparc/kernel/vmlinux.lds.S+4−0

 jiffies = jiffies_64;
 #endif
+#ifdef CONFIG_SPARC64
+ASSERT((swapper_tsb == 0x0000000000408000), "Error: sparc64 early assembler too large")
+#endif
 SECTIONS
 {
 #ifdef CONFIG_SPARC64

arch/sparc/kernel/winfixup.S+1−2

@@ -32,8 +32,7 @@ fill_fixup: · 31 unmodified lines
32	rd %pc, %g7	32	rd %pc, %g7
33	call do_sparc64_fault	33	call do_sparc64_fault
34	add %sp, PTREGS_OFF, %o0	34	add %sp, PTREGS_OFF, %o0
35	ba,pt %xcc, rtrap	35	ba,a,pt %xcc, rtrap
36	nop
37		36
38	/* Be very careful about usage of the trap globals here.	37	/* Be very careful about usage of the trap globals here.
39	* You cannot touch %g5 as that has the fault information.	38	* You cannot touch %g5 as that has the fault information.

arch/sparc/mm/init_64.c+3−0

 			max_phys_bits = 47;
 			break;
 		case SUN4V_CHIP_SPARC_M7:
+		case SUN4V_CHIP_SPARC_SN:
 		default:
 			/* M7 and later support 52-bit virtual addresses.  */
 			sparc64_va_hole_top =    0xfff8000000000000UL;
 	 */
 	switch (sun4v_chip_type) {
 	case SUN4V_CHIP_SPARC_M7:
+	case SUN4V_CHIP_SPARC_SN:
 		pagecv_flag = 0x00;
 		break;
 	default:
 	 */
 	switch (sun4v_chip_type) {
 	case SUN4V_CHIP_SPARC_M7:
+	case SUN4V_CHIP_SPARC_SN:
 		page_cache4v_flag = _PAGE_CP_4V;
 		break;
 	default:

arch/x86/events/amd/core.c+1−1

@@ -115,7 +115,7 @@ static __initconst const u64 amd_hw_cache_event_ids · 114 unmodified lines
115	/*	115	/*
116	* AMD Performance Monitor K7 and later.	116	* AMD Performance Monitor K7 and later.
117	*/	117	*/
118	static const u64 amd_perfmon_event_map[] =	118	static const u64 amd_perfmon_event_map[PERF_COUNT_HW_MAX] =
119	{	119	{
120	[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,	120	[PERF_COUNT_HW_CPU_CYCLES] = 0x0076,
121	[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,	121	[PERF_COUNT_HW_INSTRUCTIONS] = 0x00c0,

arch/x86/events/intel/core.c+1−0

@@ -3639,6 +3639,7 @@ __init int intel_pmu_init(void) · 3638 unmodified lines
3639		3639
3640	case 78: /* 14nm Skylake Mobile */	3640	case 78: /* 14nm Skylake Mobile */
3641	case 94: /* 14nm Skylake Desktop */	3641	case 94: /* 14nm Skylake Desktop */
		3642	case 85: /* 14nm Skylake Server */
3642	x86_pmu.late_ack = true;	3643	x86_pmu.late_ack = true;
3643	memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));	3644	memcpy(hw_cache_event_ids, skl_hw_cache_event_ids, sizeof(hw_cache_event_ids));
3644	memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));	3645	memcpy(hw_cache_extra_regs, skl_hw_cache_extra_regs, sizeof(hw_cache_extra_regs));

arch/x86/events/intel/lbr.c+4−2

 #define LBR_PLM (LBR_KERNEL | LBR_USER)
-#define LBR_SEL_MASK	0x1ff	/* valid bits in LBR_SELECT */
+#define LBR_SEL_MASK	0x3ff	/* valid bits in LBR_SELECT */
 #define LBR_NOT_SUPP	-1	/* LBR filter not supported */
 #define LBR_IGN		0	/* ignored */
 	 * The first 9 bits (LBR_SEL_MASK) in LBR_SELECT operate
 	 * in suppress mode. So LBR_SELECT should be set to
 	 * (~mask & LBR_SEL_MASK) | (mask & ~LBR_SEL_MASK)
+	 * But the 10th bit LBR_CALL_STACK does not operate
+	 * in suppress mode.
 	 */
-	reg->config = mask ^ x86_pmu.lbr_sel_mask;
+	reg->config = mask ^ (x86_pmu.lbr_sel_mask & ~LBR_CALL_STACK);
 	if ((br_type & PERF_SAMPLE_BRANCH_NO_CYCLES) &&
 	    (br_type & PERF_SAMPLE_BRANCH_NO_FLAGS) &&

arch/x86/events/intel/pt.c+64−11

@@ -136,9 +136,21 @@ static int __init pt_pmu_hw_init(void) · 135 unmodified lines
136	struct dev_ext_attribute *de_attrs;	136	struct dev_ext_attribute *de_attrs;
137	struct attribute **attrs;	137	struct attribute **attrs;
138	size_t size;	138	size_t size;
		139	u64 reg;
139	int ret;	140	int ret;
140	long i;	141	long i;
141		142
		143	if (boot_cpu_has(X86_FEATURE_VMX)) {
		144	/*
		145	* Intel SDM, 36.5 "Tracing post-VMXON" says that
		146	* "IA32_VMX_MISC[bit 14]" being 1 means PT can trace
		147	* post-VMXON.
		148	*/
		149	rdmsrl(MSR_IA32_VMX_MISC, reg);
		150	if (reg & BIT(14))
		151	pt_pmu.vmx = true;
		152	}
		153
142	attrs = NULL;	154	attrs = NULL;
143		155
144	for (i = 0; i < PT_CPUID_LEAVES; i++) {	156	for (i = 0; i < PT_CPUID_LEAVES; i++) {
@@ -269,20 +281,23 @@ static void pt_config(struct perf_event *event) · 124 unmodified lines
269		281
270	reg \|= (event->attr.config & PT_CONFIG_MASK);	282	reg \|= (event->attr.config & PT_CONFIG_MASK);
271		283
		284	event->hw.config = reg;
272	wrmsrl(MSR_IA32_RTIT_CTL, reg);	285	wrmsrl(MSR_IA32_RTIT_CTL, reg);
273	}	286	}
274		287
275	static void pt_config_start(bool start)	288	static void pt_config_stop(struct perf_event *event)
276	{	289	{
277	u64 ctl;	290	u64 ctl = READ_ONCE(event->hw.config);
		291
		292	/* may be already stopped by a PMI */
		293	if (!(ctl & RTIT_CTL_TRACEEN))
		294	return;
278		295
279	rdmsrl(MSR_IA32_RTIT_CTL, ctl);	296	ctl &= ~RTIT_CTL_TRACEEN;
280	if (start)
281	ctl \|= RTIT_CTL_TRACEEN;
282	else
283	ctl &= ~RTIT_CTL_TRACEEN;
284	wrmsrl(MSR_IA32_RTIT_CTL, ctl);	297	wrmsrl(MSR_IA32_RTIT_CTL, ctl);
285		298
		299	WRITE_ONCE(event->hw.config, ctl);
		300
286	/*	301	/*
287	* A wrmsr that disables trace generation serializes other PT	302	* A wrmsr that disables trace generation serializes other PT
288	* registers and causes all data packets to be written to memory,	303	* registers and causes all data packets to be written to memory,
@@ -291,8 +306,7 @@ static void pt_config_start(bool start) · 2 unmodified lines
291	* The below WMB, separating data store and aux_head store matches	306	* The below WMB, separating data store and aux_head store matches
292	* the consumer's RMB that separates aux_head load and data load.	307	* the consumer's RMB that separates aux_head load and data load.
293	*/	308	*/
294	if (!start)	309	wmb();
295	wmb();
296	}	310	}
297		311
298	static void pt_config_buffer(void *buf, unsigned int topa_idx,	312	static void pt_config_buffer(void *buf, unsigned int topa_idx,
@@ -942,11 +956,17 @@ void intel_pt_interrupt(void) · 643 unmodified lines
942	if (!ACCESS_ONCE(pt->handle_nmi))	956	if (!ACCESS_ONCE(pt->handle_nmi))
943	return;	957	return;
944		958
945	pt_config_start(false);	959	/*
		960	* If VMX is on and PT does not support it, don't touch anything.
		961	*/
		962	if (READ_ONCE(pt->vmx_on))
		963	return;
946		964
947	if (!event)	965	if (!event)
948	return;	966	return;
949		967
		968	pt_config_stop(event);
		969
950	buf = perf_get_aux(&pt->handle);	970	buf = perf_get_aux(&pt->handle);
951	if (!buf)	971	if (!buf)
952	return;	972	return;
@@ -983,6 +1003,35 @@ void intel_pt_interrupt(void) · 30 unmodified lines
983	}	1003	}
984	}	1004	}
985		1005
		1006	void intel_pt_handle_vmx(int on)
		1007	{
		1008	struct pt *pt = this_cpu_ptr(&pt_ctx);
		1009	struct perf_event *event;
		1010	unsigned long flags;
		1011
		1012	/* PT plays nice with VMX, do nothing */
		1013	if (pt_pmu.vmx)
		1014	return;
		1015
		1016	/*
		1017	* VMXON will clear RTIT_CTL.TraceEn; we need to make
		1018	* sure to not try to set it while VMX is on. Disable
		1019	* interrupts to avoid racing with pmu callbacks;
		1020	* concurrent PMI should be handled fine.
		1021	*/
		1022	local_irq_save(flags);
		1023	WRITE_ONCE(pt->vmx_on, on);
		1024
		1025	if (on) {
		1026	/* prevent pt_config_stop() from writing RTIT_CTL */
		1027	event = pt->handle.event;
		1028	if (event)
		1029	event->hw.config = 0;
		1030	}
		1031	local_irq_restore(flags);
		1032	}
		1033	EXPORT_SYMBOL_GPL(intel_pt_handle_vmx);
		1034
986	/*	1035	/*
987	* PMU callbacks	1036	* PMU callbacks
988	*/	1037	*/
@@ -992,6 +1041,9 @@ static void pt_event_start(struct perf_event *event, int mode) · 3 unmodified lines
992	struct pt *pt = this_cpu_ptr(&pt_ctx);	1041	struct pt *pt = this_cpu_ptr(&pt_ctx);
993	struct pt_buffer *buf = perf_get_aux(&pt->handle);	1042	struct pt_buffer *buf = perf_get_aux(&pt->handle);
994		1043
		1044	if (READ_ONCE(pt->vmx_on))
		1045	return;
		1046
995	if (!buf \|\| pt_buffer_is_full(buf, pt)) {	1047	if (!buf \|\| pt_buffer_is_full(buf, pt)) {
996	event->hw.state = PERF_HES_STOPPED;	1048	event->hw.state = PERF_HES_STOPPED;
997	return;	1049	return;
@@ -1014,7 +1066,8 @@ static void pt_event_stop(struct perf_event *event, int mode) · 16 unmodified lines
1014	* see comment in intel_pt_interrupt().	1066	* see comment in intel_pt_interrupt().
1015	*/	1067	*/
1016	ACCESS_ONCE(pt->handle_nmi) = 0;	1068	ACCESS_ONCE(pt->handle_nmi) = 0;
1017	pt_config_start(false);	1069
		1070	pt_config_stop(event);
1018		1071
1019	if (event->hw.state == PERF_HES_STOPPED)	1072	if (event->hw.state == PERF_HES_STOPPED)
1020	return;	1073	return;

arch/x86/events/intel/pt.h+3−0

 struct pt_pmu {
 	struct pmu		pmu;
 	u32			caps[PT_CPUID_REGS_NUM * PT_CPUID_LEAVES];
+	bool			vmx;
 };
 /**
  * struct pt - per-cpu pt context
  * @handle:	perf output handle
  * @handle_nmi:	do handle PT PMI on this cpu, there's an active event
+ * @vmx_on:	1 if VMX is ON on this cpu
  */
 struct pt {
 	struct perf_output_handle handle;
 	int			handle_nmi;
+	int			vmx_on;
 };
 #endif /* __INTEL_PT_H__ */

arch/x86/events/intel/rapl.c+1−0

@@ -718,6 +718,7 @@ static int __init rapl_pmu_init(void) · 717 unmodified lines
718	break;	718	break;
719	case 60: /* Haswell */	719	case 60: /* Haswell */
720	case 69: /* Haswell-Celeron */	720	case 69: /* Haswell-Celeron */
		721	case 70: /* Haswell GT3e */
721	case 61: /* Broadwell */	722	case 61: /* Broadwell */
722	case 71: /* Broadwell-H */	723	case 71: /* Broadwell-H */
723	rapl_cntr_mask = RAPL_IDX_HSW;	724	rapl_cntr_mask = RAPL_IDX_HSW;

arch/x86/include/asm/perf_event.h+4−0

 static inline void perf_check_microcode(void) { }
 #endif
+#ifdef CONFIG_CPU_SUP_INTEL
+ extern void intel_pt_handle_vmx(int on);
+#endif
 #if defined(CONFIG_PERF_EVENTS) && defined(CONFIG_CPU_SUP_AMD)
  extern void amd_pmu_enable_virt(void);
  extern void amd_pmu_disable_virt(void);

arch/x86/kernel/apic/vector.c+2−1

@@ -256,7 +256,8 @@ static void clear_irq_vector(int irq, struct apic_chip_data *data) · 255 unmodified lines
256	struct irq_desc *desc;	256	struct irq_desc *desc;
257	int cpu, vector;	257	int cpu, vector;
258		258
259	BUG_ON(!data->cfg.vector);	259	if (!data->cfg.vector)
		260	return;
260		261
261	vector = data->cfg.vector;	262	vector = data->cfg.vector;
262	for_each_cpu_and(cpu, data->domain, cpu_online_mask)	263	for_each_cpu_and(cpu, data->domain, cpu_online_mask)

arch/x86/kernel/head_32.S+0−6

 	/* Make changes effective */
 	wrmsr
-	/*
-	 * And make sure that all the mappings we set up have NX set from
-	 * the beginning.
-	 */
-	orl $(1 << (_PAGE_BIT_NX - 32)), pa(__supported_pte_mask + 4)
 enable_paging:
 /*

arch/x86/kvm/vmx.c+4−0

 static void kvm_cpu_vmxon(u64 addr)
 {
+	intel_pt_handle_vmx(1);
 	asm volatile (ASM_VMX_VMXON_RAX
 			: : "a"(&addr), "m"(addr)
 			: "memory", "cc");
 static void kvm_cpu_vmxoff(void)
 {
 	asm volatile (__ex(ASM_VMX_VMXOFF) : : : "cc");
+	intel_pt_handle_vmx(0);
 }
 static void hardware_disable(void)

arch/x86/mm/setup_nx.c+3−2

@@ -32,8 +32,9 @@ early_param("noexec", noexec_setup); · 31 unmodified lines
32		32
33	void x86_configure_nx(void)	33	void x86_configure_nx(void)
34	{	34	{
35	/* If disable_nx is set, clear NX on all new mappings going forward. */	35	if (boot_cpu_has(X86_FEATURE_NX) && !disable_nx)
36	if (disable_nx)	36	__supported_pte_mask \|= _PAGE_NX;
		37	else
37	__supported_pte_mask &= ~_PAGE_NX;	38	__supported_pte_mask &= ~_PAGE_NX;
38	}	39	}
39		40

arch/x86/xen/spinlock.c+6−0

 static void xen_qlock_kick(int cpu)
 {
+	int irq = per_cpu(lock_kicker_irq, cpu);
+	/* Don't kick if the target's kicker interrupt is not initialized. */
+	if (irq == -1)
+		return;
 	xen_send_IPI_one(cpu, XEN_SPIN_UNLOCK_VECTOR);
 }

drivers/block/rbd.c+25−27

 				u8 *order, u64 *snap_size);
 static int _rbd_dev_v2_snap_features(struct rbd_device *rbd_dev, u64 snap_id,
 		u64 *snap_features);
-static u64 rbd_snap_id_by_name(struct rbd_device *rbd_dev, const char *name);
 static int rbd_open(struct block_device *bdev, fmode_t mode)
 {
 	struct rbd_device *rbd_dev = (struct rbd_device *)data;
 	int ret;
-	if (!rbd_dev)
-		return;
 	dout("%s: \"%s\" notify_id %llu opcode %u\n", __func__,
 		rbd_dev->header_name, (unsigned long long)notify_id,
 		(unsigned int)opcode);
 	ceph_osdc_cancel_event(rbd_dev->watch_event);
 	rbd_dev->watch_event = NULL;
+	dout("%s flushing notifies\n", __func__);
+	ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc);
 }
 /*
 static void rbd_dev_update_size(struct rbd_device *rbd_dev)
 {
 	sector_t size;
-	bool removing;
 	/*
-	 * Don't hold the lock while doing disk operations,
+	 * If EXISTS is not set, rbd_dev->disk may be NULL, so don't
-	 * or lock ordering will conflict with the bdev mutex via:
+	 * try to update its size.  If REMOVING is set, updating size
-	 * rbd_add() -> blkdev_get() -> rbd_open()
+	 * is just useless work since the device can't be opened.
 	 */
-	spin_lock_irq(&rbd_dev->lock);
+	if (test_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags) &&
-	removing = test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags);
+	    !test_bit(RBD_DEV_FLAG_REMOVING, &rbd_dev->flags)) {
-	spin_unlock_irq(&rbd_dev->lock);
-	/*
-	 * If the device is being removed, rbd_dev->disk has
-	 * been destroyed, so don't try to update its size
-	 */
-	if (!removing) {
 		size = (sector_t)rbd_dev->mapping.size / SECTOR_SIZE;
 		dout("setting size to %llu sectors", (unsigned long long)size);
 		set_capacity(rbd_dev->disk, size);
 		__le64 features;
 		__le64 incompat;
 	} __attribute__ ((packed)) features_buf = { 0 };
-	u64 incompat;
+	u64 unsup;
 	int ret;
 	ret = rbd_obj_method_sync(rbd_dev, rbd_dev->header_name,
 	if (ret < sizeof (features_buf))
 		return -ERANGE;
-	incompat = le64_to_cpu(features_buf.incompat);
+	unsup = le64_to_cpu(features_buf.incompat) & ~RBD_FEATURES_SUPPORTED;
-	if (incompat & ~RBD_FEATURES_SUPPORTED)
+	if (unsup) {
+		rbd_warn(rbd_dev, "image uses unsupported features: 0x%llx",
+			 unsup);
 		return -ENXIO;
+	}
 	*snap_features = le64_to_cpu(features_buf.features);
 	return ret;
 }
+/*
+ * rbd_dev->header_rwsem must be locked for write and will be unlocked
+ * upon return.
+ */
 static int rbd_dev_device_setup(struct rbd_device *rbd_dev)
 {
 	int ret;
 	ret = rbd_dev_id_get(rbd_dev);
 	if (ret)
-		return ret;
+		goto err_out_unlock;
 	BUILD_BUG_ON(DEV_NAME_LEN
 			< sizeof (RBD_DRV_NAME) + MAX_INT_FORMAT_WIDTH);
 	/* Everything's ready.  Announce the disk to the world. */
 	set_bit(RBD_DEV_FLAG_EXISTS, &rbd_dev->flags);
-	add_disk(rbd_dev->disk);
+	up_write(&rbd_dev->header_rwsem);
+	add_disk(rbd_dev->disk);
 	pr_info("%s: added with size 0x%llx\n", rbd_dev->disk->disk_name,
 		(unsigned long long) rbd_dev->mapping.size);
 		unregister_blkdev(rbd_dev->major, rbd_dev->name);
 err_out_id:
 	rbd_dev_id_put(rbd_dev);
+err_out_unlock:
+	up_write(&rbd_dev->header_rwsem);
 	return ret;
 }
 	spec = NULL;		/* rbd_dev now owns this */
 	rbd_opts = NULL;	/* rbd_dev now owns this */
+	down_write(&rbd_dev->header_rwsem);
 	rc = rbd_dev_image_probe(rbd_dev, 0);
 	if (rc < 0)
 		goto err_out_rbd_dev;
 	return rc;
 err_out_rbd_dev:
+	up_write(&rbd_dev->header_rwsem);
 	rbd_dev_destroy(rbd_dev);
 err_out_client:
 	rbd_put_client(rbdc);
 		return ret;
 	rbd_dev_header_unwatch_sync(rbd_dev);
-	/*
-	 * flush remaining watch callbacks - these must be complete
-	 * before the osd_client is shutdown
-	 */
-	dout("%s: flushing notifies", __func__);
-	ceph_osdc_flush_notifies(&rbd_dev->rbd_client->client->osdc);
 	/*
 	 * Don't free anything from rbd_dev->disk until after all

drivers/clk/imx/clk-imx6q.c+1−1

@@ -394,7 +394,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) · 393 unmodified lines
394	clk[IMX6QDL_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1", 2, 7);	394	clk[IMX6QDL_CLK_LDB_DI1_DIV_3_5] = imx_clk_fixed_factor("ldb_di1_div_3_5", "ldb_di1", 2, 7);
395	} else {	395	} else {
396	clk[IMX6QDL_CLK_ECSPI_ROOT] = imx_clk_divider("ecspi_root", "pll3_60m", base + 0x38, 19, 6);	396	clk[IMX6QDL_CLK_ECSPI_ROOT] = imx_clk_divider("ecspi_root", "pll3_60m", base + 0x38, 19, 6);
397	clk[IMX6QDL_CLK_CAN_ROOT] = imx_clk_divider("can_root", "pll3_60", base + 0x20, 2, 6);	397	clk[IMX6QDL_CLK_CAN_ROOT] = imx_clk_divider("can_root", "pll3_60m", base + 0x20, 2, 6);
398	clk[IMX6QDL_CLK_IPG_PER] = imx_clk_fixup_divider("ipg_per", "ipg", base + 0x1c, 0, 6, imx_cscmr1_fixup);	398	clk[IMX6QDL_CLK_IPG_PER] = imx_clk_fixup_divider("ipg_per", "ipg", base + 0x1c, 0, 6, imx_cscmr1_fixup);
399	clk[IMX6QDL_CLK_UART_SERIAL_PODF] = imx_clk_divider("uart_serial_podf", "pll3_80m", base + 0x24, 0, 6);	399	clk[IMX6QDL_CLK_UART_SERIAL_PODF] = imx_clk_divider("uart_serial_podf", "pll3_80m", base + 0x24, 0, 6);
400	clk[IMX6QDL_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);	400	clk[IMX6QDL_CLK_LDB_DI0_DIV_3_5] = imx_clk_fixed_factor("ldb_di0_div_3_5", "ldb_di0_sel", 2, 7);

drivers/cpufreq/cpufreq_governor.c+2−6

 		wall_time = cur_wall_time - j_cdbs->prev_cpu_wall;
 		j_cdbs->prev_cpu_wall = cur_wall_time;
-		if (cur_idle_time <= j_cdbs->prev_cpu_idle) {
+		idle_time = cur_idle_time - j_cdbs->prev_cpu_idle;
-			idle_time = 0;
+		j_cdbs->prev_cpu_idle = cur_idle_time;
-		} else {
-			idle_time = cur_idle_time - j_cdbs->prev_cpu_idle;
-			j_cdbs->prev_cpu_idle = cur_idle_time;
-		}
 		if (ignore_nice) {
 			u64 cur_nice = kcpustat_cpu(j).cpustat[CPUTIME_NICE];

drivers/cpufreq/intel_pstate.c+5−0

 			if (err)
 				goto skip_tar;
+			/* For level 1 and 2, bits[23:16] contain the ratio */
+			if (tdp_ctrl)
+				tdp_ratio >>= 16;
+			tdp_ratio &= 0xff; /* ratios are only 8 bits long */
 			if (tdp_ratio - 1 == tar) {
 				max_pstate = tar;
 				pr_debug("max_pstate=TAC %x\n", max_pstate);

drivers/edac/i7core_edac.c+1−1

@@ -1866,7 +1866,7 @@ static int i7core_mce_check_error(struct notifier_block *nb, unsigned long val, · 1865 unmodified lines
1866		1866
1867	i7_dev = get_i7core_dev(mce->socketid);	1867	i7_dev = get_i7core_dev(mce->socketid);
1868	if (!i7_dev)	1868	if (!i7_dev)
1869	return NOTIFY_BAD;	1869	return NOTIFY_DONE;
1870		1870
1871	mci = i7_dev->mci;	1871	mci = i7_dev->mci;
1872	pvt = mci->pvt_info;	1872	pvt = mci->pvt_info;

drivers/edac/sb_edac.c+1−1

@@ -3168,7 +3168,7 @@ static int sbridge_mce_check_error(struct notifier_block *nb, unsigned long val, · 3167 unmodified lines
3168		3168
3169	mci = get_mci_for_node_id(mce->socketid);	3169	mci = get_mci_for_node_id(mce->socketid);
3170	if (!mci)	3170	if (!mci)
3171	return NOTIFY_BAD;	3171	return NOTIFY_DONE;
3172	pvt = mci->pvt_info;	3172	pvt = mci->pvt_info;
3173		3173
3174	/*	3174	/*

drivers/firmware/efi/vars.c+26−11

@@ -202,29 +202,44 @@ static const struct variable_validate variable_validate[] = { · 201 unmodified lines
202	{ NULL_GUID, "", NULL },	202	{ NULL_GUID, "", NULL },
203	};	203	};
204		204
		205	/*
		206	* Check if @var_name matches the pattern given in @match_name.
		207	*
		208	* @var_name: an array of @len non-NUL characters.
		209	* @match_name: a NUL-terminated pattern string, optionally ending in "*". A
		210	* final "*" character matches any trailing characters @var_name,
		211	* including the case when there are none left in @var_name.
		212	* @match: on output, the number of non-wildcard characters in @match_name
		213	* that @var_name matches, regardless of the return value.
		214	* @return: whether @var_name fully matches @match_name.
		215	*/
205	static bool	216	static bool
206	variable_matches(const char var_name, size_t len, const char match_name,	217	variable_matches(const char var_name, size_t len, const char match_name,
207	int *match)	218	int *match)
208	{	219	{
209	for (match = 0; ; (match)++) {	220	for (match = 0; ; (match)++) {
210	char c = match_name[*match];	221	char c = match_name[*match];
211	char u = var_name[*match];
212		222
213	/* Wildcard in the matching name means we've matched */	223	switch (c) {
214	if (c == '*')	224	case '*':
		225	/* Wildcard in @match_name means we've matched. */
215	return true;	226	return true;
216		227
217	/* Case sensitive match */	228	case '\0':
218	if (!c && *match == len)	229	/* @match_name has ended. Has @var_name too? */
219	return true;	230	return (*match == len);
220		231
221	if (c != u)	232	default:
		233	/*
		234	* We've reached a non-wildcard char in @match_name.
		235	* Continue only if there's an identical character in
		236	* @var_name.
		237	*/
		238	if (match < len && c == var_name[match])
		239	continue;
222	return false;	240	return false;
223		241	}
224	if (!c)
225	return true;
226	}	242	}
227	return true;
228	}	243	}
229		244
230	bool	245	bool

drivers/gpio/gpio-rcar.c+6−59

@@ -196,44 +196,6 @@ static int gpio_rcar_irq_set_wake(struct irq_data *d, unsigned int on) · 195 unmodified lines
196	return 0;	196	return 0;
197	}	197	}
198		198
199	static void gpio_rcar_irq_bus_lock(struct irq_data *d)
200	{
201	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
202	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
203
204	pm_runtime_get_sync(&p->pdev->dev);
205	}
206
207	static void gpio_rcar_irq_bus_sync_unlock(struct irq_data *d)
208	{
209	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
210	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
211
212	pm_runtime_put(&p->pdev->dev);
213	}
214
215
216	static int gpio_rcar_irq_request_resources(struct irq_data *d)
217	{
218	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
219	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
220	int error;
221
222	error = pm_runtime_get_sync(&p->pdev->dev);
223	if (error < 0)
224	return error;
225
226	return 0;
227	}
228
229	static void gpio_rcar_irq_release_resources(struct irq_data *d)
230	{
231	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
232	struct gpio_rcar_priv *p = gpiochip_get_data(gc);
233
234	pm_runtime_put(&p->pdev->dev);
235	}
236
237	static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)	199	static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
238	{	200	{
239	struct gpio_rcar_priv *p = dev_id;	201	struct gpio_rcar_priv *p = dev_id;
@@ -280,32 +242,18 @@ static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, · 40 unmodified lines
280		242
281	static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)	243	static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
282	{	244	{
283	struct gpio_rcar_priv *p = gpiochip_get_data(chip);	245	return pinctrl_request_gpio(chip->base + offset);
284	int error;
285
286	error = pm_runtime_get_sync(&p->pdev->dev);
287	if (error < 0)
288	return error;
289
290	error = pinctrl_request_gpio(chip->base + offset);
291	if (error)
292	pm_runtime_put(&p->pdev->dev);
293
294	return error;
295	}	246	}
296		247
297	static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)	248	static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
298	{	249	{
299	struct gpio_rcar_priv *p = gpiochip_get_data(chip);
300
301	pinctrl_free_gpio(chip->base + offset);	250	pinctrl_free_gpio(chip->base + offset);
302		251
303	/* Set the GPIO as an input to ensure that the next GPIO request won't	252	/*
		253	* Set the GPIO as an input to ensure that the next GPIO request won't
304	* drive the GPIO pin as an output.	254	* drive the GPIO pin as an output.
305	*/	255	*/
306	gpio_rcar_config_general_input_output_mode(chip, offset, false);	256	gpio_rcar_config_general_input_output_mode(chip, offset, false);
307
308	pm_runtime_put(&p->pdev->dev);
309	}	257	}
310		258
311	static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)	259	static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
@@ -452,6 +400,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) · 140 unmodified lines
452	}	400	}
453		401
454	pm_runtime_enable(dev);	402	pm_runtime_enable(dev);
		403	pm_runtime_get_sync(dev);
455		404
456	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);	405	io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
457	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);	406	irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
@@ -488,10 +437,6 @@ static int gpio_rcar_probe(struct platform_device *pdev) · 30 unmodified lines
488	irq_chip->irq_unmask = gpio_rcar_irq_enable;	437	irq_chip->irq_unmask = gpio_rcar_irq_enable;
489	irq_chip->irq_set_type = gpio_rcar_irq_set_type;	438	irq_chip->irq_set_type = gpio_rcar_irq_set_type;
490	irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;	439	irq_chip->irq_set_wake = gpio_rcar_irq_set_wake;
491	irq_chip->irq_bus_lock = gpio_rcar_irq_bus_lock;
492	irq_chip->irq_bus_sync_unlock = gpio_rcar_irq_bus_sync_unlock;
493	irq_chip->irq_request_resources = gpio_rcar_irq_request_resources;
494	irq_chip->irq_release_resources = gpio_rcar_irq_release_resources;
495	irq_chip->flags = IRQCHIP_SET_TYPE_MASKED \| IRQCHIP_MASK_ON_SUSPEND;	440	irq_chip->flags = IRQCHIP_SET_TYPE_MASKED \| IRQCHIP_MASK_ON_SUSPEND;
496		441
497	ret = gpiochip_add_data(gpio_chip, p);	442	ret = gpiochip_add_data(gpio_chip, p);
@@ -522,6 +467,7 @@ static int gpio_rcar_probe(struct platform_device *pdev) · 24 unmodified lines
522	err1:	467	err1:
523	gpiochip_remove(gpio_chip);	468	gpiochip_remove(gpio_chip);
524	err0:	469	err0:
		470	pm_runtime_put(dev);
525	pm_runtime_disable(dev);	471	pm_runtime_disable(dev);
526	return ret;	472	return ret;
527	}	473	}
@@ -532,6 +478,7 @@ static int gpio_rcar_remove(struct platform_device *pdev) · 4 unmodified lines
532		478
533	gpiochip_remove(&p->gpio_chip);	479	gpiochip_remove(&p->gpio_chip);
534		480
		481	pm_runtime_put(&pdev->dev);
535	pm_runtime_disable(&pdev->dev);	482	pm_runtime_disable(&pdev->dev);
536	return 0;	483	return 0;
537	}	484	}

drivers/gpio/gpiolib-acpi.c+1−1

@@ -977,7 +977,7 @@ bool acpi_can_fallback_to_crs(struct acpi_device adev, const char con_id) · 976 unmodified lines
977	lookup = kmalloc(sizeof(*lookup), GFP_KERNEL);	977	lookup = kmalloc(sizeof(*lookup), GFP_KERNEL);
978	if (lookup) {	978	if (lookup) {
979	lookup->adev = adev;	979	lookup->adev = adev;
980	lookup->con_id = con_id;	980	lookup->con_id = kstrdup(con_id, GFP_KERNEL);
981	list_add_tail(&lookup->node, &acpi_crs_lookup_list);	981	list_add_tail(&lookup->node, &acpi_crs_lookup_list);
982	}	982	}
983	}	983	}

drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c+7−4

 	return amdgpu_atpx_priv.atpx_detected;
 }
-bool amdgpu_has_atpx_dgpu_power_cntl(void) {
-	return amdgpu_atpx_priv.atpx.functions.power_cntl;
-}
 /**
  * amdgpu_atpx_call - call an ATPX method
  *
  */
 static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
 {
+	/* make sure required functions are enabled */
+	/* dGPU power control is required */
+	if (atpx->functions.power_cntl == false) {
+		printk("ATPX dGPU power cntl not present, forcing\n");
+		atpx->functions.power_cntl = true;
+	}
 	if (atpx->functions.px_params) {
 		union acpi_object *info;
 		struct atpx_px_params output;

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c+1−7

 	"LAST",
 };
-#if defined(CONFIG_VGA_SWITCHEROO)
-bool amdgpu_has_atpx_dgpu_power_cntl(void);
-#else
-static inline bool amdgpu_has_atpx_dgpu_power_cntl(void) { return false; }
-#endif
 bool amdgpu_device_is_px(struct drm_device *dev)
 {
 	struct amdgpu_device *adev = dev->dev_private;
 	if (amdgpu_runtime_pm == 1)
 		runtime = true;
-	if (amdgpu_device_is_px(ddev) && amdgpu_has_atpx_dgpu_power_cntl())
+	if (amdgpu_device_is_px(ddev))
 		runtime = true;
 	vga_switcheroo_register_client(adev->pdev, &amdgpu_switcheroo_ops, runtime);
 	if (runtime)

drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c+4−1

 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-	return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
+		return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	else
+		return 0;
 }
 static int gmc_v7_0_sw_init(void *handle)

drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c+4−1

 {
 	struct amdgpu_device *adev = (struct amdgpu_device *)handle;
-	return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	if (amdgpu_vm_fault_stop != AMDGPU_VM_FAULT_STOP_ALWAYS)
+		return amdgpu_irq_get(adev, &adev->mc.vm_fault, 0);
+	else
+		return 0;
 }
 #define mmMC_SEQ_MISC0_FIJI 0xA71

drivers/gpu/drm/drm_dp_mst_topology.c+20−0

 		req_payload.start_slot = cur_slots;
 		if (mgr->proposed_vcpis[i]) {
 			port = container_of(mgr->proposed_vcpis[i], struct drm_dp_mst_port, vcpi);
+			port = drm_dp_get_validated_port_ref(mgr, port);
+			if (!port) {
+				mutex_unlock(&mgr->payload_lock);
+				return -EINVAL;
+			}
 			req_payload.num_slots = mgr->proposed_vcpis[i]->num_slots;
 			req_payload.vcpi = mgr->proposed_vcpis[i]->vcpi;
 		} else {
 			mgr->payloads[i].payload_state = req_payload.payload_state;
 		}
 		cur_slots += req_payload.num_slots;
+		if (port)
+			drm_dp_put_port(port);
 	}
 	for (i = 0; i < mgr->max_payloads; i++) {
 	if (mgr->mst_primary) {
 		int sret;
+		u8 guid[16];
 		sret = drm_dp_dpcd_read(mgr->aux, DP_DPCD_REV, mgr->dpcd, DP_RECEIVER_CAP_SIZE);
 		if (sret != DP_RECEIVER_CAP_SIZE) {
 			DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
 			ret = -1;
 			goto out_unlock;
 		}
+		/* Some hubs forget their guids after they resume */
+		sret = drm_dp_dpcd_read(mgr->aux, DP_GUID, guid, 16);
+		if (sret != 16) {
+			DRM_DEBUG_KMS("dpcd read failed - undocked during suspend?\n");
+			ret = -1;
+			goto out_unlock;
+		}
+		drm_dp_check_mstb_guid(mgr->mst_primary, guid);
 		ret = 0;
 	} else
 		ret = -1;

drivers/gpu/drm/etnaviv/etnaviv_gpu.c+18−13

 		goto fail;
 	}
+	/*
+	 * Set the GPU linear window to be at the end of the DMA window, where
+	 * the CMA area is likely to reside. This ensures that we are able to
+	 * map the command buffers while having the linear window overlap as
+	 * much RAM as possible, so we can optimize mappings for other buffers.
+	 *
+	 * For 3D cores only do this if MC2.0 is present, as with MC1.0 it leads
+	 * to different views of the memory on the individual engines.
+	 */
+	if (!(gpu->identity.features & chipFeatures_PIPE_3D) ||
+	    (gpu->identity.minor_features0 & chipMinorFeatures0_MC20)) {
+		u32 dma_mask = (u32)dma_get_required_mask(gpu->dev);
+		if (dma_mask < PHYS_OFFSET + SZ_2G)
+			gpu->memory_base = PHYS_OFFSET;
+		else
+			gpu->memory_base = dma_mask - SZ_2G + 1;
+	}
 	ret = etnaviv_hw_reset(gpu);
 	if (ret)
 		goto fail;
 {
 	struct device *dev = &pdev->dev;
 	struct etnaviv_gpu *gpu;
-	u32 dma_mask;
 	int err = 0;
 	gpu = devm_kzalloc(dev, sizeof(*gpu), GFP_KERNEL);
 	gpu->dev = &pdev->dev;
 	mutex_init(&gpu->lock);
-	/*
-	 * Set the GPU linear window to be at the end of the DMA window, where
-	 * the CMA area is likely to reside. This ensures that we are able to
-	 * map the command buffers while having the linear window overlap as
-	 * much RAM as possible, so we can optimize mappings for other buffers.
-	 */
-	dma_mask = (u32)dma_get_required_mask(dev);
-	if (dma_mask < PHYS_OFFSET + SZ_2G)
-		gpu->memory_base = PHYS_OFFSET;
-	else
-		gpu->memory_base = dma_mask - SZ_2G + 1;
 	/* Map registers: */
 	gpu->mmio = etnaviv_ioremap(pdev, NULL, dev_name(gpu->dev));
 	if (IS_ERR(gpu->mmio))

drivers/gpu/drm/radeon/evergreen.c+153−1

@@ -2608,10 +2608,152 @@ static void evergreen_agp_enable(struct radeon_device *rdev) · 2607 unmodified lines
2608	WREG32(VM_CONTEXT1_CNTL, 0);	2608	WREG32(VM_CONTEXT1_CNTL, 0);
2609	}	2609	}
2610		2610
		2611	static const unsigned ni_dig_offsets[] =
		2612	{
		2613	NI_DIG0_REGISTER_OFFSET,
		2614	NI_DIG1_REGISTER_OFFSET,
		2615	NI_DIG2_REGISTER_OFFSET,
		2616	NI_DIG3_REGISTER_OFFSET,
		2617	NI_DIG4_REGISTER_OFFSET,
		2618	NI_DIG5_REGISTER_OFFSET
		2619	};
		2620
		2621	static const unsigned ni_tx_offsets[] =
		2622	{
		2623	NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1,
		2624	NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1,
		2625	NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1,
		2626	NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1,
		2627	NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1,
		2628	NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1
		2629	};
		2630
		2631	static const unsigned evergreen_dp_offsets[] =
		2632	{
		2633	EVERGREEN_DP0_REGISTER_OFFSET,
		2634	EVERGREEN_DP1_REGISTER_OFFSET,
		2635	EVERGREEN_DP2_REGISTER_OFFSET,
		2636	EVERGREEN_DP3_REGISTER_OFFSET,
		2637	EVERGREEN_DP4_REGISTER_OFFSET,
		2638	EVERGREEN_DP5_REGISTER_OFFSET
		2639	};
		2640
		2641
		2642	/*
		2643	* Assumption is that EVERGREEN_CRTC_MASTER_EN enable for requested crtc
		2644	* We go from crtc to connector and it is not relible since it
		2645	* should be an opposite direction .If crtc is enable then
		2646	* find the dig_fe which selects this crtc and insure that it enable.
		2647	* if such dig_fe is found then find dig_be which selects found dig_be and
		2648	* insure that it enable and in DP_SST mode.
		2649	* if UNIPHY_PLL_CONTROL1.enable then we should disconnect timing
		2650	* from dp symbols clocks .
		2651	*/
		2652	static bool evergreen_is_dp_sst_stream_enabled(struct radeon_device *rdev,
		2653	unsigned crtc_id, unsigned *ret_dig_fe)
		2654	{
		2655	unsigned i;
		2656	unsigned dig_fe;
		2657	unsigned dig_be;
		2658	unsigned dig_en_be;
		2659	unsigned uniphy_pll;
		2660	unsigned digs_fe_selected;
		2661	unsigned dig_be_mode;
		2662	unsigned dig_fe_mask;
		2663	bool is_enabled = false;
		2664	bool found_crtc = false;
		2665
		2666	/* loop through all running dig_fe to find selected crtc */
		2667	for (i = 0; i < ARRAY_SIZE(ni_dig_offsets); i++) {
		2668	dig_fe = RREG32(NI_DIG_FE_CNTL + ni_dig_offsets[i]);
		2669	if (dig_fe & NI_DIG_FE_CNTL_SYMCLK_FE_ON &&
		2670	crtc_id == NI_DIG_FE_CNTL_SOURCE_SELECT(dig_fe)) {
		2671	/* found running pipe */
		2672	found_crtc = true;
		2673	dig_fe_mask = 1 << i;
		2674	dig_fe = i;
		2675	break;
		2676	}
		2677	}
		2678
		2679	if (found_crtc) {
		2680	/* loop through all running dig_be to find selected dig_fe */
		2681	for (i = 0; i < ARRAY_SIZE(ni_dig_offsets); i++) {
		2682	dig_be = RREG32(NI_DIG_BE_CNTL + ni_dig_offsets[i]);
		2683	/* if dig_fe_selected by dig_be? */
		2684	digs_fe_selected = NI_DIG_BE_CNTL_FE_SOURCE_SELECT(dig_be);
		2685	dig_be_mode = NI_DIG_FE_CNTL_MODE(dig_be);
		2686	if (dig_fe_mask & digs_fe_selected &&
		2687	/* if dig_be in sst mode? */
		2688	dig_be_mode == NI_DIG_BE_DPSST) {
		2689	dig_en_be = RREG32(NI_DIG_BE_EN_CNTL +
		2690	ni_dig_offsets[i]);
		2691	uniphy_pll = RREG32(NI_DCIO_UNIPHY0_PLL_CONTROL1 +
		2692	ni_tx_offsets[i]);
		2693	/* dig_be enable and tx is running */
		2694	if (dig_en_be & NI_DIG_BE_EN_CNTL_ENABLE &&
		2695	dig_en_be & NI_DIG_BE_EN_CNTL_SYMBCLK_ON &&
		2696	uniphy_pll & NI_DCIO_UNIPHY0_PLL_CONTROL1_ENABLE) {
		2697	is_enabled = true;
		2698	*ret_dig_fe = dig_fe;
		2699	break;
		2700	}
		2701	}
		2702	}
		2703	}
		2704
		2705	return is_enabled;
		2706	}
		2707
		2708	/*
		2709	* Blank dig when in dp sst mode
		2710	* Dig ignores crtc timing
		2711	*/
		2712	static void evergreen_blank_dp_output(struct radeon_device *rdev,
		2713	unsigned dig_fe)
		2714	{
		2715	unsigned stream_ctrl;
		2716	unsigned fifo_ctrl;
		2717	unsigned counter = 0;
		2718
		2719	if (dig_fe >= ARRAY_SIZE(evergreen_dp_offsets)) {
		2720	DRM_ERROR("invalid dig_fe %d\n", dig_fe);
		2721	return;
		2722	}
		2723
		2724	stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2725	evergreen_dp_offsets[dig_fe]);
		2726	if (!(stream_ctrl & EVERGREEN_DP_VID_STREAM_CNTL_ENABLE)) {
		2727	DRM_ERROR("dig %d , should be enable\n", dig_fe);
		2728	return;
		2729	}
		2730
		2731	stream_ctrl &=~EVERGREEN_DP_VID_STREAM_CNTL_ENABLE;
		2732	WREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2733	evergreen_dp_offsets[dig_fe], stream_ctrl);
		2734
		2735	stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2736	evergreen_dp_offsets[dig_fe]);
		2737	while (counter < 32 && stream_ctrl & EVERGREEN_DP_VID_STREAM_STATUS) {
		2738	msleep(1);
		2739	counter++;
		2740	stream_ctrl = RREG32(EVERGREEN_DP_VID_STREAM_CNTL +
		2741	evergreen_dp_offsets[dig_fe]);
		2742	}
		2743	if (counter >= 32 )
		2744	DRM_ERROR("counter exceeds %d\n", counter);
		2745
		2746	fifo_ctrl = RREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe]);
		2747	fifo_ctrl \|= EVERGREEN_DP_STEER_FIFO_RESET;
		2748	WREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe], fifo_ctrl);
		2749
		2750	}
		2751
2611	void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save save)	2752	void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save save)
2612	{	2753	{
2613	u32 crtc_enabled, tmp, frame_count, blackout;	2754	u32 crtc_enabled, tmp, frame_count, blackout;
2614	int i, j;	2755	int i, j;
		2756	unsigned dig_fe;
2615		2757
2616	if (!ASIC_IS_NODCE(rdev)) {	2758	if (!ASIC_IS_NODCE(rdev)) {
2617	save->vga_render_control = RREG32(VGA_RENDER_CONTROL);	2759	save->vga_render_control = RREG32(VGA_RENDER_CONTROL);
@@ -2651,7 +2793,17 @@ void evergreen_mc_stop(struct radeon_device rdev, struct evergreen_mc_save sav · 33 unmodified lines
2651	break;	2793	break;
2652	udelay(1);	2794	udelay(1);
2653	}	2795	}
2654		2796	/we should disable dig if it drives dp sst/
		2797	/but we are in radeon_device_init and the topology is unknown/
		2798	/and it is available after radeon_modeset_init/
		2799	/the following method radeon_atom_encoder_dpms_dig/
		2800	/does the job if we initialize it properly/
		2801	/for now we do it this manually/
		2802	/**/
		2803	if (ASIC_IS_DCE5(rdev) &&
		2804	evergreen_is_dp_sst_stream_enabled(rdev, i ,&dig_fe))
		2805	evergreen_blank_dp_output(rdev, dig_fe);
		2806	/we could remove 6 lines below/
2655	/* XXX this is a hack to avoid strange behavior with EFI on certain systems */	2807	/* XXX this is a hack to avoid strange behavior with EFI on certain systems */
2656	WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);	2808	WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2657	tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);	2809	tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

drivers/gpu/drm/radeon/evergreen_reg.h+46−0

@@ -250,8 +250,43 @@ · 249 unmodified lines
250		250
251	/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */	251	/* HDMI blocks at 0x7030, 0x7c30, 0x10830, 0x11430, 0x12030, 0x12c30 */
252	#define EVERGREEN_HDMI_BASE 0x7030	252	#define EVERGREEN_HDMI_BASE 0x7030
		253	/DIG block/
		254	#define NI_DIG0_REGISTER_OFFSET (0x7000 - 0x7000)
		255	#define NI_DIG1_REGISTER_OFFSET (0x7C00 - 0x7000)
		256	#define NI_DIG2_REGISTER_OFFSET (0x10800 - 0x7000)
		257	#define NI_DIG3_REGISTER_OFFSET (0x11400 - 0x7000)
		258	#define NI_DIG4_REGISTER_OFFSET (0x12000 - 0x7000)
		259	#define NI_DIG5_REGISTER_OFFSET (0x12C00 - 0x7000)
		260
		261
		262	#define NI_DIG_FE_CNTL 0x7000
		263	# define NI_DIG_FE_CNTL_SOURCE_SELECT(x) ((x) & 0x3)
		264	# define NI_DIG_FE_CNTL_SYMCLK_FE_ON (1<<24)
		265
		266
		267	#define NI_DIG_BE_CNTL 0x7140
		268	# define NI_DIG_BE_CNTL_FE_SOURCE_SELECT(x) (((x) >> 8 ) & 0x3F)
		269	# define NI_DIG_FE_CNTL_MODE(x) (((x) >> 16) & 0x7 )
		270
		271	#define NI_DIG_BE_EN_CNTL 0x7144
		272	# define NI_DIG_BE_EN_CNTL_ENABLE (1 << 0)
		273	# define NI_DIG_BE_EN_CNTL_SYMBCLK_ON (1 << 8)
		274	# define NI_DIG_BE_DPSST 0
253		275
254	/* Display Port block */	276	/* Display Port block */
		277	#define EVERGREEN_DP0_REGISTER_OFFSET (0x730C - 0x730C)
		278	#define EVERGREEN_DP1_REGISTER_OFFSET (0x7F0C - 0x730C)
		279	#define EVERGREEN_DP2_REGISTER_OFFSET (0x10B0C - 0x730C)
		280	#define EVERGREEN_DP3_REGISTER_OFFSET (0x1170C - 0x730C)
		281	#define EVERGREEN_DP4_REGISTER_OFFSET (0x1230C - 0x730C)
		282	#define EVERGREEN_DP5_REGISTER_OFFSET (0x12F0C - 0x730C)
		283
		284
		285	#define EVERGREEN_DP_VID_STREAM_CNTL 0x730C
		286	# define EVERGREEN_DP_VID_STREAM_CNTL_ENABLE (1 << 0)
		287	# define EVERGREEN_DP_VID_STREAM_STATUS (1 <<16)
		288	#define EVERGREEN_DP_STEER_FIFO 0x7310
		289	# define EVERGREEN_DP_STEER_FIFO_RESET (1 << 0)
255	#define EVERGREEN_DP_SEC_CNTL 0x7280	290	#define EVERGREEN_DP_SEC_CNTL 0x7280
256	# define EVERGREEN_DP_SEC_STREAM_ENABLE (1 << 0)	291	# define EVERGREEN_DP_SEC_STREAM_ENABLE (1 << 0)
257	# define EVERGREEN_DP_SEC_ASP_ENABLE (1 << 4)	292	# define EVERGREEN_DP_SEC_ASP_ENABLE (1 << 4)
@@ -266,4 +301,15 @@ · 8 unmodified lines
266	# define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24)	301	# define EVERGREEN_DP_SEC_N_BASE_MULTIPLE(x) (((x) & 0xf) << 24)
267	# define EVERGREEN_DP_SEC_SS_EN (1 << 28)	302	# define EVERGREEN_DP_SEC_SS_EN (1 << 28)
268		303
		304	/DCIO_UNIPHY block/
		305	#define NI_DCIO_UNIPHY0_UNIPHY_TX_CONTROL1 (0x6600 -0x6600)
		306	#define NI_DCIO_UNIPHY1_UNIPHY_TX_CONTROL1 (0x6640 -0x6600)
		307	#define NI_DCIO_UNIPHY2_UNIPHY_TX_CONTROL1 (0x6680 - 0x6600)
		308	#define NI_DCIO_UNIPHY3_UNIPHY_TX_CONTROL1 (0x66C0 - 0x6600)
		309	#define NI_DCIO_UNIPHY4_UNIPHY_TX_CONTROL1 (0x6700 - 0x6600)
		310	#define NI_DCIO_UNIPHY5_UNIPHY_TX_CONTROL1 (0x6740 - 0x6600)
		311
		312	#define NI_DCIO_UNIPHY0_PLL_CONTROL1 0x6618
		313	# define NI_DCIO_UNIPHY0_PLL_CONTROL1_ENABLE (1 << 0)
		314
269	#endif	315	#endif

drivers/gpu/drm/ttm/ttm_bo.c+4−13

 void ttm_bo_move_to_lru_tail(struct ttm_buffer_object *bo)
 {
-	struct ttm_bo_device *bdev = bo->bdev;
+	int put_count = 0;
-	struct ttm_mem_type_manager *man;
 	lockdep_assert_held(&bo->resv->lock.base);
-	if (bo->mem.placement & TTM_PL_FLAG_NO_EVICT) {
+	put_count = ttm_bo_del_from_lru(bo);
-		list_del_init(&bo->swap);
+	ttm_bo_list_ref_sub(bo, put_count, true);
-		list_del_init(&bo->lru);
+	ttm_bo_add_to_lru(bo);
-	} else {
-		if (bo->ttm && !(bo->ttm->page_flags & TTM_PAGE_FLAG_SG))
-			list_move_tail(&bo->swap, &bo->glob->swap_lru);
-		man = &bdev->man[bo->mem.mem_type];
-		list_move_tail(&bo->lru, &man->lru);
-	}
 }
 EXPORT_SYMBOL(ttm_bo_move_to_lru_tail);

drivers/gpu/drm/virtio/virtgpu_display.c+12−0

@@ -267,11 +267,23 @@ static int virtio_gpu_crtc_atomic_check(struct drm_crtc *crtc, · 266 unmodified lines
267	return 0;	267	return 0;
268	}	268	}
269		269
		270	static void virtio_gpu_crtc_atomic_flush(struct drm_crtc *crtc,
		271	struct drm_crtc_state *old_state)
		272	{
		273	unsigned long flags;
		274
		275	spin_lock_irqsave(&crtc->dev->event_lock, flags);
		276	if (crtc->state->event)
		277	drm_crtc_send_vblank_event(crtc, crtc->state->event);
		278	spin_unlock_irqrestore(&crtc->dev->event_lock, flags);
		279	}
		280
270	static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {	281	static const struct drm_crtc_helper_funcs virtio_gpu_crtc_helper_funcs = {
271	.enable = virtio_gpu_crtc_enable,	282	.enable = virtio_gpu_crtc_enable,
272	.disable = virtio_gpu_crtc_disable,	283	.disable = virtio_gpu_crtc_disable,
273	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,	284	.mode_set_nofb = virtio_gpu_crtc_mode_set_nofb,
274	.atomic_check = virtio_gpu_crtc_atomic_check,	285	.atomic_check = virtio_gpu_crtc_atomic_check,
		286	.atomic_flush = virtio_gpu_crtc_atomic_flush,
275	};	287	};
276		288
277	static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,	289	static void virtio_gpu_enc_mode_set(struct drm_encoder *encoder,

drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c+5−5

@@ -3293,19 +3293,19 @@ static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = { · 3292 unmodified lines
3293	&vmw_cmd_dx_cid_check, true, false, true),	3293	&vmw_cmd_dx_cid_check, true, false, true),
3294	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,	3294	VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
3295	true, false, true),	3295	true, false, true),
3296	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_ok,	3296	VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
3297	true, false, true),	3297	true, false, true),
3298	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,	3298	VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
3299	true, false, true),	3299	true, false, true),
3300	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,	3300	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
3301	&vmw_cmd_ok, true, false, true),	3301	&vmw_cmd_dx_cid_check, true, false, true),
3302	VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_ok,	3302	VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
3303	true, false, true),	3303	true, false, true),
3304	VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_ok,	3304	VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
3305	true, false, true),	3305	true, false, true),
3306	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,	3306	VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
3307	true, false, true),	3307	true, false, true),
3308	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_invalid,	3308	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
3309	true, false, true),	3309	true, false, true),
3310	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,	3310	VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
3311	true, false, true),	3311	true, false, true),

drivers/gpu/drm/vmwgfx/vmwgfx_fb.c+3−3

@@ -573,9 +573,9 @@ static int vmw_fb_set_par(struct fb_info *info) · 572 unmodified lines
573	mode = old_mode;	573	mode = old_mode;
574	old_mode = NULL;	574	old_mode = NULL;
575	} else if (!vmw_kms_validate_mode_vram(vmw_priv,	575	} else if (!vmw_kms_validate_mode_vram(vmw_priv,
576	mode->hdisplay *	576	mode->hdisplay *
577	(var->bits_per_pixel + 7) / 8,	577	DIV_ROUND_UP(var->bits_per_pixel, 8),
578	mode->vdisplay)) {	578	mode->vdisplay)) {
579	drm_mode_destroy(vmw_priv->dev, mode);	579	drm_mode_destroy(vmw_priv->dev, mode);
580	return -EINVAL;	580	return -EINVAL;
581	}	581	}

drivers/hid/hid-ids.h+1−0

@@ -259,6 +259,7 @@ · 258 unmodified lines
259	#define USB_DEVICE_ID_CORSAIR_K90 0x1b02	259	#define USB_DEVICE_ID_CORSAIR_K90 0x1b02
260		260
261	#define USB_VENDOR_ID_CREATIVELABS 0x041e	261	#define USB_VENDOR_ID_CREATIVELABS 0x041e
		262	#define USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51 0x322c
262	#define USB_DEVICE_ID_PRODIKEYS_PCMIDI 0x2801	263	#define USB_DEVICE_ID_PRODIKEYS_PCMIDI 0x2801
263		264
264	#define USB_VENDOR_ID_CVTOUCH 0x1ff7	265	#define USB_VENDOR_ID_CVTOUCH 0x1ff7

drivers/hid/usbhid/hid-quirks.c+1−0

@@ -71,6 +71,7 @@ static const struct hid_blacklist { · 70 unmodified lines
71	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET },	71	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET },
72	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_AXIS_295, HID_QUIRK_NOGET },	72	{ USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_AXIS_295, HID_QUIRK_NOGET },
73	{ USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE, HID_QUIRK_ALWAYS_POLL },	73	{ USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE, HID_QUIRK_ALWAYS_POLL },
		74	{ USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51, HID_QUIRK_NOGET },
74	{ USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },	75	{ USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC, HID_QUIRK_NOGET },
75	{ USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_WIIU, HID_QUIRK_MULTI_INPUT },	76	{ USB_VENDOR_ID_DRAGONRISE, USB_DEVICE_ID_DRAGONRISE_WIIU, HID_QUIRK_MULTI_INPUT },
76	{ USB_VENDOR_ID_ELAN, HID_ANY_ID, HID_QUIRK_ALWAYS_POLL },	77	{ USB_VENDOR_ID_ELAN, HID_ANY_ID, HID_QUIRK_ALWAYS_POLL },

drivers/hid/wacom_wac.c+6−0

 		wacom->tool[idx] = wacom_intuos_get_tool_type(wacom->id[idx]);
+		wacom->shared->stylus_in_proximity = true;
 		return 1;
 	}
 	{ "Wacom Intuos PT M 2", 21600, 13500, 2047, 63,
 	  INTUOSHT2, WACOM_INTUOS_RES, WACOM_INTUOS_RES, .touch_max = 16,
 	  .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE };
+static const struct wacom_features wacom_features_0x343 =
+	{ "Wacom DTK1651", 34616, 19559, 1023, 0,
+	  DTUS, WACOM_INTUOS_RES, WACOM_INTUOS_RES, 4,
+	  WACOM_DTU_OFFSET, WACOM_DTU_OFFSET };
 static const struct wacom_features wacom_features_HID_ANY_ID =
 	{ "Wacom HID", .type = HID_GENERIC };
 	{ USB_DEVICE_WACOM(0x33C) },
 	{ USB_DEVICE_WACOM(0x33D) },
 	{ USB_DEVICE_WACOM(0x33E) },
+	{ USB_DEVICE_WACOM(0x343) },
 	{ USB_DEVICE_WACOM(0x4001) },
 	{ USB_DEVICE_WACOM(0x4004) },
 	{ USB_DEVICE_WACOM(0x5000) },

drivers/i2c/busses/Kconfig+2−2

@@ -975,10 +975,10 @@ config I2C_XLR · 974 unmodified lines
975		975
976	config I2C_XLP9XX	976	config I2C_XLP9XX
977	tristate "XLP9XX I2C support"	977	tristate "XLP9XX I2C support"
978	depends on CPU_XLP \|\| COMPILE_TEST	978	depends on CPU_XLP \|\| ARCH_VULCAN \|\| COMPILE_TEST
979	help	979	help
980	This driver enables support for the on-chip I2C interface of	980	This driver enables support for the on-chip I2C interface of
981	the Broadcom XLP9xx/XLP5xx MIPS processors.	981	the Broadcom XLP9xx/XLP5xx MIPS and Vulcan ARM64 processors.
982		982
983	This driver can also be built as a module. If so, the module will	983	This driver can also be built as a module. If so, the module will
984	be called i2c-xlp9xx.	984	be called i2c-xlp9xx.

drivers/i2c/busses/i2c-cpm.c+2−2

@@ -116,8 +116,8 @@ struct cpm_i2c { · 115 unmodified lines
116	cbd_t __iomem *rbase;	116	cbd_t __iomem *rbase;
117	u_char *txbuf[CPM_MAXBD];	117	u_char *txbuf[CPM_MAXBD];
118	u_char *rxbuf[CPM_MAXBD];	118	u_char *rxbuf[CPM_MAXBD];
119	u32 txdma[CPM_MAXBD];	119	dma_addr_t txdma[CPM_MAXBD];
120	u32 rxdma[CPM_MAXBD];	120	dma_addr_t rxdma[CPM_MAXBD];
121	};	121	};
122		122
123	static irqreturn_t cpm_i2c_interrupt(int irq, void *dev_id)	123	static irqreturn_t cpm_i2c_interrupt(int irq, void *dev_id)

drivers/i2c/busses/i2c-exynos5.c+19−5

 		return -EIO;
 	}
-	clk_prepare_enable(i2c->clk);
+	ret = clk_enable(i2c->clk);
+	if (ret)
+		return ret;
 	for (i = 0; i < num; i++, msgs++) {
 		stop = (i == num - 1);
 	}
  out:
-	clk_disable_unprepare(i2c->clk);
+	clk_disable(i2c->clk);
 	return ret;
 }
 		return -ENOENT;
 	}
-	clk_prepare_enable(i2c->clk);
+	ret = clk_prepare_enable(i2c->clk);
+	if (ret)
+		return ret;
 	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	i2c->regs = devm_ioremap_resource(&pdev->dev, mem);
 	platform_set_drvdata(pdev, i2c);
+	clk_disable(i2c->clk);
+	return 0;
  err_clk:
 	clk_disable_unprepare(i2c->clk);
 	return ret;
 	i2c_del_adapter(&i2c->adap);
+	clk_unprepare(i2c->clk);
 	return 0;
 }
 	i2c->suspended = 1;
+	clk_unprepare(i2c->clk);
 	return 0;
 }
 	struct exynos5_i2c *i2c = platform_get_drvdata(pdev);
 	int ret = 0;
-	clk_prepare_enable(i2c->clk);
+	ret = clk_prepare_enable(i2c->clk);
+	if (ret)
+		return ret;
 	ret = exynos5_hsi2c_clock_setup(i2c);
 	if (ret) {
 	}
 	exynos5_i2c_init(i2c);
-	clk_disable_unprepare(i2c->clk);
+	clk_disable(i2c->clk);
 	i2c->suspended = 0;
 	return 0;

drivers/i2c/busses/i2c-ismt.c+2−0

 /* PCI DIDs for the Intel SMBus Message Transport (SMT) Devices */
 #define PCI_DEVICE_ID_INTEL_S1200_SMT0	0x0c59
 #define PCI_DEVICE_ID_INTEL_S1200_SMT1	0x0c5a
+#define PCI_DEVICE_ID_INTEL_DNV_SMT	0x19ac
 #define PCI_DEVICE_ID_INTEL_AVOTON_SMT	0x1f15
 #define ISMT_DESC_ENTRIES	2	/* number of descriptor entries */
 static const struct pci_device_id ismt_ids[] = {
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT0) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_S1200_SMT1) },
+	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_DNV_SMT) },
 	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_AVOTON_SMT) },
 	{ 0, }
 };

drivers/i2c/busses/i2c-rk3x.c+1−0

@@ -855,6 +855,7 @@ static struct rk3x_i2c_soc_data soc_data[3] = { · 854 unmodified lines
855	static const struct of_device_id rk3x_i2c_match[] = {	855	static const struct of_device_id rk3x_i2c_match[] = {
856	{ .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] },	856	{ .compatible = "rockchip,rk3066-i2c", .data = (void *)&soc_data[0] },
857	{ .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] },	857	{ .compatible = "rockchip,rk3188-i2c", .data = (void *)&soc_data[1] },
		858	{ .compatible = "rockchip,rk3228-i2c", .data = (void *)&soc_data[2] },
858	{ .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] },	859	{ .compatible = "rockchip,rk3288-i2c", .data = (void *)&soc_data[2] },
859	{},	860	{},
860	};	861	};

drivers/infiniband/core/cache.c+2−1

@@ -691,7 +691,8 @@ void ib_cache_gid_set_default_gid(struct ib_device *ib_dev, u8 port, · 690 unmodified lines
691	NULL);	691	NULL);
692		692
693	/* Coudn't find default GID location */	693	/* Coudn't find default GID location */
694	WARN_ON(ix < 0);	694	if (WARN_ON(ix < 0))
		695	goto release;
695		696
696	zattr_type.gid_type = gid_type;	697	zattr_type.gid_type = gid_type;
697		698

drivers/infiniband/core/ucm.c+4−0

 #include <asm/uaccess.h>
+#include <rdma/ib.h>
 #include <rdma/ib_cm.h>
 #include <rdma/ib_user_cm.h>
 #include <rdma/ib_marshall.h>
 	struct ib_ucm_cmd_hdr hdr;
 	ssize_t result;
+	if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
+		return -EACCES;
 	if (len < sizeof(hdr))
 		return -EINVAL;

drivers/infiniband/core/ucma.c+3−0

@@ -1574,6 +1574,9 @@ static ssize_t ucma_write(struct file filp, const char __user buf, · 1573 unmodified lines
1574	struct rdma_ucm_cmd_hdr hdr;	1574	struct rdma_ucm_cmd_hdr hdr;
1575	ssize_t ret;	1575	ssize_t ret;
1576		1576
		1577	if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
		1578	return -EACCES;
		1579
1577	if (len < sizeof(hdr))	1580	if (len < sizeof(hdr))
1578	return -EINVAL;	1581	return -EINVAL;
1579		1582

drivers/infiniband/core/uverbs_main.c+5−0

 #include <asm/uaccess.h>
+#include <rdma/ib.h>
 #include "uverbs.h"
 MODULE_AUTHOR("Roland Dreier");
 	int srcu_key;
 	ssize_t ret;
+	if (WARN_ON_ONCE(!ib_safe_file_access(filp)))
+		return -EACCES;
 	if (count < sizeof hdr)
 		return -EINVAL;

drivers/infiniband/core/verbs.c+2−1

@@ -1860,6 +1860,7 @@ EXPORT_SYMBOL(ib_drain_rq); · 1859 unmodified lines
1860	void ib_drain_qp(struct ib_qp *qp)	1860	void ib_drain_qp(struct ib_qp *qp)
1861	{	1861	{
1862	ib_drain_sq(qp);	1862	ib_drain_sq(qp);
1863	ib_drain_rq(qp);	1863	if (!qp->srq)
		1864	ib_drain_rq(qp);
1864	}	1865	}
1865	EXPORT_SYMBOL(ib_drain_qp);	1866	EXPORT_SYMBOL(ib_drain_qp);

drivers/infiniband/hw/cxgb3/iwch_provider.c+2−0

@@ -1390,6 +1390,8 @@ int iwch_register_device(struct iwch_dev *dev) · 1389 unmodified lines
1390	dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;	1390	dev->ibdev.iwcm->add_ref = iwch_qp_add_ref;
1391	dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;	1391	dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref;
1392	dev->ibdev.iwcm->get_qp = iwch_get_qp;	1392	dev->ibdev.iwcm->get_qp = iwch_get_qp;
		1393	memcpy(dev->ibdev.iwcm->ifname, dev->rdev.t3cdev_p->lldev->name,
		1394	sizeof(dev->ibdev.iwcm->ifname));
1393		1395
1394	ret = ib_register_device(&dev->ibdev, NULL);	1396	ret = ib_register_device(&dev->ibdev, NULL);
1395	if (ret)	1397	if (ret)

drivers/infiniband/hw/cxgb4/cq.c+1−1

@@ -162,7 +162,7 @@ static int create_cq(struct c4iw_rdev rdev, struct t4_cq cq, · 161 unmodified lines
162	cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS,	162	cq->bar2_va = c4iw_bar2_addrs(rdev, cq->cqid, T4_BAR2_QTYPE_INGRESS,
163	&cq->bar2_qid,	163	&cq->bar2_qid,
164	user ? &cq->bar2_pa : NULL);	164	user ? &cq->bar2_pa : NULL);
165	if (user && !cq->bar2_va) {	165	if (user && !cq->bar2_pa) {
166	pr_warn(MOD "%s: cqid %u not in BAR2 range.\n",	166	pr_warn(MOD "%s: cqid %u not in BAR2 range.\n",
167	pci_name(rdev->lldi.pdev), cq->cqid);	167	pci_name(rdev->lldi.pdev), cq->cqid);
168	ret = -EINVAL;	168	ret = -EINVAL;

drivers/infiniband/hw/cxgb4/provider.c+2−0

@@ -580,6 +580,8 @@ int c4iw_register_device(struct c4iw_dev *dev) · 579 unmodified lines
580	dev->ibdev.iwcm->add_ref = c4iw_qp_add_ref;	580	dev->ibdev.iwcm->add_ref = c4iw_qp_add_ref;
581	dev->ibdev.iwcm->rem_ref = c4iw_qp_rem_ref;	581	dev->ibdev.iwcm->rem_ref = c4iw_qp_rem_ref;
582	dev->ibdev.iwcm->get_qp = c4iw_get_qp;	582	dev->ibdev.iwcm->get_qp = c4iw_get_qp;
		583	memcpy(dev->ibdev.iwcm->ifname, dev->rdev.lldi.ports[0]->name,
		584	sizeof(dev->ibdev.iwcm->ifname));
583		585
584	ret = ib_register_device(&dev->ibdev, NULL);	586	ret = ib_register_device(&dev->ibdev, NULL);
585	if (ret)	587	if (ret)

drivers/infiniband/hw/cxgb4/qp.c+21−3

 	if (pbar2_pa)
 		*pbar2_pa = (rdev->bar2_pa + bar2_qoffset) & PAGE_MASK;
+	if (is_t4(rdev->lldi.adapter_type))
+		return NULL;
 	return rdev->bar2_kva + bar2_qoffset;
 }
 	/*
 	 * User mode must have bar2 access.
 	 */
-	if (user && (!wq->sq.bar2_va || !wq->rq.bar2_va)) {
+	if (user && (!wq->sq.bar2_pa || !wq->rq.bar2_pa)) {
 		pr_warn(MOD "%s: sqid %u or rqid %u not in BAR2 range.\n",
 			pci_name(rdev->lldi.pdev), wq->sq.qid, wq->rq.qid);
 		goto free_dma;
 void c4iw_drain_sq(struct ib_qp *ibqp)
 {
 	struct c4iw_qp *qp = to_c4iw_qp(ibqp);
+	unsigned long flag;
+	bool need_to_wait;
-	wait_for_completion(&qp->sq_drained);
+	spin_lock_irqsave(&qp->lock, flag);
+	need_to_wait = !t4_sq_empty(&qp->wq);
+	spin_unlock_irqrestore(&qp->lock, flag);
+	if (need_to_wait)
+		wait_for_completion(&qp->sq_drained);
 }
 void c4iw_drain_rq(struct ib_qp *ibqp)
 {
 	struct c4iw_qp *qp = to_c4iw_qp(ibqp);
+	unsigned long flag;
+	bool need_to_wait;
+	spin_lock_irqsave(&qp->lock, flag);
+	need_to_wait = !t4_rq_empty(&qp->wq);
+	spin_unlock_irqrestore(&qp->lock, flag);
-	wait_for_completion(&qp->rq_drained);
+	if (need_to_wait)
+		wait_for_completion(&qp->rq_drained);
 }

drivers/infiniband/hw/mlx5/main.c+1−1

@@ -530,7 +530,7 @@ static int mlx5_ib_query_device(struct ib_device *ibdev, · 529 unmodified lines
530	sizeof(struct mlx5_wqe_ctrl_seg)) /	530	sizeof(struct mlx5_wqe_ctrl_seg)) /
531	sizeof(struct mlx5_wqe_data_seg);	531	sizeof(struct mlx5_wqe_data_seg);
532	props->max_sge = min(max_rq_sg, max_sq_sg);	532	props->max_sge = min(max_rq_sg, max_sq_sg);
533	props->max_sge_rd = props->max_sge;	533	props->max_sge_rd = MLX5_MAX_SGE_RD;
534	props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);	534	props->max_cq = 1 << MLX5_CAP_GEN(mdev, log_max_cq);
535	props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;	535	props->max_cqe = (1 << MLX5_CAP_GEN(mdev, log_max_cq_sz)) - 1;
536	props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);	536	props->max_mr = 1 << MLX5_CAP_GEN(mdev, log_max_mkey);

drivers/infiniband/hw/nes/nes_nic.c+0−3

@@ -498,9 +498,6 @@ static int nes_netdev_start_xmit(struct sk_buff skb, struct net_device netdev) · 497 unmodified lines
498	* skb_shinfo(skb)->nr_frags, skb_is_gso(skb));	498	* skb_shinfo(skb)->nr_frags, skb_is_gso(skb));
499	*/	499	*/
500		500
501	if (!netif_carrier_ok(netdev))
502	return NETDEV_TX_OK;
503
504	if (netif_queue_stopped(netdev))	501	if (netif_queue_stopped(netdev))
505	return NETDEV_TX_BUSY;	502	return NETDEV_TX_BUSY;
506		503

drivers/infiniband/hw/qib/qib_file_ops.c+5−0

 #include <linux/export.h>
 #include <linux/uio.h>
+#include <rdma/ib.h>
 #include "qib.h"
 #include "qib_common.h"
 #include "qib_user_sdma.h"
 	ssize_t ret = 0;
 	void *dest;
+	if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
+		return -EACCES;
 	if (count < sizeof(cmd.type)) {
 		ret = -EINVAL;
 		goto bail;

drivers/infiniband/sw/rdmavt/qp.c+2−2

 	spin_unlock_irqrestore(&qp->s_hlock, flags);
 	if (nreq) {
 		if (call_send)
-			rdi->driver_f.schedule_send_no_lock(qp);
-		else
 			rdi->driver_f.do_send(qp);
+		else
+			rdi->driver_f.schedule_send_no_lock(qp);
 	}
 	return err;
 }

drivers/md/md.c+2−0

@@ -284,6 +284,8 @@ static blk_qc_t md_make_request(struct request_queue q, struct bio bio) · 283 unmodified lines
284	* go away inside make_request	284	* go away inside make_request
285	*/	285	*/
286	sectors = bio_sectors(bio);	286	sectors = bio_sectors(bio);
		287	/* bio could be mergeable after passing to underlayer */
		288	bio->bi_rw &= ~REQ_NOMERGE;
287	mddev->pers->make_request(mddev, bio);	289	mddev->pers->make_request(mddev, bio);
288		290
289	cpu = part_stat_lock();	291	cpu = part_stat_lock();

drivers/md/raid0.c+1−1

 			(unsigned long long)zone_size>>1);
 		zone_start = conf->strip_zone[j].zone_end;
 	}
-	printk(KERN_INFO "\n");
 }
 static int create_strip_zones(struct mddev *mddev, struct r0conf **private_conf)
 	struct r0conf *conf = kzalloc(sizeof(*conf), GFP_KERNEL);
 	unsigned short blksize = 512;
+	*private_conf = ERR_PTR(-ENOMEM);
 	if (!conf)
 		return -ENOMEM;
 	rdev_for_each(rdev1, mddev) {

drivers/md/raid5.c+0−2

@@ -3502,8 +3502,6 @@ returnbi: · 3501 unmodified lines
3502	dev = &sh->dev[i];	3502	dev = &sh->dev[i];
3503	} else if (test_bit(R5_Discard, &dev->flags))	3503	} else if (test_bit(R5_Discard, &dev->flags))
3504	discard_pending = 1;	3504	discard_pending = 1;
3505	WARN_ON(test_bit(R5_SkipCopy, &dev->flags));
3506	WARN_ON(dev->page != dev->orig_page);
3507	}	3505	}
3508		3506
3509	r5l_stripe_write_finished(sh);	3507	r5l_stripe_write_finished(sh);

drivers/media/usb/usbvision/usbvision-video.c+0−7

@@ -1452,13 +1452,6 @@ static int usbvision_probe(struct usb_interface *intf, · 1451 unmodified lines
1452	printk(KERN_INFO "%s: %s found\n", __func__,	1452	printk(KERN_INFO "%s: %s found\n", __func__,
1453	usbvision_device_data[model].model_string);	1453	usbvision_device_data[model].model_string);
1454		1454
1455	/*
1456	* this is a security check.
1457	* an exploit using an incorrect bInterfaceNumber is known
1458	*/
1459	if (ifnum >= USB_MAXINTERFACES \|\| !dev->actconfig->interface[ifnum])
1460	return -ENODEV;
1461
1462	if (usbvision_device_data[model].interface >= 0)	1455	if (usbvision_device_data[model].interface >= 0)
1463	interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0];	1456	interface = &dev->actconfig->interface[usbvision_device_data[model].interface]->altsetting[0];
1464	else if (ifnum < dev->actconfig->desc.bNumInterfaces)	1457	else if (ifnum < dev->actconfig->desc.bNumInterfaces)

drivers/media/v4l2-core/videobuf2-core.c+15−5

  * Will sleep if required for nonblocking == false.
  */
 static int __vb2_get_done_vb(struct vb2_queue *q, struct vb2_buffer **vb,
-				int nonblocking)
+			     void *pb, int nonblocking)
 {
 	unsigned long flags;
 	int ret;
 	/*
 	 * Only remove the buffer from done_list if v4l2_buffer can handle all
 	 * the planes.
-	 * Verifying planes is NOT necessary since it already has been checked
-	 * before the buffer is queued/prepared. So it can never fail.
 	 */
-	list_del(&(*vb)->done_entry);
+	ret = call_bufop(q, verify_planes_array, *vb, pb);
+	if (!ret)
+		list_del(&(*vb)->done_entry);
 	spin_unlock_irqrestore(&q->done_lock, flags);
 	return ret;
 	struct vb2_buffer *vb = NULL;
 	int ret;
-	ret = __vb2_get_done_vb(q, &vb, nonblocking);
+	ret = __vb2_get_done_vb(q, &vb, pb, nonblocking);
 	if (ret < 0)
 		return ret;
 	if (!vb2_is_streaming(q) || q->error)
 		return POLLERR;
+	/*
+	 * If this quirk is set and QBUF hasn't been called yet then
+	 * return POLLERR as well. This only affects capture queues, output
+	 * queues will always initialize waiting_for_buffers to false.
+	 * This quirk is set by V4L2 for backwards compatibility reasons.
+	 */
+	if (q->quirk_poll_must_check_waiting_for_buffers &&
+	    q->waiting_for_buffers && (req_events & (POLLIN | POLLRDNORM)))
+		return POLLERR;
 	/*
 	 * For output streams you can call write() as long as there are fewer
 	 * buffers queued than there are buffers available.

drivers/media/v4l2-core/videobuf2-memops.c+1−1

@@ -49,7 +49,7 @@ struct frame_vector *vb2_create_framevec(unsigned long start, · 48 unmodified lines
49	vec = frame_vector_create(nr);	49	vec = frame_vector_create(nr);
50	if (!vec)	50	if (!vec)
51	return ERR_PTR(-ENOMEM);	51	return ERR_PTR(-ENOMEM);
52	ret = get_vaddr_frames(start, nr, write, 1, vec);	52	ret = get_vaddr_frames(start & PAGE_MASK, nr, write, true, vec);
53	if (ret < 0)	53	if (ret < 0)
54	goto out_destroy;	54	goto out_destroy;
55	/* We accept only complete set of PFNs */	55	/* We accept only complete set of PFNs */

drivers/media/v4l2-core/videobuf2-v4l2.c+12−8

 	return 0;
 }
+static int __verify_planes_array_core(struct vb2_buffer *vb, const void *pb)
+{
+	return __verify_planes_array(vb, pb);
+}
 /**
  * __verify_length() - Verify that the bytesused value for each plane fits in
  * the plane length and that the data offset doesn't exceed the bytesused value.
 }
 static const struct vb2_buf_ops v4l2_buf_ops = {
+	.verify_planes_array	= __verify_planes_array_core,
 	.fill_user_buffer	= __fill_v4l2_buffer,
 	.fill_vb2_buffer	= __fill_vb2_buffer,
 	.copy_timestamp		= __copy_timestamp,
 	q->is_output = V4L2_TYPE_IS_OUTPUT(q->type);
 	q->copy_timestamp = (q->timestamp_flags & V4L2_BUF_FLAG_TIMESTAMP_MASK)
 			== V4L2_BUF_FLAG_TIMESTAMP_COPY;
+	/*
+	 * For compatibility with vb1: if QBUF hasn't been called yet, then
+	 * return POLLERR as well. This only affects capture queues, output
+	 * queues will always initialize waiting_for_buffers to false.
+	 */
+	q->quirk_poll_must_check_waiting_for_buffers = true;
 	return vb2_core_queue_init(q);
 }
 			poll_wait(file, &fh->wait, wait);
 	}
-	/*
-	 * For compatibility with vb1: if QBUF hasn't been called yet, then
-	 * return POLLERR as well. This only affects capture queues, output
-	 * queues will always initialize waiting_for_buffers to false.
-	 */
-	if (q->waiting_for_buffers && (req_events & (POLLIN | POLLRDNORM)))
-		return POLLERR;
 	return res | vb2_core_poll(q, file, wait);
 }
 EXPORT_SYMBOL_GPL(vb2_poll);

drivers/misc/cxl/context.c+7−0

@@ -223,6 +223,13 @@ int __detach_context(struct cxl_context *ctx) · 222 unmodified lines
223	cxl_ops->link_ok(ctx->afu->adapter, ctx->afu));	223	cxl_ops->link_ok(ctx->afu->adapter, ctx->afu));
224	flush_work(&ctx->fault_work); /* Only needed for dedicated process */	224	flush_work(&ctx->fault_work); /* Only needed for dedicated process */
225		225
		226	/*
		227	* Wait until no further interrupts are presented by the PSL
		228	* for this context.
		229	*/
		230	if (cxl_ops->irq_wait)
		231	cxl_ops->irq_wait(ctx);
		232
226	/* release the reference to the group leader and mm handling pid */	233	/* release the reference to the group leader and mm handling pid */
227	put_pid(ctx->pid);	234	put_pid(ctx->pid);
228	put_pid(ctx->glpid);	235	put_pid(ctx->glpid);

drivers/misc/cxl/cxl.h+2−0

 #define CXL_PSL_DSISR_An_PE (1ull << (63-4))  /* PSL Error (implementation specific) */
 #define CXL_PSL_DSISR_An_AE (1ull << (63-5))  /* AFU Error */
 #define CXL_PSL_DSISR_An_OC (1ull << (63-6))  /* OS Context Warning */
+#define CXL_PSL_DSISR_PENDING (CXL_PSL_DSISR_TRANS | CXL_PSL_DSISR_An_PE | CXL_PSL_DSISR_An_AE | CXL_PSL_DSISR_An_OC)
 /* NOTE: Bits 32:63 are undefined if DSISR[DS] = 1 */
 #define CXL_PSL_DSISR_An_M  DSISR_NOHPTE      /* PTE not found */
 #define CXL_PSL_DSISR_An_P  DSISR_PROTFAULT   /* Storage protection violation */
 					u64 dsisr, u64 errstat);
 	irqreturn_t (*psl_interrupt)(int irq, void *data);
 	int (*ack_irq)(struct cxl_context *ctx, u64 tfc, u64 psl_reset_mask);
+	void (*irq_wait)(struct cxl_context *ctx);
 	int (*attach_process)(struct cxl_context *ctx, bool kernel,
 			u64 wed, u64 amr);
 	int (*detach_process)(struct cxl_context *ctx);

drivers/misc/cxl/irq.c+0−1

@@ -203,7 +203,6 @@ unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, · 202 unmodified lines
203	void cxl_unmap_irq(unsigned int virq, void *cookie)	203	void cxl_unmap_irq(unsigned int virq, void *cookie)
204	{	204	{
205	free_irq(virq, cookie);	205	free_irq(virq, cookie);
206	irq_dispose_mapping(virq);
207	}	206	}
208		207
209	int cxl_register_one_irq(struct cxl *adapter,	208	int cxl_register_one_irq(struct cxl *adapter,

drivers/misc/cxl/native.c+31−0

@@ -14,6 +14,7 @@ · 13 unmodified lines
14	#include <linux/mutex.h>	14	#include <linux/mutex.h>
15	#include <linux/mm.h>	15	#include <linux/mm.h>
16	#include <linux/uaccess.h>	16	#include <linux/uaccess.h>
		17	#include <linux/delay.h>
17	#include <asm/synch.h>	18	#include <asm/synch.h>
18	#include <misc/cxl-base.h>	19	#include <misc/cxl-base.h>
19		20
@@ -797,6 +798,35 @@ static irqreturn_t native_irq_multiplexed(int irq, void *data) · 777 unmodified lines
797	return fail_psl_irq(afu, &irq_info);	798	return fail_psl_irq(afu, &irq_info);
798	}	799	}
799		800
		801	void native_irq_wait(struct cxl_context *ctx)
		802	{
		803	u64 dsisr;
		804	int timeout = 1000;
		805	int ph;
		806
		807	/*
		808	* Wait until no further interrupts are presented by the PSL
		809	* for this context.
		810	*/
		811	while (timeout--) {
		812	ph = cxl_p2n_read(ctx->afu, CXL_PSL_PEHandle_An) & 0xffff;
		813	if (ph != ctx->pe)
		814	return;
		815	dsisr = cxl_p2n_read(ctx->afu, CXL_PSL_DSISR_An);
		816	if ((dsisr & CXL_PSL_DSISR_PENDING) == 0)
		817	return;
		818	/*
		819	* We are waiting for the workqueue to process our
		820	* irq, so need to let that run here.
		821	*/
		822	msleep(1);
		823	}
		824
		825	dev_warn(&ctx->afu->dev, "WARNING: waiting on DSI for PE %i"
		826	" DSISR %016llx!\n", ph, dsisr);
		827	return;
		828	}
		829
800	static irqreturn_t native_slice_irq_err(int irq, void *data)	830	static irqreturn_t native_slice_irq_err(int irq, void *data)
801	{	831	{
802	struct cxl_afu *afu = data;	832	struct cxl_afu *afu = data;
@@ -1076,6 +1106,7 @@ const struct cxl_backend_ops cxl_native_ops = { · 273 unmodified lines
1076	.handle_psl_slice_error = native_handle_psl_slice_error,	1106	.handle_psl_slice_error = native_handle_psl_slice_error,
1077	.psl_interrupt = NULL,	1107	.psl_interrupt = NULL,
1078	.ack_irq = native_ack_irq,	1108	.ack_irq = native_ack_irq,
		1109	.irq_wait = native_irq_wait,
1079	.attach_process = native_attach_process,	1110	.attach_process = native_attach_process,
1080	.detach_process = native_detach_process,	1111	.detach_process = native_detach_process,
1081	.support_attributes = native_support_attributes,	1112	.support_attributes = native_support_attributes,

drivers/mmc/host/Kconfig+1−0

@@ -97,6 +97,7 @@ config MMC_RICOH_MMC · 96 unmodified lines
97	config MMC_SDHCI_ACPI	97	config MMC_SDHCI_ACPI
98	tristate "SDHCI support for ACPI enumerated SDHCI controllers"	98	tristate "SDHCI support for ACPI enumerated SDHCI controllers"
99	depends on MMC_SDHCI && ACPI	99	depends on MMC_SDHCI && ACPI
		100	select IOSF_MBI if X86
100	help	101	help
101	This selects support for ACPI enumerated SDHCI controllers,	102	This selects support for ACPI enumerated SDHCI controllers,
102	identified by ACPI Compatibility ID PNP0D40 or specific	103	identified by ACPI Compatibility ID PNP0D40 or specific

drivers/mmc/host/sdhci-acpi.c+81−0

@@ -41,6 +41,11 @@ · 40 unmodified lines
41	#include <linux/mmc/pm.h>	41	#include <linux/mmc/pm.h>
42	#include <linux/mmc/slot-gpio.h>	42	#include <linux/mmc/slot-gpio.h>
43		43
		44	#ifdef CONFIG_X86
		45	#include <asm/cpu_device_id.h>
		46	#include <asm/iosf_mbi.h>
		47	#endif
		48
44	#include "sdhci.h"	49	#include "sdhci.h"
45		50
46	enum {	51	enum {
@@ -116,6 +121,75 @@ static const struct sdhci_acpi_chip sdhci_acpi_chip_int = { · 69 unmodified lines
116	.ops = &sdhci_acpi_ops_int,	121	.ops = &sdhci_acpi_ops_int,
117	};	122	};
118		123
		124	#ifdef CONFIG_X86
		125
		126	static bool sdhci_acpi_byt(void)
		127	{
		128	static const struct x86_cpu_id byt[] = {
		129	{ X86_VENDOR_INTEL, 6, 0x37 },
		130	{}
		131	};
		132
		133	return x86_match_cpu(byt);
		134	}
		135
		136	#define BYT_IOSF_SCCEP 0x63
		137	#define BYT_IOSF_OCP_NETCTRL0 0x1078
		138	#define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
		139
		140	static void sdhci_acpi_byt_setting(struct device *dev)
		141	{
		142	u32 val = 0;
		143
		144	if (!sdhci_acpi_byt())
		145	return;
		146
		147	if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
		148	&val)) {
		149	dev_err(dev, "%s read error\n", __func__);
		150	return;
		151	}
		152
		153	if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
		154	return;
		155
		156	val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
		157
		158	if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
		159	val)) {
		160	dev_err(dev, "%s write error\n", __func__);
		161	return;
		162	}
		163
		164	dev_dbg(dev, "%s completed\n", __func__);
		165	}
		166
		167	static bool sdhci_acpi_byt_defer(struct device *dev)
		168	{
		169	if (!sdhci_acpi_byt())
		170	return false;
		171
		172	if (!iosf_mbi_available())
		173	return true;
		174
		175	sdhci_acpi_byt_setting(dev);
		176
		177	return false;
		178	}
		179
		180	#else
		181
		182	static inline void sdhci_acpi_byt_setting(struct device *dev)
		183	{
		184	}
		185
		186	static inline bool sdhci_acpi_byt_defer(struct device *dev)
		187	{
		188	return false;
		189	}
		190
		191	#endif
		192
119	static int bxt_get_cd(struct mmc_host *mmc)	193	static int bxt_get_cd(struct mmc_host *mmc)
120	{	194	{
121	int gpio_cd = mmc_gpio_get_cd(mmc);	195	int gpio_cd = mmc_gpio_get_cd(mmc);
@@ -322,6 +396,9 @@ static int sdhci_acpi_probe(struct platform_device *pdev) · 200 unmodified lines
322	if (acpi_bus_get_status(device) \|\| !device->status.present)	396	if (acpi_bus_get_status(device) \|\| !device->status.present)
323	return -ENODEV;	397	return -ENODEV;
324		398
		399	if (sdhci_acpi_byt_defer(dev))
		400	return -EPROBE_DEFER;
		401
325	hid = acpi_device_hid(device);	402	hid = acpi_device_hid(device);
326	uid = device->pnp.unique_id;	403	uid = device->pnp.unique_id;
327		404
@@ -447,6 +524,8 @@ static int sdhci_acpi_resume(struct device *dev) · 119 unmodified lines
447	{	524	{
448	struct sdhci_acpi_host *c = dev_get_drvdata(dev);	525	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
449		526
		527	sdhci_acpi_byt_setting(&c->pdev->dev);
		528
450	return sdhci_resume_host(c->host);	529	return sdhci_resume_host(c->host);
451	}	530	}
452		531
@@ -470,6 +549,8 @@ static int sdhci_acpi_runtime_resume(struct device *dev) · 17 unmodified lines
470	{	549	{
471	struct sdhci_acpi_host *c = dev_get_drvdata(dev);	550	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
472		551
		552	sdhci_acpi_byt_setting(&c->pdev->dev);
		553
473	return sdhci_runtime_resume_host(c->host);	554	return sdhci_runtime_resume_host(c->host);
474	}	555	}
475		556

drivers/mmc/host/sunxi-mmc.c+5−0

 				  MMC_CAP_1_8V_DDR |
 				  MMC_CAP_ERASE | MMC_CAP_SDIO_IRQ;
+	/* TODO MMC DDR is not working on A80 */
+	if (of_device_is_compatible(pdev->dev.of_node,
+				    "allwinner,sun9i-a80-mmc"))
+		mmc->caps &= ~MMC_CAP_1_8V_DDR;
 	ret = mmc_of_parse(mmc);
 	if (ret)
 		goto error_free_dma;

drivers/net/dsa/mv88e6xxx.c+1−1

@@ -2202,7 +2202,7 @@ int mv88e6xxx_port_bridge_join(struct dsa_switch *ds, int port, · 2201 unmodified lines
2202	struct net_device *bridge)	2202	struct net_device *bridge)
2203	{	2203	{
2204	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);	2204	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);
2205	int i, err;	2205	int i, err = 0;
2206		2206
2207	mutex_lock(&ps->smi_mutex);	2207	mutex_lock(&ps->smi_mutex);
2208		2208

drivers/net/ethernet/broadcom/bnxt/bnxt.c+39−14

 	struct page *page;
 	dma_addr_t mapping;
 	u16 sw_prod = rxr->rx_sw_agg_prod;
+	unsigned int offset = 0;
-	page = alloc_page(gfp);
+	if (PAGE_SIZE > BNXT_RX_PAGE_SIZE) {
-	if (!page)
+		page = rxr->rx_page;
-		return -ENOMEM;
+		if (!page) {
+			page = alloc_page(gfp);
+			if (!page)
+				return -ENOMEM;
+			rxr->rx_page = page;
+			rxr->rx_page_offset = 0;
+		}
+		offset = rxr->rx_page_offset;
+		rxr->rx_page_offset += BNXT_RX_PAGE_SIZE;
+		if (rxr->rx_page_offset == PAGE_SIZE)
+			rxr->rx_page = NULL;
+		else
+			get_page(page);
+	} else {
+		page = alloc_page(gfp);
+		if (!page)
+			return -ENOMEM;
+	}
-	mapping = dma_map_page(&pdev->dev, page, 0, PAGE_SIZE,
+	mapping = dma_map_page(&pdev->dev, page, offset, BNXT_RX_PAGE_SIZE,
 			       PCI_DMA_FROMDEVICE);
 	if (dma_mapping_error(&pdev->dev, mapping)) {
 		__free_page(page);
 	rxr->rx_sw_agg_prod = NEXT_RX_AGG(sw_prod);
 	rx_agg_buf->page = page;
+	rx_agg_buf->offset = offset;
 	rx_agg_buf->mapping = mapping;
 	rxbd->rx_bd_haddr = cpu_to_le64(mapping);
 	rxbd->rx_bd_opaque = sw_prod;
 		page = cons_rx_buf->page;
 		cons_rx_buf->page = NULL;
 		prod_rx_buf->page = page;
+		prod_rx_buf->offset = cons_rx_buf->offset;
 		prod_rx_buf->mapping = cons_rx_buf->mapping;
 			    RX_AGG_CMP_LEN) >> RX_AGG_CMP_LEN_SHIFT;
 		cons_rx_buf = &rxr->rx_agg_ring[cons];
-		skb_fill_page_desc(skb, i, cons_rx_buf->page, 0, frag_len);
+		skb_fill_page_desc(skb, i, cons_rx_buf->page,
+				   cons_rx_buf->offset, frag_len);
 		__clear_bit(cons, rxr->rx_agg_bmap);
 		/* It is possible for bnxt_alloc_rx_page() to allocate
 			return NULL;
 		}
-		dma_unmap_page(&pdev->dev, mapping, PAGE_SIZE,
+		dma_unmap_page(&pdev->dev, mapping, BNXT_RX_PAGE_SIZE,
 			       PCI_DMA_FROMDEVICE);
 		skb->data_len += frag_len;
 			dma_unmap_page(&pdev->dev,
 				       dma_unmap_addr(rx_agg_buf, mapping),
-				       PAGE_SIZE, PCI_DMA_FROMDEVICE);
+				       BNXT_RX_PAGE_SIZE, PCI_DMA_FROMDEVICE);
 			rx_agg_buf->page = NULL;
 			__clear_bit(j, rxr->rx_agg_bmap);
 			__free_page(page);
 		}
+		if (rxr->rx_page) {
+			__free_page(rxr->rx_page);
+			rxr->rx_page = NULL;
+		}
 	}
 }
 	if (!(bp->flags & BNXT_FLAG_AGG_RINGS))
 		return 0;
-	type = ((u32)PAGE_SIZE << RX_BD_LEN_SHIFT) |
+	type = ((u32)BNXT_RX_PAGE_SIZE << RX_BD_LEN_SHIFT) |
 		RX_BD_TYPE_RX_AGG_BD | RX_BD_FLAGS_SOP;
 	bnxt_init_rxbd_pages(ring, type);
 	bp->rx_agg_nr_pages = 0;
 	if (bp->flags & BNXT_FLAG_TPA)
-		agg_factor = 4;
+		agg_factor = min_t(u32, 4, 65536 / BNXT_RX_PAGE_SIZE);
 	bp->flags &= ~BNXT_FLAG_JUMBO;
 	if (rx_space > PAGE_SIZE) {
 		/* Number of segs are log2 units, and first packet is not
 		 * included as part of this units.
 		 */
-		if (mss <= PAGE_SIZE) {
+		if (mss <= BNXT_RX_PAGE_SIZE) {
-			n = PAGE_SIZE / mss;
+			n = BNXT_RX_PAGE_SIZE / mss;
 			nsegs = (MAX_SKB_FRAGS - 1) * n;
 		} else {
-			n = mss / PAGE_SIZE;
+			n = mss / BNXT_RX_PAGE_SIZE;
-			if (mss & (PAGE_SIZE - 1))
+			if (mss & (BNXT_RX_PAGE_SIZE - 1))
 				n++;
 			nsegs = (MAX_SKB_FRAGS - n) / n;
 		}
 	if (bp->flags & BNXT_FLAG_MSIX_CAP)
 		rc = bnxt_setup_msix(bp);
-	if (!(bp->flags & BNXT_FLAG_USING_MSIX)) {
+	if (!(bp->flags & BNXT_FLAG_USING_MSIX) && BNXT_PF(bp)) {
 		/* fallback to INTA */
 		rc = bnxt_setup_inta(bp);
 	}

drivers/net/ethernet/broadcom/bnxt/bnxt.h+13−0

 #define BNXT_PAGE_SIZE	(1 << BNXT_PAGE_SHIFT)
+/* The RXBD length is 16-bit so we can only support page sizes < 64K */
+#if (PAGE_SHIFT > 15)
+#define BNXT_RX_PAGE_SHIFT 15
+#else
+#define BNXT_RX_PAGE_SHIFT PAGE_SHIFT
+#endif
+#define BNXT_RX_PAGE_SIZE (1 << BNXT_RX_PAGE_SHIFT)
 #define BNXT_MIN_PKT_SIZE	45
 #define BNXT_NUM_TESTS(bp)	0
 struct bnxt_sw_rx_agg_bd {
 	struct page		*page;
+	unsigned int		offset;
 	dma_addr_t		mapping;
 };
 	unsigned long		*rx_agg_bmap;
 	u16			rx_agg_bmap_size;
+	struct page		*rx_page;
+	unsigned int		rx_page_offset;
 	dma_addr_t		rx_desc_mapping[MAX_RX_PAGES];
 	dma_addr_t		rx_agg_desc_mapping[MAX_RX_AGG_PAGES];

drivers/net/ethernet/cadence/macb.c+21−13

 	snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
 		 bp->pdev->name, bp->pdev->id);
 	bp->mii_bus->priv = bp;
-	bp->mii_bus->parent = &bp->dev->dev;
+	bp->mii_bus->parent = &bp->pdev->dev;
 	pdata = dev_get_platdata(&bp->pdev->dev);
 	dev_set_drvdata(&bp->dev->dev, bp->mii_bus);
 				struct phy_device *phydev;
 				phydev = mdiobus_scan(bp->mii_bus, i);
-				if (IS_ERR(phydev)) {
+				if (IS_ERR(phydev) &&
+				    PTR_ERR(phydev) != -ENODEV) {
 					err = PTR_ERR(phydev);
 					break;
 				}
 	if (err)
 		goto err_out_free_netdev;
+	err = macb_mii_init(bp);
+	if (err)
+		goto err_out_free_netdev;
+	phydev = bp->phy_dev;
+	netif_carrier_off(dev);
 	err = register_netdev(dev);
 	if (err) {
 		dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
-		goto err_out_unregister_netdev;
+		goto err_out_unregister_mdio;
 	}
-	err = macb_mii_init(bp);
+	phy_attached_info(phydev);
-	if (err)
-		goto err_out_unregister_netdev;
-	netif_carrier_off(dev);
 	netdev_info(dev, "Cadence %s rev 0x%08x at 0x%08lx irq %d (%pM)\n",
 		    macb_is_gem(bp) ? "GEM" : "MACB", macb_readl(bp, MID),
 		    dev->base_addr, dev->irq, dev->dev_addr);
-	phydev = bp->phy_dev;
-	phy_attached_info(phydev);
 	return 0;
-err_out_unregister_netdev:
+err_out_unregister_mdio:
-	unregister_netdev(dev);
+	phy_disconnect(bp->phy_dev);
+	mdiobus_unregister(bp->mii_bus);
+	mdiobus_free(bp->mii_bus);
+	/* Shutdown the PHY if there is a GPIO reset */
+	if (bp->reset_gpio)
+		gpiod_set_value(bp->reset_gpio, 0);
 err_out_free_netdev:
 	free_netdev(dev);

drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c+2−1

 	unsigned int nq0 = adap2pinfo(adap, 0)->nqsets;
 	unsigned int nq1 = adap->port[1] ? adap2pinfo(adap, 1)->nqsets : 1;
 	u8 cpus[SGE_QSETS + 1];
-	u16 rspq_map[RSS_TABLE_SIZE];
+	u16 rspq_map[RSS_TABLE_SIZE + 1];
 	for (i = 0; i < SGE_QSETS; ++i)
 		cpus[i] = i;
 		rspq_map[i] = i % nq0;
 		rspq_map[i + RSS_TABLE_SIZE / 2] = (i % nq1) + nq0;
 	}
+	rspq_map[RSS_TABLE_SIZE] = 0xffff; /* terminator */
 	t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN |
 		      F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN |

drivers/net/ethernet/marvell/mvneta.c+2−4

 		/* Enable per-CPU interrupts on the CPU that is
 		 * brought up.
 		 */
-		smp_call_function_single(cpu, mvneta_percpu_enable,
+		mvneta_percpu_enable(pp);
-					 pp, true);
 		/* Enable per-CPU interrupt on the one CPU we care
 		 * about.
 		/* Disable per-CPU interrupts on the CPU that is
 		 * brought down.
 		 */
-		smp_call_function_single(cpu, mvneta_percpu_disable,
+		mvneta_percpu_disable(pp);
-					 pp, true);
 		break;
 	case CPU_DEAD:

drivers/net/ethernet/marvell/pxa168_eth.c+2−0

@@ -979,6 +979,8 @@ static int pxa168_init_phy(struct net_device *dev) · 978 unmodified lines
979	return 0;	979	return 0;
980		980
981	pep->phy = mdiobus_scan(pep->smi_bus, pep->phy_addr);	981	pep->phy = mdiobus_scan(pep->smi_bus, pep->phy_addr);
		982	if (IS_ERR(pep->phy))
		983	return PTR_ERR(pep->phy);
982	if (!pep->phy)	984	if (!pep->phy)
983	return -ENODEV;	985	return -ENODEV;
984		986

drivers/net/ethernet/mellanox/mlx5/core/Kconfig+1−0

@@ -14,6 +14,7 @@ config MLX5_CORE_EN · 13 unmodified lines
14	bool "Mellanox Technologies ConnectX-4 Ethernet support"	14	bool "Mellanox Technologies ConnectX-4 Ethernet support"
15	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE	15	depends on NETDEVICES && ETHERNET && PCI && MLX5_CORE
16	select PTP_1588_CLOCK	16	select PTP_1588_CLOCK
		17	select VXLAN if MLX5_CORE=y
17	default n	18	default n
18	---help---	19	---help---
19	Ethernet support in Mellanox Technologies ConnectX-4 NIC.	20	Ethernet support in Mellanox Technologies ConnectX-4 NIC.

drivers/net/ethernet/mellanox/mlx5/core/en.h+1−0

@@ -525,6 +525,7 @@ struct mlx5e_priv { · 524 unmodified lines
525	struct mlx5e_vxlan_db vxlan;	525	struct mlx5e_vxlan_db vxlan;
526		526
527	struct mlx5e_params params;	527	struct mlx5e_params params;
		528	struct workqueue_struct *wq;
528	struct work_struct update_carrier_work;	529	struct work_struct update_carrier_work;
529	struct work_struct set_rx_mode_work;	530	struct work_struct set_rx_mode_work;
530	struct delayed_work update_stats_work;	531	struct delayed_work update_stats_work;

drivers/net/ethernet/mellanox/mlx5/core/en_main.c+21−13

 	mutex_lock(&priv->state_lock);
 	if (test_bit(MLX5E_STATE_OPENED, &priv->state)) {
 		mlx5e_update_stats(priv);
-		schedule_delayed_work(dwork,
+		queue_delayed_work(priv->wq, dwork,
-				      msecs_to_jiffies(
+				   msecs_to_jiffies(MLX5E_UPDATE_STATS_INTERVAL));
-					      MLX5E_UPDATE_STATS_INTERVAL));
 	}
 	mutex_unlock(&priv->state_lock);
 }
 	switch (event) {
 	case MLX5_DEV_EVENT_PORT_UP:
 	case MLX5_DEV_EVENT_PORT_DOWN:
-		schedule_work(&priv->update_carrier_work);
+		queue_work(priv->wq, &priv->update_carrier_work);
 		break;
 	default:
 	priv->netdev->rx_cpu_rmap = priv->mdev->rmap;
 #endif
-	schedule_delayed_work(&priv->update_stats_work, 0);
+	queue_delayed_work(priv->wq, &priv->update_stats_work, 0);
 	return 0;
 {
 	struct mlx5e_priv *priv = netdev_priv(dev);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 }
 static int mlx5e_set_mac(struct net_device *netdev, void *addr)
 	ether_addr_copy(netdev->dev_addr, saddr->sa_data);
 	netif_addr_unlock_bh(netdev);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 	return 0;
 }
 	if (!mlx5e_vxlan_allowed(priv->mdev))
 		return;
-	mlx5e_vxlan_add_port(priv, be16_to_cpu(port));
+	mlx5e_vxlan_queue_work(priv, sa_family, be16_to_cpu(port), 1);
 }
 static void mlx5e_del_vxlan_port(struct net_device *netdev,
 	if (!mlx5e_vxlan_allowed(priv->mdev))
 		return;
-	mlx5e_vxlan_del_port(priv, be16_to_cpu(port));
+	mlx5e_vxlan_queue_work(priv, sa_family, be16_to_cpu(port), 0);
 }
 static netdev_features_t mlx5e_vxlan_features_check(struct mlx5e_priv *priv,
 	priv = netdev_priv(netdev);
+	priv->wq = create_singlethread_workqueue("mlx5e");
+	if (!priv->wq)
+		goto err_free_netdev;
 	err = mlx5_alloc_map_uar(mdev, &priv->cq_uar, false);
 	if (err) {
 		mlx5_core_err(mdev, "alloc_map uar failed, %d\n", err);
-		goto err_free_netdev;
+		goto err_destroy_wq;
 	}
 	err = mlx5_core_alloc_pd(mdev, &priv->pdn);
 	}
 	mlx5e_enable_async_events(priv);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 	return priv;
 err_unmap_free_uar:
 	mlx5_unmap_free_uar(mdev, &priv->cq_uar);
+err_destroy_wq:
+	destroy_workqueue(priv->wq);
 err_free_netdev:
 	free_netdev(netdev);
 	set_bit(MLX5E_STATE_DESTROYING, &priv->state);
-	schedule_work(&priv->set_rx_mode_work);
+	queue_work(priv->wq, &priv->set_rx_mode_work);
 	mlx5e_disable_async_events(priv);
-	flush_scheduled_work();
+	flush_workqueue(priv->wq);
 	if (test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state)) {
 		netif_device_detach(netdev);
 		mutex_lock(&priv->state_lock);
 	mlx5_core_dealloc_transport_domain(priv->mdev, priv->tdn);
 	mlx5_core_dealloc_pd(priv->mdev, priv->pdn);
 	mlx5_unmap_free_uar(priv->mdev, &priv->cq_uar);
+	cancel_delayed_work_sync(&priv->update_stats_work);
+	destroy_workqueue(priv->wq);
 	if (!test_bit(MLX5_INTERFACE_STATE_SHUTDOWN, &mdev->intf_state))
 		free_netdev(netdev);

drivers/net/ethernet/mellanox/mlx5/core/uar.c+4−2

 void mlx5_unmap_free_uar(struct mlx5_core_dev *mdev, struct mlx5_uar *uar)
 {
-	iounmap(uar->map);
+	if (uar->map)
-	iounmap(uar->bf_map);
+		iounmap(uar->map);
+	else
+		iounmap(uar->bf_map);
 	mlx5_cmd_free_uar(mdev, uar->index);
 }
 EXPORT_SYMBOL(mlx5_unmap_free_uar);

drivers/net/ethernet/mellanox/mlx5/core/vxlan.c+38−12

 	return vxlan;
 }
-int mlx5e_vxlan_add_port(struct mlx5e_priv *priv, u16 port)
+static void mlx5e_vxlan_add_port(struct work_struct *work)
 {
+	struct mlx5e_vxlan_work *vxlan_work =
+		container_of(work, struct mlx5e_vxlan_work, work);
+	struct mlx5e_priv *priv = vxlan_work->priv;
 	struct mlx5e_vxlan_db *vxlan_db = &priv->vxlan;
+	u16 port = vxlan_work->port;
 	struct mlx5e_vxlan *vxlan;
 	int err;
-	err = mlx5e_vxlan_core_add_port_cmd(priv->mdev, port);
+	if (mlx5e_vxlan_core_add_port_cmd(priv->mdev, port))
-	if (err)
+		goto free_work;
-		return err;
 	vxlan = kzalloc(sizeof(*vxlan), GFP_KERNEL);
-	if (!vxlan) {
+	if (!vxlan)
-		err = -ENOMEM;
 		goto err_delete_port;
-	}
 	vxlan->udp_port = port;
 	if (err)
 		goto err_free;
-	return 0;
+	goto free_work;
 err_free:
 	kfree(vxlan);
 err_delete_port:
 	mlx5e_vxlan_core_del_port_cmd(priv->mdev, port);
-	return err;
+free_work:
+	kfree(vxlan_work);
 }
 static void __mlx5e_vxlan_core_del_port(struct mlx5e_priv *priv, u16 port)
 	kfree(vxlan);
 }
-void mlx5e_vxlan_del_port(struct mlx5e_priv *priv, u16 port)
+static void mlx5e_vxlan_del_port(struct work_struct *work)
 {
-	if (!mlx5e_vxlan_lookup_port(priv, port))
+	struct mlx5e_vxlan_work *vxlan_work =
-		return;
+		container_of(work, struct mlx5e_vxlan_work, work);
+	struct mlx5e_priv *priv = vxlan_work->priv;
+	u16 port = vxlan_work->port;
 	__mlx5e_vxlan_core_del_port(priv, port);
+	kfree(vxlan_work);
+}
+void mlx5e_vxlan_queue_work(struct mlx5e_priv *priv, sa_family_t sa_family,
+			    u16 port, int add)
+{
+	struct mlx5e_vxlan_work *vxlan_work;
+	vxlan_work = kmalloc(sizeof(*vxlan_work), GFP_ATOMIC);
+	if (!vxlan_work)
+		return;
+	if (add)
+		INIT_WORK(&vxlan_work->work, mlx5e_vxlan_add_port);
+	else
+		INIT_WORK(&vxlan_work->work, mlx5e_vxlan_del_port);
+	vxlan_work->priv = priv;
+	vxlan_work->port = port;
+	vxlan_work->sa_family = sa_family;
+	queue_work(priv->wq, &vxlan_work->work);
 }
 void mlx5e_vxlan_cleanup(struct mlx5e_priv *priv)

drivers/net/ethernet/mellanox/mlx5/core/vxlan.h+9−2

 	u16 udp_port;
 };
+struct mlx5e_vxlan_work {
+	struct work_struct	work;
+	struct mlx5e_priv	*priv;
+	sa_family_t		sa_family;
+	u16			port;
+};
 static inline bool mlx5e_vxlan_allowed(struct mlx5_core_dev *mdev)
 {
 	return (MLX5_CAP_ETH(mdev, tunnel_stateless_vxlan) &&
 }
 void mlx5e_vxlan_init(struct mlx5e_priv *priv);
-int  mlx5e_vxlan_add_port(struct mlx5e_priv *priv, u16 port);
+void mlx5e_vxlan_queue_work(struct mlx5e_priv *priv, sa_family_t sa_family,
-void mlx5e_vxlan_del_port(struct mlx5e_priv *priv, u16 port);
+			    u16 port, int add);
 struct mlx5e_vxlan *mlx5e_vxlan_lookup_port(struct mlx5e_priv *priv, u16 port);
 void mlx5e_vxlan_cleanup(struct mlx5e_priv *priv);

drivers/net/ethernet/myricom/myri10ge/myri10ge.c+2−2

 	del_timer_sync(&mgp->watchdog_timer);
 	mgp->running = MYRI10GE_ETH_STOPPING;
-	local_bh_disable(); /* myri10ge_ss_lock_napi needs bh disabled */
 	for (i = 0; i < mgp->num_slices; i++) {
 		napi_disable(&mgp->ss[i].napi);
+		local_bh_disable(); /* myri10ge_ss_lock_napi needs this */
 		/* Lock the slice to prevent the busy_poll handler from
 		 * accessing it.  Later when we bring the NIC up, myri10ge_open
 		 * resets the slice including this lock.
 			pr_info("Slice %d locked\n", i);
 			mdelay(1);
 		}
+		local_bh_enable();
 	}
-	local_bh_enable();
 	netif_carrier_off(dev);
 	netif_tx_stop_all_queues(dev);

drivers/net/ethernet/sfc/ef10.c+13−2

 		return 0;
 	}
+	if (nic_data->datapath_caps &
+	    1 << MC_CMD_GET_CAPABILITIES_OUT_RX_RSS_LIMITED_LBN)
+		return -EOPNOTSUPP;
 	MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
 		       nic_data->vport_id);
 	MCDI_SET_DWORD(inbuf, RSS_CONTEXT_ALLOC_IN_TYPE, alloc_type);
 				      bool replacing)
 {
 	struct efx_ef10_nic_data *nic_data = efx->nic_data;
+	u32 flags = spec->flags;
 	memset(inbuf, 0, MC_CMD_FILTER_OP_IN_LEN);
+	/* Remove RSS flag if we don't have an RSS context. */
+	if (flags & EFX_FILTER_FLAG_RX_RSS &&
+	    spec->rss_context == EFX_FILTER_RSS_CONTEXT_DEFAULT &&
+	    nic_data->rx_rss_context == EFX_EF10_RSS_CONTEXT_INVALID)
+		flags &= ~EFX_FILTER_FLAG_RX_RSS;
 	if (replacing) {
 		MCDI_SET_DWORD(inbuf, FILTER_OP_IN_OP,
 			       MC_CMD_FILTER_OP_IN_OP_REPLACE);
 		       spec->dmaq_id == EFX_FILTER_RX_DMAQ_ID_DROP ?
 		       0 : spec->dmaq_id);
 	MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_MODE,
-		       (spec->flags & EFX_FILTER_FLAG_RX_RSS) ?
+		       (flags & EFX_FILTER_FLAG_RX_RSS) ?
 		       MC_CMD_FILTER_OP_IN_RX_MODE_RSS :
 		       MC_CMD_FILTER_OP_IN_RX_MODE_SIMPLE);
-	if (spec->flags & EFX_FILTER_FLAG_RX_RSS)
+	if (flags & EFX_FILTER_FLAG_RX_RSS)
 		MCDI_SET_DWORD(inbuf, FILTER_OP_IN_RX_CONTEXT,
 			       spec->rss_context !=
 			       EFX_FILTER_RSS_CONTEXT_DEFAULT ?

drivers/net/ethernet/ti/cpsw.c+36−31

@@ -367,7 +367,6 @@ struct cpsw_priv { · 366 unmodified lines
367	spinlock_t lock;	367	spinlock_t lock;
368	struct platform_device *pdev;	368	struct platform_device *pdev;
369	struct net_device *ndev;	369	struct net_device *ndev;
370	struct device_node *phy_node;
371	struct napi_struct napi_rx;	370	struct napi_struct napi_rx;
372	struct napi_struct napi_tx;	371	struct napi_struct napi_tx;
373	struct device *dev;	372	struct device *dev;
@@ -1142,25 +1141,34 @@ static void cpsw_slave_open(struct cpsw_slave slave, struct cpsw_priv priv) · 768 unmodified lines
1142	cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,	1141	cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
1143	1 << slave_port, 0, 0, ALE_MCAST_FWD_2);	1142	1 << slave_port, 0, 0, ALE_MCAST_FWD_2);
1144		1143
1145	if (priv->phy_node)	1144	if (slave->data->phy_node) {
1146	slave->phy = of_phy_connect(priv->ndev, priv->phy_node,	1145	slave->phy = of_phy_connect(priv->ndev, slave->data->phy_node,
1147	&cpsw_adjust_link, 0, slave->data->phy_if);	1146	&cpsw_adjust_link, 0, slave->data->phy_if);
1148	else	1147	if (!slave->phy) {
		1148	dev_err(priv->dev, "phy \"%s\" not found on slave %d\n",
		1149	slave->data->phy_node->full_name,
		1150	slave->slave_num);
		1151	return;
		1152	}
		1153	} else {
1149	slave->phy = phy_connect(priv->ndev, slave->data->phy_id,	1154	slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
1150	&cpsw_adjust_link, slave->data->phy_if);	1155	&cpsw_adjust_link, slave->data->phy_if);
1151	if (IS_ERR(slave->phy)) {	1156	if (IS_ERR(slave->phy)) {
1152	dev_err(priv->dev, "phy %s not found on slave %d\n",	1157	dev_err(priv->dev,
1153	slave->data->phy_id, slave->slave_num);	1158	"phy \"%s\" not found on slave %d, err %ld\n",
1154	slave->phy = NULL;	1159	slave->data->phy_id, slave->slave_num,
1155	} else {	1160	PTR_ERR(slave->phy));
1156	phy_attached_info(slave->phy);	1161	slave->phy = NULL;
		1162	return;
		1163	}
		1164	}
1157		1165
1158	phy_start(slave->phy);	1166	phy_attached_info(slave->phy);
1159		1167
1160	/* Configure GMII_SEL register */	1168	phy_start(slave->phy);
1161	cpsw_phy_sel(&priv->pdev->dev, slave->phy->interface,	1169
1162	slave->slave_num);	1170	/* Configure GMII_SEL register */
1163	}	1171	cpsw_phy_sel(&priv->pdev->dev, slave->phy->interface, slave->slave_num);
1164	}	1172	}
1165		1173
1166	static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)	1174	static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
@@ -1932,12 +1940,11 @@ static void cpsw_slave_init(struct cpsw_slave slave, struct cpsw_priv priv, · 765 unmodified lines
1932	slave->port_vlan = data->dual_emac_res_vlan;	1940	slave->port_vlan = data->dual_emac_res_vlan;
1933	}	1941	}
1934		1942
1935	static int cpsw_probe_dt(struct cpsw_priv *priv,	1943	static int cpsw_probe_dt(struct cpsw_platform_data *data,
1936	struct platform_device *pdev)	1944	struct platform_device *pdev)
1937	{	1945	{
1938	struct device_node *node = pdev->dev.of_node;	1946	struct device_node *node = pdev->dev.of_node;
1939	struct device_node *slave_node;	1947	struct device_node *slave_node;
1940	struct cpsw_platform_data *data = &priv->data;
1941	int i = 0, ret;	1948	int i = 0, ret;
1942	u32 prop;	1949	u32 prop;
1943		1950
@@ -2025,25 +2032,21 @@ static int cpsw_probe_dt(struct cpsw_priv *priv, · 81 unmodified lines
2025	if (strcmp(slave_node->name, "slave"))	2032	if (strcmp(slave_node->name, "slave"))
2026	continue;	2033	continue;
2027		2034
2028	priv->phy_node = of_parse_phandle(slave_node, "phy-handle", 0);	2035	slave_data->phy_node = of_parse_phandle(slave_node,
		2036	"phy-handle", 0);
2029	parp = of_get_property(slave_node, "phy_id", &lenp);	2037	parp = of_get_property(slave_node, "phy_id", &lenp);
2030	if (of_phy_is_fixed_link(slave_node)) {	2038	if (slave_data->phy_node) {
2031	struct device_node *phy_node;	2039	dev_dbg(&pdev->dev,
2032	struct phy_device *phy_dev;	2040	"slave[%d] using phy-handle=\"%s\"\n",
2033		2041	i, slave_data->phy_node->full_name);
		2042	} else if (of_phy_is_fixed_link(slave_node)) {
2034	/* In the case of a fixed PHY, the DT node associated	2043	/* In the case of a fixed PHY, the DT node associated
2035	* to the PHY is the Ethernet MAC DT node.	2044	* to the PHY is the Ethernet MAC DT node.
2036	*/	2045	*/
2037	ret = of_phy_register_fixed_link(slave_node);	2046	ret = of_phy_register_fixed_link(slave_node);
2038	if (ret)	2047	if (ret)
2039	return ret;	2048	return ret;
2040	phy_node = of_node_get(slave_node);	2049	slave_data->phy_node = of_node_get(slave_node);
2041	phy_dev = of_phy_find_device(phy_node);
2042	if (!phy_dev)
2043	return -ENODEV;
2044	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2045	PHY_ID_FMT, phy_dev->mdio.bus->id,
2046	phy_dev->mdio.addr);
2047	} else if (parp) {	2050	} else if (parp) {
2048	u32 phyid;	2051	u32 phyid;
2049	struct device_node *mdio_node;	2052	struct device_node *mdio_node;
@@ -2064,7 +2067,9 @@ static int cpsw_probe_dt(struct cpsw_priv *priv, · 14 unmodified lines
2064	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),	2067	snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2065	PHY_ID_FMT, mdio->name, phyid);	2068	PHY_ID_FMT, mdio->name, phyid);
2066	} else {	2069	} else {
2067	dev_err(&pdev->dev, "No slave[%d] phy_id or fixed-link property\n", i);	2070	dev_err(&pdev->dev,
		2071	"No slave[%d] phy_id, phy-handle, or fixed-link property\n",
		2072	i);
2068	goto no_phy_slave;	2073	goto no_phy_slave;
2069	}	2074	}
2070	slave_data->phy_if = of_get_phy_mode(slave_node);	2075	slave_data->phy_if = of_get_phy_mode(slave_node);
@@ -2266,7 +2271,7 @@ static int cpsw_probe(struct platform_device *pdev) · 195 unmodified lines
2266	/* Select default pin state */	2271	/* Select default pin state */
2267	pinctrl_pm_select_default_state(&pdev->dev);	2272	pinctrl_pm_select_default_state(&pdev->dev);
2268		2273
2269	if (cpsw_probe_dt(priv, pdev)) {	2274	if (cpsw_probe_dt(&priv->data, pdev)) {
2270	dev_err(&pdev->dev, "cpsw: platform data missing\n");	2275	dev_err(&pdev->dev, "cpsw: platform data missing\n");
2271	ret = -ENODEV;	2276	ret = -ENODEV;
2272	goto clean_runtime_disable_ret;	2277	goto clean_runtime_disable_ret;

drivers/net/ethernet/ti/cpsw.h+1−0

@@ -18,6 +18,7 @@ · 17 unmodified lines
18	#include <linux/phy.h>	18	#include <linux/phy.h>
19		19
20	struct cpsw_slave_data {	20	struct cpsw_slave_data {
		21	struct device_node *phy_node;
21	char phy_id[MII_BUS_ID_SIZE];	22	char phy_id[MII_BUS_ID_SIZE];
22	int phy_if;	23	int phy_if;
23	u8 mac_addr[ETH_ALEN];	24	u8 mac_addr[ETH_ALEN];

drivers/net/ethernet/ti/davinci_emac.c+4−1

@@ -1512,7 +1512,10 @@ static int emac_devioctl(struct net_device ndev, struct ifreq ifrq, int cmd) · 1511 unmodified lines
1512		1512
1513	/* TODO: Add phy read and write and private statistics get feature */	1513	/* TODO: Add phy read and write and private statistics get feature */
1514		1514
1515	return phy_mii_ioctl(priv->phydev, ifrq, cmd);	1515	if (priv->phydev)
		1516	return phy_mii_ioctl(priv->phydev, ifrq, cmd);
		1517	else
		1518	return -EOPNOTSUPP;
1516	}	1519	}
1517		1520
1518	static int match_first_device(struct device dev, void data)	1521	static int match_first_device(struct device dev, void data)

drivers/net/ethernet/toshiba/ps3_gelic_wireless.c+1−1

@@ -1622,7 +1622,7 @@ static void gelic_wl_scan_complete_event(struct gelic_wl_info *wl) · 1621 unmodified lines
1622	continue;	1622	continue;
1623		1623
1624	/* copy hw scan info */	1624	/* copy hw scan info */
1625	memcpy(target->hwinfo, scan_info, scan_info->size);	1625	memcpy(target->hwinfo, scan_info, be16_to_cpu(scan_info->size));
1626	target->essid_len = strnlen(scan_info->essid,	1626	target->essid_len = strnlen(scan_info->essid,
1627	sizeof(scan_info->essid));	1627	sizeof(scan_info->essid));
1628	target->rate_len = 0;	1628	target->rate_len = 0;

drivers/net/phy/at803x.c+18−22

@@ -359,27 +359,25 @@ static void at803x_link_change_notify(struct phy_device *phydev) · 358 unmodified lines
359	* in the FIFO. In such cases, the FIFO enters an error mode it	359	* in the FIFO. In such cases, the FIFO enters an error mode it
360	* cannot recover from by software.	360	* cannot recover from by software.
361	*/	361	*/
362	if (phydev->drv->phy_id == ATH8030_PHY_ID) {	362	if (phydev->state == PHY_NOLINK) {
363	if (phydev->state == PHY_NOLINK) {	363	if (priv->gpiod_reset && !priv->phy_reset) {
364	if (priv->gpiod_reset && !priv->phy_reset) {	364	struct at803x_context context;
365	struct at803x_context context;	365
366		366	at803x_context_save(phydev, &context);
367	at803x_context_save(phydev, &context);	367
368		368	gpiod_set_value(priv->gpiod_reset, 1);
369	gpiod_set_value(priv->gpiod_reset, 1);	369	msleep(1);
370	msleep(1);	370	gpiod_set_value(priv->gpiod_reset, 0);
371	gpiod_set_value(priv->gpiod_reset, 0);	371	msleep(1);
372	msleep(1);	372
373		373	at803x_context_restore(phydev, &context);
374	at803x_context_restore(phydev, &context);	374
375		375	phydev_dbg(phydev, "%s(): phy was reset\n",
376	phydev_dbg(phydev, "%s(): phy was reset\n",	376	__func__);
377	__func__);	377	priv->phy_reset = true;
378	priv->phy_reset = true;
379	}
380	} else {
381	priv->phy_reset = false;
382	}	378	}
		379	} else {
		380	priv->phy_reset = false;
383	}	381	}
384	}	382	}
385		383
@@ -391,7 +389,6 @@ static struct phy_driver at803x_driver[] = { · 5 unmodified lines
391	.phy_id_mask = 0xffffffef,	389	.phy_id_mask = 0xffffffef,
392	.probe = at803x_probe,	390	.probe = at803x_probe,
393	.config_init = at803x_config_init,	391	.config_init = at803x_config_init,
394	.link_change_notify = at803x_link_change_notify,
395	.set_wol = at803x_set_wol,	392	.set_wol = at803x_set_wol,
396	.get_wol = at803x_get_wol,	393	.get_wol = at803x_get_wol,
397	.suspend = at803x_suspend,	394	.suspend = at803x_suspend,
@@ -427,7 +424,6 @@ static struct phy_driver at803x_driver[] = { · 29 unmodified lines
427	.phy_id_mask = 0xffffffef,	424	.phy_id_mask = 0xffffffef,
428	.probe = at803x_probe,	425	.probe = at803x_probe,
429	.config_init = at803x_config_init,	426	.config_init = at803x_config_init,
430	.link_change_notify = at803x_link_change_notify,
431	.set_wol = at803x_set_wol,	427	.set_wol = at803x_set_wol,
432	.get_wol = at803x_get_wol,	428	.get_wol = at803x_get_wol,
433	.suspend = at803x_suspend,	429	.suspend = at803x_suspend,

drivers/net/usb/lan78xx.c+38−6

 	struct lan78xx_net *dev;
 	enum skb_state state;
 	size_t length;
+	int num_of_packet;
 };
 struct usb_context {
 static void lan78xx_link_status_change(struct net_device *net)
 {
-	/* nothing to do */
+	struct phy_device *phydev = net->phydev;
+	int ret, temp;
+	/* At forced 100 F/H mode, chip may fail to set mode correctly
+	 * when cable is switched between long(~50+m) and short one.
+	 * As workaround, set to 10 before setting to 100
+	 * at forced 100 F/H mode.
+	 */
+	if (!phydev->autoneg && (phydev->speed == 100)) {
+		/* disable phy interrupt */
+		temp = phy_read(phydev, LAN88XX_INT_MASK);
+		temp &= ~LAN88XX_INT_MASK_MDINTPIN_EN_;
+		ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
+		temp = phy_read(phydev, MII_BMCR);
+		temp &= ~(BMCR_SPEED100 | BMCR_SPEED1000);
+		phy_write(phydev, MII_BMCR, temp); /* set to 10 first */
+		temp |= BMCR_SPEED100;
+		phy_write(phydev, MII_BMCR, temp); /* set to 100 later */
+		/* clear pending interrupt generated while workaround */
+		temp = phy_read(phydev, LAN88XX_INT_STS);
+		/* enable phy interrupt back */
+		temp = phy_read(phydev, LAN88XX_INT_MASK);
+		temp |= LAN88XX_INT_MASK_MDINTPIN_EN_;
+		ret = phy_write(phydev, LAN88XX_INT_MASK, temp);
+	}
 }
 static int lan78xx_phy_init(struct lan78xx_net *dev)
 	struct lan78xx_net *dev = entry->dev;
 	if (urb->status == 0) {
-		dev->net->stats.tx_packets++;
+		dev->net->stats.tx_packets += entry->num_of_packet;
 		dev->net->stats.tx_bytes += entry->length;
 	} else {
 		dev->net->stats.tx_errors++;
 		return;
 	}
-	skb->protocol = eth_type_trans(skb, dev->net);
 	dev->net->stats.rx_packets++;
 	dev->net->stats.rx_bytes += skb->len;
+	skb->protocol = eth_type_trans(skb, dev->net);
 	netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n",
 		  skb->len + sizeof(struct ethhdr), skb->protocol);
 	memset(skb->cb, 0, sizeof(struct skb_data));
 	skb_totallen = 0;
 	pkt_cnt = 0;
+	count = 0;
+	length = 0;
 	for (skb = tqp->next; pkt_cnt < tqp->qlen; skb = skb->next) {
 		if (skb_is_gso(skb)) {
 			if (pkt_cnt) {
 				/* handle previous packets first */
 				break;
 			}
-			length = skb->len;
+			count = 1;
+			length = skb->len - TX_OVERHEAD;
 			skb2 = skb_dequeue(tqp);
 			goto gso_skb;
 		}
 	for (count = pos = 0; count < pkt_cnt; count++) {
 		skb2 = skb_dequeue(tqp);
 		if (skb2) {
+			length += (skb2->len - TX_OVERHEAD);
 			memcpy(skb->data + pos, skb2->data, skb2->len);
 			pos += roundup(skb2->len, sizeof(u32));
 			dev_kfree_skb(skb2);
 		}
 	}
-	length = skb_totallen;
 gso_skb:
 	urb = usb_alloc_urb(0, GFP_ATOMIC);
 	if (!urb) {
 	entry->urb = urb;
 	entry->dev = dev;
 	entry->length = length;
+	entry->num_of_packet = count;
 	spin_lock_irqsave(&dev->txq.lock, flags);
 	ret = usb_autopm_get_interface_async(dev->intf);

drivers/net/usb/pegasus.c+5−5

@@ -411,7 +411,7 @@ static int enable_net_traffic(struct net_device dev, struct usb_device usb) · 410 unmodified lines
411	int ret;	411	int ret;
412		412
413	read_mii_word(pegasus, pegasus->phy, MII_LPA, &linkpart);	413	read_mii_word(pegasus, pegasus->phy, MII_LPA, &linkpart);
414	data[0] = 0xc9;	414	data[0] = 0xc8; /* TX & RX enable, append status, no CRC */
415	data[1] = 0;	415	data[1] = 0;
416	if (linkpart & (ADVERTISE_100FULL \| ADVERTISE_10FULL))	416	if (linkpart & (ADVERTISE_100FULL \| ADVERTISE_10FULL))
417	data[1] \|= 0x20; /* set full duplex */	417	data[1] \|= 0x20; /* set full duplex */
@@ -497,7 +497,7 @@ static void read_bulk_callback(struct urb *urb) · 79 unmodified lines
497	pkt_len = buf[count - 3] << 8;	497	pkt_len = buf[count - 3] << 8;
498	pkt_len += buf[count - 4];	498	pkt_len += buf[count - 4];
499	pkt_len &= 0xfff;	499	pkt_len &= 0xfff;
500	pkt_len -= 8;	500	pkt_len -= 4;
501	}	501	}
502		502
503	/*	503	/*
@@ -528,7 +528,7 @@ static void read_bulk_callback(struct urb *urb) · 24 unmodified lines
528	goon:	528	goon:
529	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,	529	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,
530	usb_rcvbulkpipe(pegasus->usb, 1),	530	usb_rcvbulkpipe(pegasus->usb, 1),
531	pegasus->rx_skb->data, PEGASUS_MTU + 8,	531	pegasus->rx_skb->data, PEGASUS_MTU,
532	read_bulk_callback, pegasus);	532	read_bulk_callback, pegasus);
533	rx_status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);	533	rx_status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);
534	if (rx_status == -ENODEV)	534	if (rx_status == -ENODEV)
@@ -569,7 +569,7 @@ static void rx_fixup(unsigned long data) · 34 unmodified lines
569	}	569	}
570	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,	570	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,
571	usb_rcvbulkpipe(pegasus->usb, 1),	571	usb_rcvbulkpipe(pegasus->usb, 1),
572	pegasus->rx_skb->data, PEGASUS_MTU + 8,	572	pegasus->rx_skb->data, PEGASUS_MTU,
573	read_bulk_callback, pegasus);	573	read_bulk_callback, pegasus);
574	try_again:	574	try_again:
575	status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);	575	status = usb_submit_urb(pegasus->rx_urb, GFP_ATOMIC);
@@ -823,7 +823,7 @@ static int pegasus_open(struct net_device *net) · 247 unmodified lines
823		823
824	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,	824	usb_fill_bulk_urb(pegasus->rx_urb, pegasus->usb,
825	usb_rcvbulkpipe(pegasus->usb, 1),	825	usb_rcvbulkpipe(pegasus->usb, 1),
826	pegasus->rx_skb->data, PEGASUS_MTU + 8,	826	pegasus->rx_skb->data, PEGASUS_MTU,
827	read_bulk_callback, pegasus);	827	read_bulk_callback, pegasus);
828	if ((res = usb_submit_urb(pegasus->rx_urb, GFP_KERNEL))) {	828	if ((res = usb_submit_urb(pegasus->rx_urb, GFP_KERNEL))) {
829	if (res == -ENODEV)	829	if (res == -ENODEV)

drivers/net/usb/smsc75xx.c+11−1

 #include <linux/crc32.h>
 #include <linux/usb/usbnet.h>
 #include <linux/slab.h>
+#include <linux/of_net.h>
 #include "smsc75xx.h"
 #define SMSC_CHIPNAME			"smsc75xx"
 static void smsc75xx_init_mac_address(struct usbnet *dev)
 {
+	const u8 *mac_addr;
+	/* maybe the boot loader passed the MAC address in devicetree */
+	mac_addr = of_get_mac_address(dev->udev->dev.of_node);
+	if (mac_addr) {
+		memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
+		return;
+	}
 	/* try reading mac address from EEPROM */
 	if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 			dev->net->dev_addr) == 0) {
 		}
 	}
-	/* no eeprom, or eeprom values are invalid. generate random MAC */
+	/* no useful static MAC address found. generate a random one */
 	eth_hw_addr_random(dev->net);
 	netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
 }

drivers/net/usb/smsc95xx.c+11−1

 #include <linux/crc32.h>
 #include <linux/usb/usbnet.h>
 #include <linux/slab.h>
+#include <linux/of_net.h>
 #include "smsc95xx.h"
 #define SMSC_CHIPNAME			"smsc95xx"
 static void smsc95xx_init_mac_address(struct usbnet *dev)
 {
+	const u8 *mac_addr;
+	/* maybe the boot loader passed the MAC address in devicetree */
+	mac_addr = of_get_mac_address(dev->udev->dev.of_node);
+	if (mac_addr) {
+		memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN);
+		return;
+	}
 	/* try reading mac address from EEPROM */
 	if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
 			dev->net->dev_addr) == 0) {
 		}
 	}
-	/* no eeprom, or eeprom values are invalid. generate random MAC */
+	/* no useful static MAC address found. generate a random one */
 	eth_hw_addr_random(dev->net);
 	netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
 }

drivers/net/wireless/ath/ath9k/ar5008_phy.c+3−5

 	};
 	static const int inc[4] = { 0, 100, 0, 0 };
+	memset(&mask_m, 0, sizeof(int8_t) * 123);
+	memset(&mask_p, 0, sizeof(int8_t) * 123);
 	cur_bin = -6000;
 	upper = bin + 100;
 	lower = bin - 100;
 	int tmp, new;
 	int i;
-	int8_t mask_m[123];
-	int8_t mask_p[123];
 	int cur_bb_spur;
 	bool is2GHz = IS_CHAN_2GHZ(chan);
-	memset(&mask_m, 0, sizeof(int8_t) * 123);
-	memset(&mask_p, 0, sizeof(int8_t) * 123);
 	for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
 		cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
 		if (AR_NO_SPUR == cur_bb_spur)

drivers/net/wireless/ath/ath9k/ar9002_phy.c+0−5

 	int i;
 	struct chan_centers centers;
-	int8_t mask_m[123];
-	int8_t mask_p[123];
 	int cur_bb_spur;
 	bool is2GHz = IS_CHAN_2GHZ(chan);
-	memset(&mask_m, 0, sizeof(int8_t) * 123);
-	memset(&mask_p, 0, sizeof(int8_t) * 123);
 	ath9k_hw_get_channel_centers(ah, chan, &centers);
 	freq = centers.synth_center;

drivers/net/wireless/intel/iwlwifi/iwl-8000.c+1−1

@@ -89,7 +89,7 @@ · 88 unmodified lines
89	#define IWL8260_SMEM_OFFSET 0x400000	89	#define IWL8260_SMEM_OFFSET 0x400000
90	#define IWL8260_SMEM_LEN 0x68000	90	#define IWL8260_SMEM_LEN 0x68000
91		91
92	#define IWL8000_FW_PRE "iwlwifi-8000"	92	#define IWL8000_FW_PRE "iwlwifi-8000C-"
93	#define IWL8000_MODULE_FIRMWARE(api) \	93	#define IWL8000_MODULE_FIRMWARE(api) \
94	IWL8000_FW_PRE "-" __stringify(api) ".ucode"	94	IWL8000_FW_PRE "-" __stringify(api) ".ucode"
95		95

drivers/net/wireless/intel/iwlwifi/iwl-drv.c+0−13

@@ -240,19 +240,6 @@ static int iwl_request_firmware(struct iwl_drv *drv, bool first) · 239 unmodified lines
240	snprintf(drv->firmware_name, sizeof(drv->firmware_name), "%s%s.ucode",	240	snprintf(drv->firmware_name, sizeof(drv->firmware_name), "%s%s.ucode",
241	name_pre, tag);	241	name_pre, tag);
242		242
243	/*
244	* Starting 8000B - FW name format has changed. This overwrites the
245	* previous name and uses the new format.
246	*/
247	if (drv->trans->cfg->device_family == IWL_DEVICE_FAMILY_8000) {
248	char rev_step = 'A' + CSR_HW_REV_STEP(drv->trans->hw_rev);
249
250	if (rev_step != 'A')
251	snprintf(drv->firmware_name,
252	sizeof(drv->firmware_name), "%s%c-%s.ucode",
253	name_pre, rev_step, tag);
254	}
255
256	IWL_DEBUG_INFO(drv, "attempting to load firmware %s'%s'\n",	243	IWL_DEBUG_INFO(drv, "attempting to load firmware %s'%s'\n",
257	(drv->fw_index == UCODE_EXPERIMENTAL_INDEX)	244	(drv->fw_index == UCODE_EXPERIMENTAL_INDEX)
258	? "EXPERIMENTAL " : "",	245	? "EXPERIMENTAL " : "",

drivers/net/wireless/intel/iwlwifi/mvm/fw-dbg.c+4−2

 	}
 	/* Make room for fw's virtual image pages, if it exists */
-	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size)
+	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size &&
+	    mvm->fw_paging_db[0].fw_paging_block)
 		file_len += mvm->num_of_paging_blk *
 			(sizeof(*dump_data) +
 			 sizeof(struct iwl_fw_error_dump_paging) +
 	}
 	/* Dump fw's virtual image */
-	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size) {
+	if (mvm->fw->img[mvm->cur_ucode].paging_mem_size &&
+	    mvm->fw_paging_db[0].fw_paging_block) {
 		for (i = 1; i < mvm->num_of_paging_blk + 1; i++) {
 			struct iwl_fw_error_dump_paging *paging;
 			struct page *pages =

drivers/net/wireless/intel/iwlwifi/mvm/fw.c+2−0

 		__free_pages(mvm->fw_paging_db[i].fw_paging_block,
 			     get_order(mvm->fw_paging_db[i].fw_paging_size));
+		mvm->fw_paging_db[i].fw_paging_block = NULL;
 	}
 	kfree(mvm->trans->paging_download_buf);
 	mvm->trans->paging_download_buf = NULL;
+	mvm->trans->paging_db = NULL;
 	memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
 }

drivers/net/wireless/intel/iwlwifi/pcie/drv.c+10−0

@@ -479,8 +479,18 @@ static const struct pci_device_id iwl_hw_card_ids[] = { · 478 unmodified lines
479	{IWL_PCI_DEVICE(0x24F3, 0x0930, iwl8260_2ac_cfg)},	479	{IWL_PCI_DEVICE(0x24F3, 0x0930, iwl8260_2ac_cfg)},
480	{IWL_PCI_DEVICE(0x24F3, 0x0000, iwl8265_2ac_cfg)},	480	{IWL_PCI_DEVICE(0x24F3, 0x0000, iwl8265_2ac_cfg)},
481	{IWL_PCI_DEVICE(0x24FD, 0x0010, iwl8265_2ac_cfg)},	481	{IWL_PCI_DEVICE(0x24FD, 0x0010, iwl8265_2ac_cfg)},
		482	{IWL_PCI_DEVICE(0x24FD, 0x0110, iwl8265_2ac_cfg)},
		483	{IWL_PCI_DEVICE(0x24FD, 0x1110, iwl8265_2ac_cfg)},
		484	{IWL_PCI_DEVICE(0x24FD, 0x1010, iwl8265_2ac_cfg)},
		485	{IWL_PCI_DEVICE(0x24FD, 0x0050, iwl8265_2ac_cfg)},
		486	{IWL_PCI_DEVICE(0x24FD, 0x0150, iwl8265_2ac_cfg)},
		487	{IWL_PCI_DEVICE(0x24FD, 0x9010, iwl8265_2ac_cfg)},
		488	{IWL_PCI_DEVICE(0x24FD, 0x8110, iwl8265_2ac_cfg)},
		489	{IWL_PCI_DEVICE(0x24FD, 0x8050, iwl8265_2ac_cfg)},
482	{IWL_PCI_DEVICE(0x24FD, 0x8010, iwl8265_2ac_cfg)},	490	{IWL_PCI_DEVICE(0x24FD, 0x8010, iwl8265_2ac_cfg)},
483	{IWL_PCI_DEVICE(0x24FD, 0x0810, iwl8265_2ac_cfg)},	491	{IWL_PCI_DEVICE(0x24FD, 0x0810, iwl8265_2ac_cfg)},
		492	{IWL_PCI_DEVICE(0x24FD, 0x9110, iwl8265_2ac_cfg)},
		493	{IWL_PCI_DEVICE(0x24FD, 0x8130, iwl8265_2ac_cfg)},
484		494
485	/* 9000 Series */	495	/* 9000 Series */
486	{IWL_PCI_DEVICE(0x9DF0, 0x0A10, iwl9560_2ac_cfg)},	496	{IWL_PCI_DEVICE(0x9DF0, 0x0A10, iwl9560_2ac_cfg)},

drivers/platform/x86/toshiba_acpi.c+1−1

@@ -135,7 +135,7 @@ MODULE_LICENSE("GPL"); · 134 unmodified lines
135	/* Field definitions */	135	/* Field definitions */
136	#define HCI_ACCEL_MASK 0x7fff	136	#define HCI_ACCEL_MASK 0x7fff
137	#define HCI_HOTKEY_DISABLE 0x0b	137	#define HCI_HOTKEY_DISABLE 0x0b
138	#define HCI_HOTKEY_ENABLE 0x01	138	#define HCI_HOTKEY_ENABLE 0x09
139	#define HCI_HOTKEY_SPECIAL_FUNCTIONS 0x10	139	#define HCI_HOTKEY_SPECIAL_FUNCTIONS 0x10
140	#define HCI_LCD_BRIGHTNESS_BITS 3	140	#define HCI_LCD_BRIGHTNESS_BITS 3
141	#define HCI_LCD_BRIGHTNESS_SHIFT (16-HCI_LCD_BRIGHTNESS_BITS)	141	#define HCI_LCD_BRIGHTNESS_SHIFT (16-HCI_LCD_BRIGHTNESS_BITS)

drivers/rapidio/devices/rio_mport_cdev.c+2−2

@@ -2669,9 +2669,9 @@ static int __init mport_init(void) · 2668 unmodified lines
2669		2669
2670	/* Create device class needed by udev */	2670	/* Create device class needed by udev */
2671	dev_class = class_create(THIS_MODULE, DRV_NAME);	2671	dev_class = class_create(THIS_MODULE, DRV_NAME);
2672	if (!dev_class) {	2672	if (IS_ERR(dev_class)) {
2673	rmcd_error("Unable to create " DRV_NAME " class");	2673	rmcd_error("Unable to create " DRV_NAME " class");
2674	return -EINVAL;	2674	return PTR_ERR(dev_class);
2675	}	2675	}
2676		2676
2677	ret = alloc_chrdev_region(&dev_number, 0, RIO_MAX_MPORTS, DRV_NAME);	2677	ret = alloc_chrdev_region(&dev_number, 0, RIO_MAX_MPORTS, DRV_NAME);

drivers/s390/char/sclp_ctl.c+7−5

 {
 	struct sclp_ctl_sccb ctl_sccb;
 	struct sccb_header *sccb;
+	unsigned long copied;
 	int rc;
 	if (copy_from_user(&ctl_sccb, user_area, sizeof(ctl_sccb)))
 	sccb = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
 	if (!sccb)
 		return -ENOMEM;
-	if (copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), sizeof(*sccb))) {
+	copied = PAGE_SIZE -
+		copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), PAGE_SIZE);
+	if (offsetof(struct sccb_header, length) +
+	    sizeof(sccb->length) > copied || sccb->length > copied) {
 		rc = -EFAULT;
 		goto out_free;
 	}
-	if (sccb->length > PAGE_SIZE || sccb->length < 8)
+	if (sccb->length < 8) {
-		return -EINVAL;
+		rc = -EINVAL;
-	if (copy_from_user(sccb, u64_to_uptr(ctl_sccb.sccb), sccb->length)) {
-		rc = -EFAULT;
 		goto out_free;
 	}
 	rc = sclp_sync_request(ctl_sccb.cmdw, sccb);

drivers/staging/media/davinci_vpfe/vpfe_video.c+34−20

 static int vpfe_update_pipe_state(struct vpfe_video_device *video)
 {
 	struct vpfe_pipeline *pipe = &video->pipe;
+	int ret;
-	if (vpfe_prepare_pipeline(video))
+	ret = vpfe_prepare_pipeline(video);
-		return vpfe_prepare_pipeline(video);
+	if (ret)
+		return ret;
 	/*
 	 * Find out if there is any input video
 	 */
 	if (pipe->input_num == 0) {
 		pipe->state = VPFE_PIPELINE_STREAM_CONTINUOUS;
-		if (vpfe_update_current_ext_subdev(video)) {
+		ret = vpfe_update_current_ext_subdev(video);
+		if (ret) {
 			pr_err("Invalid external subdev\n");
-			return vpfe_update_current_ext_subdev(video);
+			return ret;
 		}
 	} else {
 		pipe->state = VPFE_PIPELINE_STREAM_SINGLESHOT;
 	struct v4l2_subdev *subdev;
 	struct v4l2_format format;
 	struct media_pad *remote;
+	int ret;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_enum_fmt\n");
 	sd_fmt.pad = remote->index;
 	sd_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
 	/* get output format of remote subdev */
-	if (v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt)) {
+	ret = v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt);
+	if (ret) {
 		v4l2_err(&vpfe_dev->v4l2_dev,
 			 "invalid remote subdev for video node\n");
-		return v4l2_subdev_call(subdev, pad, get_fmt, NULL, &sd_fmt);
+		return ret;
 	}
 	/* convert to pix format */
 	mbus.code = sd_fmt.format.code;
 	struct vpfe_video_device *video = video_drvdata(file);
 	struct vpfe_device *vpfe_dev = video->vpfe_dev;
 	struct v4l2_format format;
+	int ret;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_fmt\n");
 	/* If streaming is started, return error */
 		return -EBUSY;
 	}
 	/* get adjacent subdev's output pad format */
-	if (__vpfe_video_get_format(video, &format))
+	ret = __vpfe_video_get_format(video, &format);
-		return __vpfe_video_get_format(video, &format);
+	if (ret)
+		return ret;
 	*fmt = format;
 	video->fmt = *fmt;
 	return 0;
 	struct vpfe_video_device *video = video_drvdata(file);
 	struct vpfe_device *vpfe_dev = video->vpfe_dev;
 	struct v4l2_format format;
+	int ret;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_try_fmt\n");
 	/* get adjacent subdev's output pad format */
-	if (__vpfe_video_get_format(video, &format))
+	ret = __vpfe_video_get_format(video, &format);
-		return __vpfe_video_get_format(video, &format);
+	if (ret)
+		return ret;
 	*fmt = format;
 	return 0;
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_input\n");
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	/*
 	 * If streaming is started return device busy
 	 * error
 	v4l2_dbg(1, debug, &vpfe_dev->v4l2_dev, "vpfe_s_std\n");
 	/* Call decoder driver function to set the standard */
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	sdinfo = video->current_ext_subdev;
 	/* If streaming is started, return device busy error */
 	if (video->started) {
 		return -EINVAL;
 	}
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	if (video->io_usrs != 0) {
 		v4l2_err(&vpfe_dev->v4l2_dev, "Only one IO user allowed\n");
 	q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
 	q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
-	if (vb2_queue_init(q)) {
+	ret = vb2_queue_init(q);
+	if (ret) {
 		v4l2_err(&vpfe_dev->v4l2_dev, "vb2_queue_init() failed\n");
 		vb2_dma_contig_cleanup_ctx(vpfe_dev->pdev);
-		return vb2_queue_init(q);
+		return ret;
 	}
 	fh->io_allowed = 1;
 		return -EINVAL;
 	}
-	if (mutex_lock_interruptible(&video->lock))
+	ret = mutex_lock_interruptible(&video->lock);
-		return mutex_lock_interruptible(&video->lock);
+	if (ret)
+		return ret;
 	vpfe_stop_capture(video);
 	ret = vb2_streamoff(&video->buffer_queue, buf_type);

drivers/staging/rdma/hfi1/TODO+1−1

@@ -3,4 +3,4 @@ July, 2015 · 2 unmodified lines
3	- Remove unneeded file entries in sysfs	3	- Remove unneeded file entries in sysfs
4	- Remove software processing of IB protocol and place in library for use	4	- Remove software processing of IB protocol and place in library for use
5	by qib, ipath (if still present), hfi1, and eventually soft-roce	5	by qib, ipath (if still present), hfi1, and eventually soft-roce
6		6	- Replace incorrect uAPI

drivers/staging/rdma/hfi1/file_ops.c+35−56

 #include <linux/vmalloc.h>
 #include <linux/io.h>
+#include <rdma/ib.h>
 #include "hfi.h"
 #include "pio.h"
 #include "device.h"
 	int uctxt_required = 1;
 	int must_be_root = 0;
+	/* FIXME: This interface cannot continue out of staging */
+	if (WARN_ON_ONCE(!ib_safe_file_access(fp)))
+		return -EACCES;
 	if (count < sizeof(cmd)) {
 		ret = -EINVAL;
 		goto bail;
 	spin_unlock_irqrestore(&dd->uctxt_lock, flags);
 	dd->rcd[uctxt->ctxt] = NULL;
+	hfi1_user_exp_rcv_free(fdata);
+	hfi1_clear_ctxt_pkey(dd, uctxt->ctxt);
 	uctxt->rcvwait_to = 0;
 	uctxt->piowait_to = 0;
 	uctxt->rcvnowait = 0;
 	uctxt->pionowait = 0;
 	uctxt->event_flags = 0;
-	hfi1_user_exp_rcv_free(fdata);
-	hfi1_clear_ctxt_pkey(dd, uctxt->ctxt);
 	hfi1_stats.sps_ctxts--;
 	if (++dd->freectxts == dd->num_user_contexts)
 		aspm_enable_all(dd);
 static int user_init(struct file *fp)
 {
-	int ret;
 	unsigned int rcvctrl_ops = 0;
 	struct hfi1_filedata *fd = fp->private_data;
 	struct hfi1_ctxtdata *uctxt = fd->uctxt;
 	/* make sure that the context has already been setup */
-	if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags)) {
+	if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags))
-		ret = -EFAULT;
+		return -EFAULT;
-		goto done;
-	}
-	/*
-	 * Subctxts don't need to initialize anything since master
-	 * has done it.
-	 */
-	if (fd->subctxt) {
-		ret = wait_event_interruptible(uctxt->wait, !test_bit(
-					       HFI1_CTXT_MASTER_UNINIT,
-					       &uctxt->event_flags));
-		goto expected;
-	}
 	/* initialize poll variables... */
 	uctxt->urgent = 0;
 		wake_up(&uctxt->wait);
 	}
-expected:
+	return 0;
-	/*
-	 * Expected receive has to be setup for all processes (including
-	 * shared contexts). However, it has to be done after the master
-	 * context has been fully configured as it depends on the
-	 * eager/expected split of the RcvArray entries.
-	 * Setting it up here ensures that the subcontexts will be waiting
-	 * (due to the above wait_event_interruptible() until the master
-	 * is setup.
-	 */
-	ret = hfi1_user_exp_rcv_init(fp);
-done:
-	return ret;
 }
 static int get_ctxt_info(struct file *fp, void __user *ubase, __u32 len)
 	int ret = 0;
 	/*
-	 * Context should be set up only once (including allocation and
+	 * Context should be set up only once, including allocation and
 	 * programming of eager buffers. This is done if context sharing
 	 * is not requested or by the master process.
 	 */
 			if (ret)
 				goto done;
 		}
+	} else {
+		ret = wait_event_interruptible(uctxt->wait, !test_bit(
+					       HFI1_CTXT_MASTER_UNINIT,
+					       &uctxt->event_flags));
+		if (ret)
+			goto done;
 	}
 	ret = hfi1_user_sdma_alloc_queues(uctxt, fp);
+	if (ret)
+		goto done;
+	/*
+	 * Expected receive has to be setup for all processes (including
+	 * shared contexts). However, it has to be done after the master
+	 * context has been fully configured as it depends on the
+	 * eager/expected split of the RcvArray entries.
+	 * Setting it up here ensures that the subcontexts will be waiting
+	 * (due to the above wait_event_interruptible() until the master
+	 * is setup.
+	 */
+	ret = hfi1_user_exp_rcv_init(fp);
 	if (ret)
 		goto done;
 {
 	struct hfi1_devdata *dd = filp->private_data;
-	switch (whence) {
+	return fixed_size_llseek(filp, offset, whence,
-	case SEEK_SET:
+		(dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE);
-		break;
-	case SEEK_CUR:
-		offset += filp->f_pos;
-		break;
-	case SEEK_END:
-		offset = ((dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE) -
-			offset;
-		break;
-	default:
-		return -EINVAL;
-	}
-	if (offset < 0)
-		return -EINVAL;
-	if (offset >= (dd->kregend - dd->kregbase) + DC8051_DATA_MEM_SIZE)
-		return -EINVAL;
-	filp->f_pos = offset;
-	return filp->f_pos;
 }
 /* NOTE: assumes unsigned long is 8 bytes */

drivers/staging/rdma/hfi1/mmu_rb.c+25−15

 					    struct mm_struct *,
 					    unsigned long, unsigned long);
 static void mmu_notifier_mem_invalidate(struct mmu_notifier *,
+					struct mm_struct *,
 					unsigned long, unsigned long);
 static struct mmu_rb_node *__mmu_rb_search(struct mmu_rb_handler *,
 					   unsigned long, unsigned long);
 			rbnode = rb_entry(node, struct mmu_rb_node, node);
 			rb_erase(node, root);
 			if (handler->ops->remove)
-				handler->ops->remove(root, rbnode, false);
+				handler->ops->remove(root, rbnode, NULL);
 		}
 	}
 	return ret;
 }
-/* Caller must host handler lock */
+/* Caller must hold handler lock */
 static struct mmu_rb_node *__mmu_rb_search(struct mmu_rb_handler *handler,
 					   unsigned long addr,
 					   unsigned long len)
 	return node;
 }
+/* Caller must *not* hold handler lock. */
 static void __mmu_rb_remove(struct mmu_rb_handler *handler,
-			    struct mmu_rb_node *node, bool arg)
+			    struct mmu_rb_node *node, struct mm_struct *mm)
 {
+	unsigned long flags;
 	/* Validity of handler and node pointers has been checked by caller. */
 	hfi1_cdbg(MMU, "Removing node addr 0x%llx, len %u", node->addr,
 		  node->len);
+	spin_lock_irqsave(&handler->lock, flags);
 	__mmu_int_rb_remove(node, handler->root);
+	spin_unlock_irqrestore(&handler->lock, flags);
 	if (handler->ops->remove)
-		handler->ops->remove(handler->root, node, arg);
+		handler->ops->remove(handler->root, node, mm);
 }
 struct mmu_rb_node *hfi1_mmu_rb_search(struct rb_root *root, unsigned long addr,
 void hfi1_mmu_rb_remove(struct rb_root *root, struct mmu_rb_node *node)
 {
 	struct mmu_rb_handler *handler = find_mmu_handler(root);
-	unsigned long flags;
 	if (!handler || !node)
 		return;
-	spin_lock_irqsave(&handler->lock, flags);
+	__mmu_rb_remove(handler, node, NULL);
-	__mmu_rb_remove(handler, node, false);
-	spin_unlock_irqrestore(&handler->lock, flags);
 }
 static struct mmu_rb_handler *find_mmu_handler(struct rb_root *root)
 static inline void mmu_notifier_page(struct mmu_notifier *mn,
 				     struct mm_struct *mm, unsigned long addr)
 {
-	mmu_notifier_mem_invalidate(mn, addr, addr + PAGE_SIZE);
+	mmu_notifier_mem_invalidate(mn, mm, addr, addr + PAGE_SIZE);
 }
 static inline void mmu_notifier_range_start(struct mmu_notifier *mn,
 					    unsigned long start,
 					    unsigned long end)
 {
-	mmu_notifier_mem_invalidate(mn, start, end);
+	mmu_notifier_mem_invalidate(mn, mm, start, end);
 }
 static void mmu_notifier_mem_invalidate(struct mmu_notifier *mn,
+					struct mm_struct *mm,
 					unsigned long start, unsigned long end)
 {
 	struct mmu_rb_handler *handler =
 		container_of(mn, struct mmu_rb_handler, mn);
 	struct rb_root *root = handler->root;
-	struct mmu_rb_node *node;
+	struct mmu_rb_node *node, *ptr = NULL;
 	unsigned long flags;
 	spin_lock_irqsave(&handler->lock, flags);
-	for (node = __mmu_int_rb_iter_first(root, start, end - 1); node;
+	for (node = __mmu_int_rb_iter_first(root, start, end - 1);
-	     node = __mmu_int_rb_iter_next(node, start, end - 1)) {
+	     node; node = ptr) {
+		/* Guard against node removal. */
+		ptr = __mmu_int_rb_iter_next(node, start, end - 1);
 		hfi1_cdbg(MMU, "Invalidating node addr 0x%llx, len %u",
 			  node->addr, node->len);
-		if (handler->ops->invalidate(root, node))
+		if (handler->ops->invalidate(root, node)) {
-			__mmu_rb_remove(handler, node, true);
+			spin_unlock_irqrestore(&handler->lock, flags);
+			__mmu_rb_remove(handler, node, mm);
+			spin_lock_irqsave(&handler->lock, flags);
+		}
 	}
 	spin_unlock_irqrestore(&handler->lock, flags);
 }

drivers/staging/rdma/hfi1/mmu_rb.h+2−1

@@ -59,7 +59,8 @@ struct mmu_rb_node { · 58 unmodified lines
59	struct mmu_rb_ops {	59	struct mmu_rb_ops {
60	bool (filter)(struct mmu_rb_node , unsigned long, unsigned long);	60	bool (filter)(struct mmu_rb_node , unsigned long, unsigned long);
61	int (insert)(struct rb_root , struct mmu_rb_node *);	61	int (insert)(struct rb_root , struct mmu_rb_node *);
62	void (remove)(struct rb_root , struct mmu_rb_node *, bool);	62	void (remove)(struct rb_root , struct mmu_rb_node *,
		63	struct mm_struct *);
63	int (invalidate)(struct rb_root , struct mmu_rb_node *);	64	int (invalidate)(struct rb_root , struct mmu_rb_node *);
64	};	65	};
65		66

drivers/staging/rdma/hfi1/qp.c+2−0

 	 * do the flush work until that QP's
 	 * sdma work has finished.
 	 */
+	spin_lock(&qp->s_lock);
 	if (qp->s_flags & RVT_S_WAIT_DMA) {
 		qp->s_flags &= ~RVT_S_WAIT_DMA;
 		hfi1_schedule_send(qp);
 	}
+	spin_unlock(&qp->s_lock);
 }
 /**

drivers/staging/rdma/hfi1/user_exp_rcv.c+7−4

 static int set_rcvarray_entry(struct file *, unsigned long, u32,
 			      struct tid_group *, struct page **, unsigned);
 static int mmu_rb_insert(struct rb_root *, struct mmu_rb_node *);
-static void mmu_rb_remove(struct rb_root *, struct mmu_rb_node *, bool);
+static void mmu_rb_remove(struct rb_root *, struct mmu_rb_node *,
+			  struct mm_struct *);
 static int mmu_rb_invalidate(struct rb_root *, struct mmu_rb_node *);
 static int program_rcvarray(struct file *, unsigned long, struct tid_group *,
 			    struct tid_pageset *, unsigned, u16, struct page **,
 	struct hfi1_ctxtdata *uctxt = fd->uctxt;
 	struct tid_group *grp, *gptr;
+	if (!test_bit(HFI1_CTXT_SETUP_DONE, &uctxt->event_flags))
+		return 0;
 	/*
 	 * The notifier would have been removed when the process'es mm
 	 * was freed.
 	if (!node || node->rcventry != (uctxt->expected_base + rcventry))
 		return -EBADF;
 	if (HFI1_CAP_IS_USET(TID_UNMAP))
-		mmu_rb_remove(&fd->tid_rb_root, &node->mmu, false);
+		mmu_rb_remove(&fd->tid_rb_root, &node->mmu, NULL);
 	else
 		hfi1_mmu_rb_remove(&fd->tid_rb_root, &node->mmu);
 					continue;
 				if (HFI1_CAP_IS_USET(TID_UNMAP))
 					mmu_rb_remove(&fd->tid_rb_root,
-						      &node->mmu, false);
+						      &node->mmu, NULL);
 				else
 					hfi1_mmu_rb_remove(&fd->tid_rb_root,
 							   &node->mmu);
 }
 static void mmu_rb_remove(struct rb_root *root, struct mmu_rb_node *node,
-			  bool notifier)
+			  struct mm_struct *mm)
 {
 	struct hfi1_filedata *fdata =
 		container_of(root, struct hfi1_filedata, tid_rb_root);

drivers/staging/rdma/hfi1/user_sdma.c+22−11

 static void user_sdma_free_request(struct user_sdma_request *, bool);
 static int pin_vector_pages(struct user_sdma_request *,
 			    struct user_sdma_iovec *);
-static void unpin_vector_pages(struct mm_struct *, struct page **, unsigned);
+static void unpin_vector_pages(struct mm_struct *, struct page **, unsigned,
+			       unsigned);
 static int check_header_template(struct user_sdma_request *,
 				 struct hfi1_pkt_header *, u32, u32);
 static int set_txreq_header(struct user_sdma_request *,
 static void activate_packet_queue(struct iowait *, int);
 static bool sdma_rb_filter(struct mmu_rb_node *, unsigned long, unsigned long);
 static int sdma_rb_insert(struct rb_root *, struct mmu_rb_node *);
-static void sdma_rb_remove(struct rb_root *, struct mmu_rb_node *, bool);
+static void sdma_rb_remove(struct rb_root *, struct mmu_rb_node *,
+			   struct mm_struct *);
 static int sdma_rb_invalidate(struct rb_root *, struct mmu_rb_node *);
 static struct mmu_rb_ops sdma_rb_ops = {
 	rb_node = hfi1_mmu_rb_search(&pq->sdma_rb_root,
 				     (unsigned long)iovec->iov.iov_base,
 				     iovec->iov.iov_len);
-	if (rb_node)
+	if (rb_node && !IS_ERR(rb_node))
 		node = container_of(rb_node, struct sdma_mmu_node, rb);
+	else
+		rb_node = NULL;
 	if (!node) {
 		node = kzalloc(sizeof(*node), GFP_KERNEL);
 			goto bail;
 		}
 		if (pinned != npages) {
-			unpin_vector_pages(current->mm, pages, pinned);
+			unpin_vector_pages(current->mm, pages, node->npages,
+					   pinned);
 			ret = -EFAULT;
 			goto bail;
 		}
 }
 static void unpin_vector_pages(struct mm_struct *mm, struct page **pages,
-			       unsigned npages)
+			       unsigned start, unsigned npages)
 {
-	hfi1_release_user_pages(mm, pages, npages, 0);
+	hfi1_release_user_pages(mm, pages + start, npages, 0);
 	kfree(pages);
 }
 				&req->pq->sdma_rb_root,
 				(unsigned long)req->iovs[i].iov.iov_base,
 				req->iovs[i].iov.iov_len);
-			if (!mnode)
+			if (!mnode || IS_ERR(mnode))
 				continue;
 			node = container_of(mnode, struct sdma_mmu_node, rb);
 }
 static void sdma_rb_remove(struct rb_root *root, struct mmu_rb_node *mnode,
-			   bool notifier)
+			   struct mm_struct *mm)
 {
 	struct sdma_mmu_node *node =
 		container_of(mnode, struct sdma_mmu_node, rb);
 	node->pq->n_locked -= node->npages;
 	spin_unlock(&node->pq->evict_lock);
-	unpin_vector_pages(notifier ? NULL : current->mm, node->pages,
+	/*
+	 * If mm is set, we are being called by the MMU notifier and we
+	 * should not pass a mm_struct to unpin_vector_page(). This is to
+	 * prevent a deadlock when hfi1_release_user_pages() attempts to
+	 * take the mmap_sem, which the MMU notifier has already taken.
+	 */
+	unpin_vector_pages(mm ? NULL : current->mm, node->pages, 0,
 			   node->npages);
 	/*
 	 * If called by the MMU notifier, we have to adjust the pinned
 	 * page count ourselves.
 	 */
-	if (notifier)
+	if (mm)
-		current->mm->pinned_vm -= node->npages;
+		mm->pinned_vm -= node->npages;
 	kfree(node);
 }

drivers/thermal/hisi_thermal.c+2−2

@@ -68,12 +68,12 @@ static inline int _step_to_temp(int step) · 67 unmodified lines
68	* Every step equals (1 * 200) / 255 celsius, and finally	68	* Every step equals (1 * 200) / 255 celsius, and finally
69	* need convert to millicelsius.	69	* need convert to millicelsius.
70	*/	70	*/
71	return (HISI_TEMP_BASE + (step * 200 / 255)) * 1000;	71	return (HISI_TEMP_BASE * 1000 + (step * 200000 / 255));
72	}	72	}
73		73
74	static inline long _temp_to_step(long temp)	74	static inline long _temp_to_step(long temp)
75	{	75	{
76	return ((temp / 1000 - HISI_TEMP_BASE) * 255 / 200);	76	return ((temp - HISI_TEMP_BASE * 1000) * 255) / 200000;
77	}	77	}
78		78
79	static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,	79	static long hisi_thermal_get_sensor_temp(struct hisi_thermal_data *data,

drivers/thermal/thermal_core.c+1−1

@@ -959,7 +959,7 @@ static DEVICE_ATTR(sustainable_power, S_IWUSR \| S_IRUGO, sustainable_power_show, · 958 unmodified lines
959	struct thermal_zone_device *tz = to_thermal_zone(dev); \	959	struct thermal_zone_device *tz = to_thermal_zone(dev); \
960	\	960	\
961	if (tz->tzp) \	961	if (tz->tzp) \
962	return sprintf(buf, "%u\n", tz->tzp->name); \	962	return sprintf(buf, "%d\n", tz->tzp->name); \
963	else \	963	else \
964	return -EIO; \	964	return -EIO; \
965	} \	965	} \

fs/ceph/mds_client.c+2−4

 	     atomic_read(&s->s_ref), atomic_read(&s->s_ref)-1);
 	if (atomic_dec_and_test(&s->s_ref)) {
 		if (s->s_auth.authorizer)
-			ceph_auth_destroy_authorizer(
+			ceph_auth_destroy_authorizer(s->s_auth.authorizer);
-				s->s_mdsc->fsc->client->monc.auth,
-				s->s_auth.authorizer);
 		kfree(s);
 	}
 }
 	struct ceph_auth_handshake *auth = &s->s_auth;
 	if (force_new && auth->authorizer) {
-		ceph_auth_destroy_authorizer(ac, auth->authorizer);
+		ceph_auth_destroy_authorizer(auth->authorizer);
 		auth->authorizer = NULL;
 	}
 	if (!auth->authorizer) {

fs/fuse/file.c+1−1

@@ -1295,7 +1295,7 @@ static int fuse_get_user_pages(struct fuse_req req, struct iov_iter ii, · 1294 unmodified lines
1295		1295
1296	*nbytesp = nbytes;	1296	*nbytesp = nbytes;
1297		1297
1298	return ret;	1298	return ret < 0 ? ret : 0;
1299	}	1299	}
1300		1300
1301	static inline int fuse_iter_npages(const struct iov_iter *ii_p)	1301	static inline int fuse_iter_npages(const struct iov_iter *ii_p)

fs/ocfs2/dlm/dlmmaster.c+2−0

@@ -2455,6 +2455,8 @@ int dlm_deref_lockres_done_handler(struct o2net_msg msg, u32 len, void data, · 2454 unmodified lines
2455		2455
2456	spin_unlock(&dlm->spinlock);	2456	spin_unlock(&dlm->spinlock);
2457		2457
		2458	ret = 0;
		2459
2458	done:	2460	done:
2459	dlm_put(dlm);	2461	dlm_put(dlm);
2460	return ret;	2462	return ret;

fs/proc/task_mmu.c+30−3

@@ -1518,6 +1518,32 @@ static struct page can_gather_numa_stats(pte_t pte, struct vm_area_struct vma, · 1517 unmodified lines
1518	return page;	1518	return page;
1519	}	1519	}
1520		1520
		1521	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
		1522	static struct page *can_gather_numa_stats_pmd(pmd_t pmd,
		1523	struct vm_area_struct *vma,
		1524	unsigned long addr)
		1525	{
		1526	struct page *page;
		1527	int nid;
		1528
		1529	if (!pmd_present(pmd))
		1530	return NULL;
		1531
		1532	page = vm_normal_page_pmd(vma, addr, pmd);
		1533	if (!page)
		1534	return NULL;
		1535
		1536	if (PageReserved(page))
		1537	return NULL;
		1538
		1539	nid = page_to_nid(page);
		1540	if (!node_isset(nid, node_states[N_MEMORY]))
		1541	return NULL;
		1542
		1543	return page;
		1544	}
		1545	#endif
		1546
1521	static int gather_pte_stats(pmd_t *pmd, unsigned long addr,	1547	static int gather_pte_stats(pmd_t *pmd, unsigned long addr,
1522	unsigned long end, struct mm_walk *walk)	1548	unsigned long end, struct mm_walk *walk)
1523	{	1549	{
@@ -1527,14 +1553,14 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr, · 3 unmodified lines
1527	pte_t *orig_pte;	1553	pte_t *orig_pte;
1528	pte_t *pte;	1554	pte_t *pte;
1529		1555
		1556	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
1530	ptl = pmd_trans_huge_lock(pmd, vma);	1557	ptl = pmd_trans_huge_lock(pmd, vma);
1531	if (ptl) {	1558	if (ptl) {
1532	pte_t huge_pte = (pte_t )pmd;
1533	struct page *page;	1559	struct page *page;
1534		1560
1535	page = can_gather_numa_stats(huge_pte, vma, addr);	1561	page = can_gather_numa_stats_pmd(*pmd, vma, addr);
1536	if (page)	1562	if (page)
1537	gather_stats(page, md, pte_dirty(huge_pte),	1563	gather_stats(page, md, pmd_dirty(*pmd),
1538	HPAGE_PMD_SIZE/PAGE_SIZE);	1564	HPAGE_PMD_SIZE/PAGE_SIZE);
1539	spin_unlock(ptl);	1565	spin_unlock(ptl);
1540	return 0;	1566	return 0;
@@ -1542,6 +1568,7 @@ static int gather_pte_stats(pmd_t *pmd, unsigned long addr, · 1 unmodified line
1542		1568
1543	if (pmd_trans_unstable(pmd))	1569	if (pmd_trans_unstable(pmd))
1544	return 0;	1570	return 0;
		1571	#endif
1545	orig_pte = pte = pte_offset_map_lock(walk->mm, pmd, addr, &ptl);	1572	orig_pte = pte = pte_offset_map_lock(walk->mm, pmd, addr, &ptl);
1546	do {	1573	do {
1547	struct page page = can_gather_numa_stats(pte, vma, addr);	1574	struct page page = can_gather_numa_stats(pte, vma, addr);

fs/udf/super.c+2−2

@@ -919,14 +919,14 @@ static int udf_load_pvoldesc(struct super_block *sb, sector_t block) · 918 unmodified lines
919	#endif	919	#endif
920	}	920	}
921		921
922	ret = udf_CS0toUTF8(outstr, 31, pvoldesc->volIdent, 32);	922	ret = udf_dstrCS0toUTF8(outstr, 31, pvoldesc->volIdent, 32);
923	if (ret < 0)	923	if (ret < 0)
924	goto out_bh;	924	goto out_bh;
925		925
926	strncpy(UDF_SB(sb)->s_volume_ident, outstr, ret);	926	strncpy(UDF_SB(sb)->s_volume_ident, outstr, ret);
927	udf_debug("volIdent[] = '%s'\n", UDF_SB(sb)->s_volume_ident);	927	udf_debug("volIdent[] = '%s'\n", UDF_SB(sb)->s_volume_ident);
928		928
929	ret = udf_CS0toUTF8(outstr, 127, pvoldesc->volSetIdent, 128);	929	ret = udf_dstrCS0toUTF8(outstr, 127, pvoldesc->volSetIdent, 128);
930	if (ret < 0)	930	if (ret < 0)
931	goto out_bh;	931	goto out_bh;
932		932

fs/udf/udfdecl.h+1−1

@@ -212,7 +212,7 @@ extern int udf_get_filename(struct super_block , const uint8_t , int, · 211 unmodified lines
212	uint8_t *, int);	212	uint8_t *, int);
213	extern int udf_put_filename(struct super_block , const uint8_t , int,	213	extern int udf_put_filename(struct super_block , const uint8_t , int,
214	uint8_t *, int);	214	uint8_t *, int);
215	extern int udf_CS0toUTF8(uint8_t , int, const uint8_t , int);	215	extern int udf_dstrCS0toUTF8(uint8_t , int, const uint8_t , int);
216		216
217	/* ialloc.c */	217	/* ialloc.c */
218	extern void udf_free_inode(struct inode *);	218	extern void udf_free_inode(struct inode *);

fs/udf/unicode.c+14−2

@@ -335,9 +335,21 @@ try_again: · 334 unmodified lines
335	return u_len;	335	return u_len;
336	}	336	}
337		337
338	int udf_CS0toUTF8(uint8_t utf_o, int o_len, const uint8_t ocu_i, int i_len)	338	int udf_dstrCS0toUTF8(uint8_t *utf_o, int o_len,
		339	const uint8_t *ocu_i, int i_len)
339	{	340	{
340	return udf_name_from_CS0(utf_o, o_len, ocu_i, i_len,	341	int s_len = 0;
		342
		343	if (i_len > 0) {
		344	s_len = ocu_i[i_len - 1];
		345	if (s_len >= i_len) {
		346	pr_err("incorrect dstring lengths (%d/%d)\n",
		347	s_len, i_len);
		348	return -EINVAL;
		349	}
		350	}
		351
		352	return udf_name_from_CS0(utf_o, o_len, ocu_i, s_len,
341	udf_uni2char_utf8, 0);	353	udf_uni2char_utf8, 0);
342	}	354	}
343		355

include/linux/bpf.h+2−1

 void bpf_register_map_type(struct bpf_map_type_list *tl);
 struct bpf_prog *bpf_prog_get(u32 ufd);
+struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog);
 void bpf_prog_put(struct bpf_prog *prog);
 void bpf_prog_put_rcu(struct bpf_prog *prog);
 struct bpf_map *bpf_map_get_with_uref(u32 ufd);
 struct bpf_map *__bpf_map_get(struct fd f);
-void bpf_map_inc(struct bpf_map *map, bool uref);
+struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref);
 void bpf_map_put_with_uref(struct bpf_map *map);
 void bpf_map_put(struct bpf_map *map);
 int bpf_map_precharge_memlock(u32 pages);

include/linux/ceph/auth.h+5−5

  */
 struct ceph_auth_client;
-struct ceph_authorizer;
 struct ceph_msg;
+struct ceph_authorizer {
+	void (*destroy)(struct ceph_authorizer *);
+};
 struct ceph_auth_handshake {
 	struct ceph_authorizer *authorizer;
 	void *authorizer_buf;
 				 struct ceph_auth_handshake *auth);
 	int (*verify_authorizer_reply)(struct ceph_auth_client *ac,
 				       struct ceph_authorizer *a, size_t len);
-	void (*destroy_authorizer)(struct ceph_auth_client *ac,
-				   struct ceph_authorizer *a);
 	void (*invalidate_authorizer)(struct ceph_auth_client *ac,
 				      int peer_type);
 extern int ceph_auth_create_authorizer(struct ceph_auth_client *ac,
 				       int peer_type,
 				       struct ceph_auth_handshake *auth);
-extern void ceph_auth_destroy_authorizer(struct ceph_auth_client *ac,
+void ceph_auth_destroy_authorizer(struct ceph_authorizer *a);
-					 struct ceph_authorizer *a);
 extern int ceph_auth_update_authorizer(struct ceph_auth_client *ac,
 				       int peer_type,
 				       struct ceph_auth_handshake *a);

include/linux/ceph/osd_client.h+0−1

@@ -16,7 +16,6 @@ struct ceph_msg; · 15 unmodified lines
16	struct ceph_snap_context;	16	struct ceph_snap_context;
17	struct ceph_osd_request;	17	struct ceph_osd_request;
18	struct ceph_osd_client;	18	struct ceph_osd_client;
19	struct ceph_authorizer;
20		19
21	/*	20	/*
22	* completion callback for async writepages	21	* completion callback for async writepages

include/linux/cgroup-defs.h+1−0

@@ -444,6 +444,7 @@ struct cgroup_subsys { · 443 unmodified lines
444	int (can_attach)(struct cgroup_taskset tset);	444	int (can_attach)(struct cgroup_taskset tset);
445	void (cancel_attach)(struct cgroup_taskset tset);	445	void (cancel_attach)(struct cgroup_taskset tset);
446	void (attach)(struct cgroup_taskset tset);	446	void (attach)(struct cgroup_taskset tset);
		447	void (*post_attach)(void);
447	int (can_fork)(struct task_struct task);	448	int (can_fork)(struct task_struct task);
448	void (cancel_fork)(struct task_struct task);	449	void (cancel_fork)(struct task_struct task);
449	void (fork)(struct task_struct task);	450	void (fork)(struct task_struct task);

include/linux/cpuset.h+0−6

 	task_unlock(current);
 }
-extern void cpuset_post_attach_flush(void);
 #else /* !CONFIG_CPUSETS */
 static inline bool cpusets_enabled(void) { return false; }
 	return false;
 }
-static inline void cpuset_post_attach_flush(void)
-{
-}
 #endif /* !CONFIG_CPUSETS */
 #endif /* _LINUX_CPUSET_H */

include/linux/hash.h+18−2

@@ -32,12 +32,28 @@ · 31 unmodified lines
32	#error Wordsize not 32 or 64	32	#error Wordsize not 32 or 64
33	#endif	33	#endif
34		34
		35	/*
		36	* The above primes are actively bad for hashing, since they are
		37	* too sparse. The 32-bit one is mostly ok, the 64-bit one causes
		38	* real problems. Besides, the "prime" part is pointless for the
		39	* multiplicative hash.
		40	*
		41	* Although a random odd number will do, it turns out that the golden
		42	* ratio phi = (sqrt(5)-1)/2, or its negative, has particularly nice
		43	* properties.
		44	*
		45	* These are the negative, (1 - phi) = (phi^2) = (3 - sqrt(5))/2.
		46	* (See Knuth vol 3, section 6.4, exercise 9.)
		47	*/
		48	#define GOLDEN_RATIO_32 0x61C88647
		49	#define GOLDEN_RATIO_64 0x61C8864680B583EBull
		50
35	static __always_inline u64 hash_64(u64 val, unsigned int bits)	51	static __always_inline u64 hash_64(u64 val, unsigned int bits)
36	{	52	{
37	u64 hash = val;	53	u64 hash = val;
38		54
39	#if defined(CONFIG_ARCH_HAS_FAST_MULTIPLIER) && BITS_PER_LONG == 64	55	#if BITS_PER_LONG == 64
40	hash = hash * GOLDEN_RATIO_PRIME_64;	56	hash = hash * GOLDEN_RATIO_64;
41	#else	57	#else
42	/* Sigh, gcc can't optimise this alone like it does for 32 bits. */	58	/* Sigh, gcc can't optimise this alone like it does for 32 bits. */
43	u64 n = hash;	59	u64 n = hash;

include/linux/huge_mm.h+5−0

 }
 struct page *get_huge_zero_page(void);
+void put_huge_zero_page(void);
 #else /* CONFIG_TRANSPARENT_HUGEPAGE */
 #define HPAGE_PMD_SHIFT ({ BUILD_BUG(); 0; })
 	return false;
 }
+static inline void put_huge_zero_page(void)
+{
+	BUILD_BUG();
+}
 static inline struct page *follow_devmap_pmd(struct vm_area_struct *vma,
 		unsigned long addr, pmd_t *pmd, int flags)

include/linux/if_ether.h+5−0

 	return (struct ethhdr *)skb_mac_header(skb);
 }
+static inline struct ethhdr *inner_eth_hdr(const struct sk_buff *skb)
+{
+	return (struct ethhdr *)skb_inner_mac_header(skb);
+}
 int eth_header_parse(const struct sk_buff *skb, unsigned char *haddr);
 extern ssize_t sysfs_format_mac(char *buf, const unsigned char *addr, int len);

include/linux/lockdep.h+5−3

  * We record lock dependency chains, so that we can cache them:
  */
 struct lock_chain {
-	u8				irq_context;
+	/* see BUILD_BUG_ON()s in lookup_chain_cache() */
-	u8				depth;
+	unsigned int			irq_context :  2,
-	u16				base;
+					depth       :  6,
+					base	    : 24;
+	/* 4 byte hole */
 	struct hlist_node		entry;
 	u64				chain_key;
 };

include/linux/mlx5/device.h+11−0

@@ -393,6 +393,17 @@ enum { · 392 unmodified lines
393	MLX5_CAP_OFF_CMDIF_CSUM = 46,	393	MLX5_CAP_OFF_CMDIF_CSUM = 46,
394	};	394	};
395		395
		396	enum {
		397	/*
		398	* Max wqe size for rdma read is 512 bytes, so this
		399	* limits our max_sge_rd as the wqe needs to fit:
		400	* - ctrl segment (16 bytes)
		401	* - rdma segment (16 bytes)
		402	* - scatter elements (16 bytes each)
		403	*/
		404	MLX5_MAX_SGE_RD = (512 - 16 - 16) / 16
		405	};
		406
396	struct mlx5_inbox_hdr {	407	struct mlx5_inbox_hdr {
397	__be16 opcode;	408	__be16 opcode;
398	u8 rsvd[4];	409	u8 rsvd[4];

include/linux/mm.h+4−0

 	page = compound_head(page);
 	if (atomic_read(compound_mapcount_ptr(page)) >= 0)
 		return true;
+	if (PageHuge(page))
+		return false;
 	for (i = 0; i < hpage_nr_pages(page); i++) {
 		if (atomic_read(&page[i]._mapcount) >= 0)
 			return true;
 struct page *vm_normal_page(struct vm_area_struct *vma, unsigned long addr,
 		pte_t pte);
+struct page *vm_normal_page_pmd(struct vm_area_struct *vma, unsigned long addr,
+				pmd_t pmd);
 int zap_vma_ptes(struct vm_area_struct *vma, unsigned long address,
 		unsigned long size);

include/linux/net.h+9−1

@@ -245,7 +245,15 @@ do { \ · 244 unmodified lines
245	net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__)	245	net_ratelimited_function(pr_warn, fmt, ##__VA_ARGS__)
246	#define net_info_ratelimited(fmt, ...) \	246	#define net_info_ratelimited(fmt, ...) \
247	net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__)	247	net_ratelimited_function(pr_info, fmt, ##__VA_ARGS__)
248	#if defined(DEBUG)	248	#if defined(CONFIG_DYNAMIC_DEBUG)
		249	#define net_dbg_ratelimited(fmt, ...) \
		250	do { \
		251	DEFINE_DYNAMIC_DEBUG_METADATA(descriptor, fmt); \
		252	if (unlikely(descriptor.flags & _DPRINTK_FLAGS_PRINT) && \
		253	net_ratelimit()) \
		254	__dynamic_pr_debug(&descriptor, fmt, ##__VA_ARGS__); \
		255	} while (0)
		256	#elif defined(DEBUG)
249	#define net_dbg_ratelimited(fmt, ...) \	257	#define net_dbg_ratelimited(fmt, ...) \
250	net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__)	258	net_ratelimited_function(pr_debug, fmt, ##__VA_ARGS__)
251	#else	259	#else

include/linux/netdevice.h+1−1

@@ -3992,7 +3992,7 @@ netdev_features_t netif_skb_features(struct sk_buff *skb); · 3991 unmodified lines
3992		3992
3993	static inline bool net_gso_ok(netdev_features_t features, int gso_type)	3993	static inline bool net_gso_ok(netdev_features_t features, int gso_type)
3994	{	3994	{
3995	netdev_features_t feature = gso_type << NETIF_F_GSO_SHIFT;	3995	netdev_features_t feature = (netdev_features_t)gso_type << NETIF_F_GSO_SHIFT;
3996		3996
3997	/* check flags correspondence */	3997	/* check flags correspondence */
3998	BUILD_BUG_ON(SKB_GSO_TCPV4 != (NETIF_F_TSO >> NETIF_F_GSO_SHIFT));	3998	BUILD_BUG_ON(SKB_GSO_TCPV4 != (NETIF_F_TSO >> NETIF_F_GSO_SHIFT));

include/media/videobuf2-core.h+8−0

 /**
  * struct vb2_ops - driver-specific callbacks
  *
+ * @verify_planes_array: Verify that a given user space structure contains
+ *			enough planes for the buffer. This is called
+ *			for each dequeued buffer.
  * @fill_user_buffer:	given a vb2_buffer fill in the userspace structure.
  *			For V4L2 this is a struct v4l2_buffer.
  * @fill_vb2_buffer:	given a userspace structure, fill in the vb2_buffer.
  *			the vb2_buffer struct.
  */
 struct vb2_buf_ops {
+	int (*verify_planes_array)(struct vb2_buffer *vb, const void *pb);
 	void (*fill_user_buffer)(struct vb2_buffer *vb, void *pb);
 	int (*fill_vb2_buffer)(struct vb2_buffer *vb, const void *pb,
 				struct vb2_plane *planes);
  * @fileio_read_once:		report EOF after reading the first buffer
  * @fileio_write_immediately:	queue buffer after each write() call
  * @allow_zero_bytesused:	allow bytesused == 0 to be passed to the driver
+ * @quirk_poll_must_check_waiting_for_buffers: Return POLLERR at poll when QBUF
+ *              has not been called. This is a vb1 idiom that has been adopted
+ *              also by vb2.
  * @lock:	pointer to a mutex that protects the vb2_queue struct. The
  *		driver can set this to a mutex to let the v4l2 core serialize
  *		the queuing ioctls. If the driver wants to handle locking
 	unsigned			fileio_read_once:1;
 	unsigned			fileio_write_immediately:1;
 	unsigned			allow_zero_bytesused:1;
+	unsigned		   quirk_poll_must_check_waiting_for_buffers:1;
 	struct mutex			*lock;
 	void				*owner;

include/net/vxlan.h+3−1

 	    (skb->inner_protocol_type != ENCAP_TYPE_ETHER ||
 	     skb->inner_protocol != htons(ETH_P_TEB) ||
 	     (skb_inner_mac_header(skb) - skb_transport_header(skb) !=
-	      sizeof(struct udphdr) + sizeof(struct vxlanhdr))))
+	      sizeof(struct udphdr) + sizeof(struct vxlanhdr)) ||
+	     (skb->ip_summed != CHECKSUM_NONE &&
+	      !can_checksum_protocol(features, inner_eth_hdr(skb)->h_proto))))
 		return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
 	return features;

include/rdma/ib.h+16−0

@@ -34,6 +34,7 @@ · 33 unmodified lines
34	#define _RDMA_IB_H	34	#define _RDMA_IB_H
35		35
36	#include <linux/types.h>	36	#include <linux/types.h>
		37	#include <linux/sched.h>
37		38
38	struct ib_addr {	39	struct ib_addr {
39	union {	40	union {
@@ -86,4 +87,19 @@ struct sockaddr_ib { · 46 unmodified lines
86	__u64 sib_scope_id;	87	__u64 sib_scope_id;
87	};	88	};
88		89
		90	/*
		91	* The IB interfaces that use write() as bi-directional ioctl() are
		92	* fundamentally unsafe, since there are lots of ways to trigger "write()"
		93	* calls from various contexts with elevated privileges. That includes the
		94	* traditional suid executable error message writes, but also various kernel
		95	* interfaces that can write to file descriptors.
		96	*
		97	* This function provides protection for the legacy API by restricting the
		98	* calling context.
		99	*/
		100	static inline bool ib_safe_file_access(struct file *filp)
		101	{
		102	return filp->f_cred == current_cred() && segment_eq(get_fs(), USER_DS);
		103	}
		104
89	#endif /* _RDMA_IB_H */	105	#endif /* _RDMA_IB_H */

include/sound/hda_i915.h+2−3

 #ifdef CONFIG_SND_HDA_I915
 int snd_hdac_set_codec_wakeup(struct hdac_bus *bus, bool enable);
 int snd_hdac_display_power(struct hdac_bus *bus, bool enable);
-int snd_hdac_get_display_clk(struct hdac_bus *bus);
+void snd_hdac_i915_set_bclk(struct hdac_bus *bus);
 int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid, int rate);
 int snd_hdac_acomp_get_eld(struct hdac_bus *bus, hda_nid_t nid,
 			   bool *audio_enabled, char *buffer, int max_bytes);
 {
 	return 0;
 }
-static inline int snd_hdac_get_display_clk(struct hdac_bus *bus)
+static inline void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
 {
-	return 0;
 }
 static inline int snd_hdac_sync_audio_rate(struct hdac_bus *bus, hda_nid_t nid,
 					   int rate)

include/uapi/linux/v4l2-dv-timings.h+20−10

 #define V4L2_DV_BT_CEA_3840X2160P24 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 1276, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_3840X2160P25 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_3840X2160P30 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_3840X2160P50 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 1056, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_3840X2160P60 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(3840, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 176, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_4096X2160P24 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 1020, 88, 296, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_4096X2160P25 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_4096X2160P30 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		297000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \
 #define V4L2_DV_BT_CEA_4096X2160P50 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 968, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, V4L2_DV_FL_IS_CE_VIDEO) \
 }
 #define V4L2_DV_BT_CEA_4096X2160P60 { \
 	.type = V4L2_DV_BT_656_1120, \
-	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, V4L2_DV_HSYNC_POS_POL, \
+	V4L2_INIT_BT_TIMINGS(4096, 2160, 0, \
+		V4L2_DV_HSYNC_POS_POL | V4L2_DV_VSYNC_POS_POL, \
 		594000000, 88, 88, 128, 8, 10, 72, 0, 0, 0, \
 		V4L2_DV_BT_STD_CEA861, \
 		V4L2_DV_FL_CAN_REDUCE_FPS | V4L2_DV_FL_IS_CE_VIDEO) \

kernel/bpf/inode.c+4−3

 {
 	switch (type) {
 	case BPF_TYPE_PROG:
-		atomic_inc(&((struct bpf_prog *)raw)->aux->refcnt);
+		raw = bpf_prog_inc(raw);
 		break;
 	case BPF_TYPE_MAP:
-		bpf_map_inc(raw, true);
+		raw = bpf_map_inc(raw, true);
 		break;
 	default:
 		WARN_ON_ONCE(1);
 		goto out;
 	raw = bpf_any_get(inode->i_private, *type);
-	touch_atime(&path);
+	if (!IS_ERR(raw))
+		touch_atime(&path);
 	path_put(&path);
 	return raw;

kernel/bpf/syscall.c+20−4

 	return f.file->private_data;
 }
-void bpf_map_inc(struct bpf_map *map, bool uref)
+/* prog's and map's refcnt limit */
+#define BPF_MAX_REFCNT 32768
+struct bpf_map *bpf_map_inc(struct bpf_map *map, bool uref)
 {
-	atomic_inc(&map->refcnt);
+	if (atomic_inc_return(&map->refcnt) > BPF_MAX_REFCNT) {
+		atomic_dec(&map->refcnt);
+		return ERR_PTR(-EBUSY);
+	}
 	if (uref)
 		atomic_inc(&map->usercnt);
+	return map;
 }
 struct bpf_map *bpf_map_get_with_uref(u32 ufd)
 	if (IS_ERR(map))
 		return map;
-	bpf_map_inc(map, true);
+	map = bpf_map_inc(map, true);
 	fdput(f);
 	return map;
 	return f.file->private_data;
 }
+struct bpf_prog *bpf_prog_inc(struct bpf_prog *prog)
+{
+	if (atomic_inc_return(&prog->aux->refcnt) > BPF_MAX_REFCNT) {
+		atomic_dec(&prog->aux->refcnt);
+		return ERR_PTR(-EBUSY);
+	}
+	return prog;
+}
 /* called by sockets/tracing/seccomp before attaching program to an event
  * pairs with bpf_prog_put()
  */
 	if (IS_ERR(prog))
 		return prog;
-	atomic_inc(&prog->aux->refcnt);
+	prog = bpf_prog_inc(prog);
 	fdput(f);
 	return prog;

kernel/bpf/verifier.c+47−29

 	[CONST_IMM]		= "imm",
 };
-static const struct {
-	int map_type;
-	int func_id;
-} func_limit[] = {
-	{BPF_MAP_TYPE_PROG_ARRAY, BPF_FUNC_tail_call},
-	{BPF_MAP_TYPE_PERF_EVENT_ARRAY, BPF_FUNC_perf_event_read},
-	{BPF_MAP_TYPE_PERF_EVENT_ARRAY, BPF_FUNC_perf_event_output},
-	{BPF_MAP_TYPE_STACK_TRACE, BPF_FUNC_get_stackid},
-};
 static void print_verifier_state(struct verifier_env *env)
 {
 	enum bpf_reg_type t;
 static int check_map_func_compatibility(struct bpf_map *map, int func_id)
 {
-	bool bool_map, bool_func;
-	int i;
 	if (!map)
 		return 0;
-	for (i = 0; i < ARRAY_SIZE(func_limit); i++) {
+	/* We need a two way check, first is from map perspective ... */
-		bool_map = (map->map_type == func_limit[i].map_type);
+	switch (map->map_type) {
-		bool_func = (func_id == func_limit[i].func_id);
+	case BPF_MAP_TYPE_PROG_ARRAY:
-		/* only when map & func pair match it can continue.
+		if (func_id != BPF_FUNC_tail_call)
-		 * don't allow any other map type to be passed into
+			goto error;
-		 * the special func;
+		break;
-		 */
+	case BPF_MAP_TYPE_PERF_EVENT_ARRAY:
-		if (bool_func && bool_map != bool_func) {
+		if (func_id != BPF_FUNC_perf_event_read &&
-			verbose("cannot pass map_type %d into func %d\n",
+		    func_id != BPF_FUNC_perf_event_output)
-				map->map_type, func_id);
+			goto error;
-			return -EINVAL;
+		break;
-		}
+	case BPF_MAP_TYPE_STACK_TRACE:
+		if (func_id != BPF_FUNC_get_stackid)
+			goto error;
+		break;
+	default:
+		break;
+	}
+	/* ... and second from the function itself. */
+	switch (func_id) {
+	case BPF_FUNC_tail_call:
+		if (map->map_type != BPF_MAP_TYPE_PROG_ARRAY)
+			goto error;
+		break;
+	case BPF_FUNC_perf_event_read:
+	case BPF_FUNC_perf_event_output:
+		if (map->map_type != BPF_MAP_TYPE_PERF_EVENT_ARRAY)
+			goto error;
+		break;
+	case BPF_FUNC_get_stackid:
+		if (map->map_type != BPF_MAP_TYPE_STACK_TRACE)
+			goto error;
+		break;
+	default:
+		break;
 	}
 	return 0;
+error:
+	verbose("cannot pass map_type %d into func %d\n",
+		map->map_type, func_id);
+	return -EINVAL;
 }
 static int check_raw_mode(const struct bpf_func_proto *fn)
 				return -E2BIG;
 			}
-			/* remember this map */
-			env->used_maps[env->used_map_cnt++] = map;
 			/* hold the map. If the program is rejected by verifier,
 			 * the map will be released by release_maps() or it
 			 * will be used by the valid program until it's unloaded
 			 * and all maps are released in free_bpf_prog_info()
 			 */
-			bpf_map_inc(map, false);
+			map = bpf_map_inc(map, false);
+			if (IS_ERR(map)) {
+				fdput(f);
+				return PTR_ERR(map);
+			}
+			env->used_maps[env->used_map_cnt++] = map;
 			fdput(f);
 next_insn:
 			insn++;

kernel/cgroup.c+5−2

 				    size_t nbytes, loff_t off, bool threadgroup)
 {
 	struct task_struct *tsk;
+	struct cgroup_subsys *ss;
 	struct cgroup *cgrp;
 	pid_t pid;
-	int ret;
+	int ssid, ret;
 	if (kstrtoint(strstrip(buf), 0, &pid) || pid < 0)
 		return -EINVAL;
 	rcu_read_unlock();
 out_unlock_threadgroup:
 	percpu_up_write(&cgroup_threadgroup_rwsem);
+	for_each_subsys(ss, ssid)
+		if (ss->post_attach)
+			ss->post_attach();
 	cgroup_kn_unlock(of->kn);
-	cpuset_post_attach_flush();
 	return ret ?: nbytes;
 }

kernel/cpuset.c+2−2

 #include <asm/uaccess.h>
 #include <linux/atomic.h>
 #include <linux/mutex.h>
-#include <linux/workqueue.h>
 #include <linux/cgroup.h>
 #include <linux/wait.h>
 	}
 }
-void cpuset_post_attach_flush(void)
+static void cpuset_post_attach(void)
 {
 	flush_workqueue(cpuset_migrate_mm_wq);
 }
 	.can_attach	= cpuset_can_attach,
 	.cancel_attach	= cpuset_cancel_attach,
 	.attach		= cpuset_attach,
+	.post_attach	= cpuset_post_attach,
 	.bind		= cpuset_bind,
 	.legacy_cftypes	= files,
 	.early_init	= true,

kernel/events/core.c+38−17

 	if (ret || !write)
 		return ret;
-	if (sysctl_perf_cpu_time_max_percent == 100) {
+	if (sysctl_perf_cpu_time_max_percent == 100 ||
+	    sysctl_perf_cpu_time_max_percent == 0) {
 		printk(KERN_WARNING
 		       "perf: Dynamic interrupt throttling disabled, can hang your system!\n");
 		WRITE_ONCE(perf_sample_allowed_ns, 0);
  * function.
  *
  * Lock order:
+ *    cred_guard_mutex
  *	task_struct::perf_event_mutex
  *	  perf_event_context::mutex
  *	    perf_event::child_mutex;
 find_lively_task_by_vpid(pid_t vpid)
 {
 	struct task_struct *task;
-	int err;
 	rcu_read_lock();
 	if (!vpid)
 	if (!task)
 		return ERR_PTR(-ESRCH);
-	/* Reuse ptrace permission checks for now. */
-	err = -EACCES;
-	if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS))
-		goto errout;
 	return task;
-errout:
-	put_task_struct(task);
-	return ERR_PTR(err);
 }
 /*
 	get_online_cpus();
+	if (task) {
+		err = mutex_lock_interruptible(&task->signal->cred_guard_mutex);
+		if (err)
+			goto err_cpus;
+		/*
+		 * Reuse ptrace permission checks for now.
+		 *
+		 * We must hold cred_guard_mutex across this and any potential
+		 * perf_install_in_context() call for this new event to
+		 * serialize against exec() altering our credentials (and the
+		 * perf_event_exit_task() that could imply).
+		 */
+		err = -EACCES;
+		if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS))
+			goto err_cred;
+	}
 	if (flags & PERF_FLAG_PID_CGROUP)
 		cgroup_fd = pid;
 				 NULL, NULL, cgroup_fd);
 	if (IS_ERR(event)) {
 		err = PTR_ERR(event);
-		goto err_cpus;
+		goto err_cred;
 	}
 	if (is_sampling_event(event)) {
 		goto err_context;
 	}
-	if (task) {
-		put_task_struct(task);
-		task = NULL;
-	}
 	/*
 	 * Look up the group leader (we will attach this event to it):
 	 */
 	WARN_ON_ONCE(ctx->parent_ctx);
+	/*
+	 * This is the point on no return; we cannot fail hereafter. This is
+	 * where we start modifying current state.
+	 */
 	if (move_group) {
 		/*
 		 * See perf_event_ctx_lock() for comments on the details
 		mutex_unlock(&gctx->mutex);
 	mutex_unlock(&ctx->mutex);
+	if (task) {
+		mutex_unlock(&task->signal->cred_guard_mutex);
+		put_task_struct(task);
+	}
 	put_online_cpus();
 	mutex_lock(&current->perf_event_mutex);
 	 */
 	if (!event_file)
 		free_event(event);
+err_cred:
+	if (task)
+		mutex_unlock(&task->signal->cred_guard_mutex);
 err_cpus:
 	put_online_cpus();
 err_task:
 /*
  * When a child task exits, feed back event values to parent events.
+ *
+ * Can be called with cred_guard_mutex held when called from
+ * install_exec_creds().
  */
 void perf_event_exit_task(struct task_struct *child)
 {

kernel/kcov.c+2−1

 #define pr_fmt(fmt) "kcov: " fmt
+#define DISABLE_BRANCH_PROFILING
 #include <linux/compiler.h>
 #include <linux/types.h>
 #include <linux/file.h>
  * Entry point from instrumented code.
  * This is called once per basic-block/edge.
  */
-void __sanitizer_cov_trace_pc(void)
+void notrace __sanitizer_cov_trace_pc(void)
 {
 	struct task_struct *t;
 	enum kcov_mode mode;

kernel/kexec_core.c+5−2

 	VMCOREINFO_OFFSET(page, lru);
 	VMCOREINFO_OFFSET(page, _mapcount);
 	VMCOREINFO_OFFSET(page, private);
+	VMCOREINFO_OFFSET(page, compound_dtor);
+	VMCOREINFO_OFFSET(page, compound_order);
+	VMCOREINFO_OFFSET(page, compound_head);
 	VMCOREINFO_OFFSET(pglist_data, node_zones);
 	VMCOREINFO_OFFSET(pglist_data, nr_zones);
 #ifdef CONFIG_FLAT_NODE_MEM_MAP
 #ifdef CONFIG_X86
 	VMCOREINFO_NUMBER(KERNEL_IMAGE_SIZE);
 #endif
-#ifdef CONFIG_HUGETLBFS
+#ifdef CONFIG_HUGETLB_PAGE
-	VMCOREINFO_SYMBOL(free_huge_page);
+	VMCOREINFO_NUMBER(HUGETLB_PAGE_DTOR);
 #endif
 	arch_crash_save_vmcoreinfo();

kernel/locking/lockdep.c+34−3

 	chain->irq_context = hlock->irq_context;
 	i = get_first_held_lock(curr, hlock);
 	chain->depth = curr->lockdep_depth + 1 - i;
+	BUILD_BUG_ON((1UL << 24) <= ARRAY_SIZE(chain_hlocks));
+	BUILD_BUG_ON((1UL << 6)  <= ARRAY_SIZE(curr->held_locks));
+	BUILD_BUG_ON((1UL << 8*sizeof(chain_hlocks[0])) <= ARRAY_SIZE(lock_classes));
 	if (likely(nr_chain_hlocks + chain->depth <= MAX_LOCKDEP_CHAIN_HLOCKS)) {
 		chain->base = nr_chain_hlocks;
-		nr_chain_hlocks += chain->depth;
 		for (j = 0; j < chain->depth - 1; j++, i++) {
 			int lock_id = curr->held_locks[i].class_idx - 1;
 			chain_hlocks[chain->base + j] = lock_id;
 		}
 		chain_hlocks[chain->base + j] = class - lock_classes;
 	}
+	if (nr_chain_hlocks < MAX_LOCKDEP_CHAIN_HLOCKS)
+		nr_chain_hlocks += chain->depth;
+#ifdef CONFIG_DEBUG_LOCKDEP
+	/*
+	 * Important for check_no_collision().
+	 */
+	if (unlikely(nr_chain_hlocks > MAX_LOCKDEP_CHAIN_HLOCKS)) {
+		if (debug_locks_off_graph_unlock())
+			return 0;
+		print_lockdep_off("BUG: MAX_LOCKDEP_CHAIN_HLOCKS too low!");
+		dump_stack();
+		return 0;
+	}
+#endif
 	hlist_add_head_rcu(&chain->entry, hash_head);
 	debug_atomic_inc(chain_lookup_misses);
 	inc_chains();
 	return 1;
 }
+static inline unsigned int task_irq_context(struct task_struct *task)
+{
+	return 2 * !!task->hardirq_context + !!task->softirq_context;
+}
 static int separate_irq_context(struct task_struct *curr,
 		struct held_lock *hlock)
 {
 	/*
 	 * Keep track of points where we cross into an interrupt context:
 	 */
-	hlock->irq_context = 2*(curr->hardirq_context ? 1 : 0) +
-				curr->softirq_context;
 	if (depth) {
 		struct held_lock *prev_hlock;
 	return 1;
 }
+static inline unsigned int task_irq_context(struct task_struct *task)
+{
+	return 0;
+}
 static inline int separate_irq_context(struct task_struct *curr,
 		struct held_lock *hlock)
 {
 	hlock->acquire_ip = ip;
 	hlock->instance = lock;
 	hlock->nest_lock = nest_lock;
+	hlock->irq_context = task_irq_context(curr);
 	hlock->trylock = trylock;
 	hlock->read = read;
 	hlock->check = check;

kernel/locking/lockdep_proc.c+2−0

@@ -141,6 +141,8 @@ static int lc_show(struct seq_file m, void v) · 140 unmodified lines
141	int i;	141	int i;
142		142
143	if (v == SEQ_START_TOKEN) {	143	if (v == SEQ_START_TOKEN) {
		144	if (nr_chain_hlocks > MAX_LOCKDEP_CHAIN_HLOCKS)
		145	seq_printf(m, "(buggered) ");
144	seq_printf(m, "all lock chains:\n");	146	seq_printf(m, "all lock chains:\n");
145	return 0;	147	return 0;
146	}	148	}

kernel/workqueue.c+29−0

@@ -666,6 +666,35 @@ static void set_work_pool_and_clear_pending(struct work_struct *work, · 665 unmodified lines
666	*/	666	*/
667	smp_wmb();	667	smp_wmb();
668	set_work_data(work, (unsigned long)pool_id << WORK_OFFQ_POOL_SHIFT, 0);	668	set_work_data(work, (unsigned long)pool_id << WORK_OFFQ_POOL_SHIFT, 0);
		669	/*
		670	* The following mb guarantees that previous clear of a PENDING bit
		671	* will not be reordered with any speculative LOADS or STORES from
		672	* work->current_func, which is executed afterwards. This possible
		673	* reordering can lead to a missed execution on attempt to qeueue
		674	* the same @work. E.g. consider this case:
		675	*
		676	* CPU#0 CPU#1
		677	* ---------------------------- --------------------------------
		678	*
		679	* 1 STORE event_indicated
		680	* 2 queue_work_on() {
		681	* 3 test_and_set_bit(PENDING)
		682	* 4 } set_..._and_clear_pending() {
		683	* 5 set_work_data() # clear bit
		684	* 6 smp_mb()
		685	* 7 work->current_func() {
		686	* 8 LOAD event_indicated
		687	* }
		688	*
		689	* Without an explicit full barrier speculative LOAD on line 8 can
		690	* be executed before CPU#0 does STORE on line 1. If that happens,
		691	* CPU#0 observes the PENDING bit is still set and new execution of
		692	* a @work is not queued in a hope, that CPU#1 will eventually
		693	* finish the queued @work. Meanwhile CPU#1 does not see
		694	* event_indicated is set, because speculative LOAD was executed
		695	* before actual STORE.
		696	*/
		697	smp_mb();
669	}	698	}
670		699
671	static void clear_work_data(struct work_struct *work)	700	static void clear_work_data(struct work_struct *work)

lib/stackdepot.c+0−4

@@ -210,10 +210,6 @@ depot_stack_handle_t depot_save_stack(struct stack_trace *trace, · 209 unmodified lines
210	goto fast_exit;	210	goto fast_exit;
211		211
212	hash = hash_stack(trace->entries, trace->nr_entries);	212	hash = hash_stack(trace->entries, trace->nr_entries);
213	/* Bad luck, we won't store this stack. */
214	if (hash == 0)
215	goto exit;
216
217	bucket = &stack_table[hash & STACK_HASH_MASK];	213	bucket = &stack_table[hash & STACK_HASH_MASK];
218		214
219	/*	215	/*

mm/huge_memory.c+5−7

 	return READ_ONCE(huge_zero_page);
 }
-static void put_huge_zero_page(void)
+void put_huge_zero_page(void)
 {
 	/*
 	 * Counter should never go to zero here. Only shrinker can put
 	if (vma_is_dax(vma)) {
 		spin_unlock(ptl);
 		if (is_huge_zero_pmd(orig_pmd))
-			put_huge_zero_page();
+			tlb_remove_page(tlb, pmd_page(orig_pmd));
 	} else if (is_huge_zero_pmd(orig_pmd)) {
 		pte_free(tlb->mm, pgtable_trans_huge_withdraw(tlb->mm, pmd));
 		atomic_long_dec(&tlb->mm->nr_ptes);
 		spin_unlock(ptl);
-		put_huge_zero_page();
+		tlb_remove_page(tlb, pmd_page(orig_pmd));
 	} else {
 		struct page *page = pmd_page(orig_pmd);
 		page_remove_rmap(page, true);
 		 * page fault if needed.
 		 */
 		return 0;
-	if (vma->vm_ops)
+	if (vma->vm_ops || (vm_flags & VM_NO_THP))
 		/* khugepaged not yet working on file or special mappings */
 		return 0;
-	VM_BUG_ON_VMA(vm_flags & VM_NO_THP, vma);
 	hstart = (vma->vm_start + ~HPAGE_PMD_MASK) & HPAGE_PMD_MASK;
 	hend = vma->vm_end & HPAGE_PMD_MASK;
 	if (hstart < hend)
 		return false;
 	if (is_vma_temporary_stack(vma))
 		return false;
-	VM_BUG_ON_VMA(vma->vm_flags & VM_NO_THP, vma);
+	return !(vma->vm_flags & VM_NO_THP);
-	return true;
 }
 static void collapse_huge_page(struct mm_struct *mm,

mm/memcontrol.c+19−18

 /* "mc" and its members are protected by cgroup_mutex */
 static struct move_charge_struct {
 	spinlock_t	  lock; /* for from, to */
+	struct mm_struct  *mm;
 	struct mem_cgroup *from;
 	struct mem_cgroup *to;
 	unsigned long flags;
 static void mem_cgroup_clear_mc(void)
 {
+	struct mm_struct *mm = mc.mm;
 	/*
 	 * we must clear moving_task before waking up waiters at the end of
 	 * task migration.
 	spin_lock(&mc.lock);
 	mc.from = NULL;
 	mc.to = NULL;
+	mc.mm = NULL;
 	spin_unlock(&mc.lock);
+	mmput(mm);
 }
 static int mem_cgroup_can_attach(struct cgroup_taskset *tset)
 		VM_BUG_ON(mc.moved_swap);
 		spin_lock(&mc.lock);
+		mc.mm = mm;
 		mc.from = from;
 		mc.to = memcg;
 		mc.flags = move_flags;
 		ret = mem_cgroup_precharge_mc(mm);
 		if (ret)
 			mem_cgroup_clear_mc();
+	} else {
+		mmput(mm);
 	}
-	mmput(mm);
 	return ret;
 }
 	return ret;
 }
-static void mem_cgroup_move_charge(struct mm_struct *mm)
+static void mem_cgroup_move_charge(void)
 {
 	struct mm_walk mem_cgroup_move_charge_walk = {
 		.pmd_entry = mem_cgroup_move_charge_pte_range,
-		.mm = mm,
+		.mm = mc.mm,
 	};
 	lru_add_drain_all();
 	atomic_inc(&mc.from->moving_account);
 	synchronize_rcu();
 retry:
-	if (unlikely(!down_read_trylock(&mm->mmap_sem))) {
+	if (unlikely(!down_read_trylock(&mc.mm->mmap_sem))) {
 		/*
 		 * Someone who are holding the mmap_sem might be waiting in
 		 * waitq. So we cancel all extra charges, wake up all waiters,
 	 * additional charge, the page walk just aborts.
 	 */
 	walk_page_range(0, ~0UL, &mem_cgroup_move_charge_walk);
-	up_read(&mm->mmap_sem);
+	up_read(&mc.mm->mmap_sem);
 	atomic_dec(&mc.from->moving_account);
 }
-static void mem_cgroup_move_task(struct cgroup_taskset *tset)
+static void mem_cgroup_move_task(void)
 {
-	struct cgroup_subsys_state *css;
+	if (mc.to) {
-	struct task_struct *p = cgroup_taskset_first(tset, &css);
+		mem_cgroup_move_charge();
-	struct mm_struct *mm = get_task_mm(p);
-	if (mm) {
-		if (mc.to)
-			mem_cgroup_move_charge(mm);
-		mmput(mm);
-	}
-	if (mc.to)
 		mem_cgroup_clear_mc();
+	}
 }
 #else	/* !CONFIG_MMU */
 static int mem_cgroup_can_attach(struct cgroup_taskset *tset)
 static void mem_cgroup_cancel_attach(struct cgroup_taskset *tset)
 {
 }
-static void mem_cgroup_move_task(struct cgroup_taskset *tset)
+static void mem_cgroup_move_task(void)
 {
 }
 #endif
 	.css_reset = mem_cgroup_css_reset,
 	.can_attach = mem_cgroup_can_attach,
 	.cancel_attach = mem_cgroup_cancel_attach,
-	.attach = mem_cgroup_move_task,
+	.post_attach = mem_cgroup_move_task,
 	.bind = mem_cgroup_bind,
 	.dfl_cftypes = memory_files,
 	.legacy_cftypes = mem_cgroup_legacy_files,

mm/memory-failure.c+9−1

@@ -888,7 +888,15 @@ int get_hwpoison_page(struct page *page) · 887 unmodified lines
888	}	888	}
889	}	889	}
890		890
891	return get_page_unless_zero(head);	891	if (get_page_unless_zero(head)) {
		892	if (head == compound_head(page))
		893	return 1;
		894
		895	pr_info("MCE: %#lx cannot catch tail\n", page_to_pfn(page));
		896	put_page(head);
		897	}
		898
		899	return 0;
892	}	900	}
893	EXPORT_SYMBOL_GPL(get_hwpoison_page);	901	EXPORT_SYMBOL_GPL(get_hwpoison_page);
894		902

mm/memory.c+40−0

@@ -789,6 +789,46 @@ out: · 788 unmodified lines
789	return pfn_to_page(pfn);	789	return pfn_to_page(pfn);
790	}	790	}
791		791
		792	#ifdef CONFIG_TRANSPARENT_HUGEPAGE
		793	struct page vm_normal_page_pmd(struct vm_area_struct vma, unsigned long addr,
		794	pmd_t pmd)
		795	{
		796	unsigned long pfn = pmd_pfn(pmd);
		797
		798	/*
		799	* There is no pmd_special() but there may be special pmds, e.g.
		800	* in a direct-access (dax) mapping, so let's just replicate the
		801	* !HAVE_PTE_SPECIAL case from vm_normal_page() here.
		802	*/
		803	if (unlikely(vma->vm_flags & (VM_PFNMAP\|VM_MIXEDMAP))) {
		804	if (vma->vm_flags & VM_MIXEDMAP) {
		805	if (!pfn_valid(pfn))
		806	return NULL;
		807	goto out;
		808	} else {
		809	unsigned long off;
		810	off = (addr - vma->vm_start) >> PAGE_SHIFT;
		811	if (pfn == vma->vm_pgoff + off)
		812	return NULL;
		813	if (!is_cow_mapping(vma->vm_flags))
		814	return NULL;
		815	}
		816	}
		817
		818	if (is_zero_pfn(pfn))
		819	return NULL;
		820	if (unlikely(pfn > highest_memmap_pfn))
		821	return NULL;
		822
		823	/*
		824	* NOTE! We still have PageReserved() pages in the page tables.
		825	* eg. VDSO mappings can cause them to exist.
		826	*/
		827	out:
		828	return pfn_to_page(pfn);
		829	}
		830	#endif
		831
792	/*	832	/*
793	* copy one vm_area from one task to the other. Assumes the page tables	833	* copy one vm_area from one task to the other. Assumes the page tables
794	* already present in the new task to be cleared in the whole range	834	* already present in the new task to be cleared in the whole range

mm/migrate.c+7−1

 		dec_zone_page_state(page, NR_ISOLATED_ANON +
 				page_is_file_cache(page));
 		/* Soft-offlined page shouldn't go through lru cache list */
-		if (reason == MR_MEMORY_FAILURE) {
+		if (reason == MR_MEMORY_FAILURE && rc == MIGRATEPAGE_SUCCESS) {
+			/*
+			 * With this release, we free successfully migrated
+			 * page and set PG_HWPoison on just freed page
+			 * intentionally. Although it's rather weird, it's how
+			 * HWPoison flag works at the moment.
+			 */
 			put_page(page);
 			if (!test_set_page_hwpoison(page))
 				num_poisoned_pages_inc();

mm/page_io.c+5−1

 	ret = bdev_read_page(sis->bdev, swap_page_sector(page), page);
 	if (!ret) {
-		swap_slot_free_notify(page);
+		if (trylock_page(page)) {
+			swap_slot_free_notify(page);
+			unlock_page(page);
+		}
 		count_vm_event(PSWPIN);
 		return 0;
 	}

mm/swap.c+5−0

 			zone = NULL;
 		}
+		if (is_huge_zero_page(page)) {
+			put_huge_zero_page();
+			continue;
+		}
 		page = compound_head(page);
 		if (!put_page_testzero(page))
 			continue;

mm/vmscan.c+15−15

 		sc->gfp_mask |= __GFP_HIGHMEM;
 	for_each_zone_zonelist_nodemask(zone, z, zonelist,
-					requested_highidx, sc->nodemask) {
+					gfp_zone(sc->gfp_mask), sc->nodemask) {
 		enum zone_type classzone_idx;
 		if (!populated_zone(zone))
 	/* Try to sleep for a short interval */
 	if (prepare_kswapd_sleep(pgdat, order, remaining,
 						balanced_classzone_idx)) {
+		/*
+		 * Compaction records what page blocks it recently failed to
+		 * isolate pages from and skips them in the future scanning.
+		 * When kswapd is going to sleep, it is reasonable to assume
+		 * that pages and compaction may succeed so reset the cache.
+		 */
+		reset_isolation_suitable(pgdat);
+		/*
+		 * We have freed the memory, now we should compact it to make
+		 * allocation of the requested order possible.
+		 */
+		wakeup_kcompactd(pgdat, order, classzone_idx);
 		remaining = schedule_timeout(HZ/10);
 		finish_wait(&pgdat->kswapd_wait, &wait);
 		prepare_to_wait(&pgdat->kswapd_wait, &wait, TASK_INTERRUPTIBLE);
 		 */
 		set_pgdat_percpu_threshold(pgdat, calculate_normal_threshold);
-		/*
-		 * Compaction records what page blocks it recently failed to
-		 * isolate pages from and skips them in the future scanning.
-		 * When kswapd is going to sleep, it is reasonable to assume
-		 * that pages and compaction may succeed so reset the cache.
-		 */
-		reset_isolation_suitable(pgdat);
-		/*
-		 * We have freed the memory, now we should compact it to make
-		 * allocation of the requested order possible.
-		 */
-		wakeup_kcompactd(pgdat, order, classzone_idx);
 		if (!kthread_should_stop())
 			schedule();

net/batman-adv/bat_v.c+12−0

 #include "bat_v_elp.h"
 #include "bat_v_ogm.h"
+#include "hard-interface.h"
 #include "hash.h"
 #include "originator.h"
 #include "packet.h"
+static void batadv_v_iface_activate(struct batadv_hard_iface *hard_iface)
+{
+	/* B.A.T.M.A.N. V does not use any queuing mechanism, therefore it can
+	 * set the interface as ACTIVE right away, without any risk of race
+	 * condition
+	 */
+	if (hard_iface->if_status == BATADV_IF_TO_BE_ACTIVATED)
+		hard_iface->if_status = BATADV_IF_ACTIVE;
+}
 static int batadv_v_iface_enable(struct batadv_hard_iface *hard_iface)
 {
 	int ret;
 static struct batadv_algo_ops batadv_batman_v __read_mostly = {
 	.name = "BATMAN_V",
+	.bat_iface_activate = batadv_v_iface_activate,
 	.bat_iface_enable = batadv_v_iface_enable,
 	.bat_iface_disable = batadv_v_iface_disable,
 	.bat_iface_update_mac = batadv_v_iface_update_mac,

net/batman-adv/distributed-arp-table.c+10−7

  * be sent to
  * @bat_priv: the bat priv with all the soft interface information
  * @ip_dst: ipv4 to look up in the DHT
+ * @vid: VLAN identifier
  *
  * An originator O is selected if and only if its DHT_ID value is one of three
  * closest values (from the LEFT, with wrap around if needed) then the hash
  * Return: the candidate array of size BATADV_DAT_CANDIDATE_NUM.
  */
 static struct batadv_dat_candidate *
-batadv_dat_select_candidates(struct batadv_priv *bat_priv, __be32 ip_dst)
+batadv_dat_select_candidates(struct batadv_priv *bat_priv, __be32 ip_dst,
+			     unsigned short vid)
 {
 	int select;
 	batadv_dat_addr_t last_max = BATADV_DAT_ADDR_MAX, ip_key;
 		return NULL;
 	dat.ip = ip_dst;
-	dat.vid = 0;
+	dat.vid = vid;
 	ip_key = (batadv_dat_addr_t)batadv_hash_dat(&dat,
 						    BATADV_DAT_ADDR_MAX);
  * @bat_priv: the bat priv with all the soft interface information
  * @skb: payload to send
  * @ip: the DHT key
+ * @vid: VLAN identifier
  * @packet_subtype: unicast4addr packet subtype to use
  *
  * This function copies the skb with pskb_copy() and is sent as unicast packet
  */
 static bool batadv_dat_send_data(struct batadv_priv *bat_priv,
 				 struct sk_buff *skb, __be32 ip,
-				 int packet_subtype)
+				 unsigned short vid, int packet_subtype)
 {
 	int i;
 	bool ret = false;
 	struct sk_buff *tmp_skb;
 	struct batadv_dat_candidate *cand;
-	cand = batadv_dat_select_candidates(bat_priv, ip);
+	cand = batadv_dat_select_candidates(bat_priv, ip, vid);
 	if (!cand)
 		goto out;
 		ret = true;
 	} else {
 		/* Send the request to the DHT */
-		ret = batadv_dat_send_data(bat_priv, skb, ip_dst,
+		ret = batadv_dat_send_data(bat_priv, skb, ip_dst, vid,
 					   BATADV_P_DAT_DHT_GET);
 	}
 out:
 	/* Send the ARP reply to the candidates for both the IP addresses that
 	 * the node obtained from the ARP reply
 	 */
-	batadv_dat_send_data(bat_priv, skb, ip_src, BATADV_P_DAT_DHT_PUT);
+	batadv_dat_send_data(bat_priv, skb, ip_src, vid, BATADV_P_DAT_DHT_PUT);
-	batadv_dat_send_data(bat_priv, skb, ip_dst, BATADV_P_DAT_DHT_PUT);
+	batadv_dat_send_data(bat_priv, skb, ip_dst, vid, BATADV_P_DAT_DHT_PUT);
 }
 /**

net/batman-adv/hard-interface.c+4−2

 	batadv_update_min_mtu(hard_iface->soft_iface);
+	if (bat_priv->bat_algo_ops->bat_iface_activate)
+		bat_priv->bat_algo_ops->bat_iface_activate(hard_iface);
 out:
 	if (primary_if)
 		batadv_hardif_put(primary_if);
 	struct batadv_priv *bat_priv = netdev_priv(hard_iface->soft_iface);
 	struct batadv_hard_iface *primary_if = NULL;
-	if (hard_iface->if_status == BATADV_IF_ACTIVE)
+	batadv_hardif_deactivate_interface(hard_iface);
-		batadv_hardif_deactivate_interface(hard_iface);
 	if (hard_iface->if_status != BATADV_IF_INACTIVE)
 		goto out;

net/batman-adv/originator.c+6−11

 {
 	struct hlist_node *node_tmp;
 	struct batadv_neigh_node *neigh_node;
-	struct batadv_hardif_neigh_node *hardif_neigh;
 	struct batadv_neigh_ifinfo *neigh_ifinfo;
 	struct batadv_algo_ops *bao;
 		batadv_neigh_ifinfo_put(neigh_ifinfo);
 	}
-	hardif_neigh = batadv_hardif_neigh_get(neigh_node->if_incoming,
+	batadv_hardif_neigh_put(neigh_node->hardif_neigh);
-					       neigh_node->addr);
-	if (hardif_neigh) {
-		/* batadv_hardif_neigh_get() increases refcount too */
-		batadv_hardif_neigh_put(hardif_neigh);
-		batadv_hardif_neigh_put(hardif_neigh);
-	}
 	if (bao->bat_neigh_free)
 		bao->bat_neigh_free(neigh_node);
 	ether_addr_copy(neigh_node->addr, neigh_addr);
 	neigh_node->if_incoming = hard_iface;
 	neigh_node->orig_node = orig_node;
+	neigh_node->last_seen = jiffies;
+	/* increment unique neighbor refcount */
+	kref_get(&hardif_neigh->refcount);
+	neigh_node->hardif_neigh = hardif_neigh;
 	/* extra reference for return */
 	kref_init(&neigh_node->refcount);
 	hlist_add_head_rcu(&neigh_node->list, &orig_node->neigh_list);
 	spin_unlock_bh(&orig_node->neigh_list_lock);
-	/* increment unique neighbor refcount */
-	kref_get(&hardif_neigh->refcount);
 	batadv_dbg(BATADV_DBG_BATMAN, orig_node->bat_priv,
 		   "Creating new neighbor %pM for orig_node %pM on interface %s\n",
 		   neigh_addr, orig_node->orig, hard_iface->net_dev->name);

net/batman-adv/routing.c+9−0

@@ -105,6 +105,15 @@ static void _batadv_update_route(struct batadv_priv *bat_priv, · 104 unmodified lines
105	neigh_node = NULL;	105	neigh_node = NULL;
106		106
107	spin_lock_bh(&orig_node->neigh_list_lock);	107	spin_lock_bh(&orig_node->neigh_list_lock);
		108	/* curr_router used earlier may not be the current orig_ifinfo->router
		109	* anymore because it was dereferenced outside of the neigh_list_lock
		110	* protected region. After the new best neighbor has replace the current
		111	* best neighbor the reference counter needs to decrease. Consequently,
		112	* the code needs to ensure the curr_router variable contains a pointer
		113	* to the replaced best neighbor.
		114	*/
		115	curr_router = rcu_dereference_protected(orig_ifinfo->router, true);
		116
108	rcu_assign_pointer(orig_ifinfo->router, neigh_node);	117	rcu_assign_pointer(orig_ifinfo->router, neigh_node);
109	spin_unlock_bh(&orig_node->neigh_list_lock);	118	spin_unlock_bh(&orig_node->neigh_list_lock);
110	batadv_orig_ifinfo_put(orig_ifinfo);	119	batadv_orig_ifinfo_put(orig_ifinfo);

net/batman-adv/send.c+6−0

 		if (pending) {
 			hlist_del(&forw_packet->list);
+			if (!forw_packet->own)
+				atomic_inc(&bat_priv->bcast_queue_left);
 			batadv_forw_packet_free(forw_packet);
 		}
 	}
 		if (pending) {
 			hlist_del(&forw_packet->list);
+			if (!forw_packet->own)
+				atomic_inc(&bat_priv->batman_queue_left);
 			batadv_forw_packet_free(forw_packet);
 		}
 	}

net/batman-adv/soft-interface.c+6−2

 	 */
 	nf_reset(skb);
+	if (unlikely(!pskb_may_pull(skb, ETH_HLEN)))
+		goto dropped;
 	vid = batadv_get_vid(skb, 0);
 	ethhdr = eth_hdr(skb);
 	switch (ntohs(ethhdr->h_proto)) {
 	case ETH_P_8021Q:
+		if (!pskb_may_pull(skb, VLAN_ETH_HLEN))
+			goto dropped;
 		vhdr = (struct vlan_ethhdr *)skb->data;
 		if (vhdr->h_vlan_encapsulated_proto != ethertype)
 	}
 	/* skb->dev & skb->pkt_type are set here */
-	if (unlikely(!pskb_may_pull(skb, ETH_HLEN)))
-		goto dropped;
 	skb->protocol = eth_type_trans(skb, soft_iface);
 	/* should not be necessary anymore as we use skb_pull_rcsum()

net/batman-adv/translation-table.c+4−38

 	tt_local_entry = container_of(ref, struct batadv_tt_local_entry,
 				      common.refcount);
+	batadv_softif_vlan_put(tt_local_entry->vlan);
 	kfree_rcu(tt_local_entry, common.rcu);
 }
 	kref_get(&tt_local->common.refcount);
 	tt_local->last_seen = jiffies;
 	tt_local->common.added_at = tt_local->last_seen;
+	tt_local->vlan = vlan;
 	/* the batman interface mac and multicast addresses should never be
 	 * purged
 	struct batadv_tt_common_entry *tt_common_entry;
 	struct batadv_tt_local_entry *tt_local;
 	struct batadv_hard_iface *primary_if;
-	struct batadv_softif_vlan *vlan;
 	struct hlist_head *head;
 	unsigned short vid;
 	u32 i;
 			last_seen_msecs = last_seen_msecs % 1000;
 			no_purge = tt_common_entry->flags & np_flag;
-			vlan = batadv_softif_vlan_get(bat_priv, vid);
-			if (!vlan) {
-				seq_printf(seq, "Cannot retrieve VLAN %d\n",
-					   BATADV_PRINT_VID(vid));
-				continue;
-			}
 			seq_printf(seq,
 				   " * %pM %4i [%c%c%c%c%c%c] %3u.%03u   (%#.8x)\n",
 				   tt_common_entry->addr,
 				     BATADV_TT_CLIENT_ISOLA) ? 'I' : '.'),
 				   no_purge ? 0 : last_seen_secs,
 				   no_purge ? 0 : last_seen_msecs,
-				   vlan->tt.crc);
+				   tt_local->vlan->tt.crc);
-			batadv_softif_vlan_put(vlan);
 		}
 		rcu_read_unlock();
 	}
 {
 	struct batadv_tt_local_entry *tt_local_entry;
 	u16 flags, curr_flags = BATADV_NO_FLAGS;
-	struct batadv_softif_vlan *vlan;
 	void *tt_entry_exists;
 	tt_local_entry = batadv_tt_local_hash_find(bat_priv, addr, vid);
 	/* extra call to free the local tt entry */
 	batadv_tt_local_entry_put(tt_local_entry);
-	/* decrease the reference held for this vlan */
-	vlan = batadv_softif_vlan_get(bat_priv, vid);
-	if (!vlan)
-		goto out;
-	batadv_softif_vlan_put(vlan);
-	batadv_softif_vlan_put(vlan);
 out:
 	if (tt_local_entry)
 		batadv_tt_local_entry_put(tt_local_entry);
 	spinlock_t *list_lock; /* protects write access to the hash lists */
 	struct batadv_tt_common_entry *tt_common_entry;
 	struct batadv_tt_local_entry *tt_local;
-	struct batadv_softif_vlan *vlan;
 	struct hlist_node *node_tmp;
 	struct hlist_head *head;
 	u32 i;
 						struct batadv_tt_local_entry,
 						common);
-			/* decrease the reference held for this vlan */
-			vlan = batadv_softif_vlan_get(bat_priv,
-						      tt_common_entry->vid);
-			if (vlan) {
-				batadv_softif_vlan_put(vlan);
-				batadv_softif_vlan_put(vlan);
-			}
 			batadv_tt_local_entry_put(tt_local);
 		}
 		spin_unlock_bh(list_lock);
 	struct batadv_hashtable *hash = bat_priv->tt.local_hash;
 	struct batadv_tt_common_entry *tt_common;
 	struct batadv_tt_local_entry *tt_local;
-	struct batadv_softif_vlan *vlan;
 	struct hlist_node *node_tmp;
 	struct hlist_head *head;
 	spinlock_t *list_lock; /* protects write access to the hash lists */
 						struct batadv_tt_local_entry,
 						common);
-			/* decrease the reference held for this vlan */
-			vlan = batadv_softif_vlan_get(bat_priv, tt_common->vid);
-			if (vlan) {
-				batadv_softif_vlan_put(vlan);
-				batadv_softif_vlan_put(vlan);
-			}
 			batadv_tt_local_entry_put(tt_local);
 		}
 		spin_unlock_bh(list_lock);

net/batman-adv/types.h+7−0

  * @ifinfo_lock: lock protecting private ifinfo members and list
  * @if_incoming: pointer to incoming hard-interface
  * @last_seen: when last packet via this neighbor was received
+ * @hardif_neigh: hardif_neigh of this neighbor
  * @refcount: number of contexts the object is used
  * @rcu: struct used for freeing in an RCU-safe manner
  */
 	spinlock_t ifinfo_lock;	/* protects ifinfo_list and its members */
 	struct batadv_hard_iface *if_incoming;
 	unsigned long last_seen;
+	struct batadv_hardif_neigh_node *hardif_neigh;
 	struct kref refcount;
 	struct rcu_head rcu;
 };
  * struct batadv_tt_local_entry - translation table local entry data
  * @common: general translation table data
  * @last_seen: timestamp used for purging stale tt local entries
+ * @vlan: soft-interface vlan of the entry
  */
 struct batadv_tt_local_entry {
 	struct batadv_tt_common_entry common;
 	unsigned long last_seen;
+	struct batadv_softif_vlan *vlan;
 };
 /**
  * struct batadv_algo_ops - mesh algorithm callbacks
  * @list: list node for the batadv_algo_list
  * @name: name of the algorithm
+ * @bat_iface_activate: start routing mechanisms when hard-interface is brought
+ *  up
  * @bat_iface_enable: init routing info when hard-interface is enabled
  * @bat_iface_disable: de-init routing info when hard-interface is disabled
  * @bat_iface_update_mac: (re-)init mac addresses of the protocol information
 struct batadv_algo_ops {
 	struct hlist_node list;
 	char *name;
+	void (*bat_iface_activate)(struct batadv_hard_iface *hard_iface);
 	int (*bat_iface_enable)(struct batadv_hard_iface *hard_iface);
 	void (*bat_iface_disable)(struct batadv_hard_iface *hard_iface);
 	void (*bat_iface_update_mac)(struct batadv_hard_iface *hard_iface);

net/ceph/auth.c+2−6

 }
 EXPORT_SYMBOL(ceph_auth_create_authorizer);
-void ceph_auth_destroy_authorizer(struct ceph_auth_client *ac,
+void ceph_auth_destroy_authorizer(struct ceph_authorizer *a)
-				  struct ceph_authorizer *a)
 {
-	mutex_lock(&ac->mutex);
+	a->destroy(a);
-	if (ac->ops && ac->ops->destroy_authorizer)
-		ac->ops->destroy_authorizer(ac, a);
-	mutex_unlock(&ac->mutex);
 }
 EXPORT_SYMBOL(ceph_auth_destroy_authorizer);

net/ceph/auth_none.c+39−32

@@ -16,7 +16,6 @@ static void reset(struct ceph_auth_client *ac) · 15 unmodified lines
16	struct ceph_auth_none_info *xi = ac->private;	16	struct ceph_auth_none_info *xi = ac->private;
17		17
18	xi->starting = true;	18	xi->starting = true;
19	xi->built_authorizer = false;
20	}	19	}
21		20
22	static void destroy(struct ceph_auth_client *ac)	21	static void destroy(struct ceph_auth_client *ac)
@@ -39,6 +38,27 @@ static int should_authenticate(struct ceph_auth_client *ac) · 16 unmodified lines
39	return xi->starting;	38	return xi->starting;
40	}	39	}
41		40
		41	static int ceph_auth_none_build_authorizer(struct ceph_auth_client *ac,
		42	struct ceph_none_authorizer *au)
		43	{
		44	void *p = au->buf;
		45	void *const end = p + sizeof(au->buf);
		46	int ret;
		47
		48	ceph_encode_8_safe(&p, end, 1, e_range);
		49	ret = ceph_entity_name_encode(ac->name, &p, end);
		50	if (ret < 0)
		51	return ret;
		52
		53	ceph_encode_64_safe(&p, end, ac->global_id, e_range);
		54	au->buf_len = p - (void *)au->buf;
		55	dout("%s built authorizer len %d\n", __func__, au->buf_len);
		56	return 0;
		57
		58	e_range:
		59	return -ERANGE;
		60	}
		61
42	static int build_request(struct ceph_auth_client ac, void buf, void *end)	62	static int build_request(struct ceph_auth_client ac, void buf, void *end)
43	{	63	{
44	return 0;	64	return 0;
@@ -57,32 +77,32 @@ static int handle_reply(struct ceph_auth_client *ac, int result, · 12 unmodified lines
57	return result;	77	return result;
58	}	78	}
59		79
		80	static void ceph_auth_none_destroy_authorizer(struct ceph_authorizer *a)
		81	{
		82	kfree(a);
		83	}
		84
60	/*	85	/*
61	* build an 'authorizer' with our entity_name and global_id. we can	86	* build an 'authorizer' with our entity_name and global_id. it is
62	* reuse a single static copy since it is identical for all services	87	* identical for all services we connect to.
63	* we connect to.
64	*/	88	*/
65	static int ceph_auth_none_create_authorizer(	89	static int ceph_auth_none_create_authorizer(
66	struct ceph_auth_client *ac, int peer_type,	90	struct ceph_auth_client *ac, int peer_type,
67	struct ceph_auth_handshake *auth)	91	struct ceph_auth_handshake *auth)
68	{	92	{
69	struct ceph_auth_none_info *ai = ac->private;	93	struct ceph_none_authorizer *au;
70	struct ceph_none_authorizer *au = &ai->au;
71	void p, end;
72	int ret;	94	int ret;
73		95
74	if (!ai->built_authorizer) {	96	au = kmalloc(sizeof(*au), GFP_NOFS);
75	p = au->buf;	97	if (!au)
76	end = p + sizeof(au->buf);	98	return -ENOMEM;
77	ceph_encode_8(&p, 1);	99
78	ret = ceph_entity_name_encode(ac->name, &p, end - 8);	100	au->base.destroy = ceph_auth_none_destroy_authorizer;
79	if (ret < 0)	101
80	goto bad;	102	ret = ceph_auth_none_build_authorizer(ac, au);
81	ceph_decode_need(&p, end, sizeof(u64), bad2);	103	if (ret) {
82	ceph_encode_64(&p, ac->global_id);	104	kfree(au);
83	au->buf_len = p - (void *)au->buf;	105	return ret;
84	ai->built_authorizer = true;
85	dout("built authorizer len %d\n", au->buf_len);
86	}	106	}
87		107
88	auth->authorizer = (struct ceph_authorizer *) au;	108	auth->authorizer = (struct ceph_authorizer *) au;
@@ -92,17 +112,6 @@ static int ceph_auth_none_create_authorizer( · 3 unmodified lines
92	auth->authorizer_reply_buf_len = sizeof (au->reply_buf);	112	auth->authorizer_reply_buf_len = sizeof (au->reply_buf);
93		113
94	return 0;	114	return 0;
95
96	bad2:
97	ret = -ERANGE;
98	bad:
99	return ret;
100	}
101
102	static void ceph_auth_none_destroy_authorizer(struct ceph_auth_client *ac,
103	struct ceph_authorizer *a)
104	{
105	/* nothing to do */
106	}	115	}
107		116
108	static const struct ceph_auth_client_ops ceph_auth_none_ops = {	117	static const struct ceph_auth_client_ops ceph_auth_none_ops = {
@@ -114,7 +123,6 @@ static const struct ceph_auth_client_ops ceph_auth_none_ops = { · 5 unmodified lines
114	.build_request = build_request,	123	.build_request = build_request,
115	.handle_reply = handle_reply,	124	.handle_reply = handle_reply,
116	.create_authorizer = ceph_auth_none_create_authorizer,	125	.create_authorizer = ceph_auth_none_create_authorizer,
117	.destroy_authorizer = ceph_auth_none_destroy_authorizer,
118	};	126	};
119		127
120	int ceph_auth_none_init(struct ceph_auth_client *ac)	128	int ceph_auth_none_init(struct ceph_auth_client *ac)
@@ -127,7 +135,6 @@ int ceph_auth_none_init(struct ceph_auth_client *ac) · 6 unmodified lines
127	return -ENOMEM;	135	return -ENOMEM;
128		136
129	xi->starting = true;	137	xi->starting = true;
130	xi->built_authorizer = false;
131		138
132	ac->protocol = CEPH_AUTH_NONE;	139	ac->protocol = CEPH_AUTH_NONE;
133	ac->private = xi;	140	ac->private = xi;

net/ceph/auth_none.h+1−2

  */
 struct ceph_none_authorizer {
+	struct ceph_authorizer base;
 	char buf[128];
 	int buf_len;
 	char reply_buf[0];
 struct ceph_auth_none_info {
 	bool starting;
-	bool built_authorizer;
-	struct ceph_none_authorizer au;   /* we only need one; it's static */
 };
 int ceph_auth_none_init(struct ceph_auth_client *ac);

net/ceph/auth_x.c+10−11

 	return -EAGAIN;
 }
+static void ceph_x_destroy_authorizer(struct ceph_authorizer *a)
+{
+	struct ceph_x_authorizer *au = (void *)a;
+	ceph_x_authorizer_cleanup(au);
+	kfree(au);
+}
 static int ceph_x_create_authorizer(
 	struct ceph_auth_client *ac, int peer_type,
 	struct ceph_auth_handshake *auth)
 	if (!au)
 		return -ENOMEM;
+	au->base.destroy = ceph_x_destroy_authorizer;
 	ret = ceph_x_build_authorizer(ac, th, au);
 	if (ret) {
 		kfree(au);
 	return ret;
 }
-static void ceph_x_destroy_authorizer(struct ceph_auth_client *ac,
-				      struct ceph_authorizer *a)
-{
-	struct ceph_x_authorizer *au = (void *)a;
-	ceph_x_authorizer_cleanup(au);
-	kfree(au);
-}
 static void ceph_x_reset(struct ceph_auth_client *ac)
 {
 	struct ceph_x_info *xi = ac->private;
 	.create_authorizer = ceph_x_create_authorizer,
 	.update_authorizer = ceph_x_update_authorizer,
 	.verify_authorizer_reply = ceph_x_verify_authorizer_reply,
-	.destroy_authorizer = ceph_x_destroy_authorizer,
 	.invalidate_authorizer = ceph_x_invalidate_authorizer,
 	.reset =  ceph_x_reset,
 	.destroy = ceph_x_destroy,

net/ceph/auth_x.h+1−0

@@ -26,6 +26,7 @@ struct ceph_x_ticket_handler { · 25 unmodified lines
26		26
27		27
28	struct ceph_x_authorizer {	28	struct ceph_x_authorizer {
		29	struct ceph_authorizer base;
29	struct ceph_crypto_key session_key;	30	struct ceph_crypto_key session_key;
30	struct ceph_buffer *buf;	31	struct ceph_buffer *buf;
31	unsigned int service;	32	unsigned int service;

net/ceph/osd_client.c+2−4

 	dout("put_osd %p %d -> %d\n", osd, atomic_read(&osd->o_ref),
 	     atomic_read(&osd->o_ref) - 1);
 	if (atomic_dec_and_test(&osd->o_ref)) {
-		struct ceph_auth_client *ac = osd->o_osdc->client->monc.auth;
 		if (osd->o_auth.authorizer)
-			ceph_auth_destroy_authorizer(ac, osd->o_auth.authorizer);
+			ceph_auth_destroy_authorizer(osd->o_auth.authorizer);
 		kfree(osd);
 	}
 }
 	struct ceph_auth_handshake *auth = &o->o_auth;
 	if (force_new && auth->authorizer) {
-		ceph_auth_destroy_authorizer(ac, auth->authorizer);
+		ceph_auth_destroy_authorizer(auth->authorizer);
 		auth->authorizer = NULL;
 	}
 	if (!auth->authorizer) {

net/core/dev.c+1−1

@@ -2815,7 +2815,7 @@ static netdev_features_t harmonize_features(struct sk_buff *skb, · 2814 unmodified lines
2815		2815
2816	if (skb->ip_summed != CHECKSUM_NONE &&	2816	if (skb->ip_summed != CHECKSUM_NONE &&
2817	!can_checksum_protocol(features, type)) {	2817	!can_checksum_protocol(features, type)) {
2818	features &= ~NETIF_F_CSUM_MASK;	2818	features &= ~(NETIF_F_CSUM_MASK \| NETIF_F_GSO_MASK);
2819	} else if (illegal_highdma(skb->dev, skb)) {	2819	} else if (illegal_highdma(skb->dev, skb)) {
2820	features &= ~NETIF_F_SG;	2820	features &= ~NETIF_F_SG;
2821	}	2821	}

net/ipv4/inet_hashtables.c+2−0

 						     const struct sock *sk2,
 						     bool match_wildcard))
 {
+	struct inet_bind_bucket *tb = inet_csk(sk)->icsk_bind_hash;
 	struct sock *sk2;
 	kuid_t uid = sock_i_uid(sk);
 		    sk2->sk_family == sk->sk_family &&
 		    ipv6_only_sock(sk2) == ipv6_only_sock(sk) &&
 		    sk2->sk_bound_dev_if == sk->sk_bound_dev_if &&
+		    inet_csk(sk2)->icsk_bind_hash == tb &&
 		    sk2->sk_reuseport && uid_eq(uid, sock_i_uid(sk2)) &&
 		    saddr_same(sk, sk2, false))
 			return reuseport_add_sock(sk, sk2);

net/ipv4/ip_gre.c+13−6

 	return ip_route_output_key(net, fl);
 }
-static void gre_fb_xmit(struct sk_buff *skb, struct net_device *dev)
+static void gre_fb_xmit(struct sk_buff *skb, struct net_device *dev,
+			__be16 proto)
 {
 	struct ip_tunnel_info *tun_info;
 	const struct ip_tunnel_key *key;
 		goto err_free_rt;
 	flags = tun_info->key.tun_flags & (TUNNEL_CSUM | TUNNEL_KEY);
-	gre_build_header(skb, tunnel_hlen, flags, htons(ETH_P_TEB),
+	gre_build_header(skb, tunnel_hlen, flags, proto,
 			 tunnel_id_to_key(tun_info->key.tun_id), 0);
 	df = key->tun_flags & TUNNEL_DONT_FRAGMENT ?  htons(IP_DF) : 0;
 	const struct iphdr *tnl_params;
 	if (tunnel->collect_md) {
-		gre_fb_xmit(skb, dev);
+		gre_fb_xmit(skb, dev, skb->protocol);
 		return NETDEV_TX_OK;
 	}
 	struct ip_tunnel *tunnel = netdev_priv(dev);
 	if (tunnel->collect_md) {
-		gre_fb_xmit(skb, dev);
+		gre_fb_xmit(skb, dev, htons(ETH_P_TEB));
 		return NETDEV_TX_OK;
 	}
 	netif_keep_dst(dev);
 	dev->addr_len		= 4;
-	if (iph->daddr) {
+	if (iph->daddr && !tunnel->collect_md) {
 #ifdef CONFIG_NET_IPGRE_BROADCAST
 		if (ipv4_is_multicast(iph->daddr)) {
 			if (!iph->saddr)
 			dev->header_ops = &ipgre_header_ops;
 		}
 #endif
-	} else
+	} else if (!tunnel->collect_md) {
 		dev->header_ops = &ipgre_header_ops;
+	}
 	return ip_tunnel_init(dev);
 }
 	if (flags & (GRE_VERSION|GRE_ROUTING))
 		return -EINVAL;
+	if (data[IFLA_GRE_COLLECT_METADATA] &&
+	    data[IFLA_GRE_ENCAP_TYPE] &&
+	    nla_get_u16(data[IFLA_GRE_ENCAP_TYPE]) != TUNNEL_ENCAP_NONE)
+		return -EINVAL;
 	return 0;
 }

net/ipv4/ip_tunnel.c+2−2

 		if (!IS_ERR(rt)) {
 			tdev = rt->dst.dev;
-			dst_cache_set_ip4(&tunnel->dst_cache, &rt->dst,
-					  fl4.saddr);
 			ip_rt_put(rt);
 		}
 		if (dev->type != ARPHRD_ETHER)
 			dev->flags |= IFF_POINTOPOINT;
+		dst_cache_reset(&tunnel->dst_cache);
 	}
 	if (!tdev && tunnel->parms.link)

net/ipv6/ila/ila_lwt.c+1−2

@@ -144,8 +144,7 @@ nla_put_failure: · 143 unmodified lines
144		144
145	static int ila_encap_nlsize(struct lwtunnel_state *lwtstate)	145	static int ila_encap_nlsize(struct lwtunnel_state *lwtstate)
146	{	146	{
147	/* No encapsulation overhead */	147	return nla_total_size(sizeof(u64)); /* ILA_ATTR_LOCATOR */
148	return 0;
149	}	148	}
150		149
151	static int ila_encap_cmp(struct lwtunnel_state a, struct lwtunnel_state b)	150	static int ila_encap_cmp(struct lwtunnel_state a, struct lwtunnel_state b)

net/l2tp/l2tp_core.c+2−2

@@ -1376,9 +1376,9 @@ static int l2tp_tunnel_sock_create(struct net *net, · 1375 unmodified lines
1376	memcpy(&udp_conf.peer_ip6, cfg->peer_ip6,	1376	memcpy(&udp_conf.peer_ip6, cfg->peer_ip6,
1377	sizeof(udp_conf.peer_ip6));	1377	sizeof(udp_conf.peer_ip6));
1378	udp_conf.use_udp6_tx_checksums =	1378	udp_conf.use_udp6_tx_checksums =
1379	cfg->udp6_zero_tx_checksums;	1379	! cfg->udp6_zero_tx_checksums;
1380	udp_conf.use_udp6_rx_checksums =	1380	udp_conf.use_udp6_rx_checksums =
1381	cfg->udp6_zero_rx_checksums;	1381	! cfg->udp6_zero_rx_checksums;
1382	} else	1382	} else
1383	#endif	1383	#endif
1384	{	1384	{

net/mac80211/iface.c+2−2

@@ -1761,7 +1761,7 @@ int ieee80211_if_add(struct ieee80211_local local, const char name, · 1760 unmodified lines
1761		1761
1762	ret = dev_alloc_name(ndev, ndev->name);	1762	ret = dev_alloc_name(ndev, ndev->name);
1763	if (ret < 0) {	1763	if (ret < 0) {
1764	free_netdev(ndev);	1764	ieee80211_if_free(ndev);
1765	return ret;	1765	return ret;
1766	}	1766	}
1767		1767
@@ -1847,7 +1847,7 @@ int ieee80211_if_add(struct ieee80211_local local, const char name, · 79 unmodified lines
1847		1847
1848	ret = register_netdevice(ndev);	1848	ret = register_netdevice(ndev);
1849	if (ret) {	1849	if (ret) {
1850	free_netdev(ndev);	1850	ieee80211_if_free(ndev);
1851	return ret;	1851	return ret;
1852	}	1852	}
1853	}	1853	}

net/rds/tcp.c+2−1

 /*
  * This is the only path that sets tc->t_sock.  Send and receive trust that
- * it is set.  The RDS_CONN_CONNECTED bit protects those paths from being
+ * it is set.  The RDS_CONN_UP bit protects those paths from being
  * called while it isn't set.
  */
 void rds_tcp_set_callbacks(struct socket *sock, struct rds_connection *conn)
 	if (!tc)
 		return -ENOMEM;
+	mutex_init(&tc->t_conn_lock);
 	tc->t_sock = NULL;
 	tc->t_tinc = NULL;
 	tc->t_tinc_hdr_rem = sizeof(struct rds_header);

net/rds/tcp.h+4−0

 	struct list_head	t_tcp_node;
 	struct rds_connection   *conn;
+	/* t_conn_lock synchronizes the connection establishment between
+	 * rds_tcp_accept_one and rds_tcp_conn_connect
+	 */
+	struct mutex		t_conn_lock;
 	struct socket		*t_sock;
 	void			*t_orig_write_space;
 	void			*t_orig_data_ready;

net/rds/tcp_connect.c+8−0

 	struct socket *sock = NULL;
 	struct sockaddr_in src, dest;
 	int ret;
+	struct rds_tcp_connection *tc = conn->c_transport_data;
+	mutex_lock(&tc->t_conn_lock);
+	if (rds_conn_up(conn)) {
+		mutex_unlock(&tc->t_conn_lock);
+		return 0;
+	}
 	ret = sock_create_kern(rds_conn_net(conn), PF_INET,
 			       SOCK_STREAM, IPPROTO_TCP, &sock);
 	if (ret < 0)
 	}
 out:
+	mutex_unlock(&tc->t_conn_lock);
 	if (sock)
 		sock_release(sock);
 	return ret;

net/rds/tcp_listen.c+36−18

 	struct rds_connection *conn;
 	int ret;
 	struct inet_sock *inet;
-	struct rds_tcp_connection *rs_tcp;
+	struct rds_tcp_connection *rs_tcp = NULL;
+	int conn_state;
+	struct sock *nsk;
 	ret = sock_create_kern(sock_net(sock->sk), sock->sk->sk_family,
 			       sock->sk->sk_type, sock->sk->sk_protocol,
 	 * rds_tcp_state_change() will do that cleanup
 	 */
 	rs_tcp = (struct rds_tcp_connection *)conn->c_transport_data;
-	if (rs_tcp->t_sock &&
-	    ntohl(inet->inet_saddr) < ntohl(inet->inet_daddr)) {
-		struct sock *nsk = new_sock->sk;
-		nsk->sk_user_data = NULL;
-		nsk->sk_prot->disconnect(nsk, 0);
-		tcp_done(nsk);
-		new_sock = NULL;
-		ret = 0;
-		goto out;
-	} else if (rs_tcp->t_sock) {
-		rds_tcp_restore_callbacks(rs_tcp->t_sock, rs_tcp);
-		conn->c_outgoing = 0;
-	}
 	rds_conn_transition(conn, RDS_CONN_DOWN, RDS_CONN_CONNECTING);
+	mutex_lock(&rs_tcp->t_conn_lock);
+	conn_state = rds_conn_state(conn);
+	if (conn_state != RDS_CONN_CONNECTING && conn_state != RDS_CONN_UP)
+		goto rst_nsk;
+	if (rs_tcp->t_sock) {
+		/* Need to resolve a duelling SYN between peers.
+		 * We have an outstanding SYN to this peer, which may
+		 * potentially have transitioned to the RDS_CONN_UP state,
+		 * so we must quiesce any send threads before resetting
+		 * c_transport_data.
+		 */
+		wait_event(conn->c_waitq,
+			   !test_bit(RDS_IN_XMIT, &conn->c_flags));
+		if (ntohl(inet->inet_saddr) < ntohl(inet->inet_daddr)) {
+			goto rst_nsk;
+		} else if (rs_tcp->t_sock) {
+			rds_tcp_restore_callbacks(rs_tcp->t_sock, rs_tcp);
+			conn->c_outgoing = 0;
+		}
+	}
 	rds_tcp_set_callbacks(new_sock, conn);
-	rds_connect_complete(conn);
+	rds_connect_complete(conn); /* marks RDS_CONN_UP */
+	new_sock = NULL;
+	ret = 0;
+	goto out;
+rst_nsk:
+	/* reset the newly returned accept sock and bail */
+	nsk = new_sock->sk;
+	rds_tcp_stats_inc(s_tcp_listen_closed_stale);
+	nsk->sk_user_data = NULL;
+	nsk->sk_prot->disconnect(nsk, 0);
+	tcp_done(nsk);
 	new_sock = NULL;
 	ret = 0;
 out:
+	if (rs_tcp)
+		mutex_unlock(&rs_tcp->t_conn_lock);
 	if (new_sock)
 		sock_release(new_sock);
 	return ret;

net/sched/sch_netem.c+59−2

@@ -395,6 +395,25 @@ static void tfifo_enqueue(struct sk_buff nskb, struct Qdisc sch) · 394 unmodified lines
395	sch->q.qlen++;	395	sch->q.qlen++;
396	}	396	}
397		397
		398	/* netem can't properly corrupt a megapacket (like we get from GSO), so instead
		399	* when we statistically choose to corrupt one, we instead segment it, returning
		400	* the first packet to be corrupted, and re-enqueue the remaining frames
		401	*/
		402	static struct sk_buff netem_segment(struct sk_buff skb, struct Qdisc *sch)
		403	{
		404	struct sk_buff *segs;
		405	netdev_features_t features = netif_skb_features(skb);
		406
		407	segs = skb_gso_segment(skb, features & ~NETIF_F_GSO_MASK);
		408
		409	if (IS_ERR_OR_NULL(segs)) {
		410	qdisc_reshape_fail(skb, sch);
		411	return NULL;
		412	}
		413	consume_skb(skb);
		414	return segs;
		415	}
		416
398	/*	417	/*
399	* Insert one skb into qdisc.	418	* Insert one skb into qdisc.
400	* Note: parent depends on return value to account for queue length.	419	* Note: parent depends on return value to account for queue length.
@@ -407,7 +426,11 @@ static int netem_enqueue(struct sk_buff skb, struct Qdisc sch) · 6 unmodified lines
407	/* We don't fill cb now as skb_unshare() may invalidate it */	426	/* We don't fill cb now as skb_unshare() may invalidate it */
408	struct netem_skb_cb *cb;	427	struct netem_skb_cb *cb;
409	struct sk_buff *skb2;	428	struct sk_buff *skb2;
		429	struct sk_buff *segs = NULL;
		430	unsigned int len = 0, last_len, prev_len = qdisc_pkt_len(skb);
		431	int nb = 0;
410	int count = 1;	432	int count = 1;
		433	int rc = NET_XMIT_SUCCESS;
411		434
412	/* Random duplication */	435	/* Random duplication */
413	if (q->duplicate && q->duplicate >= get_crandom(&q->dup_cor))	436	if (q->duplicate && q->duplicate >= get_crandom(&q->dup_cor))
@@ -453,10 +476,23 @@ static int netem_enqueue(struct sk_buff skb, struct Qdisc sch) · 39 unmodified lines
453	* do it now in software before we mangle it.	476	* do it now in software before we mangle it.
454	*/	477	*/
455	if (q->corrupt && q->corrupt >= get_crandom(&q->corrupt_cor)) {	478	if (q->corrupt && q->corrupt >= get_crandom(&q->corrupt_cor)) {
		479	if (skb_is_gso(skb)) {
		480	segs = netem_segment(skb, sch);
		481	if (!segs)
		482	return NET_XMIT_DROP;
		483	} else {
		484	segs = skb;
		485	}
		486
		487	skb = segs;
		488	segs = segs->next;
		489
456	if (!(skb = skb_unshare(skb, GFP_ATOMIC)) \|\|	490	if (!(skb = skb_unshare(skb, GFP_ATOMIC)) \|\|
457	(skb->ip_summed == CHECKSUM_PARTIAL &&	491	(skb->ip_summed == CHECKSUM_PARTIAL &&
458	skb_checksum_help(skb)))	492	skb_checksum_help(skb))) {
459	return qdisc_drop(skb, sch);	493	rc = qdisc_drop(skb, sch);
		494	goto finish_segs;
		495	}
460		496
461	skb->data[prandom_u32() % skb_headlen(skb)] ^=	497	skb->data[prandom_u32() % skb_headlen(skb)] ^=
462	1<<(prandom_u32() % 8);	498	1<<(prandom_u32() % 8);
@@ -516,6 +552,27 @@ static int netem_enqueue(struct sk_buff skb, struct Qdisc sch) · 53 unmodified lines
516	sch->qstats.requeues++;	552	sch->qstats.requeues++;
517	}	553	}
518		554
		555	finish_segs:
		556	if (segs) {
		557	while (segs) {
		558	skb2 = segs->next;
		559	segs->next = NULL;
		560	qdisc_skb_cb(segs)->pkt_len = segs->len;
		561	last_len = segs->len;
		562	rc = qdisc_enqueue(segs, sch);
		563	if (rc != NET_XMIT_SUCCESS) {
		564	if (net_xmit_drop_count(rc))
		565	qdisc_qstats_drop(sch);
		566	} else {
		567	nb++;
		568	len += last_len;
		569	}
		570	segs = skb2;
		571	}
		572	sch->q.qlen += nb;
		573	if (nb > 1)
		574	qdisc_tree_reduce_backlog(sch, 1 - nb, prev_len - len);
		575	}
519	return NET_XMIT_SUCCESS;	576	return NET_XMIT_SUCCESS;
520	}	577	}
521		578

net/tipc/node.c+5−0

 	int bearer_id = b->identity;
 	struct tipc_link_entry *le;
 	u16 bc_ack = msg_bcast_ack(hdr);
+	u32 self = tipc_own_addr(net);
 	int rc = 0;
 	__skb_queue_head_init(&xmitq);
 			return tipc_node_bc_rcv(net, skb, bearer_id);
 	}
+	/* Discard unicast link messages destined for another node */
+	if (unlikely(!msg_short(hdr) && (msg_destnode(hdr) != self)))
+		goto discard;
 	/* Locate neighboring node that sent packet */
 	n = tipc_node_find(net, msg_prevnode(hdr));
 	if (unlikely(!n))

samples/bpf/trace_output_kern.c+0−1

@@ -18,7 +18,6 @@ int bpf_prog1(struct pt_regs *ctx) · 17 unmodified lines
18	u64 cookie;	18	u64 cookie;
19	} data;	19	} data;
20		20
21	memset(&data, 0, sizeof(data));
22	data.pid = bpf_get_current_pid_tgid();	21	data.pid = bpf_get_current_pid_tgid();
23	data.cookie = 0x12345678;	22	data.cookie = 0x12345678;
24		23

sound/hda/ext/hdac_ext_stream.c+2−3

  */
 void snd_hdac_stream_free_all(struct hdac_ext_bus *ebus)
 {
-	struct hdac_stream *s;
+	struct hdac_stream *s, *_s;
 	struct hdac_ext_stream *stream;
 	struct hdac_bus *bus = ebus_to_hbus(ebus);
-	while (!list_empty(&bus->stream_list)) {
+	list_for_each_entry_safe(s, _s, &bus->stream_list, list) {
-		s = list_first_entry(&bus->stream_list, struct hdac_stream, list);
 		stream = stream_to_hdac_ext_stream(s);
 		snd_hdac_ext_stream_decouple(ebus, stream, false);
 		list_del(&s->list);

sound/hda/hdac_i915.c+51−11

@@ -20,6 +20,7 @@ · 19 unmodified lines
20	#include <sound/core.h>	20	#include <sound/core.h>
21	#include <sound/hdaudio.h>	21	#include <sound/hdaudio.h>
22	#include <sound/hda_i915.h>	22	#include <sound/hda_i915.h>
		23	#include <sound/hda_register.h>
23		24
24	static struct i915_audio_component *hdac_acomp;	25	static struct i915_audio_component *hdac_acomp;
25		26
@@ -97,26 +98,65 @@ int snd_hdac_display_power(struct hdac_bus *bus, bool enable) · 71 unmodified lines
97	}	98	}
98	EXPORT_SYMBOL_GPL(snd_hdac_display_power);	99	EXPORT_SYMBOL_GPL(snd_hdac_display_power);
99		100
		101	#define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) \|\| \
		102	((pci)->device == 0x0c0c) \|\| \
		103	((pci)->device == 0x0d0c) \|\| \
		104	((pci)->device == 0x160c))
		105
100	/**	106	/**
101	* snd_hdac_get_display_clk - Get CDCLK in kHz	107	* snd_hdac_i915_set_bclk - Reprogram BCLK for HSW/BDW
102	* @bus: HDA core bus	108	* @bus: HDA core bus
103	*	109	*
104	* This function is supposed to be used only by a HD-audio controller	110	* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
105	* driver that needs the interaction with i915 graphics.	111	* depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
		112	* are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
		113	* BCLK = CDCLK * M / N
		114	* The values will be lost when the display power well is disabled and need to
		115	* be restored to avoid abnormal playback speed.
106	*	116	*
107	* This function queries CDCLK value in kHz from the graphics driver and	117	* Call this function at initializing and changing power well, as well as
108	* returns the value. A negative code is returned in error.	118	* at ELD notifier for the hotplug.
109	*/	119	*/
110	int snd_hdac_get_display_clk(struct hdac_bus *bus)	120	void snd_hdac_i915_set_bclk(struct hdac_bus *bus)
111	{	121	{
112	struct i915_audio_component *acomp = bus->audio_component;	122	struct i915_audio_component *acomp = bus->audio_component;
		123	struct pci_dev *pci = to_pci_dev(bus->dev);
		124	int cdclk_freq;
		125	unsigned int bclk_m, bclk_n;
		126
		127	if (!acomp \|\| !acomp->ops \|\| !acomp->ops->get_cdclk_freq)
		128	return; /* only for i915 binding */
		129	if (!CONTROLLER_IN_GPU(pci))
		130	return; /* only HSW/BDW */
		131
		132	cdclk_freq = acomp->ops->get_cdclk_freq(acomp->dev);
		133	switch (cdclk_freq) {
		134	case 337500:
		135	bclk_m = 16;
		136	bclk_n = 225;
		137	break;
		138
		139	case 450000:
		140	default: /* default CDCLK 450MHz */
		141	bclk_m = 4;
		142	bclk_n = 75;
		143	break;
		144
		145	case 540000:
		146	bclk_m = 4;
		147	bclk_n = 90;
		148	break;
		149
		150	case 675000:
		151	bclk_m = 8;
		152	bclk_n = 225;
		153	break;
		154	}
113		155
114	if (!acomp \|\| !acomp->ops)	156	snd_hdac_chip_writew(bus, HSW_EM4, bclk_m);
115	return -ENODEV;	157	snd_hdac_chip_writew(bus, HSW_EM5, bclk_n);
116
117	return acomp->ops->get_cdclk_freq(acomp->dev);
118	}	158	}
119	EXPORT_SYMBOL_GPL(snd_hdac_get_display_clk);	159	EXPORT_SYMBOL_GPL(snd_hdac_i915_set_bclk);
120		160
121	/* There is a fixed mapping between audio pin node and display port	161	/* There is a fixed mapping between audio pin node and display port
122	* on current Intel platforms:	162	* on current Intel platforms:

sound/pci/hda/hda_intel.c+4−52

@@ -857,50 +857,6 @@ static int param_set_xint(const char val, const struct kernel_param kp) · 856 unmodified lines
857	#define azx_del_card_list(chip) /* NOP */	857	#define azx_del_card_list(chip) /* NOP */
858	#endif /* CONFIG_PM */	858	#endif /* CONFIG_PM */
859		859
860	/* Intel HSW/BDW display HDA controller is in GPU. Both its power and link BCLK
861	* depends on GPU. Two Extended Mode registers EM4 (M value) and EM5 (N Value)
862	* are used to convert CDClk (Core Display Clock) to 24MHz BCLK:
863	* BCLK = CDCLK * M / N
864	* The values will be lost when the display power well is disabled and need to
865	* be restored to avoid abnormal playback speed.
866	*/
867	static void haswell_set_bclk(struct hda_intel *hda)
868	{
869	struct azx *chip = &hda->chip;
870	int cdclk_freq;
871	unsigned int bclk_m, bclk_n;
872
873	if (!hda->need_i915_power)
874	return;
875
876	cdclk_freq = snd_hdac_get_display_clk(azx_bus(chip));
877	switch (cdclk_freq) {
878	case 337500:
879	bclk_m = 16;
880	bclk_n = 225;
881	break;
882
883	case 450000:
884	default: /* default CDCLK 450MHz */
885	bclk_m = 4;
886	bclk_n = 75;
887	break;
888
889	case 540000:
890	bclk_m = 4;
891	bclk_n = 90;
892	break;
893
894	case 675000:
895	bclk_m = 8;
896	bclk_n = 225;
897	break;
898	}
899
900	azx_writew(chip, HSW_EM4, bclk_m);
901	azx_writew(chip, HSW_EM5, bclk_n);
902	}
903
904	#if defined(CONFIG_PM_SLEEP) \|\| defined(SUPPORT_VGA_SWITCHEROO)	860	#if defined(CONFIG_PM_SLEEP) \|\| defined(SUPPORT_VGA_SWITCHEROO)
905	/*	861	/*
906	* power management	862	* power management
@@ -958,7 +914,7 @@ static int azx_resume(struct device *dev) · 51 unmodified lines
958	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL	914	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
959	&& hda->need_i915_power) {	915	&& hda->need_i915_power) {
960	snd_hdac_display_power(azx_bus(chip), true);	916	snd_hdac_display_power(azx_bus(chip), true);
961	haswell_set_bclk(hda);	917	snd_hdac_i915_set_bclk(azx_bus(chip));
962	}	918	}
963	if (chip->msi)	919	if (chip->msi)
964	if (pci_enable_msi(pci) < 0)	920	if (pci_enable_msi(pci) < 0)
@@ -1058,7 +1014,7 @@ static int azx_runtime_resume(struct device *dev) · 93 unmodified lines
1058	bus = azx_bus(chip);	1014	bus = azx_bus(chip);
1059	if (hda->need_i915_power) {	1015	if (hda->need_i915_power) {
1060	snd_hdac_display_power(bus, true);	1016	snd_hdac_display_power(bus, true);
1061	haswell_set_bclk(hda);	1017	snd_hdac_i915_set_bclk(bus);
1062	} else {	1018	} else {
1063	/* toggle codec wakeup bit for STATESTS read */	1019	/* toggle codec wakeup bit for STATESTS read */
1064	snd_hdac_set_codec_wakeup(bus, true);	1020	snd_hdac_set_codec_wakeup(bus, true);
@@ -1796,12 +1752,8 @@ static int azx_first_init(struct azx *chip) · 731 unmodified lines
1796	/* initialize chip */	1752	/* initialize chip */
1797	azx_init_pci(chip);	1753	azx_init_pci(chip);
1798		1754
1799	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {	1755	if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1800	struct hda_intel *hda;	1756	snd_hdac_i915_set_bclk(bus);
1801
1802	hda = container_of(chip, struct hda_intel, chip);
1803	haswell_set_bclk(hda);
1804	}
1805		1757
1806	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);	1758	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
1807		1759

sound/pci/hda/patch_hdmi.c+1−0

@@ -2232,6 +2232,7 @@ static void intel_pin_eld_notify(void *audio_ptr, int port) · 2231 unmodified lines
2232	if (atomic_read(&(codec)->core.in_pm))	2232	if (atomic_read(&(codec)->core.in_pm))
2233	return;	2233	return;
2234		2234
		2235	snd_hdac_i915_set_bclk(&codec->bus->core);
2235	check_presence_and_report(codec, pin_nid);	2236	check_presence_and_report(codec, pin_nid);
2236	}	2237	}
2237		2238

sound/pci/hda/patch_realtek.c+1−0

@@ -5584,6 +5584,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = { · 5583 unmodified lines
5584	SND_PCI_QUIRK(0x17aa, 0x5034, "Thinkpad T450", ALC292_FIXUP_TPT440_DOCK),	5584	SND_PCI_QUIRK(0x17aa, 0x5034, "Thinkpad T450", ALC292_FIXUP_TPT440_DOCK),
5585	SND_PCI_QUIRK(0x17aa, 0x5036, "Thinkpad T450s", ALC292_FIXUP_TPT440_DOCK),	5585	SND_PCI_QUIRK(0x17aa, 0x5036, "Thinkpad T450s", ALC292_FIXUP_TPT440_DOCK),
5586	SND_PCI_QUIRK(0x17aa, 0x503c, "Thinkpad L450", ALC292_FIXUP_TPT440_DOCK),	5586	SND_PCI_QUIRK(0x17aa, 0x503c, "Thinkpad L450", ALC292_FIXUP_TPT440_DOCK),
		5587	SND_PCI_QUIRK(0x17aa, 0x504a, "ThinkPad X260", ALC292_FIXUP_TPT440_DOCK),
5587	SND_PCI_QUIRK(0x17aa, 0x504b, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE),	5588	SND_PCI_QUIRK(0x17aa, 0x504b, "Thinkpad", ALC293_FIXUP_LENOVO_SPK_NOISE),
5588	SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),	5589	SND_PCI_QUIRK(0x17aa, 0x5109, "Thinkpad", ALC269_FIXUP_LIMIT_INT_MIC_BOOST),
5589	SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K),	5590	SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K),

sound/soc/codecs/Kconfig+1−0

@@ -629,6 +629,7 @@ config SND_SOC_RT5514 · 628 unmodified lines
629		629
630	config SND_SOC_RT5616	630	config SND_SOC_RT5616
631	tristate "Realtek RT5616 CODEC"	631	tristate "Realtek RT5616 CODEC"
		632	depends on I2C
632		633
633	config SND_SOC_RT5631	634	config SND_SOC_RT5631
634	tristate "Realtek ALC5631/RT5631 CODEC"	635	tristate "Realtek ALC5631/RT5631 CODEC"

sound/soc/codecs/arizona.c+12−0

@@ -249,6 +249,18 @@ int arizona_init_spk(struct snd_soc_codec *codec) · 248 unmodified lines
249	}	249	}
250	EXPORT_SYMBOL_GPL(arizona_init_spk);	250	EXPORT_SYMBOL_GPL(arizona_init_spk);
251		251
		252	int arizona_free_spk(struct snd_soc_codec *codec)
		253	{
		254	struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
		255	struct arizona *arizona = priv->arizona;
		256
		257	arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, arizona);
		258	arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, arizona);
		259
		260	return 0;
		261	}
		262	EXPORT_SYMBOL_GPL(arizona_free_spk);
		263
252	static const struct snd_soc_dapm_route arizona_mono_routes[] = {	264	static const struct snd_soc_dapm_route arizona_mono_routes[] = {
253	{ "OUT1R", NULL, "OUT1L" },	265	{ "OUT1R", NULL, "OUT1L" },
254	{ "OUT2R", NULL, "OUT2L" },	266	{ "OUT2R", NULL, "OUT2L" },

sound/soc/codecs/arizona.h+2−0

@@ -307,6 +307,8 @@ extern int arizona_init_spk(struct snd_soc_codec *codec); · 306 unmodified lines
307	extern int arizona_init_gpio(struct snd_soc_codec *codec);	307	extern int arizona_init_gpio(struct snd_soc_codec *codec);
308	extern int arizona_init_mono(struct snd_soc_codec *codec);	308	extern int arizona_init_mono(struct snd_soc_codec *codec);
309		309
		310	extern int arizona_free_spk(struct snd_soc_codec *codec);
		311
310	extern int arizona_init_dai(struct arizona_priv *priv, int dai);	312	extern int arizona_init_dai(struct arizona_priv *priv, int dai);
311		313
312	int arizona_set_output_mode(struct snd_soc_codec *codec, int output,	314	int arizona_set_output_mode(struct snd_soc_codec *codec, int output,

sound/soc/codecs/cs35l32.c+13−4

 	if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
 		pdata->sdout_share = val;
-	of_property_read_u32(np, "cirrus,boost-manager", &val);
+	if (of_property_read_u32(np, "cirrus,boost-manager", &val))
+		val = -1u;
 	switch (val) {
 	case CS35L32_BOOST_MGR_AUTO:
 	case CS35L32_BOOST_MGR_AUTO_AUDIO:
 	case CS35L32_BOOST_MGR_FIXED:
 		pdata->boost_mng = val;
 		break;
+	case -1u:
 	default:
 		dev_err(&i2c_client->dev,
 			"Wrong cirrus,boost-manager DT value %d\n", val);
 		pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
 	}
-	of_property_read_u32(np, "cirrus,sdout-datacfg", &val);
+	if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val))
+		val = -1u;
 	switch (val) {
 	case CS35L32_DATA_CFG_LR_VP:
 	case CS35L32_DATA_CFG_LR_STAT:
 	case CS35L32_DATA_CFG_LR_VPSTAT:
 		pdata->sdout_datacfg = val;
 		break;
+	case -1u:
 	default:
 		dev_err(&i2c_client->dev,
 			"Wrong cirrus,sdout-datacfg DT value %d\n", val);
 		pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
 	}
-	of_property_read_u32(np, "cirrus,battery-threshold", &val);
+	if (of_property_read_u32(np, "cirrus,battery-threshold", &val))
+		val = -1u;
 	switch (val) {
 	case CS35L32_BATT_THRESH_3_1V:
 	case CS35L32_BATT_THRESH_3_2V:
 	case CS35L32_BATT_THRESH_3_4V:
 		pdata->batt_thresh = val;
 		break;
+	case -1u:
 	default:
 		dev_err(&i2c_client->dev,
 			"Wrong cirrus,battery-threshold DT value %d\n", val);
 		pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
 	}
-	of_property_read_u32(np, "cirrus,battery-recovery", &val);
+	if (of_property_read_u32(np, "cirrus,battery-recovery", &val))
+		val = -1u;
 	switch (val) {
 	case CS35L32_BATT_RECOV_3_1V:
 	case CS35L32_BATT_RECOV_3_2V:
 	case CS35L32_BATT_RECOV_3_6V:
 		pdata->batt_recov = val;
 		break;
+	case -1u:
 	default:
 		dev_err(&i2c_client->dev,
 			"Wrong cirrus,battery-recovery DT value %d\n", val);

sound/soc/codecs/cs47l24.c+3−0

@@ -1108,6 +1108,9 @@ static int cs47l24_codec_remove(struct snd_soc_codec *codec) · 1107 unmodified lines
1108	priv->core.arizona->dapm = NULL;	1108	priv->core.arizona->dapm = NULL;
1109		1109
1110	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);	1110	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);
		1111
		1112	arizona_free_spk(codec);
		1113
1111	return 0;	1114	return 0;
1112	}	1115	}
1113		1116

sound/soc/codecs/hdac_hdmi.c+42−52

@@ -1420,32 +1420,39 @@ static int hdmi_codec_remove(struct snd_soc_codec *codec) · 1419 unmodified lines
1420	}	1420	}
1421		1421
1422	#ifdef CONFIG_PM	1422	#ifdef CONFIG_PM
1423	static int hdmi_codec_resume(struct snd_soc_codec *codec)	1423	static int hdmi_codec_prepare(struct device *dev)
1424	{	1424	{
1425	struct hdac_ext_device *edev = snd_soc_codec_get_drvdata(codec);	1425	struct hdac_ext_device *edev = to_hda_ext_device(dev);
		1426	struct hdac_device *hdac = &edev->hdac;
		1427
		1428	pm_runtime_get_sync(&edev->hdac.dev);
		1429
		1430	/*
		1431	* Power down afg.
		1432	* codec_read is preferred over codec_write to set the power state.
		1433	* This way verb is send to set the power state and response
		1434	* is received. So setting power state is ensured without using loop
		1435	* to read the state.
		1436	*/
		1437	snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
		1438	AC_PWRST_D3);
		1439
		1440	return 0;
		1441	}
		1442
		1443	static void hdmi_codec_complete(struct device *dev)
		1444	{
		1445	struct hdac_ext_device *edev = to_hda_ext_device(dev);
1426	struct hdac_hdmi_priv *hdmi = edev->private_data;	1446	struct hdac_hdmi_priv *hdmi = edev->private_data;
1427	struct hdac_hdmi_pin *pin;	1447	struct hdac_hdmi_pin *pin;
1428	struct hdac_device *hdac = &edev->hdac;	1448	struct hdac_device *hdac = &edev->hdac;
1429	struct hdac_bus *bus = hdac->bus;
1430	int err;
1431	unsigned long timeout;
1432
1433	hdac_hdmi_skl_enable_all_pins(&edev->hdac);
1434	hdac_hdmi_skl_enable_dp12(&edev->hdac);
1435		1449
1436	/* Power up afg */	1450	/* Power up afg */
1437	if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)) {	1451	snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
1438		1452	AC_PWRST_D0);
1439	snd_hdac_codec_write(hdac, hdac->afg, 0,
1440	AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1441		1453
1442	/* Wait till power state is set to D0 */	1454	hdac_hdmi_skl_enable_all_pins(&edev->hdac);
1443	timeout = jiffies + msecs_to_jiffies(1000);	1455	hdac_hdmi_skl_enable_dp12(&edev->hdac);
1444	while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0)
1445	&& time_before(jiffies, timeout)) {
1446	msleep(50);
1447	}
1448	}
1449		1456
1450	/*	1457	/*
1451	* As the ELD notify callback request is not entertained while the	1458	* As the ELD notify callback request is not entertained while the
@@ -1455,28 +1462,16 @@ static int hdmi_codec_resume(struct snd_soc_codec *codec) · 3 unmodified lines
1455	list_for_each_entry(pin, &hdmi->pin_list, head)	1462	list_for_each_entry(pin, &hdmi->pin_list, head)
1456	hdac_hdmi_present_sense(pin, 1);	1463	hdac_hdmi_present_sense(pin, 1);
1457		1464
1458	/*	1465	pm_runtime_put_sync(&edev->hdac.dev);
1459	* Codec power is turned ON during controller resume.
1460	* Turn it OFF here
1461	*/
1462	err = snd_hdac_display_power(bus, false);
1463	if (err < 0) {
1464	dev_err(bus->dev,
1465	"Cannot turn OFF display power on i915, err: %d\n",
1466	err);
1467	return err;
1468	}
1469
1470	return 0;
1471	}	1466	}
1472	#else	1467	#else
1473	#define hdmi_codec_resume NULL	1468	#define hdmi_codec_prepare NULL
		1469	#define hdmi_codec_complete NULL
1474	#endif	1470	#endif
1475		1471
1476	static struct snd_soc_codec_driver hdmi_hda_codec = {	1472	static struct snd_soc_codec_driver hdmi_hda_codec = {
1477	.probe = hdmi_codec_probe,	1473	.probe = hdmi_codec_probe,
1478	.remove = hdmi_codec_remove,	1474	.remove = hdmi_codec_remove,
1479	.resume = hdmi_codec_resume,
1480	.idle_bias_off = true,	1475	.idle_bias_off = true,
1481	};	1476	};
1482		1477
@@ -1561,7 +1556,6 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) · 78 unmodified lines
1561	struct hdac_ext_device *edev = to_hda_ext_device(dev);	1556	struct hdac_ext_device *edev = to_hda_ext_device(dev);
1562	struct hdac_device *hdac = &edev->hdac;	1557	struct hdac_device *hdac = &edev->hdac;
1563	struct hdac_bus *bus = hdac->bus;	1558	struct hdac_bus *bus = hdac->bus;
1564	unsigned long timeout;
1565	int err;	1559	int err;
1566		1560
1567	dev_dbg(dev, "Enter: %s\n", __func__);	1561	dev_dbg(dev, "Enter: %s\n", __func__);
@@ -1570,20 +1564,15 @@ static int hdac_hdmi_runtime_suspend(struct device *dev) · 2 unmodified lines
1570	if (!bus)	1564	if (!bus)
1571	return 0;	1565	return 0;
1572		1566
1573	/* Power down afg */	1567	/*
1574	if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)) {	1568	* Power down afg.
1575	snd_hdac_codec_write(hdac, hdac->afg, 0,	1569	* codec_read is preferred over codec_write to set the power state.
1576	AC_VERB_SET_POWER_STATE, AC_PWRST_D3);	1570	* This way verb is send to set the power state and response
1577		1571	* is received. So setting power state is ensured without using loop
1578	/* Wait till power state is set to D3 */	1572	* to read the state.
1579	timeout = jiffies + msecs_to_jiffies(1000);	1573	*/
1580	while (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D3)	1574	snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
1581	&& time_before(jiffies, timeout)) {	1575	AC_PWRST_D3);
1582
1583	msleep(50);
1584	}
1585	}
1586
1587	err = snd_hdac_display_power(bus, false);	1576	err = snd_hdac_display_power(bus, false);
1588	if (err < 0) {	1577	if (err < 0) {
1589	dev_err(bus->dev, "Cannot turn on display power on i915\n");	1578	dev_err(bus->dev, "Cannot turn on display power on i915\n");
@@ -1616,9 +1605,8 @@ static int hdac_hdmi_runtime_resume(struct device *dev) · 26 unmodified lines
1616	hdac_hdmi_skl_enable_dp12(&edev->hdac);	1605	hdac_hdmi_skl_enable_dp12(&edev->hdac);
1617		1606
1618	/* Power up afg */	1607	/* Power up afg */
1619	if (!snd_hdac_check_power_state(hdac, hdac->afg, AC_PWRST_D0))	1608	snd_hdac_codec_read(hdac, hdac->afg, 0, AC_VERB_SET_POWER_STATE,
1620	snd_hdac_codec_write(hdac, hdac->afg, 0,	1609	AC_PWRST_D0);
1621	AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1622		1610
1623	return 0;	1611	return 0;
1624	}	1612	}
@@ -1629,6 +1617,8 @@ static int hdac_hdmi_runtime_resume(struct device *dev) · 4 unmodified lines
1629		1617
1630	static const struct dev_pm_ops hdac_hdmi_pm = {	1618	static const struct dev_pm_ops hdac_hdmi_pm = {
1631	SET_RUNTIME_PM_OPS(hdac_hdmi_runtime_suspend, hdac_hdmi_runtime_resume, NULL)	1619	SET_RUNTIME_PM_OPS(hdac_hdmi_runtime_suspend, hdac_hdmi_runtime_resume, NULL)
		1620	.prepare = hdmi_codec_prepare,
		1621	.complete = hdmi_codec_complete,
1632	};	1622	};
1633		1623
1634	static const struct hda_device_id hdmi_list[] = {	1624	static const struct hda_device_id hdmi_list[] = {

sound/soc/codecs/nau8825.c+71−55

 	SND_SOC_DAPM_SUPPLY("ADC Power", NAU8825_REG_ANALOG_ADC_2, 6, 0, NULL,
 		0),
-	/* ADC for button press detection */
+	/* ADC for button press detection. A dapm supply widget is used to
-	SND_SOC_DAPM_ADC("SAR", NULL, NAU8825_REG_SAR_CTRL,
+	 * prevent dapm_power_widgets keeping the codec at SND_SOC_BIAS_ON
-		NAU8825_SAR_ADC_EN_SFT, 0),
+	 * during suspend.
+	 */
+	SND_SOC_DAPM_SUPPLY("SAR", NAU8825_REG_SAR_CTRL,
+		NAU8825_SAR_ADC_EN_SFT, 0, NULL, 0),
 	SND_SOC_DAPM_PGA_S("ADACL", 2, NAU8825_REG_RDAC, 12, 0, NULL, 0),
 	SND_SOC_DAPM_PGA_S("ADACR", 2, NAU8825_REG_RDAC, 13, 0, NULL, 0),
 static void nau8825_restart_jack_detection(struct regmap *regmap)
 {
+	/* Chip needs one FSCLK cycle in order to generate interrupts,
+	 * as we cannot guarantee one will be provided by the system. Turning
+	 * master mode on then off enables us to generate that FSCLK cycle
+	 * with a minimum of contention on the clock bus.
+	 */
+	regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
+		NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER);
+	regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
+		NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE);
 	/* this will restart the entire jack detection process including MIC/GND
 	 * switching and create interrupts. We have to go from 0 to 1 and back
 	 * to 0 to restart.
 	struct regmap *regmap = nau8825->regmap;
 	int active_irq, clear_irq = 0, event = 0, event_mask = 0;
-	regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq);
+	if (regmap_read(regmap, NAU8825_REG_IRQ_STATUS, &active_irq)) {
+		dev_err(nau8825->dev, "failed to read irq status\n");
+		return IRQ_NONE;
+	}
 	if ((active_irq & NAU8825_JACK_EJECTION_IRQ_MASK) ==
 		NAU8825_JACK_EJECTION_DETECTED) {
 					return ret;
 				}
 			}
-			ret = regcache_sync(nau8825->regmap);
-			if (ret) {
-				dev_err(codec->dev,
-					"Failed to sync cache: %d\n", ret);
-				return ret;
-			}
 		}
 		break;
 	case SND_SOC_BIAS_OFF:
 		if (nau8825->mclk_freq)
 			clk_disable_unprepare(nau8825->mclk);
-		regcache_mark_dirty(nau8825->regmap);
 		break;
 	}
 	return 0;
 }
+#ifdef CONFIG_PM
+static int nau8825_suspend(struct snd_soc_codec *codec)
+{
+	struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec);
+	disable_irq(nau8825->irq);
+	regcache_cache_only(nau8825->regmap, true);
+	regcache_mark_dirty(nau8825->regmap);
+	return 0;
+}
+static int nau8825_resume(struct snd_soc_codec *codec)
+{
+	struct nau8825 *nau8825 = snd_soc_codec_get_drvdata(codec);
+	/* The chip may lose power and reset in S3. regcache_sync restores
+	 * register values including configurations for sysclk, irq, and
+	 * jack/button detection.
+	 */
+	regcache_cache_only(nau8825->regmap, false);
+	regcache_sync(nau8825->regmap);
+	/* Check the jack plug status directly. If the headset is unplugged
+	 * during S3 when the chip has no power, there will be no jack
+	 * detection irq even after the nau8825_restart_jack_detection below,
+	 * because the chip just thinks no headset has ever been plugged in.
+	 */
+	if (!nau8825_is_jack_inserted(nau8825->regmap)) {
+		nau8825_eject_jack(nau8825);
+		snd_soc_jack_report(nau8825->jack, 0, SND_JACK_HEADSET);
+	}
+	enable_irq(nau8825->irq);
+	/* Run jack detection to check the type (OMTP or CTIA) of the headset
+	 * if there is one. This handles the case where a different type of
+	 * headset is plugged in during S3. This triggers an IRQ iff a headset
+	 * is already plugged in.
+	 */
+	nau8825_restart_jack_detection(nau8825->regmap);
+	return 0;
+}
+#else
+#define nau8825_suspend NULL
+#define nau8825_resume NULL
+#endif
 static struct snd_soc_codec_driver nau8825_codec_driver = {
 	.probe = nau8825_codec_probe,
 	.set_sysclk = nau8825_set_sysclk,
 	.set_pll = nau8825_set_pll,
 	.set_bias_level = nau8825_set_bias_level,
 	.suspend_bias_off = true,
+	.suspend = nau8825_suspend,
+	.resume = nau8825_resume,
 	.controls = nau8825_controls,
 	.num_controls = ARRAY_SIZE(nau8825_controls),
 	regmap_update_bits(regmap, NAU8825_REG_ENA_CTRL,
 		NAU8825_ENABLE_DACR, NAU8825_ENABLE_DACR);
-	/* Chip needs one FSCLK cycle in order to generate interrupts,
-	 * as we cannot guarantee one will be provided by the system. Turning
-	 * master mode on then off enables us to generate that FSCLK cycle
-	 * with a minimum of contention on the clock bus.
-	 */
-	regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
-		NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_MASTER);
-	regmap_update_bits(regmap, NAU8825_REG_I2S_PCM_CTRL2,
-		NAU8825_I2S_MS_MASK, NAU8825_I2S_MS_SLAVE);
 	ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL,
 		nau8825_interrupt, IRQF_TRIGGER_LOW | IRQF_ONESHOT,
 		"nau8825", nau8825);
 	return 0;
 }
-#ifdef CONFIG_PM_SLEEP
-static int nau8825_suspend(struct device *dev)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct nau8825 *nau8825 = dev_get_drvdata(dev);
-	disable_irq(client->irq);
-	regcache_cache_only(nau8825->regmap, true);
-	regcache_mark_dirty(nau8825->regmap);
-	return 0;
-}
-static int nau8825_resume(struct device *dev)
-{
-	struct i2c_client *client = to_i2c_client(dev);
-	struct nau8825 *nau8825 = dev_get_drvdata(dev);
-	regcache_cache_only(nau8825->regmap, false);
-	regcache_sync(nau8825->regmap);
-	enable_irq(client->irq);
-	return 0;
-}
-#endif
-static const struct dev_pm_ops nau8825_pm = {
-	SET_SYSTEM_SLEEP_PM_OPS(nau8825_suspend, nau8825_resume)
-};
 static const struct i2c_device_id nau8825_i2c_ids[] = {
 	{ "nau8825", 0 },
 	{ }
 		.name = "nau8825",
 		.of_match_table = of_match_ptr(nau8825_of_ids),
 		.acpi_match_table = ACPI_PTR(nau8825_acpi_match),
-		.pm = &nau8825_pm,
 	},
 	.probe = nau8825_i2c_probe,
 	.remove = nau8825_i2c_remove,

sound/soc/codecs/rt5640.c+1−1

@@ -359,7 +359,7 @@ static const DECLARE_TLV_DB_RANGE(bst_tlv, · 358 unmodified lines
359		359
360	/* Interface data select */	360	/* Interface data select */
361	static const char * const rt5640_data_select[] = {	361	static const char * const rt5640_data_select[] = {
362	"Normal", "left copy to right", "right copy to left", "Swap"};	362	"Normal", "Swap", "left copy to right", "right copy to left"};
363		363
364	static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,	364	static SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365	RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);	365	RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);

sound/soc/codecs/rt5640.h+18−18

@@ -443,39 +443,39 @@ · 442 unmodified lines
443	#define RT5640_IF1_DAC_SEL_MASK (0x3 << 14)	443	#define RT5640_IF1_DAC_SEL_MASK (0x3 << 14)
444	#define RT5640_IF1_DAC_SEL_SFT 14	444	#define RT5640_IF1_DAC_SEL_SFT 14
445	#define RT5640_IF1_DAC_SEL_NOR (0x0 << 14)	445	#define RT5640_IF1_DAC_SEL_NOR (0x0 << 14)
446	#define RT5640_IF1_DAC_SEL_L2R (0x1 << 14)	446	#define RT5640_IF1_DAC_SEL_SWAP (0x1 << 14)
447	#define RT5640_IF1_DAC_SEL_R2L (0x2 << 14)	447	#define RT5640_IF1_DAC_SEL_L2R (0x2 << 14)
448	#define RT5640_IF1_DAC_SEL_SWAP (0x3 << 14)	448	#define RT5640_IF1_DAC_SEL_R2L (0x3 << 14)
449	#define RT5640_IF1_ADC_SEL_MASK (0x3 << 12)	449	#define RT5640_IF1_ADC_SEL_MASK (0x3 << 12)
450	#define RT5640_IF1_ADC_SEL_SFT 12	450	#define RT5640_IF1_ADC_SEL_SFT 12
451	#define RT5640_IF1_ADC_SEL_NOR (0x0 << 12)	451	#define RT5640_IF1_ADC_SEL_NOR (0x0 << 12)
452	#define RT5640_IF1_ADC_SEL_L2R (0x1 << 12)	452	#define RT5640_IF1_ADC_SEL_SWAP (0x1 << 12)
453	#define RT5640_IF1_ADC_SEL_R2L (0x2 << 12)	453	#define RT5640_IF1_ADC_SEL_L2R (0x2 << 12)
454	#define RT5640_IF1_ADC_SEL_SWAP (0x3 << 12)	454	#define RT5640_IF1_ADC_SEL_R2L (0x3 << 12)
455	#define RT5640_IF2_DAC_SEL_MASK (0x3 << 10)	455	#define RT5640_IF2_DAC_SEL_MASK (0x3 << 10)
456	#define RT5640_IF2_DAC_SEL_SFT 10	456	#define RT5640_IF2_DAC_SEL_SFT 10
457	#define RT5640_IF2_DAC_SEL_NOR (0x0 << 10)	457	#define RT5640_IF2_DAC_SEL_NOR (0x0 << 10)
458	#define RT5640_IF2_DAC_SEL_L2R (0x1 << 10)	458	#define RT5640_IF2_DAC_SEL_SWAP (0x1 << 10)
459	#define RT5640_IF2_DAC_SEL_R2L (0x2 << 10)	459	#define RT5640_IF2_DAC_SEL_L2R (0x2 << 10)
460	#define RT5640_IF2_DAC_SEL_SWAP (0x3 << 10)	460	#define RT5640_IF2_DAC_SEL_R2L (0x3 << 10)
461	#define RT5640_IF2_ADC_SEL_MASK (0x3 << 8)	461	#define RT5640_IF2_ADC_SEL_MASK (0x3 << 8)
462	#define RT5640_IF2_ADC_SEL_SFT 8	462	#define RT5640_IF2_ADC_SEL_SFT 8
463	#define RT5640_IF2_ADC_SEL_NOR (0x0 << 8)	463	#define RT5640_IF2_ADC_SEL_NOR (0x0 << 8)
464	#define RT5640_IF2_ADC_SEL_L2R (0x1 << 8)	464	#define RT5640_IF2_ADC_SEL_SWAP (0x1 << 8)
465	#define RT5640_IF2_ADC_SEL_R2L (0x2 << 8)	465	#define RT5640_IF2_ADC_SEL_L2R (0x2 << 8)
466	#define RT5640_IF2_ADC_SEL_SWAP (0x3 << 8)	466	#define RT5640_IF2_ADC_SEL_R2L (0x3 << 8)
467	#define RT5640_IF3_DAC_SEL_MASK (0x3 << 6)	467	#define RT5640_IF3_DAC_SEL_MASK (0x3 << 6)
468	#define RT5640_IF3_DAC_SEL_SFT 6	468	#define RT5640_IF3_DAC_SEL_SFT 6
469	#define RT5640_IF3_DAC_SEL_NOR (0x0 << 6)	469	#define RT5640_IF3_DAC_SEL_NOR (0x0 << 6)
470	#define RT5640_IF3_DAC_SEL_L2R (0x1 << 6)	470	#define RT5640_IF3_DAC_SEL_SWAP (0x1 << 6)
471	#define RT5640_IF3_DAC_SEL_R2L (0x2 << 6)	471	#define RT5640_IF3_DAC_SEL_L2R (0x2 << 6)
472	#define RT5640_IF3_DAC_SEL_SWAP (0x3 << 6)	472	#define RT5640_IF3_DAC_SEL_R2L (0x3 << 6)
473	#define RT5640_IF3_ADC_SEL_MASK (0x3 << 4)	473	#define RT5640_IF3_ADC_SEL_MASK (0x3 << 4)
474	#define RT5640_IF3_ADC_SEL_SFT 4	474	#define RT5640_IF3_ADC_SEL_SFT 4
475	#define RT5640_IF3_ADC_SEL_NOR (0x0 << 4)	475	#define RT5640_IF3_ADC_SEL_NOR (0x0 << 4)
476	#define RT5640_IF3_ADC_SEL_L2R (0x1 << 4)	476	#define RT5640_IF3_ADC_SEL_SWAP (0x1 << 4)
477	#define RT5640_IF3_ADC_SEL_R2L (0x2 << 4)	477	#define RT5640_IF3_ADC_SEL_L2R (0x2 << 4)
478	#define RT5640_IF3_ADC_SEL_SWAP (0x3 << 4)	478	#define RT5640_IF3_ADC_SEL_R2L (0x3 << 4)
479		479
480	/* REC Left Mixer Control 1 (0x3b) */	480	/* REC Left Mixer Control 1 (0x3b) */
481	#define RT5640_G_HP_L_RM_L_MASK (0x7 << 13)	481	#define RT5640_G_HP_L_RM_L_MASK (0x7 << 13)

sound/soc/codecs/wm5102.c+5−0

 static int wm5102_codec_remove(struct snd_soc_codec *codec)
 {
 	struct wm5102_priv *priv = snd_soc_codec_get_drvdata(codec);
+	struct arizona *arizona = priv->core.arizona;
 	wm_adsp2_codec_remove(&priv->core.adsp[0], codec);
 	priv->core.arizona->dapm = NULL;
+	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);
+	arizona_free_spk(codec);
 	return 0;
 }

sound/soc/codecs/wm5110.c+2−0

@@ -2298,6 +2298,8 @@ static int wm5110_codec_remove(struct snd_soc_codec *codec) · 2297 unmodified lines
2298		2298
2299	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);	2299	arizona_free_irq(arizona, ARIZONA_IRQ_DSP_IRQ1, priv);
2300		2300
		2301	arizona_free_spk(codec);
		2302
2301	return 0;	2303	return 0;
2302	}	2304	}
2303		2305

sound/soc/codecs/wm8962.c+1−1

@@ -2471,7 +2471,7 @@ static void wm8962_configure_bclk(struct snd_soc_codec *codec) · 2470 unmodified lines
2471	break;	2471	break;
2472	default:	2472	default:
2473	dev_warn(codec->dev, "Unknown DSPCLK divisor read back\n");	2473	dev_warn(codec->dev, "Unknown DSPCLK divisor read back\n");
2474	dspclk = wm8962->sysclk;	2474	dspclk = wm8962->sysclk_rate;
2475	}	2475	}
2476		2476
2477	dev_dbg(codec->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk);	2477	dev_dbg(codec->dev, "DSPCLK is %dHz, BCLK %d\n", dspclk, wm8962->bclk);

sound/soc/codecs/wm8997.c+2−0

@@ -1072,6 +1072,8 @@ static int wm8997_codec_remove(struct snd_soc_codec *codec) · 1071 unmodified lines
1072		1072
1073	priv->core.arizona->dapm = NULL;	1073	priv->core.arizona->dapm = NULL;
1074		1074
		1075	arizona_free_spk(codec);
		1076
1075	return 0;	1077	return 0;
1076	}	1078	}
1077		1079

sound/soc/codecs/wm8998.c+2−0

@@ -1324,6 +1324,8 @@ static int wm8998_codec_remove(struct snd_soc_codec *codec) · 1323 unmodified lines
1324		1324
1325	priv->core.arizona->dapm = NULL;	1325	priv->core.arizona->dapm = NULL;
1326		1326
		1327	arizona_free_spk(codec);
		1328
1327	return 0;	1329	return 0;
1328	}	1330	}
1329		1331

sound/soc/intel/Kconfig+0−1

@@ -163,7 +163,6 @@ config SND_SOC_INTEL_SKYLAKE · 162 unmodified lines
163	tristate	163	tristate
164	select SND_HDA_EXT_CORE	164	select SND_HDA_EXT_CORE
165	select SND_SOC_TOPOLOGY	165	select SND_SOC_TOPOLOGY
166	select SND_HDA_I915
167	select SND_SOC_INTEL_SST	166	select SND_SOC_INTEL_SST
168		167
169	config SND_SOC_INTEL_SKL_RT286_MACH	168	config SND_SOC_INTEL_SKL_RT286_MACH

sound/soc/intel/haswell/sst-haswell-ipc.c+1−1

@@ -1345,7 +1345,7 @@ int sst_hsw_stream_reset(struct sst_hsw hsw, struct sst_hsw_stream stream) · 1344 unmodified lines
1345	return 0;	1345	return 0;
1346		1346
1347	/* wait for pause to complete before we reset the stream */	1347	/* wait for pause to complete before we reset the stream */
1348	while (stream->running && tries--)	1348	while (stream->running && --tries)
1349	msleep(1);	1349	msleep(1);
1350	if (!tries) {	1350	if (!tries) {
1351	dev_err(hsw->dev, "error: reset stream %d still running\n",	1351	dev_err(hsw->dev, "error: reset stream %d still running\n",

sound/soc/intel/skylake/skl-sst-dsp.c+5−0

 	skl_ipc_int_disable(dsp);
 	free_irq(dsp->irq, dsp);
+	dsp->cl_dev.ops.cl_cleanup_controller(dsp);
+	skl_cldma_int_disable(dsp);
+	skl_ipc_op_int_disable(dsp);
+	skl_ipc_int_disable(dsp);
 	skl_dsp_disable_core(dsp);
 }
 EXPORT_SYMBOL_GPL(skl_dsp_free);

sound/soc/intel/skylake/skl-topology.c+28−14

@@ -239,6 +239,7 @@ static void skl_tplg_update_buffer_size(struct skl_sst *ctx, · 238 unmodified lines
239	{	239	{
240	int multiplier = 1;	240	int multiplier = 1;
241	struct skl_module_fmt in_fmt, out_fmt;	241	struct skl_module_fmt in_fmt, out_fmt;
		242	int in_rate, out_rate;
242		243
243		244
244	/* Since fixups is applied to pin 0 only, ibs, obs needs	245	/* Since fixups is applied to pin 0 only, ibs, obs needs
@@ -249,15 +250,24 @@ static void skl_tplg_update_buffer_size(struct skl_sst *ctx, · 4 unmodified lines
249		250
250	if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)	251	if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
251	multiplier = 5;	252	multiplier = 5;
252	mcfg->ibs = (in_fmt->s_freq / 1000) *	253
253	(mcfg->in_fmt->channels) *	254	if (in_fmt->s_freq % 1000)
254	(mcfg->in_fmt->bit_depth >> 3) *	255	in_rate = (in_fmt->s_freq / 1000) + 1;
255	multiplier;	256	else
256		257	in_rate = (in_fmt->s_freq / 1000);
257	mcfg->obs = (mcfg->out_fmt->s_freq / 1000) *	258
258	(mcfg->out_fmt->channels) *	259	mcfg->ibs = in_rate * (mcfg->in_fmt->channels) *
259	(mcfg->out_fmt->bit_depth >> 3) *	260	(mcfg->in_fmt->bit_depth >> 3) *
260	multiplier;	261	multiplier;
		262
		263	if (mcfg->out_fmt->s_freq % 1000)
		264	out_rate = (mcfg->out_fmt->s_freq / 1000) + 1;
		265	else
		266	out_rate = (mcfg->out_fmt->s_freq / 1000);
		267
		268	mcfg->obs = out_rate * (mcfg->out_fmt->channels) *
		269	(mcfg->out_fmt->bit_depth >> 3) *
		270	multiplier;
261	}	271	}
262		272
263	static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,	273	static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
@@ -485,11 +495,15 @@ skl_tplg_init_pipe_modules(struct skl skl, struct skl_pipe pipe) · 221 unmodified lines
485	if (!skl_is_pipe_mcps_avail(skl, mconfig))	495	if (!skl_is_pipe_mcps_avail(skl, mconfig))
486	return -ENOMEM;	496	return -ENOMEM;
487		497
		498	skl_tplg_alloc_pipe_mcps(skl, mconfig);
		499
488	if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {	500	if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
489	ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,	501	ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
490	mconfig->id.module_id, mconfig->guid);	502	mconfig->id.module_id, mconfig->guid);
491	if (ret < 0)	503	if (ret < 0)
492	return ret;	504	return ret;
		505
		506	mconfig->m_state = SKL_MODULE_LOADED;
493	}	507	}
494		508
495	/* update blob if blob is null for be with default value */	509	/* update blob if blob is null for be with default value */
@@ -509,7 +523,6 @@ skl_tplg_init_pipe_modules(struct skl skl, struct skl_pipe pipe) · 13 unmodified lines
509	ret = skl_tplg_set_module_params(w, ctx);	523	ret = skl_tplg_set_module_params(w, ctx);
510	if (ret < 0)	524	if (ret < 0)
511	return ret;	525	return ret;
512	skl_tplg_alloc_pipe_mcps(skl, mconfig);
513	}	526	}
514		527
515	return 0;	528	return 0;
@@ -524,7 +537,8 @@ static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx, · 8 unmodified lines
524	list_for_each_entry(w_module, &pipe->w_list, node) {	537	list_for_each_entry(w_module, &pipe->w_list, node) {
525	mconfig = w_module->w->priv;	538	mconfig = w_module->w->priv;
526		539
527	if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod)	540	if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod &&
		541	mconfig->m_state > SKL_MODULE_UNINIT)
528	return ctx->dsp->fw_ops.unload_mod(ctx->dsp,	542	return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
529	mconfig->id.module_id);	543	mconfig->id.module_id);
530	}	544	}
@@ -558,6 +572,9 @@ static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, · 27 unmodified lines
558	if (!skl_is_pipe_mem_avail(skl, mconfig))	572	if (!skl_is_pipe_mem_avail(skl, mconfig))
559	return -ENOMEM;	573	return -ENOMEM;
560		574
		575	skl_tplg_alloc_pipe_mem(skl, mconfig);
		576	skl_tplg_alloc_pipe_mcps(skl, mconfig);
		577
561	/*	578	/*
562	* Create a list of modules for pipe.	579	* Create a list of modules for pipe.
563	* This list contains modules from source to sink	580	* This list contains modules from source to sink
@@ -601,9 +618,6 @@ static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, · 37 unmodified lines
601	src_module = dst_module;	618	src_module = dst_module;
602	}	619	}
603		620
604	skl_tplg_alloc_pipe_mem(skl, mconfig);
605	skl_tplg_alloc_pipe_mcps(skl, mconfig);
606
607	return 0;	621	return 0;
608	}	622	}
609		623

sound/soc/intel/skylake/skl-topology.h+4−4

@@ -274,10 +274,10 @@ struct skl_pipe { · 273 unmodified lines
274		274
275	enum skl_module_state {	275	enum skl_module_state {
276	SKL_MODULE_UNINIT = 0,	276	SKL_MODULE_UNINIT = 0,
277	SKL_MODULE_INIT_DONE = 1,	277	SKL_MODULE_LOADED = 1,
278	SKL_MODULE_LOADED = 2,	278	SKL_MODULE_INIT_DONE = 2,
279	SKL_MODULE_UNLOADED = 3,	279	SKL_MODULE_BIND_DONE = 3,
280	SKL_MODULE_BIND_DONE = 4	280	SKL_MODULE_UNLOADED = 4,
281	};	281	};
282		282
283	struct skl_module_cfg {	283	struct skl_module_cfg {

sound/soc/intel/skylake/skl.c+23−9

@@ -222,6 +222,7 @@ static int skl_suspend(struct device *dev) · 221 unmodified lines
222	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);	222	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
223	struct skl *skl = ebus_to_skl(ebus);	223	struct skl *skl = ebus_to_skl(ebus);
224	struct hdac_bus *bus = ebus_to_hbus(ebus);	224	struct hdac_bus *bus = ebus_to_hbus(ebus);
		225	int ret = 0;
225		226
226	/*	227	/*
227	* Do not suspend if streams which are marked ignore suspend are	228	* Do not suspend if streams which are marked ignore suspend are
@@ -232,10 +233,20 @@ static int skl_suspend(struct device *dev) · 4 unmodified lines
232	enable_irq_wake(bus->irq);	233	enable_irq_wake(bus->irq);
233	pci_save_state(pci);	234	pci_save_state(pci);
234	pci_disable_device(pci);	235	pci_disable_device(pci);
235	return 0;
236	} else {	236	} else {
237	return _skl_suspend(ebus);	237	ret = _skl_suspend(ebus);
		238	if (ret < 0)
		239	return ret;
		240	}
		241
		242	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
		243	ret = snd_hdac_display_power(bus, false);
		244	if (ret < 0)
		245	dev_err(bus->dev,
		246	"Cannot turn OFF display power on i915\n");
238	}	247	}
		248
		249	return ret;
239	}	250	}
240		251
241	static int skl_resume(struct device *dev)	252	static int skl_resume(struct device *dev)
@@ -316,17 +327,20 @@ static int skl_free(struct hdac_ext_bus *ebus) · 74 unmodified lines
316		327
317	if (bus->irq >= 0)	328	if (bus->irq >= 0)
318	free_irq(bus->irq, (void *)bus);	329	free_irq(bus->irq, (void *)bus);
319	if (bus->remap_addr)
320	iounmap(bus->remap_addr);
321
322	snd_hdac_bus_free_stream_pages(bus);	330	snd_hdac_bus_free_stream_pages(bus);
323	snd_hdac_stream_free_all(ebus);	331	snd_hdac_stream_free_all(ebus);
324	snd_hdac_link_free_all(ebus);	332	snd_hdac_link_free_all(ebus);
		333
		334	if (bus->remap_addr)
		335	iounmap(bus->remap_addr);
		336
325	pci_release_regions(skl->pci);	337	pci_release_regions(skl->pci);
326	pci_disable_device(skl->pci);	338	pci_disable_device(skl->pci);
327		339
328	snd_hdac_ext_bus_exit(ebus);	340	snd_hdac_ext_bus_exit(ebus);
329		341
		342	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
		343	snd_hdac_i915_exit(&ebus->bus);
330	return 0;	344	return 0;
331	}	345	}
332		346
@@ -719,12 +733,12 @@ static void skl_remove(struct pci_dev *pci) · 386 unmodified lines
719	if (skl->tplg)	733	if (skl->tplg)
720	release_firmware(skl->tplg);	734	release_firmware(skl->tplg);
721		735
722	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
723	snd_hdac_i915_exit(&ebus->bus);
724
725	if (pci_dev_run_wake(pci))	736	if (pci_dev_run_wake(pci))
726	pm_runtime_get_noresume(&pci->dev);	737	pm_runtime_get_noresume(&pci->dev);
727	pci_dev_put(pci);	738
		739	/* codec removal, invoke bus_device_remove */
		740	snd_hdac_ext_bus_device_remove(ebus);
		741
728	skl_platform_unregister(&pci->dev);	742	skl_platform_unregister(&pci->dev);
729	skl_free_dsp(skl);	743	skl_free_dsp(skl);
730	skl_machine_device_unregister(skl);	744	skl_machine_device_unregister(skl);

sound/soc/soc-dapm.c+7−0

@@ -2188,6 +2188,13 @@ static ssize_t dapm_widget_show_component(struct snd_soc_component *cmpnt, · 2187 unmodified lines
2188	int count = 0;	2188	int count = 0;
2189	char *state = "not set";	2189	char *state = "not set";
2190		2190
		2191	/* card won't be set for the dummy component, as a spot fix
		2192	* we're checking for that case specifically here but in future
		2193	* we will ensure that the dummy component looks like others.
		2194	*/
		2195	if (!cmpnt->card)
		2196	return 0;
		2197
2191	list_for_each_entry(w, &cmpnt->card->widgets, list) {	2198	list_for_each_entry(w, &cmpnt->card->widgets, list) {
2192	if (w->dapm != dapm)	2199	if (w->dapm != dapm)
2193	continue;	2200	continue;

@@ -6,7 +6,7 @@ This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers · 5 unmodified lines
6	using the SGDMA and MSGDMA soft DMA IP components. The driver uses the	6	using the SGDMA and MSGDMA soft DMA IP components. The driver uses the
7	platform bus to obtain component resources. The designs used to test this	7	platform bus to obtain component resources. The designs used to test this
8	driver were built for a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board,	8	driver were built for a Cyclone(R) V SOC FPGA board, a Cyclone(R) V FPGA board,
9	and tested with ARM and NIOS processor hosts seperately. The anticipated use	9	and tested with ARM and NIOS processor hosts separately. The anticipated use
10	cases are simple communications between an embedded system and an external peer	10	cases are simple communications between an embedded system and an external peer
11	for status and simple configuration of the embedded system.	11	for status and simple configuration of the embedded system.
12		12
@@ -65,14 +65,14 @@ Driver parameters can be also passed in command line by using: · 52 unmodified lines
65	4.1) Transmit process	65	4.1) Transmit process
66	When the driver's transmit routine is called by the kernel, it sets up a	66	When the driver's transmit routine is called by the kernel, it sets up a
67	transmit descriptor by calling the underlying DMA transmit routine (SGDMA or	67	transmit descriptor by calling the underlying DMA transmit routine (SGDMA or
68	MSGDMA), and initites a transmit operation. Once the transmit is complete, an	68	MSGDMA), and initiates a transmit operation. Once the transmit is complete, an
69	interrupt is driven by the transmit DMA logic. The driver handles the transmit	69	interrupt is driven by the transmit DMA logic. The driver handles the transmit
70	completion in the context of the interrupt handling chain by recycling	70	completion in the context of the interrupt handling chain by recycling
71	resource required to send and track the requested transmit operation.	71	resource required to send and track the requested transmit operation.
72		72
73	4.2) Receive process	73	4.2) Receive process
74	The driver will post receive buffers to the receive DMA logic during driver	74	The driver will post receive buffers to the receive DMA logic during driver
75	intialization. Receive buffers may or may not be queued depending upon the	75	initialization. Receive buffers may or may not be queued depending upon the
76	underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able	76	underlying DMA logic (MSGDMA is able queue receive buffers, SGDMA is not able
77	to queue receive buffers to the SGDMA receive logic). When a packet is	77	to queue receive buffers to the SGDMA receive logic). When a packet is
78	received, the DMA logic generates an interrupt. The driver handles a receive	78	received, the DMA logic generates an interrupt. The driver handles a receive

@@ -8,7 +8,7 @@ Initial Release: · 7 unmodified lines
8	This is conceptually very similar to the macvlan driver with one major	8	This is conceptually very similar to the macvlan driver with one major
9	exception of using L3 for mux-ing /demux-ing among slaves. This property makes	9	exception of using L3 for mux-ing /demux-ing among slaves. This property makes
10	the master device share the L2 with it's slave devices. I have developed this	10	the master device share the L2 with it's slave devices. I have developed this
11	driver in conjuntion with network namespaces and not sure if there is use case	11	driver in conjunction with network namespaces and not sure if there is use case
12	outside of it.	12	outside of it.
13		13
14		14
@@ -42,7 +42,7 @@ out. In this mode the slaves will RX/TX multicast and broadcast (if applicable) · 27 unmodified lines
42	as well.	42	as well.
43		43
44	4.2 L3 mode:	44	4.2 L3 mode:
45	In this mode TX processing upto L3 happens on the stack instance attached	45	In this mode TX processing up to L3 happens on the stack instance attached
46	to the slave device and packets are switched to the stack instance of the	46	to the slave device and packets are switched to the stack instance of the
47	master device for the L2 processing and routing from that instance will be	47	master device for the L2 processing and routing from that instance will be
48	used before packets are queued on the outbound device. In this mode the slaves	48	used before packets are queued on the outbound device. In this mode the slaves
@@ -56,7 +56,7 @@ situations defines your use case then you can choose to use ipvlan - · 7 unmodified lines
56	(a) The Linux host that is connected to the external switch / router has	56	(a) The Linux host that is connected to the external switch / router has
57	policy configured that allows only one mac per port.	57	policy configured that allows only one mac per port.
58	(b) No of virtual devices created on a master exceed the mac capacity and	58	(b) No of virtual devices created on a master exceed the mac capacity and
59	puts the NIC in promiscous mode and degraded performance is a concern.	59	puts the NIC in promiscuous mode and degraded performance is a concern.
60	(c) If the slave device is to be put into the hostile / untrusted network	60	(c) If the slave device is to be put into the hostile / untrusted network
61	namespace where L2 on the slave could be changed / misused.	61	namespace where L2 on the slave could be changed / misused.
62		62

@@ -67,12 +67,12 @@ The two basic thread commands are: · 66 unmodified lines
67	* add_device DEVICE@NAME -- adds a single device	67	* add_device DEVICE@NAME -- adds a single device
68	* rem_device_all -- remove all associated devices	68	* rem_device_all -- remove all associated devices
69		69
70	When adding a device to a thread, a corrosponding procfile is created	70	When adding a device to a thread, a corresponding procfile is created
71	which is used for configuring this device. Thus, device names need to	71	which is used for configuring this device. Thus, device names need to
72	be unique.	72	be unique.
73		73
74	To support adding the same device to multiple threads, which is useful	74	To support adding the same device to multiple threads, which is useful
75	with multi queue NICs, a the device naming scheme is extended with "@":	75	with multi queue NICs, the device naming scheme is extended with "@":
76	device@something	76	device@something
77		77
78	The part after "@" can be anything, but it is custom to use the thread	78	The part after "@" can be anything, but it is custom to use the thread
@@ -221,7 +221,7 @@ Sample scripts · 142 unmodified lines
221		221
222	A collection of tutorial scripts and helpers for pktgen is in the	222	A collection of tutorial scripts and helpers for pktgen is in the
223	samples/pktgen directory. The helper parameters.sh file support easy	223	samples/pktgen directory. The helper parameters.sh file support easy
224	and consistant parameter parsing across the sample scripts.	224	and consistent parameter parsing across the sample scripts.
225		225
226	Usage example and help:	226	Usage example and help:
227	./pktgen_sample01_simple.sh -i eth4 -m 00:1B:21:3C:9D:F8 -d 192.168.8.2	227	./pktgen_sample01_simple.sh -i eth4 -m 00:1B:21:3C:9D:F8 -d 192.168.8.2

@@ -4,7 +4,7 @@ Krisztian <hidden@balabit.hu> and others and additional patches · 3 unmodified lines
4	from Jamal <hadi@cyberus.ca>.	4	from Jamal <hadi@cyberus.ca>.
5		5
6	The end goal for syncing is to be able to insert attributes + generate	6	The end goal for syncing is to be able to insert attributes + generate
7	events so that the an SA can be safely moved from one machine to another	7	events so that the SA can be safely moved from one machine to another
8	for HA purposes.	8	for HA purposes.
9	The idea is to synchronize the SA so that the takeover machine can do	9	The idea is to synchronize the SA so that the takeover machine can do
10	the processing of the SA as accurate as possible if it has access to it.	10	the processing of the SA as accurate as possible if it has access to it.
@@ -13,7 +13,7 @@ We already have the ability to generate SA add/del/upd events. · 2 unmodified lines
13	These patches add ability to sync and have accurate lifetime byte (to	13	These patches add ability to sync and have accurate lifetime byte (to
14	ensure proper decay of SAs) and replay counters to avoid replay attacks	14	ensure proper decay of SAs) and replay counters to avoid replay attacks
15	with as minimal loss at failover time.	15	with as minimal loss at failover time.
16	This way a backup stays as closely uptodate as an active member.	16	This way a backup stays as closely up-to-date as an active member.
17		17
18	Because the above items change for every packet the SA receives,	18	Because the above items change for every packet the SA receives,
19	it is possible for a lot of the events to be generated.	19	it is possible for a lot of the events to be generated.
@@ -163,7 +163,7 @@ If you have an SA that is getting hit by traffic in bursts such that · 143 unmodified lines
163	there is a period where the timer threshold expires with no packets	163	there is a period where the timer threshold expires with no packets
164	seen, then an odd behavior is seen as follows:	164	seen, then an odd behavior is seen as follows:
165	The first packet arrival after a timer expiry will trigger a timeout	165	The first packet arrival after a timer expiry will trigger a timeout
166	aevent; i.e we dont wait for a timeout period or a packet threshold	166	event; i.e we don't wait for a timeout period or a packet threshold
167	to be reached. This is done for simplicity and efficiency reasons.	167	to be reached. This is done for simplicity and efficiency reasons.
168		168
169	-JHS	169	-JHS