The comment says the layout and options use 8 bits, and the shift uses 8 bits. However the mask is 0xf, ie. 0b00001111 (4 bits). This could be surprising when introducing new layouts or options that take more than 4 bits, as this would silently drop the high bits. Make the masks consistent with the comment and the shift. Found when writing a drm_info patch [1]. [1]: https://github.com/ascent12/drm_info/pull/67
Unified · Split
| @@ -1036,9 +1036,9 @@ drm_fourcc_canonicalize_nvidia_format_mod(__u64 modifier) · 1035 unmodified lines | ||
| 1036 | 1036 | * Not all combinations are valid, and different SoCs may support different |
| 1037 | 1037 | * combinations of layout and options. |
| 1038 | 1038 | */ |
| 1039 | −#define __fourcc_mod_amlogic_layout_mask 0xf | |
| 1039 | +#define __fourcc_mod_amlogic_layout_mask 0xff | |
| 1040 | 1040 | #define __fourcc_mod_amlogic_options_shift 8 |
| 1041 | −#define __fourcc_mod_amlogic_options_mask 0xf | |
| 1041 | +#define __fourcc_mod_amlogic_options_mask 0xff | |
| 1042 | 1042 | |
| 1043 | 1043 | #define DRM_FORMAT_MOD_AMLOGIC_FBC(__layout, __options) \ |
| 1044 | 1044 | fourcc_mod_code(AMLOGIC, \ |