Make sure there is at least 1 ms delay from reset to first command as is specified in the datasheet. This is a fix similar to commit 307f31452078 ("ASoC: tas2770: Insert post reset delay").
Unified · Split
| @@ -42,10 +42,12 @@ static void tas2764_reset(struct tas2764_priv *tas2764) · 41 unmodified lines | ||
| 42 | 42 | gpiod_set_value_cansleep(tas2764->reset_gpio, 0); |
| 43 | 43 | msleep(20); |
| 44 | 44 | gpiod_set_value_cansleep(tas2764->reset_gpio, 1); |
| 45 | + usleep_range(1000, 2000); | |
| 45 | 46 | } |
| 46 | 47 | |
| 47 | 48 | snd_soc_component_write(tas2764->component, TAS2764_SW_RST, |
| 48 | 49 | TAS2764_RST); |
| 50 | + usleep_range(1000, 2000); | |
| 49 | 51 | } |
| 50 | 52 | |
| 51 | 53 | static int tas2764_set_bias_level(struct snd_soc_component *component, |
| @@ -107,8 +109,10 @@ static int tas2764_codec_resume(struct snd_soc_component *component) · 55 unmodified lines | ||
| 107 | 109 | struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component); |
| 108 | 110 | int ret; |
| 109 | 111 | |
| 110 | − if (tas2764->sdz_gpio) | |
| 112 | + if (tas2764->sdz_gpio) { | |
| 111 | 113 | gpiod_set_value_cansleep(tas2764->sdz_gpio, 1); |
| 114 | + usleep_range(1000, 2000); | |
| 115 | + } | |
| 112 | 116 | |
| 113 | 117 | ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL, |
| 114 | 118 | TAS2764_PWR_CTRL_MASK, |
| @@ -501,8 +505,10 @@ static int tas2764_codec_probe(struct snd_soc_component *component) · 386 unmodified lines | ||
| 501 | 505 | |
| 502 | 506 | tas2764->component = component; |
| 503 | 507 | |
| 504 | − if (tas2764->sdz_gpio) | |
| 508 | + if (tas2764->sdz_gpio) { | |
| 505 | 509 | gpiod_set_value_cansleep(tas2764->sdz_gpio, 1); |
| 510 | + usleep_range(1000, 2000); | |
| 511 | + } | |
| 506 | 512 | |
| 507 | 513 | tas2764_reset(tas2764); |
| 508 | 514 | |