Daniel writes: "Probably the last feature pull for 3.9, there's some fixes outstanding thought that I'd like to sneak in. And maybe 3.8 takes a bit longer ... Anyway, highlights of this pull: - Kill the horrible IS_DISPLAYREG hack to handle the mmio offset movements on vlv, big thanks to Ville. - Dynamic power well support for Haswell, shaves away a bit when only using the eDP port on pipe A (Paulo). Plus unclaimed register fixes uncovered by this. - Clarifications of the gpu hang/reset state transitions, hopefully fixing a few spurious -EIO deaths in userspace. - Haswell ELD fixes. - Some more (pp)gtt cleanups from Ben. - A few smaller things all over. Plus all the stuff from the previous rather small pull request: - Broadcast RBG improvements and reduced color range fixes from Ville. - Ben is on a "kill legacy gtt code for good" spree, first pile of patches included. - No-relocs and bo lut improvements for faster execbuf from Chris. - Some refactorings from Imre." * tag 'drm-intel-next-2013-02-01' of git://people.freedesktop.org/~danvet/drm-intel: (101 commits) GPU/i915: Fix acpi_bus_get_device() check in drivers/gpu/drm/i915/intel_opregion.c drm/i915: Set the SR01 "screen off" bit in i915_redisable_vga() too drm/i915: Kill IS_DISPLAYREG() drm/i915: Introduce i915_vgacntrl_reg() drm/i915: gen6_gmch_remove can be static drm/i915: dynamic Haswell display power well support drm/i915: check the power down well on assert_pipe() drm/i915: don't send DP "idle" pattern before "normal" on HSW PORT_A drm/i915: don't run hsw power well code on !hsw drm/i915: kill cargo-culted locking from power well code drm/i915: Only run idle processing from i915_gem_retire_requests_worker drm/i915: Fix CAGF for HSW drm/i915: Reclaim GTT space for failed PPGTT drm/i915: remove intel_gtt structure drm/i915: Add probe and remove to the gtt ops drm/i915: extract hw ppgtt setup/cleanup code drm/i915: pte_encode is gen6+ drm/i915: vfuncs for ppgtt drm/i915: vfuncs for gtt_clear_range/insert_entries drm/i915: Error state should print /sys/kernel/debug ...
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| @@ -1063,6 +1063,7 @@ extern u8 *drm_find_cea_extension(struct edid *edid); · 1062 unmodified lines | ||
| 1063 | 1063 | extern u8 drm_match_cea_mode(struct drm_display_mode *to_match); |
| 1064 | 1064 | extern bool drm_detect_hdmi_monitor(struct edid *edid); |
| 1065 | 1065 | extern bool drm_detect_monitor_audio(struct edid *edid); |
| 1066 | +extern bool drm_rgb_quant_range_selectable(struct edid *edid); | |
| 1066 | 1067 | extern int drm_mode_page_flip_ioctl(struct drm_device *dev, |
| 1067 | 1068 | void *data, struct drm_file *file_priv); |
| 1068 | 1069 | extern struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, |
| @@ -3,24 +3,7 @@ · 2 unmodified lines | ||
| 3 | 3 | #ifndef _DRM_INTEL_GTT_H |
| 4 | 4 | #define _DRM_INTEL_GTT_H |
| 5 | 5 | |
| 6 | −struct intel_gtt { | |
| 7 | − /* Size of memory reserved for graphics by the BIOS */ | |
| 8 | − unsigned int stolen_size; | |
| 9 | − /* Total number of gtt entries. */ | |
| 10 | − unsigned int gtt_total_entries; | |
| 11 | − /* Part of the gtt that is mappable by the cpu, for those chips where | |
| 12 | − * this is not the full gtt. */ | |
| 13 | − unsigned int gtt_mappable_entries; | |
| 14 | − /* Whether i915 needs to use the dmar apis or not. */ | |
| 15 | − unsigned int needs_dmar : 1; | |
| 16 | − /* Whether we idle the gpu before mapping/unmapping */ | |
| 17 | − unsigned int do_idle_maps : 1; | |
| 18 | − /* Share the scratch page dma with ppgtts. */ | |
| 19 | − dma_addr_t scratch_page_dma; | |
| 20 | − struct page *scratch_page; | |
| 21 | − /* needed for ioremap in drm/i915 */ | |
| 22 | − phys_addr_t gma_bus_addr; | |
| 23 | −} *intel_gtt_get(void); | |
| 6 | +void intel_gtt_get(size_t *gtt_total, size_t *stolen_size); | |
| 24 | 7 | |
| 25 | 8 | int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev, |
| 26 | 9 | struct agp_bridge_data *bridge); |