Merge tag 'v5.9-rc4' into drm-next

Backmerge 5.9-rc4 as there is a nasty qxl conflict that needs to be resolved.

Dave Airlie committed 6 years ago

Commit ce5c2072 parents 3393649 f4d51df1709 files · +9099 −6031Browse files

Unified · Split

1709 files

.clang-format +12 −0
Documentation/RCU/lockdep.rst +1 −1
Documentation/admin-guide/devices.txt +1 −1
Documentation/admin-guide/laptops/thinkpad-acpi.rst +1 −1
Documentation/admin-guide/pm/intel_pstate.rst +5 −3
Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt +0 −66
Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml +98 −0
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt +0 −82
Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml +102 −0
Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml +7 −3
Documentation/devicetree/bindings/mmc/mtk-sd.txt +2 −0
Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +29 −3
Documentation/devicetree/bindings/net/dsa/dsa.txt +1 −1
Documentation/driver-api/fpga/fpga-bridge.rst +3 −3
Documentation/driver-api/fpga/fpga-mgr.rst +3 −3
Documentation/driver-api/fpga/fpga-programming.rst +8 −8
Documentation/driver-api/fpga/fpga-region.rst +9 −9
Documentation/driver-api/iio/core.rst +8 −8
Documentation/fault-injection/nvme-fault-injection.rst +1 −1
Documentation/filesystems/affs.rst +10 −6
Documentation/hwmon/abituguru-datasheet.rst +3 −3
Documentation/hwmon/abituguru.rst +2 −2
Documentation/hwmon/abituguru3.rst +2 −2
Documentation/kbuild/llvm.rst +13 −13
Documentation/kbuild/makefiles.rst +9 −9
Documentation/locking/locktypes.rst +12 −12
Documentation/maintainer/maintainer-entry-profile.rst +1 −0
Documentation/networking/dsa/configuration.rst +1 −1
Documentation/powerpc/syscall64-abi.rst +3 −1
Documentation/process/deprecated.rst +1 −1
Documentation/sound/cards/audigy-mixer.rst +1 −1
Documentation/sound/cards/sb-live-mixer.rst +1 −1
Documentation/sound/designs/timestamping.rst +1 −1
Documentation/translations/it_IT/process/deprecated.rst +1 −1
MAINTAINERS +53 −21
Makefile +1 −1
arch/alpha/kernel/module.c +1 −1
arch/alpha/kernel/signal.c +1 −1
arch/alpha/kernel/traps.c +2 −2
arch/arc/boot/dts/hsdk.dts +4 −2
arch/arc/include/asm/pgalloc.h +2 −2
arch/arc/kernel/disasm.c +1 −1
arch/arc/kernel/perf_event.c +4 −10
arch/arc/kernel/signal.c +1 −1
arch/arc/kernel/troubleshoot.c +30 −47
arch/arc/kernel/unwind.c +3 −3
arch/arc/mm/init.c +16 −11
arch/arc/plat-eznps/include/plat/ctop.h +0 −1
arch/arm/kernel/hw_breakpoint.c +5 −5
arch/arm/kernel/signal.c +1 −1
arch/arm/mach-ep93xx/crunch.c +1 −1
arch/arm/mach-mmp/pm-mmp2.c +4 −4
arch/arm/mach-mmp/pm-pxa910.c +5 −5
arch/arm/mach-omap2/id.c +0 −8
arch/arm/mach-omap2/omap_device.c +1 −1
arch/arm/mach-omap2/pm34xx.c +0 −4
arch/arm/mach-orion5x/dns323-setup.c +1 −1
arch/arm/mach-rpc/riscpc.c +1 −1
arch/arm/mach-tegra/reset.c +1 −1
arch/arm/mm/alignment.c +2 −2
arch/arm/mm/proc-v7-bugs.c +1 −1
arch/arm/plat-omap/dma.c +3 −3
arch/arm/probes/decode.c +1 −1
arch/arm/probes/kprobes/core.c +1 −1
arch/arm64/Makefile +10 −4
arch/arm64/boot/dts/mediatek/mt7622.dtsi +2 −0
arch/arm64/boot/dts/nvidia/tegra186.dtsi +12 −8
arch/arm64/boot/dts/nvidia/tegra194.dtsi +9 −6
arch/arm64/boot/dts/nvidia/tegra210.dtsi +12 −8
arch/arm64/boot/dts/ti/k3-am65-main.dtsi +17 −19
arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +6 −6
arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi +4 −4
arch/arm64/boot/dts/ti/k3-am654-base-board.dts +2 −2
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts +5 −5
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +22 −21
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +5 −7
arch/arm64/include/asm/compiler.h +6 −0
arch/arm64/include/asm/irqflags.h +5 −0
arch/arm64/include/asm/kvm_arm.h +2 −1
arch/arm64/include/asm/kvm_asm.h +43 −0
arch/arm64/include/asm/tlbflush.h +4 −2
arch/arm64/kernel/acpi.c +1 −1
arch/arm64/kernel/cpufeature.c +1 −1
arch/arm64/kernel/cpuinfo.c +0 −1
arch/arm64/kernel/hw_breakpoint.c +3 −3
arch/arm64/kernel/image-vars.h +4 −0
arch/arm64/kernel/module-plts.c +1 −2
arch/arm64/kernel/module.c +4 −4
arch/arm64/kernel/process.c +0 −2
arch/arm64/kernel/setup.c +0 −1
arch/arm64/kernel/smp.c +1 −1
arch/arm64/kernel/vmlinux.lds.S +8 −0
arch/arm64/kvm/handle_exit.c +1 −1
arch/arm64/kvm/hyp/entry.S +9 −6
arch/arm64/kvm/hyp/hyp-entry.S +41 −24
arch/arm64/kvm/hyp/include/hyp/debug-sr.h +30 −30
arch/arm64/kvm/hyp/include/hyp/switch.h +35 −4
arch/arm64/kvm/hyp/nvhe/switch.c +5 −0
arch/arm64/kvm/hyp/vgic-v3-sr.c +8 −8
arch/arm64/kvm/hyp/vhe/switch.c +5 −0
arch/arm64/mm/context.c +1 −1
arch/c6x/kernel/signal.c +2 −2
arch/csky/kernel/signal.c +1 −1
arch/h8300/kernel/signal.c +1 −1
arch/hexagon/kernel/module.c +1 −1
arch/hexagon/kernel/signal.c +1 −1
arch/ia64/kernel/crash.c +1 −1
arch/ia64/kernel/ia64_ksyms.c +1 −1
arch/ia64/kernel/module.c +1 −1
arch/ia64/kernel/perfmon.c +1 −1
arch/ia64/kernel/signal.c +1 −1
arch/ia64/kernel/unaligned.c +3 −3
arch/ia64/kernel/unwind.c +1 −1
arch/m68k/atari/atakeyb.c +1 −1
arch/m68k/kernel/signal.c +1 −1
arch/m68k/mac/config.c +1 −1
arch/m68k/mac/via.c +1 −1
arch/m68k/mm/fault.c +1 −1
arch/microblaze/kernel/signal.c +1 −1
arch/microblaze/mm/init.c +3 −0
arch/mips/include/asm/irqflags.h +5 −0
arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h +0 −2
arch/mips/include/asm/mach-loongson64/irq.h +0 −2
arch/mips/include/asm/mach-loongson64/mmzone.h +0 −1
arch/mips/include/asm/unroll.h +32 −32
arch/mips/kernel/perf_event_mipsxx.c +2 −2
arch/mips/kernel/smp-bmips.c +2 −0
arch/mips/kernel/traps.c +12 −0
arch/mips/mm/c-r4k.c +4 −0
arch/mips/oprofile/op_model_mipsxx.c +3 −1
arch/mips/sni/a20r.c +2 −2
arch/nds32/include/asm/irqflags.h +5 −0
arch/nds32/kernel/fpu.c +6 −6
arch/nds32/kernel/signal.c +2 −2
arch/openrisc/kernel/signal.c +1 −1
arch/parisc/kernel/signal.c +1 −1
arch/parisc/kernel/traps.c +5 −6
arch/parisc/mm/fault.c +2 −2
arch/powerpc/Kconfig +12 −0
arch/powerpc/include/asm/book3s/64/pgtable.h +3 −5
arch/powerpc/include/asm/cputable.h +5 −5
arch/powerpc/include/asm/hw_irq.h +4 −7
arch/powerpc/include/asm/mman.h +27 −4
arch/powerpc/include/asm/nohash/64/pgtable.h +2 −0
arch/powerpc/include/uapi/asm/mman.h +1 −1
arch/powerpc/kernel/dt_cpu_ftrs.c +1 −1
arch/powerpc/kernel/entry_64.S +4 −0
arch/powerpc/kernel/process.c +9 −3
arch/powerpc/mm/book3s64/hash_utils.c +2 −0
arch/powerpc/net/bpf_jit_comp.c +1 −1
arch/powerpc/perf/core-book3s.c +14 −5
arch/powerpc/perf/imc-pmu.c +2 −2
arch/powerpc/platforms/Kconfig.cputype +1 −1
arch/powerpc/platforms/powernv/idle.c +1 −1
arch/riscv/kernel/signal.c +1 −1
arch/riscv/net/bpf_jit_comp32.c +2 −2
arch/s390/Kconfig +1 −1
arch/s390/configs/debug_defconfig +4 −0
arch/s390/configs/defconfig +3 −0
arch/s390/configs/zfcpdump_defconfig +1 −0
arch/s390/include/asm/percpu.h +14 −14
arch/s390/kernel/idle.c +1 −2
arch/s390/mm/vmem.c +1 −0
arch/sh/drivers/platform_early.c +1 −1
arch/sh/kernel/disassemble.c +2 −2
arch/sh/kernel/kgdb.c +1 −1
arch/sh/kernel/signal_32.c +1 −1
arch/sparc/kernel/auxio_64.c +0 −1
arch/sparc/kernel/central.c +1 −1
arch/sparc/kernel/kgdb_32.c +1 −1
arch/sparc/kernel/kgdb_64.c +1 −1
arch/sparc/kernel/pcr.c +1 −1
arch/sparc/kernel/prom_32.c +1 −1
arch/sparc/kernel/signal32.c +2 −2
arch/sparc/kernel/signal_32.c +2 −2
arch/sparc/kernel/signal_64.c +2 −2
arch/sparc/math-emu/math_32.c +4 −4
arch/sparc/net/bpf_jit_comp_32.c +1 −1
arch/um/kernel/signal.c +1 −1
arch/x86/boot/cmdline.c +2 −2
arch/x86/boot/compressed/kaslr.c +1 −1
arch/x86/entry/common.c +20 −9
arch/x86/entry/thunk_32.S +0 −5
arch/x86/events/intel/core.c +3 −3
arch/x86/events/intel/lbr.c +1 −1
arch/x86/include/asm/entry-common.h +10 −2
arch/x86/include/asm/mmu.h +1 −0
arch/x86/include/asm/ptrace.h +1 −1
arch/x86/kernel/alternative.c +1 −1
arch/x86/kernel/apic/io_apic.c +2 −2
arch/x86/kernel/apic/probe_32.c +1 −1
arch/x86/kernel/apic/vector.c +9 −7
arch/x86/kernel/cpu/cacheinfo.c +1 −1
arch/x86/kernel/cpu/mce/inject.c +1 −1
arch/x86/kernel/cpu/mce/intel.c +1 −1
arch/x86/kernel/cpu/mtrr/cyrix.c +1 −1
arch/x86/kernel/hw_breakpoint.c +1 −1
arch/x86/kernel/kgdb.c +2 −2
arch/x86/kernel/mpparse.c +2 −2
arch/x86/kernel/process.c +0 −4
arch/x86/kernel/ptrace.c +1 −1
arch/x86/kernel/reboot.c +1 −1
arch/x86/kernel/signal.c +1 −1
arch/x86/kernel/smpboot.c +20 −6
arch/x86/kernel/traps.c +31 −34
arch/x86/kernel/uprobes.c +2 −2
arch/x86/kvm/emulate.c +1 −1
arch/x86/kvm/hyperv.c +1 −1
arch/x86/kvm/irq_comm.c +1 −1
arch/x86/kvm/lapic.c +3 −3
arch/x86/kvm/mmu/mmu.c +1 −1
arch/x86/kvm/svm/svm.c +1 −1
arch/x86/kvm/vmx/vmx.c +6 −6
arch/x86/kvm/x86.c +4 −7
arch/x86/lib/Makefile +1 −1
arch/x86/lib/cmdline.c +4 −4
arch/x86/lib/insn-eval.c +2 −4
arch/x86/math-emu/errors.c +1 −1
arch/x86/math-emu/fpu_trig.c +1 −1
arch/x86/mm/fault.c +78 −0
arch/x86/mm/ioremap.c +1 −1
arch/x86/mm/numa_emulation.c +1 −1
arch/x86/mm/tlb.c +2 −11
arch/xtensa/kernel/signal.c +1 −1
block/badblocks.c +1 −1
block/bfq-cgroup.c +1 −1
block/bfq-iosched.c +2 −2
block/bfq-iosched.h +0 −1
block/bfq-wf2q.c +2 −10
block/bio.c +5 −5
block/blk-cgroup.c +5 −3
block/blk-core.c +1 −0
block/blk-iocost.c +3 −2
block/blk-merge.c +10 −3
block/blk-mq-sched.c +9 −0
block/blk-mq.c +12 −1
block/blk-stat.c +11 −6
block/blk-wbt.c +1 −1
block/bsg-lib.c +1 −1
block/ioprio.c +1 −1
block/partitions/core.c +22 −15
crypto/af_alg.c +10 −3
crypto/drbg.c +1 −1
crypto/tcrypt.c +57 −57
drivers/accessibility/braille/braille_console.c +1 −1
drivers/accessibility/speakup/Kconfig +9 −4
drivers/accessibility/speakup/Makefile +1 −1
drivers/accessibility/speakup/serialio.c +5 −3
drivers/accessibility/speakup/spk_priv.h +0 −1
drivers/accessibility/speakup/spk_ttyio.c +7 −0
drivers/accessibility/speakup/spk_types.h +1 −0
drivers/accessibility/speakup/synth.c +1 −1
drivers/acpi/acpi_apd.c +2 −2
drivers/acpi/osl.c +19 −4
drivers/ata/ahci.c +1 −2
drivers/ata/ahci_brcm.c +1 −1
drivers/ata/libahci_platform.c +1 −1
drivers/ata/libata-core.c +10 −11
drivers/ata/libata-eh.c +3 −3
drivers/ata/libata-scsi.c +9 −3
drivers/ata/pata_atp867x.c +2 −2
drivers/ata/pata_serverworks.c +1 −1
drivers/ata/sata_mv.c +6 −6
drivers/ata/sata_promise.c +4 −4
drivers/ata/sata_sx4.c +1 −1
drivers/atm/firestream.c +2 −1
drivers/atm/fore200e.c +8 −8
drivers/atm/he.c +2 −2
drivers/atm/idt77105.c +1 −1
drivers/atm/lanai.c +1 −1
drivers/atm/zatm.c +1 −1
drivers/auxdisplay/arm-charlcd.c +1 −1
drivers/auxdisplay/panel.c +3 −3
drivers/base/core.c +8 −4
drivers/base/firmware_loader/fallback.c +2 −2
drivers/base/power/main.c +10 −6
drivers/block/aoe/aoecmd.c +1 −1
drivers/block/ataflop.c +1 −1
drivers/block/drbd/drbd_int.h +1 −1
drivers/block/drbd/drbd_main.c +1 −1
drivers/block/drbd/drbd_nl.c +1 −1
drivers/block/drbd/drbd_receiver.c +6 −6
drivers/block/drbd/drbd_req.c +2 −2
drivers/block/floppy.c +2 −2
drivers/block/loop.c +22 −19
drivers/block/nbd.c +2 −0
drivers/block/null_blk_main.c +1 −1
drivers/block/paride/pd.c +2 −2
drivers/block/pktcdvd.c +1 −1
drivers/block/rbd.c +4 −4
drivers/block/rnbd/rnbd-srv.c +2 −1
drivers/block/rsxx/core.c +1 −1
drivers/block/skd_main.c +1 −1
drivers/block/virtio_blk.c +23 −8
drivers/block/xen-blkback/blkback.c +1 −1
drivers/block/xen-blkback/xenbus.c +1 −1
drivers/block/xen-blkfront.c +2 −3
drivers/bus/ti-sysc.c +1 −1
drivers/char/agp/ali-agp.c +1 −1
drivers/char/hw_random/ingenic-rng.c +2 −7
drivers/char/ipmi/kcs_bmc.c +1 −1
drivers/char/lp.c +2 −2
drivers/char/mem.c +1 −1
drivers/char/nvram.c +1 −1
drivers/clocksource/timer-cadence-ttc.c +2 −2
drivers/cpufreq/cpufreq.c +1 −2
drivers/cpufreq/intel_pstate.c +148 −88
drivers/cpufreq/p4-clockmod.c +1 −1
drivers/cpufreq/speedstep-lib.c +1 −1
drivers/cpufreq/tegra194-cpufreq.c +7 −3
drivers/cpufreq/ti-cpufreq.c +2 −2
drivers/cpuidle/cpuidle.c +14 −5
drivers/crypto/Kconfig +3 −0
drivers/crypto/axis/artpec6_crypto.c +1 −1
drivers/crypto/cavium/cpt/cptvf_reqmanager.c +2 −2
drivers/crypto/chelsio/chcr_ktls.c +2 −2
drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c +2 −2
drivers/crypto/qat/qat_common/adf_admin.c +4 −3
drivers/crypto/qat/qat_common/adf_pf2vf_msg.c +1 −1
drivers/crypto/qat/qat_common/qat_uclo.c +3 −3
drivers/crypto/ux500/cryp/cryp.c +6 −6
drivers/dax/device.c +1 −1
drivers/dax/super.c +6 −0
drivers/dma/acpi-dma.c +3 −1
drivers/dma/amba-pl08x.c +5 −5
drivers/dma/at_hdmac.c +9 −2
drivers/dma/dma-jz4780.c +19 −19
drivers/dma/dw-edma/dw-edma-core.c +6 −5
drivers/dma/fsldma.c +1 −1
drivers/dma/fsldma.h +6 −6
drivers/dma/idxd/device.c +26 −0
drivers/dma/idxd/irq.c +0 −12
drivers/dma/imx-dma.c +1 −1
drivers/dma/iop-adma.h +6 −6
drivers/dma/nbpfaxi.c +1 −1
drivers/dma/of-dma.c +4 −4
drivers/dma/pl330.c +4 −8
drivers/dma/sh/shdma-base.c +1 −1
drivers/dma/ti/k3-udma.c +5 −5
drivers/edac/amd64_edac.c +1 −1
drivers/edac/ghes_edac.c +6 −4
drivers/edac/pnd2_edac.c +1 −1
drivers/firewire/core-device.c +1 −1
drivers/firewire/core-iso.c +1 −1
drivers/firewire/core-topology.c +1 −1
drivers/firewire/core-transaction.c +2 −2
drivers/firewire/ohci.c +2 −2
drivers/firmware/ti_sci.c +68 −87
drivers/gpio/gpio-aspeed-sgpio.c +3 −3
drivers/gpio/gpio-aspeed.c +3 −3
drivers/gpio/gpio-ath79.c +1 −1
drivers/gpio/gpio-eic-sprd.c +1 −3
drivers/gpio/gpio-stmpe.c +2 −2
drivers/gpio/gpiolib-acpi.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c +1 −1
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c +5 −0
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +1 −2
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +2 −4
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +1 −1
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +1 −1
drivers/gpu/drm/amd/amdgpu/nv.c +1 −0
drivers/gpu/drm/amd/amdgpu/si_dpm.c +1 −1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +50 −43
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +1 −1
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c +10 −0
drivers/gpu/drm/amd/display/dc/core/dc_link.c +2 −1
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c +4 −4
drivers/gpu/drm/amd/display/dc/dc_stream.h +1 −1
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c +31 −22
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c +8 −0
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h +2 −0
drivers/gpu/drm/amd/powerplay/arcturus_ppt.c +7 −3
drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c +3 −6
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c +2 −1
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c +22 −10
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c +11 −10
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c +11 −10
drivers/gpu/drm/amd/powerplay/navi10_ppt.c +7 −3
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +19 −6
drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c +2 −0
drivers/gpu/drm/arm/malidp_hw.c +3 −3
drivers/gpu/drm/ast/ast_main.c +1 −1
drivers/gpu/drm/bridge/nwl-dsi.c +0 −2
drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c +2 −2
drivers/gpu/drm/bridge/ti-sn65dsi86.c +3 −3
drivers/gpu/drm/drm_atomic_helper.c +4 −3
drivers/gpu/drm/drm_bufs.c +1 −1
drivers/gpu/drm/drm_color_mgmt.c +1 −1
drivers/gpu/drm/drm_crtc.c +1 −3
drivers/gpu/drm/drm_dp_helper.c +1 −1
drivers/gpu/drm/drm_dp_mst_topology.c +2 −2
drivers/gpu/drm/drm_mode_object.c +2 −2
drivers/gpu/drm/drm_modes.c +1 −1
drivers/gpu/drm/drm_plane.c +1 −1
drivers/gpu/drm/etnaviv/etnaviv_gpu.c +9 −2
drivers/gpu/drm/etnaviv/etnaviv_sched.c +6 −5
drivers/gpu/drm/exynos/exynos_drm_dsi.c +5 −5
drivers/gpu/drm/exynos/exynos_drm_fbdev.c +1 −1
drivers/gpu/drm/exynos/exynos_drm_gem.h +1 −1
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c +3 −3
drivers/gpu/drm/i915/display/icl_dsi.c +3 −3
drivers/gpu/drm/i915/display/intel_bios.c +3 −3
drivers/gpu/drm/i915/display/intel_cdclk.c +5 −5
drivers/gpu/drm/i915/display/intel_combo_phy.c +5 −5
drivers/gpu/drm/i915/display/intel_ddi.c +2 −2
drivers/gpu/drm/i915/display/intel_display.c +10 −10
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sound/hda/intel-dsp-config.c +5 −5
sound/pci/asihpi/asihpi.c +4 −5
sound/pci/ca0106/ca0106_main.c +2 −1
sound/pci/hda/hda_intel.c +3 −4
sound/pci/hda/hda_tegra.c +7 −0
sound/pci/hda/patch_hdmi.c +7 −0
sound/pci/hda/patch_realtek.c +44 −2
sound/pci/riptide/riptide.c +3 −3
sound/pci/rme9652/hdsp.c +3 −3
sound/pci/rme9652/hdspm.c +3 −4
sound/ppc/snd_ps3.c +2 −2
sound/soc/atmel/mchp-i2s-mcc.c +1 −1
sound/soc/codecs/jz4770.c +1 −1
sound/soc/codecs/pcm186x.c +1 −1
sound/soc/fsl/fsl_esai.c +3 −4
sound/soc/fsl/fsl_ssi.c +1 −1
sound/soc/hisilicon/hi6210-i2s.c +2 −2
sound/soc/intel/baytrail/sst-baytrail-pcm.c +1 −1
sound/soc/intel/boards/bytcht_es8316.c +1 −1
sound/soc/intel/boards/bytcr_rt5651.c +2 −2
sound/soc/intel/skylake/skl-pcm.c +1 −1
sound/soc/meson/axg-tdm-interface.c +5 −5
sound/soc/pxa/pxa-ssp.c +1 −1
sound/soc/rockchip/rockchip_pdm.c +3 −3
sound/soc/samsung/i2s.c +1 −1
sound/soc/sh/siu_pcm.c +4 −6
sound/soc/soc-core.c +1 −1
sound/soc/soc-topology.c +2 −2
sound/soc/sof/intel/hda-dai.c +2 −2
sound/soc/sof/pcm.c +2 −2
sound/soc/ti/davinci-i2s.c +1 −1
sound/soc/ti/n810.c +1 −1
sound/soc/ti/omap-dmic.c +2 −2
sound/soc/ti/omap-mcpdm.c +4 −4
sound/soc/ti/rx51.c +1 −1
sound/soc/txx9/txx9aclc.c +3 −4
sound/soc/zte/zx-i2s.c +2 −2
sound/soc/zte/zx-spdif.c +1 −1
sound/usb/midi.c +3 −4
sound/usb/misc/ua101.c +3 −4
sound/usb/pcm.c +2 −0
sound/usb/quirks-table.h +67 −11
sound/usb/quirks.c +11 −0
sound/usb/usbaudio.h +1 −0
sound/x86/Kconfig +1 −1
tools/include/uapi/linux/perf_event.h +1 −1
tools/lib/traceevent/event-parse.c +1 −1
tools/perf/Documentation/perf-record.txt +4 −0
tools/perf/Documentation/perf-stat.txt +7 −0
tools/perf/bench/synthesize.c +2 −2
tools/perf/builtin-record.c +1 −1
tools/perf/builtin-report.c +3 −0
tools/perf/builtin-sched.c +5 −1
tools/perf/builtin-stat.c +5 −3
tools/perf/builtin-top.c +2 −0
tools/perf/pmu-events/jevents.c +1 −1
tools/perf/tests/bpf.c +1 −1
tools/perf/tests/parse-events.c +2 −2
tools/perf/tests/parse-metric.c +3 −0
tools/perf/ui/browsers/hists.c +2 −1
tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +3 −3
tools/perf/util/cs-etm.c +8 −1
tools/perf/util/intel-pt.c +8 −1
tools/perf/util/machine.c +0 −6
tools/perf/util/map.c +16 −0
tools/perf/util/map.h +8 −1
tools/perf/util/parse-events.c +19 −12
tools/perf/util/parse-events.y +4 −4
tools/perf/util/session.c +1 −1
tools/perf/util/stat-display.c +1 −1
tools/perf/util/stat.h +1 −0
tools/perf/util/symbol.c +1 −0
tools/perf/util/zstd.c +1 −1
tools/testing/selftests/bpf/test_maps.c +2 −0
tools/testing/selftests/bpf/test_progs.c +3 −1
tools/testing/selftests/netfilter/nft_flowtable.sh +37 −30
tools/testing/selftests/powerpc/mm/.gitignore +1 −0
tools/testing/selftests/powerpc/mm/Makefile +3 −1
tools/testing/selftests/powerpc/mm/prot_sao.c +43 −0
tools/testing/selftests/x86/test_vsyscall.c +20 −2
tools/usb/Build +2 −0
tools/usb/Makefile +45 −8

   - 'css_for_each_descendant_pre'
   - 'device_for_each_child_node'
   - 'dma_fence_chain_for_each'
+  - 'do_for_each_ftrace_op'
   - 'drm_atomic_crtc_for_each_plane'
   - 'drm_atomic_crtc_state_for_each_plane'
   - 'drm_atomic_crtc_state_for_each_plane_state'
   - 'for_each_active_dev_scope'
   - 'for_each_active_drhd_unit'
   - 'for_each_active_iommu'
+  - 'for_each_aggr_pgid'
   - 'for_each_available_child_of_node'
   - 'for_each_bio'
   - 'for_each_board_func_rsrc'
   - 'for_each_node_state'
   - 'for_each_node_with_cpus'
   - 'for_each_node_with_property'
+  - 'for_each_nonreserved_multicast_dest_pgid'
   - 'for_each_of_allnodes'
   - 'for_each_of_allnodes_from'
   - 'for_each_of_cpu_node'
   - 'for_each_pci_dev'
   - 'for_each_pci_msi_entry'
   - 'for_each_pcm_streams'
+  - 'for_each_physmem_range'
   - 'for_each_populated_zone'
   - 'for_each_possible_cpu'
   - 'for_each_present_cpu'
   - 'for_each_process_thread'
   - 'for_each_property_of_node'
   - 'for_each_registered_fb'
+  - 'for_each_requested_gpio'
+  - 'for_each_requested_gpio_in_range'
   - 'for_each_reserved_mem_region'
   - 'for_each_rtd_codec_dais'
   - 'for_each_rtd_codec_dais_rollback'
   - 'for_each_sg'
   - 'for_each_sg_dma_page'
   - 'for_each_sg_page'
+  - 'for_each_sgtable_dma_page'
+  - 'for_each_sgtable_dma_sg'
+  - 'for_each_sgtable_page'
+  - 'for_each_sgtable_sg'
   - 'for_each_sibling_event'
   - 'for_each_subelement'
   - 'for_each_subelement_extid'
   - 'for_each_subelement_id'
   - '__for_each_thread'
   - 'for_each_thread'
+  - 'for_each_unicast_dest_pgid'
   - 'for_each_wakeup_source'
   - 'for_each_zone'
   - 'for_each_zone_zonelist'
   - 'v4l2_m2m_for_each_src_buf'
   - 'v4l2_m2m_for_each_src_buf_safe'
   - 'virtio_device_for_each_vq'
+  - 'while_for_each_ftrace_op'
   - 'xa_for_each'
   - 'xa_for_each_marked'
   - 'xa_for_each_range'

Documentation/RCU/lockdep.rst+1−1

@@ -49,7 +49,7 @@ checking of rcu_dereference() primitives: · 48 unmodified lines
49	is invoked by both RCU-sched readers and updaters.	49	is invoked by both RCU-sched readers and updaters.
50	srcu_dereference_check(p, c):	50	srcu_dereference_check(p, c):
51	Use explicit check expression "c" along with	51	Use explicit check expression "c" along with
52	srcu_read_lock_held()(). This is useful in code that	52	srcu_read_lock_held(). This is useful in code that
53	is invoked by both SRCU readers and updaters.	53	is invoked by both SRCU readers and updaters.
54	rcu_dereference_raw(p):	54	rcu_dereference_raw(p):
55	Don't check. (Use sparingly, if at all.)	55	Don't check. (Use sparingly, if at all.)

Documentation/admin-guide/devices.txt+1−1

@@ -1662,7 +1662,7 @@ · 1661 unmodified lines
1662		1662
1663	98 block User-mode virtual block device	1663	98 block User-mode virtual block device
1664	0 = /dev/ubda First user-mode block device	1664	0 = /dev/ubda First user-mode block device
1665	16 = /dev/udbb Second user-mode block device	1665	16 = /dev/ubdb Second user-mode block device
1666	...	1666	...
1667		1667
1668	Partitions are handled in the same way as for IDE	1668	Partitions are handled in the same way as for IDE

Documentation/admin-guide/laptops/thinkpad-acpi.rst+1−1

@@ -1434,7 +1434,7 @@ on the feature, restricting the viewing angles. · 1433 unmodified lines
1434		1434
1435		1435
1436	DYTC Lapmode sensor	1436	DYTC Lapmode sensor
1437	------------------	1437	-------------------
1438		1438
1439	sysfs: dytc_lapmode	1439	sysfs: dytc_lapmode
1440		1440

Documentation/admin-guide/pm/intel_pstate.rst+5−3

Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt+0−66

@@ -1,66 +0,0 @@
1	Texas Instruments K3 Interrupt Aggregator
2	=========================================
3
4	The Interrupt Aggregator (INTA) provides a centralized machine
5	which handles the termination of system events to that they can
6	be coherently processed by the host(s) in the system. A maximum
7	of 64 events can be mapped to a single interrupt.
8
9
10	Interrupt Aggregator
11	+-----------------------------------------+
12	\| Intmap VINT \|
13	\| +--------------+ +------------+ \|
14	m ------>\| \| vint \| bit \| \| 0 \|.....\|63\| vint0 \|
15	. \| +--------------+ +------------+ \| +------+
16	. \| . . \| \| HOST \|
17	Globalevents ------>\| . . \|------>\| IRQ \|
18	. \| . . \| \| CTRL \|
19	. \| . . \| +------+
20	n ------>\| +--------------+ +------------+ \|
21	\| \| vint \| bit \| \| 0 \|.....\|63\| vintx \|
22	\| +--------------+ +------------+ \|
23	\| \|
24	+-----------------------------------------+
25
26	Configuration of these Intmap registers that maps global events to vint is done
27	by a system controller (like the Device Memory and Security Controller on K3
28	AM654 SoC). Driver should request the system controller to get the range
29	of global events and vints assigned to the requesting host. Management
30	of these requested resources should be handled by driver and requests
31	system controller to map specific global event to vint, bit pair.
32
33	Communication between the host processor running an OS and the system
34	controller happens through a protocol called TI System Control Interface
35	(TISCI protocol). For more details refer:
36	Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
37
38	TISCI Interrupt Aggregator Node:
39	-------------------------------
40	- compatible: Must be "ti,sci-inta".
41	- reg: Should contain registers location and length.
42	- interrupt-controller: Identifies the node as an interrupt controller
43	- msi-controller: Identifies the node as an MSI controller.
44	- interrupt-parent: phandle of irq parent.
45	- ti,sci: Phandle to TI-SCI compatible System controller node.
46	- ti,sci-dev-id: TISCI device ID of the Interrupt Aggregator.
47	- ti,sci-rm-range-vint: Array of TISCI subtype ids representing vints(inta
48	outputs) range within this INTA, assigned to the
49	requesting host context.
50	- ti,sci-rm-range-global-event: Array of TISCI subtype ids representing the
51	global events range reaching this IA and are assigned
52	to the requesting host context.
53
54	Example:
55	--------
56	main_udmass_inta: interrupt-controller@33d00000 {
57	compatible = "ti,sci-inta";
58	reg = <0x0 0x33d00000 0x0 0x100000>;
59	interrupt-controller;
60	msi-controller;
61	interrupt-parent = <&main_navss_intr>;
62	ti,sci = <&dmsc>;
63	ti,sci-dev-id = <179>;
64	ti,sci-rm-range-vint = <0x0>;
65	ti,sci-rm-range-global-event = <0x1>;
66	};

Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml+98−0

@@ -0,0 +1,98 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-inta.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments K3 Interrupt Aggregator
	8
	9	maintainers:
	10	- Lokesh Vutla <lokeshvutla@ti.com>
	11
	12	allOf:
	13	- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
	14
	15	description: \|
	16	The Interrupt Aggregator (INTA) provides a centralized machine
	17	which handles the termination of system events to that they can
	18	be coherently processed by the host(s) in the system. A maximum
	19	of 64 events can be mapped to a single interrupt.
	20
	21	Interrupt Aggregator
	22	+-----------------------------------------+
	23	\| Intmap VINT \|
	24	\| +--------------+ +------------+ \|
	25	m ------>\| \| vint \| bit \| \| 0 \|.....\|63\| vint0 \|
	26	. \| +--------------+ +------------+ \| +------+
	27	. \| . . \| \| HOST \|
	28	Globalevents ------>\| . . \|----->\| IRQ \|
	29	. \| . . \| \| CTRL \|
	30	. \| . . \| +------+
	31	n ------>\| +--------------+ +------------+ \|
	32	\| \| vint \| bit \| \| 0 \|.....\|63\| vintx \|
	33	\| +--------------+ +------------+ \|
	34	\| \|
	35	+-----------------------------------------+
	36
	37	Configuration of these Intmap registers that maps global events to vint is
	38	done by a system controller (like the Device Memory and Security Controller
	39	on AM654 SoC). Driver should request the system controller to get the range
	40	of global events and vints assigned to the requesting host. Management
	41	of these requested resources should be handled by driver and requests
	42	system controller to map specific global event to vint, bit pair.
	43
	44	Communication between the host processor running an OS and the system
	45	controller happens through a protocol called TI System Control Interface
	46	(TISCI protocol).
	47
	48	properties:
	49	compatible:
	50	const: ti,sci-inta
	51
	52	reg:
	53	maxItems: 1
	54
	55	interrupt-controller: true
	56
	57	msi-controller: true
	58
	59	ti,interrupt-ranges:
	60	$ref: /schemas/types.yaml#/definitions/uint32-matrix
	61	description: \|
	62	Interrupt ranges that converts the INTA output hw irq numbers
	63	to parents's input interrupt numbers.
	64	items:
	65	items:
	66	- description: \|
	67	"output_irq" specifies the base for inta output irq
	68	- description: \|
	69	"parent's input irq" specifies the base for parent irq
	70	- description: \|
	71	"limit" specifies the limit for translation
	72
	73	required:
	74	- compatible
	75	- reg
	76	- interrupt-controller
	77	- msi-controller
	78	- ti,sci
	79	- ti,sci-dev-id
	80	- ti,interrupt-ranges
	81
	82	examples:
	83	- \|
	84	bus {
	85	#address-cells = <2>;
	86	#size-cells = <2>;
	87
	88	main_udmass_inta: msi-controller@33d00000 {
	89	compatible = "ti,sci-inta";
	90	reg = <0x0 0x33d00000 0x0 0x100000>;
	91	interrupt-controller;
	92	msi-controller;
	93	interrupt-parent = <&main_navss_intr>;
	94	ti,sci = <&dmsc>;
	95	ti,sci-dev-id = <179>;
	96	ti,interrupt-ranges = <0 0 256>;
	97	};
	98	};

Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt+0−82

@@ -1,82 +0,0 @@
1	Texas Instruments K3 Interrupt Router
2	=====================================
3
4	The Interrupt Router (INTR) module provides a mechanism to mux M
5	interrupt inputs to N interrupt outputs, where all M inputs are selectable
6	to be driven per N output. An Interrupt Router can either handle edge triggered
7	or level triggered interrupts and that is fixed in hardware.
8
9	Interrupt Router
10	+----------------------+
11	\| Inputs Outputs \|
12	+-------+ \| +------+ +-----+ \|
13	\| GPIO \|----------->\| \| irq0 \| \| 0 \| \| Host IRQ
14	+-------+ \| +------+ +-----+ \| controller
15	\| . . \| +-------+
16	+-------+ \| . . \|----->\| IRQ \|
17	\| INTA \|----------->\| . . \| +-------+
18	+-------+ \| . +-----+ \|
19	\| +------+ \| N \| \|
20	\| \| irqM \| +-----+ \|
21	\| +------+ \|
22	\| \|
23	+----------------------+
24
25	There is one register per output (MUXCNTL_N) that controls the selection.
26	Configuration of these MUXCNTL_N registers is done by a system controller
27	(like the Device Memory and Security Controller on K3 AM654 SoC). System
28	controller will keep track of the used and unused registers within the Router.
29	Driver should request the system controller to get the range of GIC IRQs
30	assigned to the requesting hosts. It is the drivers responsibility to keep
31	track of Host IRQs.
32
33	Communication between the host processor running an OS and the system
34	controller happens through a protocol called TI System Control Interface
35	(TISCI protocol). For more details refer:
36	Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
37
38	TISCI Interrupt Router Node:
39	----------------------------
40	Required Properties:
41	- compatible: Must be "ti,sci-intr".
42	- ti,intr-trigger-type: Should be one of the following:
43	1: If intr supports edge triggered interrupts.
44	4: If intr supports level triggered interrupts.
45	- interrupt-controller: Identifies the node as an interrupt controller
46	- #interrupt-cells: Specifies the number of cells needed to encode an
47	interrupt source. The value should be 2.
48	First cell should contain the TISCI device ID of source
49	Second cell should contain the interrupt source offset
50	within the device.
51	- ti,sci: Phandle to TI-SCI compatible System controller node.
52	- ti,sci-dst-id: TISCI device ID of the destination IRQ controller.
53	- ti,sci-rm-range-girq: Array of TISCI subtype ids representing the host irqs
54	assigned to this interrupt router. Each subtype id
55	corresponds to a range of host irqs.
56
57	For more details on TISCI IRQ resource management refer:
58	https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
59
60	Example:
61	--------
62	The following example demonstrates both interrupt router node and the consumer
63	node(main gpio) on the AM654 SoC:
64
65	main_intr: interrupt-controller0 {
66	compatible = "ti,sci-intr";
67	ti,intr-trigger-type = <1>;
68	interrupt-controller;
69	interrupt-parent = <&gic500>;
70	#interrupt-cells = <2>;
71	ti,sci = <&dmsc>;
72	ti,sci-dst-id = <56>;
73	ti,sci-rm-range-girq = <0x1>;
74	};
75
76	main_gpio0: gpio@600000 {
77	...
78	interrupt-parent = <&main_intr>;
79	interrupts = <57 256>, <57 257>, <57 258>,
80	<57 259>, <57 260>, <57 261>;
81	...
82	};

Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml+102−0

@@ -0,0 +1,102 @@
	1	# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
	2	%YAML 1.2
	3	---
	4	$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
	5	$schema: http://devicetree.org/meta-schemas/core.yaml#
	6
	7	title: Texas Instruments K3 Interrupt Router
	8
	9	maintainers:
	10	- Lokesh Vutla <lokeshvutla@ti.com>
	11
	12	allOf:
	13	- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
	14
	15	description: \|
	16	The Interrupt Router (INTR) module provides a mechanism to mux M
	17	interrupt inputs to N interrupt outputs, where all M inputs are selectable
	18	to be driven per N output. An Interrupt Router can either handle edge
	19	triggered or level triggered interrupts and that is fixed in hardware.
	20
	21	Interrupt Router
	22	+----------------------+
	23	\| Inputs Outputs \|
	24	+-------+ \| +------+ +-----+ \|
	25	\| GPIO \|----------->\| \| irq0 \| \| 0 \| \| Host IRQ
	26	+-------+ \| +------+ +-----+ \| controller
	27	\| . . \| +-------+
	28	+-------+ \| . . \|----->\| IRQ \|
	29	\| INTA \|----------->\| . . \| +-------+
	30	+-------+ \| . +-----+ \|
	31	\| +------+ \| N \| \|
	32	\| \| irqM \| +-----+ \|
	33	\| +------+ \|
	34	\| \|
	35	+----------------------+
	36
	37	There is one register per output (MUXCNTL_N) that controls the selection.
	38	Configuration of these MUXCNTL_N registers is done by a system controller
	39	(like the Device Memory and Security Controller on K3 AM654 SoC). System
	40	controller will keep track of the used and unused registers within the Router.
	41	Driver should request the system controller to get the range of GIC IRQs
	42	assigned to the requesting hosts. It is the drivers responsibility to keep
	43	track of Host IRQs.
	44
	45	Communication between the host processor running an OS and the system
	46	controller happens through a protocol called TI System Control Interface
	47	(TISCI protocol).
	48
	49	properties:
	50	compatible:
	51	const: ti,sci-intr
	52
	53	ti,intr-trigger-type:
	54	$ref: /schemas/types.yaml#/definitions/uint32
	55	enum: [1, 4]
	56	description: \|
	57	Should be one of the following.
	58	1 = If intr supports edge triggered interrupts.
	59	4 = If intr supports level triggered interrupts.
	60
	61	interrupt-controller: true
	62
	63	'#interrupt-cells':
	64	const: 1
	65	description: \|
	66	The 1st cell should contain interrupt router input hw number.
	67
	68	ti,interrupt-ranges:
	69	$ref: /schemas/types.yaml#/definitions/uint32-matrix
	70	description: \|
	71	Interrupt ranges that converts the INTR output hw irq numbers
	72	to parents's input interrupt numbers.
	73	items:
	74	items:
	75	- description: \|
	76	"output_irq" specifies the base for intr output irq
	77	- description: \|
	78	"parent's input irq" specifies the base for parent irq
	79	- description: \|
	80	"limit" specifies the limit for translation
	81
	82	required:
	83	- compatible
	84	- ti,intr-trigger-type
	85	- interrupt-controller
	86	- '#interrupt-cells'
	87	- ti,sci
	88	- ti,sci-dev-id
	89	- ti,interrupt-ranges
	90
	91	examples:
	92	- \|
	93	main_gpio_intr: interrupt-controller0 {
	94	compatible = "ti,sci-intr";
	95	ti,intr-trigger-type = <1>;
	96	interrupt-controller;
	97	interrupt-parent = <&gic500>;
	98	#interrupt-cells = <1>;
	99	ti,sci = <&dmsc>;
	100	ti,sci-dev-id = <131>;
	101	ti,interrupt-ranges = <0 360 32>;
	102	};

Documentation/devicetree/bindings/mmc/arasan,sdhci.yaml+7−3

     then:
       properties:
         clock-output-names:
-          items:
+          oneOf:
-            - const: clk_out_sd0
+            - items:
-            - const: clk_in_sd0
+              - const: clk_out_sd0
+              - const: clk_in_sd0
+            - items:
+              - const: clk_out_sd1
+              - const: clk_in_sd1
 properties:
   compatible:

Documentation/devicetree/bindings/mmc/mtk-sd.txt+2−0

@@ -50,6 +50,8 @@ Optional properties: · 49 unmodified lines
50	error caused by stop clock(fifo full)	50	error caused by stop clock(fifo full)
51	Valid range = [0:0x7]. if not present, default value is 0.	51	Valid range = [0:0x7]. if not present, default value is 0.
52	applied to compatible "mediatek,mt2701-mmc".	52	applied to compatible "mediatek,mt2701-mmc".
		53	- resets: Phandle and reset specifier pair to softreset line of MSDC IP.
		54	- reset-names: Should be "hrst".
53		55
54	Examples:	56	Examples:
55	mmc0: mmc@11230000 {	57	mmc0: mmc@11230000 {

Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt+29−3

@@ -15,8 +15,15 @@ Required properties: · 14 unmodified lines
15	- "nvidia,tegra210-sdhci": for Tegra210	15	- "nvidia,tegra210-sdhci": for Tegra210
16	- "nvidia,tegra186-sdhci": for Tegra186	16	- "nvidia,tegra186-sdhci": for Tegra186
17	- "nvidia,tegra194-sdhci": for Tegra194	17	- "nvidia,tegra194-sdhci": for Tegra194
18	- clocks : Must contain one entry, for the module clock.	18	- clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries.
19	See ../clocks/clock-bindings.txt for details.	19	One for the module clock and one for the timeout clock.
		20	For all other Tegra devices, must contain a single entry for
		21	the module clock. See ../clocks/clock-bindings.txt for details.
		22	- clock-names: For Tegra210, Tegra186 and Tegra194 must contain the
		23	strings 'sdhci' and 'tmclk' to represent the module and
		24	the timeout clocks, respectively.
		25	For all other Tegra devices must contain the string 'sdhci'
		26	to represent the module clock.
20	- resets : Must contain an entry for each entry in reset-names.	27	- resets : Must contain an entry for each entry in reset-names.
21	See ../reset/reset.txt for details.	28	See ../reset/reset.txt for details.
22	- reset-names : Must include the following entries:	29	- reset-names : Must include the following entries:
@@ -99,7 +106,7 @@ Optional properties for Tegra210, Tegra186 and Tegra194: · 76 unmodified lines
99		106
100	Example:	107	Example:
101	sdhci@700b0000 {	108	sdhci@700b0000 {
102	compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";	109	compatible = "nvidia,tegra124-sdhci";
103	reg = <0x0 0x700b0000 0x0 0x200>;	110	reg = <0x0 0x700b0000 0x0 0x200>;
104	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;	111	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
105	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;	112	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@@ -115,3 +122,22 @@ sdhci@700b0000 { · 9 unmodified lines
115	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;	122	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
116	status = "disabled";	123	status = "disabled";
117	};	124	};
		125
		126	sdhci@700b0000 {
		127	compatible = "nvidia,tegra210-sdhci";
		128	reg = <0x0 0x700b0000 0x0 0x200>;
		129	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
		130	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
		131	<&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
		132	clock-names = "sdhci", "tmclk";
		133	resets = <&tegra_car 14>;
		134	reset-names = "sdhci";
		135	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
		136	pinctrl-0 = <&sdmmc1_3v3>;
		137	pinctrl-1 = <&sdmmc1_1v8>;
		138	nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
		139	nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
		140	nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
		141	nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
		142	status = "disabled";
		143	};

Documentation/devicetree/bindings/net/dsa/dsa.txt+1−1

@@ -1,4 +1,4 @@
1	Distributed Switch Architecture Device Tree Bindings	1	Distributed Switch Architecture Device Tree Bindings
2	----------------------------------------------------	2	----------------------------------------------------
3		3
4	See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documenation.	4	See Documentation/devicetree/bindings/net/dsa/dsa.yaml for the documentation.

Documentation/driver-api/fpga/fpga-bridge.rst+3−3

@@ -6,9 +6,9 @@ API to implement a new FPGA bridge · 5 unmodified lines
6		6
7	* struct :c:type:`fpga_bridge` — The FPGA Bridge structure	7	* struct :c:type:`fpga_bridge` — The FPGA Bridge structure
8	* struct :c:type:`fpga_bridge_ops` — Low level Bridge driver ops	8	* struct :c:type:`fpga_bridge_ops` — Low level Bridge driver ops
9	* :c:func:`devm_fpga_bridge_create()` — Allocate and init a bridge struct	9	* devm_fpga_bridge_create() — Allocate and init a bridge struct
10	* :c:func:`fpga_bridge_register()` — Register a bridge	10	* fpga_bridge_register() — Register a bridge
11	* :c:func:`fpga_bridge_unregister()` — Unregister a bridge	11	* fpga_bridge_unregister() — Unregister a bridge
12		12
13	.. kernel-doc:: include/linux/fpga/fpga-bridge.h	13	.. kernel-doc:: include/linux/fpga/fpga-bridge.h
14	:functions: fpga_bridge	14	:functions: fpga_bridge

Documentation/driver-api/fpga/fpga-mgr.rst+3−3

@@ -104,9 +104,9 @@ API for implementing a new FPGA Manager driver · 103 unmodified lines
104	* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.	104	* ``fpga_mgr_states`` — Values for :c:member:`fpga_manager->state`.
105	* struct :c:type:`fpga_manager` — the FPGA manager struct	105	* struct :c:type:`fpga_manager` — the FPGA manager struct
106	* struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops	106	* struct :c:type:`fpga_manager_ops` — Low level FPGA manager driver ops
107	* :c:func:`devm_fpga_mgr_create` — Allocate and init a manager struct	107	* devm_fpga_mgr_create() — Allocate and init a manager struct
108	* :c:func:`fpga_mgr_register` — Register an FPGA manager	108	* fpga_mgr_register() — Register an FPGA manager
109	* :c:func:`fpga_mgr_unregister` — Unregister an FPGA manager	109	* fpga_mgr_unregister() — Unregister an FPGA manager
110		110
111	.. kernel-doc:: include/linux/fpga/fpga-mgr.h	111	.. kernel-doc:: include/linux/fpga/fpga-mgr.h
112	:functions: fpga_mgr_states	112	:functions: fpga_mgr_states

Documentation/driver-api/fpga/fpga-programming.rst+8−8

@@ -6,9 +6,9 @@ Overview · 5 unmodified lines
6		6
7	The in-kernel API for FPGA programming is a combination of APIs from	7	The in-kernel API for FPGA programming is a combination of APIs from
8	FPGA manager, bridge, and regions. The actual function used to	8	FPGA manager, bridge, and regions. The actual function used to
9	trigger FPGA programming is :c:func:`fpga_region_program_fpga()`.	9	trigger FPGA programming is fpga_region_program_fpga().
10		10
11	:c:func:`fpga_region_program_fpga()` uses functionality supplied by	11	fpga_region_program_fpga() uses functionality supplied by
12	the FPGA manager and bridges. It will:	12	the FPGA manager and bridges. It will:
13		13
14	* lock the region's mutex	14	* lock the region's mutex
@@ -20,8 +20,8 @@ the FPGA manager and bridges. It will: · 5 unmodified lines
20	* release the locks	20	* release the locks
21		21
22	The struct fpga_image_info specifies what FPGA image to program. It is	22	The struct fpga_image_info specifies what FPGA image to program. It is
23	allocated/freed by :c:func:`fpga_image_info_alloc()` and freed with	23	allocated/freed by fpga_image_info_alloc() and freed with
24	:c:func:`fpga_image_info_free()`	24	fpga_image_info_free()
25		25
26	How to program an FPGA using a region	26	How to program an FPGA using a region
27	-------------------------------------	27	-------------------------------------
@@ -84,10 +84,10 @@ will generate that list. Here's some sample code of what to do next:: · 56 unmodified lines
84	API for programming an FPGA	84	API for programming an FPGA
85	---------------------------	85	---------------------------
86		86
87	* :c:func:`fpga_region_program_fpga` — Program an FPGA	87	* fpga_region_program_fpga() — Program an FPGA
88	* :c:type:`fpga_image_info` — Specifies what FPGA image to program	88	* fpga_image_info() — Specifies what FPGA image to program
89	* :c:func:`fpga_image_info_alloc()` — Allocate an FPGA image info struct	89	* fpga_image_info_alloc() — Allocate an FPGA image info struct
90	* :c:func:`fpga_image_info_free()` — Free an FPGA image info struct	90	* fpga_image_info_free() — Free an FPGA image info struct
91		91
92	.. kernel-doc:: drivers/fpga/fpga-region.c	92	.. kernel-doc:: drivers/fpga/fpga-region.c
93	:functions: fpga_region_program_fpga	93	:functions: fpga_region_program_fpga

Documentation/driver-api/fpga/fpga-region.rst+9−9

@@ -46,18 +46,18 @@ API to add a new FPGA region · 45 unmodified lines
46	----------------------------	46	----------------------------
47		47
48	* struct :c:type:`fpga_region` — The FPGA region struct	48	* struct :c:type:`fpga_region` — The FPGA region struct
49	* :c:func:`devm_fpga_region_create` — Allocate and init a region struct	49	* devm_fpga_region_create() — Allocate and init a region struct
50	* :c:func:`fpga_region_register` — Register an FPGA region	50	* fpga_region_register() — Register an FPGA region
51	* :c:func:`fpga_region_unregister` — Unregister an FPGA region	51	* fpga_region_unregister() — Unregister an FPGA region
52		52
53	The FPGA region's probe function will need to get a reference to the FPGA	53	The FPGA region's probe function will need to get a reference to the FPGA
54	Manager it will be using to do the programming. This usually would happen	54	Manager it will be using to do the programming. This usually would happen
55	during the region's probe function.	55	during the region's probe function.
56		56
57	* :c:func:`fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count	57	* fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count
58	* :c:func:`of_fpga_mgr_get` — Get a reference to an FPGA manager, raise ref count,	58	* of_fpga_mgr_get() — Get a reference to an FPGA manager, raise ref count,
59	given a device node.	59	given a device node.
60	* :c:func:`fpga_mgr_put` — Put an FPGA manager	60	* fpga_mgr_put() — Put an FPGA manager
61		61
62	The FPGA region will need to specify which bridges to control while programming	62	The FPGA region will need to specify which bridges to control while programming
63	the FPGA. The region driver can build a list of bridges during probe time	63	the FPGA. The region driver can build a list of bridges during probe time
@@ -66,11 +66,11 @@ the list of bridges to program just before programming · 2 unmodified lines
66	(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the	66	(:c:member:`fpga_region->get_bridges`). The FPGA bridge framework supplies the
67	following APIs to handle building or tearing down that list.	67	following APIs to handle building or tearing down that list.
68		68
69	* :c:func:`fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a	69	* fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
70	list	70	list
71	* :c:func:`of_fpga_bridge_get_to_list` — Get a ref of an FPGA bridge, add it to a	71	* of_fpga_bridge_get_to_list() — Get a ref of an FPGA bridge, add it to a
72	list, given a device node	72	list, given a device node
73	* :c:func:`fpga_bridges_put` — Given a list of bridges, put them	73	* fpga_bridges_put() — Given a list of bridges, put them
74		74
75	.. kernel-doc:: include/linux/fpga/fpga-region.h	75	.. kernel-doc:: include/linux/fpga/fpga-region.h
76	:functions: fpga_region	76	:functions: fpga_region

Documentation/driver-api/iio/core.rst+8−8

@@ -11,10 +11,10 @@ Industrial I/O Devices · 10 unmodified lines
11	----------------------	11	----------------------
12		12
13	* struct :c:type:`iio_dev` - industrial I/O device	13	* struct :c:type:`iio_dev` - industrial I/O device
14	* :c:func:`iio_device_alloc()` - allocate an :c:type:`iio_dev` from a driver	14	* iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15	* :c:func:`iio_device_free()` - free an :c:type:`iio_dev` from a driver	15	* iio_device_free() - free an :c:type:`iio_dev` from a driver
16	* :c:func:`iio_device_register()` - register a device with the IIO subsystem	16	* iio_device_register() - register a device with the IIO subsystem
17	* :c:func:`iio_device_unregister()` - unregister a device from the IIO	17	* iio_device_unregister() - unregister a device from the IIO
18	subsystem	18	subsystem
19		19
20	An IIO device usually corresponds to a single hardware sensor and it	20	An IIO device usually corresponds to a single hardware sensor and it
@@ -34,17 +34,17 @@ A typical IIO driver will register itself as an :doc:`I2C <../i2c>` or · 13 unmodified lines
34		34
35	At probe:	35	At probe:
36		36
37	1. Call :c:func:`iio_device_alloc()`, which allocates memory for an IIO device.	37	1. Call iio_device_alloc(), which allocates memory for an IIO device.
38	2. Initialize IIO device fields with driver specific information (e.g.	38	2. Initialize IIO device fields with driver specific information (e.g.
39	device name, device channels).	39	device name, device channels).
40	3. Call :c:func:`iio_device_register()`, this registers the device with the	40	3. Call iio_device_register(), this registers the device with the
41	IIO core. After this call the device is ready to accept requests from user	41	IIO core. After this call the device is ready to accept requests from user
42	space applications.	42	space applications.
43		43
44	At remove, we free the resources allocated in probe in reverse order:	44	At remove, we free the resources allocated in probe in reverse order:
45		45
46	1. :c:func:`iio_device_unregister()`, unregister the device from the IIO core.	46	1. iio_device_unregister(), unregister the device from the IIO core.
47	2. :c:func:`iio_device_free()`, free the memory allocated for the IIO device.	47	2. iio_device_free(), free the memory allocated for the IIO device.
48		48
49	IIO device sysfs interface	49	IIO device sysfs interface
50	==========================	50	==========================

Documentation/fault-injection/nvme-fault-injection.rst+1−1

@@ -3,7 +3,7 @@ NVMe Fault Injection · 2 unmodified lines
3	Linux's fault injection framework provides a systematic way to support	3	Linux's fault injection framework provides a systematic way to support
4	error injection via debugfs in the /sys/kernel/debug directory. When	4	error injection via debugfs in the /sys/kernel/debug directory. When
5	enabled, the default NVME_SC_INVALID_OPCODE with no retry will be	5	enabled, the default NVME_SC_INVALID_OPCODE with no retry will be
6	injected into the nvme_end_request. Users can change the default status	6	injected into the nvme_try_complete_req. Users can change the default status
7	code and no retry flag via the debugfs. The list of Generic Command	7	code and no retry flag via the debugfs. The list of Generic Command
8	Status can be found in include/linux/nvme.h	8	Status can be found in include/linux/nvme.h
9		9

Documentation/filesystems/affs.rst+10−6

   - R maps to r for user, group and others. On directories, R implies x.
-  - If both W and D are allowed, w will be set.
+  - W maps to w.
   - E maps to x.
-  - H and P are always retained and ignored under Linux.
+  - D is ignored.
-  - A is always reset when a file is written to.
+  - H, S and P are always retained and ignored under Linux.
+  - A is cleared when a file is written to.
 User id and group id will be used unless set[gu]id are given as mount
 options. Since most of the Amiga file systems are single user systems
 The Linux rwxrwxrwx file mode is handled as follows:
-  - r permission will set R for user, group and others.
+  - r permission will allow R for user, group and others.
+  - w permission will allow W for user, group and others.
-  - w permission will set W and D for user, group and others.
+  - x permission of the user will allow E for plain files.
-  - x permission of the user will set E for plain files.
+  - D will be allowed for user, group and others.
   - All other flags (suid, sgid, ...) are ignored and will
     not be retained.

Documentation/hwmon/abituguru-datasheet.rst+3−3

Documentation/hwmon/abituguru.rst+2−2

Documentation/hwmon/abituguru3.rst+2−2

@@ -13,7 +13,7 @@ Supported chips: · 12 unmodified lines
13	Note:	13	Note:
14	The uGuru is a microcontroller with onboard firmware which programs	14	The uGuru is a microcontroller with onboard firmware which programs
15	it to behave as a hwmon IC. There are many different revisions of the	15	it to behave as a hwmon IC. There are many different revisions of the
16	firmware and thus effectivly many different revisions of the uGuru.	16	firmware and thus effectively many different revisions of the uGuru.
17	Below is an incomplete list with which revisions are used for which	17	Below is an incomplete list with which revisions are used for which
18	Motherboards:	18	Motherboards:
19		19
@@ -24,7 +24,7 @@ Supported chips: · 4 unmodified lines
24	- uGuru 3.0.0.0 ~ 3.0.x.x (AW8, AL8, AT8, NI8 SLI, AT8 32X, AN8 32X,	24	- uGuru 3.0.0.0 ~ 3.0.x.x (AW8, AL8, AT8, NI8 SLI, AT8 32X, AN8 32X,
25	AW9D-MAX)	25	AW9D-MAX)
26		26
27	The abituguru3 driver is only for revison 3.0.x.x motherboards,	27	The abituguru3 driver is only for revision 3.0.x.x motherboards,
28	this driver will not work on older motherboards. For older	28	this driver will not work on older motherboards. For older
29	motherboards use the abituguru (without the 3 !) driver.	29	motherboards use the abituguru (without the 3 !) driver.
30		30

Documentation/kbuild/llvm.rst+13−13

@@ -23,8 +23,8 @@ supports C and the GNU C extensions required by the kernel, and is pronounced · 22 unmodified lines
23	Clang	23	Clang
24	-----	24	-----
25		25
26	The compiler used can be swapped out via `CC=` command line argument to `make`.	26	The compiler used can be swapped out via ``CC=`` command line argument to ``make``.
27	`CC=` should be set when selecting a config and during a build.	27	``CC=`` should be set when selecting a config and during a build. ::
28		28
29	make CC=clang defconfig	29	make CC=clang defconfig
30		30
@@ -34,33 +34,33 @@ Cross Compiling · 3 unmodified lines
34	---------------	34	---------------
35		35
36	A single Clang compiler binary will typically contain all supported backends,	36	A single Clang compiler binary will typically contain all supported backends,
37	which can help simplify cross compiling.	37	which can help simplify cross compiling. ::
38		38
39	ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang	39	ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- make CC=clang
40		40
41	`CROSS_COMPILE` is not used to prefix the Clang compiler binary, instead	41	``CROSS_COMPILE`` is not used to prefix the Clang compiler binary, instead
42	`CROSS_COMPILE` is used to set a command line flag: `--target <triple>`. For	42	``CROSS_COMPILE`` is used to set a command line flag: ``--target <triple>``. For
43	example:	43	example: ::
44		44
45	clang --target aarch64-linux-gnu foo.c	45	clang --target aarch64-linux-gnu foo.c
46		46
47	LLVM Utilities	47	LLVM Utilities
48	--------------	48	--------------
49		49
50	LLVM has substitutes for GNU binutils utilities. Kbuild supports `LLVM=1`	50	LLVM has substitutes for GNU binutils utilities. Kbuild supports ``LLVM=1``
51	to enable them.	51	to enable them. ::
52		52
53	make LLVM=1	53	make LLVM=1
54		54
55	They can be enabled individually. The full list of the parameters:	55	They can be enabled individually. The full list of the parameters: ::
56		56
57	make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \\	57	make CC=clang LD=ld.lld AR=llvm-ar NM=llvm-nm STRIP=llvm-strip \
58	OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \\	58	OBJCOPY=llvm-objcopy OBJDUMP=llvm-objdump OBJSIZE=llvm-size \
59	READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \\	59	READELF=llvm-readelf HOSTCC=clang HOSTCXX=clang++ HOSTAR=llvm-ar \
60	HOSTLD=ld.lld	60	HOSTLD=ld.lld
61		61
62	Currently, the integrated assembler is disabled by default. You can pass	62	Currently, the integrated assembler is disabled by default. You can pass
63	`LLVM_IAS=1` to enable it.	63	``LLVM_IAS=1`` to enable it.
64		64
65	Getting Help	65	Getting Help
66	------------	66	------------

Documentation/kbuild/makefiles.rst+9−9

@@ -16,7 +16,7 @@ This document describes the Linux kernel Makefiles. · 15 unmodified lines
16	--- 3.5 Library file goals - lib-y	16	--- 3.5 Library file goals - lib-y
17	--- 3.6 Descending down in directories	17	--- 3.6 Descending down in directories
18	--- 3.7 Compilation flags	18	--- 3.7 Compilation flags
19	--- 3.8 Command line dependency	19	--- 3.8 <deleted>
20	--- 3.9 Dependency tracking	20	--- 3.9 Dependency tracking
21	--- 3.10 Special Rules	21	--- 3.10 Special Rules
22	--- 3.11 $(CC) support functions	22	--- 3.11 $(CC) support functions
@@ -39,8 +39,8 @@ This document describes the Linux kernel Makefiles. · 16 unmodified lines
39		39
40	=== 7 Architecture Makefiles	40	=== 7 Architecture Makefiles
41	--- 7.1 Set variables to tweak the build to the architecture	41	--- 7.1 Set variables to tweak the build to the architecture
42	--- 7.2 Add prerequisites to archheaders:	42	--- 7.2 Add prerequisites to archheaders
43	--- 7.3 Add prerequisites to archprepare:	43	--- 7.3 Add prerequisites to archprepare
44	--- 7.4 List directories to visit when descending	44	--- 7.4 List directories to visit when descending
45	--- 7.5 Architecture-specific boot images	45	--- 7.5 Architecture-specific boot images
46	--- 7.6 Building non-kbuild targets	46	--- 7.6 Building non-kbuild targets
@@ -129,7 +129,7 @@ The preferred name for the kbuild files are 'Makefile' but 'Kbuild' can · 82 unmodified lines
129	be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'	129	be used and if both a 'Makefile' and a 'Kbuild' file exists, then the 'Kbuild'
130	file will be used.	130	file will be used.
131		131
132	Section 3.1 "Goal definitions" is a quick intro, further chapters provide	132	Section 3.1 "Goal definitions" is a quick intro; further chapters provide
133	more details, with real examples.	133	more details, with real examples.
134		134
135	3.1 Goal definitions	135	3.1 Goal definitions
@@ -965,7 +965,7 @@ When kbuild executes, the following steps are followed (roughly): · 829 unmodified lines
965	KBUILD_LDFLAGS := -m elf_s390	965	KBUILD_LDFLAGS := -m elf_s390
966		966
967	Note: ldflags-y can be used to further customise	967	Note: ldflags-y can be used to further customise
968	the flags used. See chapter 3.7.	968	the flags used. See section 3.7.
969		969
970	LDFLAGS_vmlinux	970	LDFLAGS_vmlinux
971	Options for $(LD) when linking vmlinux	971	Options for $(LD) when linking vmlinux
@@ -1121,7 +1121,7 @@ When kbuild executes, the following steps are followed (roughly): · 149 unmodified lines
1121		1121
1122	In this example, the file target maketools will be processed	1122	In this example, the file target maketools will be processed
1123	before descending down in the subdirectories.	1123	before descending down in the subdirectories.
1124	See also chapter XXX-TODO that describe how kbuild supports	1124	See also chapter XXX-TODO that describes how kbuild supports
1125	generating offset header files.	1125	generating offset header files.
1126		1126
1127		1127
@@ -1261,7 +1261,7 @@ When kbuild executes, the following steps are followed (roughly): · 133 unmodified lines
1261	always be built.	1261	always be built.
1262	Assignments to $(targets) are without $(obj)/ prefix.	1262	Assignments to $(targets) are without $(obj)/ prefix.
1263	if_changed may be used in conjunction with custom commands as	1263	if_changed may be used in conjunction with custom commands as
1264	defined in 6.8 "Custom kbuild commands".	1264	defined in 7.8 "Custom kbuild commands".
1265		1265
1266	Note: It is a typical mistake to forget the FORCE prerequisite.	1266	Note: It is a typical mistake to forget the FORCE prerequisite.
1267	Another common pitfall is that whitespace is sometimes	1267	Another common pitfall is that whitespace is sometimes
@@ -1411,7 +1411,7 @@ When kbuild executes, the following steps are followed (roughly): · 143 unmodified lines
1411	that may be shared between individual architectures.	1411	that may be shared between individual architectures.
1412	The recommended approach how to use a generic header file is	1412	The recommended approach how to use a generic header file is
1413	to list the file in the Kbuild file.	1413	to list the file in the Kbuild file.
1414	See "7.2 generic-y" for further info on syntax etc.	1414	See "8.2 generic-y" for further info on syntax etc.
1415		1415
1416	7.11 Post-link pass	1416	7.11 Post-link pass
1417	-------------------	1417	-------------------
@@ -1601,4 +1601,4 @@ is the right choice. · 183 unmodified lines
1601		1601
1602	- Describe how kbuild supports shipped files with _shipped.	1602	- Describe how kbuild supports shipped files with _shipped.
1603	- Generating offset header files.	1603	- Generating offset header files.
1604	- Add more variables to section 7?	1604	- Add more variables to chapters 7 or 9?

Documentation/locking/locktypes.rst+12−12

@@ -164,14 +164,14 @@ by disabling preemption or interrupts. · 163 unmodified lines
164	On non-PREEMPT_RT kernels local_lock operations map to the preemption and	164	On non-PREEMPT_RT kernels local_lock operations map to the preemption and
165	interrupt disabling and enabling primitives:	165	interrupt disabling and enabling primitives:
166		166
167	=========================== ======================	167	=============================== ======================
168	local_lock(&llock) preempt_disable()	168	local_lock(&llock) preempt_disable()
169	local_unlock(&llock) preempt_enable()	169	local_unlock(&llock) preempt_enable()
170	local_lock_irq(&llock) local_irq_disable()	170	local_lock_irq(&llock) local_irq_disable()
171	local_unlock_irq(&llock) local_irq_enable()	171	local_unlock_irq(&llock) local_irq_enable()
172	local_lock_save(&llock) local_irq_save()	172	local_lock_irqsave(&llock) local_irq_save()
173	local_lock_restore(&llock) local_irq_save()	173	local_unlock_irqrestore(&llock) local_irq_restore()
174	=========================== ======================	174	=============================== ======================
175		175
176	The named scope of local_lock has two advantages over the regular	176	The named scope of local_lock has two advantages over the regular
177	primitives:	177	primitives:
@@ -353,14 +353,14 @@ protection scope. So the following substitution is wrong:: · 175 unmodified lines
353	{	353	{
354	local_irq_save(flags); -> local_lock_irqsave(&local_lock_1, flags);	354	local_irq_save(flags); -> local_lock_irqsave(&local_lock_1, flags);
355	func3();	355	func3();
356	local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_1, flags);	356	local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_1, flags);
357	}	357	}
358		358
359	func2()	359	func2()
360	{	360	{
361	local_irq_save(flags); -> local_lock_irqsave(&local_lock_2, flags);	361	local_irq_save(flags); -> local_lock_irqsave(&local_lock_2, flags);
362	func3();	362	func3();
363	local_irq_restore(flags); -> local_lock_irqrestore(&local_lock_2, flags);	363	local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock_2, flags);
364	}	364	}
365		365
366	func3()	366	func3()
@@ -379,14 +379,14 @@ PREEMPT_RT-specific semantics of spinlock_t. The correct substitution is:: · 12 unmodified lines
379	{	379	{
380	local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);	380	local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
381	func3();	381	func3();
382	local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);	382	local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
383	}	383	}
384		384
385	func2()	385	func2()
386	{	386	{
387	local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);	387	local_irq_save(flags); -> local_lock_irqsave(&local_lock, flags);
388	func3();	388	func3();
389	local_irq_restore(flags); -> local_lock_irqrestore(&local_lock, flags);	389	local_irq_restore(flags); -> local_unlock_irqrestore(&local_lock, flags);
390	}	390	}
391		391
392	func3()	392	func3()

Documentation/maintainer/maintainer-entry-profile.rst+1−0

@@ -101,3 +101,4 @@ to do something different in the near future. · 100 unmodified lines
101		101
102	../doc-guide/maintainer-profile	102	../doc-guide/maintainer-profile
103	../nvdimm/maintainer-entry-profile	103	../nvdimm/maintainer-entry-profile
		104	../riscv/patch-acceptance

Documentation/networking/dsa/configuration.rst+1−1

@@ -180,7 +180,7 @@ The configuration can only be set up via VLAN tagging and bridge setup. · 179 unmodified lines
180		180
181	# bring up the slave interfaces	181	# bring up the slave interfaces
182	ip link set lan1 up	182	ip link set lan1 up
183	ip link set lan1 up	183	ip link set lan2 up
184	ip link set lan3 up	184	ip link set lan3 up
185		185
186	# create bridge	186	# create bridge

Documentation/powerpc/syscall64-abi.rst+3−1

 Register preservation rules match the ELF ABI calling sequence with the
 following differences:
-=========== ============= ========================================
 --- For the sc instruction, differences with the ELF ABI ---
+=========== ============= ========================================
 r0          Volatile      (System call number.)
 r3          Volatile      (Parameter 1, and return value.)
 r4-r8       Volatile      (Parameters 2-6.)
 cr0         Volatile      (cr0.SO is the return error condition.)
 cr1, cr5-7  Nonvolatile
 lr          Nonvolatile
+=========== ============= ========================================
 --- For the scv 0 instruction, differences with the ELF ABI ---
+=========== ============= ========================================
 r0          Volatile      (System call number.)
 r3          Volatile      (Parameter 1, and return value.)
 r4-r8       Volatile      (Parameters 2-6.)

Documentation/process/deprecated.rst+1−1

@@ -142,7 +142,7 @@ only NUL-terminated strings. The safe replacement is strscpy(). · 141 unmodified lines
142	(Users of strscpy() still needing NUL-padding should instead	142	(Users of strscpy() still needing NUL-padding should instead
143	use strscpy_pad().)	143	use strscpy_pad().)
144		144
145	If a caller is using non-NUL-terminated strings, strncpy()() can	145	If a caller is using non-NUL-terminated strings, strncpy() can
146	still be used, but destinations should be marked with the `__nonstring	146	still be used, but destinations should be marked with the `__nonstring
147	<https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_	147	<https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
148	attribute to avoid future compiler warnings.	148	attribute to avoid future compiler warnings.

Documentation/sound/cards/audigy-mixer.rst+1−1

@@ -332,7 +332,7 @@ WO 9901953 (A1) · 331 unmodified lines
332		332
333		333
334	US Patents (https://www.uspto.gov/)	334	US Patents (https://www.uspto.gov/)
335	----------------------------------	335	-----------------------------------
336		336
337	US 5925841	337	US 5925841
338	Digital Sampling Instrument employing cache memory (Jul. 20, 1999)	338	Digital Sampling Instrument employing cache memory (Jul. 20, 1999)

Documentation/sound/cards/sb-live-mixer.rst+1−1

@@ -337,7 +337,7 @@ WO 9901953 (A1) · 336 unmodified lines
337		337
338		338
339	US Patents (https://www.uspto.gov/)	339	US Patents (https://www.uspto.gov/)
340	----------------------------------	340	-----------------------------------
341		341
342	US 5925841	342	US 5925841
343	Digital Sampling Instrument employing cache memory (Jul. 20, 1999)	343	Digital Sampling Instrument employing cache memory (Jul. 20, 1999)

Documentation/sound/designs/timestamping.rst+1−1

@@ -143,7 +143,7 @@ timestamp shows when the information is put together by the driver · 142 unmodified lines
143	before returning from the ``STATUS`` and ``STATUS_EXT`` ioctl. in most cases	143	before returning from the ``STATUS`` and ``STATUS_EXT`` ioctl. in most cases
144	this driver_timestamp will be identical to the regular system tstamp.	144	this driver_timestamp will be identical to the regular system tstamp.
145		145
146	Examples of typestamping with HDaudio:	146	Examples of timestamping with HDAudio:
147		147
148	1. DMA timestamp, no compensation for DMA+analog delay	148	1. DMA timestamp, no compensation for DMA+analog delay
149	::	149	::

Documentation/translations/it_IT/process/deprecated.rst+1−1

@@ -130,7 +130,7 @@ chi usa solo stringe terminate. La versione sicura da usare è · 129 unmodified lines
130	strscpy(). (chi usa strscpy() e necessita di estendere la	130	strscpy(). (chi usa strscpy() e necessita di estendere la
131	terminazione con NUL deve aggiungere una chiamata a memset())	131	terminazione con NUL deve aggiungere una chiamata a memset())
132		132
133	Se il chiamate no usa stringhe terminate con NUL, allore strncpy()()	133	Se il chiamate no usa stringhe terminate con NUL, allore strncpy()
134	può continuare ad essere usata, ma i buffer di destinazione devono essere	134	può continuare ad essere usata, ma i buffer di destinazione devono essere
135	marchiati con l'attributo `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_	135	marchiati con l'attributo `__nonstring <https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html>`_
136	per evitare avvisi durante la compilazione.	136	per evitare avvisi durante la compilazione.

MAINTAINERS+53−21

@@ -1694,7 +1694,6 @@ F: arch/arm/mach-cns3xxx/ · 1693 unmodified lines
1694		1694
1695	ARM/CAVIUM THUNDER NETWORK DRIVER	1695	ARM/CAVIUM THUNDER NETWORK DRIVER
1696	M: Sunil Goutham <sgoutham@marvell.com>	1696	M: Sunil Goutham <sgoutham@marvell.com>
1697	M: Robert Richter <rrichter@marvell.com>
1698	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	1697	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1699	S: Supported	1698	S: Supported
1700	F: drivers/net/ethernet/cavium/thunder/	1699	F: drivers/net/ethernet/cavium/thunder/
@@ -3205,6 +3204,7 @@ S: Maintained · 1504 unmodified lines
3205	T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git	3204	T: git git://git.kernel.org/pub/scm/linux/kernel/git/axboe/linux-block.git
3206	F: block/	3205	F: block/
3207	F: drivers/block/	3206	F: drivers/block/
		3207	F: include/linux/blk*
3208	F: kernel/trace/blktrace.c	3208	F: kernel/trace/blktrace.c
3209	F: lib/sbitmap.c	3209	F: lib/sbitmap.c
3210		3210
@@ -3388,6 +3388,7 @@ M: Florian Fainelli <f.fainelli@gmail.com> · 177 unmodified lines
3388	L: netdev@vger.kernel.org	3388	L: netdev@vger.kernel.org
3389	L: openwrt-devel@lists.openwrt.org (subscribers-only)	3389	L: openwrt-devel@lists.openwrt.org (subscribers-only)
3390	S: Supported	3390	S: Supported
		3391	F: Documentation/devicetree/bindings/net/dsa/b53.txt
3391	F: drivers/net/dsa/b53/*	3392	F: drivers/net/dsa/b53/*
3392	F: include/linux/platform_data/b53.h	3393	F: include/linux/platform_data/b53.h
3393		3394
@@ -3573,13 +3574,28 @@ L: bcm-kernel-feedback-list@broadcom.com · 179 unmodified lines
3573	S: Maintained	3574	S: Maintained
3574	F: drivers/phy/broadcom/phy-brcm-usb*	3575	F: drivers/phy/broadcom/phy-brcm-usb*
3575		3576
		3577	BROADCOM ETHERNET PHY DRIVERS
		3578	M: Florian Fainelli <f.fainelli@gmail.com>
		3579	L: bcm-kernel-feedback-list@broadcom.com
		3580	L: netdev@vger.kernel.org
		3581	S: Supported
		3582	F: Documentation/devicetree/bindings/net/broadcom-bcm87xx.txt
		3583	F: drivers/net/phy/bcm*.[ch]
		3584	F: drivers/net/phy/broadcom.c
		3585	F: include/linux/brcmphy.h
		3586
3576	BROADCOM GENET ETHERNET DRIVER	3587	BROADCOM GENET ETHERNET DRIVER
3577	M: Doug Berger <opendmb@gmail.com>	3588	M: Doug Berger <opendmb@gmail.com>
3578	M: Florian Fainelli <f.fainelli@gmail.com>	3589	M: Florian Fainelli <f.fainelli@gmail.com>
3579	L: bcm-kernel-feedback-list@broadcom.com	3590	L: bcm-kernel-feedback-list@broadcom.com
3580	L: netdev@vger.kernel.org	3591	L: netdev@vger.kernel.org
3581	S: Supported	3592	S: Supported
		3593	F: Documentation/devicetree/bindings/net/brcm,bcmgenet.txt
		3594	F: Documentation/devicetree/bindings/net/brcm,unimac-mdio.txt
3582	F: drivers/net/ethernet/broadcom/genet/	3595	F: drivers/net/ethernet/broadcom/genet/
		3596	F: drivers/net/mdio/mdio-bcm-unimac.c
		3597	F: include/linux/platform_data/bcmgenet.h
		3598	F: include/linux/platform_data/mdio-bcm-unimac.h
3583		3599
3584	BROADCOM IPROC ARM ARCHITECTURE	3600	BROADCOM IPROC ARM ARCHITECTURE
3585	M: Ray Jui <rjui@broadcom.com>	3601	M: Ray Jui <rjui@broadcom.com>
@@ -3931,8 +3947,8 @@ W: https://wireless.wiki.kernel.org/en/users/Drivers/carl9170 · 345 unmodified lines
3931	F: drivers/net/wireless/ath/carl9170/	3947	F: drivers/net/wireless/ath/carl9170/
3932		3948
3933	CAVIUM I2C DRIVER	3949	CAVIUM I2C DRIVER
3934	M: Robert Richter <rrichter@marvell.com>	3950	M: Robert Richter <rric@kernel.org>
3935	S: Supported	3951	S: Odd Fixes
3936	W: http://www.marvell.com	3952	W: http://www.marvell.com
3937	F: drivers/i2c/busses/i2c-octeon*	3953	F: drivers/i2c/busses/i2c-octeon*
3938	F: drivers/i2c/busses/i2c-thunderx*	3954	F: drivers/i2c/busses/i2c-thunderx*
@@ -3947,8 +3963,8 @@ W: http://www.marvell.com · 8 unmodified lines
3947	F: drivers/net/ethernet/cavium/liquidio/	3963	F: drivers/net/ethernet/cavium/liquidio/
3948		3964
3949	CAVIUM MMC DRIVER	3965	CAVIUM MMC DRIVER
3950	M: Robert Richter <rrichter@marvell.com>	3966	M: Robert Richter <rric@kernel.org>
3951	S: Supported	3967	S: Odd Fixes
3952	W: http://www.marvell.com	3968	W: http://www.marvell.com
3953	F: drivers/mmc/host/cavium*	3969	F: drivers/mmc/host/cavium*
3954		3970
@@ -3960,9 +3976,9 @@ W: http://www.marvell.com · 5 unmodified lines
3960	F: drivers/crypto/cavium/cpt/	3976	F: drivers/crypto/cavium/cpt/
3961		3977
3962	CAVIUM THUNDERX2 ARM64 SOC	3978	CAVIUM THUNDERX2 ARM64 SOC
3963	M: Robert Richter <rrichter@marvell.com>	3979	M: Robert Richter <rric@kernel.org>
3964	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	3980	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
3965	S: Maintained	3981	S: Odd Fixes
3966	F: Documentation/devicetree/bindings/arm/cavium-thunder2.txt	3982	F: Documentation/devicetree/bindings/arm/cavium-thunder2.txt
3967	F: arch/arm64/boot/dts/cavium/thunder2-99xx*	3983	F: arch/arm64/boot/dts/cavium/thunder2-99xx*
3968		3984
@@ -4241,6 +4257,8 @@ S: Maintained · 272 unmodified lines
4241	F: .clang-format	4257	F: .clang-format
4242		4258
4243	CLANG/LLVM BUILD SUPPORT	4259	CLANG/LLVM BUILD SUPPORT
		4260	M: Nathan Chancellor <natechancellor@gmail.com>
		4261	M: Nick Desaulniers <ndesaulniers@google.com>
4244	L: clang-built-linux@googlegroups.com	4262	L: clang-built-linux@googlegroups.com
4245	S: Supported	4263	S: Supported
4246	W: https://clangbuiltlinux.github.io/	4264	W: https://clangbuiltlinux.github.io/
@@ -5239,6 +5257,7 @@ DOCUMENTATION · 992 unmodified lines
5239	M: Jonathan Corbet <corbet@lwn.net>	5257	M: Jonathan Corbet <corbet@lwn.net>
5240	L: linux-doc@vger.kernel.org	5258	L: linux-doc@vger.kernel.org
5241	S: Maintained	5259	S: Maintained
		5260	P: Documentation/doc-guide/maintainer-profile.rst
5242	T: git git://git.lwn.net/linux.git docs-next	5261	T: git git://git.lwn.net/linux.git docs-next
5243	F: Documentation/	5262	F: Documentation/
5244	F: scripts/documentation-file-ref-check	5263	F: scripts/documentation-file-ref-check
@@ -6180,16 +6199,15 @@ F: drivers/edac/highbank* · 935 unmodified lines
6180		6199
6181	EDAC-CAVIUM OCTEON	6200	EDAC-CAVIUM OCTEON
6182	M: Ralf Baechle <ralf@linux-mips.org>	6201	M: Ralf Baechle <ralf@linux-mips.org>
6183	M: Robert Richter <rrichter@marvell.com>
6184	L: linux-edac@vger.kernel.org	6202	L: linux-edac@vger.kernel.org
6185	L: linux-mips@vger.kernel.org	6203	L: linux-mips@vger.kernel.org
6186	S: Supported	6204	S: Supported
6187	F: drivers/edac/octeon_edac*	6205	F: drivers/edac/octeon_edac*
6188		6206
6189	EDAC-CAVIUM THUNDERX	6207	EDAC-CAVIUM THUNDERX
6190	M: Robert Richter <rrichter@marvell.com>	6208	M: Robert Richter <rric@kernel.org>
6191	L: linux-edac@vger.kernel.org	6209	L: linux-edac@vger.kernel.org
6192	S: Supported	6210	S: Odd Fixes
6193	F: drivers/edac/thunderx_edac*	6211	F: drivers/edac/thunderx_edac*
6194		6212
6195	EDAC-CORE	6213	EDAC-CORE
@@ -6197,7 +6215,7 @@ M: Borislav Petkov <bp@alien8.de> · 1 unmodified line
6197	M: Mauro Carvalho Chehab <mchehab@kernel.org>	6215	M: Mauro Carvalho Chehab <mchehab@kernel.org>
6198	M: Tony Luck <tony.luck@intel.com>	6216	M: Tony Luck <tony.luck@intel.com>
6199	R: James Morse <james.morse@arm.com>	6217	R: James Morse <james.morse@arm.com>
6200	R: Robert Richter <rrichter@marvell.com>	6218	R: Robert Richter <rric@kernel.org>
6201	L: linux-edac@vger.kernel.org	6219	L: linux-edac@vger.kernel.org
6202	S: Supported	6220	S: Supported
6203	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next	6221	T: git git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras.git edac-for-next
@@ -6501,7 +6519,6 @@ F: net/bridge/ · 297 unmodified lines
6501		6519
6502	ETHERNET PHY LIBRARY	6520	ETHERNET PHY LIBRARY
6503	M: Andrew Lunn <andrew@lunn.ch>	6521	M: Andrew Lunn <andrew@lunn.ch>
6504	M: Florian Fainelli <f.fainelli@gmail.com>
6505	M: Heiner Kallweit <hkallweit1@gmail.com>	6522	M: Heiner Kallweit <hkallweit1@gmail.com>
6506	R: Russell King <linux@armlinux.org.uk>	6523	R: Russell King <linux@armlinux.org.uk>
6507	L: netdev@vger.kernel.org	6524	L: netdev@vger.kernel.org
@@ -8262,7 +8279,7 @@ IA64 (Itanium) PLATFORM · 1754 unmodified lines
8262	M: Tony Luck <tony.luck@intel.com>	8279	M: Tony Luck <tony.luck@intel.com>
8263	M: Fenghua Yu <fenghua.yu@intel.com>	8280	M: Fenghua Yu <fenghua.yu@intel.com>
8264	L: linux-ia64@vger.kernel.org	8281	L: linux-ia64@vger.kernel.org
8265	S: Maintained	8282	S: Odd Fixes
8266	T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git	8283	T: git git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git
8267	F: Documentation/ia64/	8284	F: Documentation/ia64/
8268	F: arch/ia64/	8285	F: arch/ia64/
@@ -13436,10 +13453,10 @@ F: Documentation/devicetree/bindings/pci/axis,artpec* · 5167 unmodified lines
13436	F: drivers/pci/controller/dwc/artpec	13453	F: drivers/pci/controller/dwc/artpec
13437		13454
13438	PCIE DRIVER FOR CAVIUM THUNDERX	13455	PCIE DRIVER FOR CAVIUM THUNDERX
13439	M: Robert Richter <rrichter@marvell.com>	13456	M: Robert Richter <rric@kernel.org>
13440	L: linux-pci@vger.kernel.org	13457	L: linux-pci@vger.kernel.org
13441	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	13458	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
13442	S: Supported	13459	S: Odd Fixes
13443	F: drivers/pci/controller/pci-thunder-*	13460	F: drivers/pci/controller/pci-thunder-*
13444		13461
13445	PCIE DRIVER FOR HISILICON	13462	PCIE DRIVER FOR HISILICON
@@ -13576,12 +13593,18 @@ F: kernel/events/* · 130 unmodified lines
13576	F: tools/lib/perf/	13593	F: tools/lib/perf/
13577	F: tools/perf/	13594	F: tools/perf/
13578		13595
13579	PERFORMANCE EVENTS SUBSYSTEM ARM64 PMU EVENTS	13596	PERFORMANCE EVENTS TOOLING ARM64
13580	R: John Garry <john.garry@huawei.com>	13597	R: John Garry <john.garry@huawei.com>
13581	R: Will Deacon <will@kernel.org>	13598	R: Will Deacon <will@kernel.org>
		13599	R: Mathieu Poirier <mathieu.poirier@linaro.org>
		13600	R: Leo Yan <leo.yan@linaro.org>
13582	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)	13601	L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
13583	S: Supported	13602	S: Supported
		13603	F: tools/build/feature/test-libopencsd.c
		13604	F: tools/perf/arch/arm*/
13584	F: tools/perf/pmu-events/arch/arm64/	13605	F: tools/perf/pmu-events/arch/arm64/
		13606	F: tools/perf/util/arm-spe*
		13607	F: tools/perf/util/cs-etm*
13585		13608
13586	PERSONALITY HANDLING	13609	PERSONALITY HANDLING
13587	M: Christoph Hellwig <hch@infradead.org>	13610	M: Christoph Hellwig <hch@infradead.org>
@@ -14372,7 +14395,7 @@ M: Rob Clark <robdclark@gmail.com> · 784 unmodified lines
14372	L: iommu@lists.linux-foundation.org	14395	L: iommu@lists.linux-foundation.org
14373	L: linux-arm-msm@vger.kernel.org	14396	L: linux-arm-msm@vger.kernel.org
14374	S: Maintained	14397	S: Maintained
14375	F: drivers/iommu/qcom_iommu.c	14398	F: drivers/iommu/arm/arm-smmu/qcom_iommu.c
14376		14399
14377	QUALCOMM IPCC MAILBOX DRIVER	14400	QUALCOMM IPCC MAILBOX DRIVER
14378	M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>	14401	M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
@@ -17123,8 +17146,8 @@ S: Maintained · 2744 unmodified lines
17123	F: Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml	17146	F: Documentation/devicetree/bindings/arm/keystone/ti,k3-sci-common.yaml
17124	F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt	17147	F: Documentation/devicetree/bindings/arm/keystone/ti,sci.txt
17125	F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt	17148	F: Documentation/devicetree/bindings/clock/ti,sci-clk.txt
17126	F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.txt	17149	F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-inta.yaml
17127	F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt	17150	F: Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml
17128	F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt	17151	F: Documentation/devicetree/bindings/reset/ti,sci-reset.txt
17129	F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt	17152	F: Documentation/devicetree/bindings/soc/ti/sci-pm-domain.txt
17130	F: drivers/clk/keystone/sci-clk.c	17153	F: drivers/clk/keystone/sci-clk.c
@@ -17221,8 +17244,8 @@ S: Maintained · 90 unmodified lines
17221	F: drivers/net/thunderbolt.c	17244	F: drivers/net/thunderbolt.c
17222		17245
17223	THUNDERX GPIO DRIVER	17246	THUNDERX GPIO DRIVER
17224	M: Robert Richter <rrichter@marvell.com>	17247	M: Robert Richter <rric@kernel.org>
17225	S: Maintained	17248	S: Odd Fixes
17226	F: drivers/gpio/gpio-thunderx.c	17249	F: drivers/gpio/gpio-thunderx.c
17227		17250
17228	TI AM437X VPFE DRIVER	17251	TI AM437X VPFE DRIVER
@@ -18881,6 +18904,15 @@ S: Maintained · 1652 unmodified lines
18881	T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core	18904	T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/core
18882	F: arch/x86/platform	18905	F: arch/x86/platform
18883		18906
		18907	X86 PLATFORM UV HPE SUPERDOME FLEX
		18908	M: Steve Wahl <steve.wahl@hpe.com>
		18909	R: Dimitri Sivanich <dimitri.sivanich@hpe.com>
		18910	R: Russ Anderson <russ.anderson@hpe.com>
		18911	S: Supported
		18912	F: arch/x86/include/asm/uv/
		18913	F: arch/x86/kernel/apic/x2apic_uv_x.c
		18914	F: arch/x86/platform/uv/
		18915
18884	X86 VDSO	18916	X86 VDSO
18885	M: Andy Lutomirski <luto@kernel.org>	18917	M: Andy Lutomirski <luto@kernel.org>
18886	L: linux-kernel@vger.kernel.org	18918	L: linux-kernel@vger.kernel.org

Makefile+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	VERSION = 5	2	VERSION = 5
3	PATCHLEVEL = 9	3	PATCHLEVEL = 9
4	SUBLEVEL = 0	4	SUBLEVEL = 0
5	EXTRAVERSION = -rc2	5	EXTRAVERSION = -rc4
6	NAME = Kleptomaniac Octopus	6	NAME = Kleptomaniac Octopus
7		7
8	# DOCUMENTATION	8	# DOCUMENTATION

arch/alpha/kernel/module.c+1−1

@@ -212,7 +212,7 @@ apply_relocate_add(Elf64_Shdr sechdrs, const char strtab, · 211 unmodified lines
212	STO_ALPHA_STD_GPLOAD)	212	STO_ALPHA_STD_GPLOAD)
213	/* Omit the prologue. */	213	/* Omit the prologue. */
214	value += 8;	214	value += 8;
215	/* FALLTHRU */	215	fallthrough;
216	case R_ALPHA_BRADDR:	216	case R_ALPHA_BRADDR:
217	value -= (u64)location + 4;	217	value -= (u64)location + 4;
218	if (value & 3)	218	if (value & 3)

arch/alpha/kernel/signal.c+1−1

@@ -453,7 +453,7 @@ syscall_restart(unsigned long r0, unsigned long r19, · 452 unmodified lines
453	regs->r0 = EINTR;	453	regs->r0 = EINTR;
454	break;	454	break;
455	}	455	}
456	/* fallthrough */	456	fallthrough;
457	case ERESTARTNOINTR:	457	case ERESTARTNOINTR:
458	regs->r0 = r0; /* reset v0 and a3 and replay syscall */	458	regs->r0 = r0; /* reset v0 and a3 and replay syscall */
459	regs->r19 = r19;	459	regs->r19 = r19;

arch/alpha/kernel/traps.c+2−2

@@ -883,7 +883,7 @@ do_entUnaUser(void __user * va, unsigned long opcode, · 882 unmodified lines
883		883
884	case 0x26: /* sts */	884	case 0x26: /* sts */
885	fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));	885	fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg));
886	/* FALLTHRU */	886	fallthrough;
887		887
888	case 0x2c: /* stl */	888	case 0x2c: /* stl */
889	__asm__ __volatile__(	889	__asm__ __volatile__(
@@ -911,7 +911,7 @@ do_entUnaUser(void __user * va, unsigned long opcode, · 21 unmodified lines
911		911
912	case 0x27: /* stt */	912	case 0x27: /* stt */
913	fake_reg = alpha_read_fp_reg(reg);	913	fake_reg = alpha_read_fp_reg(reg);
914	/* FALLTHRU */	914	fallthrough;
915		915
916	case 0x2d: /* stq */	916	case 0x2d: /* stq */
917	__asm__ __volatile__(	917	__asm__ __volatile__(

arch/arc/boot/dts/hsdk.dts+4−2

 	arcpct: pct {
 		compatible = "snps,archs-pct";
+		interrupt-parent = <&cpu_intc>;
+		interrupts = <20>;
 	};
 	/* TIMER0 with interrupt for clockevent */
 			reg = <0x8000 0x2000>;
 			interrupts = <10>;
 			interrupt-names = "macirq";
-			phy-mode = "rgmii";
+			phy-mode = "rgmii-id";
 			snps,pbl = <32>;
 			snps,multicast-filter-bins = <256>;
 			clocks = <&gmacclk>;
 				#address-cells = <1>;
 				#size-cells = <0>;
 				compatible = "snps,dwmac-mdio";
-				phy0: ethernet-phy@0 {
+				phy0: ethernet-phy@0 { /* Micrel KSZ9031 */
 					reg = <0>;
 				};
 			};

arch/arc/include/asm/pgalloc.h+2−2

@@ -18,10 +18,10 @@ · 17 unmodified lines
18	* vineetg: April 2010	18	* vineetg: April 2010
19	* -Switched pgtable_t from being struct page * to unsigned long	19	* -Switched pgtable_t from being struct page * to unsigned long
20	* =Needed so that Page Table allocator (pte_alloc_one) is not forced to	20	* =Needed so that Page Table allocator (pte_alloc_one) is not forced to
21	* to deal with struct page. Thay way in future we can make it allocate	21	* deal with struct page. That way in future we can make it allocate
22	* multiple PG Tbls in one Page Frame	22	* multiple PG Tbls in one Page Frame
23	* =sweet side effect is avoiding calls to ugly page_address( ) from the	23	* =sweet side effect is avoiding calls to ugly page_address( ) from the
24	* pg-tlb allocator sub-sys (pte_alloc_one, ptr_free, pmd_populate	24	* pg-tlb allocator sub-sys (pte_alloc_one, ptr_free, pmd_populate)
25	*	25	*
26	* Amit Bhor, Sameer Dhavale: Codito Technologies 2004	26	* Amit Bhor, Sameer Dhavale: Codito Technologies 2004
27	*/	27	*/

arch/arc/kernel/disasm.c+1−1

@@ -339,7 +339,7 @@ void __kprobes disasm_instr(unsigned long addr, struct disasm_state *state, · 338 unmodified lines
339		339
340	case op_LDWX_S: /* LDWX_S c, [b, u6] */	340	case op_LDWX_S: /* LDWX_S c, [b, u6] */
341	state->x = 1;	341	state->x = 1;
342	/* intentional fall-through */	342	fallthrough;
343		343
344	case op_LDW_S: /* LDW_S c, [b, u6] */	344	case op_LDW_S: /* LDW_S c, [b, u6] */
345	state->zz = 2;	345	state->zz = 2;

arch/arc/kernel/perf_event.c+4−10

@@ -562,7 +562,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev) · 561 unmodified lines
562	{	562	{
563	struct arc_reg_pct_build pct_bcr;	563	struct arc_reg_pct_build pct_bcr;
564	struct arc_reg_cc_build cc_bcr;	564	struct arc_reg_cc_build cc_bcr;
565	int i, has_interrupts;	565	int i, has_interrupts, irq;
566	int counter_size; /* in bits */	566	int counter_size; /* in bits */
567		567
568	union cc_name {	568	union cc_name {
@@ -637,13 +637,7 @@ static int arc_pmu_device_probe(struct platform_device *pdev) · 68 unmodified lines
637	.attr_groups = arc_pmu->attr_groups,	637	.attr_groups = arc_pmu->attr_groups,
638	};	638	};
639		639
640	if (has_interrupts) {	640	if (has_interrupts && (irq = platform_get_irq(pdev, 0) >= 0)) {
641	int irq = platform_get_irq(pdev, 0);
642
643	if (irq < 0) {
644	pr_err("Cannot get IRQ number for the platform\n");
645	return -ENODEV;
646	}
647		641
648	arc_pmu->irq = irq;	642	arc_pmu->irq = irq;
649		643
@@ -652,9 +646,9 @@ static int arc_pmu_device_probe(struct platform_device *pdev) · 2 unmodified lines
652	this_cpu_ptr(&arc_pmu_cpu));	646	this_cpu_ptr(&arc_pmu_cpu));
653		647
654	on_each_cpu(arc_cpu_pmu_irq_init, &irq, 1);	648	on_each_cpu(arc_cpu_pmu_irq_init, &irq, 1);
655		649	} else {
656	} else
657	arc_pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;	650	arc_pmu->pmu.capabilities \|= PERF_PMU_CAP_NO_INTERRUPT;
		651	}
658		652
659	/*	653	/*
660	* perf parser doesn't really like '-' symbol in events name, so let's	654	* perf parser doesn't really like '-' symbol in events name, so let's

arch/arc/kernel/signal.c+1−1

@@ -321,7 +321,7 @@ static void arc_restart_syscall(struct k_sigaction ka, struct pt_regs regs) · 320 unmodified lines
321	regs->r0 = -EINTR;	321	regs->r0 = -EINTR;
322	break;	322	break;
323	}	323	}
324	/* fallthrough */	324	fallthrough;
325		325
326	case -ERESTARTNOINTR:	326	case -ERESTARTNOINTR:
327	/*	327	/*

arch/arc/kernel/troubleshoot.c+30−47

@@ -18,44 +18,37 @@ · 17 unmodified lines
18		18
19	#define ARC_PATH_MAX 256	19	#define ARC_PATH_MAX 256
20		20
21	/*	21	static noinline void print_regs_scratch(struct pt_regs *regs)
22	* Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)
23	* -Prints 3 regs per line and a CR.
24	* -To continue, callee regs right after scratch, special handling of CR
25	*/
26	static noinline void print_reg_file(long *reg_rev, int start_num)
27	{	22	{
28	unsigned int i;	23	pr_cont("BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n",
29	char buf[512];	24	regs->bta, regs->sp, regs->fp, (void *)regs->blink);
30	int n = 0, len = sizeof(buf);	25	pr_cont("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
31		26	regs->lp_start, regs->lp_end, regs->lp_count);
32	for (i = start_num; i < start_num + 13; i++) {
33	n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t",
34	i, (unsigned long)*reg_rev);
35
36	if (((i + 1) % 3) == 0)
37	n += scnprintf(buf + n, len - n, "\n");
38
39	/* because pt_regs has regs reversed: r12..r0, r25..r13 */
40	if (is_isa_arcv2() && start_num == 0)
41	reg_rev++;
42	else
43	reg_rev--;
44	}
45
46	if (start_num != 0)
47	n += scnprintf(buf + n, len - n, "\n\n");
48		27
49	/* To continue printing callee regs on same line as scratch regs */	28	pr_info("r00: 0x%08lx\tr01: 0x%08lx\tr02: 0x%08lx\n" \
50	if (start_num == 0)	29	"r03: 0x%08lx\tr04: 0x%08lx\tr05: 0x%08lx\n" \
51	pr_info("%s", buf);	30	"r06: 0x%08lx\tr07: 0x%08lx\tr08: 0x%08lx\n" \
52	else	31	"r09: 0x%08lx\tr10: 0x%08lx\tr11: 0x%08lx\n" \
53	pr_cont("%s\n", buf);	32	"r12: 0x%08lx\t",
		33	regs->r0, regs->r1, regs->r2,
		34	regs->r3, regs->r4, regs->r5,
		35	regs->r6, regs->r7, regs->r8,
		36	regs->r9, regs->r10, regs->r11,
		37	regs->r12);
54	}	38	}
55		39
56	static void show_callee_regs(struct callee_regs *cregs)	40	static void print_regs_callee(struct callee_regs *regs)
57	{	41	{
58	print_reg_file(&(cregs->r13), 13);	42	pr_cont("r13: 0x%08lx\tr14: 0x%08lx\n" \
		43	"r15: 0x%08lx\tr16: 0x%08lx\tr17: 0x%08lx\n" \
		44	"r18: 0x%08lx\tr19: 0x%08lx\tr20: 0x%08lx\n" \
		45	"r21: 0x%08lx\tr22: 0x%08lx\tr23: 0x%08lx\n" \
		46	"r24: 0x%08lx\tr25: 0x%08lx\n",
		47	regs->r13, regs->r14,
		48	regs->r15, regs->r16, regs->r17,
		49	regs->r18, regs->r19, regs->r20,
		50	regs->r21, regs->r22, regs->r23,
		51	regs->r24, regs->r25);
59	}	52	}
60		53
61	static void print_task_path_n_nm(struct task_struct *tsk)	54	static void print_task_path_n_nm(struct task_struct *tsk)
@@ -175,7 +168,7 @@ static void show_ecr_verbose(struct pt_regs *regs) · 113 unmodified lines
175	void show_regs(struct pt_regs *regs)	168	void show_regs(struct pt_regs *regs)
176	{	169	{
177	struct task_struct *tsk = current;	170	struct task_struct *tsk = current;
178	struct callee_regs *cregs;	171	struct callee_regs cregs = (struct callee_regs )tsk->thread.callee_reg;
179		172
180	/*	173	/*
181	* generic code calls us with preemption disabled, but some calls	174	* generic code calls us with preemption disabled, but some calls
@@ -204,25 +197,15 @@ void show_regs(struct pt_regs *regs) · 22 unmodified lines
204	STS_BIT(regs, A2), STS_BIT(regs, A1),	197	STS_BIT(regs, A2), STS_BIT(regs, A1),
205	STS_BIT(regs, E2), STS_BIT(regs, E1));	198	STS_BIT(regs, E2), STS_BIT(regs, E1));
206	#else	199	#else
207	pr_cont(" [%2s%2s%2s%2s]",	200	pr_cont(" [%2s%2s%2s%2s] ",
208	STS_BIT(regs, IE),	201	STS_BIT(regs, IE),
209	(regs->status32 & STATUS_U_MASK) ? "U " : "K ",	202	(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
210	STS_BIT(regs, DE), STS_BIT(regs, AE));	203	STS_BIT(regs, DE), STS_BIT(regs, AE));
211	#endif	204	#endif
212	pr_cont(" BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n",
213	regs->bta, regs->sp, regs->fp, (void *)regs->blink);
214	pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
215	regs->lp_start, regs->lp_end, regs->lp_count);
216
217	/* print regs->r0 thru regs->r12
218	* Sequential printing was generating horrible code
219	*/
220	print_reg_file(&(regs->r0), 0);
221		205
222	/* If Callee regs were saved, display them too */	206	print_regs_scratch(regs);
223	cregs = (struct callee_regs *)current->thread.callee_reg;
224	if (cregs)	207	if (cregs)
225	show_callee_regs(cregs);	208	print_regs_callee(cregs);
226		209
227	preempt_disable();	210	preempt_disable();
228	}	211	}

arch/arc/kernel/unwind.c+3−3

@@ -572,7 +572,7 @@ static unsigned long read_pointer(const u8 *pLoc, const void end, · 571 unmodified lines
572	#else	572	#else
573	BUILD_BUG_ON(sizeof(u32) != sizeof(value));	573	BUILD_BUG_ON(sizeof(u32) != sizeof(value));
574	#endif	574	#endif
575	/* Fall through */	575	fallthrough;
576	case DW_EH_PE_native:	576	case DW_EH_PE_native:
577	if (end < (const void *)(ptr.pul + 1))	577	if (end < (const void *)(ptr.pul + 1))
578	return 0;	578	return 0;
@@ -827,7 +827,7 @@ static int processCFI(const u8 start, const u8 end, unsigned long targetLoc, · 248 unmodified lines
827	case DW_CFA_def_cfa:	827	case DW_CFA_def_cfa:
828	state->cfa.reg = get_uleb128(&ptr.p8, end);	828	state->cfa.reg = get_uleb128(&ptr.p8, end);
829	unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg);	829	unw_debug("cfa_def_cfa: r%lu ", state->cfa.reg);
830	/* fall through */	830	fallthrough;
831	case DW_CFA_def_cfa_offset:	831	case DW_CFA_def_cfa_offset:
832	state->cfa.offs = get_uleb128(&ptr.p8, end);	832	state->cfa.offs = get_uleb128(&ptr.p8, end);
833	unw_debug("cfa_def_cfa_offset: 0x%lx ",	833	unw_debug("cfa_def_cfa_offset: 0x%lx ",
@@ -835,7 +835,7 @@ static int processCFI(const u8 start, const u8 end, unsigned long targetLoc, · 1 unmodified line
835	break;	835	break;
836	case DW_CFA_def_cfa_sf:	836	case DW_CFA_def_cfa_sf:
837	state->cfa.reg = get_uleb128(&ptr.p8, end);	837	state->cfa.reg = get_uleb128(&ptr.p8, end);
838	/* fall through */	838	fallthrough;
839	case DW_CFA_def_cfa_offset_sf:	839	case DW_CFA_def_cfa_offset_sf:
840	state->cfa.offs = get_sleb128(&ptr.p8, end)	840	state->cfa.offs = get_sleb128(&ptr.p8, end)
841	* state->dataAlign;	841	* state->dataAlign;

arch/arc/mm/init.c+16−11

 #ifdef CONFIG_HIGHMEM
 static unsigned long min_high_pfn, max_high_pfn;
-static u64 high_mem_start;
+static phys_addr_t high_mem_start;
-static u64 high_mem_sz;
+static phys_addr_t high_mem_sz;
 #endif
 #ifdef CONFIG_DISCONTIGMEM
 		high_mem_sz = size;
 		in_use = 1;
 		memblock_add_node(base, size, 1);
+		memblock_reserve(base, size);
 #endif
 	}
 	min_high_pfn = PFN_DOWN(high_mem_start);
 	max_high_pfn = PFN_DOWN(high_mem_start + high_mem_sz);
-	max_zone_pfn[ZONE_HIGHMEM] = max_high_pfn;
+	max_zone_pfn[ZONE_HIGHMEM] = min_low_pfn;
 	high_memory = (void *)(min_high_pfn << PAGE_SHIFT);
 	kmap_init();
 	free_area_init(max_zone_pfn);
 }
-/*
+static void __init highmem_init(void)
- * mem_init - initializes memory
- *
- * Frees up bootmem
- * Calculates and displays memory available/used
- */
-void __init mem_init(void)
 {
 #ifdef CONFIG_HIGHMEM
 	unsigned long tmp;
-	reset_all_zones_managed_pages();
+	memblock_free(high_mem_start, high_mem_sz);
 	for (tmp = min_high_pfn; tmp < max_high_pfn; tmp++)
 		free_highmem_page(pfn_to_page(tmp));
 #endif
+}
+/*
+ * mem_init - initializes memory
+ *
+ * Frees up bootmem
+ * Calculates and displays memory available/used
+ */
+void __init mem_init(void)
+{
 	memblock_free_all();
+	highmem_init();
 	mem_init_print_info(NULL);
 }

arch/arc/plat-eznps/include/plat/ctop.h+0−1

@@ -33,7 +33,6 @@ · 32 unmodified lines
33	#define CTOP_AUX_DPC (CTOP_AUX_BASE + 0x02C)	33	#define CTOP_AUX_DPC (CTOP_AUX_BASE + 0x02C)
34	#define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)	34	#define CTOP_AUX_LPC (CTOP_AUX_BASE + 0x030)
35	#define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)	35	#define CTOP_AUX_EFLAGS (CTOP_AUX_BASE + 0x080)
36	#define CTOP_AUX_IACK (CTOP_AUX_BASE + 0x088)
37	#define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)	36	#define CTOP_AUX_GPA1 (CTOP_AUX_BASE + 0x08C)
38	#define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)	37	#define CTOP_AUX_UDMC (CTOP_AUX_BASE + 0x300)
39		38

arch/arm/kernel/hw_breakpoint.c+5−5

@@ -547,7 +547,7 @@ static int arch_build_bp_info(struct perf_event *bp, · 546 unmodified lines
547	if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)	547	if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE)
548	&& max_watchpoint_len >= 8)	548	&& max_watchpoint_len >= 8)
549	break;	549	break;
550	/* Else, fall through */	550	fallthrough;
551	default:	551	default:
552	return -EINVAL;	552	return -EINVAL;
553	}	553	}
@@ -612,12 +612,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, · 58 unmodified lines
612	/* Allow halfword watchpoints and breakpoints. */	612	/* Allow halfword watchpoints and breakpoints. */
613	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)	613	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
614	break;	614	break;
615	/* Else, fall through */	615	fallthrough;
616	case 3:	616	case 3:
617	/* Allow single byte watchpoint. */	617	/* Allow single byte watchpoint. */
618	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)	618	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
619	break;	619	break;
620	/* Else, fall through */	620	fallthrough;
621	default:	621	default:
622	ret = -EINVAL;	622	ret = -EINVAL;
623	goto out;	623	goto out;
@@ -884,7 +884,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, · 260 unmodified lines
884	break;	884	break;
885	case ARM_ENTRY_ASYNC_WATCHPOINT:	885	case ARM_ENTRY_ASYNC_WATCHPOINT:
886	WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");	886	WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n");
887	/* Fall through */	887	fallthrough;
888	case ARM_ENTRY_SYNC_WATCHPOINT:	888	case ARM_ENTRY_SYNC_WATCHPOINT:
889	watchpoint_handler(addr, fsr, regs);	889	watchpoint_handler(addr, fsr, regs);
890	break;	890	break;
@@ -933,7 +933,7 @@ static bool core_has_os_save_restore(void) · 42 unmodified lines
933	ARM_DBG_READ(c1, c1, 4, oslsr);	933	ARM_DBG_READ(c1, c1, 4, oslsr);
934	if (oslsr & ARM_OSLSR_OSLM0)	934	if (oslsr & ARM_OSLSR_OSLM0)
935	return true;	935	return true;
936	/* Else, fall through */	936	fallthrough;
937	default:	937	default:
938	return false;	938	return false;
939	}	939	}

arch/arm/kernel/signal.c+1−1

@@ -596,7 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall) · 595 unmodified lines
596	switch (retval) {	596	switch (retval) {
597	case -ERESTART_RESTARTBLOCK:	597	case -ERESTART_RESTARTBLOCK:
598	restart -= 2;	598	restart -= 2;
599	/* Fall through */	599	fallthrough;
600	case -ERESTARTNOHAND:	600	case -ERESTARTNOHAND:
601	case -ERESTARTSYS:	601	case -ERESTARTSYS:
602	case -ERESTARTNOINTR:	602	case -ERESTARTNOINTR:

arch/arm/mach-ep93xx/crunch.c+1−1

@@ -49,7 +49,7 @@ static int crunch_do(struct notifier_block self, unsigned long cmd, void t) · 48 unmodified lines
49	* FALLTHROUGH: Ensure we don't try to overwrite our newly	49	* FALLTHROUGH: Ensure we don't try to overwrite our newly
50	* initialised state information on the first fault.	50	* initialised state information on the first fault.
51	*/	51	*/
52	/* Fall through */	52	fallthrough;
53		53
54	case THREAD_NOTIFY_EXIT:	54	case THREAD_NOTIFY_EXIT:
55	crunch_task_release(thread);	55	crunch_task_release(thread);

arch/arm/mach-mmp/pm-mmp2.c+4−4

@@ -123,19 +123,19 @@ void mmp2_pm_enter_lowpower_mode(int state) · 122 unmodified lines
123	case POWER_MODE_SYS_SLEEP:	123	case POWER_MODE_SYS_SLEEP:
124	apcr \|= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */	124	apcr \|= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */
125	apcr \|= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */	125	apcr \|= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */
126	/* fall through */	126	fallthrough;
127	case POWER_MODE_CHIP_SLEEP:	127	case POWER_MODE_CHIP_SLEEP:
128	apcr \|= MPMU_PCR_PJ_SLPEN;	128	apcr \|= MPMU_PCR_PJ_SLPEN;
129	/* fall through */	129	fallthrough;
130	case POWER_MODE_APPS_SLEEP:	130	case POWER_MODE_APPS_SLEEP:
131	apcr \|= MPMU_PCR_PJ_APBSD; /* set APBSD */	131	apcr \|= MPMU_PCR_PJ_APBSD; /* set APBSD */
132	/* fall through */	132	fallthrough;
133	case POWER_MODE_APPS_IDLE:	133	case POWER_MODE_APPS_IDLE:
134	apcr \|= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */	134	apcr \|= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */
135	apcr \|= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */	135	apcr \|= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */
136	idle_cfg \|= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */	136	idle_cfg \|= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */
137	apcr \|= MPMU_PCR_PJ_SPSD;	137	apcr \|= MPMU_PCR_PJ_SPSD;
138	/* fall through */	138	fallthrough;
139	case POWER_MODE_CORE_EXTIDLE:	139	case POWER_MODE_CORE_EXTIDLE:
140	idle_cfg \|= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */	140	idle_cfg \|= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */
141	idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;	141	idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK;

arch/arm/mach-mmp/pm-pxa910.c+5−5

@@ -145,23 +145,23 @@ void pxa910_pm_enter_lowpower_mode(int state) · 144 unmodified lines
145	case POWER_MODE_UDR:	145	case POWER_MODE_UDR:
146	/* only shutdown APB in UDR */	146	/* only shutdown APB in UDR */
147	apcr \|= MPMU_APCR_STBYEN \| MPMU_APCR_APBSD;	147	apcr \|= MPMU_APCR_STBYEN \| MPMU_APCR_APBSD;
148	/* fall through */	148	fallthrough;
149	case POWER_MODE_SYS_SLEEP:	149	case POWER_MODE_SYS_SLEEP:
150	apcr \|= MPMU_APCR_SLPEN; /* set the SLPEN bit */	150	apcr \|= MPMU_APCR_SLPEN; /* set the SLPEN bit */
151	apcr \|= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */	151	apcr \|= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */
152	/* fall through */	152	fallthrough;
153	case POWER_MODE_APPS_SLEEP:	153	case POWER_MODE_APPS_SLEEP:
154	apcr \|= MPMU_APCR_DDRCORSD; /* set DDRCORSD */	154	apcr \|= MPMU_APCR_DDRCORSD; /* set DDRCORSD */
155	/* fall through */	155	fallthrough;
156	case POWER_MODE_APPS_IDLE:	156	case POWER_MODE_APPS_IDLE:
157	apcr \|= MPMU_APCR_AXISD; /* set AXISDD bit */	157	apcr \|= MPMU_APCR_AXISD; /* set AXISDD bit */
158	/* fall through */	158	fallthrough;
159	case POWER_MODE_CORE_EXTIDLE:	159	case POWER_MODE_CORE_EXTIDLE:
160	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_IDLE;	160	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_IDLE;
161	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_PWRDWN;	161	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_PWRDWN;
162	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)	162	idle_cfg \|= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3)
163	\| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);	163	\| APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3);
164	/* fall through */	164	fallthrough;
165	case POWER_MODE_CORE_INTIDLE:	165	case POWER_MODE_CORE_INTIDLE:
166	break;	166	break;
167	}	167	}

arch/arm/mach-omap2/id.c+0−8

 			cpu_rev = "3.1";
 			break;
 		case 7:
-		/* FALLTHROUGH */
 		default:
 			/* Use the latest known revision as default */
 			omap_revision = OMAP3430_REV_ES3_1_2;
 			cpu_rev = "1.0";
 			break;
 		case 1:
-		/* FALLTHROUGH */
 		default:
 			omap_revision = AM35XX_REV_ES1_1;
 			cpu_rev = "1.1";
 			cpu_rev = "1.1";
 			break;
 		case 2:
-		/* FALLTHROUGH */
 		default:
 			omap_revision = OMAP3630_REV_ES1_2;
 			cpu_rev = "1.2";
 			cpu_rev = "2.0";
 			break;
 		case 3:
-			/* FALLTHROUGH */
 		default:
 			omap_revision = TI8168_REV_ES2_1;
 			cpu_rev = "2.1";
 			cpu_rev = "2.0";
 			break;
 		case 2:
-		/* FALLTHROUGH */
 		default:
 			omap_revision = AM335X_REV_ES2_1;
 			cpu_rev = "2.1";
 			cpu_rev = "1.1";
 			break;
 		case 2:
-		/* FALLTHROUGH */
 		default:
 			omap_revision = AM437X_REV_ES1_2;
 			cpu_rev = "1.2";
 	case 0xb968:
 		switch (rev) {
 		case 0:
-		/* FALLTHROUGH */
 		case 1:
 			omap_revision = TI8148_REV_ES1_0;
 			cpu_rev = "1.0";
 			cpu_rev = "2.0";
 			break;
 		case 3:
-		/* FALLTHROUGH */
 		default:
 			omap_revision = TI8148_REV_ES2_1;
 			cpu_rev = "2.1";

arch/arm/mach-omap2/omap_device.c+1−1

@@ -240,7 +240,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb, · 239 unmodified lines
240	if (pdev->dev.of_node)	240	if (pdev->dev.of_node)
241	omap_device_build_from_dt(pdev);	241	omap_device_build_from_dt(pdev);
242	omap_auxdata_legacy_init(dev);	242	omap_auxdata_legacy_init(dev);
243	/* fall through */	243	fallthrough;
244	default:	244	default:
245	od = to_omap_device(pdev);	245	od = to_omap_device(pdev);
246	if (od)	246	if (od)

arch/arm/mach-omap2/pm34xx.c+0−4

@@ -298,11 +298,7 @@ static void omap3_pm_idle(void) · 297 unmodified lines
298	if (omap_irq_pending())	298	if (omap_irq_pending())
299	return;	299	return;
300		300
301	trace_cpu_idle_rcuidle(1, smp_processor_id());
302
303	omap_sram_idle();	301	omap_sram_idle();
304
305	trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
306	}	302	}
307		303
308	#ifdef CONFIG_SUSPEND	304	#ifdef CONFIG_SUSPEND

arch/arm/mach-orion5x/dns323-setup.c+1−1

@@ -624,7 +624,7 @@ static void __init dns323_init(void) · 623 unmodified lines
624	dns323ab_leds[0].active_low = 1;	624	dns323ab_leds[0].active_low = 1;
625	gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");	625	gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable");
626	gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);	626	gpio_direction_output(DNS323_GPIO_LED_POWER1, 0);
627	/* Fall through */	627	fallthrough;
628	case DNS323_REV_B1:	628	case DNS323_REV_B1:
629	i2c_register_board_info(0, dns323ab_i2c_devices,	629	i2c_register_board_info(0, dns323ab_i2c_devices,
630	ARRAY_SIZE(dns323ab_i2c_devices));	630	ARRAY_SIZE(dns323ab_i2c_devices));

arch/arm/mach-rpc/riscpc.c+1−1

@@ -46,7 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag) · 45 unmodified lines
46	switch (tag->u.acorn.vram_pages) {	46	switch (tag->u.acorn.vram_pages) {
47	case 512:	47	case 512:
48	vram_size += PAGE_SIZE * 256;	48	vram_size += PAGE_SIZE * 256;
49	/* Fall through - ??? */	49	fallthrough; /* ??? */
50	case 256:	50	case 256:
51	vram_size += PAGE_SIZE * 256;	51	vram_size += PAGE_SIZE * 256;
52	default:	52	default:

arch/arm/mach-tegra/reset.c+1−1

@@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void) · 69 unmodified lines
70	switch (err) {	70	switch (err) {
71	case -ENOSYS:	71	case -ENOSYS:
72	tegra_cpu_reset_handler_set(reset_address);	72	tegra_cpu_reset_handler_set(reset_address);
73	/* fall through */	73	fallthrough;
74	case 0:	74	case 0:
75	is_enabled = true;	75	is_enabled = true;
76	break;	76	break;

arch/arm/mm/alignment.c+2−2

@@ -694,7 +694,7 @@ thumb2arm(u16 tinstr) · 693 unmodified lines
694	return subset[(L<<1) \| ((tinstr & (1<<8)) >> 8)] \|	694	return subset[(L<<1) \| ((tinstr & (1<<8)) >> 8)] \|
695	(tinstr & 255); /* register_list */	695	(tinstr & 255); /* register_list */
696	}	696	}
697	/* Else, fall through - for illegal instruction case */	697	fallthrough; /* for illegal instruction case */
698		698
699	default:	699	default:
700	return BAD_INSTR;	700	return BAD_INSTR;
@@ -750,7 +750,7 @@ do_alignment_t32_to_handler(u32 pinstr, struct pt_regs regs, · 49 unmodified lines
750	case 0xe8e0:	750	case 0xe8e0:
751	case 0xe9e0:	751	case 0xe9e0:
752	poffset->un = (tinst2 & 0xff) << 2;	752	poffset->un = (tinst2 & 0xff) << 2;
753	/* Fall through */	753	fallthrough;
754		754
755	case 0xe940:	755	case 0xe940:
756	case 0xe9c0:	756	case 0xe9c0:

arch/arm/mm/proc-v7-bugs.c+1−1

@@ -71,7 +71,7 @@ static void cpu_v7_spectre_init(void) · 70 unmodified lines
71	/* Other ARM CPUs require no workaround */	71	/* Other ARM CPUs require no workaround */
72	if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)	72	if (read_cpuid_implementor() == ARM_CPU_IMP_ARM)
73	break;	73	break;
74	/* fallthrough */	74	fallthrough;
75	/* Cortex A57/A72 require firmware workaround */	75	/* Cortex A57/A72 require firmware workaround */
76	case ARM_CPU_PART_CORTEX_A57:	76	case ARM_CPU_PART_CORTEX_A57:
77	case ARM_CPU_PART_CORTEX_A72: {	77	case ARM_CPU_PART_CORTEX_A72: {

arch/arm/plat-omap/dma.c+3−3

@@ -309,14 +309,14 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) · 308 unmodified lines
309	* not supported by current hardware on OMAP1	309	* not supported by current hardware on OMAP1
310	* w \|= (0x03 << 7);	310	* w \|= (0x03 << 7);
311	*/	311	*/
312	/* fall through */	312	fallthrough;
313	case OMAP_DMA_DATA_BURST_16:	313	case OMAP_DMA_DATA_BURST_16:
314	if (dma_omap2plus()) {	314	if (dma_omap2plus()) {
315	burst = 0x3;	315	burst = 0x3;
316	break;	316	break;
317	}	317	}
318	/* OMAP1 don't support burst 16 */	318	/* OMAP1 don't support burst 16 */
319	/* fall through */	319	fallthrough;
320	default:	320	default:
321	BUG();	321	BUG();
322	}	322	}
@@ -393,7 +393,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) · 70 unmodified lines
393	break;	393	break;
394	}	394	}
395	/* OMAP1 don't support burst 16 */	395	/* OMAP1 don't support burst 16 */
396	/* fall through */	396	fallthrough;
397	default:	397	default:
398	printk(KERN_ERR "Invalid DMA burst mode\n");	398	printk(KERN_ERR "Invalid DMA burst mode\n");
399	BUG();	399	BUG();

arch/arm/probes/decode.c+1−1

@@ -307,7 +307,7 @@ static bool __kprobes decode_regs(probes_opcode_t *pinsn, u32 regs, bool modify) · 306 unmodified lines
307	case REG_TYPE_NOPCWB:	307	case REG_TYPE_NOPCWB:
308	if (!is_writeback(insn))	308	if (!is_writeback(insn))
309	break; /* No writeback, so any register is OK */	309	break; /* No writeback, so any register is OK */
310	/* fall through... */	310	fallthrough;
311	case REG_TYPE_NOPC:	311	case REG_TYPE_NOPC:
312	case REG_TYPE_NOPCX:	312	case REG_TYPE_NOPCX:
313	/* Reject PC (R15) */	313	/* Reject PC (R15) */

arch/arm/probes/kprobes/core.c+1−1

@@ -280,7 +280,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs) · 279 unmodified lines
280	/* A nested probe was hit in FIQ, it is a BUG */	280	/* A nested probe was hit in FIQ, it is a BUG */
281	pr_warn("Unrecoverable kprobe detected.\n");	281	pr_warn("Unrecoverable kprobe detected.\n");
282	dump_kprobe(p);	282	dump_kprobe(p);
283	/* fall through */	283	fallthrough;
284	default:	284	default:
285	/* impossible cases */	285	/* impossible cases */
286	BUG();	286	BUG();

arch/arm64/Makefile+10−4

 # compiler to generate them and consequently to break the single image contract
 # we pass it only to the assembler. This option is utilized only in case of non
 # integrated assemblers.
-ifneq ($(CONFIG_AS_HAS_ARMV8_4), y)
+ifeq ($(CONFIG_AS_HAS_PAC), y)
-branch-prot-flags-$(CONFIG_AS_HAS_PAC) += -Wa,-march=armv8.3-a
+asm-arch := armv8.3-a
 endif
 endif
 ifeq ($(CONFIG_AS_HAS_ARMV8_4), y)
 # make sure to pass the newest target architecture to -march.
-KBUILD_CFLAGS	+= -Wa,-march=armv8.4-a
+asm-arch := armv8.4-a
+endif
+ifdef asm-arch
+KBUILD_CFLAGS	+= -Wa,-march=$(asm-arch) \
+		   -DARM64_ASM_ARCH='"$(asm-arch)"'
 endif
 ifeq ($(CONFIG_SHADOW_CALL_STACK), y)
 PHONY += vdso_install
 vdso_install:
 	$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso $@
-	$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@
+	$(if $(CONFIG_COMPAT_VDSO), \
+		$(Q)$(MAKE) $(build)=arch/arm64/kernel/vdso32 $@)
 # We use MRPROPER_FILES and CLEAN_FILES now
 archclean:

arch/arm64/boot/dts/mediatek/mt7622.dtsi+2−0

@@ -686,6 +686,8 @@ · 685 unmodified lines
686	clocks = <&pericfg CLK_PERI_MSDC30_0_PD>,	686	clocks = <&pericfg CLK_PERI_MSDC30_0_PD>,
687	<&topckgen CLK_TOP_MSDC50_0_SEL>;	687	<&topckgen CLK_TOP_MSDC50_0_SEL>;
688	clock-names = "source", "hclk";	688	clock-names = "source", "hclk";
		689	resets = <&pericfg MT7622_PERI_MSDC0_SW_RST>;
		690	reset-names = "hrst";
689	status = "disabled";	691	status = "disabled";
690	};	692	};
691		693

arch/arm64/boot/dts/nvidia/tegra186.dtsi+12−8

 		compatible = "nvidia,tegra186-sdhci";
 		reg = <0x0 0x03400000 0x0 0x10000>;
 		interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&bpmp TEGRA186_CLK_SDMMC1>;
+		clocks = <&bpmp TEGRA186_CLK_SDMMC1>,
-		clock-names = "sdhci";
+			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&bpmp TEGRA186_RESET_SDMMC1>;
 		reset-names = "sdhci";
 		interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
 		compatible = "nvidia,tegra186-sdhci";
 		reg = <0x0 0x03420000 0x0 0x10000>;
 		interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&bpmp TEGRA186_CLK_SDMMC2>;
+		clocks = <&bpmp TEGRA186_CLK_SDMMC2>,
-		clock-names = "sdhci";
+			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&bpmp TEGRA186_RESET_SDMMC2>;
 		reset-names = "sdhci";
 		interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
 		compatible = "nvidia,tegra186-sdhci";
 		reg = <0x0 0x03440000 0x0 0x10000>;
 		interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&bpmp TEGRA186_CLK_SDMMC3>;
+		clocks = <&bpmp TEGRA186_CLK_SDMMC3>,
-		clock-names = "sdhci";
+			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&bpmp TEGRA186_RESET_SDMMC3>;
 		reset-names = "sdhci";
 		interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
 		compatible = "nvidia,tegra186-sdhci";
 		reg = <0x0 0x03460000 0x0 0x10000>;
 		interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&bpmp TEGRA186_CLK_SDMMC4>;
+		clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
-		clock-names = "sdhci";
+			 <&bpmp TEGRA186_CLK_SDMMC_LEGACY_TM>;
+		clock-names = "sdhci", "tmclk";
 		assigned-clocks = <&bpmp TEGRA186_CLK_SDMMC4>,
 				  <&bpmp TEGRA186_CLK_PLLC4_VCO>;
 		assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;

arch/arm64/boot/dts/nvidia/tegra194.dtsi+9−6

 			compatible = "nvidia,tegra194-sdhci";
 			reg = <0x03400000 0x10000>;
 			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
+			clocks = <&bpmp TEGRA194_CLK_SDMMC1>,
-			clock-names = "sdhci";
+				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
+			clock-names = "sdhci", "tmclk";
 			resets = <&bpmp TEGRA194_RESET_SDMMC1>;
 			reset-names = "sdhci";
 			interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
 			compatible = "nvidia,tegra194-sdhci";
 			reg = <0x03440000 0x10000>;
 			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
+			clocks = <&bpmp TEGRA194_CLK_SDMMC3>,
-			clock-names = "sdhci";
+				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
+			clock-names = "sdhci", "tmclk";
 			resets = <&bpmp TEGRA194_RESET_SDMMC3>;
 			reset-names = "sdhci";
 			interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
 			compatible = "nvidia,tegra194-sdhci";
 			reg = <0x03460000 0x10000>;
 			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
+			clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
-			clock-names = "sdhci";
+				 <&bpmp TEGRA194_CLK_SDMMC_LEGACY_TM>;
+			clock-names = "sdhci", "tmclk";
 			assigned-clocks = <&bpmp TEGRA194_CLK_SDMMC4>,
 					  <&bpmp TEGRA194_CLK_PLLC4>;
 			assigned-clock-parents =

arch/arm64/boot/dts/nvidia/tegra210.dtsi+12−8

 		compatible = "nvidia,tegra210-sdhci";
 		reg = <0x0 0x700b0000 0x0 0x200>;
 		interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
+		clocks = <&tegra_car TEGRA210_CLK_SDMMC1>,
-		clock-names = "sdhci";
+			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&tegra_car 14>;
 		reset-names = "sdhci";
 		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
 		compatible = "nvidia,tegra210-sdhci";
 		reg = <0x0 0x700b0200 0x0 0x200>;
 		interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
+		clocks = <&tegra_car TEGRA210_CLK_SDMMC2>,
-		clock-names = "sdhci";
+			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&tegra_car 9>;
 		reset-names = "sdhci";
 		pinctrl-names = "sdmmc-1v8-drv";
 		compatible = "nvidia,tegra210-sdhci";
 		reg = <0x0 0x700b0400 0x0 0x200>;
 		interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
+		clocks = <&tegra_car TEGRA210_CLK_SDMMC3>,
-		clock-names = "sdhci";
+			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&tegra_car 69>;
 		reset-names = "sdhci";
 		pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
 		compatible = "nvidia,tegra210-sdhci";
 		reg = <0x0 0x700b0600 0x0 0x200>;
 		interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
+		clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
-		clock-names = "sdhci";
+			 <&tegra_car TEGRA210_CLK_SDMMC_LEGACY>;
+		clock-names = "sdhci", "tmclk";
 		resets = <&tegra_car 15>;
 		reset-names = "sdhci";
 		pinctrl-names = "sdmmc-3v3-drv", "sdmmc-1v8-drv";

arch/arm64/boot/dts/ti/k3-am65-main.dtsi+17−19

 		ti,intr-trigger-type = <1>;
 		interrupt-controller;
 		interrupt-parent = <&gic500>;
-		#interrupt-cells = <2>;
+		#interrupt-cells = <1>;
 		ti,sci = <&dmsc>;
-		ti,sci-dst-id = <56>;
+		ti,sci-dev-id = <100>;
-		ti,sci-rm-range-girq = <0x1>;
+		ti,interrupt-ranges = <0 392 32>;
 	};
 	main_navss {
 			ti,intr-trigger-type = <4>;
 			interrupt-controller;
 			interrupt-parent = <&gic500>;
-			#interrupt-cells = <2>;
+			#interrupt-cells = <1>;
 			ti,sci = <&dmsc>;
-			ti,sci-dst-id = <56>;
+			ti,sci-dev-id = <182>;
-			ti,sci-rm-range-girq = <0x0>, <0x2>;
+			ti,interrupt-ranges = <0 64 64>,
+					      <64 448 64>;
 		};
 		inta_main_udmass: interrupt-controller@33d00000 {
 			msi-controller;
 			ti,sci = <&dmsc>;
 			ti,sci-dev-id = <179>;
-			ti,sci-rm-range-vint = <0x0>;
+			ti,interrupt-ranges = <0 0 256>;
-			ti,sci-rm-range-global-event = <0x1>;
 		};
 		secure_proxy_main: mailbox@32c00000 {
 				<0x0 0x33000000 0x0 0x40000>;
 			reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
 			ti,num-rings = <818>;
-			ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
+			ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
 			ti,dma-ring-reset-quirk;
 			ti,sci = <&dmsc>;
 			ti,sci-dev-id = <187>;
 			ti,sci-dev-id = <188>;
 			ti,ringacc = <&ringacc>;
-			ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
+			ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
-						<0x2>; /* TX_CHAN */
+						<0xd>; /* TX_CHAN */
-			ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
+			ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
-						<0x5>; /* RX_CHAN */
+						<0xa>; /* RX_CHAN */
-			ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */
+			ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
 		};
 		cpts@310d0000 {
 			reg-names = "cpts";
 			clocks = <&main_cpts_mux>;
 			clock-names = "cpts";
-			interrupts-extended = <&intr_main_navss 163 0>;
+			interrupts-extended = <&intr_main_navss 391>;
 			interrupt-names = "cpts";
 			ti,cpts-periodic-outputs = <6>;
 			ti,cpts-ext-ts-inputs = <8>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&intr_main_gpio>;
-		interrupts = <57 256>, <57 257>, <57 258>, <57 259>, <57 260>,
+		interrupts = <192>, <193>, <194>, <195>, <196>, <197>;
-				<57 261>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <96>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&intr_main_gpio>;
-		interrupts = <58 256>, <58 257>, <58 258>, <58 259>, <58 260>,
+		interrupts = <200>, <201>, <202>, <203>, <204>, <205>;
-				<58 261>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <90>;

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi+6−6

@@ -134,7 +134,7 @@ · 133 unmodified lines
134	<0x0 0x2a500000 0x0 0x40000>;	134	<0x0 0x2a500000 0x0 0x40000>;
135	reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";	135	reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
136	ti,num-rings = <286>;	136	ti,num-rings = <286>;
137	ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */	137	ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
138	ti,dma-ring-reset-quirk;	138	ti,dma-ring-reset-quirk;
139	ti,sci = <&dmsc>;	139	ti,sci = <&dmsc>;
140	ti,sci-dev-id = <195>;	140	ti,sci-dev-id = <195>;
@@ -154,11 +154,11 @@ · 13 unmodified lines
154	ti,sci-dev-id = <194>;	154	ti,sci-dev-id = <194>;
155	ti,ringacc = <&mcu_ringacc>;	155	ti,ringacc = <&mcu_ringacc>;
156		156
157	ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */	157	ti,sci-rm-range-tchan = <0xf>, /* TX_HCHAN */
158	<0x2>; /* TX_CHAN */	158	<0xd>; /* TX_CHAN */
159	ti,sci-rm-range-rchan = <0x3>, /* RX_HCHAN */	159	ti,sci-rm-range-rchan = <0xb>, /* RX_HCHAN */
160	<0x4>; /* RX_CHAN */	160	<0xa>; /* RX_CHAN */
161	ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */	161	ti,sci-rm-range-rflow = <0x0>; /* GP RFLOW */
162	};	162	};
163	};	163	};
164		164

arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi+4−4

@@ -74,10 +74,10 @@ · 73 unmodified lines
74	ti,intr-trigger-type = <1>;	74	ti,intr-trigger-type = <1>;
75	interrupt-controller;	75	interrupt-controller;
76	interrupt-parent = <&gic500>;	76	interrupt-parent = <&gic500>;
77	#interrupt-cells = <2>;	77	#interrupt-cells = <1>;
78	ti,sci = <&dmsc>;	78	ti,sci = <&dmsc>;
79	ti,sci-dst-id = <56>;	79	ti,sci-dev-id = <156>;
80	ti,sci-rm-range-girq = <0x4>;	80	ti,interrupt-ranges = <0 712 16>;
81	};	81	};
82		82
83	wkup_gpio0: wkup_gpio0@42110000 {	83	wkup_gpio0: wkup_gpio0@42110000 {
@@ -86,7 +86,7 @@ · 2 unmodified lines
86	gpio-controller;	86	gpio-controller;
87	#gpio-cells = <2>;	87	#gpio-cells = <2>;
88	interrupt-parent = <&intr_wkup_gpio>;	88	interrupt-parent = <&intr_wkup_gpio>;
89	interrupts = <59 128>, <59 129>, <59 130>, <59 131>;	89	interrupts = <60>, <61>, <62>, <63>;
90	interrupt-controller;	90	interrupt-controller;
91	#interrupt-cells = <2>;	91	#interrupt-cells = <2>;
92	ti,ngpio = <56>;	92	ti,ngpio = <56>;

arch/arm64/boot/dts/ti/k3-am654-base-board.dts+2−2

@@ -384,7 +384,7 @@ · 383 unmodified lines
384	};	384	};
385		385
386	&mailbox0_cluster0 {	386	&mailbox0_cluster0 {
387	interrupts = <164 0>;	387	interrupts = <436>;
388		388
389	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {	389	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
390	ti,mbox-tx = <1 0 0>;	390	ti,mbox-tx = <1 0 0>;
@@ -393,7 +393,7 @@ · 2 unmodified lines
393	};	393	};
394		394
395	&mailbox0_cluster1 {	395	&mailbox0_cluster1 {
396	interrupts = <165 0>;	396	interrupts = <432>;
397		397
398	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {	398	mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
399	ti,mbox-tx = <1 0 0>;	399	ti,mbox-tx = <1 0 0>;

arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts+5−5

@@ -287,7 +287,7 @@ · 286 unmodified lines
287	};	287	};
288		288
289	&mailbox0_cluster0 {	289	&mailbox0_cluster0 {
290	interrupts = <214 0>;	290	interrupts = <436>;
291		291
292	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {	292	mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
293	ti,mbox-rx = <0 0 0>;	293	ti,mbox-rx = <0 0 0>;
@@ -301,7 +301,7 @@ · 7 unmodified lines
301	};	301	};
302		302
303	&mailbox0_cluster1 {	303	&mailbox0_cluster1 {
304	interrupts = <215 0>;	304	interrupts = <432>;
305		305
306	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {	306	mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
307	ti,mbox-rx = <0 0 0>;	307	ti,mbox-rx = <0 0 0>;
@@ -315,7 +315,7 @@ · 7 unmodified lines
315	};	315	};
316		316
317	&mailbox0_cluster2 {	317	&mailbox0_cluster2 {
318	interrupts = <216 0>;	318	interrupts = <428>;
319		319
320	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {	320	mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
321	ti,mbox-rx = <0 0 0>;	321	ti,mbox-rx = <0 0 0>;
@@ -329,7 +329,7 @@ · 7 unmodified lines
329	};	329	};
330		330
331	&mailbox0_cluster3 {	331	&mailbox0_cluster3 {
332	interrupts = <217 0>;	332	interrupts = <424>;
333		333
334	mbox_c66_0: mbox-c66-0 {	334	mbox_c66_0: mbox-c66-0 {
335	ti,mbox-rx = <0 0 0>;	335	ti,mbox-rx = <0 0 0>;
@@ -343,7 +343,7 @@ · 7 unmodified lines
343	};	343	};
344		344
345	&mailbox0_cluster4 {	345	&mailbox0_cluster4 {
346	interrupts = <218 0>;	346	interrupts = <420>;
347		347
348	mbox_c71_0: mbox-c71-0 {	348	mbox_c71_0: mbox-c71-0 {
349	ti,mbox-rx = <0 0 0>;	349	ti,mbox-rx = <0 0 0>;

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi+22−21

 		ti,intr-trigger-type = <1>;
 		interrupt-controller;
 		interrupt-parent = <&gic500>;
-		#interrupt-cells = <2>;
+		#interrupt-cells = <1>;
 		ti,sci = <&dmsc>;
-		ti,sci-dst-id = <14>;
+		ti,sci-dev-id = <131>;
-		ti,sci-rm-range-girq = <0x1>;
+		ti,interrupt-ranges = <8 392 56>;
 	};
 	main_navss {
 			ti,intr-trigger-type = <4>;
 			interrupt-controller;
 			interrupt-parent = <&gic500>;
-			#interrupt-cells = <2>;
+			#interrupt-cells = <1>;
 			ti,sci = <&dmsc>;
-			ti,sci-dst-id = <14>;
+			ti,sci-dev-id = <213>;
-			ti,sci-rm-range-girq = <0>, <2>;
+			ti,interrupt-ranges = <0 64 64>,
+					      <64 448 64>,
+					      <128 672 64>;
 		};
 		main_udmass_inta: interrupt-controller@33d00000 {
 			msi-controller;
 			ti,sci = <&dmsc>;
 			ti,sci-dev-id = <209>;
-			ti,sci-rm-range-vint = <0xa>;
+			ti,interrupt-ranges = <0 0 256>;
-			ti,sci-rm-range-global-event = <0xd>;
 		};
 		secure_proxy_main: mailbox@32c00000 {
 			reg-names = "cpts";
 			clocks = <&k3_clks 201 1>;
 			clock-names = "cpts";
-			interrupts-extended = <&main_navss_intr 201 0>;
+			interrupts-extended = <&main_navss_intr 391>;
 			interrupt-names = "cpts";
 			ti,cpts-periodic-outputs = <6>;
 			ti,cpts-ext-ts-inputs = <8>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <105 0>, <105 1>, <105 2>, <105 3>,
+		interrupts = <256>, <257>, <258>, <259>,
-			     <105 4>, <105 5>, <105 6>, <105 7>;
+			     <260>, <261>, <262>, <263>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <128>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <106 0>, <106 1>, <106 2>;
+		interrupts = <288>, <289>, <290>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <36>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <107 0>, <107 1>, <107 2>, <107 3>,
+		interrupts = <264>, <265>, <266>, <267>,
-			     <107 4>, <107 5>, <107 6>, <107 7>;
+			     <268>, <269>, <270>, <271>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <128>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <108 0>, <108 1>, <108 2>;
+		interrupts = <292>, <293>, <294>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <36>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <109 0>, <109 1>, <109 2>, <109 3>,
+		interrupts = <272>, <273>, <274>, <275>,
-			     <109 4>, <109 5>, <109 6>, <109 7>;
+			     <276>, <277>, <278>, <279>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <128>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <110 0>, <110 1>, <110 2>;
+		interrupts = <296>, <297>, <298>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <36>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <111 0>, <111 1>, <111 2>, <111 3>,
+		interrupts = <280>, <281>, <282>, <283>,
-			     <111 4>, <111 5>, <111 6>, <111 7>;
+			     <284>, <285>, <286>, <287>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <128>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&main_gpio_intr>;
-		interrupts = <112 0>, <112 1>, <112 2>;
+		interrupts = <300>, <301>, <302>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <36>;

arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi+5−7

 		ti,intr-trigger-type = <1>;
 		interrupt-controller;
 		interrupt-parent = <&gic500>;
-		#interrupt-cells = <2>;
+		#interrupt-cells = <1>;
 		ti,sci = <&dmsc>;
-		ti,sci-dst-id = <14>;
+		ti,sci-dev-id = <137>;
-		ti,sci-rm-range-girq = <0x5>;
+		ti,interrupt-ranges = <16 960 16>;
 	};
 	wkup_gpio0: gpio@42110000 {
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&wkup_gpio_intr>;
-		interrupts = <113 0>, <113 1>, <113 2>,
+		interrupts = <103>, <104>, <105>, <106>, <107>, <108>;
-			     <113 3>, <113 4>, <113 5>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <84>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		interrupt-parent = <&wkup_gpio_intr>;
-		interrupts = <114 0>, <114 1>, <114 2>,
+		interrupts = <112>, <113>, <114>, <115>, <116>, <117>;
-			     <114 3>, <114 4>, <114 5>;
 		interrupt-controller;
 		#interrupt-cells = <2>;
 		ti,ngpio = <84>;

arch/arm64/include/asm/compiler.h+6−0

 #ifndef __ASM_COMPILER_H
 #define __ASM_COMPILER_H
+#ifdef ARM64_ASM_ARCH
+#define ARM64_ASM_PREAMBLE ".arch " ARM64_ASM_ARCH "\n"
+#else
+#define ARM64_ASM_PREAMBLE
+#endif
 /*
  * The EL0/EL1 pointer bits used by a pointer authentication code.
  * This is dependent on TBI0/TBI1 being enabled, or bits 63:56 would also apply.

arch/arm64/include/asm/irqflags.h+5−0

 	return res;
 }
+static inline int arch_irqs_disabled(void)
+{
+	return arch_irqs_disabled_flags(arch_local_save_flags());
+}
 static inline unsigned long arch_local_irq_save(void)
 {
 	unsigned long flags;

arch/arm64/include/asm/kvm_arm.h+2−1

  * IMO:		Override CPSR.I and enable signaling with VI
  * FMO:		Override CPSR.F and enable signaling with VF
  * SWIO:	Turn set/way invalidates into set/way clean+invalidate
+ * PTW:		Take a stage2 fault if a stage1 walk steps in device memory
  */
 #define HCR_GUEST_FLAGS (HCR_TSC | HCR_TSW | HCR_TWE | HCR_TWI | HCR_VM | \
 			 HCR_BSU_IS | HCR_FB | HCR_TAC | \
 			 HCR_AMO | HCR_SWIO | HCR_TIDCP | HCR_RW | HCR_TLOR | \
-			 HCR_FMO | HCR_IMO)
+			 HCR_FMO | HCR_IMO | HCR_PTW )
 #define HCR_VIRT_EXCP_MASK (HCR_VSE | HCR_VI | HCR_VF)
 #define HCR_HOST_NVHE_FLAGS (HCR_RW | HCR_API | HCR_APK)
 #define HCR_HOST_VHE_FLAGS (HCR_RW | HCR_TGE | HCR_E2H)

arch/arm64/include/asm/kvm_asm.h+43−0

@@ -169,6 +169,34 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ]; · 168 unmodified lines
169	*__hyp_this_cpu_ptr(sym); \	169	*__hyp_this_cpu_ptr(sym); \
170	})	170	})
171		171
		172	#define __KVM_EXTABLE(from, to) \
		173	" .pushsection __kvm_ex_table, \"a\"\n" \
		174	" .align 3\n" \
		175	" .long (" #from " - .), (" #to " - .)\n" \
		176	" .popsection\n"
		177
		178
		179	#define __kvm_at(at_op, addr) \
		180	( { \
		181	int __kvm_at_err = 0; \
		182	u64 spsr, elr; \
		183	asm volatile( \
		184	" mrs %1, spsr_el2\n" \
		185	" mrs %2, elr_el2\n" \
		186	"1: at "at_op", %3\n" \
		187	" isb\n" \
		188	" b 9f\n" \
		189	"2: msr spsr_el2, %1\n" \
		190	" msr elr_el2, %2\n" \
		191	" mov %w0, %4\n" \
		192	"9:\n" \
		193	__KVM_EXTABLE(1b, 2b) \
		194	: "+r" (__kvm_at_err), "=&r" (spsr), "=&r" (elr) \
		195	: "r" (addr), "i" (-EFAULT)); \
		196	__kvm_at_err; \
		197	} )
		198
		199
172	#else /* __ASSEMBLY__ */	200	#else /* __ASSEMBLY__ */
173		201
174	.macro hyp_adr_this_cpu reg, sym, tmp	202	.macro hyp_adr_this_cpu reg, sym, tmp
@@ -193,6 +221,21 @@ extern char __smccc_workaround_1_smc[__SMCCC_WORKAROUND_1_SMC_SZ]; · 18 unmodified lines
193	ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]	221	ldr \vcpu, [\ctxt, #HOST_CONTEXT_VCPU]
194	.endm	222	.endm
195		223
		224	/*
		225	* KVM extable for unexpected exceptions.
		226	* In the same format _asm_extable, but output to a different section so that
		227	* it can be mapped to EL2. The KVM version is not sorted. The caller must
		228	* ensure:
		229	* x18 has the hypervisor value to allow any Shadow-Call-Stack instrumented
		230	* code to write to it, and that SPSR_EL2 and ELR_EL2 are restored by the fixup.
		231	*/
		232	.macro _kvm_extable, from, to
		233	.pushsection __kvm_ex_table, "a"
		234	.align 3
		235	.long (\from - .), (\to - .)
		236	.popsection
		237	.endm
		238
196	#endif	239	#endif
197		240
198	#endif /* __ARM_KVM_ASM_H__ */	241	#endif /* __ARM_KVM_ASM_H__ */

arch/arm64/include/asm/tlbflush.h+4−2

  * not. The macros handles invoking the asm with or without the
  * register argument as appropriate.
  */
-#define __TLBI_0(op, arg) asm ("tlbi " #op "\n"				       \
+#define __TLBI_0(op, arg) asm (ARM64_ASM_PREAMBLE			       \
+			       "tlbi " #op "\n"				       \
 		   ALTERNATIVE("nop\n			nop",		       \
 			       "dsb ish\n		tlbi " #op,	       \
 			       ARM64_WORKAROUND_REPEAT_TLBI,		       \
 			       CONFIG_ARM64_WORKAROUND_REPEAT_TLBI)	       \
 			    : : )
-#define __TLBI_1(op, arg) asm ("tlbi " #op ", %0\n"			       \
+#define __TLBI_1(op, arg) asm (ARM64_ASM_PREAMBLE			       \
+			       "tlbi " #op ", %0\n"			       \
 		   ALTERNATIVE("nop\n			nop",		       \
 			       "dsb ish\n		tlbi " #op ", %0",     \
 			       ARM64_WORKAROUND_REPEAT_TLBI,		       \

arch/arm64/kernel/acpi.c+1−1

@@ -322,7 +322,7 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) · 321 unmodified lines
322	*/	322	*/
323	if (memblock_is_map_memory(phys))	323	if (memblock_is_map_memory(phys))
324	return (void __iomem *)__phys_to_virt(phys);	324	return (void __iomem *)__phys_to_virt(phys);
325	/* fall through */	325	fallthrough;
326		326
327	default:	327	default:
328	if (region->attribute & EFI_MEMORY_WB)	328	if (region->attribute & EFI_MEMORY_WB)

arch/arm64/kernel/cpufeature.c+1−1

@@ -686,7 +686,7 @@ static s64 arm64_ftr_safe_value(const struct arm64_ftr_bits *ftrp, s64 new, · 685 unmodified lines
686	case FTR_HIGHER_OR_ZERO_SAFE:	686	case FTR_HIGHER_OR_ZERO_SAFE:
687	if (!cur \|\| !new)	687	if (!cur \|\| !new)
688	break;	688	break;
689	/* Fallthrough */	689	fallthrough;
690	case FTR_HIGHER_SAFE:	690	case FTR_HIGHER_SAFE:
691	ret = new > cur ? new : cur;	691	ret = new > cur ? new : cur;
692	break;	692	break;

arch/arm64/kernel/cpuinfo.c+0−1

@@ -327,7 +327,6 @@ static void cpuinfo_detect_icache_policy(struct cpuinfo_arm64 *info) · 326 unmodified lines
327	set_bit(ICACHEF_VPIPT, &__icache_flags);	327	set_bit(ICACHEF_VPIPT, &__icache_flags);
328	break;	328	break;
329	default:	329	default:
330	/* Fallthrough */
331	case ICACHE_POLICY_VIPT:	330	case ICACHE_POLICY_VIPT:
332	/* Assume aliasing */	331	/* Assume aliasing */
333	set_bit(ICACHEF_ALIASING, &__icache_flags);	332	set_bit(ICACHEF_ALIASING, &__icache_flags);

arch/arm64/kernel/hw_breakpoint.c+3−3

@@ -257,7 +257,7 @@ static int hw_breakpoint_control(struct perf_event *bp, · 256 unmodified lines
257	* level.	257	* level.
258	*/	258	*/
259	enable_debug_monitors(dbg_el);	259	enable_debug_monitors(dbg_el);
260	/* Fall through */	260	fallthrough;
261	case HW_BREAKPOINT_RESTORE:	261	case HW_BREAKPOINT_RESTORE:
262	/* Setup the address register. */	262	/* Setup the address register. */
263	write_wb_reg(val_reg, i, info->address);	263	write_wb_reg(val_reg, i, info->address);
@@ -541,13 +541,13 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, · 277 unmodified lines
541	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)	541	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2)
542	break;	542	break;
543		543
544	/* Fallthrough */	544	fallthrough;
545	case 3:	545	case 3:
546	/* Allow single byte watchpoint. */	546	/* Allow single byte watchpoint. */
547	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)	547	if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1)
548	break;	548	break;
549		549
550	/* Fallthrough */	550	fallthrough;
551	default:	551	default:
552	return -EINVAL;	552	return -EINVAL;
553	}	553	}

arch/arm64/kernel/image-vars.h+4−0

@@ -103,6 +103,10 @@ KVM_NVHE_ALIAS(vgic_v3_cpuif_trap); · 102 unmodified lines
103	KVM_NVHE_ALIAS(gic_pmr_sync);	103	KVM_NVHE_ALIAS(gic_pmr_sync);
104	#endif	104	#endif
105		105
		106	/* EL2 exception handling */
		107	KVM_NVHE_ALIAS(__start___kvm_ex_table);
		108	KVM_NVHE_ALIAS(__stop___kvm_ex_table);
		109
106	#endif /* CONFIG_KVM */	110	#endif /* CONFIG_KVM */
107		111
108	#endif /* __ARM64_KERNEL_IMAGE_VARS_H */	112	#endif /* __ARM64_KERNEL_IMAGE_VARS_H */

arch/arm64/kernel/module-plts.c+1−2

 			mod->arch.core.plt_shndx = i;
 		else if (!strcmp(secstrings + sechdrs[i].sh_name, ".init.plt"))
 			mod->arch.init.plt_shndx = i;
-		else if (IS_ENABLED(CONFIG_DYNAMIC_FTRACE) &&
+		else if (!strcmp(secstrings + sechdrs[i].sh_name,
-			 !strcmp(secstrings + sechdrs[i].sh_name,
 				 ".text.ftrace_trampoline"))
 			tramp = sechdrs + i;
 		else if (sechdrs[i].sh_type == SHT_SYMTAB)

arch/arm64/kernel/module.c+4−4

@@ -315,21 +315,21 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, · 314 unmodified lines
315	/* MOVW instruction relocations. */	315	/* MOVW instruction relocations. */
316	case R_AARCH64_MOVW_UABS_G0_NC:	316	case R_AARCH64_MOVW_UABS_G0_NC:
317	overflow_check = false;	317	overflow_check = false;
318	/* Fall through */	318	fallthrough;
319	case R_AARCH64_MOVW_UABS_G0:	319	case R_AARCH64_MOVW_UABS_G0:
320	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,	320	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 0,
321	AARCH64_INSN_IMM_MOVKZ);	321	AARCH64_INSN_IMM_MOVKZ);
322	break;	322	break;
323	case R_AARCH64_MOVW_UABS_G1_NC:	323	case R_AARCH64_MOVW_UABS_G1_NC:
324	overflow_check = false;	324	overflow_check = false;
325	/* Fall through */	325	fallthrough;
326	case R_AARCH64_MOVW_UABS_G1:	326	case R_AARCH64_MOVW_UABS_G1:
327	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,	327	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 16,
328	AARCH64_INSN_IMM_MOVKZ);	328	AARCH64_INSN_IMM_MOVKZ);
329	break;	329	break;
330	case R_AARCH64_MOVW_UABS_G2_NC:	330	case R_AARCH64_MOVW_UABS_G2_NC:
331	overflow_check = false;	331	overflow_check = false;
332	/* Fall through */	332	fallthrough;
333	case R_AARCH64_MOVW_UABS_G2:	333	case R_AARCH64_MOVW_UABS_G2:
334	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,	334	ovf = reloc_insn_movw(RELOC_OP_ABS, loc, val, 32,
335	AARCH64_INSN_IMM_MOVKZ);	335	AARCH64_INSN_IMM_MOVKZ);
@@ -397,7 +397,7 @@ int apply_relocate_add(Elf64_Shdr *sechdrs, · 61 unmodified lines
397	break;	397	break;
398	case R_AARCH64_ADR_PREL_PG_HI21_NC:	398	case R_AARCH64_ADR_PREL_PG_HI21_NC:
399	overflow_check = false;	399	overflow_check = false;
400	/* Fall through */	400	fallthrough;
401	case R_AARCH64_ADR_PREL_PG_HI21:	401	case R_AARCH64_ADR_PREL_PG_HI21:
402	ovf = reloc_insn_adrp(me, sechdrs, loc, val);	402	ovf = reloc_insn_adrp(me, sechdrs, loc, val);
403	if (ovf && ovf != -ERANGE)	403	if (ovf && ovf != -ERANGE)

arch/arm64/kernel/process.c+0−2

 	 * This should do all the clock switching and wait for interrupt
 	 * tricks
 	 */
-	trace_cpu_idle_rcuidle(1, smp_processor_id());
 	cpu_do_idle();
 	local_irq_enable();
-	trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 }
 #ifdef CONFIG_HOTPLUG_CPU

arch/arm64/kernel/setup.c+0−1

@@ -280,7 +280,6 @@ u64 cpu_logical_map(int cpu) · 279 unmodified lines
280	{	280	{
281	return __cpu_logical_map[cpu];	281	return __cpu_logical_map[cpu];
282	}	282	}
283	EXPORT_SYMBOL_GPL(cpu_logical_map);
284		283
285	void __init __no_sanitize_address setup_arch(char **cmdline_p)	284	void __init __no_sanitize_address setup_arch(char **cmdline_p)
286	{	285	{

arch/arm64/kernel/smp.c+1−1

@@ -151,7 +151,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) · 150 unmodified lines
151	break;	151	break;
152	}	152	}
153	pr_crit("CPU%u: may not have shut down cleanly\n", cpu);	153	pr_crit("CPU%u: may not have shut down cleanly\n", cpu);
154	/* Fall through */	154	fallthrough;
155	case CPU_STUCK_IN_KERNEL:	155	case CPU_STUCK_IN_KERNEL:
156	pr_crit("CPU%u: is stuck in kernel\n", cpu);	156	pr_crit("CPU%u: is stuck in kernel\n", cpu);
157	if (status & CPU_STUCK_REASON_52_BIT_VA)	157	if (status & CPU_STUCK_REASON_52_BIT_VA)

arch/arm64/kernel/vmlinux.lds.S+8−0

 jiffies = jiffies_64;
+#define HYPERVISOR_EXTABLE					\
+	. = ALIGN(SZ_8);					\
+	__start___kvm_ex_table = .;				\
+	*(__kvm_ex_table)					\
+	__stop___kvm_ex_table = .;
 #define HYPERVISOR_TEXT					\
 	/*						\
 	 * Align to 4 KB so that			\
 	__hyp_idmap_text_end = .;			\
 	__hyp_text_start = .;				\
 	*(.hyp.text)					\
+	HYPERVISOR_EXTABLE				\
 	__hyp_text_end = .;
 #define IDMAP_TEXT					\

arch/arm64/kvm/handle_exit.c+1−1

@@ -128,7 +128,7 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu) · 127 unmodified lines
128	switch (ESR_ELx_EC(esr)) {	128	switch (ESR_ELx_EC(esr)) {
129	case ESR_ELx_EC_WATCHPT_LOW:	129	case ESR_ELx_EC_WATCHPT_LOW:
130	run->debug.arch.far = vcpu->arch.fault.far_el2;	130	run->debug.arch.far = vcpu->arch.fault.far_el2;
131	/* fall through */	131	fallthrough;
132	case ESR_ELx_EC_SOFTSTP_LOW:	132	case ESR_ELx_EC_SOFTSTP_LOW:
133	case ESR_ELx_EC_BREAKPT_LOW:	133	case ESR_ELx_EC_BREAKPT_LOW:
134	case ESR_ELx_EC_BKPT32:	134	case ESR_ELx_EC_BKPT32:

arch/arm64/kvm/hyp/entry.S+9−6

 	// This is our single instruction exception window. A pending
 	// SError is guaranteed to occur at the earliest when we unmask
 	// it, and at the latest just after the ISB.
-	.global	abort_guest_exit_start
 abort_guest_exit_start:
 	isb
-	.global	abort_guest_exit_end
 abort_guest_exit_end:
 	msr	daifset, #4	// Mask aborts
+	ret
+	_kvm_extable	abort_guest_exit_start, 9997f
+	_kvm_extable	abort_guest_exit_end, 9997f
+9997:
+	msr	daifset, #4	// Mask aborts
+	mov	x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
-	// If the exception took place, restore the EL1 exception
+	// restore the EL1 exception context so that we can report some
-	// context so that we can report some information.
+	// information. Merge the exception code with the SError pending bit.
-	// Merge the exception code with the SError pending bit.
-	tbz	x0, #ARM_EXIT_WITH_SERROR_BIT, 1f
 	msr	elr_el2, x2
 	msr	esr_el2, x3
 	msr	spsr_el2, x4

arch/arm64/kvm/hyp/hyp-entry.S+41−24

 #include <asm/kvm_mmu.h>
 #include <asm/mmu.h>
+.macro save_caller_saved_regs_vect
+	/* x0 and x1 were saved in the vector entry */
+	stp	x2, x3,   [sp, #-16]!
+	stp	x4, x5,   [sp, #-16]!
+	stp	x6, x7,   [sp, #-16]!
+	stp	x8, x9,   [sp, #-16]!
+	stp	x10, x11, [sp, #-16]!
+	stp	x12, x13, [sp, #-16]!
+	stp	x14, x15, [sp, #-16]!
+	stp	x16, x17, [sp, #-16]!
+.endm
+.macro restore_caller_saved_regs_vect
+	ldp	x16, x17, [sp], #16
+	ldp	x14, x15, [sp], #16
+	ldp	x12, x13, [sp], #16
+	ldp	x10, x11, [sp], #16
+	ldp	x8, x9,   [sp], #16
+	ldp	x6, x7,   [sp], #16
+	ldp	x4, x5,   [sp], #16
+	ldp	x2, x3,   [sp], #16
+	ldp	x0, x1,   [sp], #16
+.endm
 	.text
 .macro do_el2_call
 	b	__guest_exit
 el2_sync:
-	/* Check for illegal exception return, otherwise panic */
+	/* Check for illegal exception return */
 	mrs	x0, spsr_el2
+	tbnz	x0, #20, 1f
-	/* if this was something else, then panic! */
+	save_caller_saved_regs_vect
-	tst	x0, #PSR_IL_BIT
+	stp     x29, x30, [sp, #-16]!
-	b.eq	__hyp_panic
+	bl	kvm_unexpected_el2_exception
+	ldp     x29, x30, [sp], #16
+	restore_caller_saved_regs_vect
+	eret
+1:
 	/* Let's attempt a recovery from the illegal exception return */
 	get_vcpu_ptr	x1, x0
 	mov	x0, #ARM_EXCEPTION_IL
 el2_error:
-	ldp	x0, x1, [sp], #16
+	save_caller_saved_regs_vect
+	stp     x29, x30, [sp, #-16]!
+	bl	kvm_unexpected_el2_exception
+	ldp     x29, x30, [sp], #16
+	restore_caller_saved_regs_vect
-	/*
-	 * Only two possibilities:
-	 * 1) Either we come from the exit path, having just unmasked
-	 *    PSTATE.A: change the return code to an EL2 fault, and
-	 *    carry on, as we're already in a sane state to handle it.
-	 * 2) Or we come from anywhere else, and that's a bug: we panic.
-	 *
-	 * For (1), x0 contains the original return code and x1 doesn't
-	 * contain anything meaningful at that stage. We can reuse them
-	 * as temp registers.
-	 * For (2), who cares?
-	 */
-	mrs	x0, elr_el2
-	adr	x1, abort_guest_exit_start
-	cmp	x0, x1
-	adr	x1, abort_guest_exit_end
-	ccmp	x0, x1, #4, ne
-	b.ne	__hyp_panic
-	mov	x0, #(1 << ARM_EXIT_WITH_SERROR_BIT)
 	eret
 	sb

arch/arm64/kvm/hyp/include/hyp/debug-sr.h+30−30

@@ -21,70 +21,70 @@ · 20 unmodified lines
21	#define save_debug(ptr,reg,nr) \	21	#define save_debug(ptr,reg,nr) \
22	switch (nr) { \	22	switch (nr) { \
23	case 15: ptr[15] = read_debug(reg, 15); \	23	case 15: ptr[15] = read_debug(reg, 15); \
24	/* Fall through */ \	24	fallthrough; \
25	case 14: ptr[14] = read_debug(reg, 14); \	25	case 14: ptr[14] = read_debug(reg, 14); \
26	/* Fall through */ \	26	fallthrough; \
27	case 13: ptr[13] = read_debug(reg, 13); \	27	case 13: ptr[13] = read_debug(reg, 13); \
28	/* Fall through */ \	28	fallthrough; \
29	case 12: ptr[12] = read_debug(reg, 12); \	29	case 12: ptr[12] = read_debug(reg, 12); \
30	/* Fall through */ \	30	fallthrough; \
31	case 11: ptr[11] = read_debug(reg, 11); \	31	case 11: ptr[11] = read_debug(reg, 11); \
32	/* Fall through */ \	32	fallthrough; \
33	case 10: ptr[10] = read_debug(reg, 10); \	33	case 10: ptr[10] = read_debug(reg, 10); \
34	/* Fall through */ \	34	fallthrough; \
35	case 9: ptr[9] = read_debug(reg, 9); \	35	case 9: ptr[9] = read_debug(reg, 9); \
36	/* Fall through */ \	36	fallthrough; \
37	case 8: ptr[8] = read_debug(reg, 8); \	37	case 8: ptr[8] = read_debug(reg, 8); \
38	/* Fall through */ \	38	fallthrough; \
39	case 7: ptr[7] = read_debug(reg, 7); \	39	case 7: ptr[7] = read_debug(reg, 7); \
40	/* Fall through */ \	40	fallthrough; \
41	case 6: ptr[6] = read_debug(reg, 6); \	41	case 6: ptr[6] = read_debug(reg, 6); \
42	/* Fall through */ \	42	fallthrough; \
43	case 5: ptr[5] = read_debug(reg, 5); \	43	case 5: ptr[5] = read_debug(reg, 5); \
44	/* Fall through */ \	44	fallthrough; \
45	case 4: ptr[4] = read_debug(reg, 4); \	45	case 4: ptr[4] = read_debug(reg, 4); \
46	/* Fall through */ \	46	fallthrough; \
47	case 3: ptr[3] = read_debug(reg, 3); \	47	case 3: ptr[3] = read_debug(reg, 3); \
48	/* Fall through */ \	48	fallthrough; \
49	case 2: ptr[2] = read_debug(reg, 2); \	49	case 2: ptr[2] = read_debug(reg, 2); \
50	/* Fall through */ \	50	fallthrough; \
51	case 1: ptr[1] = read_debug(reg, 1); \	51	case 1: ptr[1] = read_debug(reg, 1); \
52	/* Fall through */ \	52	fallthrough; \
53	default: ptr[0] = read_debug(reg, 0); \	53	default: ptr[0] = read_debug(reg, 0); \
54	}	54	}
55		55
56	#define restore_debug(ptr,reg,nr) \	56	#define restore_debug(ptr,reg,nr) \
57	switch (nr) { \	57	switch (nr) { \
58	case 15: write_debug(ptr[15], reg, 15); \	58	case 15: write_debug(ptr[15], reg, 15); \
59	/* Fall through */ \	59	fallthrough; \
60	case 14: write_debug(ptr[14], reg, 14); \	60	case 14: write_debug(ptr[14], reg, 14); \
61	/* Fall through */ \	61	fallthrough; \
62	case 13: write_debug(ptr[13], reg, 13); \	62	case 13: write_debug(ptr[13], reg, 13); \
63	/* Fall through */ \	63	fallthrough; \
64	case 12: write_debug(ptr[12], reg, 12); \	64	case 12: write_debug(ptr[12], reg, 12); \
65	/* Fall through */ \	65	fallthrough; \
66	case 11: write_debug(ptr[11], reg, 11); \	66	case 11: write_debug(ptr[11], reg, 11); \
67	/* Fall through */ \	67	fallthrough; \
68	case 10: write_debug(ptr[10], reg, 10); \	68	case 10: write_debug(ptr[10], reg, 10); \
69	/* Fall through */ \	69	fallthrough; \
70	case 9: write_debug(ptr[9], reg, 9); \	70	case 9: write_debug(ptr[9], reg, 9); \
71	/* Fall through */ \	71	fallthrough; \
72	case 8: write_debug(ptr[8], reg, 8); \	72	case 8: write_debug(ptr[8], reg, 8); \
73	/* Fall through */ \	73	fallthrough; \
74	case 7: write_debug(ptr[7], reg, 7); \	74	case 7: write_debug(ptr[7], reg, 7); \
75	/* Fall through */ \	75	fallthrough; \
76	case 6: write_debug(ptr[6], reg, 6); \	76	case 6: write_debug(ptr[6], reg, 6); \
77	/* Fall through */ \	77	fallthrough; \
78	case 5: write_debug(ptr[5], reg, 5); \	78	case 5: write_debug(ptr[5], reg, 5); \
79	/* Fall through */ \	79	fallthrough; \
80	case 4: write_debug(ptr[4], reg, 4); \	80	case 4: write_debug(ptr[4], reg, 4); \
81	/* Fall through */ \	81	fallthrough; \
82	case 3: write_debug(ptr[3], reg, 3); \	82	case 3: write_debug(ptr[3], reg, 3); \
83	/* Fall through */ \	83	fallthrough; \
84	case 2: write_debug(ptr[2], reg, 2); \	84	case 2: write_debug(ptr[2], reg, 2); \
85	/* Fall through */ \	85	fallthrough; \
86	case 1: write_debug(ptr[1], reg, 1); \	86	case 1: write_debug(ptr[1], reg, 1); \
87	/* Fall through */ \	87	fallthrough; \
88	default: write_debug(ptr[0], reg, 0); \	88	default: write_debug(ptr[0], reg, 0); \
89	}	89	}
90		90

arch/arm64/kvm/hyp/include/hyp/switch.h+35−4

@@ -17,6 +17,7 @@ · 16 unmodified lines
17		17
18	#include <asm/barrier.h>	18	#include <asm/barrier.h>
19	#include <asm/cpufeature.h>	19	#include <asm/cpufeature.h>
		20	#include <asm/extable.h>
20	#include <asm/kprobes.h>	21	#include <asm/kprobes.h>
21	#include <asm/kvm_asm.h>	22	#include <asm/kvm_asm.h>
22	#include <asm/kvm_emulate.h>	23	#include <asm/kvm_emulate.h>
@@ -29,6 +30,9 @@ · 6 unmodified lines
29		30
30	extern const char __hyp_panic_string[];	31	extern const char __hyp_panic_string[];
31		32
		33	extern struct exception_table_entry __start___kvm_ex_table;
		34	extern struct exception_table_entry __stop___kvm_ex_table;
		35
32	/* Check whether the FP regs were dirtied while in the host-side run loop: */	36	/* Check whether the FP regs were dirtied while in the host-side run loop: */
33	static inline bool update_fp_enabled(struct kvm_vcpu *vcpu)	37	static inline bool update_fp_enabled(struct kvm_vcpu *vcpu)
34	{	38	{
@@ -142,10 +146,10 @@ static inline bool __translate_far_to_hpfar(u64 far, u64 *hpfar) · 107 unmodified lines
142	* saved the guest context yet, and we may return early...	146	* saved the guest context yet, and we may return early...
143	*/	147	*/
144	par = read_sysreg(par_el1);	148	par = read_sysreg(par_el1);
145	asm volatile("at s1e1r, %0" : : "r" (far));	149	if (!__kvm_at("s1e1r", far))
146	isb();	150	tmp = read_sysreg(par_el1);
147		151	else
148	tmp = read_sysreg(par_el1);	152	tmp = SYS_PAR_EL1_F; /* back to the guest */
149	write_sysreg(par, par_el1);	153	write_sysreg(par, par_el1);
150		154
151	if (unlikely(tmp & SYS_PAR_EL1_F))	155	if (unlikely(tmp & SYS_PAR_EL1_F))
@@ -508,4 +512,31 @@ static inline void __set_host_arch_workaround_state(struct kvm_vcpu *vcpu) · 356 unmodified lines
508	#endif	512	#endif
509	}	513	}
510		514
		515	static inline void __kvm_unexpected_el2_exception(void)
		516	{
		517	unsigned long addr, fixup;
		518	struct kvm_cpu_context *host_ctxt;
		519	struct exception_table_entry entry, end;
		520	unsigned long elr_el2 = read_sysreg(elr_el2);
		521
		522	entry = hyp_symbol_addr(__start___kvm_ex_table);
		523	end = hyp_symbol_addr(__stop___kvm_ex_table);
		524	host_ctxt = &__hyp_this_cpu_ptr(kvm_host_data)->host_ctxt;
		525
		526	while (entry < end) {
		527	addr = (unsigned long)&entry->insn + entry->insn;
		528	fixup = (unsigned long)&entry->fixup + entry->fixup;
		529
		530	if (addr != elr_el2) {
		531	entry++;
		532	continue;
		533	}
		534
		535	write_sysreg(fixup, elr_el2);
		536	return;
		537	}
		538
		539	hyp_panic(host_ctxt);
		540	}
		541
511	#endif /* __ARM64_KVM_HYP_SWITCH_H__ */	542	#endif /* __ARM64_KVM_HYP_SWITCH_H__ */

arch/arm64/kvm/hyp/nvhe/switch.c+5−0

@@ -270,3 +270,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt) · 269 unmodified lines
270	read_sysreg(hpfar_el2), par, vcpu);	270	read_sysreg(hpfar_el2), par, vcpu);
271	unreachable();	271	unreachable();
272	}	272	}
		273
		274	asmlinkage void kvm_unexpected_el2_exception(void)
		275	{
		276	return __kvm_unexpected_el2_exception();
		277	}

arch/arm64/kvm/hyp/vgic-v3-sr.c+8−8

@@ -340,10 +340,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if) · 339 unmodified lines
340	case 7:	340	case 7:
341	cpu_if->vgic_ap0r[3] = __vgic_v3_read_ap0rn(3);	341	cpu_if->vgic_ap0r[3] = __vgic_v3_read_ap0rn(3);
342	cpu_if->vgic_ap0r[2] = __vgic_v3_read_ap0rn(2);	342	cpu_if->vgic_ap0r[2] = __vgic_v3_read_ap0rn(2);
343	/* Fall through */	343	fallthrough;
344	case 6:	344	case 6:
345	cpu_if->vgic_ap0r[1] = __vgic_v3_read_ap0rn(1);	345	cpu_if->vgic_ap0r[1] = __vgic_v3_read_ap0rn(1);
346	/* Fall through */	346	fallthrough;
347	default:	347	default:
348	cpu_if->vgic_ap0r[0] = __vgic_v3_read_ap0rn(0);	348	cpu_if->vgic_ap0r[0] = __vgic_v3_read_ap0rn(0);
349	}	349	}
@@ -352,10 +352,10 @@ void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if) · 2 unmodified lines
352	case 7:	352	case 7:
353	cpu_if->vgic_ap1r[3] = __vgic_v3_read_ap1rn(3);	353	cpu_if->vgic_ap1r[3] = __vgic_v3_read_ap1rn(3);
354	cpu_if->vgic_ap1r[2] = __vgic_v3_read_ap1rn(2);	354	cpu_if->vgic_ap1r[2] = __vgic_v3_read_ap1rn(2);
355	/* Fall through */	355	fallthrough;
356	case 6:	356	case 6:
357	cpu_if->vgic_ap1r[1] = __vgic_v3_read_ap1rn(1);	357	cpu_if->vgic_ap1r[1] = __vgic_v3_read_ap1rn(1);
358	/* Fall through */	358	fallthrough;
359	default:	359	default:
360	cpu_if->vgic_ap1r[0] = __vgic_v3_read_ap1rn(0);	360	cpu_if->vgic_ap1r[0] = __vgic_v3_read_ap1rn(0);
361	}	361	}
@@ -373,10 +373,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if) · 11 unmodified lines
373	case 7:	373	case 7:
374	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[3], 3);	374	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[3], 3);
375	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[2], 2);	375	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[2], 2);
376	/* Fall through */	376	fallthrough;
377	case 6:	377	case 6:
378	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[1], 1);	378	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[1], 1);
379	/* Fall through */	379	fallthrough;
380	default:	380	default:
381	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[0], 0);	381	__vgic_v3_write_ap0rn(cpu_if->vgic_ap0r[0], 0);
382	}	382	}
@@ -385,10 +385,10 @@ void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if) · 2 unmodified lines
385	case 7:	385	case 7:
386	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[3], 3);	386	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[3], 3);
387	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[2], 2);	387	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[2], 2);
388	/* Fall through */	388	fallthrough;
389	case 6:	389	case 6:
390	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[1], 1);	390	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[1], 1);
391	/* Fall through */	391	fallthrough;
392	default:	392	default:
393	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[0], 0);	393	__vgic_v3_write_ap1rn(cpu_if->vgic_ap1r[0], 0);
394	}	394	}

arch/arm64/kvm/hyp/vhe/switch.c+5−0

@@ -217,3 +217,8 @@ void __noreturn hyp_panic(struct kvm_cpu_context *host_ctxt) · 216 unmodified lines
217	__hyp_call_panic(spsr, elr, par, host_ctxt);	217	__hyp_call_panic(spsr, elr, par, host_ctxt);
218	unreachable();	218	unreachable();
219	}	219	}
		220
		221	asmlinkage void kvm_unexpected_el2_exception(void)
		222	{
		223	return __kvm_unexpected_el2_exception();
		224	}

arch/arm64/mm/context.c+1−1

@@ -45,7 +45,7 @@ static u32 get_cpu_asid_bits(void) · 44 unmodified lines
45	default:	45	default:
46	pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",	46	pr_warn("CPU%d: Unknown ASID size (%d); assuming 8-bit\n",
47	smp_processor_id(), fld);	47	smp_processor_id(), fld);
48	/* Fallthrough */	48	fallthrough;
49	case 0:	49	case 0:
50	asid = 8;	50	asid = 8;
51	break;	51	break;

arch/c6x/kernel/signal.c+2−2

@@ -220,7 +220,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka, int has_handler) · 219 unmodified lines
220	regs->a4 = -EINTR;	220	regs->a4 = -EINTR;
221	break;	221	break;
222	}	222	}
223	/* fallthrough */	223	fallthrough;
224	case -ERESTARTNOINTR:	224	case -ERESTARTNOINTR:
225	do_restart:	225	do_restart:
226	regs->a4 = regs->orig_a4;	226	regs->a4 = regs->orig_a4;
@@ -252,7 +252,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs, · 25 unmodified lines
252	break;	252	break;
253	}	253	}
254		254
255	/* fallthrough */	255	fallthrough;
256	case -ERESTARTNOINTR:	256	case -ERESTARTNOINTR:
257	regs->a4 = regs->orig_a4;	257	regs->a4 = regs->orig_a4;
258	regs->pc -= 4;	258	regs->pc -= 4;

arch/csky/kernel/signal.c+1−1

@@ -194,7 +194,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 193 unmodified lines
194	regs->a0 = -EINTR;	194	regs->a0 = -EINTR;
195	break;	195	break;
196	}	196	}
197	/* fallthrough */	197	fallthrough;
198	case -ERESTARTNOINTR:	198	case -ERESTARTNOINTR:
199	regs->a0 = regs->orig_a0;	199	regs->a0 = regs->orig_a0;
200	regs->pc -= TRAP0_SIZE;	200	regs->pc -= TRAP0_SIZE;

arch/h8300/kernel/signal.c+1−1

@@ -227,7 +227,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka) · 226 unmodified lines
227	regs->er0 = -EINTR;	227	regs->er0 = -EINTR;
228	break;	228	break;
229	}	229	}
230	/* fallthrough */	230	fallthrough;
231	case -ERESTARTNOINTR:	231	case -ERESTARTNOINTR:
232	do_restart:	232	do_restart:
233	regs->er0 = regs->orig_er0;	233	regs->er0 = regs->orig_er0;

arch/hexagon/kernel/module.c+1−1

@@ -120,7 +120,7 @@ int apply_relocate_add(Elf_Shdr sechdrs, const char strtab, · 119 unmodified lines
120	}	120	}
121	case R_HEXAGON_HI16:	121	case R_HEXAGON_HI16:
122	value = (value>>16) & 0xffff;	122	value = (value>>16) & 0xffff;
123	/* fallthrough */	123	fallthrough;
124	case R_HEXAGON_LO16:	124	case R_HEXAGON_LO16:
125	*location &= ~0x00c03fff;	125	*location &= ~0x00c03fff;
126	*location \|= value & 0x3fff;	126	*location \|= value & 0x3fff;

arch/hexagon/kernel/signal.c+1−1

@@ -155,7 +155,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 154 unmodified lines
155	regs->r00 = -EINTR;	155	regs->r00 = -EINTR;
156	break;	156	break;
157	}	157	}
158	/* Fall through */	158	fallthrough;
159	case -ERESTARTNOINTR:	159	case -ERESTARTNOINTR:
160	regs->r06 = regs->syscall_nr;	160	regs->r06 = regs->syscall_nr;
161	pt_set_elr(regs, pt_elr(regs) - 4);	161	pt_set_elr(regs, pt_elr(regs) - 4);

arch/ia64/kernel/crash.c+1−1

@@ -163,7 +163,7 @@ kdump_init_notifier(struct notifier_block self, unsigned long val, void data) · 162 unmodified lines
163	case DIE_INIT_MONARCH_LEAVE:	163	case DIE_INIT_MONARCH_LEAVE:
164	if (!kdump_freeze_monarch)	164	if (!kdump_freeze_monarch)
165	break;	165	break;
166	/* fall through */	166	fallthrough;
167	case DIE_INIT_SLAVE_LEAVE:	167	case DIE_INIT_SLAVE_LEAVE:
168	case DIE_INIT_MONARCH_ENTER:	168	case DIE_INIT_MONARCH_ENTER:
169	case DIE_MCA_RENDZVOUS_LEAVE:	169	case DIE_MCA_RENDZVOUS_LEAVE:

arch/ia64/kernel/ia64_ksyms.c+1−1

@@ -3,7 +3,7 @@ · 2 unmodified lines
3	* Architecture-specific kernel symbols	3	* Architecture-specific kernel symbols
4	*/	4	*/
5		5
6	#ifdef CONFIG_VIRTUAL_MEM_MAP	6	#if defined(CONFIG_VIRTUAL_MEM_MAP) \|\| defined(CONFIG_DISCONTIGMEM)
7	#include <linux/compiler.h>	7	#include <linux/compiler.h>
8	#include <linux/export.h>	8	#include <linux/export.h>
9	#include <linux/memblock.h>	9	#include <linux/memblock.h>

arch/ia64/kernel/module.c+1−1

@@ -654,7 +654,7 @@ do_reloc (struct module mod, uint8_t r_type, Elf64_Sym sym, uint64_t addend, · 653 unmodified lines
654	}	654	}
655	} else if (!is_internal(mod, val))	655	} else if (!is_internal(mod, val))
656	val = get_plt(mod, location, val, &ok);	656	val = get_plt(mod, location, val, &ok);
657	/* FALL THROUGH */	657	fallthrough;
658	default:	658	default:
659	val -= bundle(location);	659	val -= bundle(location);
660	break;	660	break;

arch/ia64/kernel/perfmon.c+1−1

@@ -3472,7 +3472,7 @@ pfm_restart(pfm_context_t ctx, void arg, int count, struct pt_regs *regs) · 3471 unmodified lines
3472	break;	3472	break;
3473	case PFM_CTX_LOADED:	3473	case PFM_CTX_LOADED:
3474	if (CTX_HAS_SMPL(ctx) && fmt->fmt_restart_active) break;	3474	if (CTX_HAS_SMPL(ctx) && fmt->fmt_restart_active) break;
3475	/* fall through */	3475	fallthrough;
3476	case PFM_CTX_UNLOADED:	3476	case PFM_CTX_UNLOADED:
3477	case PFM_CTX_ZOMBIE:	3477	case PFM_CTX_ZOMBIE:
3478	DPRINT(("invalid state=%d\n", state));	3478	DPRINT(("invalid state=%d\n", state));

arch/ia64/kernel/signal.c+1−1

@@ -374,7 +374,7 @@ ia64_do_signal (struct sigscratch *scr, long in_syscall) · 373 unmodified lines
374	/* note: scr->pt.r10 is already -1 */	374	/* note: scr->pt.r10 is already -1 */
375	break;	375	break;
376	}	376	}
377	/FALLTHRU/	377	fallthrough;
378	case ERESTARTNOINTR:	378	case ERESTARTNOINTR:
379	ia64_decrement_ip(&scr->pt);	379	ia64_decrement_ip(&scr->pt);
380	restart = 0; /* don't restart twice if handle_signal() fails... */	380	restart = 0; /* don't restart twice if handle_signal() fails... */

arch/ia64/kernel/unaligned.c+3−3

@@ -1431,7 +1431,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) · 1430 unmodified lines
1431	if (u.insn.x)	1431	if (u.insn.x)
1432	/* oops, really a semaphore op (cmpxchg, etc) */	1432	/* oops, really a semaphore op (cmpxchg, etc) */
1433	goto failure;	1433	goto failure;
1434	/FALLTHRU/	1434	fallthrough;
1435	case LDS_IMM_OP:	1435	case LDS_IMM_OP:
1436	case LDSA_IMM_OP:	1436	case LDSA_IMM_OP:
1437	case LDFS_OP:	1437	case LDFS_OP:
@@ -1459,7 +1459,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) · 21 unmodified lines
1459	if (u.insn.x)	1459	if (u.insn.x)
1460	/* oops, really a semaphore op (cmpxchg, etc) */	1460	/* oops, really a semaphore op (cmpxchg, etc) */
1461	goto failure;	1461	goto failure;
1462	/FALLTHRU/	1462	fallthrough;
1463	case LD_IMM_OP:	1463	case LD_IMM_OP:
1464	case LDA_IMM_OP:	1464	case LDA_IMM_OP:
1465	case LDBIAS_IMM_OP:	1465	case LDBIAS_IMM_OP:
@@ -1475,7 +1475,7 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs) · 9 unmodified lines
1475	if (u.insn.x)	1475	if (u.insn.x)
1476	/* oops, really a semaphore op (cmpxchg, etc) */	1476	/* oops, really a semaphore op (cmpxchg, etc) */
1477	goto failure;	1477	goto failure;
1478	/FALLTHRU/	1478	fallthrough;
1479	case ST_IMM_OP:	1479	case ST_IMM_OP:
1480	case STREL_IMM_OP:	1480	case STREL_IMM_OP:
1481	ret = emulate_store_int(ifa, u.insn, regs);	1481	ret = emulate_store_int(ifa, u.insn, regs);

arch/ia64/kernel/unwind.c+1−1

@@ -324,7 +324,7 @@ unw_access_gr (struct unw_frame_info info, int regnum, unsigned long val, char · 323 unmodified lines
324	return 0;	324	return 0;
325	}	325	}
326	}	326	}
327	/* fall through */	327	fallthrough;
328	case UNW_NAT_NONE:	328	case UNW_NAT_NONE:
329	dummy_nat = 0;	329	dummy_nat = 0;
330	nat_addr = &dummy_nat;	330	nat_addr = &dummy_nat;

arch/m68k/atari/atakeyb.c+1−1

@@ -207,7 +207,7 @@ repeat: · 206 unmodified lines
207	self_test_last_rcv = jiffies;	207	self_test_last_rcv = jiffies;
208	break;	208	break;
209	}	209	}
210	/* FALL THROUGH */	210	fallthrough;
211		211
212	default:	212	default:
213	break_flag = scancode & BREAK_MASK;	213	break_flag = scancode & BREAK_MASK;

arch/m68k/kernel/signal.c+1−1

@@ -1067,7 +1067,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka, int has_handler) · 1066 unmodified lines
1067	regs->d0 = -EINTR;	1067	regs->d0 = -EINTR;
1068	break;	1068	break;
1069	}	1069	}
1070	/* fallthrough */	1070	fallthrough;
1071	case -ERESTARTNOINTR:	1071	case -ERESTARTNOINTR:
1072	do_restart:	1072	do_restart:
1073	regs->d0 = regs->orig_d0;	1073	regs->d0 = regs->orig_d0;

arch/m68k/mac/config.c+1−1

@@ -1018,7 +1018,7 @@ int __init mac_platform_init(void) · 1017 unmodified lines
1018	*/	1018	*/
1019	platform_device_register_simple("mac_scsi", 1,	1019	platform_device_register_simple("mac_scsi", 1,
1020	mac_scsi_duo_rsrc, ARRAY_SIZE(mac_scsi_duo_rsrc));	1020	mac_scsi_duo_rsrc, ARRAY_SIZE(mac_scsi_duo_rsrc));
1021	/* fall through */	1021	fallthrough;
1022	case MAC_SCSI_OLD:	1022	case MAC_SCSI_OLD:
1023	/* Addresses from Developer Notes for Duo System,	1023	/* Addresses from Developer Notes for Duo System,
1024	* PowerBook 180 & 160, 140 & 170, Macintosh IIsi	1024	* PowerBook 180 & 160, 140 & 170, Macintosh IIsi

arch/m68k/mac/via.c+1−1

@@ -370,7 +370,7 @@ void via_nubus_irq_startup(int irq) · 369 unmodified lines
370	/* Allow NuBus slots 9 through F. */	370	/* Allow NuBus slots 9 through F. */
371	via2[vDirA] &= 0x80 \| ~(1 << irq_idx);	371	via2[vDirA] &= 0x80 \| ~(1 << irq_idx);
372	}	372	}
373	/* fall through */	373	fallthrough;
374	case MAC_VIA_IICI:	374	case MAC_VIA_IICI:
375	via_irq_enable(irq);	375	via_irq_enable(irq);
376	break;	376	break;

arch/m68k/mm/fault.c+1−1

@@ -118,7 +118,7 @@ good_area: · 117 unmodified lines
118	pr_debug("do_page_fault: good_area\n");	118	pr_debug("do_page_fault: good_area\n");
119	switch (error_code & 3) {	119	switch (error_code & 3) {
120	default: /* 3: write, present */	120	default: /* 3: write, present */
121	/* fall through */	121	fallthrough;
122	case 2: /* write, not present */	122	case 2: /* write, not present */
123	if (!(vma->vm_flags & VM_WRITE))	123	if (!(vma->vm_flags & VM_WRITE))
124	goto acc_err;	124	goto acc_err;

arch/microblaze/kernel/signal.c+1−1

@@ -249,7 +249,7 @@ handle_restart(struct pt_regs regs, struct k_sigaction ka, int has_handler) · 248 unmodified lines
249	regs->r3 = -EINTR;	249	regs->r3 = -EINTR;
250	break;	250	break;
251	}	251	}
252	/* fallthrough */	252	fallthrough;
253	case -ERESTARTNOINTR:	253	case -ERESTARTNOINTR:
254	do_restart:	254	do_restart:
255	/* offset of 4 bytes to re-execute trap (brki) instruction */	255	/* offset of 4 bytes to re-execute trap (brki) instruction */

arch/microblaze/mm/init.c+3−0

@@ -46,6 +46,9 @@ unsigned long memory_size; · 45 unmodified lines
46	EXPORT_SYMBOL(memory_size);	46	EXPORT_SYMBOL(memory_size);
47	unsigned long lowmem_size;	47	unsigned long lowmem_size;
48		48
		49	EXPORT_SYMBOL(min_low_pfn);
		50	EXPORT_SYMBOL(max_low_pfn);
		51
49	#ifdef CONFIG_HIGHMEM	52	#ifdef CONFIG_HIGHMEM
50	pte_t *kmap_pte;	53	pte_t *kmap_pte;
51	EXPORT_SYMBOL(kmap_pte);	54	EXPORT_SYMBOL(kmap_pte);

arch/mips/include/asm/irqflags.h+5−0

 	return !(flags & 1);
 }
+static inline int arch_irqs_disabled(void)
+{
+	return arch_irqs_disabled_flags(arch_local_save_flags());
+}
 #endif /* #ifndef __ASSEMBLY__ */
 /*

arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h+0−2

 #define cpu_has_counter		1
 #define cpu_has_dc_aliases	(PAGE_SIZE < 0x4000)
 #define cpu_has_divec		0
-#define cpu_has_ejtag		0
 #define cpu_has_inclusive_pcaches	1
 #define cpu_has_llsc		1
 #define cpu_has_mcheck		0
 #define cpu_has_veic		0
 #define cpu_has_vint		0
 #define cpu_has_vtag_icache	0
-#define cpu_has_watch		1
 #define cpu_has_wsbh		1
 #define cpu_has_ic_fills_f_dc	1
 #define cpu_hwrena_impl_bits	0xc0000000

arch/mips/include/asm/mach-loongson64/irq.h+0−2

@@ -2,8 +2,6 @@ · 1 unmodified line
2	#ifndef __ASM_MACH_LOONGSON64_IRQ_H_	2	#ifndef __ASM_MACH_LOONGSON64_IRQ_H_
3	#define __ASM_MACH_LOONGSON64_IRQ_H_	3	#define __ASM_MACH_LOONGSON64_IRQ_H_
4		4
5	#include <boot_param.h>
6
7	/* cpu core interrupt numbers */	5	/* cpu core interrupt numbers */
8	#define NR_IRQS_LEGACY 16	6	#define NR_IRQS_LEGACY 16
9	#define NR_MIPS_CPU_IRQS 8	7	#define NR_MIPS_CPU_IRQS 8

arch/mips/include/asm/mach-loongson64/mmzone.h+0−1

@@ -9,7 +9,6 @@ · 8 unmodified lines
9	#ifndef _ASM_MACH_LOONGSON64_MMZONE_H	9	#ifndef _ASM_MACH_LOONGSON64_MMZONE_H
10	#define _ASM_MACH_LOONGSON64_MMZONE_H	10	#define _ASM_MACH_LOONGSON64_MMZONE_H
11		11
12	#include <boot_param.h>
13	#define NODE_ADDRSPACE_SHIFT 44	12	#define NODE_ADDRSPACE_SHIFT 44
14	#define NODE0_ADDRSPACE_OFFSET 0x000000000000UL	13	#define NODE0_ADDRSPACE_OFFSET 0x000000000000UL
15	#define NODE1_ADDRSPACE_OFFSET 0x100000000000UL	14	#define NODE1_ADDRSPACE_OFFSET 0x100000000000UL

arch/mips/include/asm/unroll.h+32−32

@@ -28,38 +28,38 @@ · 27 unmodified lines
28	BUILD_BUG_ON(!__builtin_constant_p(times)); \	28	BUILD_BUG_ON(!__builtin_constant_p(times)); \
29	\	29	\
30	switch (times) { \	30	switch (times) { \
31	case 32: fn(__VA_ARGS__); /* fall through */ \	31	case 32: fn(__VA_ARGS__); fallthrough; \
32	case 31: fn(__VA_ARGS__); /* fall through */ \	32	case 31: fn(__VA_ARGS__); fallthrough; \
33	case 30: fn(__VA_ARGS__); /* fall through */ \	33	case 30: fn(__VA_ARGS__); fallthrough; \
34	case 29: fn(__VA_ARGS__); /* fall through */ \	34	case 29: fn(__VA_ARGS__); fallthrough; \
35	case 28: fn(__VA_ARGS__); /* fall through */ \	35	case 28: fn(__VA_ARGS__); fallthrough; \
36	case 27: fn(__VA_ARGS__); /* fall through */ \	36	case 27: fn(__VA_ARGS__); fallthrough; \
37	case 26: fn(__VA_ARGS__); /* fall through */ \	37	case 26: fn(__VA_ARGS__); fallthrough; \
38	case 25: fn(__VA_ARGS__); /* fall through */ \	38	case 25: fn(__VA_ARGS__); fallthrough; \
39	case 24: fn(__VA_ARGS__); /* fall through */ \	39	case 24: fn(__VA_ARGS__); fallthrough; \
40	case 23: fn(__VA_ARGS__); /* fall through */ \	40	case 23: fn(__VA_ARGS__); fallthrough; \
41	case 22: fn(__VA_ARGS__); /* fall through */ \	41	case 22: fn(__VA_ARGS__); fallthrough; \
42	case 21: fn(__VA_ARGS__); /* fall through */ \	42	case 21: fn(__VA_ARGS__); fallthrough; \
43	case 20: fn(__VA_ARGS__); /* fall through */ \	43	case 20: fn(__VA_ARGS__); fallthrough; \
44	case 19: fn(__VA_ARGS__); /* fall through */ \	44	case 19: fn(__VA_ARGS__); fallthrough; \
45	case 18: fn(__VA_ARGS__); /* fall through */ \	45	case 18: fn(__VA_ARGS__); fallthrough; \
46	case 17: fn(__VA_ARGS__); /* fall through */ \	46	case 17: fn(__VA_ARGS__); fallthrough; \
47	case 16: fn(__VA_ARGS__); /* fall through */ \	47	case 16: fn(__VA_ARGS__); fallthrough; \
48	case 15: fn(__VA_ARGS__); /* fall through */ \	48	case 15: fn(__VA_ARGS__); fallthrough; \
49	case 14: fn(__VA_ARGS__); /* fall through */ \	49	case 14: fn(__VA_ARGS__); fallthrough; \
50	case 13: fn(__VA_ARGS__); /* fall through */ \	50	case 13: fn(__VA_ARGS__); fallthrough; \
51	case 12: fn(__VA_ARGS__); /* fall through */ \	51	case 12: fn(__VA_ARGS__); fallthrough; \
52	case 11: fn(__VA_ARGS__); /* fall through */ \	52	case 11: fn(__VA_ARGS__); fallthrough; \
53	case 10: fn(__VA_ARGS__); /* fall through */ \	53	case 10: fn(__VA_ARGS__); fallthrough; \
54	case 9: fn(__VA_ARGS__); /* fall through */ \	54	case 9: fn(__VA_ARGS__); fallthrough; \
55	case 8: fn(__VA_ARGS__); /* fall through */ \	55	case 8: fn(__VA_ARGS__); fallthrough; \
56	case 7: fn(__VA_ARGS__); /* fall through */ \	56	case 7: fn(__VA_ARGS__); fallthrough; \
57	case 6: fn(__VA_ARGS__); /* fall through */ \	57	case 6: fn(__VA_ARGS__); fallthrough; \
58	case 5: fn(__VA_ARGS__); /* fall through */ \	58	case 5: fn(__VA_ARGS__); fallthrough; \
59	case 4: fn(__VA_ARGS__); /* fall through */ \	59	case 4: fn(__VA_ARGS__); fallthrough; \
60	case 3: fn(__VA_ARGS__); /* fall through */ \	60	case 3: fn(__VA_ARGS__); fallthrough; \
61	case 2: fn(__VA_ARGS__); /* fall through */ \	61	case 2: fn(__VA_ARGS__); fallthrough; \
62	case 1: fn(__VA_ARGS__); /* fall through */ \	62	case 1: fn(__VA_ARGS__); fallthrough; \
63	case 0: break; \	63	case 0: break; \
64	\	64	\
65	default: \	65	default: \

arch/mips/kernel/perf_event_mipsxx.c+2−2

@@ -1898,8 +1898,8 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config) · 1897 unmodified lines
1898	(base_id >= 64 && base_id < 90) \|\|	1898	(base_id >= 64 && base_id < 90) \|\|
1899	(base_id >= 128 && base_id < 164) \|\|	1899	(base_id >= 128 && base_id < 164) \|\|
1900	(base_id >= 192 && base_id < 200) \|\|	1900	(base_id >= 192 && base_id < 200) \|\|
1901	(base_id >= 256 && base_id < 274) \|\|	1901	(base_id >= 256 && base_id < 275) \|\|
1902	(base_id >= 320 && base_id < 358) \|\|	1902	(base_id >= 320 && base_id < 361) \|\|
1903	(base_id >= 384 && base_id < 574))	1903	(base_id >= 384 && base_id < 574))
1904	break;	1904	break;
1905		1905

arch/mips/kernel/smp-bmips.c+2−0

@@ -239,6 +239,8 @@ static int bmips_boot_secondary(int cpu, struct task_struct *idle) · 238 unmodified lines
239	*/	239	*/
240	static void bmips_init_secondary(void)	240	static void bmips_init_secondary(void)
241	{	241	{
		242	bmips_cpu_setup();
		243
242	switch (current_cpu_type()) {	244	switch (current_cpu_type()) {
243	case CPU_BMIPS4350:	245	case CPU_BMIPS4350:
244	case CPU_BMIPS4380:	246	case CPU_BMIPS4380:

arch/mips/kernel/traps.c+12−0

@@ -1287,6 +1287,18 @@ static int enable_restore_fp_context(int msa) · 1286 unmodified lines
1287	err = own_fpu_inatomic(1);	1287	err = own_fpu_inatomic(1);
1288	if (msa && !err) {	1288	if (msa && !err) {
1289	enable_msa();	1289	enable_msa();
		1290	/*
		1291	* with MSA enabled, userspace can see MSACSR
		1292	* and MSA regs, but the values in them are from
		1293	* other task before current task, restore them
		1294	* from saved fp/msa context
		1295	*/
		1296	write_msa_csr(current->thread.fpu.msacsr);
		1297	/*
		1298	* own_fpu_inatomic(1) just restore low 64bit,
		1299	* fix the high 64bit
		1300	*/
		1301	init_msa_upper();
1290	set_thread_flag(TIF_USEDMSA);	1302	set_thread_flag(TIF_USEDMSA);
1291	set_thread_flag(TIF_MSA_CTX_LIVE);	1303	set_thread_flag(TIF_MSA_CTX_LIVE);
1292	}	1304	}

arch/mips/mm/c-r4k.c+4−0

 				printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
 				       scache_size >> 10,
 				       way_string[c->scache.ways], c->scache.linesz);
+				if (current_cpu_type() == CPU_BMIPS5000)
+					c->options |= MIPS_CPU_INCLUSIVE_CACHES;
 			}
 #else
 			if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
 				panic("Dunno how to handle MIPS32 / MIPS64 second level cache");

arch/mips/oprofile/op_model_mipsxx.c+3−1

 	switch (counters) {
 #define HANDLE_COUNTER(n)						\
-	fallthrough;							\
 	case n + 1:							\
 		control = r_c0_perfctrl ## n();				\
 		counter = r_c0_perfcntr ## n();				\
 			handled = IRQ_HANDLED;				\
 		}
 	HANDLE_COUNTER(3)
+	fallthrough;
 	HANDLE_COUNTER(2)
+	fallthrough;
 	HANDLE_COUNTER(1)
+	fallthrough;
 	HANDLE_COUNTER(0)
 	}

arch/mips/sni/a20r.c+2−2

@@ -222,8 +222,8 @@ void __init sni_a20r_irq_init(void) · 221 unmodified lines
222	irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq);	222	irq_set_chip_and_handler(i, &a20r_irq_type, handle_level_irq);
223	sni_hwint = a20r_hwint;	223	sni_hwint = a20r_hwint;
224	change_c0_status(ST0_IM, IE_IRQ0);	224	change_c0_status(ST0_IM, IE_IRQ0);
225	if (request_irq(SNI_A20R_IRQ_BASE + 3, sni_isa_irq_handler, 0, "ISA",	225	if (request_irq(SNI_A20R_IRQ_BASE + 3, sni_isa_irq_handler,
226	NULL))	226	IRQF_SHARED, "ISA", sni_isa_irq_handler))
227	pr_err("Failed to register ISA interrupt\n");	227	pr_err("Failed to register ISA interrupt\n");
228	}	228	}
229		229

arch/nds32/include/asm/irqflags.h+5−0

@@ -34,3 +34,8 @@ static inline int arch_irqs_disabled_flags(unsigned long flags) · 33 unmodified lines
34	{	34	{
35	return !flags;	35	return !flags;
36	}	36	}
		37
		38	static inline int arch_irqs_disabled(void)
		39	{
		40	return arch_irqs_disabled_flags(arch_local_save_flags());
		41	}

arch/nds32/kernel/fpu.c+6−6

@@ -45,7 +45,7 @@ void save_fpu(struct task_struct *tsk) · 44 unmodified lines
45	: /* no output */	45	: /* no output */
46	: "r" (&tsk->thread.fpu)	46	: "r" (&tsk->thread.fpu)
47	: "memory");	47	: "memory");
48	/* fall through */	48	fallthrough;
49	case SP32_DP16_reg:	49	case SP32_DP16_reg:
50	asm volatile ("fsdi $fd15, [%0+0x78]\n\t"	50	asm volatile ("fsdi $fd15, [%0+0x78]\n\t"
51	"fsdi $fd14, [%0+0x70]\n\t"	51	"fsdi $fd14, [%0+0x70]\n\t"
@@ -58,7 +58,7 @@ void save_fpu(struct task_struct *tsk) · 6 unmodified lines
58	: /* no output */	58	: /* no output */
59	: "r" (&tsk->thread.fpu)	59	: "r" (&tsk->thread.fpu)
60	: "memory");	60	: "memory");
61	/* fall through */	61	fallthrough;
62	case SP16_DP8_reg:	62	case SP16_DP8_reg:
63	asm volatile ("fsdi $fd7, [%0+0x38]\n\t"	63	asm volatile ("fsdi $fd7, [%0+0x38]\n\t"
64	"fsdi $fd6, [%0+0x30]\n\t"	64	"fsdi $fd6, [%0+0x30]\n\t"
@@ -67,7 +67,7 @@ void save_fpu(struct task_struct *tsk) · 2 unmodified lines
67	: /* no output */	67	: /* no output */
68	: "r" (&tsk->thread.fpu)	68	: "r" (&tsk->thread.fpu)
69	: "memory");	69	: "memory");
70	/* fall through */	70	fallthrough;
71	case SP8_DP4_reg:	71	case SP8_DP4_reg:
72	asm volatile ("fsdi $fd3, [%1+0x18]\n\t"	72	asm volatile ("fsdi $fd3, [%1+0x18]\n\t"
73	"fsdi $fd2, [%1+0x10]\n\t"	73	"fsdi $fd2, [%1+0x10]\n\t"
@@ -108,7 +108,7 @@ void load_fpu(const struct fpu_struct *fpregs) · 34 unmodified lines
108	"fldi $fd16, [%0+0x80]\n\t"	108	"fldi $fd16, [%0+0x80]\n\t"
109	: /* no output */	109	: /* no output */
110	: "r" (fpregs));	110	: "r" (fpregs));
111	/* fall through */	111	fallthrough;
112	case SP32_DP16_reg:	112	case SP32_DP16_reg:
113	asm volatile ("fldi $fd15, [%0+0x78]\n\t"	113	asm volatile ("fldi $fd15, [%0+0x78]\n\t"
114	"fldi $fd14, [%0+0x70]\n\t"	114	"fldi $fd14, [%0+0x70]\n\t"
@@ -120,7 +120,7 @@ void load_fpu(const struct fpu_struct *fpregs) · 5 unmodified lines
120	"fldi $fd8, [%0+0x40]\n\t"	120	"fldi $fd8, [%0+0x40]\n\t"
121	: /* no output */	121	: /* no output */
122	: "r" (fpregs));	122	: "r" (fpregs));
123	/* fall through */	123	fallthrough;
124	case SP16_DP8_reg:	124	case SP16_DP8_reg:
125	asm volatile ("fldi $fd7, [%0+0x38]\n\t"	125	asm volatile ("fldi $fd7, [%0+0x38]\n\t"
126	"fldi $fd6, [%0+0x30]\n\t"	126	"fldi $fd6, [%0+0x30]\n\t"
@@ -128,7 +128,7 @@ void load_fpu(const struct fpu_struct *fpregs) · 1 unmodified line
128	"fldi $fd4, [%0+0x20]\n\t"	128	"fldi $fd4, [%0+0x20]\n\t"
129	: /* no output */	129	: /* no output */
130	: "r" (fpregs));	130	: "r" (fpregs));
131	/* fall through */	131	fallthrough;
132	case SP8_DP4_reg:	132	case SP8_DP4_reg:
133	asm volatile ("fldi $fd3, [%1+0x18]\n\t"	133	asm volatile ("fldi $fd3, [%1+0x18]\n\t"
134	"fldi $fd2, [%1+0x10]\n\t"	134	"fldi $fd2, [%1+0x10]\n\t"

arch/nds32/kernel/signal.c+2−2

@@ -316,7 +316,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 315 unmodified lines
316	regs->uregs[0] = -EINTR;	316	regs->uregs[0] = -EINTR;
317	break;	317	break;
318	}	318	}
319	/* Else, fall through */	319	fallthrough;
320	case -ERESTARTNOINTR:	320	case -ERESTARTNOINTR:
321	regs->uregs[0] = regs->orig_r0;	321	regs->uregs[0] = regs->orig_r0;
322	regs->ipc -= 4;	322	regs->ipc -= 4;
@@ -361,7 +361,7 @@ static void do_signal(struct pt_regs *regs) · 38 unmodified lines
361	switch (regs->uregs[0]) {	361	switch (regs->uregs[0]) {
362	case -ERESTART_RESTARTBLOCK:	362	case -ERESTART_RESTARTBLOCK:
363	regs->uregs[15] = __NR_restart_syscall;	363	regs->uregs[15] = __NR_restart_syscall;
364	/* Fall through */	364	fallthrough;
365	case -ERESTARTNOHAND:	365	case -ERESTARTNOHAND:
366	case -ERESTARTSYS:	366	case -ERESTARTSYS:
367	case -ERESTARTNOINTR:	367	case -ERESTARTNOINTR:

arch/openrisc/kernel/signal.c+1−1

@@ -244,7 +244,7 @@ int do_signal(struct pt_regs *regs, int syscall) · 243 unmodified lines
244	switch (retval) {	244	switch (retval) {
245	case -ERESTART_RESTARTBLOCK:	245	case -ERESTART_RESTARTBLOCK:
246	restart = -2;	246	restart = -2;
247	/* Fall through */	247	fallthrough;
248	case -ERESTARTNOHAND:	248	case -ERESTARTNOHAND:
249	case -ERESTARTSYS:	249	case -ERESTARTSYS:
250	case -ERESTARTNOINTR:	250	case -ERESTARTNOINTR:

arch/parisc/kernel/signal.c+1−1

@@ -502,7 +502,7 @@ syscall_restart(struct pt_regs regs, struct k_sigaction ka) · 501 unmodified lines
502	regs->gr[28] = -EINTR;	502	regs->gr[28] = -EINTR;
503	break;	503	break;
504	}	504	}
505	/* fallthrough */	505	fallthrough;
506	case -ERESTARTNOINTR:	506	case -ERESTARTNOINTR:
507	check_syscallno_in_delay_branch(regs);	507	check_syscallno_in_delay_branch(regs);
508	break;	508	break;

arch/parisc/kernel/traps.c+5−6

 		break;
 	default:
-		/* Fall through */
 		break;
 	}
 	case 15:
 		/* Data TLB miss fault/Data page fault */
-		/* Fall through */
+		fallthrough;
 	case 16:
 		/* Non-access instruction TLB miss fault */
 		/* The instruction TLB entry needed for the target address of the FIC
 		   is absent, and hardware can't find it, so we get to cleanup */
-		/* Fall through */
+		fallthrough;
 	case 17:
 		/* Non-access data TLB miss fault/Non-access data page fault */
 		/* FIXME:
 			handle_unaligned(regs);
 			return;
 		}
-		/* Fall Through */
+		fallthrough;
 	case 26:
 		/* PCXL: Data memory access rights trap */
 		fault_address = regs->ior;
 	case 19:
 		/* Data memory break trap */
 		regs->gr[0] |= PSW_X; /* So we can single-step over the trap */
-		/* fall thru */
+		fallthrough;
 	case 21:
 		/* Page reference trap */
 		handle_gdb_break(regs, TRAP_HWBKPT);
 			}
 			mmap_read_unlock(current->mm);
 		}
-		/* Fall Through */
+		fallthrough;
 	case 27:
 		/* Data memory protection ID trap */
 		if (code == 27 && !user_mode(regs) &&

arch/parisc/mm/fault.c+2−2

@@ -67,7 +67,7 @@ parisc_acctyp(unsigned long code, unsigned int inst) · 66 unmodified lines
67	case 0x30000000: /* coproc2 */	67	case 0x30000000: /* coproc2 */
68	if (bit22set(inst))	68	if (bit22set(inst))
69	return VM_WRITE;	69	return VM_WRITE;
70	/* fall through */	70	fallthrough;
71		71
72	case 0x0: /* indexed/memory management */	72	case 0x0: /* indexed/memory management */
73	if (bit22set(inst)) {	73	if (bit22set(inst)) {
@@ -370,7 +370,7 @@ bad_area: · 296 unmodified lines
370	}	370	}
371		371
372	/* probably address is outside of mapped file */	372	/* probably address is outside of mapped file */
373	/* fall through */	373	fallthrough;
374	case 17: /* NA data TLB miss / page fault */	374	case 17: /* NA data TLB miss / page fault */
375	case 18: /* Unaligned access - PCXS only */	375	case 18: /* Unaligned access - PCXS only */
376	signo = SIGBUS;	376	signo = SIGBUS;

arch/powerpc/Kconfig+12−0

@@ -860,6 +860,18 @@ config PPC_SUBPAGE_PROT · 859 unmodified lines
860		860
861	If unsure, say N here.	861	If unsure, say N here.
862		862
		863	config PPC_PROT_SAO_LPAR
		864	bool "Support PROT_SAO mappings in LPARs"
		865	depends on PPC_BOOK3S_64
		866	help
		867	This option adds support for PROT_SAO mappings from userspace
		868	inside LPARs on supported CPUs.
		869
		870	This may cause issues when performing guest migration from
		871	a CPU that supports SAO to one that does not.
		872
		873	If unsure, say N here.
		874
863	config PPC_COPRO_BASE	875	config PPC_COPRO_BASE
864	bool	876	bool
865		877

arch/powerpc/include/asm/book3s/64/pgtable.h+3−5

@@ -20,13 +20,9 @@ · 19 unmodified lines
20	#define _PAGE_RW (_PAGE_READ \| _PAGE_WRITE)	20	#define _PAGE_RW (_PAGE_READ \| _PAGE_WRITE)
21	#define _PAGE_RWX (_PAGE_READ \| _PAGE_WRITE \| _PAGE_EXEC)	21	#define _PAGE_RWX (_PAGE_READ \| _PAGE_WRITE \| _PAGE_EXEC)
22	#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */	22	#define _PAGE_PRIVILEGED 0x00008 /* kernel access only */
23		23	#define _PAGE_SAO 0x00010 /* Strong access order */
24	#define _PAGE_CACHE_CTL 0x00030 /* Bits for the folowing cache modes */
25	/* No bits set is normal cacheable memory */
26	/* 0x00010 unused, is SAO bit on radix POWER9 */
27	#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */	24	#define _PAGE_NON_IDEMPOTENT 0x00020 /* non idempotent memory */
28	#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */	25	#define _PAGE_TOLERANT 0x00030 /* tolerant memory, cache inhibited */
29
30	#define _PAGE_DIRTY 0x00080 /* C: page changed */	26	#define _PAGE_DIRTY 0x00080 /* C: page changed */
31	#define _PAGE_ACCESSED 0x00100 /* R: page referenced */	27	#define _PAGE_ACCESSED 0x00100 /* R: page referenced */
32	/*	28	/*
@@ -828,6 +824,8 @@ static inline void __set_pte_at(struct mm_struct *mm, unsigned long addr, · 795 unmodified lines
828	return hash__set_pte_at(mm, addr, ptep, pte, percpu);	824	return hash__set_pte_at(mm, addr, ptep, pte, percpu);
829	}	825	}
830		826
		827	#define _PAGE_CACHE_CTL (_PAGE_SAO \| _PAGE_NON_IDEMPOTENT \| _PAGE_TOLERANT)
		828
831	#define pgprot_noncached pgprot_noncached	829	#define pgprot_noncached pgprot_noncached
832	static inline pgprot_t pgprot_noncached(pgprot_t prot)	830	static inline pgprot_t pgprot_noncached(pgprot_t prot)
833	{	831	{

arch/powerpc/include/asm/cputable.h+5−5

arch/powerpc/include/asm/hw_irq.h+4−7

 #define powerpc_local_irq_pmu_save(flags)			\
 	 do {							\
 		raw_local_irq_pmu_save(flags);			\
-		trace_hardirqs_off();				\
+		if (!raw_irqs_disabled_flags(flags))		\
+			trace_hardirqs_off();			\
 	} while(0)
 #define powerpc_local_irq_pmu_restore(flags)			\
 	do {							\
-		if (raw_irqs_disabled_flags(flags)) {		\
+		if (!raw_irqs_disabled_flags(flags))		\
-			raw_local_irq_pmu_restore(flags);	\
-			trace_hardirqs_off();			\
-		} else {					\
 			trace_hardirqs_on();			\
-			raw_local_irq_pmu_restore(flags);	\
+		raw_local_irq_pmu_restore(flags);		\
-		}						\
 	} while(0)
 #else
 #define powerpc_local_irq_pmu_save(flags)			\

arch/powerpc/include/asm/mman.h+27−4

@@ -13,20 +13,43 @@ · 12 unmodified lines
13	#include <linux/pkeys.h>	13	#include <linux/pkeys.h>
14	#include <asm/cpu_has_feature.h>	14	#include <asm/cpu_has_feature.h>
15		15
16	#ifdef CONFIG_PPC_MEM_KEYS
17	static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,	16	static inline unsigned long arch_calc_vm_prot_bits(unsigned long prot,
18	unsigned long pkey)	17	unsigned long pkey)
19	{	18	{
20	return pkey_to_vmflag_bits(pkey);	19	#ifdef CONFIG_PPC_MEM_KEYS
		20	return (((prot & PROT_SAO) ? VM_SAO : 0) \| pkey_to_vmflag_bits(pkey));
		21	#else
		22	return ((prot & PROT_SAO) ? VM_SAO : 0);
		23	#endif
21	}	24	}
22	#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)	25	#define arch_calc_vm_prot_bits(prot, pkey) arch_calc_vm_prot_bits(prot, pkey)
23		26
24	static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)	27	static inline pgprot_t arch_vm_get_page_prot(unsigned long vm_flags)
25	{	28	{
26	return __pgprot(vmflag_to_pte_pkey_bits(vm_flags));	29	#ifdef CONFIG_PPC_MEM_KEYS
		30	return (vm_flags & VM_SAO) ?
		31	__pgprot(_PAGE_SAO \| vmflag_to_pte_pkey_bits(vm_flags)) :
		32	__pgprot(0 \| vmflag_to_pte_pkey_bits(vm_flags));
		33	#else
		34	return (vm_flags & VM_SAO) ? __pgprot(_PAGE_SAO) : __pgprot(0);
		35	#endif
27	}	36	}
28	#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)	37	#define arch_vm_get_page_prot(vm_flags) arch_vm_get_page_prot(vm_flags)
29	#endif	38
		39	static inline bool arch_validate_prot(unsigned long prot, unsigned long addr)
		40	{
		41	if (prot & ~(PROT_READ \| PROT_WRITE \| PROT_EXEC \| PROT_SEM \| PROT_SAO))
		42	return false;
		43	if (prot & PROT_SAO) {
		44	if (!cpu_has_feature(CPU_FTR_SAO))
		45	return false;
		46	if (firmware_has_feature(FW_FEATURE_LPAR) &&
		47	!IS_ENABLED(CONFIG_PPC_PROT_SAO_LPAR))
		48	return false;
		49	}
		50	return true;
		51	}
		52	#define arch_validate_prot arch_validate_prot
30		53
31	#endif /* CONFIG_PPC64 */	54	#endif /* CONFIG_PPC64 */
32	#endif /* _ASM_POWERPC_MMAN_H */	55	#endif /* _ASM_POWERPC_MMAN_H */

arch/powerpc/include/asm/nohash/64/pgtable.h+2−0

@@ -82,6 +82,8 @@ · 81 unmodified lines
82	*/	82	*/
83	#include <asm/nohash/pte-book3e.h>	83	#include <asm/nohash/pte-book3e.h>
84		84
		85	#define _PAGE_SAO 0
		86
85	#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))	87	#define PTE_RPN_MASK (~((1UL << PTE_RPN_SHIFT) - 1))
86		88
87	/*	89	/*

arch/powerpc/include/uapi/asm/mman.h+1−1

@@ -11,7 +11,7 @@ · 10 unmodified lines
11	#include <asm-generic/mman-common.h>	11	#include <asm-generic/mman-common.h>
12		12
13		13
14	#define PROT_SAO 0x10 /* Unsupported since v5.9 */	14	#define PROT_SAO 0x10 /* Strong Access Ordering */
15		15
16	#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */	16	#define MAP_RENAME MAP_ANONYMOUS /* In SunOS terminology */
17	#define MAP_NORESERVE 0x40 /* don't reserve swap pages */	17	#define MAP_NORESERVE 0x40 /* don't reserve swap pages */

arch/powerpc/kernel/dt_cpu_ftrs.c+1−1

@@ -653,7 +653,7 @@ static struct dt_cpu_feature_match __initdata · 652 unmodified lines
653	{"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},	653	{"processor-control-facility-v3", feat_enable_dbell, CPU_FTR_DBELL},
654	{"processor-utilization-of-resources-register", feat_enable_purr, 0},	654	{"processor-utilization-of-resources-register", feat_enable_purr, 0},
655	{"no-execute", feat_enable, 0},	655	{"no-execute", feat_enable, 0},
656	/* strong-access-ordering is unused */	656	{"strong-access-ordering", feat_enable, CPU_FTR_SAO},
657	{"cache-inhibited-large-page", feat_enable_large_ci, 0},	657	{"cache-inhibited-large-page", feat_enable_large_ci, 0},
658	{"coprocessor-icswx", feat_enable, 0},	658	{"coprocessor-icswx", feat_enable, 0},
659	{"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},	659	{"hypervisor-virtualization-interrupt", feat_enable_hvi, 0},

arch/powerpc/kernel/entry_64.S+4−0

 	ld	r11,exception_marker@toc(r2)
 	std	r11,-16(r10)		/* "regshere" marker */
+BEGIN_FTR_SECTION
+	HMT_MEDIUM
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 	/*
 	 * RECONCILE_IRQ_STATE without calling trace_hardirqs_off(), which
 	 * would clobber syscall parameters. Also we always enter with IRQs

arch/powerpc/kernel/process.c+9−3

 	 * are live for the user thread).
 	 */
 	if ((!(msr & MSR_FP)) && should_restore_fp())
-		new_msr |= MSR_FP | current->thread.fpexc_mode;
+		new_msr |= MSR_FP;
 	if ((!(msr & MSR_VEC)) && should_restore_altivec())
 		new_msr |= MSR_VEC;
 	}
 	if (new_msr) {
+		unsigned long fpexc_mode = 0;
 		msr_check_and_set(new_msr);
-		if (new_msr & MSR_FP)
+		if (new_msr & MSR_FP) {
 			do_restore_fp();
+			// This also covers VSX, because VSX implies FP
+			fpexc_mode = current->thread.fpexc_mode;
+		}
 		if (new_msr & MSR_VEC)
 			do_restore_altivec();
 		msr_check_and_clear(new_msr);
-		regs->msr |= new_msr;
+		regs->msr |= new_msr | fpexc_mode;
 	}
 }
 #endif

arch/powerpc/mm/book3s64/hash_utils.c+2−0

 		rflags |= HPTE_R_I;
 	else if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_NON_IDEMPOTENT)
 		rflags |= (HPTE_R_I | HPTE_R_G);
+	else if ((pteflags & _PAGE_CACHE_CTL) == _PAGE_SAO)
+		rflags |= (HPTE_R_W | HPTE_R_I | HPTE_R_M);
 	else
 		/*
 		 * Add memory coherence if cache inhibited is not set

arch/powerpc/net/bpf_jit_comp.c+1−1

@@ -475,7 +475,7 @@ static int bpf_jit_build_body(struct bpf_prog fp, u32 image, · 474 unmodified lines
475	case BPF_JMP \| BPF_JSET \| BPF_K:	475	case BPF_JMP \| BPF_JSET \| BPF_K:
476	case BPF_JMP \| BPF_JSET \| BPF_X:	476	case BPF_JMP \| BPF_JSET \| BPF_X:
477	true_cond = COND_NE;	477	true_cond = COND_NE;
478	/* Fall through */	478	fallthrough;
479	cond_branch:	479	cond_branch:
480	/* same targets, can avoid doing the test :) */	480	/* same targets, can avoid doing the test :) */
481	if (filter[i].jt == filter[i].jf) {	481	if (filter[i].jt == filter[i].jf) {

arch/powerpc/perf/core-book3s.c+14−5

@@ -1557,9 +1557,16 @@ nocheck: · 1556 unmodified lines
1557	ret = 0;	1557	ret = 0;
1558	out:	1558	out:
1559	if (has_branch_stack(event)) {	1559	if (has_branch_stack(event)) {
1560	power_pmu_bhrb_enable(event);	1560	u64 bhrb_filter = -1;
1561	cpuhw->bhrb_filter = ppmu->bhrb_filter_map(	1561
1562	event->attr.branch_sample_type);	1562	if (ppmu->bhrb_filter_map)
		1563	bhrb_filter = ppmu->bhrb_filter_map(
		1564	event->attr.branch_sample_type);
		1565
		1566	if (bhrb_filter != -1) {
		1567	cpuhw->bhrb_filter = bhrb_filter;
		1568	power_pmu_bhrb_enable(event);
		1569	}
1563	}	1570	}
1564		1571
1565	perf_pmu_enable(event->pmu);	1572	perf_pmu_enable(event->pmu);
@@ -1881,7 +1888,6 @@ static int power_pmu_event_init(struct perf_event *event) · 315 unmodified lines
1881	int n;	1888	int n;
1882	int err;	1889	int err;
1883	struct cpu_hw_events *cpuhw;	1890	struct cpu_hw_events *cpuhw;
1884	u64 bhrb_filter;
1885		1891
1886	if (!ppmu)	1892	if (!ppmu)
1887	return -ENOENT;	1893	return -ENOENT;
@@ -1987,7 +1993,10 @@ static int power_pmu_event_init(struct perf_event *event) · 99 unmodified lines
1987	err = power_check_constraints(cpuhw, events, cflags, n + 1);	1993	err = power_check_constraints(cpuhw, events, cflags, n + 1);
1988		1994
1989	if (has_branch_stack(event)) {	1995	if (has_branch_stack(event)) {
1990	bhrb_filter = ppmu->bhrb_filter_map(	1996	u64 bhrb_filter = -1;
		1997
		1998	if (ppmu->bhrb_filter_map)
		1999	bhrb_filter = ppmu->bhrb_filter_map(
1991	event->attr.branch_sample_type);	2000	event->attr.branch_sample_type);
1992		2001
1993	if (bhrb_filter == -1) {	2002	if (bhrb_filter == -1) {

arch/powerpc/perf/imc-pmu.c+2−2

@@ -1289,7 +1289,7 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem, · 1288 unmodified lines
1289	header->misc = 0;	1289	header->misc = 0;
1290		1290
1291	if (cpu_has_feature(CPU_FTR_ARCH_31)) {	1291	if (cpu_has_feature(CPU_FTR_ARCH_31)) {
1292	switch (IMC_TRACE_RECORD_VAL_HVPR(mem->val)) {	1292	switch (IMC_TRACE_RECORD_VAL_HVPR(be64_to_cpu(READ_ONCE(mem->val)))) {
1293	case 0:/* when MSR HV and PR not set in the trace-record */	1293	case 0:/* when MSR HV and PR not set in the trace-record */
1294	header->misc \|= PERF_RECORD_MISC_GUEST_KERNEL;	1294	header->misc \|= PERF_RECORD_MISC_GUEST_KERNEL;
1295	break;	1295	break;
@@ -1297,7 +1297,7 @@ static int trace_imc_prepare_sample(struct trace_imc_data *mem, · 1 unmodified line
1297	header->misc \|= PERF_RECORD_MISC_GUEST_USER;	1297	header->misc \|= PERF_RECORD_MISC_GUEST_USER;
1298	break;	1298	break;
1299	case 2: /* MSR HV is 1 and PR is 0 */	1299	case 2: /* MSR HV is 1 and PR is 0 */
1300	header->misc \|= PERF_RECORD_MISC_HYPERVISOR;	1300	header->misc \|= PERF_RECORD_MISC_KERNEL;
1301	break;	1301	break;
1302	case 3: /* MSR HV is 1 and PR is 1 */	1302	case 3: /* MSR HV is 1 and PR is 1 */
1303	header->misc \|= PERF_RECORD_MISC_USER;	1303	header->misc \|= PERF_RECORD_MISC_USER;

arch/powerpc/platforms/Kconfig.cputype+1−1

@@ -36,7 +36,7 @@ config PPC_BOOK3S_6xx · 35 unmodified lines
36	select PPC_HAVE_PMU_SUPPORT	36	select PPC_HAVE_PMU_SUPPORT
37	select PPC_HAVE_KUEP	37	select PPC_HAVE_KUEP
38	select PPC_HAVE_KUAP	38	select PPC_HAVE_KUAP
39	select HAVE_ARCH_VMAP_STACK	39	select HAVE_ARCH_VMAP_STACK if !ADB_PMU
40		40
41	config PPC_BOOK3S_601	41	config PPC_BOOK3S_601
42	bool "PowerPC 601"	42	bool "PowerPC 601"

arch/powerpc/platforms/powernv/idle.c+1−1

@@ -1223,7 +1223,7 @@ static void __init pnv_probe_idle_states(void) · 1222 unmodified lines
1223	return;	1223	return;
1224	}	1224	}
1225		1225
1226	if (pvr_version_is(PVR_POWER9))	1226	if (cpu_has_feature(CPU_FTR_ARCH_300))
1227	pnv_power9_idle_init();	1227	pnv_power9_idle_init();
1228		1228
1229	for (i = 0; i < nr_pnv_idle_states; i++)	1229	for (i = 0; i < nr_pnv_idle_states; i++)

arch/riscv/kernel/signal.c+1−1

@@ -250,7 +250,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 249 unmodified lines
250	regs->a0 = -EINTR;	250	regs->a0 = -EINTR;
251	break;	251	break;
252	}	252	}
253	/* fallthrough */	253	fallthrough;
254	case -ERESTARTNOINTR:	254	case -ERESTARTNOINTR:
255	regs->a0 = regs->orig_a0;	255	regs->a0 = regs->orig_a0;
256	regs->epc -= 0x4;	256	regs->epc -= 0x4;

arch/riscv/net/bpf_jit_comp32.c+2−2

@@ -1020,7 +1020,7 @@ int bpf_jit_emit_insn(const struct bpf_insn insn, struct rv_jit_context ctx, · 1019 unmodified lines
1020	emit_zext64(dst, ctx);	1020	emit_zext64(dst, ctx);
1021	break;	1021	break;
1022	}	1022	}
1023	/* Fallthrough. */	1023	fallthrough;
1024		1024
1025	case BPF_ALU \| BPF_ADD \| BPF_X:	1025	case BPF_ALU \| BPF_ADD \| BPF_X:
1026	case BPF_ALU \| BPF_SUB \| BPF_X:	1026	case BPF_ALU \| BPF_SUB \| BPF_X:
@@ -1079,7 +1079,7 @@ int bpf_jit_emit_insn(const struct bpf_insn insn, struct rv_jit_context ctx, · 52 unmodified lines
1079	case 16:	1079	case 16:
1080	emit(rv_slli(lo(rd), lo(rd), 16), ctx);	1080	emit(rv_slli(lo(rd), lo(rd), 16), ctx);
1081	emit(rv_srli(lo(rd), lo(rd), 16), ctx);	1081	emit(rv_srli(lo(rd), lo(rd), 16), ctx);
1082	/* Fallthrough. */	1082	fallthrough;
1083	case 32:	1083	case 32:
1084	if (!ctx->prog->aux->verifier_zext)	1084	if (!ctx->prog->aux->verifier_zext)
1085	emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);	1085	emit(rv_addi(hi(rd), RV_REG_ZERO, 0), ctx);

arch/s390/Kconfig+1−1

@@ -30,7 +30,7 @@ config GENERIC_BUG_RELATIVE_POINTERS · 29 unmodified lines
30	def_bool y	30	def_bool y
31		31
32	config GENERIC_LOCKBREAK	32	config GENERIC_LOCKBREAK
33	def_bool y if PREEMPTTION	33	def_bool y if PREEMPTION
34		34
35	config PGSTE	35	config PGSTE
36	def_bool y if KVM	36	def_bool y if KVM

arch/s390/configs/debug_defconfig+4−0

 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_INODE64=y
 CONFIG_HUGETLBFS=y
 CONFIG_CONFIGFS_FS=m
 CONFIG_ECRYPT_FS=m
 CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_DEBUG_CREDENTIALS=y
 CONFIG_RCU_TORTURE_TEST=m
+CONFIG_RCU_REF_SCALE_TEST=m
 CONFIG_RCU_CPU_STALL_TIMEOUT=300
 # CONFIG_RCU_TRACE is not set
 CONFIG_LATENCYTOP=y
 CONFIG_SCHED_TRACER=y
 CONFIG_FTRACE_SYSCALLS=y
 CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_BPF_KPROBE_OVERRIDE=y
 CONFIG_HIST_TRIGGERS=y
 CONFIG_S390_PTDUMP=y
 CONFIG_NOTIFIER_ERROR_INJECTION=m
 CONFIG_FAIL_IO_TIMEOUT=y
 CONFIG_FAIL_FUTEX=y
 CONFIG_FAULT_INJECTION_DEBUG_FS=y
+CONFIG_FAIL_FUNCTION=y
 CONFIG_FAULT_INJECTION_STACKTRACE_FILTER=y
 CONFIG_LKDTM=m
 CONFIG_TEST_LIST_SORT=y

arch/s390/configs/defconfig+3−0

 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
+CONFIG_TMPFS_INODE64=y
 CONFIG_HUGETLBFS=y
 CONFIG_CONFIGFS_FS=m
 CONFIG_ECRYPT_FS=m
 CONFIG_TEST_LOCKUP=m
 CONFIG_BUG_ON_DATA_CORRUPTION=y
 CONFIG_RCU_TORTURE_TEST=m
+CONFIG_RCU_REF_SCALE_TEST=m
 CONFIG_RCU_CPU_STALL_TIMEOUT=60
 CONFIG_LATENCYTOP=y
 CONFIG_BOOTTIME_TRACING=y
 CONFIG_SCHED_TRACER=y
 CONFIG_FTRACE_SYSCALLS=y
 CONFIG_BLK_DEV_IO_TRACE=y
+CONFIG_BPF_KPROBE_OVERRIDE=y
 CONFIG_HIST_TRIGGERS=y
 CONFIG_S390_PTDUMP=y
 CONFIG_LKDTM=m

arch/s390/configs/zfcpdump_defconfig+1−0

@@ -74,5 +74,6 @@ CONFIG_DEBUG_KERNEL=y · 73 unmodified lines
74	CONFIG_PANIC_ON_OOPS=y	74	CONFIG_PANIC_ON_OOPS=y
75	# CONFIG_SCHED_DEBUG is not set	75	# CONFIG_SCHED_DEBUG is not set
76	CONFIG_RCU_CPU_STALL_TIMEOUT=60	76	CONFIG_RCU_CPU_STALL_TIMEOUT=60
		77	# CONFIG_RCU_TRACE is not set
77	# CONFIG_FTRACE is not set	78	# CONFIG_FTRACE is not set
78	# CONFIG_RUNTIME_TESTING_MENU is not set	79	# CONFIG_RUNTIME_TESTING_MENU is not set

arch/s390/include/asm/percpu.h+14−14

@@ -29,7 +29,7 @@ · 28 unmodified lines
29	typedef typeof(pcp) pcp_op_T__; \	29	typedef typeof(pcp) pcp_op_T__; \
30	pcp_op_T__ old__, new__, prev__; \	30	pcp_op_T__ old__, new__, prev__; \
31	pcp_op_T__ *ptr__; \	31	pcp_op_T__ *ptr__; \
32	preempt_disable(); \	32	preempt_disable_notrace(); \
33	ptr__ = raw_cpu_ptr(&(pcp)); \	33	ptr__ = raw_cpu_ptr(&(pcp)); \
34	prev__ = *ptr__; \	34	prev__ = *ptr__; \
35	do { \	35	do { \
@@ -37,7 +37,7 @@ · 1 unmodified line
37	new__ = old__ op (val); \	37	new__ = old__ op (val); \
38	prev__ = cmpxchg(ptr__, old__, new__); \	38	prev__ = cmpxchg(ptr__, old__, new__); \
39	} while (prev__ != old__); \	39	} while (prev__ != old__); \
40	preempt_enable(); \	40	preempt_enable_notrace(); \
41	new__; \	41	new__; \
42	})	42	})
43		43
@@ -68,7 +68,7 @@ · 24 unmodified lines
68	typedef typeof(pcp) pcp_op_T__; \	68	typedef typeof(pcp) pcp_op_T__; \
69	pcp_op_T__ val__ = (val); \	69	pcp_op_T__ val__ = (val); \
70	pcp_op_T__ old__, *ptr__; \	70	pcp_op_T__ old__, *ptr__; \
71	preempt_disable(); \	71	preempt_disable_notrace(); \
72	ptr__ = raw_cpu_ptr(&(pcp)); \	72	ptr__ = raw_cpu_ptr(&(pcp)); \
73	if (__builtin_constant_p(val__) && \	73	if (__builtin_constant_p(val__) && \
74	((szcast)val__ > -129) && ((szcast)val__ < 128)) { \	74	((szcast)val__ > -129) && ((szcast)val__ < 128)) { \
@@ -84,7 +84,7 @@ · 9 unmodified lines
84	: [val__] "d" (val__) \	84	: [val__] "d" (val__) \
85	: "cc"); \	85	: "cc"); \
86	} \	86	} \
87	preempt_enable(); \	87	preempt_enable_notrace(); \
88	}	88	}
89		89
90	#define this_cpu_add_4(pcp, val) arch_this_cpu_add(pcp, val, "laa", "asi", int)	90	#define this_cpu_add_4(pcp, val) arch_this_cpu_add(pcp, val, "laa", "asi", int)
@@ -95,14 +95,14 @@ · 4 unmodified lines
95	typedef typeof(pcp) pcp_op_T__; \	95	typedef typeof(pcp) pcp_op_T__; \
96	pcp_op_T__ val__ = (val); \	96	pcp_op_T__ val__ = (val); \
97	pcp_op_T__ old__, *ptr__; \	97	pcp_op_T__ old__, *ptr__; \
98	preempt_disable(); \	98	preempt_disable_notrace(); \
99	ptr__ = raw_cpu_ptr(&(pcp)); \	99	ptr__ = raw_cpu_ptr(&(pcp)); \
100	asm volatile( \	100	asm volatile( \
101	op " %[old__],%[val__],%[ptr__]\n" \	101	op " %[old__],%[val__],%[ptr__]\n" \
102	: [old__] "=d" (old__), [ptr__] "+Q" (*ptr__) \	102	: [old__] "=d" (old__), [ptr__] "+Q" (*ptr__) \
103	: [val__] "d" (val__) \	103	: [val__] "d" (val__) \
104	: "cc"); \	104	: "cc"); \
105	preempt_enable(); \	105	preempt_enable_notrace(); \
106	old__ + val__; \	106	old__ + val__; \
107	})	107	})
108		108
@@ -114,14 +114,14 @@ · 5 unmodified lines
114	typedef typeof(pcp) pcp_op_T__; \	114	typedef typeof(pcp) pcp_op_T__; \
115	pcp_op_T__ val__ = (val); \	115	pcp_op_T__ val__ = (val); \
116	pcp_op_T__ old__, *ptr__; \	116	pcp_op_T__ old__, *ptr__; \
117	preempt_disable(); \	117	preempt_disable_notrace(); \
118	ptr__ = raw_cpu_ptr(&(pcp)); \	118	ptr__ = raw_cpu_ptr(&(pcp)); \
119	asm volatile( \	119	asm volatile( \
120	op " %[old__],%[val__],%[ptr__]\n" \	120	op " %[old__],%[val__],%[ptr__]\n" \
121	: [old__] "=d" (old__), [ptr__] "+Q" (*ptr__) \	121	: [old__] "=d" (old__), [ptr__] "+Q" (*ptr__) \
122	: [val__] "d" (val__) \	122	: [val__] "d" (val__) \
123	: "cc"); \	123	: "cc"); \
124	preempt_enable(); \	124	preempt_enable_notrace(); \
125	}	125	}
126		126
127	#define this_cpu_and_4(pcp, val) arch_this_cpu_to_op(pcp, val, "lan")	127	#define this_cpu_and_4(pcp, val) arch_this_cpu_to_op(pcp, val, "lan")
@@ -136,10 +136,10 @@ · 8 unmodified lines
136	typedef typeof(pcp) pcp_op_T__; \	136	typedef typeof(pcp) pcp_op_T__; \
137	pcp_op_T__ ret__; \	137	pcp_op_T__ ret__; \
138	pcp_op_T__ *ptr__; \	138	pcp_op_T__ *ptr__; \
139	preempt_disable(); \	139	preempt_disable_notrace(); \
140	ptr__ = raw_cpu_ptr(&(pcp)); \	140	ptr__ = raw_cpu_ptr(&(pcp)); \
141	ret__ = cmpxchg(ptr__, oval, nval); \	141	ret__ = cmpxchg(ptr__, oval, nval); \
142	preempt_enable(); \	142	preempt_enable_notrace(); \
143	ret__; \	143	ret__; \
144	})	144	})
145		145
@@ -152,10 +152,10 @@ · 6 unmodified lines
152	({ \	152	({ \
153	typeof(pcp) *ptr__; \	153	typeof(pcp) *ptr__; \
154	typeof(pcp) ret__; \	154	typeof(pcp) ret__; \
155	preempt_disable(); \	155	preempt_disable_notrace(); \
156	ptr__ = raw_cpu_ptr(&(pcp)); \	156	ptr__ = raw_cpu_ptr(&(pcp)); \
157	ret__ = xchg(ptr__, nval); \	157	ret__ = xchg(ptr__, nval); \
158	preempt_enable(); \	158	preempt_enable_notrace(); \
159	ret__; \	159	ret__; \
160	})	160	})
161		161
@@ -171,11 +171,11 @@ · 9 unmodified lines
171	typeof(pcp1) *p1__; \	171	typeof(pcp1) *p1__; \
172	typeof(pcp2) *p2__; \	172	typeof(pcp2) *p2__; \
173	int ret__; \	173	int ret__; \
174	preempt_disable(); \	174	preempt_disable_notrace(); \
175	p1__ = raw_cpu_ptr(&(pcp1)); \	175	p1__ = raw_cpu_ptr(&(pcp1)); \
176	p2__ = raw_cpu_ptr(&(pcp2)); \	176	p2__ = raw_cpu_ptr(&(pcp2)); \
177	ret__ = __cmpxchg_double(p1__, p2__, o1__, o2__, n1__, n2__); \	177	ret__ = __cmpxchg_double(p1__, p2__, o1__, o2__, n1__, n2__); \
178	preempt_enable(); \	178	preempt_enable_notrace(); \
179	ret__; \	179	ret__; \
180	})	180	})
181		181

arch/s390/kernel/idle.c+1−2

 		PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK;
 	clear_cpu_flag(CIF_NOHZ_DELAY);
-	trace_cpu_idle_rcuidle(1, smp_processor_id());
 	local_irq_save(flags);
 	/* Call the assembler magic in entry.S */
 	psw_idle(idle, psw_mask);
 	local_irq_restore(flags);
-	trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 	/* Account time spent with enabled wait psw loaded as idle time. */
+	/* XXX seqcount has tracepoints that require RCU */
 	write_seqcount_begin(&idle->seqcount);
 	idle_time = idle->clock_idle_exit - idle->clock_idle_enter;
 	idle->clock_idle_enter = idle->clock_idle_exit = 0ULL;

arch/s390/mm/vmem.c+1−0

@@ -402,6 +402,7 @@ static int modify_p4d_table(pgd_t *pgd, unsigned long addr, unsigned long end, · 401 unmodified lines
402	pud = vmem_crst_alloc(_REGION3_ENTRY_EMPTY);	402	pud = vmem_crst_alloc(_REGION3_ENTRY_EMPTY);
403	if (!pud)	403	if (!pud)
404	goto out;	404	goto out;
		405	p4d_populate(&init_mm, p4d, pud);
405	}	406	}
406	ret = modify_pud_table(p4d, addr, next, add, direct);	407	ret = modify_pud_table(p4d, addr, next, add, direct);
407	if (ret)	408	if (ret)

arch/sh/drivers/platform_early.c+1−1

@@ -246,7 +246,7 @@ static int __init sh_early_platform_driver_probe_id(char *class_str, · 245 unmodified lines
246	case EARLY_PLATFORM_ID_ERROR:	246	case EARLY_PLATFORM_ID_ERROR:
247	pr_warn("%s: unable to parse %s parameter\n",	247	pr_warn("%s: unable to parse %s parameter\n",
248	class_str, epdrv->pdrv->driver.name);	248	class_str, epdrv->pdrv->driver.name);
249	/* fall-through */	249	fallthrough;
250	case EARLY_PLATFORM_ID_UNSET:	250	case EARLY_PLATFORM_ID_UNSET:
251	match = NULL;	251	match = NULL;
252	break;	252	break;

arch/sh/kernel/disassemble.c+2−2

@@ -486,7 +486,7 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 485 unmodified lines
486	pr_cont("xd%d", rn & ~1);	486	pr_cont("xd%d", rn & ~1);
487	break;	487	break;
488	}	488	}
489	/* else, fall through */	489	fallthrough;
490	case D_REG_N:	490	case D_REG_N:
491	pr_cont("dr%d", rn);	491	pr_cont("dr%d", rn);
492	break;	492	break;
@@ -495,7 +495,7 @@ static void print_sh_insn(u32 memaddr, u16 insn) · 2 unmodified lines
495	pr_cont("xd%d", rm & ~1);	495	pr_cont("xd%d", rm & ~1);
496	break;	496	break;
497	}	497	}
498	/* else, fall through */	498	fallthrough;
499	case D_REG_M:	499	case D_REG_M:
500	pr_cont("dr%d", rm);	500	pr_cont("dr%d", rm);
501	break;	501	break;

arch/sh/kernel/kgdb.c+1−1

@@ -266,7 +266,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 265 unmodified lines
266	ptr = &remcomInBuffer[1];	266	ptr = &remcomInBuffer[1];
267	if (kgdb_hex2long(&ptr, &addr))	267	if (kgdb_hex2long(&ptr, &addr))
268	linux_regs->pc = addr;	268	linux_regs->pc = addr;
269	/* fallthrough */	269	fallthrough;
270	case 'D':	270	case 'D':
271	case 'k':	271	case 'k':
272	atomic_set(&kgdb_cpu_doing_single_step, -1);	272	atomic_set(&kgdb_cpu_doing_single_step, -1);

arch/sh/kernel/signal_32.c+1−1

@@ -418,7 +418,7 @@ handle_syscall_restart(unsigned long save_r0, struct pt_regs *regs, · 417 unmodified lines
418	case -ERESTARTSYS:	418	case -ERESTARTSYS:
419	if (!(sa->sa_flags & SA_RESTART))	419	if (!(sa->sa_flags & SA_RESTART))
420	goto no_system_call_restart;	420	goto no_system_call_restart;
421	/* fallthrough */	421	fallthrough;
422	case -ERESTARTNOINTR:	422	case -ERESTARTNOINTR:
423	regs->regs[0] = save_r0;	423	regs->regs[0] = save_r0;
424	regs->pc -= instruction_size(__raw_readw(regs->pc - 4));	424	regs->pc -= instruction_size(__raw_readw(regs->pc - 4));

arch/sparc/kernel/auxio_64.c+0−1

@@ -87,7 +87,6 @@ void auxio_set_lte(int on) · 86 unmodified lines
87	__auxio_sbus_set_lte(on);	87	__auxio_sbus_set_lte(on);
88	break;	88	break;
89	case AUXIO_TYPE_EBUS:	89	case AUXIO_TYPE_EBUS:
90	/* FALL-THROUGH */
91	default:	90	default:
92	break;	91	break;
93	}	92	}

arch/sparc/kernel/central.c+1−1

@@ -55,7 +55,7 @@ static int clock_board_calc_nslots(struct clock_board *p) · 54 unmodified lines
55	else	55	else
56	return 5;	56	return 5;
57	}	57	}
58	/* Fallthrough */	58	fallthrough;
59	default:	59	default:
60	return 4;	60	return 4;
61	}	61	}

arch/sparc/kernel/kgdb_32.c+1−1

@@ -122,7 +122,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 121 unmodified lines
122	linux_regs->pc = addr;	122	linux_regs->pc = addr;
123	linux_regs->npc = addr + 4;	123	linux_regs->npc = addr + 4;
124	}	124	}
125	/* fall through */	125	fallthrough;
126		126
127	case 'D':	127	case 'D':
128	case 'k':	128	case 'k':

arch/sparc/kernel/kgdb_64.c+1−1

@@ -148,7 +148,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 147 unmodified lines
148	linux_regs->tpc = addr;	148	linux_regs->tpc = addr;
149	linux_regs->tnpc = addr + 4;	149	linux_regs->tnpc = addr + 4;
150	}	150	}
151	/* fall through */	151	fallthrough;
152		152
153	case 'D':	153	case 'D':
154	case 'k':	154	case 'k':

arch/sparc/kernel/pcr.c+1−1

@@ -359,7 +359,7 @@ int __init pcr_arch_init(void) · 358 unmodified lines
359	* counter overflow interrupt so we can't make use of	359	* counter overflow interrupt so we can't make use of
360	* their hardware currently.	360	* their hardware currently.
361	*/	361	*/
362	/* fallthrough */	362	fallthrough;
363	default:	363	default:
364	err = -ENODEV;	364	err = -ENODEV;
365	goto out_unregister;	365	goto out_unregister;

arch/sparc/kernel/prom_32.c+1−1

@@ -224,7 +224,7 @@ void __init of_console_init(void) · 223 unmodified lines
224		224
225	case PROMDEV_TTYB:	225	case PROMDEV_TTYB:
226	skip = 1;	226	skip = 1;
227	/* FALLTHRU */	227	fallthrough;
228		228
229	case PROMDEV_TTYA:	229	case PROMDEV_TTYA:
230	type = "serial";	230	type = "serial";

arch/sparc/kernel/signal32.c+2−2

@@ -646,7 +646,7 @@ static inline void syscall_restart32(unsigned long orig_i0, struct pt_regs *regs · 645 unmodified lines
646	case ERESTARTSYS:	646	case ERESTARTSYS:
647	if (!(sa->sa_flags & SA_RESTART))	647	if (!(sa->sa_flags & SA_RESTART))
648	goto no_system_call_restart;	648	goto no_system_call_restart;
649	/* fallthrough */	649	fallthrough;
650	case ERESTARTNOINTR:	650	case ERESTARTNOINTR:
651	regs->u_regs[UREG_I0] = orig_i0;	651	regs->u_regs[UREG_I0] = orig_i0;
652	regs->tpc -= 4;	652	regs->tpc -= 4;
@@ -686,7 +686,7 @@ void do_signal32(struct pt_regs * regs) · 33 unmodified lines
686	regs->tpc -= 4;	686	regs->tpc -= 4;
687	regs->tnpc -= 4;	687	regs->tnpc -= 4;
688	pt_regs_clear_syscall(regs);	688	pt_regs_clear_syscall(regs);
689	/* fall through */	689	fallthrough;
690	case ERESTART_RESTARTBLOCK:	690	case ERESTART_RESTARTBLOCK:
691	regs->u_regs[UREG_G1] = __NR_restart_syscall;	691	regs->u_regs[UREG_G1] = __NR_restart_syscall;
692	regs->tpc -= 4;	692	regs->tpc -= 4;

arch/sparc/kernel/signal_32.c+2−2

@@ -440,7 +440,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, · 439 unmodified lines
440	case ERESTARTSYS:	440	case ERESTARTSYS:
441	if (!(sa->sa_flags & SA_RESTART))	441	if (!(sa->sa_flags & SA_RESTART))
442	goto no_system_call_restart;	442	goto no_system_call_restart;
443	/* fallthrough */	443	fallthrough;
444	case ERESTARTNOINTR:	444	case ERESTARTNOINTR:
445	regs->u_regs[UREG_I0] = orig_i0;	445	regs->u_regs[UREG_I0] = orig_i0;
446	regs->pc -= 4;	446	regs->pc -= 4;
@@ -506,7 +506,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) · 59 unmodified lines
506	regs->pc -= 4;	506	regs->pc -= 4;
507	regs->npc -= 4;	507	regs->npc -= 4;
508	pt_regs_clear_syscall(regs);	508	pt_regs_clear_syscall(regs);
509	/* fall through */	509	fallthrough;
510	case ERESTART_RESTARTBLOCK:	510	case ERESTART_RESTARTBLOCK:
511	regs->u_regs[UREG_G1] = __NR_restart_syscall;	511	regs->u_regs[UREG_G1] = __NR_restart_syscall;
512	regs->pc -= 4;	512	regs->pc -= 4;

arch/sparc/kernel/signal_64.c+2−2

@@ -461,7 +461,7 @@ static inline void syscall_restart(unsigned long orig_i0, struct pt_regs *regs, · 460 unmodified lines
461	case ERESTARTSYS:	461	case ERESTARTSYS:
462	if (!(sa->sa_flags & SA_RESTART))	462	if (!(sa->sa_flags & SA_RESTART))
463	goto no_system_call_restart;	463	goto no_system_call_restart;
464	/* fallthrough */	464	fallthrough;
465	case ERESTARTNOINTR:	465	case ERESTARTNOINTR:
466	regs->u_regs[UREG_I0] = orig_i0;	466	regs->u_regs[UREG_I0] = orig_i0;
467	regs->tpc -= 4;	467	regs->tpc -= 4;
@@ -532,7 +532,7 @@ static void do_signal(struct pt_regs *regs, unsigned long orig_i0) · 64 unmodified lines
532	regs->tpc -= 4;	532	regs->tpc -= 4;
533	regs->tnpc -= 4;	533	regs->tnpc -= 4;
534	pt_regs_clear_syscall(regs);	534	pt_regs_clear_syscall(regs);
535	/* fall through */	535	fallthrough;
536	case ERESTART_RESTARTBLOCK:	536	case ERESTART_RESTARTBLOCK:
537	regs->u_regs[UREG_G1] = __NR_restart_syscall;	537	regs->u_regs[UREG_G1] = __NR_restart_syscall;
538	regs->tpc -= 4;	538	regs->tpc -= 4;

arch/sparc/math-emu/math_32.c+4−4

@@ -359,7 +359,7 @@ static int do_one_mathemu(u32 insn, unsigned long pfsr, unsigned long fregs) · 358 unmodified lines
359	*pfsr \|= (6 << 14);	359	*pfsr \|= (6 << 14);
360	return 0; /* simulate invalid_fp_register exception */	360	return 0; /* simulate invalid_fp_register exception */
361	}	361	}
362	/* fall through */	362	fallthrough;
363	case 2:	363	case 2:
364	if (freg & 1) { /* doublewords must have bit 5 zeroed */	364	if (freg & 1) { /* doublewords must have bit 5 zeroed */
365	*pfsr \|= (6 << 14);	365	*pfsr \|= (6 << 14);
@@ -380,7 +380,7 @@ static int do_one_mathemu(u32 insn, unsigned long pfsr, unsigned long fregs) · 14 unmodified lines
380	*pfsr \|= (6 << 14);	380	*pfsr \|= (6 << 14);
381	return 0; /* simulate invalid_fp_register exception */	381	return 0; /* simulate invalid_fp_register exception */
382	}	382	}
383	/* fall through */	383	fallthrough;
384	case 2:	384	case 2:
385	if (freg & 1) { /* doublewords must have bit 5 zeroed */	385	if (freg & 1) { /* doublewords must have bit 5 zeroed */
386	*pfsr \|= (6 << 14);	386	*pfsr \|= (6 << 14);
@@ -408,13 +408,13 @@ static int do_one_mathemu(u32 insn, unsigned long pfsr, unsigned long fregs) · 21 unmodified lines
408	*pfsr \|= (6 << 14);	408	*pfsr \|= (6 << 14);
409	return 0; /* simulate invalid_fp_register exception */	409	return 0; /* simulate invalid_fp_register exception */
410	}	410	}
411	/* fall through */	411	fallthrough;
412	case 2:	412	case 2:
413	if (freg & 1) { /* doublewords must have bit 5 zeroed */	413	if (freg & 1) { /* doublewords must have bit 5 zeroed */
414	*pfsr \|= (6 << 14);	414	*pfsr \|= (6 << 14);
415	return 0;	415	return 0;
416	}	416	}
417	/* fall through */	417	fallthrough;
418	case 1:	418	case 1:
419	rd = (void *)&fregs[freg];	419	rd = (void *)&fregs[freg];
420	break;	420	break;

arch/sparc/net/bpf_jit_comp_32.c+1−1

@@ -491,7 +491,7 @@ void bpf_jit_compile(struct bpf_prog *fp) · 490 unmodified lines
491	} else {	491	} else {
492	emit_loadimm(K, r_A);	492	emit_loadimm(K, r_A);
493	}	493	}
494	/* Fallthrough */	494	fallthrough;
495	case BPF_RET \| BPF_A:	495	case BPF_RET \| BPF_A:
496	if (seen_or_pass0) {	496	if (seen_or_pass0) {
497	if (i != flen - 1) {	497	if (i != flen - 1) {

arch/um/kernel/signal.c+1−1

@@ -70,7 +70,7 @@ static void handle_signal(struct ksignal ksig, struct pt_regs regs) · 69 unmodified lines
70	PT_REGS_SYSCALL_RET(regs) = -EINTR;	70	PT_REGS_SYSCALL_RET(regs) = -EINTR;
71	break;	71	break;
72	}	72	}
73	/* fallthrough */	73	fallthrough;
74	case -ERESTARTNOINTR:	74	case -ERESTARTNOINTR:
75	PT_REGS_RESTART_SYSCALL(regs);	75	PT_REGS_RESTART_SYSCALL(regs);
76	PT_REGS_ORIG_SYSCALL(regs) = PT_REGS_SYSCALL_NR(regs);	76	PT_REGS_ORIG_SYSCALL(regs) = PT_REGS_SYSCALL_NR(regs);

arch/x86/boot/cmdline.c+2−2

@@ -54,7 +54,7 @@ int __cmdline_find_option(unsigned long cmdline_ptr, const char option, char b · 53 unmodified lines
54	/* else */	54	/* else */
55	state = st_wordcmp;	55	state = st_wordcmp;
56	opptr = option;	56	opptr = option;
57	/* fall through */	57	fallthrough;
58		58
59	case st_wordcmp:	59	case st_wordcmp:
60	if (c == '=' && !*opptr) {	60	if (c == '=' && !*opptr) {
@@ -129,7 +129,7 @@ int __cmdline_find_option_bool(unsigned long cmdline_ptr, const char *option) · 68 unmodified lines
129	state = st_wordcmp;	129	state = st_wordcmp;
130	opptr = option;	130	opptr = option;
131	wstart = pos;	131	wstart = pos;
132	/* fall through */	132	fallthrough;
133		133
134	case st_wordcmp:	134	case st_wordcmp:
135	if (!*opptr)	135	if (!*opptr)

arch/x86/boot/compressed/kaslr.c+1−1

@@ -178,7 +178,7 @@ parse_memmap(char p, unsigned long long start, unsigned long long *size, · 177 unmodified lines
178	}	178	}
179	*size = 0;	179	*size = 0;
180	}	180	}
181	/* Fall through */	181	fallthrough;
182	default:	182	default:
183	/*	183	/*
184	* If w/o offset, only size specified, memmap=nn[KMG] has the	184	* If w/o offset, only size specified, memmap=nn[KMG] has the

arch/x86/entry/common.c+20−9

@@ -60,16 +60,10 @@ __visible noinstr void do_syscall_64(unsigned long nr, struct pt_regs *regs) · 59 unmodified lines
60	#if defined(CONFIG_X86_32) \|\| defined(CONFIG_IA32_EMULATION)	60	#if defined(CONFIG_X86_32) \|\| defined(CONFIG_IA32_EMULATION)
61	static __always_inline unsigned int syscall_32_enter(struct pt_regs *regs)	61	static __always_inline unsigned int syscall_32_enter(struct pt_regs *regs)
62	{	62	{
63	unsigned int nr = (unsigned int)regs->orig_ax;
64
65	if (IS_ENABLED(CONFIG_IA32_EMULATION))	63	if (IS_ENABLED(CONFIG_IA32_EMULATION))
66	current_thread_info()->status \|= TS_COMPAT;	64	current_thread_info()->status \|= TS_COMPAT;
67	/*	65
68	* Subtlety here: if ptrace pokes something larger than 2^32-1 into	66	return (unsigned int)regs->orig_ax;
69	* orig_ax, the unsigned int return value truncates it. This may
70	* or may not be necessary, but it matches the old asm behavior.
71	*/
72	return (unsigned int)syscall_enter_from_user_mode(regs, nr);
73	}	67	}
74		68
75	/*	69	/*
@@ -91,15 +85,29 @@ __visible noinstr void do_int80_syscall_32(struct pt_regs *regs) · 15 unmodified lines
91	{	85	{
92	unsigned int nr = syscall_32_enter(regs);	86	unsigned int nr = syscall_32_enter(regs);
93		87
		88	/*
		89	* Subtlety here: if ptrace pokes something larger than 2^32-1 into
		90	* orig_ax, the unsigned int return value truncates it. This may
		91	* or may not be necessary, but it matches the old asm behavior.
		92	*/
		93	nr = (unsigned int)syscall_enter_from_user_mode(regs, nr);
		94
94	do_syscall_32_irqs_on(regs, nr);	95	do_syscall_32_irqs_on(regs, nr);
95	syscall_exit_to_user_mode(regs);	96	syscall_exit_to_user_mode(regs);
96	}	97	}
97		98
98	static noinstr bool __do_fast_syscall_32(struct pt_regs *regs)	99	static noinstr bool __do_fast_syscall_32(struct pt_regs *regs)
99	{	100	{
100	unsigned int nr = syscall_32_enter(regs);	101	unsigned int nr = syscall_32_enter(regs);
101	int res;	102	int res;
102		103
		104	/*
		105	* This cannot use syscall_enter_from_user_mode() as it has to
		106	* fetch EBP before invoking any of the syscall entry work
		107	* functions.
		108	*/
		109	syscall_enter_from_user_mode_prepare(regs);
		110
103	instrumentation_begin();	111	instrumentation_begin();
104	/* Fetch EBP from where the vDSO stashed it. */	112	/* Fetch EBP from where the vDSO stashed it. */
105	if (IS_ENABLED(CONFIG_X86_64)) {	113	if (IS_ENABLED(CONFIG_X86_64)) {
@@ -122,6 +130,9 @@ static noinstr bool __do_fast_syscall_32(struct pt_regs *regs) · 16 unmodified lines
122	return false;	130	return false;
123	}	131	}
124		132
		133	/* The case truncates any ptrace induced syscall nr > 2^32 -1 */
		134	nr = (unsigned int)syscall_enter_from_user_mode_work(regs, nr);
		135
125	/* Now this is just like a normal syscall. */	136	/* Now this is just like a normal syscall. */
126	do_syscall_32_irqs_on(regs, nr);	137	do_syscall_32_irqs_on(regs, nr);
127	syscall_exit_to_user_mode(regs);	138	syscall_exit_to_user_mode(regs);

arch/x86/entry/thunk_32.S+0−5

 SYM_CODE_END(\name)
 	.endm
-#ifdef CONFIG_TRACE_IRQFLAGS
-	THUNK trace_hardirqs_on_thunk,trace_hardirqs_on_caller,1
-	THUNK trace_hardirqs_off_thunk,trace_hardirqs_off_caller,1
-#endif
 #ifdef CONFIG_PREEMPTION
 	THUNK preempt_schedule_thunk, preempt_schedule
 	THUNK preempt_schedule_notrace_thunk, preempt_schedule_notrace

arch/x86/events/intel/core.c+3−3

@@ -4682,7 +4682,7 @@ __init int intel_pmu_init(void) · 4681 unmodified lines
4682		4682
4683	case INTEL_FAM6_CORE2_MEROM:	4683	case INTEL_FAM6_CORE2_MEROM:
4684	x86_add_quirk(intel_clovertown_quirk);	4684	x86_add_quirk(intel_clovertown_quirk);
4685	/* fall through */	4685	fallthrough;
4686		4686
4687	case INTEL_FAM6_CORE2_MEROM_L:	4687	case INTEL_FAM6_CORE2_MEROM_L:
4688	case INTEL_FAM6_CORE2_PENRYN:	4688	case INTEL_FAM6_CORE2_PENRYN:
@@ -5062,7 +5062,7 @@ __init int intel_pmu_init(void) · 373 unmodified lines
5062		5062
5063	case INTEL_FAM6_SKYLAKE_X:	5063	case INTEL_FAM6_SKYLAKE_X:
5064	pmem = true;	5064	pmem = true;
5065	/* fall through */	5065	fallthrough;
5066	case INTEL_FAM6_SKYLAKE_L:	5066	case INTEL_FAM6_SKYLAKE_L:
5067	case INTEL_FAM6_SKYLAKE:	5067	case INTEL_FAM6_SKYLAKE:
5068	case INTEL_FAM6_KABYLAKE_L:	5068	case INTEL_FAM6_KABYLAKE_L:
@@ -5114,7 +5114,7 @@ __init int intel_pmu_init(void) · 45 unmodified lines
5114	case INTEL_FAM6_ICELAKE_X:	5114	case INTEL_FAM6_ICELAKE_X:
5115	case INTEL_FAM6_ICELAKE_D:	5115	case INTEL_FAM6_ICELAKE_D:
5116	pmem = true;	5116	pmem = true;
5117	/* fall through */	5117	fallthrough;
5118	case INTEL_FAM6_ICELAKE_L:	5118	case INTEL_FAM6_ICELAKE_L:
5119	case INTEL_FAM6_ICELAKE:	5119	case INTEL_FAM6_ICELAKE:
5120	case INTEL_FAM6_TIGERLAKE_L:	5120	case INTEL_FAM6_TIGERLAKE_L:

arch/x86/events/intel/lbr.c+1−1

@@ -1268,7 +1268,7 @@ static int branch_type(unsigned long from, unsigned long to, int abort) · 1267 unmodified lines
1268	ret = X86_BR_ZERO_CALL;	1268	ret = X86_BR_ZERO_CALL;
1269	break;	1269	break;
1270	}	1270	}
1271	/* fall through */	1271	fallthrough;
1272	case 0x9a: /* call far absolute */	1272	case 0x9a: /* call far absolute */
1273	ret = X86_BR_CALL;	1273	ret = X86_BR_CALL;
1274	break;	1274	break;

arch/x86/include/asm/entry-common.h+10−2

@@ -18,8 +18,16 @@ static __always_inline void arch_check_user_regs(struct pt_regs *regs) · 17 unmodified lines
18	* state, not the interrupt state as imagined by Xen.	18	* state, not the interrupt state as imagined by Xen.
19	*/	19	*/
20	unsigned long flags = native_save_fl();	20	unsigned long flags = native_save_fl();
21	WARN_ON_ONCE(flags & (X86_EFLAGS_AC \| X86_EFLAGS_DF \|	21	unsigned long mask = X86_EFLAGS_DF \| X86_EFLAGS_NT;
22	X86_EFLAGS_NT));	22
		23	/*
		24	* For !SMAP hardware we patch out CLAC on entry.
		25	*/
		26	if (boot_cpu_has(X86_FEATURE_SMAP) \|\|
		27	(IS_ENABLED(CONFIG_64_BIT) && boot_cpu_has(X86_FEATURE_XENPV)))
		28	mask \|= X86_EFLAGS_AC;
		29
		30	WARN_ON_ONCE(flags & mask);
23		31
24	/* We think we came from user mode. Make sure pt_regs agrees. */	32	/* We think we came from user mode. Make sure pt_regs agrees. */
25	WARN_ON_ONCE(!user_mode(regs));	33	WARN_ON_ONCE(!user_mode(regs));

arch/x86/include/asm/mmu.h+1−0

@@ -59,5 +59,6 @@ typedef struct { · 58 unmodified lines
59	}	59	}
60		60
61	void leave_mm(int cpu);	61	void leave_mm(int cpu);
		62	#define leave_mm leave_mm
62		63
63	#endif /* _ASM_X86_MMU_H */	64	#endif /* _ASM_X86_MMU_H */

arch/x86/include/asm/ptrace.h+1−1

 	static const unsigned int argument_offs[] = {
 #ifdef __i386__
 		offsetof(struct pt_regs, ax),
-		offsetof(struct pt_regs, cx),
 		offsetof(struct pt_regs, dx),
+		offsetof(struct pt_regs, cx),
 #define NR_REG_ARGUMENTS 3
 #else
 		offsetof(struct pt_regs, di),

arch/x86/kernel/alternative.c+1−1

@@ -239,7 +239,7 @@ void __init arch_init_ideal_nops(void) · 238 unmodified lines
239	return;	239	return;
240	}	240	}
241		241
242	/* fall through */	242	fallthrough;
243		243
244	default:	244	default:
245	#ifdef CONFIG_X86_64	245	#ifdef CONFIG_X86_64

arch/x86/kernel/apic/io_apic.c+2−2

@@ -800,7 +800,7 @@ static int irq_polarity(int idx) · 799 unmodified lines
800	return IOAPIC_POL_HIGH;	800	return IOAPIC_POL_HIGH;
801	case MP_IRQPOL_RESERVED:	801	case MP_IRQPOL_RESERVED:
802	pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");	802	pr_warn("IOAPIC: Invalid polarity: 2, defaulting to low\n");
803	/* fall through */	803	fallthrough;
804	case MP_IRQPOL_ACTIVE_LOW:	804	case MP_IRQPOL_ACTIVE_LOW:
805	default: /* Pointless default required due to do gcc stupidity */	805	default: /* Pointless default required due to do gcc stupidity */
806	return IOAPIC_POL_LOW;	806	return IOAPIC_POL_LOW;
@@ -848,7 +848,7 @@ static int irq_trigger(int idx) · 41 unmodified lines
848	return IOAPIC_EDGE;	848	return IOAPIC_EDGE;
849	case MP_IRQTRIG_RESERVED:	849	case MP_IRQTRIG_RESERVED:
850	pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");	850	pr_warn("IOAPIC: Invalid trigger mode 2 defaulting to level\n");
851	/* fall through */	851	fallthrough;
852	case MP_IRQTRIG_LEVEL:	852	case MP_IRQTRIG_LEVEL:
853	default: /* Pointless default required due to do gcc stupidity */	853	default: /* Pointless default required due to do gcc stupidity */
854	return IOAPIC_LEVEL;	854	return IOAPIC_LEVEL;

arch/x86/kernel/apic/probe_32.c+1−1

@@ -149,7 +149,7 @@ void __init default_setup_apic_routing(void) · 148 unmodified lines
149	break;	149	break;
150	}	150	}
151	/* P4 and above */	151	/* P4 and above */
152	/* fall through */	152	fallthrough;
153	case X86_VENDOR_HYGON:	153	case X86_VENDOR_HYGON:
154	case X86_VENDOR_AMD:	154	case X86_VENDOR_AMD:
155	def_to_bigsmp = 1;	155	def_to_bigsmp = 1;

arch/x86/kernel/apic/vector.c+9−7

 		apicd->move_in_progress = true;
 		apicd->prev_vector = apicd->vector;
 		apicd->prev_cpu = apicd->cpu;
+		WARN_ON_ONCE(apicd->cpu == newcpu);
 	} else {
 		irq_matrix_free(vector_matrix, apicd->cpu, apicd->vector,
 				managed);
 		__send_cleanup_vector(apicd);
 }
-static void __irq_complete_move(struct irq_cfg *cfg, unsigned vector)
+void irq_complete_move(struct irq_cfg *cfg)
 {
 	struct apic_chip_data *apicd;
 	if (likely(!apicd->move_in_progress))
 		return;
-	if (vector == apicd->vector && apicd->cpu == smp_processor_id())
+	/*
+	 * If the interrupt arrived on the new target CPU, cleanup the
+	 * vector on the old target CPU. A vector check is not required
+	 * because an interrupt can never move from one vector to another
+	 * on the same CPU.
+	 */
+	if (apicd->cpu == smp_processor_id())
 		__send_cleanup_vector(apicd);
 }
-void irq_complete_move(struct irq_cfg *cfg)
-{
-	__irq_complete_move(cfg, ~get_irq_regs()->orig_ax);
-}
 /*
  * Called from fixup_irqs() with @desc->lock held and interrupts disabled.
  */

arch/x86/kernel/cpu/cacheinfo.c+1−1

@@ -248,7 +248,7 @@ amd_cpuid4(int leaf, union _cpuid4_leaf_eax *eax, · 247 unmodified lines
248	switch (leaf) {	248	switch (leaf) {
249	case 1:	249	case 1:
250	l1 = &l1i;	250	l1 = &l1i;
251	/* fall through */	251	fallthrough;
252	case 0:	252	case 0:
253	if (!l1->val)	253	if (!l1->val)
254	return;	254	return;

arch/x86/kernel/cpu/mce/inject.c+1−1

@@ -199,7 +199,7 @@ static int raise_local(void) · 198 unmodified lines
199	* calling irq_enter, but the necessary	199	* calling irq_enter, but the necessary
200	* machinery isn't exported currently.	200	* machinery isn't exported currently.
201	*/	201	*/
202	/FALL THROUGH/	202	fallthrough;
203	case MCJ_CTX_PROCESS:	203	case MCJ_CTX_PROCESS:
204	raise_exception(m, NULL);	204	raise_exception(m, NULL);
205	break;	205	break;

arch/x86/kernel/cpu/mce/intel.c+1−1

@@ -193,7 +193,7 @@ unsigned long cmci_intel_adjust_timer(unsigned long interval) · 192 unmodified lines
193	if (!atomic_sub_return(1, &cmci_storm_on_cpus))	193	if (!atomic_sub_return(1, &cmci_storm_on_cpus))
194	pr_notice("CMCI storm subsided: switching to interrupt mode\n");	194	pr_notice("CMCI storm subsided: switching to interrupt mode\n");
195		195
196	/* FALLTHROUGH */	196	fallthrough;
197		197
198	case CMCI_STORM_SUBSIDED:	198	case CMCI_STORM_SUBSIDED:
199	/*	199	/*

arch/x86/kernel/cpu/mtrr/cyrix.c+1−1

@@ -98,7 +98,7 @@ cyrix_get_free_region(unsigned long base, unsigned long size, int replace_reg) · 97 unmodified lines
98	case 7:	98	case 7:
99	if (size < 0x40)	99	if (size < 0x40)
100	break;	100	break;
101	/* Else, fall through */	101	fallthrough;
102	case 6:	102	case 6:
103	case 5:	103	case 5:
104	case 4:	104	case 4:

arch/x86/kernel/hw_breakpoint.c+1−1

@@ -349,7 +349,7 @@ static int arch_build_bp_info(struct perf_event *bp, · 348 unmodified lines
349	hw->len = X86_BREAKPOINT_LEN_X;	349	hw->len = X86_BREAKPOINT_LEN_X;
350	return 0;	350	return 0;
351	}	351	}
352	/* fall through */	352	fallthrough;
353	default:	353	default:
354	return -EINVAL;	354	return -EINVAL;
355	}	355	}

arch/x86/kernel/kgdb.c+2−2

@@ -450,7 +450,7 @@ int kgdb_arch_handle_exception(int e_vector, int signo, int err_code, · 449 unmodified lines
450	ptr = &remcomInBuffer[1];	450	ptr = &remcomInBuffer[1];
451	if (kgdb_hex2long(&ptr, &addr))	451	if (kgdb_hex2long(&ptr, &addr))
452	linux_regs->ip = addr;	452	linux_regs->ip = addr;
453	/* fall through */	453	fallthrough;
454	case 'D':	454	case 'D':
455	case 'k':	455	case 'k':
456	/* clear the trace bit */	456	/* clear the trace bit */
@@ -539,7 +539,7 @@ static int __kgdb_notify(struct die_args *args, unsigned long cmd) · 82 unmodified lines
539	* a system call which should be ignored	539	* a system call which should be ignored
540	*/	540	*/
541	return NOTIFY_DONE;	541	return NOTIFY_DONE;
542	/* fall through */	542	fallthrough;
543	default:	543	default:
544	if (user_mode(regs))	544	if (user_mode(regs))
545	return NOTIFY_DONE;	545	return NOTIFY_DONE;

arch/x86/kernel/mpparse.c+2−2

@@ -312,7 +312,7 @@ static void __init construct_default_ioirq_mptable(int mpc_default_type) · 311 unmodified lines
312	case 2:	312	case 2:
313	if (i == 0 \|\| i == 13)	313	if (i == 0 \|\| i == 13)
314	continue; /* IRQ0 & IRQ13 not connected */	314	continue; /* IRQ0 & IRQ13 not connected */
315	/* fall through */	315	fallthrough;
316	default:	316	default:
317	if (i == 2)	317	if (i == 2)
318	continue; /* IRQ2 is never connected */	318	continue; /* IRQ2 is never connected */
@@ -356,7 +356,7 @@ static void __init construct_ioapic_table(int mpc_default_type) · 37 unmodified lines
356	default:	356	default:
357	pr_err("???\nUnknown standard configuration %d\n",	357	pr_err("???\nUnknown standard configuration %d\n",
358	mpc_default_type);	358	mpc_default_type);
359	/* fall through */	359	fallthrough;
360	case 1:	360	case 1:
361	case 5:	361	case 5:
362	memcpy(bus.bustype, "ISA ", 6);	362	memcpy(bus.bustype, "ISA ", 6);

arch/x86/kernel/process.c+0−4

  */
 void __cpuidle default_idle(void)
 {
-	trace_cpu_idle_rcuidle(1, smp_processor_id());
 	safe_halt();
-	trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 }
 #if defined(CONFIG_APM_MODULE) || defined(CONFIG_HALTPOLL_CPUIDLE_MODULE)
 EXPORT_SYMBOL(default_idle);
 static __cpuidle void mwait_idle(void)
 {
 	if (!current_set_polling_and_test()) {
-		trace_cpu_idle_rcuidle(1, smp_processor_id());
 		if (this_cpu_has(X86_BUG_CLFLUSH_MONITOR)) {
 			mb(); /* quirk */
 			clflush((void *)&current_thread_info()->flags);
 			__sti_mwait(0, 0);
 		else
 			local_irq_enable();
-		trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
 	} else {
 		local_irq_enable();
 	}

arch/x86/kernel/ptrace.c+1−1

@@ -204,7 +204,7 @@ static int set_segment_reg(struct task_struct *task, · 203 unmodified lines
204	case offsetof(struct user_regs_struct, ss):	204	case offsetof(struct user_regs_struct, ss):
205	if (unlikely(value == 0))	205	if (unlikely(value == 0))
206	return -EIO;	206	return -EIO;
207	/* Else, fall through */	207	fallthrough;
208		208
209	default:	209	default:
210	*pt_regs_access(task_pt_regs(task), offset) = value;	210	*pt_regs_access(task_pt_regs(task), offset) = value;

arch/x86/kernel/reboot.c+1−1

@@ -654,7 +654,7 @@ static void native_machine_emergency_restart(void) · 653 unmodified lines
654		654
655	case BOOT_CF9_FORCE:	655	case BOOT_CF9_FORCE:
656	port_cf9_safe = true;	656	port_cf9_safe = true;
657	/* Fall through */	657	fallthrough;
658		658
659	case BOOT_CF9_SAFE:	659	case BOOT_CF9_SAFE:
660	if (port_cf9_safe) {	660	if (port_cf9_safe) {

arch/x86/kernel/signal.c+1−1

@@ -726,7 +726,7 @@ handle_signal(struct ksignal ksig, struct pt_regs regs) · 725 unmodified lines
726	regs->ax = -EINTR;	726	regs->ax = -EINTR;
727	break;	727	break;
728	}	728	}
729	/* fallthrough */	729	fallthrough;
730	case -ERESTARTNOINTR:	730	case -ERESTARTNOINTR:
731	regs->ax = regs->orig_ax;	731	regs->ax = regs->orig_ax;
732	regs->ip -= 2;	732	regs->ip -= 2;

arch/x86/kernel/smpboot.c+20−6

@@ -1594,14 +1594,28 @@ int native_cpu_disable(void) · 1593 unmodified lines
1594	if (ret)	1594	if (ret)
1595	return ret;	1595	return ret;
1596		1596
1597	/*
1598	* Disable the local APIC. Otherwise IPI broadcasts will reach
1599	* it. It still responds normally to INIT, NMI, SMI, and SIPI
1600	* messages.
1601	*/
1602	apic_soft_disable();
1603	cpu_disable_common();	1597	cpu_disable_common();
1604		1598
		1599	/*
		1600	* Disable the local APIC. Otherwise IPI broadcasts will reach
		1601	* it. It still responds normally to INIT, NMI, SMI, and SIPI
		1602	* messages.
		1603	*
		1604	* Disabling the APIC must happen after cpu_disable_common()
		1605	* which invokes fixup_irqs().
		1606	*
		1607	* Disabling the APIC preserves already set bits in IRR, but
		1608	* an interrupt arriving after disabling the local APIC does not
		1609	* set the corresponding IRR bit.
		1610	*
		1611	* fixup_irqs() scans IRR for set bits so it can raise a not
		1612	* yet handled interrupt on the new destination CPU via an IPI
		1613	* but obviously it can't do so for IRR bits which are not set.
		1614	* IOW, interrupts arriving after disabling the local APIC will
		1615	* be lost.
		1616	*/
		1617	apic_soft_disable();
		1618
1605	return 0;	1619	return 0;
1606	}	1620	}
1607		1621

arch/x86/kernel/traps.c+31−34

 #endif
 }
-static __always_inline void debug_enter(unsigned long *dr6, unsigned long *dr7)
+static __always_inline unsigned long debug_read_clear_dr6(void)
 {
-	/*
+	unsigned long dr6;
-	 * Disable breakpoints during exception handling; recursive exceptions
-	 * are exceedingly 'fun'.
-	 *
-	 * Since this function is NOKPROBE, and that also applies to
-	 * HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a
-	 * HW_BREAKPOINT_W on our stack)
-	 *
-	 * Entry text is excluded for HW_BP_X and cpu_entry_area, which
-	 * includes the entry stack is excluded for everything.
-	 */
-	*dr7 = local_db_save();
 	/*
 	 * The Intel SDM says:
 	 *
 	 * Keep it simple: clear DR6 immediately.
 	 */
-	get_debugreg(*dr6, 6);
+	get_debugreg(dr6, 6);
 	set_debugreg(0, 6);
 	/* Filter out all the reserved bits which are preset to 1 */
-	*dr6 &= ~DR6_RESERVED;
+	dr6 &= ~DR6_RESERVED;
-}
-static __always_inline void debug_exit(unsigned long dr7)
+	return dr6;
-{
-	local_db_restore(dr7);
 }
 /*
 static __always_inline void exc_debug_kernel(struct pt_regs *regs,
 					     unsigned long dr6)
 {
+	/*
+	 * Disable breakpoints during exception handling; recursive exceptions
+	 * are exceedingly 'fun'.
+	 *
+	 * Since this function is NOKPROBE, and that also applies to
+	 * HW_BREAKPOINT_X, we can't hit a breakpoint before this (XXX except a
+	 * HW_BREAKPOINT_W on our stack)
+	 *
+	 * Entry text is excluded for HW_BP_X and cpu_entry_area, which
+	 * includes the entry stack is excluded for everything.
+	 */
+	unsigned long dr7 = local_db_save();
 	bool irq_state = idtentry_enter_nmi(regs);
 	instrumentation_begin();
 	instrumentation_end();
 	idtentry_exit_nmi(regs, irq_state);
+	local_db_restore(dr7);
 }
 static __always_inline void exc_debug_user(struct pt_regs *regs,
 	 */
 	WARN_ON_ONCE(!user_mode(regs));
+	/*
+	 * NB: We can't easily clear DR7 here because
+	 * idtentry_exit_to_usermode() can invoke ptrace, schedule, access
+	 * user memory, etc.  This means that a recursive #DB is possible.  If
+	 * this happens, that #DB will hit exc_debug_kernel() and clear DR7.
+	 * Since we're not on the IST stack right now, everything will be
+	 * fine.
+	 */
 	irqentry_enter_from_user_mode(regs);
 	instrumentation_begin();
 /* IST stack entry */
 DEFINE_IDTENTRY_DEBUG(exc_debug)
 {
-	unsigned long dr6, dr7;
+	exc_debug_kernel(regs, debug_read_clear_dr6());
-	debug_enter(&dr6, &dr7);
-	exc_debug_kernel(regs, dr6);
-	debug_exit(dr7);
 }
 /* User entry, runs on regular task stack */
 DEFINE_IDTENTRY_DEBUG_USER(exc_debug)
 {
-	unsigned long dr6, dr7;
+	exc_debug_user(regs, debug_read_clear_dr6());
-	debug_enter(&dr6, &dr7);
-	exc_debug_user(regs, dr6);
-	debug_exit(dr7);
 }
 #else
 /* 32 bit does not have separate entry points. */
 DEFINE_IDTENTRY_RAW(exc_debug)
 {
-	unsigned long dr6, dr7;
+	unsigned long dr6 = debug_read_clear_dr6();
-	debug_enter(&dr6, &dr7);
 	if (user_mode(regs))
 		exc_debug_user(regs, dr6);
 	else
 		exc_debug_kernel(regs, dr6);
-	debug_exit(dr7);
 }
 #endif

arch/x86/kernel/uprobes.c+2−2

@@ -735,7 +735,7 @@ static int branch_setup_xol_ops(struct arch_uprobe auprobe, struct insn insn) · 734 unmodified lines
735	* OPCODE1() of the "short" jmp which checks the same condition.	735	* OPCODE1() of the "short" jmp which checks the same condition.
736	*/	736	*/
737	opc1 = OPCODE2(insn) - 0x10;	737	opc1 = OPCODE2(insn) - 0x10;
738	/* fall through */	738	fallthrough;
739	default:	739	default:
740	if (!is_cond_jmp_opcode(opc1))	740	if (!is_cond_jmp_opcode(opc1))
741	return -ENOSYS;	741	return -ENOSYS;
@@ -892,7 +892,7 @@ int arch_uprobe_analyze_insn(struct arch_uprobe auprobe, struct mm_struct mm, · 150 unmodified lines
892	fix_ip_or_call = 0;	892	fix_ip_or_call = 0;
893	break;	893	break;
894	}	894	}
895	/* fall through */	895	fallthrough;
896	default:	896	default:
897	riprel_analyze(auprobe, &insn);	897	riprel_analyze(auprobe, &insn);
898	}	898	}

arch/x86/kvm/emulate.c+1−1

@@ -3016,7 +3016,7 @@ static void string_registers_quirk(struct x86_emulate_ctxt *ctxt) · 3015 unmodified lines
3016	case 0xa4: /* movsb */	3016	case 0xa4: /* movsb */
3017	case 0xa5: /* movsd/w */	3017	case 0xa5: /* movsd/w */
3018	*reg_rmw(ctxt, VCPU_REGS_RSI) &= (u32)-1;	3018	*reg_rmw(ctxt, VCPU_REGS_RSI) &= (u32)-1;
3019	/* fall through */	3019	fallthrough;
3020	case 0xaa: /* stosb */	3020	case 0xaa: /* stosb */
3021	case 0xab: /* stosd/w */	3021	case 0xab: /* stosd/w */
3022	*reg_rmw(ctxt, VCPU_REGS_RDI) &= (u32)-1;	3022	*reg_rmw(ctxt, VCPU_REGS_RDI) &= (u32)-1;

arch/x86/kvm/hyperv.c+1−1

@@ -1779,7 +1779,7 @@ int kvm_hv_hypercall(struct kvm_vcpu *vcpu) · 1778 unmodified lines
1779	ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);	1779	ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
1780	if (ret != HV_STATUS_INVALID_PORT_ID)	1780	if (ret != HV_STATUS_INVALID_PORT_ID)
1781	break;	1781	break;
1782	/* fall through - maybe userspace knows this conn_id. */	1782	fallthrough; /* maybe userspace knows this conn_id */
1783	case HVCALL_POST_MESSAGE:	1783	case HVCALL_POST_MESSAGE:
1784	/* don't bother userspace if it has no way to handle it */	1784	/* don't bother userspace if it has no way to handle it */
1785	if (unlikely(rep \|\| !vcpu_to_synic(vcpu)->active)) {	1785	if (unlikely(rep \|\| !vcpu_to_synic(vcpu)->active)) {

arch/x86/kvm/irq_comm.c+1−1

@@ -285,7 +285,7 @@ int kvm_set_routing_entry(struct kvm *kvm, · 284 unmodified lines
285	switch (ue->u.irqchip.irqchip) {	285	switch (ue->u.irqchip.irqchip) {
286	case KVM_IRQCHIP_PIC_SLAVE:	286	case KVM_IRQCHIP_PIC_SLAVE:
287	e->irqchip.pin += PIC_NUM_PINS / 2;	287	e->irqchip.pin += PIC_NUM_PINS / 2;
288	/* fall through */	288	fallthrough;
289	case KVM_IRQCHIP_PIC_MASTER:	289	case KVM_IRQCHIP_PIC_MASTER:
290	if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)	290	if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
291	return -EINVAL;	291	return -EINVAL;

arch/x86/kvm/lapic.c+3−3

@@ -1053,7 +1053,7 @@ static int __apic_accept_irq(struct kvm_lapic *apic, int delivery_mode, · 1052 unmodified lines
1053	switch (delivery_mode) {	1053	switch (delivery_mode) {
1054	case APIC_DM_LOWEST:	1054	case APIC_DM_LOWEST:
1055	vcpu->arch.apic_arb_prio++;	1055	vcpu->arch.apic_arb_prio++;
1056	/* fall through */	1056	fallthrough;
1057	case APIC_DM_FIXED:	1057	case APIC_DM_FIXED:
1058	if (unlikely(trig_mode && !level))	1058	if (unlikely(trig_mode && !level))
1059	break;	1059	break;
@@ -1341,7 +1341,7 @@ static u32 __apic_read(struct kvm_lapic *apic, unsigned int offset) · 281 unmodified lines
1341	break;	1341	break;
1342	case APIC_TASKPRI:	1342	case APIC_TASKPRI:
1343	report_tpr_access(apic, false);	1343	report_tpr_access(apic, false);
1344	/* fall thru */	1344	fallthrough;
1345	default:	1345	default:
1346	val = kvm_lapic_get_reg(apic, offset);	1346	val = kvm_lapic_get_reg(apic, offset);
1347	break;	1347	break;
@@ -2027,7 +2027,7 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) · 679 unmodified lines
2027		2027
2028	case APIC_LVT0:	2028	case APIC_LVT0:
2029	apic_manage_nmi_watchdog(apic, val);	2029	apic_manage_nmi_watchdog(apic, val);
2030	/* fall through */	2030	fallthrough;
2031	case APIC_LVTTHMR:	2031	case APIC_LVTTHMR:
2032	case APIC_LVTPC:	2032	case APIC_LVTPC:
2033	case APIC_LVT1:	2033	case APIC_LVT1:

arch/x86/kvm/mmu/mmu.c+1−1

@@ -4422,7 +4422,7 @@ __reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, · 4421 unmodified lines
4422	rsvd_bits(maxphyaddr, 51);	4422	rsvd_bits(maxphyaddr, 51);
4423	rsvd_check->rsvd_bits_mask[1][4] =	4423	rsvd_check->rsvd_bits_mask[1][4] =
4424	rsvd_check->rsvd_bits_mask[0][4];	4424	rsvd_check->rsvd_bits_mask[0][4];
4425	/* fall through */	4425	fallthrough;
4426	case PT64_ROOT_4LEVEL:	4426	case PT64_ROOT_4LEVEL:
4427	rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd \|	4427	rsvd_check->rsvd_bits_mask[0][3] = exb_bit_rsvd \|
4428	nonleaf_bit8_rsvd \| rsvd_bits(7, 7) \|	4428	nonleaf_bit8_rsvd \| rsvd_bits(7, 7) \|

arch/x86/kvm/svm/svm.c+1−1

@@ -2668,7 +2668,7 @@ static int svm_set_msr(struct kvm_vcpu vcpu, struct msr_data msr) · 2667 unmodified lines
2668	case MSR_IA32_APICBASE:	2668	case MSR_IA32_APICBASE:
2669	if (kvm_vcpu_apicv_active(vcpu))	2669	if (kvm_vcpu_apicv_active(vcpu))
2670	avic_update_vapic_bar(to_svm(vcpu), data);	2670	avic_update_vapic_bar(to_svm(vcpu), data);
2671	/* Fall through */	2671	fallthrough;
2672	default:	2672	default:
2673	return kvm_set_msr_common(vcpu, msr);	2673	return kvm_set_msr_common(vcpu, msr);
2674	}	2674	}

arch/x86/kvm/vmx/vmx.c+6−6

@@ -4654,7 +4654,7 @@ static bool rmode_exception(struct kvm_vcpu *vcpu, int vec) · 4653 unmodified lines
4654	vmcs_read32(VM_EXIT_INSTRUCTION_LEN);	4654	vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
4655	if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)	4655	if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
4656	return false;	4656	return false;
4657	/* fall through */	4657	fallthrough;
4658	case DB_VECTOR:	4658	case DB_VECTOR:
4659	return !(vcpu->guest_debug &	4659	return !(vcpu->guest_debug &
4660	(KVM_GUESTDBG_SINGLESTEP \| KVM_GUESTDBG_USE_HW_BP));	4660	(KVM_GUESTDBG_SINGLESTEP \| KVM_GUESTDBG_USE_HW_BP));
@@ -4827,7 +4827,7 @@ static int handle_exception_nmi(struct kvm_vcpu *vcpu) · 166 unmodified lines
4827	}	4827	}
4828	kvm_run->debug.arch.dr6 = dr6 \| DR6_FIXED_1 \| DR6_RTM;	4828	kvm_run->debug.arch.dr6 = dr6 \| DR6_FIXED_1 \| DR6_RTM;
4829	kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);	4829	kvm_run->debug.arch.dr7 = vmcs_readl(GUEST_DR7);
4830	/* fall through */	4830	fallthrough;
4831	case BP_VECTOR:	4831	case BP_VECTOR:
4832	/*	4832	/*
4833	* Update instruction length as we may reinject #BP from	4833	* Update instruction length as we may reinject #BP from
@@ -5257,7 +5257,7 @@ static int handle_task_switch(struct kvm_vcpu *vcpu) · 423 unmodified lines
5257	error_code =	5257	error_code =
5258	vmcs_read32(IDT_VECTORING_ERROR_CODE);	5258	vmcs_read32(IDT_VECTORING_ERROR_CODE);
5259	}	5259	}
5260	/* fall through */	5260	fallthrough;
5261	case INTR_TYPE_SOFT_EXCEPTION:	5261	case INTR_TYPE_SOFT_EXCEPTION:
5262	kvm_clear_exception_queue(vcpu);	5262	kvm_clear_exception_queue(vcpu);
5263	break;	5263	break;
@@ -5610,7 +5610,7 @@ static int handle_invpcid(struct kvm_vcpu *vcpu) · 346 unmodified lines
5610	* keeping track of global entries in shadow page tables.	5610	* keeping track of global entries in shadow page tables.
5611	*/	5611	*/
5612		5612
5613	/* fall-through */	5613	fallthrough;
5614	case INVPCID_TYPE_ALL_INCL_GLOBAL:	5614	case INVPCID_TYPE_ALL_INCL_GLOBAL:
5615	kvm_mmu_unload(vcpu);	5615	kvm_mmu_unload(vcpu);
5616	return kvm_skip_emulated_instruction(vcpu);	5616	return kvm_skip_emulated_instruction(vcpu);
@@ -6578,7 +6578,7 @@ static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu, · 961 unmodified lines
6578	break;	6578	break;
6579	case INTR_TYPE_SOFT_EXCEPTION:	6579	case INTR_TYPE_SOFT_EXCEPTION:
6580	vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);	6580	vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);
6581	/* fall through */	6581	fallthrough;
6582	case INTR_TYPE_HARD_EXCEPTION:	6582	case INTR_TYPE_HARD_EXCEPTION:
6583	if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {	6583	if (idt_vectoring_info & VECTORING_INFO_DELIVER_CODE_MASK) {
6584	u32 err = vmcs_read32(error_code_field);	6584	u32 err = vmcs_read32(error_code_field);
@@ -6588,7 +6588,7 @@ static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu, · 3 unmodified lines
6588	break;	6588	break;
6589	case INTR_TYPE_SOFT_INTR:	6589	case INTR_TYPE_SOFT_INTR:
6590	vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);	6590	vcpu->arch.event_exit_inst_len = vmcs_read32(instr_len_field);
6591	/* fall through */	6591	fallthrough;
6592	case INTR_TYPE_EXT_INTR:	6592	case INTR_TYPE_EXT_INTR:
6593	kvm_queue_interrupt(vcpu, vector, type == INTR_TYPE_SOFT_INTR);	6593	kvm_queue_interrupt(vcpu, vector, type == INTR_TYPE_SOFT_INTR);
6594	break;	6594	break;

arch/x86/kvm/x86.c+4−7

 			vcpu->arch.eff_db[dr] = val;
 		break;
 	case 4:
-		/* fall through */
 	case 6:
 		if (!kvm_dr6_valid(val))
 			return -1; /* #GP */
 		vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 		break;
 	case 5:
-		/* fall through */
 	default: /* 7 */
 		if (!kvm_dr7_valid(val))
 			return -1; /* #GP */
 		*val = vcpu->arch.db[array_index_nospec(dr, size)];
 		break;
 	case 4:
-		/* fall through */
 	case 6:
 		*val = vcpu->arch.dr6;
 		break;
 	case 5:
-		/* fall through */
 	default: /* 7 */
 		*val = vcpu->arch.dr7;
 		break;
 	case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
 	case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
-		pr = true; /* fall through */
+		pr = true;
+		fallthrough;
 	case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
 	case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
 		if (kvm_pmu_is_valid_msr(vcpu, msr))
 	case KVM_CAP_HYPERV_SYNIC2:
 		if (cap->args[0])
 			return -EINVAL;
-		/* fall through */
+		fallthrough;
 	case KVM_CAP_HYPERV_SYNIC:
 		if (!irqchip_in_kernel(vcpu->kvm))
 		vcpu->arch.pv.pv_unhalted = false;
 		vcpu->arch.mp_state =
 			KVM_MP_STATE_RUNNABLE;
-		/* fall through */
+		fallthrough;
 	case KVM_MP_STATE_RUNNABLE:
 		vcpu->arch.apf.halted = false;
 		break;

arch/x86/lib/Makefile+1−1

@@ -24,7 +24,7 @@ ifdef CONFIG_FUNCTION_TRACER · 23 unmodified lines
24	CFLAGS_REMOVE_cmdline.o = -pg	24	CFLAGS_REMOVE_cmdline.o = -pg
25	endif	25	endif
26		26
27	CFLAGS_cmdline.o := -fno-stack-protector	27	CFLAGS_cmdline.o := -fno-stack-protector -fno-jump-tables
28	endif	28	endif
29		29
30	inat_tables_script = $(srctree)/arch/x86/tools/gen-insn-attr-x86.awk	30	inat_tables_script = $(srctree)/arch/x86/tools/gen-insn-attr-x86.awk

arch/x86/lib/cmdline.c+4−4

@@ -58,7 +58,7 @@ __cmdline_find_option_bool(const char *cmdline, int max_cmdline_size, · 57 unmodified lines
58	state = st_wordcmp;	58	state = st_wordcmp;
59	opptr = option;	59	opptr = option;
60	wstart = pos;	60	wstart = pos;
61	/* fall through */	61	fallthrough;
62		62
63	case st_wordcmp:	63	case st_wordcmp:
64	if (!*opptr) {	64	if (!*opptr) {
@@ -89,7 +89,7 @@ __cmdline_find_option_bool(const char *cmdline, int max_cmdline_size, · 24 unmodified lines
89	break;	89	break;
90	}	90	}
91	state = st_wordskip;	91	state = st_wordskip;
92	/* fall through */	92	fallthrough;
93		93
94	case st_wordskip:	94	case st_wordskip:
95	if (!c)	95	if (!c)
@@ -151,7 +151,7 @@ __cmdline_find_option(const char *cmdline, int max_cmdline_size, · 55 unmodified lines
151		151
152	state = st_wordcmp;	152	state = st_wordcmp;
153	opptr = option;	153	opptr = option;
154	/* fall through */	154	fallthrough;
155		155
156	case st_wordcmp:	156	case st_wordcmp:
157	if ((c == '=') && !*opptr) {	157	if ((c == '=') && !*opptr) {
@@ -172,7 +172,7 @@ __cmdline_find_option(const char *cmdline, int max_cmdline_size, · 14 unmodified lines
172	break;	172	break;
173	}	173	}
174	state = st_wordskip;	174	state = st_wordskip;
175	/* fall through */	175	fallthrough;
176		176
177	case st_wordskip:	177	case st_wordskip:
178	if (myisspace(c))	178	if (myisspace(c))

arch/x86/lib/insn-eval.c+2−4

 		if (insn->addr_bytes == 2)
 			return -EINVAL;
-		/* fall through */
+		fallthrough;
 	case -EDOM:
 	case offsetof(struct pt_regs, bx):
 		case INAT_SEG_REG_GS:
 			return vm86regs->gs;
 		case INAT_SEG_REG_IGNORE:
-			/* fall through */
 		default:
 			return -EINVAL;
 		}
 		 */
 		return get_user_gs(regs);
 	case INAT_SEG_REG_IGNORE:
-		/* fall through */
 	default:
 		return -EINVAL;
 	}
 		 */
 		return INSN_CODE_SEG_PARAMS(4, 8);
 	case 3: /* Invalid setting. CS.L=1, CS.D=1 */
-		/* fall through */
+		fallthrough;
 	default:
 		return -EINVAL;
 	}

arch/x86/math-emu/errors.c+1−1

@@ -186,7 +186,7 @@ void FPU_printall(void) · 185 unmodified lines
186	case TAG_Special:	186	case TAG_Special:
187	/* Update tagi for the printk below */	187	/* Update tagi for the printk below */
188	tagi = FPU_Special(r);	188	tagi = FPU_Special(r);
189	/* fall through */	189	fallthrough;
190	case TAG_Valid:	190	case TAG_Valid:
191	printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,	191	printk("st(%d) %c .%04lx %04lx %04lx %04lx e%+-6d ", i,
192	getsign(r) ? '-' : '+',	192	getsign(r) ? '-' : '+',

arch/x86/math-emu/fpu_trig.c+1−1

@@ -1352,7 +1352,7 @@ static void fyl2xp1(FPU_REG *st0_ptr, u_char st0_tag) · 1351 unmodified lines
1352	case TW_Denormal:	1352	case TW_Denormal:
1353	if (denormal_operand() < 0)	1353	if (denormal_operand() < 0)
1354	return;	1354	return;
1355	/* fall through */	1355	fallthrough;
1356	case TAG_Zero:	1356	case TAG_Zero:
1357	case TAG_Valid:	1357	case TAG_Valid:
1358	setsign(st0_ptr, getsign(st0_ptr) ^ getsign(st1_ptr));	1358	setsign(st0_ptr, getsign(st0_ptr) ^ getsign(st1_ptr));

arch/x86/mm/fault.c+78−0

@@ -190,6 +190,53 @@ static inline pmd_t vmalloc_sync_one(pgd_t pgd, unsigned long address) · 189 unmodified lines
190	return pmd_k;	190	return pmd_k;
191	}	191	}
192		192
		193	/*
		194	* Handle a fault on the vmalloc or module mapping area
		195	*
		196	* This is needed because there is a race condition between the time
		197	* when the vmalloc mapping code updates the PMD to the point in time
		198	* where it synchronizes this update with the other page-tables in the
		199	* system.
		200	*
		201	* In this race window another thread/CPU can map an area on the same
		202	* PMD, finds it already present and does not synchronize it with the
		203	* rest of the system yet. As a result v[mz]alloc might return areas
		204	* which are not mapped in every page-table in the system, causing an
		205	* unhandled page-fault when they are accessed.
		206	*/
		207	static noinline int vmalloc_fault(unsigned long address)
		208	{
		209	unsigned long pgd_paddr;
		210	pmd_t *pmd_k;
		211	pte_t *pte_k;
		212
		213	/* Make sure we are in vmalloc area: */
		214	if (!(address >= VMALLOC_START && address < VMALLOC_END))
		215	return -1;
		216
		217	/*
		218	* Synchronize this task's top level page-table
		219	* with the 'reference' page table.
		220	*
		221	* Do _not_ use "current" here. We might be inside
		222	* an interrupt in the middle of a task switch..
		223	*/
		224	pgd_paddr = read_cr3_pa();
		225	pmd_k = vmalloc_sync_one(__va(pgd_paddr), address);
		226	if (!pmd_k)
		227	return -1;
		228
		229	if (pmd_large(*pmd_k))
		230	return 0;
		231
		232	pte_k = pte_offset_kernel(pmd_k, address);
		233	if (!pte_present(*pte_k))
		234	return -1;
		235
		236	return 0;
		237	}
		238	NOKPROBE_SYMBOL(vmalloc_fault);
		239
193	void arch_sync_kernel_mappings(unsigned long start, unsigned long end)	240	void arch_sync_kernel_mappings(unsigned long start, unsigned long end)
194	{	241	{
195	unsigned long addr;	242	unsigned long addr;
@@ -1110,6 +1157,37 @@ do_kern_addr_fault(struct pt_regs *regs, unsigned long hw_error_code, · 914 unmodified lines
1110	*/	1157	*/
1111	WARN_ON_ONCE(hw_error_code & X86_PF_PK);	1158	WARN_ON_ONCE(hw_error_code & X86_PF_PK);
1112		1159
		1160	#ifdef CONFIG_X86_32
		1161	/*
		1162	* We can fault-in kernel-space virtual memory on-demand. The
		1163	* 'reference' page table is init_mm.pgd.
		1164	*
		1165	* NOTE! We MUST NOT take any locks for this case. We may
		1166	* be in an interrupt or a critical region, and should
		1167	* only copy the information from the master page table,
		1168	* nothing more.
		1169	*
		1170	* Before doing this on-demand faulting, ensure that the
		1171	* fault is not any of the following:
		1172	* 1. A fault on a PTE with a reserved bit set.
		1173	* 2. A fault caused by a user-mode access. (Do not demand-
		1174	* fault kernel memory due to user-mode accesses).
		1175	* 3. A fault caused by a page-level protection violation.
		1176	* (A demand fault would be on a non-present page which
		1177	* would have X86_PF_PROT==0).
		1178	*
		1179	* This is only needed to close a race condition on x86-32 in
		1180	* the vmalloc mapping/unmapping code. See the comment above
		1181	* vmalloc_fault() for details. On x86-64 the race does not
		1182	* exist as the vmalloc mappings don't need to be synchronized
		1183	* there.
		1184	*/
		1185	if (!(hw_error_code & (X86_PF_RSVD \| X86_PF_USER \| X86_PF_PROT))) {
		1186	if (vmalloc_fault(address) >= 0)
		1187	return;
		1188	}
		1189	#endif
		1190
1113	/* Was the fault spurious, caused by lazy TLB invalidation? */	1191	/* Was the fault spurious, caused by lazy TLB invalidation? */
1114	if (spurious_kernel_fault(hw_error_code, address))	1192	if (spurious_kernel_fault(hw_error_code, address))
1115	return;	1193	return;

arch/x86/mm/ioremap.c+1−1

@@ -574,7 +574,7 @@ static bool memremap_should_map_decrypted(resource_size_t phys_addr, · 573 unmodified lines
574	/* For SEV, these areas are encrypted */	574	/* For SEV, these areas are encrypted */
575	if (sev_active())	575	if (sev_active())
576	break;	576	break;
577	/* Fallthrough */	577	fallthrough;
578		578
579	case E820_TYPE_PRAM:	579	case E820_TYPE_PRAM:
580	return true;	580	return true;

arch/x86/mm/numa_emulation.c+1−1

@@ -321,7 +321,7 @@ static int __init split_nodes_size_interleave(struct numa_meminfo *ei, · 320 unmodified lines
321	u64 addr, u64 max_addr, u64 size)	321	u64 addr, u64 max_addr, u64 size)
322	{	322	{
323	return split_nodes_size_interleave_uniform(ei, pi, addr, max_addr, size,	323	return split_nodes_size_interleave_uniform(ei, pi, addr, max_addr, size,
324	0, NULL, NUMA_NO_NODE);	324	0, NULL, 0);
325	}	325	}
326		326
327	static int __init setup_emu2phys_nid(int *dfl_phys_nid)	327	static int __init setup_emu2phys_nid(int *dfl_phys_nid)

arch/x86/mm/tlb.c+2−11

 		this_cpu_write(cpu_tlbstate.ctxs[new_asid].tlb_gen, next_tlb_gen);
 		load_new_mm_cr3(next->pgd, new_asid, true);
-		/*
+		trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
-		 * NB: This gets called via leave_mm() in the idle path
-		 * where RCU functions differently.  Tracing normally
-		 * uses RCU, so we need to use the _rcuidle variant.
-		 *
-		 * (There is no good reason for this.  The idle code should
-		 *  be rearranged to call this before rcu_idle_enter().)
-		 */
-		trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, TLB_FLUSH_ALL);
 	} else {
 		/* The new ASID is already up to date. */
 		load_new_mm_cr3(next->pgd, new_asid, false);
-		/* See above wrt _rcuidle. */
+		trace_tlb_flush(TLB_FLUSH_ON_TASK_SWITCH, 0);
-		trace_tlb_flush_rcuidle(TLB_FLUSH_ON_TASK_SWITCH, 0);
 	}
 	/* Make sure we write CR3 before loaded_mm. */

arch/xtensa/kernel/signal.c+1−1

@@ -448,7 +448,7 @@ static void do_signal(struct pt_regs *regs) · 447 unmodified lines
448	regs->areg[2] = -EINTR;	448	regs->areg[2] = -EINTR;
449	break;	449	break;
450	}	450	}
451	/* fallthrough */	451	fallthrough;
452	case -ERESTARTNOINTR:	452	case -ERESTARTNOINTR:
453	regs->areg[2] = regs->syscall;	453	regs->areg[2] = regs->syscall;
454	regs->pc -= 3;	454	regs->pc -= 3;

block/badblocks.c+1−1

@@ -525,7 +525,7 @@ ssize_t badblocks_store(struct badblocks bb, const char page, size_t len, · 524 unmodified lines
525	case 3:	525	case 3:
526	if (newline != '\n')	526	if (newline != '\n')
527	return -EINVAL;	527	return -EINVAL;
528	/* fall through */	528	fallthrough;
529	case 2:	529	case 2:
530	if (length <= 0)	530	if (length <= 0)
531	return -EINVAL;	531	return -EINVAL;

block/bfq-cgroup.c+1−1

@@ -332,7 +332,7 @@ static void bfqg_put(struct bfq_group *bfqg) · 331 unmodified lines
332	kfree(bfqg);	332	kfree(bfqg);
333	}	333	}
334		334
335	void bfqg_and_blkg_get(struct bfq_group *bfqg)	335	static void bfqg_and_blkg_get(struct bfq_group *bfqg)
336	{	336	{
337	/* see comments in bfq_bic_update_cgroup for why refcounting bfqg */	337	/* see comments in bfq_bic_update_cgroup for why refcounting bfqg */
338	bfqg_get(bfqg);	338	bfqg_get(bfqg);

block/bfq-iosched.c+2−2

@@ -4980,7 +4980,7 @@ bfq_set_next_ioprio_data(struct bfq_queue bfqq, struct bfq_io_cq bic) · 4979 unmodified lines
4980	pr_err("bdi %s: bfq: bad prio class %d\n",	4980	pr_err("bdi %s: bfq: bad prio class %d\n",
4981	bdi_dev_name(bfqq->bfqd->queue->backing_dev_info),	4981	bdi_dev_name(bfqq->bfqd->queue->backing_dev_info),
4982	ioprio_class);	4982	ioprio_class);
4983	/* fall through */	4983	fallthrough;
4984	case IOPRIO_CLASS_NONE:	4984	case IOPRIO_CLASS_NONE:
4985	/*	4985	/*
4986	* No prio set, inherit CPU scheduling settings.	4986	* No prio set, inherit CPU scheduling settings.
@@ -5112,7 +5112,7 @@ static struct bfq_queue *bfq_async_queue_prio(struct bfq_data bfqd, · 125 unmodified lines
5112	return &bfqg->async_bfqq[0][ioprio];	5112	return &bfqg->async_bfqq[0][ioprio];
5113	case IOPRIO_CLASS_NONE:	5113	case IOPRIO_CLASS_NONE:
5114	ioprio = IOPRIO_NORM;	5114	ioprio = IOPRIO_NORM;
5115	/* fall through */	5115	fallthrough;
5116	case IOPRIO_CLASS_BE:	5116	case IOPRIO_CLASS_BE:
5117	return &bfqg->async_bfqq[1][ioprio];	5117	return &bfqg->async_bfqq[1][ioprio];
5118	case IOPRIO_CLASS_IDLE:	5118	case IOPRIO_CLASS_IDLE:

block/bfq-iosched.h+0−1

@@ -986,7 +986,6 @@ struct bfq_group bfq_find_set_group(struct bfq_data bfqd, · 985 unmodified lines
986	struct blkcg_gq bfqg_to_blkg(struct bfq_group bfqg);	986	struct blkcg_gq bfqg_to_blkg(struct bfq_group bfqg);
987	struct bfq_group bfqq_group(struct bfq_queue bfqq);	987	struct bfq_group bfqq_group(struct bfq_queue bfqq);
988	struct bfq_group bfq_create_group_hierarchy(struct bfq_data bfqd, int node);	988	struct bfq_group bfq_create_group_hierarchy(struct bfq_data bfqd, int node);
989	void bfqg_and_blkg_get(struct bfq_group *bfqg);
990	void bfqg_and_blkg_put(struct bfq_group *bfqg);	989	void bfqg_and_blkg_put(struct bfq_group *bfqg);
991		990
992	#ifdef CONFIG_BFQ_GROUP_IOSCHED	991	#ifdef CONFIG_BFQ_GROUP_IOSCHED

block/bfq-wf2q.c+2−10

 		bfqq->ref++;
 		bfq_log_bfqq(bfqq->bfqd, bfqq, "get_entity: %p %d",
 			     bfqq, bfqq->ref);
-	} else
+	}
-		bfqg_and_blkg_get(container_of(entity, struct bfq_group,
-					       entity));
 }
 /**
 	entity->on_st_or_in_serv = false;
 	st->wsum -= entity->weight;
-	if (is_in_service)
+	if (bfqq && !is_in_service)
-		return;
-	if (bfqq)
 		bfq_put_queue(bfqq);
-	else
-		bfqg_and_blkg_put(container_of(entity, struct bfq_group,
-					       entity));
 }
 /**

block/bio.c+5−5

@@ -740,8 +740,8 @@ static inline bool page_is_mergeable(const struct bio_vec *bv, · 739 unmodified lines
740	struct page *page, unsigned int len, unsigned int off,	740	struct page *page, unsigned int len, unsigned int off,
741	bool *same_page)	741	bool *same_page)
742	{	742	{
743	phys_addr_t vec_end_addr = page_to_phys(bv->bv_page) +	743	size_t bv_end = bv->bv_offset + bv->bv_len;
744	bv->bv_offset + bv->bv_len - 1;	744	phys_addr_t vec_end_addr = page_to_phys(bv->bv_page) + bv_end - 1;
745	phys_addr_t page_addr = page_to_phys(page);	745	phys_addr_t page_addr = page_to_phys(page);
746		746
747	if (vec_end_addr + 1 != page_addr + off)	747	if (vec_end_addr + 1 != page_addr + off)
@@ -750,9 +750,9 @@ static inline bool page_is_mergeable(const struct bio_vec *bv, · 2 unmodified lines
750	return false;	750	return false;
751		751
752	*same_page = ((vec_end_addr & PAGE_MASK) == page_addr);	752	*same_page = ((vec_end_addr & PAGE_MASK) == page_addr);
753	if (!*same_page && pfn_to_page(PFN_DOWN(vec_end_addr)) + 1 != page)	753	if (*same_page)
754	return false;	754	return true;
755	return true;	755	return (bv->bv_page + bv_end / PAGE_SIZE) == (page + off / PAGE_SIZE);
756	}	756	}
757		757
758	/*	758	/*

block/blk-cgroup.c+5−3

 	if (preloaded)
 		radix_tree_preload_end();
-	ret = blk_iolatency_init(q);
+	ret = blk_throtl_init(q);
 	if (ret)
 		goto err_destroy_all;
-	ret = blk_throtl_init(q);
+	ret = blk_iolatency_init(q);
-	if (ret)
+	if (ret) {
+		blk_throtl_exit(q);
 		goto err_destroy_all;
+	}
 	return 0;
 err_destroy_all:

block/blk-core.c+1−0

@@ -539,6 +539,7 @@ struct request_queue *blk_alloc_queue(int node_id) · 538 unmodified lines
539	goto fail_stats;	539	goto fail_stats;
540		540
541	q->backing_dev_info->ra_pages = VM_READAHEAD_PAGES;	541	q->backing_dev_info->ra_pages = VM_READAHEAD_PAGES;
		542	q->backing_dev_info->io_pages = VM_READAHEAD_PAGES;
542	q->backing_dev_info->capabilities = BDI_CAP_CGROUP_WRITEBACK;	543	q->backing_dev_info->capabilities = BDI_CAP_CGROUP_WRITEBACK;
543	q->node = node_id;	544	q->node = node_id;
544		545

block/blk-iocost.c+3−2

 {
 	struct ioc_gq *iocg = pd_to_iocg(pd);
 	struct ioc *ioc = iocg->ioc;
+	unsigned long flags;
 	if (ioc) {
-		spin_lock(&ioc->lock);
+		spin_lock_irqsave(&ioc->lock, flags);
 		if (!list_empty(&iocg->active_list)) {
 			propagate_active_weight(iocg, 0, 0);
 			list_del_init(&iocg->active_list);
 		}
-		spin_unlock(&ioc->lock);
+		spin_unlock_irqrestore(&ioc->lock, flags);
 		hrtimer_cancel(&iocg->waitq_timer);
 		hrtimer_cancel(&iocg->delay_timer);

block/blk-merge.c+10−3

 	if (max_sectors > start_offset)
 		return max_sectors - start_offset;
-	return sectors & (lbs - 1);
+	return sectors & ~(lbs - 1);
 }
 static inline unsigned get_max_segment_size(const struct request_queue *q,
 }
 EXPORT_SYMBOL(__blk_rq_map_sg);
+static inline unsigned int blk_rq_get_max_segments(struct request *rq)
+{
+	if (req_op(rq) == REQ_OP_DISCARD)
+		return queue_max_discard_segments(rq->q);
+	return queue_max_segments(rq->q);
+}
 static inline int ll_new_hw_segment(struct request *req, struct bio *bio,
 		unsigned int nr_phys_segs)
 {
-	if (req->nr_phys_segments + nr_phys_segs > queue_max_segments(req->q))
+	if (req->nr_phys_segments + nr_phys_segs > blk_rq_get_max_segments(req))
 		goto no_merge;
 	if (blk_integrity_merge_bio(req->q, req, bio) == false)
 		return 0;
 	total_phys_segments = req->nr_phys_segments + next->nr_phys_segments;
-	if (total_phys_segments > queue_max_segments(q))
+	if (total_phys_segments > blk_rq_get_max_segments(req))
 		return 0;
 	if (blk_integrity_merge_rq(q, req, next) == false)

block/blk-mq-sched.c+9−0

@@ -78,6 +78,15 @@ void blk_mq_sched_restart(struct blk_mq_hw_ctx *hctx) · 77 unmodified lines
78	return;	78	return;
79	clear_bit(BLK_MQ_S_SCHED_RESTART, &hctx->state);	79	clear_bit(BLK_MQ_S_SCHED_RESTART, &hctx->state);
80		80
		81	/*
		82	* Order clearing SCHED_RESTART and list_empty_careful(&hctx->dispatch)
		83	* in blk_mq_run_hw_queue(). Its pair is the barrier in
		84	* blk_mq_dispatch_rq_list(). So dispatch code won't see SCHED_RESTART,
		85	* meantime new request added to hctx->dispatch is missed to check in
		86	* blk_mq_run_hw_queue().
		87	*/
		88	smp_mb();
		89
81	blk_mq_run_hw_queue(hctx, true);	90	blk_mq_run_hw_queue(hctx, true);
82	}	91	}
83		92

block/blk-mq.c+12−1

 		list_splice_tail_init(list, &hctx->dispatch);
 		spin_unlock(&hctx->lock);
+		/*
+		 * Order adding requests to hctx->dispatch and checking
+		 * SCHED_RESTART flag. The pair of this smp_mb() is the one
+		 * in blk_mq_sched_restart(). Avoid restart code path to
+		 * miss the new added requests to hctx->dispatch, meantime
+		 * SCHED_RESTART is observed here.
+		 */
+		smp_mb();
 		/*
 		 * If SCHED_RESTART was set by the caller of this function and
 		 * it is no longer set that means that it was cleared by another
 /**
  * blk_mq_request_bypass_insert - Insert a request at dispatch list.
  * @rq: Pointer to request to be inserted.
+ * @at_head: true if the request should be inserted at the head of the list.
  * @run_queue: If we should run the hardware queue after inserting the request.
  *
  * Should only be used carefully, when the caller knows we want to
 	if (bypass_insert)
 		return BLK_STS_RESOURCE;
-	blk_mq_request_bypass_insert(rq, false, run_queue);
+	blk_mq_sched_insert_request(rq, false, run_queue, false);
 	return BLK_STS_OK;
 }

block/blk-stat.c+11−6

 			   struct blk_stat_callback *cb)
 {
 	unsigned int bucket;
+	unsigned long flags;
 	int cpu;
 	for_each_possible_cpu(cpu) {
 			blk_rq_stat_init(&cpu_stat[bucket]);
 	}
-	spin_lock(&q->stats->lock);
+	spin_lock_irqsave(&q->stats->lock, flags);
 	list_add_tail_rcu(&cb->list, &q->stats->callbacks);
 	blk_queue_flag_set(QUEUE_FLAG_STATS, q);
-	spin_unlock(&q->stats->lock);
+	spin_unlock_irqrestore(&q->stats->lock, flags);
 }
 void blk_stat_remove_callback(struct request_queue *q,
 			      struct blk_stat_callback *cb)
 {
-	spin_lock(&q->stats->lock);
+	unsigned long flags;
+	spin_lock_irqsave(&q->stats->lock, flags);
 	list_del_rcu(&cb->list);
 	if (list_empty(&q->stats->callbacks) && !q->stats->enable_accounting)
 		blk_queue_flag_clear(QUEUE_FLAG_STATS, q);
-	spin_unlock(&q->stats->lock);
+	spin_unlock_irqrestore(&q->stats->lock, flags);
 	del_timer_sync(&cb->timer);
 }
 void blk_stat_enable_accounting(struct request_queue *q)
 {
-	spin_lock(&q->stats->lock);
+	unsigned long flags;
+	spin_lock_irqsave(&q->stats->lock, flags);
 	q->stats->enable_accounting = true;
 	blk_queue_flag_set(QUEUE_FLAG_STATS, q);
-	spin_unlock(&q->stats->lock);
+	spin_unlock_irqrestore(&q->stats->lock, flags);
 }
 EXPORT_SYMBOL_GPL(blk_stat_enable_accounting);

block/blk-wbt.c+1−1

@@ -528,7 +528,7 @@ static inline bool wbt_should_throttle(struct rq_wb rwb, struct bio bio) · 527 unmodified lines
528	if ((bio->bi_opf & (REQ_SYNC \| REQ_IDLE)) ==	528	if ((bio->bi_opf & (REQ_SYNC \| REQ_IDLE)) ==
529	(REQ_SYNC \| REQ_IDLE))	529	(REQ_SYNC \| REQ_IDLE))
530	return false;	530	return false;
531	/* fallthrough */	531	fallthrough;
532	case REQ_OP_DISCARD:	532	case REQ_OP_DISCARD:
533	return true;	533	return true;
534	default:	534	default:

block/bsg-lib.c+1−1

@@ -378,7 +378,7 @@ struct request_queue bsg_setup_queue(struct device dev, const char *name, · 377 unmodified lines
378	bset->timeout_fn = timeout;	378	bset->timeout_fn = timeout;
379		379
380	set = &bset->tag_set;	380	set = &bset->tag_set;
381	set->ops = &bsg_mq_ops,	381	set->ops = &bsg_mq_ops;
382	set->nr_hw_queues = 1;	382	set->nr_hw_queues = 1;
383	set->queue_depth = 128;	383	set->queue_depth = 128;
384	set->numa_node = NUMA_NO_NODE;	384	set->numa_node = NUMA_NO_NODE;

block/ioprio.c+1−1

@@ -71,7 +71,7 @@ int ioprio_check_cap(int ioprio) · 70 unmodified lines
71	case IOPRIO_CLASS_RT:	71	case IOPRIO_CLASS_RT:
72	if (!capable(CAP_SYS_ADMIN))	72	if (!capable(CAP_SYS_ADMIN))
73	return -EPERM;	73	return -EPERM;
74	/* fall through */	74	fallthrough;
75	/* rt has prio field too */	75	/* rt has prio field too */
76	case IOPRIO_CLASS_BE:	76	case IOPRIO_CLASS_BE:
77	if (data >= IOPRIO_BE_NR \|\| data < 0)	77	if (data >= IOPRIO_BE_NR \|\| data < 0)

block/partitions/core.c+22−15

 {
 	struct hd_struct *part =
 		container_of(to_rcu_work(work), struct hd_struct, rcu_work);
+	struct gendisk *disk = part_to_disk(part);
+	/*
+	 * Release the disk reference acquired in delete_partition here.
+	 * We can't release it in hd_struct_free because the final put_device
+	 * needs process context and thus can't be run directly from a
+	 * percpu_ref ->release handler.
+	 */
+	put_device(disk_to_dev(disk));
 	part->start_sect = 0;
 	part->nr_sects = 0;
 		rcu_dereference_protected(disk->part_tbl, 1);
 	rcu_assign_pointer(ptbl->last_lookup, NULL);
-	put_device(disk_to_dev(disk));
 	INIT_RCU_WORK(&part->rcu_work, hd_struct_free_work);
 	queue_rcu_work(system_wq, &part->rcu_work);
 int bdev_del_partition(struct block_device *bdev, int partno)
 {
 	struct block_device *bdevp;
-	struct hd_struct *part;
+	struct hd_struct *part = NULL;
-	int ret = 0;
+	int ret;
-	part = disk_get_part(bdev->bd_disk, partno);
+	bdevp = bdget_disk(bdev->bd_disk, partno);
-	if (!part)
-		return -ENXIO;
-	ret = -ENOMEM;
-	bdevp = bdget(part_devt(part));
 	if (!bdevp)
-		goto out_put_part;
+		return -ENOMEM;
 	mutex_lock(&bdevp->bd_mutex);
+	mutex_lock_nested(&bdev->bd_mutex, 1);
+	ret = -ENXIO;
+	part = disk_get_part(bdev->bd_disk, partno);
+	if (!part)
+		goto out_unlock;
 	ret = -EBUSY;
 	if (bdevp->bd_openers)
 	sync_blockdev(bdevp);
 	invalidate_bdev(bdevp);
-	mutex_lock_nested(&bdev->bd_mutex, 1);
 	delete_partition(bdev->bd_disk, part);
-	mutex_unlock(&bdev->bd_mutex);
 	ret = 0;
 out_unlock:
+	mutex_unlock(&bdev->bd_mutex);
 	mutex_unlock(&bdevp->bd_mutex);
 	bdput(bdevp);
-out_put_part:
+	if (part)
-	disk_put_part(part);
+		disk_put_part(part);
 	return ret;
 }

crypto/af_alg.c+10−3

 #include <linux/module.h>
 #include <linux/net.h>
 #include <linux/rwsem.h>
+#include <linux/sched.h>
 #include <linux/sched/signal.h>
 #include <linux/security.h>
 	}
 	lock_sock(sk);
-	if (ctx->init && (init || !ctx->more)) {
+	if (ctx->init && !ctx->more) {
-		err = -EINVAL;
+		if (ctx->used) {
-		goto unlock;
+			err = -EINVAL;
+			goto unlock;
+		}
+		pr_info_once(
+			"%s sent an empty control message without MSG_MORE.\n",
+			current->comm);
 	}
 	ctx->init = true;

crypto/drbg.c+1−1

@@ -1521,7 +1521,7 @@ static int drbg_prepare_hrng(struct drbg_state *drbg) · 1520 unmodified lines
1521		1521
1522	case -EALREADY:	1522	case -EALREADY:
1523	err = 0;	1523	err = 0;
1524	/* fall through */	1524	fallthrough;
1525		1525
1526	default:	1526	default:
1527	drbg->random_ready.func = NULL;	1527	drbg->random_ready.func = NULL;

crypto/tcrypt.c+57−57

@@ -2348,121 +2348,121 @@ static int do_test(const char *alg, u32 type, u32 mask, int m, u32 num_mb) · 2347 unmodified lines
2348	test_hash_speed(alg, sec, generic_hash_speed_template);	2348	test_hash_speed(alg, sec, generic_hash_speed_template);
2349	break;	2349	break;
2350	}	2350	}
2351	/* fall through */	2351	fallthrough;
2352	case 301:	2352	case 301:
2353	test_hash_speed("md4", sec, generic_hash_speed_template);	2353	test_hash_speed("md4", sec, generic_hash_speed_template);
2354	if (mode > 300 && mode < 400) break;	2354	if (mode > 300 && mode < 400) break;
2355	/* fall through */	2355	fallthrough;
2356	case 302:	2356	case 302:
2357	test_hash_speed("md5", sec, generic_hash_speed_template);	2357	test_hash_speed("md5", sec, generic_hash_speed_template);
2358	if (mode > 300 && mode < 400) break;	2358	if (mode > 300 && mode < 400) break;
2359	/* fall through */	2359	fallthrough;
2360	case 303:	2360	case 303:
2361	test_hash_speed("sha1", sec, generic_hash_speed_template);	2361	test_hash_speed("sha1", sec, generic_hash_speed_template);
2362	if (mode > 300 && mode < 400) break;	2362	if (mode > 300 && mode < 400) break;
2363	/* fall through */	2363	fallthrough;
2364	case 304:	2364	case 304:
2365	test_hash_speed("sha256", sec, generic_hash_speed_template);	2365	test_hash_speed("sha256", sec, generic_hash_speed_template);
2366	if (mode > 300 && mode < 400) break;	2366	if (mode > 300 && mode < 400) break;
2367	/* fall through */	2367	fallthrough;
2368	case 305:	2368	case 305:
2369	test_hash_speed("sha384", sec, generic_hash_speed_template);	2369	test_hash_speed("sha384", sec, generic_hash_speed_template);
2370	if (mode > 300 && mode < 400) break;	2370	if (mode > 300 && mode < 400) break;
2371	/* fall through */	2371	fallthrough;
2372	case 306:	2372	case 306:
2373	test_hash_speed("sha512", sec, generic_hash_speed_template);	2373	test_hash_speed("sha512", sec, generic_hash_speed_template);
2374	if (mode > 300 && mode < 400) break;	2374	if (mode > 300 && mode < 400) break;
2375	/* fall through */	2375	fallthrough;
2376	case 307:	2376	case 307:
2377	test_hash_speed("wp256", sec, generic_hash_speed_template);	2377	test_hash_speed("wp256", sec, generic_hash_speed_template);
2378	if (mode > 300 && mode < 400) break;	2378	if (mode > 300 && mode < 400) break;
2379	/* fall through */	2379	fallthrough;
2380	case 308:	2380	case 308:
2381	test_hash_speed("wp384", sec, generic_hash_speed_template);	2381	test_hash_speed("wp384", sec, generic_hash_speed_template);
2382	if (mode > 300 && mode < 400) break;	2382	if (mode > 300 && mode < 400) break;
2383	/* fall through */	2383	fallthrough;
2384	case 309:	2384	case 309:
2385	test_hash_speed("wp512", sec, generic_hash_speed_template);	2385	test_hash_speed("wp512", sec, generic_hash_speed_template);
2386	if (mode > 300 && mode < 400) break;	2386	if (mode > 300 && mode < 400) break;
2387	/* fall through */	2387	fallthrough;
2388	case 310:	2388	case 310:
2389	test_hash_speed("tgr128", sec, generic_hash_speed_template);	2389	test_hash_speed("tgr128", sec, generic_hash_speed_template);
2390	if (mode > 300 && mode < 400) break;	2390	if (mode > 300 && mode < 400) break;
2391	/* fall through */	2391	fallthrough;
2392	case 311:	2392	case 311:
2393	test_hash_speed("tgr160", sec, generic_hash_speed_template);	2393	test_hash_speed("tgr160", sec, generic_hash_speed_template);
2394	if (mode > 300 && mode < 400) break;	2394	if (mode > 300 && mode < 400) break;
2395	/* fall through */	2395	fallthrough;
2396	case 312:	2396	case 312:
2397	test_hash_speed("tgr192", sec, generic_hash_speed_template);	2397	test_hash_speed("tgr192", sec, generic_hash_speed_template);
2398	if (mode > 300 && mode < 400) break;	2398	if (mode > 300 && mode < 400) break;
2399	/* fall through */	2399	fallthrough;
2400	case 313:	2400	case 313:
2401	test_hash_speed("sha224", sec, generic_hash_speed_template);	2401	test_hash_speed("sha224", sec, generic_hash_speed_template);
2402	if (mode > 300 && mode < 400) break;	2402	if (mode > 300 && mode < 400) break;
2403	/* fall through */	2403	fallthrough;
2404	case 314:	2404	case 314:
2405	test_hash_speed("rmd128", sec, generic_hash_speed_template);	2405	test_hash_speed("rmd128", sec, generic_hash_speed_template);
2406	if (mode > 300 && mode < 400) break;	2406	if (mode > 300 && mode < 400) break;
2407	/* fall through */	2407	fallthrough;
2408	case 315:	2408	case 315:
2409	test_hash_speed("rmd160", sec, generic_hash_speed_template);	2409	test_hash_speed("rmd160", sec, generic_hash_speed_template);
2410	if (mode > 300 && mode < 400) break;	2410	if (mode > 300 && mode < 400) break;
2411	/* fall through */	2411	fallthrough;
2412	case 316:	2412	case 316:
2413	test_hash_speed("rmd256", sec, generic_hash_speed_template);	2413	test_hash_speed("rmd256", sec, generic_hash_speed_template);
2414	if (mode > 300 && mode < 400) break;	2414	if (mode > 300 && mode < 400) break;
2415	/* fall through */	2415	fallthrough;
2416	case 317:	2416	case 317:
2417	test_hash_speed("rmd320", sec, generic_hash_speed_template);	2417	test_hash_speed("rmd320", sec, generic_hash_speed_template);
2418	if (mode > 300 && mode < 400) break;	2418	if (mode > 300 && mode < 400) break;
2419	/* fall through */	2419	fallthrough;
2420	case 318:	2420	case 318:
2421	test_hash_speed("ghash-generic", sec, hash_speed_template_16);	2421	test_hash_speed("ghash-generic", sec, hash_speed_template_16);
2422	if (mode > 300 && mode < 400) break;	2422	if (mode > 300 && mode < 400) break;
2423	/* fall through */	2423	fallthrough;
2424	case 319:	2424	case 319:
2425	test_hash_speed("crc32c", sec, generic_hash_speed_template);	2425	test_hash_speed("crc32c", sec, generic_hash_speed_template);
2426	if (mode > 300 && mode < 400) break;	2426	if (mode > 300 && mode < 400) break;
2427	/* fall through */	2427	fallthrough;
2428	case 320:	2428	case 320:
2429	test_hash_speed("crct10dif", sec, generic_hash_speed_template);	2429	test_hash_speed("crct10dif", sec, generic_hash_speed_template);
2430	if (mode > 300 && mode < 400) break;	2430	if (mode > 300 && mode < 400) break;
2431	/* fall through */	2431	fallthrough;
2432	case 321:	2432	case 321:
2433	test_hash_speed("poly1305", sec, poly1305_speed_template);	2433	test_hash_speed("poly1305", sec, poly1305_speed_template);
2434	if (mode > 300 && mode < 400) break;	2434	if (mode > 300 && mode < 400) break;
2435	/* fall through */	2435	fallthrough;
2436	case 322:	2436	case 322:
2437	test_hash_speed("sha3-224", sec, generic_hash_speed_template);	2437	test_hash_speed("sha3-224", sec, generic_hash_speed_template);
2438	if (mode > 300 && mode < 400) break;	2438	if (mode > 300 && mode < 400) break;
2439	/* fall through */	2439	fallthrough;
2440	case 323:	2440	case 323:
2441	test_hash_speed("sha3-256", sec, generic_hash_speed_template);	2441	test_hash_speed("sha3-256", sec, generic_hash_speed_template);
2442	if (mode > 300 && mode < 400) break;	2442	if (mode > 300 && mode < 400) break;
2443	/* fall through */	2443	fallthrough;
2444	case 324:	2444	case 324:
2445	test_hash_speed("sha3-384", sec, generic_hash_speed_template);	2445	test_hash_speed("sha3-384", sec, generic_hash_speed_template);
2446	if (mode > 300 && mode < 400) break;	2446	if (mode > 300 && mode < 400) break;
2447	/* fall through */	2447	fallthrough;
2448	case 325:	2448	case 325:
2449	test_hash_speed("sha3-512", sec, generic_hash_speed_template);	2449	test_hash_speed("sha3-512", sec, generic_hash_speed_template);
2450	if (mode > 300 && mode < 400) break;	2450	if (mode > 300 && mode < 400) break;
2451	/* fall through */	2451	fallthrough;
2452	case 326:	2452	case 326:
2453	test_hash_speed("sm3", sec, generic_hash_speed_template);	2453	test_hash_speed("sm3", sec, generic_hash_speed_template);
2454	if (mode > 300 && mode < 400) break;	2454	if (mode > 300 && mode < 400) break;
2455	/* fall through */	2455	fallthrough;
2456	case 327:	2456	case 327:
2457	test_hash_speed("streebog256", sec,	2457	test_hash_speed("streebog256", sec,
2458	generic_hash_speed_template);	2458	generic_hash_speed_template);
2459	if (mode > 300 && mode < 400) break;	2459	if (mode > 300 && mode < 400) break;
2460	/* fall through */	2460	fallthrough;
2461	case 328:	2461	case 328:
2462	test_hash_speed("streebog512", sec,	2462	test_hash_speed("streebog512", sec,
2463	generic_hash_speed_template);	2463	generic_hash_speed_template);
2464	if (mode > 300 && mode < 400) break;	2464	if (mode > 300 && mode < 400) break;
2465	/* fall through */	2465	fallthrough;
2466	case 399:	2466	case 399:
2467	break;	2467	break;
2468		2468
@@ -2471,121 +2471,121 @@ static int do_test(const char *alg, u32 type, u32 mask, int m, u32 num_mb) · 2 unmodified lines
2471	test_ahash_speed(alg, sec, generic_hash_speed_template);	2471	test_ahash_speed(alg, sec, generic_hash_speed_template);
2472	break;	2472	break;
2473	}	2473	}
2474	/* fall through */	2474	fallthrough;
2475	case 401:	2475	case 401:
2476	test_ahash_speed("md4", sec, generic_hash_speed_template);	2476	test_ahash_speed("md4", sec, generic_hash_speed_template);
2477	if (mode > 400 && mode < 500) break;	2477	if (mode > 400 && mode < 500) break;
2478	/* fall through */	2478	fallthrough;
2479	case 402:	2479	case 402:
2480	test_ahash_speed("md5", sec, generic_hash_speed_template);	2480	test_ahash_speed("md5", sec, generic_hash_speed_template);
2481	if (mode > 400 && mode < 500) break;	2481	if (mode > 400 && mode < 500) break;
2482	/* fall through */	2482	fallthrough;
2483	case 403:	2483	case 403:
2484	test_ahash_speed("sha1", sec, generic_hash_speed_template);	2484	test_ahash_speed("sha1", sec, generic_hash_speed_template);
2485	if (mode > 400 && mode < 500) break;	2485	if (mode > 400 && mode < 500) break;
2486	/* fall through */	2486	fallthrough;
2487	case 404:	2487	case 404:
2488	test_ahash_speed("sha256", sec, generic_hash_speed_template);	2488	test_ahash_speed("sha256", sec, generic_hash_speed_template);
2489	if (mode > 400 && mode < 500) break;	2489	if (mode > 400 && mode < 500) break;
2490	/* fall through */	2490	fallthrough;
2491	case 405:	2491	case 405:
2492	test_ahash_speed("sha384", sec, generic_hash_speed_template);	2492	test_ahash_speed("sha384", sec, generic_hash_speed_template);
2493	if (mode > 400 && mode < 500) break;	2493	if (mode > 400 && mode < 500) break;
2494	/* fall through */	2494	fallthrough;
2495	case 406:	2495	case 406:
2496	test_ahash_speed("sha512", sec, generic_hash_speed_template);	2496	test_ahash_speed("sha512", sec, generic_hash_speed_template);
2497	if (mode > 400 && mode < 500) break;	2497	if (mode > 400 && mode < 500) break;
2498	/* fall through */	2498	fallthrough;
2499	case 407:	2499	case 407:
2500	test_ahash_speed("wp256", sec, generic_hash_speed_template);	2500	test_ahash_speed("wp256", sec, generic_hash_speed_template);
2501	if (mode > 400 && mode < 500) break;	2501	if (mode > 400 && mode < 500) break;
2502	/* fall through */	2502	fallthrough;
2503	case 408:	2503	case 408:
2504	test_ahash_speed("wp384", sec, generic_hash_speed_template);	2504	test_ahash_speed("wp384", sec, generic_hash_speed_template);
2505	if (mode > 400 && mode < 500) break;	2505	if (mode > 400 && mode < 500) break;
2506	/* fall through */	2506	fallthrough;
2507	case 409:	2507	case 409:
2508	test_ahash_speed("wp512", sec, generic_hash_speed_template);	2508	test_ahash_speed("wp512", sec, generic_hash_speed_template);
2509	if (mode > 400 && mode < 500) break;	2509	if (mode > 400 && mode < 500) break;
2510	/* fall through */	2510	fallthrough;
2511	case 410:	2511	case 410:
2512	test_ahash_speed("tgr128", sec, generic_hash_speed_template);	2512	test_ahash_speed("tgr128", sec, generic_hash_speed_template);
2513	if (mode > 400 && mode < 500) break;	2513	if (mode > 400 && mode < 500) break;
2514	/* fall through */	2514	fallthrough;
2515	case 411:	2515	case 411:
2516	test_ahash_speed("tgr160", sec, generic_hash_speed_template);	2516	test_ahash_speed("tgr160", sec, generic_hash_speed_template);
2517	if (mode > 400 && mode < 500) break;	2517	if (mode > 400 && mode < 500) break;
2518	/* fall through */	2518	fallthrough;
2519	case 412:	2519	case 412:
2520	test_ahash_speed("tgr192", sec, generic_hash_speed_template);	2520	test_ahash_speed("tgr192", sec, generic_hash_speed_template);
2521	if (mode > 400 && mode < 500) break;	2521	if (mode > 400 && mode < 500) break;
2522	/* fall through */	2522	fallthrough;
2523	case 413:	2523	case 413:
2524	test_ahash_speed("sha224", sec, generic_hash_speed_template);	2524	test_ahash_speed("sha224", sec, generic_hash_speed_template);
2525	if (mode > 400 && mode < 500) break;	2525	if (mode > 400 && mode < 500) break;
2526	/* fall through */	2526	fallthrough;
2527	case 414:	2527	case 414:
2528	test_ahash_speed("rmd128", sec, generic_hash_speed_template);	2528	test_ahash_speed("rmd128", sec, generic_hash_speed_template);
2529	if (mode > 400 && mode < 500) break;	2529	if (mode > 400 && mode < 500) break;
2530	/* fall through */	2530	fallthrough;
2531	case 415:	2531	case 415:
2532	test_ahash_speed("rmd160", sec, generic_hash_speed_template);	2532	test_ahash_speed("rmd160", sec, generic_hash_speed_template);
2533	if (mode > 400 && mode < 500) break;	2533	if (mode > 400 && mode < 500) break;
2534	/* fall through */	2534	fallthrough;
2535	case 416:	2535	case 416:
2536	test_ahash_speed("rmd256", sec, generic_hash_speed_template);	2536	test_ahash_speed("rmd256", sec, generic_hash_speed_template);
2537	if (mode > 400 && mode < 500) break;	2537	if (mode > 400 && mode < 500) break;
2538	/* fall through */	2538	fallthrough;
2539	case 417:	2539	case 417:
2540	test_ahash_speed("rmd320", sec, generic_hash_speed_template);	2540	test_ahash_speed("rmd320", sec, generic_hash_speed_template);
2541	if (mode > 400 && mode < 500) break;	2541	if (mode > 400 && mode < 500) break;
2542	/* fall through */	2542	fallthrough;
2543	case 418:	2543	case 418:
2544	test_ahash_speed("sha3-224", sec, generic_hash_speed_template);	2544	test_ahash_speed("sha3-224", sec, generic_hash_speed_template);
2545	if (mode > 400 && mode < 500) break;	2545	if (mode > 400 && mode < 500) break;
2546	/* fall through */	2546	fallthrough;
2547	case 419:	2547	case 419:
2548	test_ahash_speed("sha3-256", sec, generic_hash_speed_template);	2548	test_ahash_speed("sha3-256", sec, generic_hash_speed_template);
2549	if (mode > 400 && mode < 500) break;	2549	if (mode > 400 && mode < 500) break;
2550	/* fall through */	2550	fallthrough;
2551	case 420:	2551	case 420:
2552	test_ahash_speed("sha3-384", sec, generic_hash_speed_template);	2552	test_ahash_speed("sha3-384", sec, generic_hash_speed_template);
2553	if (mode > 400 && mode < 500) break;	2553	if (mode > 400 && mode < 500) break;
2554	/* fall through */	2554	fallthrough;
2555	case 421:	2555	case 421:
2556	test_ahash_speed("sha3-512", sec, generic_hash_speed_template);	2556	test_ahash_speed("sha3-512", sec, generic_hash_speed_template);
2557	if (mode > 400 && mode < 500) break;	2557	if (mode > 400 && mode < 500) break;
2558	/* fall through */	2558	fallthrough;
2559	case 422:	2559	case 422:
2560	test_mb_ahash_speed("sha1", sec, generic_hash_speed_template,	2560	test_mb_ahash_speed("sha1", sec, generic_hash_speed_template,
2561	num_mb);	2561	num_mb);
2562	if (mode > 400 && mode < 500) break;	2562	if (mode > 400 && mode < 500) break;
2563	/* fall through */	2563	fallthrough;
2564	case 423:	2564	case 423:
2565	test_mb_ahash_speed("sha256", sec, generic_hash_speed_template,	2565	test_mb_ahash_speed("sha256", sec, generic_hash_speed_template,
2566	num_mb);	2566	num_mb);
2567	if (mode > 400 && mode < 500) break;	2567	if (mode > 400 && mode < 500) break;
2568	/* fall through */	2568	fallthrough;
2569	case 424:	2569	case 424:
2570	test_mb_ahash_speed("sha512", sec, generic_hash_speed_template,	2570	test_mb_ahash_speed("sha512", sec, generic_hash_speed_template,
2571	num_mb);	2571	num_mb);
2572	if (mode > 400 && mode < 500) break;	2572	if (mode > 400 && mode < 500) break;
2573	/* fall through */	2573	fallthrough;
2574	case 425:	2574	case 425:
2575	test_mb_ahash_speed("sm3", sec, generic_hash_speed_template,	2575	test_mb_ahash_speed("sm3", sec, generic_hash_speed_template,
2576	num_mb);	2576	num_mb);
2577	if (mode > 400 && mode < 500) break;	2577	if (mode > 400 && mode < 500) break;
2578	/* fall through */	2578	fallthrough;
2579	case 426:	2579	case 426:
2580	test_mb_ahash_speed("streebog256", sec,	2580	test_mb_ahash_speed("streebog256", sec,
2581	generic_hash_speed_template, num_mb);	2581	generic_hash_speed_template, num_mb);
2582	if (mode > 400 && mode < 500) break;	2582	if (mode > 400 && mode < 500) break;
2583	/* fall through */	2583	fallthrough;
2584	case 427:	2584	case 427:
2585	test_mb_ahash_speed("streebog512", sec,	2585	test_mb_ahash_speed("streebog512", sec,
2586	generic_hash_speed_template, num_mb);	2586	generic_hash_speed_template, num_mb);
2587	if (mode > 400 && mode < 500) break;	2587	if (mode > 400 && mode < 500) break;
2588	/* fall through */	2588	fallthrough;
2589	case 499:	2589	case 499:
2590	break;	2590	break;
2591		2591

drivers/accessibility/braille/braille_console.c+1−1

@@ -290,7 +290,7 @@ static int vt_notifier_call(struct notifier_block *blk, · 289 unmodified lines
290	break;	290	break;
291	case '\t':	291	case '\t':
292	c = ' ';	292	c = ' ';
293	/* Fallthrough */	293	fallthrough;
294	default:	294	default:
295	if (c < 32)	295	if (c < 32)
296	/* Ignore other control sequences */	296	/* Ignore other control sequences */

drivers/accessibility/speakup/Kconfig+9−4

 		one of the listed synthesizers, you should say n.
 if SPEAKUP
+config SPEAKUP_SERIALIO
+	def_bool y
+	depends on ISA || COMPILE_TEST
 config SPEAKUP_SYNTH_ACNTSA
 	tristate "Accent SA synthesizer support"
 	help
 config SPEAKUP_SYNTH_ACNTPC
 	tristate "Accent PC synthesizer support"
-	depends on ISA || COMPILE_TEST
+	depends on SPEAKUP_SERIALIO
 	help
 		This is the Speakup driver for the accent pc
 		synthesizer.  You can say y to build it into the kernel,
 config SPEAKUP_SYNTH_DECPC
 	depends on m
-	depends on ISA || COMPILE_TEST
+	depends on SPEAKUP_SERIALIO
 	tristate "DECtalk PC (big ISA card) synthesizer support"
 	help
 config SPEAKUP_SYNTH_DTLK
 	tristate "DoubleTalk PC synthesizer support"
-	depends on ISA || COMPILE_TEST
+	depends on SPEAKUP_SERIALIO
 	help
 		This is the Speakup driver for the internal DoubleTalk
 config SPEAKUP_SYNTH_KEYPC
 	tristate "Keynote Gold PC synthesizer support"
-	depends on ISA || COMPILE_TEST
+	depends on SPEAKUP_SERIALIO
 	help
 		This is the Speakup driver for the Keynote Gold

drivers/accessibility/speakup/Makefile+1−1

 	keyhelp.o \
 	kobjects.o \
 	selection.o \
-	serialio.o \
 	spk_ttyio.o \
 	synth.o \
 	thread.o \
 	varhandlers.o
+speakup-$(CONFIG_SPEAKUP_SERIALIO) += serialio.o

drivers/accessibility/speakup/serialio.c+5−3

 static unsigned char spk_serial_in(void);
 static unsigned char spk_serial_in_nowait(void);
 static void spk_serial_flush_buffer(void);
+static int spk_serial_wait_for_xmitr(struct spk_synth *in_synth);
 struct spk_io_ops spk_serial_io_ops = {
 	.synth_out = spk_serial_out,
 	.synth_in = spk_serial_in,
 	.synth_in_nowait = spk_serial_in_nowait,
 	.flush_buffer = spk_serial_flush_buffer,
+	.wait_for_xmitr = spk_serial_wait_for_xmitr,
 };
 EXPORT_SYMBOL_GPL(spk_serial_io_ops);
 }
 EXPORT_SYMBOL_GPL(spk_stop_serial_interrupt);
-int spk_wait_for_xmitr(struct spk_synth *in_synth)
+static int spk_serial_wait_for_xmitr(struct spk_synth *in_synth)
 {
 	int tmout = SPK_XMITR_TIMEOUT;
 static int spk_serial_out(struct spk_synth *in_synth, const char ch)
 {
-	if (in_synth->alive && spk_wait_for_xmitr(in_synth)) {
+	if (in_synth->alive && spk_serial_wait_for_xmitr(in_synth)) {
 		outb_p(ch, speakup_info.port_tts);
 		return 1;
 	}
 	while ((ch = *buff)) {
 		if (ch == '\n')
 			ch = synth->procspeech;
-		if (spk_wait_for_xmitr(synth))
+		if (spk_serial_wait_for_xmitr(synth))
 			outb(ch, speakup_info.port_tts);
 		else
 			return buff;

drivers/accessibility/speakup/spk_priv.h+0−1

@@ -34,7 +34,6 @@ · 33 unmodified lines
34		34
35	const struct old_serial_port *spk_serial_init(int index);	35	const struct old_serial_port *spk_serial_init(int index);
36	void spk_stop_serial_interrupt(void);	36	void spk_stop_serial_interrupt(void);
37	int spk_wait_for_xmitr(struct spk_synth *in_synth);
38	void spk_serial_release(void);	37	void spk_serial_release(void);
39	void spk_ttyio_release(void);	38	void spk_ttyio_release(void);
40	void spk_ttyio_register_ldisc(void);	39	void spk_ttyio_register_ldisc(void);

drivers/accessibility/speakup/spk_ttyio.c+7−0

 static unsigned char spk_ttyio_in(void);
 static unsigned char spk_ttyio_in_nowait(void);
 static void spk_ttyio_flush_buffer(void);
+static int spk_ttyio_wait_for_xmitr(struct spk_synth *in_synth);
 struct spk_io_ops spk_ttyio_ops = {
 	.synth_out = spk_ttyio_out,
 	.synth_in = spk_ttyio_in,
 	.synth_in_nowait = spk_ttyio_in_nowait,
 	.flush_buffer = spk_ttyio_flush_buffer,
+	.wait_for_xmitr = spk_ttyio_wait_for_xmitr,
 };
 EXPORT_SYMBOL_GPL(spk_ttyio_ops);
 	mutex_unlock(&speakup_tty_mutex);
 }
+static int spk_ttyio_wait_for_xmitr(struct spk_synth *in_synth)
+{
+	return 1;
+}
 static unsigned char ttyio_in(int timeout)
 {
 	struct spk_ldisc_data *ldisc_data = speakup_tty->disc_data;

drivers/accessibility/speakup/spk_types.h+1−0

@@ -158,6 +158,7 @@ struct spk_io_ops { · 157 unmodified lines
158	unsigned char (*synth_in)(void);	158	unsigned char (*synth_in)(void);
159	unsigned char (*synth_in_nowait)(void);	159	unsigned char (*synth_in_nowait)(void);
160	void (*flush_buffer)(void);	160	void (*flush_buffer)(void);
		161	int (wait_for_xmitr)(struct spk_synth synth);
161	};	162	};
162		163
163	struct spk_synth {	164	struct spk_synth {

drivers/accessibility/speakup/synth.c+1−1

@@ -159,7 +159,7 @@ int spk_synth_is_alive_restart(struct spk_synth *synth) · 158 unmodified lines
159	{	159	{
160	if (synth->alive)	160	if (synth->alive)
161	return 1;	161	return 1;
162	if (spk_wait_for_xmitr(synth) > 0) {	162	if (synth->io_ops->wait_for_xmitr(synth) > 0) {
163	/* restart */	163	/* restart */
164	synth->alive = 1;	164	synth->alive = 1;
165	synth_printf("%s", synth->init);	165	synth_printf("%s", synth->init);

drivers/acpi/acpi_apd.c+2−2

@@ -99,8 +99,8 @@ static int fch_misc_setup(struct apd_private_data *pdata) · 98 unmodified lines
99	if (ret < 0)	99	if (ret < 0)
100	return -ENOENT;	100	return -ENOENT;
101		101
102	acpi_dev_get_property(adev, "is-rv", ACPI_TYPE_INTEGER, &obj);	102	if (!acpi_dev_get_property(adev, "is-rv", ACPI_TYPE_INTEGER, &obj))
103	clk_data->is_rv = obj->integer.value;	103	clk_data->is_rv = obj->integer.value;
104		104
105	list_for_each_entry(rentry, &resource_list, node) {	105	list_for_each_entry(rentry, &resource_list, node) {
106	clk_data->base = devm_ioremap(&adev->dev, rentry->res->start,	106	clk_data->base = devm_ioremap(&adev->dev, rentry->res->start,

drivers/acpi/osl.c+19−4

 	pg_off = round_down(phys, PAGE_SIZE);
 	pg_sz = round_up(phys + size, PAGE_SIZE) - pg_off;
-	virt = acpi_map(pg_off, pg_sz);
+	virt = acpi_map(phys, size);
 	if (!virt) {
 		mutex_unlock(&acpi_ioremap_lock);
 		kfree(map);
 	}
 	INIT_LIST_HEAD(&map->list);
-	map->virt = virt;
+	map->virt = (void __iomem __force *)((unsigned long)virt & PAGE_MASK);
 	map->phys = pg_off;
 	map->size = pg_sz;
 	map->track.refcount = 1;
 acpi_status acpi_release_memory(acpi_handle handle, struct resource *res,
 				u32 level)
 {
+	acpi_status status;
 	if (!(res->flags & IORESOURCE_MEM))
 		return AE_TYPE;
-	return acpi_walk_namespace(ACPI_TYPE_REGION, handle, level,
+	status = acpi_walk_namespace(ACPI_TYPE_REGION, handle, level,
-				   acpi_deactivate_mem_region, NULL, res, NULL);
+				     acpi_deactivate_mem_region, NULL,
+				     res, NULL);
+	if (ACPI_FAILURE(status))
+		return status;
+	/*
+	 * Wait for all of the mappings queued up for removal by
+	 * acpi_deactivate_mem_region() to actually go away.
+	 */
+	synchronize_rcu();
+	rcu_barrier();
+	flush_scheduled_work();
+	return AE_OK;
 }
 EXPORT_SYMBOL_GPL(acpi_release_memory);

drivers/ata/ahci.c+1−2

@@ -807,8 +807,7 @@ static int ahci_avn_hardreset(struct ata_link link, unsigned int class, · 806 unmodified lines
807	(sstatus & 0xf) != 1)	807	(sstatus & 0xf) != 1)
808	break;	808	break;
809		809
810	ata_link_printk(link, KERN_INFO, "avn bounce port%d\n",	810	ata_link_info(link, "avn bounce port%d\n", port);
811	port);
812		811
813	pci_read_config_word(pdev, 0x92, &val);	812	pci_read_config_word(pdev, 0x92, &val);
814	val &= ~(1 << port);	813	val &= ~(1 << port);

drivers/ata/ahci_brcm.c+1−1

@@ -470,7 +470,7 @@ static int brcm_ahci_probe(struct platform_device *pdev) · 469 unmodified lines
470	switch (priv->version) {	470	switch (priv->version) {
471	case BRCM_SATA_BCM7425:	471	case BRCM_SATA_BCM7425:
472	hpriv->flags \|= AHCI_HFLAG_DELAY_ENGINE;	472	hpriv->flags \|= AHCI_HFLAG_DELAY_ENGINE;
473	/* fall through */	473	fallthrough;
474	case BRCM_SATA_NSP:	474	case BRCM_SATA_NSP:
475	hpriv->flags \|= AHCI_HFLAG_NO_NCQ;	475	hpriv->flags \|= AHCI_HFLAG_NO_NCQ;
476	priv->quirks \|= BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE;	476	priv->quirks \|= BRCM_AHCI_QUIRK_SKIP_PHY_ENABLE;

drivers/ata/libahci_platform.c+1−1

@@ -326,7 +326,7 @@ static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port, · 325 unmodified lines
326	node);	326	node);
327	break;	327	break;
328	}	328	}
329	/* fall through */	329	fallthrough;
330	case -ENODEV:	330	case -ENODEV:
331	/* continue normally */	331	/* continue normally */
332	hpriv->phys[port] = NULL;	332	hpriv->phys[port] = NULL;

drivers/ata/libata-core.c+10−11

 		case ATA_LITER_PMP_FIRST:
 			if (sata_pmp_attached(ap))
 				return ap->pmp_link;
-			/* fall through */
+			fallthrough;
 		case ATA_LITER_HOST_FIRST:
 			return &ap->link;
 		}
 		case ATA_LITER_HOST_FIRST:
 			if (sata_pmp_attached(ap))
 				return ap->pmp_link;
-			/* fall through */
+			fallthrough;
 		case ATA_LITER_PMP_FIRST:
 			if (unlikely(ap->slave_link))
 				return ap->slave_link;
-			/* fall through */
+			fallthrough;
 		case ATA_LITER_EDGE:
 			return NULL;
 		}
 	case ATA_12:
 		if (atapi_passthru16)
 			return ATAPI_PASS_THRU;
-		/* fall thru */
+		fallthrough;
 	default:
 		return ATAPI_MISC;
 	}
 	switch (class) {
 	case ATA_DEV_SEMB:
 		class = ATA_DEV_ATA;	/* some hard drives report SEMB sig */
-		/* fall through */
+		fallthrough;
 	case ATA_DEV_ATA:
 	case ATA_DEV_ZAC:
 		tf.command = ATA_CMD_ID_ATA;
 	case -ENODEV:
 		/* give it just one more chance */
 		tries[dev->devno] = min(tries[dev->devno], 1);
-		/* fall through */
+		fallthrough;
 	case -EIO:
 		if (tries[dev->devno] == 1) {
 			/* This is the last chance, better to slow
 	case ATA_DNXFER_FORCE_PIO0:
 		pio_mask &= 1;
-		/* fall through */
+		fallthrough;
 	case ATA_DNXFER_FORCE_PIO:
 		mwdma_mask = 0;
 		udma_mask = 0;
 	/* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
 	{ "C300-CTFDDAC128MAG",	"0001",		ATA_HORKAGE_NONCQ, },
-	/* Some Sandisk SSDs lock up hard with NCQ enabled.  Reported on
+	/* Sandisk SD7/8/9s lock up hard on large trims */
-	   SD7SN6S256G and SD8SN8U256G */
+	{ "SanDisk SD[789]*",	NULL,		ATA_HORKAGE_MAX_TRIM_128M, },
-	{ "SanDisk SD[78]SN*G",	NULL,		ATA_HORKAGE_NONCQ, },
 	/* devices which puke on READ_NATIVE_MAX */
 	{ "HDS724040KLSA80",	"KFAOA20N",	ATA_HORKAGE_BROKEN_HPA, },
 			    qc->tf.feature != SETFEATURES_RA_ON &&
 			    qc->tf.feature != SETFEATURES_RA_OFF)
 				break;
-			/* fall through */
+			fallthrough;
 		case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
 		case ATA_CMD_SET_MULTI: /* multi_count changed */
 			/* revalidate device */

drivers/ata/libata-eh.c+3−3

@@ -1576,7 +1576,7 @@ static unsigned int ata_eh_analyze_tf(struct ata_queued_cmd *qc, · 1575 unmodified lines
1576	case ATA_DEV_ZAC:	1576	case ATA_DEV_ZAC:
1577	if (stat & ATA_SENSE)	1577	if (stat & ATA_SENSE)
1578	ata_eh_request_sense(qc, qc->scsicmd);	1578	ata_eh_request_sense(qc, qc->scsicmd);
1579	/* fall through */	1579	fallthrough;
1580	case ATA_DEV_ATA:	1580	case ATA_DEV_ATA:
1581	if (err & ATA_ICRC)	1581	if (err & ATA_ICRC)
1582	qc->err_mask \|= AC_ERR_ATA_BUS;	1582	qc->err_mask \|= AC_ERR_ATA_BUS;
@@ -3473,11 +3473,11 @@ static int ata_eh_handle_dev_fail(struct ata_device *dev, int err) · 1890 unmodified lines
3473	case -ENODEV:	3473	case -ENODEV:
3474	/* device missing or wrong IDENTIFY data, schedule probing */	3474	/* device missing or wrong IDENTIFY data, schedule probing */
3475	ehc->i.probe_mask \|= (1 << dev->devno);	3475	ehc->i.probe_mask \|= (1 << dev->devno);
3476	/* fall through */	3476	fallthrough;
3477	case -EINVAL:	3477	case -EINVAL:
3478	/* give it just one more chance */	3478	/* give it just one more chance */
3479	ehc->tries[dev->devno] = min(ehc->tries[dev->devno], 1);	3479	ehc->tries[dev->devno] = min(ehc->tries[dev->devno], 1);
3480	/* fall through */	3480	fallthrough;
3481	case -EIO:	3481	case -EIO:
3482	if (ehc->tries[dev->devno] == 1) {	3482	if (ehc->tries[dev->devno] == 1) {
3483	/* This is the last chance, better to slow	3483	/* This is the last chance, better to slow

drivers/ata/libata-scsi.c+9−3

 static unsigned int ata_scsiop_inq_b0(struct ata_scsi_args *args, u8 *rbuf)
 {
+	struct ata_device *dev = args->dev;
 	u16 min_io_sectors;
 	rbuf[1] = 0xb0;
 	 * with the unmap bit set.
 	 */
 	if (ata_id_has_trim(args->id)) {
-		put_unaligned_be64(65535 * ATA_MAX_TRIM_RNUM, &rbuf[36]);
+		u64 max_blocks = 65535 * ATA_MAX_TRIM_RNUM;
+		if (dev->horkage & ATA_HORKAGE_MAX_TRIM_128M)
+			max_blocks = 128 << (20 - SECTOR_SHIFT);
+		put_unaligned_be64(max_blocks, &rbuf[36]);
 		put_unaligned_be32(1, &rbuf[28]);
 	}
 				ata_scsi_rbuf_fill(&args, ata_scsiop_inq_b6);
 				break;
 			}
-			/* Fallthrough */
+			fallthrough;
 		default:
 			ata_scsi_set_invalid_field(dev, cmd, 2, 0xff);
 			break;
 	 * turning this into a no-op.
 	 */
 	case SYNCHRONIZE_CACHE:
-		/* fall through */
+		fallthrough;
 	/* no-op's, complete with success */
 	case REZERO_UNIT:

drivers/ata/pata_atp867x.c+2−2

@@ -157,7 +157,7 @@ static int atp867x_get_active_clocks_shifted(struct ata_port *ap, · 156 unmodified lines
157	default:	157	default:
158	printk(KERN_WARNING "ATP867X: active %dclk is invalid. "	158	printk(KERN_WARNING "ATP867X: active %dclk is invalid. "
159	"Using 12clk.\n", clk);	159	"Using 12clk.\n", clk);
160	/* fall through */	160	fallthrough;
161	case 9 ... 12:	161	case 9 ... 12:
162	clocks = 7; /* 12 clk */	162	clocks = 7; /* 12 clk */
163	break;	163	break;
@@ -190,7 +190,7 @@ static int atp867x_get_recover_clocks_shifted(unsigned int clk) · 26 unmodified lines
190	default:	190	default:
191	printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "	191	printk(KERN_WARNING "ATP867X: recover %dclk is invalid. "
192	"Using default 12clk.\n", clk);	192	"Using default 12clk.\n", clk);
193	/* fall through */	193	fallthrough;
194	case 12: /* default 12 clk */	194	case 12: /* default 12 clk */
195	clocks = 0;	195	clocks = 0;
196	break;	196	break;

drivers/ata/pata_serverworks.c+1−1

@@ -369,7 +369,7 @@ static int serverworks_fixup(struct pci_dev *pdev) · 368 unmodified lines
369	break;	369	break;
370	case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:	370	case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
371	ata_pci_bmdma_clear_simplex(pdev);	371	ata_pci_bmdma_clear_simplex(pdev);
372	/* fall through */	372	fallthrough;
373	case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:	373	case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
374	case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:	374	case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
375	rc = serverworks_fixup_csb(pdev);	375	rc = serverworks_fixup_csb(pdev);

drivers/ata/sata_mv.c+6−6

@@ -2010,7 +2010,7 @@ static void mv_rw_multi_errata_sata24(struct ata_queued_cmd *qc) · 2009 unmodified lines
2010	break;	2010	break;
2011	case ATA_CMD_WRITE_MULTI_FUA_EXT:	2011	case ATA_CMD_WRITE_MULTI_FUA_EXT:
2012	tf->flags &= ~ATA_TFLAG_FUA; /* ugh */	2012	tf->flags &= ~ATA_TFLAG_FUA; /* ugh */
2013	/* fall through */	2013	fallthrough;
2014	case ATA_CMD_WRITE_MULTI_EXT:	2014	case ATA_CMD_WRITE_MULTI_EXT:
2015	tf->command = ATA_CMD_PIO_WRITE_EXT;	2015	tf->command = ATA_CMD_PIO_WRITE_EXT;
2016	break;	2016	break;
@@ -2044,7 +2044,7 @@ static enum ata_completion_errors mv_qc_prep(struct ata_queued_cmd *qc) · 27 unmodified lines
2044	case ATA_PROT_DMA:	2044	case ATA_PROT_DMA:
2045	if (tf->command == ATA_CMD_DSM)	2045	if (tf->command == ATA_CMD_DSM)
2046	return AC_ERR_OK;	2046	return AC_ERR_OK;
2047	/* fall-thru */	2047	fallthrough;
2048	case ATA_PROT_NCQ:	2048	case ATA_PROT_NCQ:
2049	break; /* continue below */	2049	break; /* continue below */
2050	case ATA_PROT_PIO:	2050	case ATA_PROT_PIO:
@@ -2296,7 +2296,7 @@ static unsigned int mv_qc_issue_fis(struct ata_queued_cmd *qc) · 245 unmodified lines
2296	switch (qc->tf.protocol) {	2296	switch (qc->tf.protocol) {
2297	case ATAPI_PROT_PIO:	2297	case ATAPI_PROT_PIO:
2298	pp->pp_flags \|= MV_PP_FLAG_FAKE_ATA_BUSY;	2298	pp->pp_flags \|= MV_PP_FLAG_FAKE_ATA_BUSY;
2299	/* fall through */	2299	fallthrough;
2300	case ATAPI_PROT_NODATA:	2300	case ATAPI_PROT_NODATA:
2301	ap->hsm_task_state = HSM_ST_FIRST;	2301	ap->hsm_task_state = HSM_ST_FIRST;
2302	break;	2302	break;
@@ -2347,7 +2347,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) · 44 unmodified lines
2347	return AC_ERR_OTHER;	2347	return AC_ERR_OTHER;
2348	break; /* use bmdma for this */	2348	break; /* use bmdma for this */
2349	}	2349	}
2350	/* fall thru */	2350	fallthrough;
2351	case ATA_PROT_NCQ:	2351	case ATA_PROT_NCQ:
2352	mv_start_edma(ap, port_mmio, pp, qc->tf.protocol);	2352	mv_start_edma(ap, port_mmio, pp, qc->tf.protocol);
2353	pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK;	2353	pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK;
@@ -2376,7 +2376,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc) · 22 unmodified lines
2376	": attempting PIO w/multiple DRQ: "	2376	": attempting PIO w/multiple DRQ: "
2377	"this may fail due to h/w errata\n");	2377	"this may fail due to h/w errata\n");
2378	}	2378	}
2379	/* fall through */	2379	fallthrough;
2380	case ATA_PROT_NODATA:	2380	case ATA_PROT_NODATA:
2381	case ATAPI_PROT_PIO:	2381	case ATAPI_PROT_PIO:
2382	case ATAPI_PROT_NODATA:	2382	case ATAPI_PROT_NODATA:
@@ -3864,7 +3864,7 @@ static int mv_chip_id(struct ata_host *host, unsigned int board_idx) · 1481 unmodified lines
3864	" and avoid the final two gigabytes on"	3864	" and avoid the final two gigabytes on"
3865	" all RocketRAID BIOS initialized drives.\n");	3865	" all RocketRAID BIOS initialized drives.\n");
3866	}	3866	}
3867	/* fall through */	3867	fallthrough;
3868	case chip_6042:	3868	case chip_6042:
3869	hpriv->ops = &mv6xxx_ops;	3869	hpriv->ops = &mv6xxx_ops;
3870	hp_flags \|= MV_HP_GEN_IIE;	3870	hp_flags \|= MV_HP_GEN_IIE;

drivers/ata/sata_promise.c+4−4

@@ -637,7 +637,7 @@ static enum ata_completion_errors pdc_qc_prep(struct ata_queued_cmd *qc) · 636 unmodified lines
637	switch (qc->tf.protocol) {	637	switch (qc->tf.protocol) {
638	case ATA_PROT_DMA:	638	case ATA_PROT_DMA:
639	pdc_fill_sg(qc);	639	pdc_fill_sg(qc);
640	/FALLTHROUGH/	640	fallthrough;
641	case ATA_PROT_NODATA:	641	case ATA_PROT_NODATA:
642	i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,	642	i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,
643	qc->dev->devno, pp->pkt);	643	qc->dev->devno, pp->pkt);
@@ -652,7 +652,7 @@ static enum ata_completion_errors pdc_qc_prep(struct ata_queued_cmd *qc) · 8 unmodified lines
652	break;	652	break;
653	case ATAPI_PROT_DMA:	653	case ATAPI_PROT_DMA:
654	pdc_fill_sg(qc);	654	pdc_fill_sg(qc);
655	/FALLTHROUGH/	655	fallthrough;
656	case ATAPI_PROT_NODATA:	656	case ATAPI_PROT_NODATA:
657	pdc_atapi_pkt(qc);	657	pdc_atapi_pkt(qc);
658	break;	658	break;
@@ -1022,11 +1022,11 @@ static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc) · 363 unmodified lines
1022	case ATAPI_PROT_NODATA:	1022	case ATAPI_PROT_NODATA:
1023	if (qc->dev->flags & ATA_DFLAG_CDB_INTR)	1023	if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1024	break;	1024	break;
1025	/FALLTHROUGH/	1025	fallthrough;
1026	case ATA_PROT_NODATA:	1026	case ATA_PROT_NODATA:
1027	if (qc->tf.flags & ATA_TFLAG_POLLING)	1027	if (qc->tf.flags & ATA_TFLAG_POLLING)
1028	break;	1028	break;
1029	/FALLTHROUGH/	1029	fallthrough;
1030	case ATAPI_PROT_DMA:	1030	case ATAPI_PROT_DMA:
1031	case ATA_PROT_DMA:	1031	case ATA_PROT_DMA:
1032	pdc_packet_start(qc);	1032	pdc_packet_start(qc);

drivers/ata/sata_sx4.c+1−1

@@ -669,7 +669,7 @@ static unsigned int pdc20621_qc_issue(struct ata_queued_cmd *qc) · 668 unmodified lines
669	case ATA_PROT_NODATA:	669	case ATA_PROT_NODATA:
670	if (qc->tf.flags & ATA_TFLAG_POLLING)	670	if (qc->tf.flags & ATA_TFLAG_POLLING)
671	break;	671	break;
672	/FALLTHROUGH/	672	fallthrough;
673	case ATA_PROT_DMA:	673	case ATA_PROT_DMA:
674	pdc20621_packet_start(qc);	674	pdc20621_packet_start(qc);
675	return 0;	675	return 0;

drivers/atm/firestream.c+2−1

 		switch (STATUS_CODE (qe)) {
 		case 0x01: /* This is for AAL0 where we put the chip in streaming mode */
-			/* Fall through */
+			fallthrough;
 		case 0x02:
 			/* Process a real txdone entry. */
 			tmp = qe->p0;
 				error = make_rate (pcr, r, &tmc0, NULL);
 				if (error) {
 					kfree(tc);
+					kfree(vcc);
 					return error;
 				}
 			}

drivers/atm/fore200e.c+8−8

@@ -376,33 +376,33 @@ fore200e_shutdown(struct fore200e* fore200e) · 375 unmodified lines
376	case FORE200E_STATE_COMPLETE:	376	case FORE200E_STATE_COMPLETE:
377	kfree(fore200e->stats);	377	kfree(fore200e->stats);
378		378
379	/* fall through */	379	fallthrough;
380	case FORE200E_STATE_IRQ:	380	case FORE200E_STATE_IRQ:
381	free_irq(fore200e->irq, fore200e->atm_dev);	381	free_irq(fore200e->irq, fore200e->atm_dev);
382		382
383	/* fall through */	383	fallthrough;
384	case FORE200E_STATE_ALLOC_BUF:	384	case FORE200E_STATE_ALLOC_BUF:
385	fore200e_free_rx_buf(fore200e);	385	fore200e_free_rx_buf(fore200e);
386		386
387	/* fall through */	387	fallthrough;
388	case FORE200E_STATE_INIT_BSQ:	388	case FORE200E_STATE_INIT_BSQ:
389	fore200e_uninit_bs_queue(fore200e);	389	fore200e_uninit_bs_queue(fore200e);
390		390
391	/* fall through */	391	fallthrough;
392	case FORE200E_STATE_INIT_RXQ:	392	case FORE200E_STATE_INIT_RXQ:
393	fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status);	393	fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status);
394	fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);	394	fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
395		395
396	/* fall through */	396	fallthrough;
397	case FORE200E_STATE_INIT_TXQ:	397	case FORE200E_STATE_INIT_TXQ:
398	fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status);	398	fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status);
399	fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd);	399	fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
400		400
401	/* fall through */	401	fallthrough;
402	case FORE200E_STATE_INIT_CMDQ:	402	case FORE200E_STATE_INIT_CMDQ:
403	fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status);	403	fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
404		404
405	/* fall through */	405	fallthrough;
406	case FORE200E_STATE_INITIALIZE:	406	case FORE200E_STATE_INITIALIZE:
407	/* nothing to do for that state */	407	/* nothing to do for that state */
408		408
@@ -415,7 +415,7 @@ fore200e_shutdown(struct fore200e* fore200e) · 6 unmodified lines
415	case FORE200E_STATE_MAP:	415	case FORE200E_STATE_MAP:
416	fore200e->bus->unmap(fore200e);	416	fore200e->bus->unmap(fore200e);
417		417
418	/* fall through */	418	fallthrough;
419	case FORE200E_STATE_CONFIGURE:	419	case FORE200E_STATE_CONFIGURE:
420	/* nothing to do for that state */	420	/* nothing to do for that state */
421		421

drivers/atm/he.c+2−2

@@ -1944,14 +1944,14 @@ he_tasklet(unsigned long data) · 1943 unmodified lines
1944	switch (type) {	1944	switch (type) {
1945	case ITYPE_RBRQ_THRESH:	1945	case ITYPE_RBRQ_THRESH:
1946	HPRINTK("rbrq%d threshold\n", group);	1946	HPRINTK("rbrq%d threshold\n", group);
1947	/* fall through */	1947	fallthrough;
1948	case ITYPE_RBRQ_TIMER:	1948	case ITYPE_RBRQ_TIMER:
1949	if (he_service_rbrq(he_dev, group))	1949	if (he_service_rbrq(he_dev, group))
1950	he_service_rbpl(he_dev, group);	1950	he_service_rbpl(he_dev, group);
1951	break;	1951	break;
1952	case ITYPE_TBRQ_THRESH:	1952	case ITYPE_TBRQ_THRESH:
1953	HPRINTK("tbrq%d threshold\n", group);	1953	HPRINTK("tbrq%d threshold\n", group);
1954	/* fall through */	1954	fallthrough;
1955	case ITYPE_TPD_COMPLETE:	1955	case ITYPE_TPD_COMPLETE:
1956	he_service_tbrq(he_dev, group);	1956	he_service_tbrq(he_dev, group);
1957	break;	1957	break;

drivers/atm/idt77105.c+1−1

@@ -192,7 +192,7 @@ static int idt77105_ioctl(struct atm_dev dev,unsigned int cmd,void __user arg) · 191 unmodified lines
192	switch (cmd) {	192	switch (cmd) {
193	case IDT77105_GETSTATZ:	193	case IDT77105_GETSTATZ:
194	if (!capable(CAP_NET_ADMIN)) return -EPERM;	194	if (!capable(CAP_NET_ADMIN)) return -EPERM;
195	/* fall through */	195	fallthrough;
196	case IDT77105_GETSTAT:	196	case IDT77105_GETSTAT:
197	return fetch_stats(dev, arg, cmd == IDT77105_GETSTATZ);	197	return fetch_stats(dev, arg, cmd == IDT77105_GETSTATZ);
198	case ATM_SETLOOP:	198	case ATM_SETLOOP:

drivers/atm/lanai.c+1−1

@@ -2019,7 +2019,7 @@ static int lanai_normalize_ci(struct lanai_dev *lanai, · 2018 unmodified lines
2019	switch (*vpip) {	2019	switch (*vpip) {
2020	case ATM_VPI_ANY:	2020	case ATM_VPI_ANY:
2021	*vpip = 0;	2021	*vpip = 0;
2022	/* FALLTHROUGH */	2022	fallthrough;
2023	case 0:	2023	case 0:
2024	break;	2024	break;
2025	default:	2025	default:

drivers/atm/zatm.c+1−1

@@ -1447,7 +1447,7 @@ static int zatm_ioctl(struct atm_dev dev,unsigned int cmd,void __user arg) · 1446 unmodified lines
1447	switch (cmd) {	1447	switch (cmd) {
1448	case ZATM_GETPOOLZ:	1448	case ZATM_GETPOOLZ:
1449	if (!capable(CAP_NET_ADMIN)) return -EPERM;	1449	if (!capable(CAP_NET_ADMIN)) return -EPERM;
1450	/* fall through */	1450	fallthrough;
1451	case ZATM_GETPOOL:	1451	case ZATM_GETPOOL:
1452	{	1452	{
1453	struct zatm_pool_info info;	1453	struct zatm_pool_info info;

drivers/auxdisplay/arm-charlcd.c+1−1

@@ -2,7 +2,7 @@ · 1 unmodified line
2	/*	2	/*
3	* Driver for the on-board character LCD found on some ARM reference boards	3	* Driver for the on-board character LCD found on some ARM reference boards
4	* This is basically an Hitachi HD44780 LCD with a custom IP block to drive it	4	* This is basically an Hitachi HD44780 LCD with a custom IP block to drive it
5	* http://en.wikipedia.org/wiki/HD44780_Character_LCD	5	* https://en.wikipedia.org/wiki/HD44780_Character_LCD
6	* Currently it will just display the text "ARM Linux" and the linux version	6	* Currently it will just display the text "ARM Linux" and the linux version
7	*	7	*
8	* Author: Linus Walleij <triad@df.lth.se>	8	* Author: Linus Walleij <triad@df.lth.se>

drivers/auxdisplay/panel.c+3−3

@@ -1365,7 +1365,7 @@ static void panel_process_inputs(void) · 1364 unmodified lines
1365	break;	1365	break;
1366	input->rise_timer = 0;	1366	input->rise_timer = 0;
1367	input->state = INPUT_ST_RISING;	1367	input->state = INPUT_ST_RISING;
1368	/* fall through */	1368	fallthrough;
1369	case INPUT_ST_RISING:	1369	case INPUT_ST_RISING:
1370	if ((phys_curr & input->mask) != input->value) {	1370	if ((phys_curr & input->mask) != input->value) {
1371	input->state = INPUT_ST_LOW;	1371	input->state = INPUT_ST_LOW;
@@ -1378,11 +1378,11 @@ static void panel_process_inputs(void) · 6 unmodified lines
1378	}	1378	}
1379	input->high_timer = 0;	1379	input->high_timer = 0;
1380	input->state = INPUT_ST_HIGH;	1380	input->state = INPUT_ST_HIGH;
1381	/* fall through */	1381	fallthrough;
1382	case INPUT_ST_HIGH:	1382	case INPUT_ST_HIGH:
1383	if (input_state_high(input))	1383	if (input_state_high(input))
1384	break;	1384	break;
1385	/* fall through */	1385	fallthrough;
1386	case INPUT_ST_FALLING:	1386	case INPUT_ST_FALLING:
1387	input_state_falling(input);	1387	input_state_falling(input);
1388	}	1388	}

drivers/base/core.c+8−4

  */
 void set_primary_fwnode(struct device *dev, struct fwnode_handle *fwnode)
 {
-	if (fwnode) {
+	struct fwnode_handle *fn = dev->fwnode;
-		struct fwnode_handle *fn = dev->fwnode;
+	if (fwnode) {
 		if (fwnode_is_primary(fn))
 			fn = fn->secondary;
 		}
 		dev->fwnode = fwnode;
 	} else {
-		dev->fwnode = fwnode_is_primary(dev->fwnode) ?
+		if (fwnode_is_primary(fn)) {
-			dev->fwnode->secondary : NULL;
+			dev->fwnode = fn->secondary;
+			fn->secondary = NULL;
+		} else {
+			dev->fwnode = NULL;
+		}
 	}
 }
 EXPORT_SYMBOL_GPL(set_primary_fwnode);

drivers/base/firmware_loader/fallback.c+2−2

@@ -289,10 +289,10 @@ static ssize_t firmware_loading_store(struct device *dev, · 288 unmodified lines
289	}	289	}
290	break;	290	break;
291	}	291	}
292	/* fallthrough */	292	fallthrough;
293	default:	293	default:
294	dev_err(dev, "%s: unexpected value (%d)\n", __func__, loading);	294	dev_err(dev, "%s: unexpected value (%d)\n", __func__, loading);
295	/* fallthrough */	295	fallthrough;
296	case -1:	296	case -1:
297	fw_load_abort(fw_sysfs);	297	fw_load_abort(fw_sysfs);
298	break;	298	break;

drivers/base/power/main.c+10−6

 	}
 	/*
-	 * If a device configured to wake up the system from sleep states
+	 * Wait for possible runtime PM transitions of the device in progress
-	 * has been suspended at run time and there's a resume request pending
+	 * to complete and if there's a runtime resume request pending for it,
-	 * for it, this is equivalent to the device signaling wakeup, so the
+	 * resume it before proceeding with invoking the system-wide suspend
-	 * system suspend operation should be aborted.
+	 * callbacks for it.
+	 *
+	 * If the system-wide suspend callbacks below change the configuration
+	 * of the device, they must disable runtime PM for it or otherwise
+	 * ensure that its runtime-resume callbacks will not be confused by that
+	 * change in case they are invoked going forward.
 	 */
-	if (pm_runtime_barrier(dev) && device_may_wakeup(dev))
+	pm_runtime_barrier(dev);
-		pm_wakeup_event(dev, 0);
 	if (pm_wakeup_pending()) {
 		dev->power.direct_complete = false;

drivers/block/aoe/aoecmd.c+1−1

@@ -1135,7 +1135,7 @@ noskb: if (buf) · 1134 unmodified lines
1135	break;	1135	break;
1136	}	1136	}
1137	bvcpy(skb, f->buf->bio, f->iter, n);	1137	bvcpy(skb, f->buf->bio, f->iter, n);
1138	/* fall through */	1138	fallthrough;
1139	case ATA_CMD_PIO_WRITE:	1139	case ATA_CMD_PIO_WRITE:
1140	case ATA_CMD_PIO_WRITE_EXT:	1140	case ATA_CMD_PIO_WRITE_EXT:
1141	spin_lock_irq(&d->lock);	1141	spin_lock_irq(&d->lock);

drivers/block/ataflop.c+1−1

@@ -1726,7 +1726,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, · 1725 unmodified lines
1726	/* MSch: invalidate default_params */	1726	/* MSch: invalidate default_params */
1727	default_params[drive].blocks = 0;	1727	default_params[drive].blocks = 0;
1728	set_capacity(floppy->disk, MAX_DISK_SIZE * 2);	1728	set_capacity(floppy->disk, MAX_DISK_SIZE * 2);
1729	/* Fall through */	1729	fallthrough;
1730	case FDFMTEND:	1730	case FDFMTEND:
1731	case FDFLUSH:	1731	case FDFLUSH:
1732	/* invalidate the buffer track to force a reread */	1732	/* invalidate the buffer track to force a reread */

drivers/block/drbd/drbd_int.h+1−1

@@ -1733,7 +1733,7 @@ static inline void __drbd_chk_io_error_(struct drbd_device *device, · 1732 unmodified lines
1733	_drbd_set_state(_NS(device, disk, D_INCONSISTENT), CS_HARD, NULL);	1733	_drbd_set_state(_NS(device, disk, D_INCONSISTENT), CS_HARD, NULL);
1734	break;	1734	break;
1735	}	1735	}
1736	/* fall through - for DRBD_META_IO_ERROR or DRBD_FORCE_DETACH */	1736	fallthrough; /* for DRBD_META_IO_ERROR or DRBD_FORCE_DETACH */
1737	case EP_DETACH:	1737	case EP_DETACH:
1738	case EP_CALL_HELPER:	1738	case EP_CALL_HELPER:
1739	/* Remember whether we saw a READ or WRITE error.	1739	/* Remember whether we saw a READ or WRITE error.

drivers/block/drbd/drbd_main.c+1−1

@@ -430,7 +430,7 @@ int drbd_thread_start(struct drbd_thread *thi) · 429 unmodified lines
430	thi->t_state = RESTARTING;	430	thi->t_state = RESTARTING;
431	drbd_info(resource, "Restarting %s thread (from %s [%d])\n",	431	drbd_info(resource, "Restarting %s thread (from %s [%d])\n",
432	thi->name, current->comm, current->pid);	432	thi->name, current->comm, current->pid);
433	/* fall through */	433	fallthrough;
434	case RUNNING:	434	case RUNNING:
435	case RESTARTING:	435	case RESTARTING:
436	default:	436	default:

drivers/block/drbd/drbd_nl.c+1−1

@@ -3883,7 +3883,7 @@ static int nla_put_status_info(struct sk_buff skb, struct drbd_device device, · 3882 unmodified lines
3883	if (nla_put_u32(skb, T_helper_exit_code,	3883	if (nla_put_u32(skb, T_helper_exit_code,
3884	sib->helper_exit_code))	3884	sib->helper_exit_code))
3885	goto nla_put_failure;	3885	goto nla_put_failure;
3886	/* fall through */	3886	fallthrough;
3887	case SIB_HELPER_PRE:	3887	case SIB_HELPER_PRE:
3888	if (nla_put_string(skb, T_helper, sib->helper_name))	3888	if (nla_put_string(skb, T_helper, sib->helper_name))
3889	goto nla_put_failure;	3889	goto nla_put_failure;

drivers/block/drbd/drbd_receiver.c+6−6

@@ -1797,7 +1797,7 @@ static int receive_Barrier(struct drbd_connection *connection, struct packet_inf · 1796 unmodified lines
1797	break;	1797	break;
1798	else	1798	else
1799	drbd_warn(connection, "Allocation of an epoch failed, slowing down\n");	1799	drbd_warn(connection, "Allocation of an epoch failed, slowing down\n");
1800	/* Fall through */	1800	fallthrough;
1801		1801
1802	case WO_BDEV_FLUSH:	1802	case WO_BDEV_FLUSH:
1803	case WO_DRAIN_IO:	1803	case WO_DRAIN_IO:
@@ -2917,7 +2917,7 @@ static int receive_DataRequest(struct drbd_connection *connection, struct packet · 1113 unmodified lines
2917	then we would do something smarter here than reading	2917	then we would do something smarter here than reading
2918	the block... */	2918	the block... */
2919	peer_req->flags \|= EE_RS_THIN_REQ;	2919	peer_req->flags \|= EE_RS_THIN_REQ;
2920	/* fall through */	2920	fallthrough;
2921	case P_RS_DATA_REQUEST:	2921	case P_RS_DATA_REQUEST:
2922	peer_req->w.cb = w_e_end_rsdata_req;	2922	peer_req->w.cb = w_e_end_rsdata_req;
2923	fault_type = DRBD_FAULT_RS_RD;	2923	fault_type = DRBD_FAULT_RS_RD;
@@ -3083,7 +3083,7 @@ static int drbd_asb_recover_0p(struct drbd_peer_device *peer_device) __must_hold · 159 unmodified lines
3083	rv = 1;	3083	rv = 1;
3084	break;	3084	break;
3085	}	3085	}
3086	/* Else fall through - to one of the other strategies... */	3086	fallthrough; /* to one of the other strategies */
3087	case ASB_DISCARD_OLDER_PRI:	3087	case ASB_DISCARD_OLDER_PRI:
3088	if (self == 0 && peer == 1) {	3088	if (self == 0 && peer == 1) {
3089	rv = 1;	3089	rv = 1;
@@ -3096,7 +3096,7 @@ static int drbd_asb_recover_0p(struct drbd_peer_device *peer_device) __must_hold · 6 unmodified lines
3096	/* Else fall through to one of the other strategies... */	3096	/* Else fall through to one of the other strategies... */
3097	drbd_warn(device, "Discard younger/older primary did not find a decision\n"	3097	drbd_warn(device, "Discard younger/older primary did not find a decision\n"
3098	"Using discard-least-changes instead\n");	3098	"Using discard-least-changes instead\n");
3099	/* fall through */	3099	fallthrough;
3100	case ASB_DISCARD_ZERO_CHG:	3100	case ASB_DISCARD_ZERO_CHG:
3101	if (ch_peer == 0 && ch_self == 0) {	3101	if (ch_peer == 0 && ch_self == 0) {
3102	rv = test_bit(RESOLVE_CONFLICTS, &peer_device->connection->flags)	3102	rv = test_bit(RESOLVE_CONFLICTS, &peer_device->connection->flags)
@@ -3108,7 +3108,7 @@ static int drbd_asb_recover_0p(struct drbd_peer_device *peer_device) __must_hold · 5 unmodified lines
3108	}	3108	}
3109	if (after_sb_0p == ASB_DISCARD_ZERO_CHG)	3109	if (after_sb_0p == ASB_DISCARD_ZERO_CHG)
3110	break;	3110	break;
3111	/* else, fall through */	3111	fallthrough;
3112	case ASB_DISCARD_LEAST_CHG:	3112	case ASB_DISCARD_LEAST_CHG:
3113	if (ch_self < ch_peer)	3113	if (ch_self < ch_peer)
3114	rv = -1;	3114	rv = -1;
@@ -3608,7 +3608,7 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_peer_device *peer_device, · 493 unmodified lines
3608	switch (rr_conflict) {	3608	switch (rr_conflict) {
3609	case ASB_CALL_HELPER:	3609	case ASB_CALL_HELPER:
3610	drbd_khelper(device, "pri-lost");	3610	drbd_khelper(device, "pri-lost");
3611	/* fall through */	3611	fallthrough;
3612	case ASB_DISCONNECT:	3612	case ASB_DISCONNECT:
3613	drbd_err(device, "I shall become SyncTarget, but I am primary!\n");	3613	drbd_err(device, "I shall become SyncTarget, but I am primary!\n");
3614	return C_MASK;	3614	return C_MASK;

drivers/block/drbd/drbd_req.c+2−2

@@ -611,7 +611,7 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what, · 610 unmodified lines
611	drbd_set_out_of_sync(device, req->i.sector, req->i.size);	611	drbd_set_out_of_sync(device, req->i.sector, req->i.size);
612	drbd_report_io_error(device, req);	612	drbd_report_io_error(device, req);
613	__drbd_chk_io_error(device, DRBD_READ_ERROR);	613	__drbd_chk_io_error(device, DRBD_READ_ERROR);
614	/* fall through. */	614	fallthrough;
615	case READ_AHEAD_COMPLETED_WITH_ERROR:	615	case READ_AHEAD_COMPLETED_WITH_ERROR:
616	/* it is legal to fail read-ahead, no __drbd_chk_io_error in that case. */	616	/* it is legal to fail read-ahead, no __drbd_chk_io_error in that case. */
617	mod_rq_state(req, m, RQ_LOCAL_PENDING, RQ_LOCAL_COMPLETED);	617	mod_rq_state(req, m, RQ_LOCAL_PENDING, RQ_LOCAL_COMPLETED);
@@ -836,7 +836,7 @@ int __req_mod(struct drbd_request *req, enum drbd_req_event what, · 218 unmodified lines
836	} /* else: FIXME can this happen? */	836	} /* else: FIXME can this happen? */
837	break;	837	break;
838	}	838	}
839	/* else, fall through - to BARRIER_ACKED */	839	fallthrough; /* to BARRIER_ACKED */
840		840
841	case BARRIER_ACKED:	841	case BARRIER_ACKED:
842	/* barrier ack for READ requests does not make sense */	842	/* barrier ack for READ requests does not make sense */

drivers/block/floppy.c+2−2

@@ -1680,7 +1680,7 @@ static void recal_interrupt(void) · 1679 unmodified lines
1680	clear_bit(FD_DISK_NEWCHANGE_BIT,	1680	clear_bit(FD_DISK_NEWCHANGE_BIT,
1681	&drive_state[current_drive].flags);	1681	&drive_state[current_drive].flags);
1682	drive_state[current_drive].select_date = jiffies;	1682	drive_state[current_drive].select_date = jiffies;
1683	/* fall through */	1683	fallthrough;
1684	default:	1684	default:
1685	debugt(__func__, "default");	1685	debugt(__func__, "default");
1686	/* Recalibrate moves the head by at	1686	/* Recalibrate moves the head by at
@@ -3592,7 +3592,7 @@ static int fd_locked_ioctl(struct block_device *bdev, fmode_t mode, unsigned int · 1905 unmodified lines
3592	if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)	3592	if (poll_drive(true, FD_RAW_NEED_DISK) == -EINTR)
3593	return -EINTR;	3593	return -EINTR;
3594	process_fd_request();	3594	process_fd_request();
3595	/* fall through */	3595	fallthrough;
3596	case FDGETDRVSTAT:	3596	case FDGETDRVSTAT:
3597	outparam = &drive_state[drive];	3597	outparam = &drive_state[drive];
3598	break;	3598	break;

drivers/block/loop.c+22−19

 	struct file *file = lo->lo_backing_file;
 	struct inode *inode = file->f_mapping->host;
 	struct request_queue *q = lo->lo_queue;
+	u32 granularity, max_discard_sectors;
 	/*
 	 * If the backing device is a block device, mirror its zeroing
 		struct request_queue *backingq;
 		backingq = bdev_get_queue(inode->i_bdev);
-		blk_queue_max_discard_sectors(q,
-			backingq->limits.max_write_zeroes_sectors);
-		blk_queue_max_write_zeroes_sectors(q,
+		max_discard_sectors = backingq->limits.max_write_zeroes_sectors;
-			backingq->limits.max_write_zeroes_sectors);
+		granularity = backingq->limits.discard_granularity ?:
+			queue_physical_block_size(backingq);
 	/*
 	 * We use punch hole to reclaim the free space used by the
 	 * useful information.
 	 */
 	} else if (!file->f_op->fallocate || lo->lo_encrypt_key_size) {
-		q->limits.discard_granularity = 0;
+		max_discard_sectors = 0;
-		q->limits.discard_alignment = 0;
+		granularity = 0;
-		blk_queue_max_discard_sectors(q, 0);
-		blk_queue_max_write_zeroes_sectors(q, 0);
 	} else {
-		q->limits.discard_granularity = inode->i_sb->s_blocksize;
+		max_discard_sectors = UINT_MAX >> 9;
-		q->limits.discard_alignment = 0;
+		granularity = inode->i_sb->s_blocksize;
-		blk_queue_max_discard_sectors(q, UINT_MAX >> 9);
-		blk_queue_max_write_zeroes_sectors(q, UINT_MAX >> 9);
 	}
-	if (q->limits.max_write_zeroes_sectors)
+	if (max_discard_sectors) {
+		q->limits.discard_granularity = granularity;
+		blk_queue_max_discard_sectors(q, max_discard_sectors);
+		blk_queue_max_write_zeroes_sectors(q, max_discard_sectors);
 		blk_queue_flag_set(QUEUE_FLAG_DISCARD, q);
-	else
+	} else {
+		q->limits.discard_granularity = 0;
+		blk_queue_max_discard_sectors(q, 0);
+		blk_queue_max_write_zeroes_sectors(q, 0);
 		blk_queue_flag_clear(QUEUE_FLAG_DISCARD, q);
+	}
+	q->limits.discard_alignment = 0;
 }
 static void loop_unprepare_queue(struct loop_device *lo)
 	mapping = file->f_mapping;
 	inode = mapping->host;
-	size = get_loop_size(lo, file);
 	if ((config->info.lo_flags & ~LOOP_CONFIGURE_SETTABLE_FLAGS) != 0) {
 		error = -EINVAL;
 		goto out_unlock;
 	loop_update_rotational(lo);
 	loop_update_dio(lo);
 	loop_sysfs_init(lo);
+	size = get_loop_size(lo, file);
 	loop_set_size(lo, size);
 	set_blocksize(bdev, S_ISBLK(inode->i_mode) ?
 	case LOOP_SET_BLOCK_SIZE:
 		if (!(mode & FMODE_WRITE) && !capable(CAP_SYS_ADMIN))
 			return -EPERM;
-		/* Fall through */
+		fallthrough;
 	default:
 		err = lo_simple_ioctl(lo, cmd, arg);
 		break;
 	case LOOP_SET_STATUS64:
 	case LOOP_CONFIGURE:
 		arg = (unsigned long) compat_ptr(arg);
-		/* fall through */
+		fallthrough;
 	case LOOP_SET_FD:
 	case LOOP_CHANGE_FD:
 	case LOOP_SET_BLOCK_SIZE:

drivers/block/nbd.c+2−0

@@ -1363,6 +1363,8 @@ static void nbd_set_cmd_timeout(struct nbd_device *nbd, u64 timeout) · 1362 unmodified lines
1363	nbd->tag_set.timeout = timeout * HZ;	1363	nbd->tag_set.timeout = timeout * HZ;
1364	if (timeout)	1364	if (timeout)
1365	blk_queue_rq_timeout(nbd->disk->queue, timeout * HZ);	1365	blk_queue_rq_timeout(nbd->disk->queue, timeout * HZ);
		1366	else
		1367	blk_queue_rq_timeout(nbd->disk->queue, 30 * HZ);
1366	}	1368	}
1367		1369
1368	/* Must be called with config_lock held */	1370	/* Must be called with config_lock held */

drivers/block/null_blk_main.c+1−1

@@ -1147,7 +1147,7 @@ static int null_handle_rq(struct nullb_cmd *cmd) · 1146 unmodified lines
1147	len = bvec.bv_len;	1147	len = bvec.bv_len;
1148	err = null_transfer(nullb, bvec.bv_page, len, bvec.bv_offset,	1148	err = null_transfer(nullb, bvec.bv_page, len, bvec.bv_offset,
1149	op_is_write(req_op(rq)), sector,	1149	op_is_write(req_op(rq)), sector,
1150	req_op(rq) & REQ_FUA);	1150	rq->cmd_flags & REQ_FUA);
1151	if (err) {	1151	if (err) {
1152	spin_unlock_irq(&nullb->lock);	1152	spin_unlock_irq(&nullb->lock);
1153	return err;	1153	return err;

drivers/block/paride/pd.c+2−2

@@ -440,7 +440,7 @@ static void run_fsm(void) · 439 unmodified lines
440	pd_claimed = 1;	440	pd_claimed = 1;
441	if (!pi_schedule_claimed(pi_current, run_fsm))	441	if (!pi_schedule_claimed(pi_current, run_fsm))
442	return;	442	return;
443	/* fall through */	443	fallthrough;
444	case 1:	444	case 1:
445	pd_claimed = 2;	445	pd_claimed = 2;
446	pi_current->proto->connect(pi_current);	446	pi_current->proto->connect(pi_current);
@@ -465,7 +465,7 @@ static void run_fsm(void) · 18 unmodified lines
465	if (stop)	465	if (stop)
466	return;	466	return;
467	}	467	}
468	/* fall through */	468	fallthrough;
469	case Hold:	469	case Hold:
470	schedule_fsm();	470	schedule_fsm();
471	return;	471	return;

drivers/block/pktcdvd.c+1−1

@@ -2641,7 +2641,7 @@ static int pkt_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd, · 2640 unmodified lines
2641	*/	2641	*/
2642	if (pd->refcnt == 1)	2642	if (pd->refcnt == 1)
2643	pkt_lock_door(pd, 0);	2643	pkt_lock_door(pd, 0);
2644	/* fall through */	2644	fallthrough;
2645	/*	2645	/*
2646	* forward selected CDROM ioctls to CD-ROM, for UDF	2646	* forward selected CDROM ioctls to CD-ROM, for UDF
2647	*/	2647	*/

drivers/block/rbd.c+4−4

@@ -3293,7 +3293,7 @@ again: · 3292 unmodified lines
3293	case __RBD_OBJ_COPYUP_OBJECT_MAPS:	3293	case __RBD_OBJ_COPYUP_OBJECT_MAPS:
3294	if (!pending_result_dec(&obj_req->pending, result))	3294	if (!pending_result_dec(&obj_req->pending, result))
3295	return false;	3295	return false;
3296	/* fall through */	3296	fallthrough;
3297	case RBD_OBJ_COPYUP_OBJECT_MAPS:	3297	case RBD_OBJ_COPYUP_OBJECT_MAPS:
3298	if (*result) {	3298	if (*result) {
3299	rbd_warn(rbd_dev, "snap object map update failed: %d",	3299	rbd_warn(rbd_dev, "snap object map update failed: %d",
@@ -3312,7 +3312,7 @@ again: · 12 unmodified lines
3312	case __RBD_OBJ_COPYUP_WRITE_OBJECT:	3312	case __RBD_OBJ_COPYUP_WRITE_OBJECT:
3313	if (!pending_result_dec(&obj_req->pending, result))	3313	if (!pending_result_dec(&obj_req->pending, result))
3314	return false;	3314	return false;
3315	/* fall through */	3315	fallthrough;
3316	case RBD_OBJ_COPYUP_WRITE_OBJECT:	3316	case RBD_OBJ_COPYUP_WRITE_OBJECT:
3317	return true;	3317	return true;
3318	default:	3318	default:
@@ -3399,7 +3399,7 @@ again: · 80 unmodified lines
3399	case __RBD_OBJ_WRITE_COPYUP:	3399	case __RBD_OBJ_WRITE_COPYUP:
3400	if (!rbd_obj_advance_copyup(obj_req, result))	3400	if (!rbd_obj_advance_copyup(obj_req, result))
3401	return false;	3401	return false;
3402	/* fall through */	3402	fallthrough;
3403	case RBD_OBJ_WRITE_COPYUP:	3403	case RBD_OBJ_WRITE_COPYUP:
3404	if (*result) {	3404	if (*result) {
3405	rbd_warn(rbd_dev, "copyup failed: %d", *result);	3405	rbd_warn(rbd_dev, "copyup failed: %d", *result);
@@ -3592,7 +3592,7 @@ again: · 186 unmodified lines
3592	case __RBD_IMG_OBJECT_REQUESTS:	3592	case __RBD_IMG_OBJECT_REQUESTS:
3593	if (!pending_result_dec(&img_req->pending, result))	3593	if (!pending_result_dec(&img_req->pending, result))
3594	return false;	3594	return false;
3595	/* fall through */	3595	fallthrough;
3596	case RBD_IMG_OBJECT_REQUESTS:	3596	case RBD_IMG_OBJECT_REQUESTS:
3597	return true;	3597	return true;
3598	default:	3598	default:

drivers/block/rnbd/rnbd-srv.c+2−1

@@ -148,7 +148,8 @@ static int process_rdma(struct rtrs_srv *sess, · 147 unmodified lines
148	/* Generate bio with pages pointing to the rdma buffer */	148	/* Generate bio with pages pointing to the rdma buffer */
149	bio = rnbd_bio_map_kern(data, sess_dev->rnbd_dev->ibd_bio_set, datalen, GFP_KERNEL);	149	bio = rnbd_bio_map_kern(data, sess_dev->rnbd_dev->ibd_bio_set, datalen, GFP_KERNEL);
150	if (IS_ERR(bio)) {	150	if (IS_ERR(bio)) {
151	rnbd_srv_err(sess_dev, "Failed to generate bio, err: %ld\n", PTR_ERR(bio));	151	err = PTR_ERR(bio);
		152	rnbd_srv_err(sess_dev, "Failed to generate bio, err: %d\n", err);
152	goto sess_dev_put;	153	goto sess_dev_put;
153	}	154	}
154		155

drivers/block/rsxx/core.c+1−1

@@ -425,7 +425,7 @@ static void card_state_change(struct rsxx_cardinfo *card, · 424 unmodified lines
425	* Fall through so the DMA devices can be attached and	425	* Fall through so the DMA devices can be attached and
426	* the user can attempt to pull off their data.	426	* the user can attempt to pull off their data.
427	*/	427	*/
428	/* fall through */	428	fallthrough;
429	case CARD_STATE_GOOD:	429	case CARD_STATE_GOOD:
430	st = rsxx_get_card_size8(card, &card->size8);	430	st = rsxx_get_card_size8(card, &card->size8);
431	if (st)	431	if (st)

drivers/block/skd_main.c+1−1

@@ -1436,7 +1436,7 @@ static void skd_resolve_req_exception(struct skd_device *skdev, · 1435 unmodified lines
1436	blk_mq_requeue_request(req, true);	1436	blk_mq_requeue_request(req, true);
1437	break;	1437	break;
1438	}	1438	}
1439	/* fall through */	1439	fallthrough;
1440		1440
1441	case SKD_CHECK_STATUS_REPORT_ERROR:	1441	case SKD_CHECK_STATUS_REPORT_ERROR:
1442	default:	1442	default:

drivers/block/virtio_blk.c+23−8

@@ -126,16 +126,31 @@ static int virtblk_setup_discard_write_zeroes(struct request *req, bool unmap) · 125 unmodified lines
126	if (!range)	126	if (!range)
127	return -ENOMEM;	127	return -ENOMEM;
128		128
129	__rq_for_each_bio(bio, req) {	129	/*
130	u64 sector = bio->bi_iter.bi_sector;	130	* Single max discard segment means multi-range discard isn't
131	u32 num_sectors = bio->bi_iter.bi_size >> SECTOR_SHIFT;	131	* supported, and block layer only runs contiguity merge like
132		132	* normal RW request. So we can't reply on bio for retrieving
133	range[n].flags = cpu_to_le32(flags);	133	* each range info.
134	range[n].num_sectors = cpu_to_le32(num_sectors);	134	*/
135	range[n].sector = cpu_to_le64(sector);	135	if (queue_max_discard_segments(req->q) == 1) {
136	n++;	136	range[0].flags = cpu_to_le32(flags);
		137	range[0].num_sectors = cpu_to_le32(blk_rq_sectors(req));
		138	range[0].sector = cpu_to_le64(blk_rq_pos(req));
		139	n = 1;
		140	} else {
		141	__rq_for_each_bio(bio, req) {
		142	u64 sector = bio->bi_iter.bi_sector;
		143	u32 num_sectors = bio->bi_iter.bi_size >> SECTOR_SHIFT;
		144
		145	range[n].flags = cpu_to_le32(flags);
		146	range[n].num_sectors = cpu_to_le32(num_sectors);
		147	range[n].sector = cpu_to_le64(sector);
		148	n++;
		149	}
137	}	150	}
138		151
		152	WARN_ON_ONCE(n != segments);
		153
139	req->special_vec.bv_page = virt_to_page(range);	154	req->special_vec.bv_page = virt_to_page(range);
140	req->special_vec.bv_offset = offset_in_page(range);	155	req->special_vec.bv_offset = offset_in_page(range);
141	req->special_vec.bv_len = sizeof(range) segments;	156	req->special_vec.bv_len = sizeof(range) segments;

drivers/block/xen-blkback/blkback.c+1−1

@@ -1260,7 +1260,7 @@ static int dispatch_rw_block_io(struct xen_blkif_ring *ring, · 1259 unmodified lines
1260	break;	1260	break;
1261	case BLKIF_OP_WRITE_BARRIER:	1261	case BLKIF_OP_WRITE_BARRIER:
1262	drain = true;	1262	drain = true;
1263	/* fall through */	1263	fallthrough;
1264	case BLKIF_OP_FLUSH_DISKCACHE:	1264	case BLKIF_OP_FLUSH_DISKCACHE:
1265	ring->st_f_req++;	1265	ring->st_f_req++;
1266	operation = REQ_OP_WRITE;	1266	operation = REQ_OP_WRITE;

drivers/block/xen-blkback/xenbus.c+1−1

@@ -843,7 +843,7 @@ static void frontend_changed(struct xenbus_device *dev, · 842 unmodified lines
843	xenbus_switch_state(dev, XenbusStateClosed);	843	xenbus_switch_state(dev, XenbusStateClosed);
844	if (xenbus_dev_is_online(dev))	844	if (xenbus_dev_is_online(dev))
845	break;	845	break;
846	/* fall through */	846	fallthrough;
847	/* if not online */	847	/* if not online */
848	case XenbusStateUnknown:	848	case XenbusStateUnknown:
849	/* implies xen_blkif_disconnect() via xen_blkbk_remove() */	849	/* implies xen_blkif_disconnect() via xen_blkbk_remove() */

drivers/block/xen-blkfront.c+2−3

 	case BLKIF_RSP_EOPNOTSUPP:
 		return REQ_EOPNOTSUPP;
 	case BLKIF_RSP_ERROR:
-		/* Fallthrough. */
 	default:
 		return REQ_ERROR;
 	}
 				info->feature_flush = 0;
 				xlvbd_flush(info);
 			}
-			/* fall through */
+			fallthrough;
 		case BLKIF_OP_READ:
 		case BLKIF_OP_WRITE:
 			if (unlikely(bret->status != BLKIF_RSP_OKAY))
 	case XenbusStateClosed:
 		if (dev->state == XenbusStateClosed)
 			break;
-		/* fall through */
+		fallthrough;
 	case XenbusStateClosing:
 		if (info)
 			blkfront_closing(info);

drivers/bus/ti-sysc.c+1−1

@@ -1849,7 +1849,7 @@ static int sysc_clockdomain_init(struct sysc *ddata) · 1848 unmodified lines
1849	switch (ddata->nr_clocks) {	1849	switch (ddata->nr_clocks) {
1850	case 2:	1850	case 2:
1851	ick = ddata->clocks[SYSC_ICK];	1851	ick = ddata->clocks[SYSC_ICK];
1852	/* fallthrough */	1852	fallthrough;
1853	case 1:	1853	case 1:
1854	fck = ddata->clocks[SYSC_FCK];	1854	fck = ddata->clocks[SYSC_FCK];
1855	break;	1855	break;

drivers/char/agp/ali-agp.c+1−1

@@ -357,7 +357,7 @@ found: · 356 unmodified lines
357	default:	357	default:
358	break;	358	break;
359	}	359	}
360	/FALLTHROUGH/	360	fallthrough;
361	default:	361	default:
362	bridge->driver = &ali_generic_bridge;	362	bridge->driver = &ali_generic_bridge;
363	}	363	}

drivers/char/hw_random/ingenic-rng.c+2−7

 	priv->base = devm_platform_ioremap_resource(pdev, 0);
 	if (IS_ERR(priv->base)) {
 		pr_err("%s: Failed to map RNG registers\n", __func__);
-		ret = PTR_ERR(priv->base);
+		return PTR_ERR(priv->base);
-		goto err_free_rng;
 	}
 	priv->version = (enum ingenic_rng_version)of_device_get_match_data(&pdev->dev);
 	ret = hwrng_register(&priv->rng);
 	if (ret) {
 		dev_err(&pdev->dev, "Failed to register hwrng\n");
-		goto err_free_rng;
+		return ret;
 	}
 	platform_set_drvdata(pdev, priv);
 	dev_info(&pdev->dev, "Ingenic RNG driver registered\n");
 	return 0;
-err_free_rng:
-	kfree(priv);
-	return ret;
 }
 static int ingenic_rng_remove(struct platform_device *pdev)

drivers/char/ipmi/kcs_bmc.c+1−1

@@ -99,7 +99,7 @@ static void kcs_bmc_handle_data(struct kcs_bmc *kcs_bmc) · 98 unmodified lines
99	switch (kcs_bmc->phase) {	99	switch (kcs_bmc->phase) {
100	case KCS_PHASE_WRITE_START:	100	case KCS_PHASE_WRITE_START:
101	kcs_bmc->phase = KCS_PHASE_WRITE_DATA;	101	kcs_bmc->phase = KCS_PHASE_WRITE_DATA;
102	/* fall through */	102	fallthrough;
103		103
104	case KCS_PHASE_WRITE_DATA:	104	case KCS_PHASE_WRITE_DATA:
105	if (kcs_bmc->data_in_idx < KCS_MSG_BUFSIZ) {	105	if (kcs_bmc->data_in_idx < KCS_MSG_BUFSIZ) {

drivers/char/lp.c+2−2

@@ -734,7 +734,7 @@ static long lp_ioctl(struct file *file, unsigned int cmd, · 733 unmodified lines
734	ret = lp_set_timeout32(minor, (void __user *)arg);	734	ret = lp_set_timeout32(minor, (void __user *)arg);
735	break;	735	break;
736	}	736	}
737	/* fall through - for 64-bit */	737	fallthrough; /* for 64-bit */
738	case LPSETTIMEOUT_NEW:	738	case LPSETTIMEOUT_NEW:
739	ret = lp_set_timeout64(minor, (void __user *)arg);	739	ret = lp_set_timeout64(minor, (void __user *)arg);
740	break;	740	break;
@@ -762,7 +762,7 @@ static long lp_compat_ioctl(struct file *file, unsigned int cmd, · 21 unmodified lines
762	ret = lp_set_timeout32(minor, (void __user *)arg);	762	ret = lp_set_timeout32(minor, (void __user *)arg);
763	break;	763	break;
764	}	764	}
765	/* fall through - for x32 mode */	765	fallthrough; /* for x32 mode */
766	case LPSETTIMEOUT_NEW:	766	case LPSETTIMEOUT_NEW:
767	ret = lp_set_timeout64(minor, (void __user *)arg);	767	ret = lp_set_timeout64(minor, (void __user *)arg);
768	break;	768	break;

drivers/char/mem.c+1−1

@@ -791,7 +791,7 @@ static loff_t memory_lseek(struct file *file, loff_t offset, int orig) · 790 unmodified lines
791	switch (orig) {	791	switch (orig) {
792	case SEEK_CUR:	792	case SEEK_CUR:
793	offset += file->f_pos;	793	offset += file->f_pos;
794	/* fall through */	794	fallthrough;
795	case SEEK_SET:	795	case SEEK_SET:
796	/* to avoid userland mistaking f_pos=-9 as -EBADF=-9 */	796	/* to avoid userland mistaking f_pos=-9 as -EBADF=-9 */
797	if ((unsigned long long)offset >= -MAX_ERRNO) {	797	if ((unsigned long long)offset >= -MAX_ERRNO) {

drivers/char/nvram.c+1−1

@@ -286,7 +286,7 @@ static long nvram_misc_ioctl(struct file *file, unsigned int cmd, · 285 unmodified lines
286	#ifdef CONFIG_PPC	286	#ifdef CONFIG_PPC
287	case OBSOLETE_PMAC_NVRAM_GET_OFFSET:	287	case OBSOLETE_PMAC_NVRAM_GET_OFFSET:
288	pr_warn("nvram: Using obsolete PMAC_NVRAM_GET_OFFSET ioctl\n");	288	pr_warn("nvram: Using obsolete PMAC_NVRAM_GET_OFFSET ioctl\n");
289	/* fall through */	289	fallthrough;
290	case IOC_NVRAM_GET_OFFSET:	290	case IOC_NVRAM_GET_OFFSET:
291	ret = -EINVAL;	291	ret = -EINVAL;
292	#ifdef CONFIG_PPC_PMAC	292	#ifdef CONFIG_PPC_PMAC

drivers/clocksource/timer-cadence-ttc.c+2−2

@@ -309,7 +309,7 @@ static int ttc_rate_change_clocksource_cb(struct notifier_block *nb, · 308 unmodified lines
309	/* restore original register value */	309	/* restore original register value */
310	writel_relaxed(ttccs->scale_clk_ctrl_reg_old,	310	writel_relaxed(ttccs->scale_clk_ctrl_reg_old,
311	ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET);	311	ttccs->ttc.base_addr + TTC_CLK_CNTRL_OFFSET);
312	/* fall through */	312	fallthrough;
313	default:	313	default:
314	return NOTIFY_DONE;	314	return NOTIFY_DONE;
315	}	315	}
@@ -392,7 +392,7 @@ static int ttc_rate_change_clockevent_cb(struct notifier_block *nb, · 76 unmodified lines
392		392
393	clockevents_update_freq(&ttcce->ce, ndata->new_rate / PRESCALE);	393	clockevents_update_freq(&ttcce->ce, ndata->new_rate / PRESCALE);
394		394
395	/* fall through */	395	fallthrough;
396	case PRE_RATE_CHANGE:	396	case PRE_RATE_CHANGE:
397	case ABORT_RATE_CHANGE:	397	case ABORT_RATE_CHANGE:
398	default:	398	default:

drivers/cpufreq/cpufreq.c+1−2

 	freq = arch_freq_get_on_cpu(policy->cpu);
 	if (freq)
 		ret = sprintf(buf, "%u\n", freq);
-	else if (cpufreq_driver && cpufreq_driver->setpolicy &&
+	else if (cpufreq_driver->setpolicy && cpufreq_driver->get)
-			cpufreq_driver->get)
 		ret = sprintf(buf, "%u\n", cpufreq_driver->get(policy->cpu));
 	else
 		ret = sprintf(buf, "%u\n", policy->cur);

drivers/cpufreq/intel_pstate.c+148−88

  * @epp_policy:		Last saved policy used to set EPP/EPB
  * @epp_default:	Power on default HWP energy performance
  *			preference/bias
- * @epp_saved:		Saved EPP/EPB during system suspend or CPU offline
- *			operation
  * @epp_cached		Cached HWP energy-performance preference value
  * @hwp_req_cached:	Cached value of the last HWP Request MSR
  * @hwp_cap_cached:	Cached value of the last HWP Capabilities MSR
  * @last_io_update:	Last time when IO wake flag was set
  * @sched_flags:	Store scheduler flags for possible cross CPU update
  * @hwp_boost_min:	Last HWP boosted min performance
+ * @suspended:		Whether or not the driver has been suspended.
  *
  * This structure stores per CPU instance data for all CPUs.
  */
 	s16 epp_powersave;
 	s16 epp_policy;
 	s16 epp_default;
-	s16 epp_saved;
 	s16 epp_cached;
 	u64 hwp_req_cached;
 	u64 hwp_cap_cached;
 	u64 last_io_update;
 	unsigned int sched_flags;
 	u32 hwp_boost_min;
+	bool suspended;
 };
 static struct cpudata **all_cpu_data;
 static int intel_pstate_set_epp(struct cpudata *cpu, u32 epp)
 {
+	int ret;
 	/*
 	 * Use the cached HWP Request MSR value, because in the active mode the
 	 * register itself may be updated by intel_pstate_hwp_boost_up() or
 	 * function, so it cannot run in parallel with the update below.
 	 */
 	WRITE_ONCE(cpu->hwp_req_cached, value);
-	return wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
+	ret = wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
+	if (!ret)
+		cpu->epp_cached = epp;
+	return ret;
 }
 static int intel_pstate_set_energy_pref_index(struct cpudata *cpu_data,
 		else if (epp == -EINVAL)
 			epp = epp_values[pref_index - 1];
+		/*
+		 * To avoid confusion, refuse to set EPP to any values different
+		 * from 0 (performance) if the current policy is "performance",
+		 * because those values would be overridden.
+		 */
+		if (epp > 0 && cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE)
+			return -EBUSY;
 		ret = intel_pstate_set_epp(cpu_data, epp);
 	} else {
 		if (epp == -EINVAL)
 			cpufreq_stop_governor(policy);
 			ret = intel_pstate_set_epp(cpu, epp);
 			err = cpufreq_start_governor(policy);
-			if (!ret) {
+			if (!ret)
-				cpu->epp_cached = epp;
 				ret = err;
-			}
 		}
 	}
 	rdmsrl_on_cpu(cpu, MSR_HWP_CAPABILITIES, &cap);
 	WRITE_ONCE(all_cpu_data[cpu]->hwp_cap_cached, cap);
-	if (global.no_turbo)
+	if (global.no_turbo || global.turbo_disabled)
 		*current_max = HWP_GUARANTEED_PERF(cap);
 	else
 		*current_max = HWP_HIGHEST_PERF(cap);
 	cpu_data->epp_policy = cpu_data->policy;
-	if (cpu_data->epp_saved >= 0) {
-		epp = cpu_data->epp_saved;
-		cpu_data->epp_saved = -EINVAL;
-		goto update_epp;
-	}
 	if (cpu_data->policy == CPUFREQ_POLICY_PERFORMANCE) {
 		epp = intel_pstate_get_epp(cpu_data, value);
 		cpu_data->epp_powersave = epp;
 		epp = cpu_data->epp_powersave;
 	}
-update_epp:
 	if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
 		value &= ~GENMASK_ULL(31, 24);
 		value |= (u64)epp << 24;
 	wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
 }
-static void intel_pstate_hwp_force_min_perf(int cpu)
+static void intel_pstate_hwp_offline(struct cpudata *cpu)
 {
-	u64 value;
+	u64 value = READ_ONCE(cpu->hwp_req_cached);
 	int min_perf;
-	value = all_cpu_data[cpu]->hwp_req_cached;
+	if (boot_cpu_has(X86_FEATURE_HWP_EPP)) {
+		/*
+		 * In case the EPP has been set to "performance" by the
+		 * active mode "performance" scaling algorithm, replace that
+		 * temporary value with the cached EPP one.
+		 */
+		value &= ~GENMASK_ULL(31, 24);
+		value |= HWP_ENERGY_PERF_PREFERENCE(cpu->epp_cached);
+		WRITE_ONCE(cpu->hwp_req_cached, value);
+	}
 	value &= ~GENMASK_ULL(31, 0);
-	min_perf = HWP_LOWEST_PERF(all_cpu_data[cpu]->hwp_cap_cached);
+	min_perf = HWP_LOWEST_PERF(cpu->hwp_cap_cached);
 	/* Set hwp_max = hwp_min */
 	value |= HWP_MAX_PERF(min_perf);
 	if (boot_cpu_has(X86_FEATURE_HWP_EPP))
 		value |= HWP_ENERGY_PERF_PREFERENCE(HWP_EPP_POWERSAVE);
-	wrmsrl_on_cpu(cpu, MSR_HWP_REQUEST, value);
+	wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, value);
-}
-static int intel_pstate_hwp_save_state(struct cpufreq_policy *policy)
-{
-	struct cpudata *cpu_data = all_cpu_data[policy->cpu];
-	if (!hwp_active)
-		return 0;
-	cpu_data->epp_saved = intel_pstate_get_epp(cpu_data, 0);
-	return 0;
 }
 #define POWER_CTL_EE_ENABLE	1
 static void intel_pstate_hwp_enable(struct cpudata *cpudata);
+static void intel_pstate_hwp_reenable(struct cpudata *cpu)
+{
+	intel_pstate_hwp_enable(cpu);
+	wrmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, READ_ONCE(cpu->hwp_req_cached));
+}
+static int intel_pstate_suspend(struct cpufreq_policy *policy)
+{
+	struct cpudata *cpu = all_cpu_data[policy->cpu];
+	pr_debug("CPU %d suspending\n", cpu->cpu);
+	cpu->suspended = true;
+	return 0;
+}
 static int intel_pstate_resume(struct cpufreq_policy *policy)
 {
+	struct cpudata *cpu = all_cpu_data[policy->cpu];
+	pr_debug("CPU %d resuming\n", cpu->cpu);
 	/* Only restore if the system default is changed */
 	if (power_ctl_ee_state == POWER_CTL_EE_ENABLE)
 	else if (power_ctl_ee_state == POWER_CTL_EE_DISABLE)
 		set_power_ctl_ee_state(false);
-	if (!hwp_active)
+	if (cpu->suspended && hwp_active) {
-		return 0;
+		mutex_lock(&intel_pstate_limits_lock);
-	mutex_lock(&intel_pstate_limits_lock);
+		/* Re-enable HWP, because "online" has not done that. */
+		intel_pstate_hwp_reenable(cpu);
-	if (policy->cpu == 0)
+		mutex_unlock(&intel_pstate_limits_lock);
-		intel_pstate_hwp_enable(all_cpu_data[policy->cpu]);
+	}
-	all_cpu_data[policy->cpu]->epp_policy = 0;
+	cpu->suspended = false;
-	intel_pstate_hwp_set(policy->cpu);
-	mutex_unlock(&intel_pstate_limits_lock);
 	return 0;
 }
 		wrmsrl_on_cpu(cpudata->cpu, MSR_HWP_INTERRUPT, 0x00);
 	wrmsrl_on_cpu(cpudata->cpu, MSR_PM_ENABLE, 0x1);
-	cpudata->epp_policy = 0;
 	if (cpudata->epp_default == -EINVAL)
 		cpudata->epp_default = intel_pstate_get_epp(cpudata, 0);
 }
 		all_cpu_data[cpunum] = cpu;
-		cpu->epp_default = -EINVAL;
+		cpu->cpu = cpunum;
-		cpu->epp_powersave = -EINVAL;
-		cpu->epp_saved = -EINVAL;
-	}
-	cpu = all_cpu_data[cpunum];
-	cpu->cpu = cpunum;
+		cpu->epp_default = -EINVAL;
-	if (hwp_active) {
+		if (hwp_active) {
-		const struct x86_cpu_id *id;
+			const struct x86_cpu_id *id;
-		intel_pstate_hwp_enable(cpu);
+			intel_pstate_hwp_enable(cpu);
-		id = x86_match_cpu(intel_pstate_hwp_boost_ids);
+			id = x86_match_cpu(intel_pstate_hwp_boost_ids);
-		if (id && intel_pstate_acpi_pm_profile_server())
+			if (id && intel_pstate_acpi_pm_profile_server())
-			hwp_boost = true;
+				hwp_boost = true;
+		}
+	} else if (hwp_active) {
+		/*
+		 * Re-enable HWP in case this happens after a resume from ACPI
+		 * S3 if the CPU was offline during the whole system/resume
+		 * cycle.
+		 */
+		intel_pstate_hwp_reenable(cpu);
 	}
+	cpu->epp_powersave = -EINVAL;
+	cpu->epp_policy = 0;
 	intel_pstate_get_cpu_pstates(cpu);
 	pr_debug("controlling: cpu %d\n", cpunum);
 	return 0;
 }
-static void intel_cpufreq_stop_cpu(struct cpufreq_policy *policy)
+static int intel_pstate_cpu_offline(struct cpufreq_policy *policy)
 {
+	struct cpudata *cpu = all_cpu_data[policy->cpu];
+	pr_debug("CPU %d going offline\n", cpu->cpu);
+	if (cpu->suspended)
+		return 0;
+	/*
+	 * If the CPU is an SMT thread and it goes offline with the performance
+	 * settings different from the minimum, it will prevent its sibling
+	 * from getting to lower performance levels, so force the minimum
+	 * performance on CPU offline to prevent that from happening.
+	 */
 	if (hwp_active)
-		intel_pstate_hwp_force_min_perf(policy->cpu);
+		intel_pstate_hwp_offline(cpu);
 	else
-		intel_pstate_set_min_pstate(all_cpu_data[policy->cpu]);
+		intel_pstate_set_min_pstate(cpu);
+	intel_pstate_exit_perf_limits(policy);
+	return 0;
+}
+static int intel_pstate_cpu_online(struct cpufreq_policy *policy)
+{
+	struct cpudata *cpu = all_cpu_data[policy->cpu];
+	pr_debug("CPU %d going online\n", cpu->cpu);
+	intel_pstate_init_acpi_perf_limits(policy);
+	if (hwp_active) {
+		/*
+		 * Re-enable HWP and clear the "suspended" flag to let "resume"
+		 * know that it need not do that.
+		 */
+		intel_pstate_hwp_reenable(cpu);
+		cpu->suspended = false;
+	}
+	return 0;
 }
 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
 {
-	pr_debug("CPU %d exiting\n", policy->cpu);
+	pr_debug("CPU %d stopping\n", policy->cpu);
 	intel_pstate_clear_update_util_hook(policy->cpu);
-	if (hwp_active)
-		intel_pstate_hwp_save_state(policy);
-	intel_cpufreq_stop_cpu(policy);
 }
 static int intel_pstate_cpu_exit(struct cpufreq_policy *policy)
 {
-	intel_pstate_exit_perf_limits(policy);
+	pr_debug("CPU %d exiting\n", policy->cpu);
 	policy->fast_switch_possible = false;
 	 */
 	policy->policy = CPUFREQ_POLICY_POWERSAVE;
+	if (hwp_active) {
+		struct cpudata *cpu = all_cpu_data[policy->cpu];
+		cpu->epp_cached = intel_pstate_get_epp(cpu, 0);
+	}
 	return 0;
 }
 	.flags		= CPUFREQ_CONST_LOOPS,
 	.verify		= intel_pstate_verify_policy,
 	.setpolicy	= intel_pstate_set_policy,
-	.suspend	= intel_pstate_hwp_save_state,
+	.suspend	= intel_pstate_suspend,
 	.resume		= intel_pstate_resume,
 	.init		= intel_pstate_cpu_init,
 	.exit		= intel_pstate_cpu_exit,
 	.stop_cpu	= intel_pstate_stop_cpu,
+	.offline	= intel_pstate_cpu_offline,
+	.online		= intel_pstate_cpu_online,
 	.update_limits	= intel_pstate_update_limits,
 	.name		= "intel_pstate",
 };
 		policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY_HWP;
 		rdmsrl_on_cpu(cpu->cpu, MSR_HWP_REQUEST, &value);
 		WRITE_ONCE(cpu->hwp_req_cached, value);
-		cpu->epp_cached = (value & GENMASK_ULL(31, 24)) >> 24;
+		cpu->epp_cached = intel_pstate_get_epp(cpu, value);
 	} else {
 		turbo_max = cpu->pstate.turbo_pstate;
 		policy->transition_delay_us = INTEL_CPUFREQ_TRANSITION_DELAY;
 	.fast_switch	= intel_cpufreq_fast_switch,
 	.init		= intel_cpufreq_cpu_init,
 	.exit		= intel_cpufreq_cpu_exit,
-	.stop_cpu	= intel_cpufreq_stop_cpu,
+	.offline	= intel_pstate_cpu_offline,
+	.online		= intel_pstate_cpu_online,
+	.suspend	= intel_pstate_suspend,
+	.resume		= intel_pstate_resume,
 	.update_limits	= intel_pstate_update_limits,
 	.name		= "intel_cpufreq",
 };
 	}
 	put_online_cpus();
-	if (intel_pstate_driver == &intel_pstate)
-		intel_pstate_sysfs_hide_hwp_dynamic_boost();
 	intel_pstate_driver = NULL;
 }
 	return 0;
 }
-static int intel_pstate_unregister_driver(void)
-{
-	cpufreq_unregister_driver(intel_pstate_driver);
-	intel_pstate_driver_cleanup();
-	return 0;
-}
 static ssize_t intel_pstate_show_status(char *buf)
 {
 	if (!intel_pstate_driver)
 static int intel_pstate_update_status(const char *buf, size_t size)
 {
-	int ret;
+	if (size == 3 && !strncmp(buf, "off", size)) {
+		if (!intel_pstate_driver)
+			return -EINVAL;
+		if (hwp_active)
+			return -EBUSY;
-	if (size == 3 && !strncmp(buf, "off", size))
+		cpufreq_unregister_driver(intel_pstate_driver);
-		return intel_pstate_driver ?
+		intel_pstate_driver_cleanup();
-			intel_pstate_unregister_driver() : -EINVAL;
+	}
 	if (size == 6 && !strncmp(buf, "active", size)) {
 		if (intel_pstate_driver) {
 			if (intel_pstate_driver == &intel_pstate)
 				return 0;
-			ret = intel_pstate_unregister_driver();
+			cpufreq_unregister_driver(intel_pstate_driver);
-			if (ret)
-				return ret;
 		}
 		return intel_pstate_register_driver(&intel_pstate);
 			if (intel_pstate_driver == &intel_cpufreq)
 				return 0;
-			ret = intel_pstate_unregister_driver();
+			cpufreq_unregister_driver(intel_pstate_driver);
-			if (ret)
+			intel_pstate_sysfs_hide_hwp_dynamic_boost();
-				return ret;
 		}
 		return intel_pstate_register_driver(&intel_cpufreq);

drivers/cpufreq/p4-clockmod.c+1−1

@@ -129,7 +129,7 @@ static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c) · 128 unmodified lines
129	return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);	129	return speedstep_get_frequency(SPEEDSTEP_CPU_PCORE);
130	case 0x0D: /* Pentium M (Dothan) */	130	case 0x0D: /* Pentium M (Dothan) */
131	p4clockmod_driver.flags \|= CPUFREQ_CONST_LOOPS;	131	p4clockmod_driver.flags \|= CPUFREQ_CONST_LOOPS;
132	/* fall through */	132	fallthrough;
133	case 0x09: /* Pentium M (Banias) */	133	case 0x09: /* Pentium M (Banias) */
134	return speedstep_get_frequency(SPEEDSTEP_CPU_PM);	134	return speedstep_get_frequency(SPEEDSTEP_CPU_PM);
135	}	135	}

drivers/cpufreq/speedstep-lib.c+1−1

@@ -366,7 +366,7 @@ enum speedstep_processor speedstep_detect_processor(void) · 365 unmodified lines
366	} else	366	} else
367	return SPEEDSTEP_CPU_PIII_C;	367	return SPEEDSTEP_CPU_PIII_C;
368	}	368	}
369	/* fall through */	369	fallthrough;
370	default:	370	default:
371	return 0;	371	return 0;
372	}	372	}

drivers/cpufreq/tegra194-cpufreq.c+7−3

 static struct workqueue_struct *read_counters_wq;
-static enum cluster get_cpu_cluster(u8 cpu)
+static void get_cpu_cluster(void *cluster)
 {
-	return MPIDR_AFFINITY_LEVEL(cpu_logical_map(cpu), 1);
+	u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
+	*((uint32_t *)cluster) = MPIDR_AFFINITY_LEVEL(mpidr, 1);
 }
 /*
 static int tegra194_cpufreq_init(struct cpufreq_policy *policy)
 {
 	struct tegra194_cpufreq_data *data = cpufreq_get_driver_data();
-	int cl = get_cpu_cluster(policy->cpu);
 	u32 cpu;
+	u32 cl;
+	smp_call_function_single(policy->cpu, get_cpu_cluster, &cl, true);
 	if (cl >= data->num_clusters)
 		return -EINVAL;

drivers/cpufreq/ti-cpufreq.c+2−2

@@ -86,11 +86,11 @@ static unsigned long dra7_efuse_xlate(struct ti_cpufreq_data *opp_data, · 85 unmodified lines
86	case DRA76_EFUSE_HAS_PLUS_MPU_OPP:	86	case DRA76_EFUSE_HAS_PLUS_MPU_OPP:
87	case DRA76_EFUSE_HAS_ALL_MPU_OPP:	87	case DRA76_EFUSE_HAS_ALL_MPU_OPP:
88	calculated_efuse \|= DRA76_EFUSE_PLUS_MPU_OPP;	88	calculated_efuse \|= DRA76_EFUSE_PLUS_MPU_OPP;
89	/* Fall through */	89	fallthrough;
90	case DRA7_EFUSE_HAS_ALL_MPU_OPP:	90	case DRA7_EFUSE_HAS_ALL_MPU_OPP:
91	case DRA7_EFUSE_HAS_HIGH_MPU_OPP:	91	case DRA7_EFUSE_HAS_HIGH_MPU_OPP:
92	calculated_efuse \|= DRA7_EFUSE_HIGH_MPU_OPP;	92	calculated_efuse \|= DRA7_EFUSE_HIGH_MPU_OPP;
93	/* Fall through */	93	fallthrough;
94	case DRA7_EFUSE_HAS_OD_MPU_OPP:	94	case DRA7_EFUSE_HAS_OD_MPU_OPP:
95	calculated_efuse \|= DRA7_EFUSE_OD_MPU_OPP;	95	calculated_efuse \|= DRA7_EFUSE_OD_MPU_OPP;
96	}	96	}

drivers/cpuidle/cpuidle.c+14−5

 #include <linux/module.h>
 #include <linux/suspend.h>
 #include <linux/tick.h>
+#include <linux/mmu_context.h>
 #include <trace/events/power.h>
 #include "cpuidle.h"
 	 * executing it contains RCU usage regarded as invalid in the idle
 	 * context, so tell RCU about that.
 	 */
-	RCU_NONIDLE(tick_freeze());
+	tick_freeze();
 	/*
 	 * The state used here cannot be a "coupled" one, because the "coupled"
 	 * cpuidle mechanism enables interrupts and doing that with timekeeping
 	 * suspended is generally unsafe.
 	 */
 	stop_critical_timings();
+	rcu_idle_enter();
 	drv->states[index].enter_s2idle(dev, drv, index);
-	WARN_ON(!irqs_disabled());
+	if (WARN_ON_ONCE(!irqs_disabled()))
+		local_irq_disable();
 	/*
 	 * timekeeping_resume() that will be called by tick_unfreeze() for the
 	 * first CPU executing it calls functions containing RCU read-side
 	 * critical sections, so tell RCU about that.
 	 */
-	RCU_NONIDLE(tick_unfreeze());
+	rcu_idle_exit();
+	tick_unfreeze();
 	start_critical_timings();
 	time_end = ns_to_ktime(local_clock());
 		broadcast = false;
 	}
+	if (target_state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
+		leave_mm(dev->cpu);
 	/* Take note of the planned idle state. */
 	sched_idle_set_state(target_state);
-	trace_cpu_idle_rcuidle(index, dev->cpu);
+	trace_cpu_idle(index, dev->cpu);
 	time_start = ns_to_ktime(local_clock());
 	stop_critical_timings();
+	rcu_idle_enter();
 	entered_state = target_state->enter(dev, drv, index);
+	rcu_idle_exit();
 	start_critical_timings();
 	sched_clock_idle_wakeup_event();
 	time_end = ns_to_ktime(local_clock());
-	trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, dev->cpu);
+	trace_cpu_idle(PWR_EVENT_EXIT, dev->cpu);
 	/* The cpu is no longer idle or about to enter idle. */
 	sched_idle_set_state(NULL);

drivers/crypto/Kconfig+3−0

 	select CRYPTO_AES
 	select CRYPTO_AES_ARM64
 	select CRYPTO_ALGAPI
+	select CRYPTO_SHA1
+	select CRYPTO_SHA256
+	select CRYPTO_SHA512
 	select HW_RANDOM
 	select SG_SPLIT
 	help

drivers/crypto/axis/artpec6_crypto.c+1−1

@@ -2310,7 +2310,7 @@ static int artpec6_crypto_prepare_submit_hash(struct ahash_request *req) · 2309 unmodified lines
2310		2310
2311	case ARTPEC6_CRYPTO_PREPARE_HASH_NO_START:	2311	case ARTPEC6_CRYPTO_PREPARE_HASH_NO_START:
2312	ret = 0;	2312	ret = 0;
2313	/* Fallthrough */	2313	fallthrough;
2314		2314
2315	default:	2315	default:
2316	artpec6_crypto_common_destroy(&req_ctx->common);	2316	artpec6_crypto_common_destroy(&req_ctx->common);

drivers/crypto/cavium/cpt/cptvf_reqmanager.c+2−2

@@ -90,11 +90,11 @@ static int setup_sgio_components(struct cpt_vf cptvf, struct buf_ptr list, · 89 unmodified lines
90	case 3:	90	case 3:
91	sg_ptr->u.s.len2 = cpu_to_be16(list[i * 4 + 2].size);	91	sg_ptr->u.s.len2 = cpu_to_be16(list[i * 4 + 2].size);
92	sg_ptr->ptr2 = cpu_to_be64(list[i * 4 + 2].dma_addr);	92	sg_ptr->ptr2 = cpu_to_be64(list[i * 4 + 2].dma_addr);
93	/* Fall through */	93	fallthrough;
94	case 2:	94	case 2:
95	sg_ptr->u.s.len1 = cpu_to_be16(list[i * 4 + 1].size);	95	sg_ptr->u.s.len1 = cpu_to_be16(list[i * 4 + 1].size);
96	sg_ptr->ptr1 = cpu_to_be64(list[i * 4 + 1].dma_addr);	96	sg_ptr->ptr1 = cpu_to_be64(list[i * 4 + 1].dma_addr);
97	/* Fall through */	97	fallthrough;
98	case 1:	98	case 1:
99	sg_ptr->u.s.len0 = cpu_to_be16(list[i * 4 + 0].size);	99	sg_ptr->u.s.len0 = cpu_to_be16(list[i * 4 + 0].size);
100	sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr);	100	sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr);

drivers/crypto/chelsio/chcr_ktls.c+2−2

@@ -135,7 +135,7 @@ static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, · 134 unmodified lines
135	break;	135	break;
136	/* update to the next state and also initialize TCB */	136	/* update to the next state and also initialize TCB */
137	tx_info->connection_state = new_state;	137	tx_info->connection_state = new_state;
138	/* FALLTHRU */	138	fallthrough;
139	case KTLS_CONN_ACT_OPEN_RPL:	139	case KTLS_CONN_ACT_OPEN_RPL:
140	/* if we are stuck in this state, means tcb init might not	140	/* if we are stuck in this state, means tcb init might not
141	* received by HW, try sending it again.	141	* received by HW, try sending it again.
@@ -150,7 +150,7 @@ static int chcr_ktls_update_connection_state(struct chcr_ktls_info *tx_info, · 8 unmodified lines
150	break;	150	break;
151	/* update to the next state and check if l2t_state is valid */	151	/* update to the next state and check if l2t_state is valid */
152	tx_info->connection_state = new_state;	152	tx_info->connection_state = new_state;
153	/* FALLTHRU */	153	fallthrough;
154	case KTLS_CONN_SET_TCB_RPL:	154	case KTLS_CONN_SET_TCB_RPL:
155	/* Check if l2t state is valid, then move to ready state. */	155	/* Check if l2t state is valid, then move to ready state. */
156	if (cxgb4_check_l2t_valid(tx_info->l2te)) {	156	if (cxgb4_check_l2t_valid(tx_info->l2te)) {

drivers/crypto/marvell/octeontx/otx_cptvf_reqmgr.c+2−2

@@ -140,11 +140,11 @@ static inline int setup_sgio_components(struct pci_dev *pdev, · 139 unmodified lines
140	case 3:	140	case 3:
141	sg_ptr->u.s.len2 = cpu_to_be16(list[i * 4 + 2].size);	141	sg_ptr->u.s.len2 = cpu_to_be16(list[i * 4 + 2].size);
142	sg_ptr->ptr2 = cpu_to_be64(list[i * 4 + 2].dma_addr);	142	sg_ptr->ptr2 = cpu_to_be64(list[i * 4 + 2].dma_addr);
143	/* Fall through */	143	fallthrough;
144	case 2:	144	case 2:
145	sg_ptr->u.s.len1 = cpu_to_be16(list[i * 4 + 1].size);	145	sg_ptr->u.s.len1 = cpu_to_be16(list[i * 4 + 1].size);
146	sg_ptr->ptr1 = cpu_to_be64(list[i * 4 + 1].dma_addr);	146	sg_ptr->ptr1 = cpu_to_be64(list[i * 4 + 1].dma_addr);
147	/* Fall through */	147	fallthrough;
148	case 1:	148	case 1:
149	sg_ptr->u.s.len0 = cpu_to_be16(list[i * 4 + 0].size);	149	sg_ptr->u.s.len0 = cpu_to_be16(list[i * 4 + 0].size);
150	sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr);	150	sg_ptr->ptr0 = cpu_to_be64(list[i * 4 + 0].dma_addr);

drivers/crypto/qat/qat_common/adf_admin.c+4−3

 	memcpy(admin->virt_addr + offset, in, ADF_ADMINMSG_LEN);
 	ADF_CSR_WR(mailbox, mb_offset, 1);
-	ret = readl_poll_timeout(mailbox + mb_offset, status,
+	ret = read_poll_timeout(ADF_CSR_RD, status, status == 0,
-				 status == 0, ADF_ADMIN_POLL_DELAY_US,
+				ADF_ADMIN_POLL_DELAY_US,
-				 ADF_ADMIN_POLL_TIMEOUT_US);
+				ADF_ADMIN_POLL_TIMEOUT_US, true,
+				mailbox, mb_offset);
 	if (ret < 0) {
 		/* Response timeout */
 		dev_err(&GET_DEV(accel_dev),

drivers/crypto/qat/qat_common/adf_pf2vf_msg.c+1−1

@@ -340,7 +340,7 @@ static int adf_vf2pf_request_version(struct adf_accel_dev *accel_dev) · 339 unmodified lines
340	/* VF is newer than PF and decides whether it is compatible */	340	/* VF is newer than PF and decides whether it is compatible */
341	if (accel_dev->vf.pf_version >= hw_data->min_iov_compat_ver)	341	if (accel_dev->vf.pf_version >= hw_data->min_iov_compat_ver)
342	break;	342	break;
343	/* fall through */	343	fallthrough;
344	case ADF_PF2VF_VF_INCOMPATIBLE:	344	case ADF_PF2VF_VF_INCOMPATIBLE:
345	dev_err(&GET_DEV(accel_dev),	345	dev_err(&GET_DEV(accel_dev),
346	"PF (vers %d) and VF (vers %d) are not compatible\n",	346	"PF (vers %d) and VF (vers %d) are not compatible\n",

drivers/crypto/qat/qat_common/qat_uclo.c+3−3

@@ -752,7 +752,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, · 751 unmodified lines
752	case ICP_GPA_ABS:	752	case ICP_GPA_ABS:
753	case ICP_GPB_ABS:	753	case ICP_GPB_ABS:
754	ctx_mask = 0;	754	ctx_mask = 0;
755	/* fall through */	755	fallthrough;
756	case ICP_GPA_REL:	756	case ICP_GPA_REL:
757	case ICP_GPB_REL:	757	case ICP_GPB_REL:
758	return qat_hal_init_gpr(handle, ae, ctx_mask, reg_type,	758	return qat_hal_init_gpr(handle, ae, ctx_mask, reg_type,
@@ -762,7 +762,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, · 3 unmodified lines
762	case ICP_SR_RD_ABS:	762	case ICP_SR_RD_ABS:
763	case ICP_DR_RD_ABS:	763	case ICP_DR_RD_ABS:
764	ctx_mask = 0;	764	ctx_mask = 0;
765	/* fall through */	765	fallthrough;
766	case ICP_SR_REL:	766	case ICP_SR_REL:
767	case ICP_DR_REL:	767	case ICP_DR_REL:
768	case ICP_SR_RD_REL:	768	case ICP_SR_RD_REL:
@@ -772,7 +772,7 @@ static int qat_uclo_init_reg(struct icp_qat_fw_loader_handle *handle, · 3 unmodified lines
772	case ICP_SR_WR_ABS:	772	case ICP_SR_WR_ABS:
773	case ICP_DR_WR_ABS:	773	case ICP_DR_WR_ABS:
774	ctx_mask = 0;	774	ctx_mask = 0;
775	/* fall through */	775	fallthrough;
776	case ICP_SR_WR_REL:	776	case ICP_SR_WR_REL:
777	case ICP_DR_WR_REL:	777	case ICP_DR_WR_REL:
778	return qat_hal_init_wr_xfer(handle, ae, ctx_mask, reg_type,	778	return qat_hal_init_wr_xfer(handle, ae, ctx_mask, reg_type,

drivers/crypto/ux500/cryp/cryp.c+6−6

@@ -314,17 +314,17 @@ void cryp_save_device_context(struct cryp_device_data *device_data, · 313 unmodified lines
314	case CRYP_KEY_SIZE_256:	314	case CRYP_KEY_SIZE_256:
315	ctx->key_4_l = readl_relaxed(&src_reg->key_4_l);	315	ctx->key_4_l = readl_relaxed(&src_reg->key_4_l);
316	ctx->key_4_r = readl_relaxed(&src_reg->key_4_r);	316	ctx->key_4_r = readl_relaxed(&src_reg->key_4_r);
317	/* Fall through */	317	fallthrough;
318		318
319	case CRYP_KEY_SIZE_192:	319	case CRYP_KEY_SIZE_192:
320	ctx->key_3_l = readl_relaxed(&src_reg->key_3_l);	320	ctx->key_3_l = readl_relaxed(&src_reg->key_3_l);
321	ctx->key_3_r = readl_relaxed(&src_reg->key_3_r);	321	ctx->key_3_r = readl_relaxed(&src_reg->key_3_r);
322	/* Fall through */	322	fallthrough;
323		323
324	case CRYP_KEY_SIZE_128:	324	case CRYP_KEY_SIZE_128:
325	ctx->key_2_l = readl_relaxed(&src_reg->key_2_l);	325	ctx->key_2_l = readl_relaxed(&src_reg->key_2_l);
326	ctx->key_2_r = readl_relaxed(&src_reg->key_2_r);	326	ctx->key_2_r = readl_relaxed(&src_reg->key_2_r);
327	/* Fall through */	327	fallthrough;
328		328
329	default:	329	default:
330	ctx->key_1_l = readl_relaxed(&src_reg->key_1_l);	330	ctx->key_1_l = readl_relaxed(&src_reg->key_1_l);
@@ -364,17 +364,17 @@ void cryp_restore_device_context(struct cryp_device_data *device_data, · 33 unmodified lines
364	case CRYP_KEY_SIZE_256:	364	case CRYP_KEY_SIZE_256:
365	writel_relaxed(ctx->key_4_l, &reg->key_4_l);	365	writel_relaxed(ctx->key_4_l, &reg->key_4_l);
366	writel_relaxed(ctx->key_4_r, &reg->key_4_r);	366	writel_relaxed(ctx->key_4_r, &reg->key_4_r);
367	/* Fall through */	367	fallthrough;
368		368
369	case CRYP_KEY_SIZE_192:	369	case CRYP_KEY_SIZE_192:
370	writel_relaxed(ctx->key_3_l, &reg->key_3_l);	370	writel_relaxed(ctx->key_3_l, &reg->key_3_l);
371	writel_relaxed(ctx->key_3_r, &reg->key_3_r);	371	writel_relaxed(ctx->key_3_r, &reg->key_3_r);
372	/* Fall through */	372	fallthrough;
373		373
374	case CRYP_KEY_SIZE_128:	374	case CRYP_KEY_SIZE_128:
375	writel_relaxed(ctx->key_2_l, &reg->key_2_l);	375	writel_relaxed(ctx->key_2_l, &reg->key_2_l);
376	writel_relaxed(ctx->key_2_r, &reg->key_2_r);	376	writel_relaxed(ctx->key_2_r, &reg->key_2_r);
377	/* Fall through */	377	fallthrough;
378		378
379	default:	379	default:
380	writel_relaxed(ctx->key_1_l, &reg->key_1_l);	380	writel_relaxed(ctx->key_1_l, &reg->key_1_l);

drivers/dax/device.c+1−1

@@ -429,7 +429,7 @@ int dev_dax_probe(struct device *dev) · 428 unmodified lines
429	return -EBUSY;	429	return -EBUSY;
430	}	430	}
431		431
432	dev_dax->pgmap.type = MEMORY_DEVICE_DEVDAX;	432	dev_dax->pgmap.type = MEMORY_DEVICE_GENERIC;
433	addr = devm_memremap_pages(dev, &dev_dax->pgmap);	433	addr = devm_memremap_pages(dev, &dev_dax->pgmap);
434	if (IS_ERR(addr))	434	if (IS_ERR(addr))
435	return PTR_ERR(addr);	435	return PTR_ERR(addr);

drivers/dax/super.c+6−0

 		return false;
 	}
+	if (!dax_dev && !bdev_dax_supported(bdev, blocksize)) {
+		pr_debug("%s: error: dax unsupported by block device\n",
+				bdevname(bdev, buf));
+		return false;
+	}
 	id = dax_read_lock();
 	len = dax_direct_access(dax_dev, pgoff, 1, &kaddr, &pfn);
 	len2 = dax_direct_access(dax_dev, pgoff_end, 1, &end_kaddr, &end_pfn);

drivers/dma/acpi-dma.c+3−1

 		if (ret < 0) {
 			dev_warn(&adev->dev,
 				 "error in parsing resource group\n");
-			return;
+			break;
 		}
 		grp = (struct acpi_csrt_group *)((void *)grp + grp->length);
 	}
+	acpi_put_table((struct acpi_table_header *)csrt);
 }
 /**

drivers/dma/amba-pl08x.c+5−5

@@ -1767,7 +1767,7 @@ static u32 pl08x_memcpy_cctl(struct pl08x_driver_data *pl08x) · 1766 unmodified lines
1767	default:	1767	default:
1768	dev_err(&pl08x->adev->dev,	1768	dev_err(&pl08x->adev->dev,
1769	"illegal burst size for memcpy, set to 1\n");	1769	"illegal burst size for memcpy, set to 1\n");
1770	/* Fall through */	1770	fallthrough;
1771	case PL08X_BURST_SZ_1:	1771	case PL08X_BURST_SZ_1:
1772	cctl \|= PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT \|	1772	cctl \|= PL080_BSIZE_1 << PL080_CONTROL_SB_SIZE_SHIFT \|
1773	PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT;	1773	PL080_BSIZE_1 << PL080_CONTROL_DB_SIZE_SHIFT;
@@ -1806,7 +1806,7 @@ static u32 pl08x_memcpy_cctl(struct pl08x_driver_data *pl08x) · 32 unmodified lines
1806	default:	1806	default:
1807	dev_err(&pl08x->adev->dev,	1807	dev_err(&pl08x->adev->dev,
1808	"illegal bus width for memcpy, set to 8 bits\n");	1808	"illegal bus width for memcpy, set to 8 bits\n");
1809	/* Fall through */	1809	fallthrough;
1810	case PL08X_BUS_WIDTH_8_BITS:	1810	case PL08X_BUS_WIDTH_8_BITS:
1811	cctl \|= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT \|	1811	cctl \|= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT \|
1812	PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT;	1812	PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT;
@@ -1850,7 +1850,7 @@ static u32 pl08x_ftdmac020_memcpy_cctl(struct pl08x_driver_data *pl08x) · 37 unmodified lines
1850	default:	1850	default:
1851	dev_err(&pl08x->adev->dev,	1851	dev_err(&pl08x->adev->dev,
1852	"illegal bus width for memcpy, set to 8 bits\n");	1852	"illegal bus width for memcpy, set to 8 bits\n");
1853	/* Fall through */	1853	fallthrough;
1854	case PL08X_BUS_WIDTH_8_BITS:	1854	case PL08X_BUS_WIDTH_8_BITS:
1855	cctl \|= PL080_WIDTH_8BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT \|	1855	cctl \|= PL080_WIDTH_8BIT << FTDMAC020_LLI_SRC_WIDTH_SHIFT \|
1856	PL080_WIDTH_8BIT << FTDMAC020_LLI_DST_WIDTH_SHIFT;	1856	PL080_WIDTH_8BIT << FTDMAC020_LLI_DST_WIDTH_SHIFT;
@@ -2612,7 +2612,7 @@ static int pl08x_of_probe(struct amba_device *adev, · 755 unmodified lines
2612	switch (val) {	2612	switch (val) {
2613	default:	2613	default:
2614	dev_err(&adev->dev, "illegal burst size for memcpy, set to 1\n");	2614	dev_err(&adev->dev, "illegal burst size for memcpy, set to 1\n");
2615	/* Fall through */	2615	fallthrough;
2616	case 1:	2616	case 1:
2617	pd->memcpy_burst_size = PL08X_BURST_SZ_1;	2617	pd->memcpy_burst_size = PL08X_BURST_SZ_1;
2618	break;	2618	break;
@@ -2647,7 +2647,7 @@ static int pl08x_of_probe(struct amba_device *adev, · 28 unmodified lines
2647	switch (val) {	2647	switch (val) {
2648	default:	2648	default:
2649	dev_err(&adev->dev, "illegal bus width for memcpy, set to 8 bits\n");	2649	dev_err(&adev->dev, "illegal bus width for memcpy, set to 8 bits\n");
2650	/* Fall through */	2650	fallthrough;
2651	case 8:	2651	case 8:
2652	pd->memcpy_bus_width = PL08X_BUS_WIDTH_8_BITS;	2652	pd->memcpy_bus_width = PL08X_BUS_WIDTH_8_BITS;
2653	break;	2653	break;

drivers/dma/at_hdmac.c+9−2

 		return NULL;
 	dmac_pdev = of_find_device_by_node(dma_spec->np);
+	if (!dmac_pdev)
+		return NULL;
 	dma_cap_zero(mask);
 	dma_cap_set(DMA_SLAVE, mask);
 	atslave = kmalloc(sizeof(*atslave), GFP_KERNEL);
-	if (!atslave)
+	if (!atslave) {
+		put_device(&dmac_pdev->dev);
 		return NULL;
+	}
 	atslave->cfg = ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW;
 	/*
 	atslave->dma_dev = &dmac_pdev->dev;
 	chan = dma_request_channel(mask, at_dma_filter, atslave);
-	if (!chan)
+	if (!chan) {
+		put_device(&dmac_pdev->dev);
+		kfree(atslave);
 		return NULL;
+	}
 	atchan = to_at_dma_chan(chan);
 	atchan->per_if = dma_spec->args[0] & 0xff;

drivers/dma/dma-jz4780.c+19−19

 		return -EINVAL;
 	}
-	ret = platform_get_irq(pdev, 0);
-	if (ret < 0)
-		return ret;
-	jzdma->irq = ret;
-	ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
-			  jzdma);
-	if (ret) {
-		dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
-		return ret;
-	}
 	jzdma->clk = devm_clk_get(dev, NULL);
 	if (IS_ERR(jzdma->clk)) {
 		dev_err(dev, "failed to get clock\n");
 		ret = PTR_ERR(jzdma->clk);
-		goto err_free_irq;
+		return ret;
 	}
 	clk_prepare_enable(jzdma->clk);
 		jzchan->vchan.desc_free = jz4780_dma_desc_free;
 	}
+	ret = platform_get_irq(pdev, 0);
+	if (ret < 0)
+		goto err_disable_clk;
+	jzdma->irq = ret;
+	ret = request_irq(jzdma->irq, jz4780_dma_irq_handler, 0, dev_name(dev),
+			  jzdma);
+	if (ret) {
+		dev_err(dev, "failed to request IRQ %u!\n", jzdma->irq);
+		goto err_disable_clk;
+	}
 	ret = dmaenginem_async_device_register(dd);
 	if (ret) {
 		dev_err(dev, "failed to register device\n");
-		goto err_disable_clk;
+		goto err_free_irq;
 	}
 	/* Register with OF DMA helpers. */
 					 jzdma);
 	if (ret) {
 		dev_err(dev, "failed to register OF DMA controller\n");
-		goto err_disable_clk;
+		goto err_free_irq;
 	}
 	dev_info(dev, "JZ4780 DMA controller initialised\n");
 	return 0;
-err_disable_clk:
-	clk_disable_unprepare(jzdma->clk);
 err_free_irq:
 	free_irq(jzdma->irq, jzdma);
+err_disable_clk:
+	clk_disable_unprepare(jzdma->clk);
 	return ret;
 }

drivers/dma/dw-edma/dw-edma-core.c+6−5

 			if (xfer->cyclic) {
 				burst->dar = xfer->xfer.cyclic.paddr;
 			} else {
-				burst->dar = sg_dma_address(sg);
+				burst->dar = dst_addr;
 				/* Unlike the typical assumption by other
 				 * drivers/IPs the peripheral memory isn't
 				 * a FIFO memory, in this case, it's a
 				 * and destination addresses are increased
 				 * by the same portion (data length)
 				 */
-				src_addr += sg_dma_len(sg);
 			}
 		} else {
 			burst->dar = dst_addr;
 			if (xfer->cyclic) {
 				burst->sar = xfer->xfer.cyclic.paddr;
 			} else {
-				burst->sar = sg_dma_address(sg);
+				burst->sar = src_addr;
 				/* Unlike the typical assumption by other
 				 * drivers/IPs the peripheral memory isn't
 				 * a FIFO memory, in this case, it's a
 				 * and destination addresses are increased
 				 * by the same portion (data length)
 				 */
-				dst_addr += sg_dma_len(sg);
 			}
 		}
-		if (!xfer->cyclic)
+		if (!xfer->cyclic) {
+			src_addr += sg_dma_len(sg);
+			dst_addr += sg_dma_len(sg);
 			sg = sg_next(sg);
+		}
 	}
 	return vchan_tx_prep(&chan->vc, &desc->vd, xfer->flags);

drivers/dma/fsldma.c+1−1

@@ -1163,7 +1163,7 @@ static int fsl_dma_chan_probe(struct fsldma_device *fdev, · 1162 unmodified lines
1163	switch (chan->feature & FSL_DMA_IP_MASK) {	1163	switch (chan->feature & FSL_DMA_IP_MASK) {
1164	case FSL_DMA_IP_85XX:	1164	case FSL_DMA_IP_85XX:
1165	chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;	1165	chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
1166	/* Fall through */	1166	fallthrough;
1167	case FSL_DMA_IP_83XX:	1167	case FSL_DMA_IP_83XX:
1168	chan->toggle_ext_start = fsl_chan_toggle_ext_start;	1168	chan->toggle_ext_start = fsl_chan_toggle_ext_start;
1169	chan->set_src_loop_size = fsl_chan_set_src_loop_size;	1169	chan->set_src_loop_size = fsl_chan_set_src_loop_size;

drivers/dma/fsldma.h+6−6

@@ -205,10 +205,10 @@ struct fsldma_chan { · 204 unmodified lines
205	#else	205	#else
206	static u64 fsl_ioread64(const u64 __iomem *addr)	206	static u64 fsl_ioread64(const u64 __iomem *addr)
207	{	207	{
208	u32 fsl_addr = lower_32_bits(addr);	208	u32 val_lo = in_le32((u32 __iomem *)addr);
209	u64 fsl_addr_hi = (u64)in_le32((u32 *)(fsl_addr + 1)) << 32;	209	u32 val_hi = in_le32((u32 __iomem *)addr + 1);
210		210
211	return fsl_addr_hi \| in_le32((u32 *)fsl_addr);	211	return ((u64)val_hi << 32) + val_lo;
212	}	212	}
213		213
214	static void fsl_iowrite64(u64 val, u64 __iomem *addr)	214	static void fsl_iowrite64(u64 val, u64 __iomem *addr)
@@ -219,10 +219,10 @@ static void fsl_iowrite64(u64 val, u64 __iomem *addr) · 4 unmodified lines
219		219
220	static u64 fsl_ioread64be(const u64 __iomem *addr)	220	static u64 fsl_ioread64be(const u64 __iomem *addr)
221	{	221	{
222	u32 fsl_addr = lower_32_bits(addr);	222	u32 val_hi = in_be32((u32 __iomem *)addr);
223	u64 fsl_addr_hi = (u64)in_be32((u32 *)fsl_addr) << 32;	223	u32 val_lo = in_be32((u32 __iomem *)addr + 1);
224		224
225	return fsl_addr_hi \| in_be32((u32 *)(fsl_addr + 1));	225	return ((u64)val_hi << 32) + val_lo;
226	}	226	}
227		227
228	static void fsl_iowrite64be(u64 val, u64 __iomem *addr)	228	static void fsl_iowrite64be(u64 val, u64 __iomem *addr)

drivers/dma/idxd/device.c+26−0

@@ -410,10 +410,27 @@ int idxd_device_enable(struct idxd_device *idxd) · 409 unmodified lines
410	return 0;	410	return 0;
411	}	411	}
412		412
		413	void idxd_device_wqs_clear_state(struct idxd_device *idxd)
		414	{
		415	int i;
		416
		417	lockdep_assert_held(&idxd->dev_lock);
		418
		419	for (i = 0; i < idxd->max_wqs; i++) {
		420	struct idxd_wq *wq = &idxd->wqs[i];
		421
		422	if (wq->state == IDXD_WQ_ENABLED) {
		423	idxd_wq_disable_cleanup(wq);
		424	wq->state = IDXD_WQ_DISABLED;
		425	}
		426	}
		427	}
		428
413	int idxd_device_disable(struct idxd_device *idxd)	429	int idxd_device_disable(struct idxd_device *idxd)
414	{	430	{
415	struct device *dev = &idxd->pdev->dev;	431	struct device *dev = &idxd->pdev->dev;
416	u32 status;	432	u32 status;
		433	unsigned long flags;
417		434
418	if (!idxd_is_enabled(idxd)) {	435	if (!idxd_is_enabled(idxd)) {
419	dev_dbg(dev, "Device is not enabled\n");	436	dev_dbg(dev, "Device is not enabled\n");
@@ -429,13 +446,22 @@ int idxd_device_disable(struct idxd_device *idxd) · 9 unmodified lines
429	return -ENXIO;	446	return -ENXIO;
430	}	447	}
431		448
		449	spin_lock_irqsave(&idxd->dev_lock, flags);
		450	idxd_device_wqs_clear_state(idxd);
432	idxd->state = IDXD_DEV_CONF_READY;	451	idxd->state = IDXD_DEV_CONF_READY;
		452	spin_unlock_irqrestore(&idxd->dev_lock, flags);
433	return 0;	453	return 0;
434	}	454	}
435		455
436	void idxd_device_reset(struct idxd_device *idxd)	456	void idxd_device_reset(struct idxd_device *idxd)
437	{	457	{
		458	unsigned long flags;
		459
438	idxd_cmd_exec(idxd, IDXD_CMD_RESET_DEVICE, 0, NULL);	460	idxd_cmd_exec(idxd, IDXD_CMD_RESET_DEVICE, 0, NULL);
		461	spin_lock_irqsave(&idxd->dev_lock, flags);
		462	idxd_device_wqs_clear_state(idxd);
		463	idxd->state = IDXD_DEV_CONF_READY;
		464	spin_unlock_irqrestore(&idxd->dev_lock, flags);
439	}	465	}
440		466
441	/* Device configuration bits */	467	/* Device configuration bits */

drivers/dma/idxd/irq.c+0−12

@@ -11,18 +11,6 @@ · 10 unmodified lines
11	#include "idxd.h"	11	#include "idxd.h"
12	#include "registers.h"	12	#include "registers.h"
13		13
14	void idxd_device_wqs_clear_state(struct idxd_device *idxd)
15	{
16	int i;
17
18	lockdep_assert_held(&idxd->dev_lock);
19	for (i = 0; i < idxd->max_wqs; i++) {
20	struct idxd_wq *wq = &idxd->wqs[i];
21
22	wq->state = IDXD_WQ_DISABLED;
23	}
24	}
25
26	static void idxd_device_reinit(struct work_struct *work)	14	static void idxd_device_reinit(struct work_struct *work)
27	{	15	{
28	struct idxd_device *idxd = container_of(work, struct idxd_device, work);	16	struct idxd_device *idxd = container_of(work, struct idxd_device, work);

drivers/dma/imx-dma.c+1−1

@@ -556,7 +556,7 @@ static int imxdma_xfer_desc(struct imxdma_desc *d) · 555 unmodified lines
556	* We fall-through here intentionally, since a 2D transfer is	556	* We fall-through here intentionally, since a 2D transfer is
557	* similar to MEMCPY just adding the 2D slot configuration.	557	* similar to MEMCPY just adding the 2D slot configuration.
558	*/	558	*/
559	/* Fall through */	559	fallthrough;
560	case IMXDMA_DESC_MEMCPY:	560	case IMXDMA_DESC_MEMCPY:
561	imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));	561	imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));
562	imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));	562	imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));

drivers/dma/iop-adma.h+6−6

@@ -496,7 +496,7 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, · 495 unmodified lines
496	}	496	}
497	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = edcr;	497	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = edcr;
498	src_cnt = 24;	498	src_cnt = 24;
499	/* fall through */	499	fallthrough;
500	case 17 ... 24:	500	case 17 ... 24:
501	if (!u_desc_ctrl.field.blk_ctrl) {	501	if (!u_desc_ctrl.field.blk_ctrl) {
502	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;	502	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
@@ -510,7 +510,7 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, · 7 unmodified lines
510	}	510	}
511	hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = edcr;	511	hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = edcr;
512	src_cnt = 16;	512	src_cnt = 16;
513	/* fall through */	513	fallthrough;
514	case 9 ... 16:	514	case 9 ... 16:
515	if (!u_desc_ctrl.field.blk_ctrl)	515	if (!u_desc_ctrl.field.blk_ctrl)
516	u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */	516	u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */
@@ -522,7 +522,7 @@ iop3xx_desc_init_xor(struct iop3xx_desc_aau *hw_desc, int src_cnt, · 5 unmodified lines
522	}	522	}
523	hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = edcr;	523	hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = edcr;
524	src_cnt = 8;	524	src_cnt = 8;
525	/* fall through */	525	fallthrough;
526	case 2 ... 8:	526	case 2 ... 8:
527	shift = 1;	527	shift = 1;
528	for (i = 0; i < src_cnt; i++) {	528	for (i = 0; i < src_cnt; i++) {
@@ -602,19 +602,19 @@ iop_desc_init_null_xor(struct iop_adma_desc_slot *desc, int src_cnt, · 73 unmodified lines
602	case 25 ... 32:	602	case 25 ... 32:
603	u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */	603	u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
604	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;	604	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
605	/* fall through */	605	fallthrough;
606	case 17 ... 24:	606	case 17 ... 24:
607	if (!u_desc_ctrl.field.blk_ctrl) {	607	if (!u_desc_ctrl.field.blk_ctrl) {
608	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;	608	hw_desc->src_edc[AAU_EDCR2_IDX].e_desc_ctrl = 0;
609	u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */	609	u_desc_ctrl.field.blk_ctrl = 0x3; /* use EDCR[2:0] */
610	}	610	}
611	hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = 0;	611	hw_desc->src_edc[AAU_EDCR1_IDX].e_desc_ctrl = 0;
612	/* fall through */	612	fallthrough;
613	case 9 ... 16:	613	case 9 ... 16:
614	if (!u_desc_ctrl.field.blk_ctrl)	614	if (!u_desc_ctrl.field.blk_ctrl)
615	u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */	615	u_desc_ctrl.field.blk_ctrl = 0x2; /* use EDCR0 */
616	hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = 0;	616	hw_desc->src_edc[AAU_EDCR0_IDX].e_desc_ctrl = 0;
617	/* fall through */	617	fallthrough;
618	case 1 ... 8:	618	case 1 ... 8:
619	if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4)	619	if (!u_desc_ctrl.field.blk_ctrl && src_cnt > 4)
620	u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */	620	u_desc_ctrl.field.blk_ctrl = 0x1; /* use mini-desc */

drivers/dma/nbpfaxi.c+1−1

@@ -483,7 +483,7 @@ static size_t nbpf_xfer_size(struct nbpf_device *nbpf, · 482 unmodified lines
483		483
484	default:	484	default:
485	pr_warn("%s(): invalid bus width %u\n", __func__, width);	485	pr_warn("%s(): invalid bus width %u\n", __func__, width);
486	/* fall through */	486	fallthrough;
487	case DMA_SLAVE_BUSWIDTH_1_BYTE:	487	case DMA_SLAVE_BUSWIDTH_1_BYTE:
488	size = burst;	488	size = burst;
489	}	489	}

drivers/dma/of-dma.c+4−4

 		return NULL;
 	chan = ofdma_target->of_dma_xlate(&dma_spec_target, ofdma_target);
-	if (chan) {
+	if (IS_ERR_OR_NULL(chan)) {
-		chan->router = ofdma->dma_router;
-		chan->route_data = route_data;
-	} else {
 		ofdma->dma_router->route_free(ofdma->dma_router->dev,
 					      route_data);
+	} else {
+		chan->router = ofdma->dma_router;
+		chan->route_data = route_data;
 	}
 	/*

drivers/dma/pl330.c+4−8

 		if (_state(thrd) == PL330_STATE_KILLING)
 			UNTIL(thrd, PL330_STATE_STOPPED)
-		/* fall through */
+		fallthrough;
 	case PL330_STATE_FAULTING:
 		_stop(thrd);
-		/* fall through */
+		fallthrough;
 	case PL330_STATE_KILLING:
 	case PL330_STATE_COMPLETING:
 		UNTIL(thrd, PL330_STATE_STOPPED)
-		/* fall through */
+		fallthrough;
 	case PL330_STATE_STOPPED:
 		return _trigger(thrd);
 	switch (direction) {
 	case DMA_MEM_TO_MEM:
-		/* fall through */
 	case DMA_MEM_TO_DEV:
 		off += _emit_LD(dry_run, &buf[off], cond);
 		break;
 	switch (direction) {
 	case DMA_MEM_TO_MEM:
-		/* fall through */
 	case DMA_DEV_TO_MEM:
 		off += _emit_ST(dry_run, &buf[off], cond);
 		break;
 	switch (pxs->desc->rqtype) {
 	case DMA_MEM_TO_DEV:
-		/* fall through */
 	case DMA_DEV_TO_MEM:
 		off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, cyc,
 			cond);
 	switch (pxs->desc->rqtype) {
 	case DMA_MEM_TO_DEV:
-		/* fall through */
 	case DMA_DEV_TO_MEM:
 		off += _emit_MOV(dry_run, &buf[off], CCR, dregs_ccr);
 		off += _ldst_peripheral(pl330, dry_run, &buf[off], pxs, 1,
 	while (burst != (1 << desc->rqcfg.brst_size))
 		desc->rqcfg.brst_size++;
+	desc->rqcfg.brst_len = get_burst_len(desc, len);
 	/*
 	 * If burst size is smaller than bus width then make sure we only
 	 * transfer one at a time to avoid a burst stradling an MFIFO entry.
 	if (desc->rqcfg.brst_size * 8 < pl330->pcfg.data_bus_width)
 		desc->rqcfg.brst_len = 1;
-	desc->rqcfg.brst_len = get_burst_len(desc, len);
 	desc->bytes_requested = len;
 	desc->txd.flags = flags;

drivers/dma/sh/shdma-base.c+1−1

@@ -383,7 +383,7 @@ static dma_async_tx_callback __ld_cleanup(struct shdma_chan *schan, bool all) · 382 unmodified lines
383	switch (desc->mark) {	383	switch (desc->mark) {
384	case DESC_COMPLETED:	384	case DESC_COMPLETED:
385	desc->mark = DESC_WAITING;	385	desc->mark = DESC_WAITING;
386	/* Fall through */	386	fallthrough;
387	case DESC_WAITING:	387	case DESC_WAITING:
388	if (head_acked)	388	if (head_acked)
389	async_tx_ack(&desc->async_tx);	389	async_tx_ack(&desc->async_tx);

drivers/dma/ti/k3-udma.c+5−5

@@ -2059,9 +2059,9 @@ udma_prep_slave_sg_tr(struct udma_chan uc, struct scatterlist sgl, · 2058 unmodified lines
2059	return NULL;	2059	return NULL;
2060	}	2060	}
2061		2061
2062	cppi5_tr_init(&tr_req[i].flags, CPPI5_TR_TYPE1, false, false,	2062	cppi5_tr_init(&tr_req[tr_idx].flags, CPPI5_TR_TYPE1, false,
2063	CPPI5_TR_EVENT_SIZE_COMPLETION, 0);	2063	false, CPPI5_TR_EVENT_SIZE_COMPLETION, 0);
2064	cppi5_tr_csf_set(&tr_req[i].flags, CPPI5_TR_CSF_SUPR_EVT);	2064	cppi5_tr_csf_set(&tr_req[tr_idx].flags, CPPI5_TR_CSF_SUPR_EVT);
2065		2065
2066	tr_req[tr_idx].addr = sg_addr;	2066	tr_req[tr_idx].addr = sg_addr;
2067	tr_req[tr_idx].icnt0 = tr0_cnt0;	2067	tr_req[tr_idx].icnt0 = tr0_cnt0;
@@ -3101,14 +3101,14 @@ static struct udma_match_data am654_main_data = { · 1033 unmodified lines
3101	.psil_base = 0x1000,	3101	.psil_base = 0x1000,
3102	.enable_memcpy_support = true,	3102	.enable_memcpy_support = true,
3103	.statictr_z_mask = GENMASK(11, 0),	3103	.statictr_z_mask = GENMASK(11, 0),
3104	.rchan_oes_offset = 0x2000,	3104	.rchan_oes_offset = 0x200,
3105	};	3105	};
3106		3106
3107	static struct udma_match_data am654_mcu_data = {	3107	static struct udma_match_data am654_mcu_data = {
3108	.psil_base = 0x6000,	3108	.psil_base = 0x6000,
3109	.enable_memcpy_support = false,	3109	.enable_memcpy_support = false,
3110	.statictr_z_mask = GENMASK(11, 0),	3110	.statictr_z_mask = GENMASK(11, 0),
3111	.rchan_oes_offset = 0x2000,	3111	.rchan_oes_offset = 0x200,
3112	};	3112	};
3113		3113
3114	static struct udma_match_data j721e_main_data = {	3114	static struct udma_match_data j721e_main_data = {

drivers/edac/amd64_edac.c+1−1

@@ -3375,7 +3375,7 @@ static struct amd64_family_type per_family_init(struct amd64_pvt pvt) · 3374 unmodified lines
3375	pvt->ops = &family_types[F17_M70H_CPUS].ops;	3375	pvt->ops = &family_types[F17_M70H_CPUS].ops;
3376	break;	3376	break;
3377	}	3377	}
3378	/* fall through */	3378	fallthrough;
3379	case 0x18:	3379	case 0x18:
3380	fam_type = &family_types[F17_CPUS];	3380	fam_type = &family_types[F17_CPUS];
3381	pvt->ops = &family_types[F17_CPUS].ops;	3381	pvt->ops = &family_types[F17_CPUS].ops;

drivers/edac/ghes_edac.c+6−4

 static bool __read_mostly force_load;
 module_param(force_load, bool, 0);
+static bool system_scanned;
 /* Memory Device - Type 17 of SMBIOS spec */
 struct memdev_dmi_entry {
 	u8 type;
 static void ghes_scan_system(void)
 {
-	static bool scanned;
+	if (system_scanned)
-	if (scanned)
 		return;
 	dmi_walk(enumerate_dimms, &ghes_hw);
-	scanned = true;
+	system_scanned = true;
 }
 void ghes_edac_report_mem_error(int sev, struct cper_sec_mem_err *mem_err)
 	mutex_lock(&ghes_reg_mutex);
+	system_scanned = false;
 	if (!refcount_dec_and_test(&ghes_refcount))
 		goto unlock;

drivers/edac/pnd2_edac.c+1−1

@@ -198,7 +198,7 @@ static int apl_rd_reg(int port, int off, int op, void data, size_t sz, char na · 197 unmodified lines
198	switch (sz) {	198	switch (sz) {
199	case 8:	199	case 8:
200	ret = _apl_rd_reg(port, off + 4, op, (u32 *)(data + 4));	200	ret = _apl_rd_reg(port, off + 4, op, (u32 *)(data + 4));
201	/* fall through */	201	fallthrough;
202	case 4:	202	case 4:
203	ret \|= _apl_rd_reg(port, off, op, (u32 *)data);	203	ret \|= _apl_rd_reg(port, off, op, (u32 *)data);
204	pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name,	204	pnd2_printk(KERN_DEBUG, "%s=%x%08x ret=%d\n", name,

drivers/firewire/core-device.c+1−1

@@ -957,7 +957,7 @@ static void set_broadcast_channel(struct fw_device *device, int generation) · 956 unmodified lines
957	device->bc_implemented = BC_IMPLEMENTED;	957	device->bc_implemented = BC_IMPLEMENTED;
958	break;	958	break;
959	}	959	}
960	/* else, fall through - to case address error */	960	fallthrough; /* to case address error */
961	case RCODE_ADDRESS_ERROR:	961	case RCODE_ADDRESS_ERROR:
962	device->bc_implemented = BC_UNIMPLEMENTED;	962	device->bc_implemented = BC_UNIMPLEMENTED;
963	}	963	}

drivers/firewire/core-iso.c+1−1

@@ -277,7 +277,7 @@ static int manage_channel(struct fw_card *card, int irm_id, int generation, · 276 unmodified lines
277	if ((data[0] & bit) == (data[1] & bit))	277	if ((data[0] & bit) == (data[1] & bit))
278	continue;	278	continue;
279		279
280	/* fall through - It's a 1394-1995 IRM, retry. */	280	fallthrough; /* It's a 1394-1995 IRM, retry */
281	default:	281	default:
282	if (retry) {	282	if (retry) {
283	retry--;	283	retry--;

drivers/firewire/core-topology.c+1−1

@@ -54,7 +54,7 @@ static u32 count_ports(u32 sid, int total_port_count, int child_port_count) · 53 unmodified lines
54	switch (port_type) {	54	switch (port_type) {
55	case SELFID_PORT_CHILD:	55	case SELFID_PORT_CHILD:
56	(*child_port_count)++;	56	(*child_port_count)++;
57	/* fall through */	57	fallthrough;
58	case SELFID_PORT_PARENT:	58	case SELFID_PORT_PARENT:
59	case SELFID_PORT_NCONN:	59	case SELFID_PORT_NCONN:
60	(*total_port_count)++;	60	(*total_port_count)++;

drivers/firewire/core-transaction.c+2−2

@@ -1097,14 +1097,14 @@ static void handle_registers(struct fw_card card, struct fw_request request, · 1096 unmodified lines
1097	rcode = RCODE_ADDRESS_ERROR;	1097	rcode = RCODE_ADDRESS_ERROR;
1098	break;	1098	break;
1099	}	1099	}
1100	/* else fall through */	1100	fallthrough;
1101		1101
1102	case CSR_NODE_IDS:	1102	case CSR_NODE_IDS:
1103	/*	1103	/*
1104	* per IEEE 1394-2008 8.3.22.3, not IEEE 1394.1-2004 3.2.8	1104	* per IEEE 1394-2008 8.3.22.3, not IEEE 1394.1-2004 3.2.8
1105	* and 9.6, but interoperable with IEEE 1394.1-2004 bridges	1105	* and 9.6, but interoperable with IEEE 1394.1-2004 bridges
1106	*/	1106	*/
1107	/* fall through */	1107	fallthrough;
1108		1108
1109	case CSR_STATE_CLEAR:	1109	case CSR_STATE_CLEAR:
1110	case CSR_STATE_SET:	1110	case CSR_STATE_SET:

drivers/firewire/ohci.c+2−2

@@ -1495,7 +1495,7 @@ static int handle_at_packet(struct context *context, · 1494 unmodified lines
1495	packet->ack = RCODE_GENERATION;	1495	packet->ack = RCODE_GENERATION;
1496	break;	1496	break;
1497	}	1497	}
1498	/* fall through */	1498	fallthrough;
1499		1499
1500	default:	1500	default:
1501	packet->ack = RCODE_SEND_ERROR;	1501	packet->ack = RCODE_SEND_ERROR;
@@ -3054,7 +3054,7 @@ static int ohci_start_iso(struct fw_iso_context *base, · 1552 unmodified lines
3054		3054
3055	case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL:	3055	case FW_ISO_CONTEXT_RECEIVE_MULTICHANNEL:
3056	control \|= IR_CONTEXT_BUFFER_FILL\|IR_CONTEXT_MULTI_CHANNEL_MODE;	3056	control \|= IR_CONTEXT_BUFFER_FILL\|IR_CONTEXT_MULTI_CHANNEL_MODE;
3057	/* fall through */	3057	fallthrough;
3058	case FW_ISO_CONTEXT_RECEIVE:	3058	case FW_ISO_CONTEXT_RECEIVE:
3059	index = ctx - ohci->ir_context_list;	3059	index = ctx - ohci->ir_context_list;
3060	match = (tags << 28) \| (sync << 8) \| ctx->base.channel;	3060	match = (tags << 28) \| (sync << 8) \| ctx->base.channel;

drivers/firmware/ti_sci.c+68−87

 	spinlock_t xfer_lock;
 };
-/**
- * struct ti_sci_rm_type_map - Structure representing TISCI Resource
- *				management representation of dev_ids.
- * @dev_id:	TISCI device ID
- * @type:	Corresponding id as identified by TISCI RM.
- *
- * Note: This is used only as a work around for using RM range apis
- *	for AM654 SoC. For future SoCs dev_id will be used as type
- *	for RM range APIs. In order to maintain ABI backward compatibility
- *	type is not being changed for AM654 SoC.
- */
-struct ti_sci_rm_type_map {
-	u32 dev_id;
-	u16 type;
-};
 /**
  * struct ti_sci_desc - Description of SoC integration
  * @default_host_id:	Host identifier representing the compute entity
  * @max_msgs: Maximum number of messages that can be pending
  *		  simultaneously in the system
  * @max_msg_size: Maximum size of data per message that can be handled.
- * @rm_type_map: RM resource type mapping structure.
  */
 struct ti_sci_desc {
 	u8 default_host_id;
 	int max_rx_timeout_ms;
 	int max_msgs;
 	int max_msg_size;
-	struct ti_sci_rm_type_map *rm_type_map;
 };
 /**
 	return ret;
 }
-static int ti_sci_get_resource_type(struct ti_sci_info *info, u16 dev_id,
-				    u16 *type)
-{
-	struct ti_sci_rm_type_map *rm_type_map = info->desc->rm_type_map;
-	bool found = false;
-	int i;
-	/* If map is not provided then assume dev_id is used as type */
-	if (!rm_type_map) {
-		*type = dev_id;
-		return 0;
-	}
-	for (i = 0; rm_type_map[i].dev_id; i++) {
-		if (rm_type_map[i].dev_id == dev_id) {
-			*type = rm_type_map[i].type;
-			found = true;
-			break;
-		}
-	}
-	if (!found)
-		return -EINVAL;
-	return 0;
-}
 /**
  * ti_sci_get_resource_range - Helper to get a range of resources assigned
  *			       to a host. Resource is uniquely identified by
 	struct ti_sci_xfer *xfer;
 	struct ti_sci_info *info;
 	struct device *dev;
-	u16 type;
 	int ret = 0;
 	if (IS_ERR(handle))
 		return ret;
 	}
-	ret = ti_sci_get_resource_type(info, dev_id, &type);
-	if (ret) {
-		dev_err(dev, "rm type lookup failed for %u\n", dev_id);
-		goto fail;
-	}
 	req = (struct ti_sci_msg_req_get_resource_range *)xfer->xfer_buf;
 	req->secondary_host = s_host;
-	req->type = type & MSG_RM_RESOURCE_TYPE_MASK;
+	req->type = dev_id & MSG_RM_RESOURCE_TYPE_MASK;
 	req->subtype = subtype & MSG_RM_RESOURCE_SUBTYPE_MASK;
 	ret = ti_sci_do_xfer(info, xfer);
 EXPORT_SYMBOL_GPL(ti_sci_get_num_resources);
 /**
- * devm_ti_sci_get_of_resource() - Get a TISCI resource assigned to a device
+ * devm_ti_sci_get_resource_sets() - Get a TISCI resources assigned to a device
  * @handle:	TISCI handle
  * @dev:	Device pointer to which the resource is assigned
  * @dev_id:	TISCI device id to which the resource is assigned
- * @of_prop:	property name by which the resource are represented
+ * @sub_types:	Array of sub_types assigned corresponding to device
+ * @sets:	Number of sub_types
  *
  * Return: Pointer to ti_sci_resource if all went well else appropriate
  *	   error pointer.
  */
-struct ti_sci_resource *
+static struct ti_sci_resource *
-devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
+devm_ti_sci_get_resource_sets(const struct ti_sci_handle *handle,
-			    struct device *dev, u32 dev_id, char *of_prop)
+			      struct device *dev, u32 dev_id, u32 *sub_types,
+			      u32 sets)
 {
 	struct ti_sci_resource *res;
 	bool valid_set = false;
-	u32 resource_subtype;
 	int i, ret;
 	res = devm_kzalloc(dev, sizeof(*res), GFP_KERNEL);
 	if (!res)
 		return ERR_PTR(-ENOMEM);
-	ret = of_property_count_elems_of_size(dev_of_node(dev), of_prop,
+	res->sets = sets;
-					      sizeof(u32));
-	if (ret < 0) {
-		dev_err(dev, "%s resource type ids not available\n", of_prop);
-		return ERR_PTR(ret);
-	}
-	res->sets = ret;
 	res->desc = devm_kcalloc(dev, res->sets, sizeof(*res->desc),
 				 GFP_KERNEL);
 	if (!res->desc)
 		return ERR_PTR(-ENOMEM);
 	for (i = 0; i < res->sets; i++) {
-		ret = of_property_read_u32_index(dev_of_node(dev), of_prop, i,
-						 &resource_subtype);
-		if (ret)
-			return ERR_PTR(-EINVAL);
 		ret = handle->ops.rm_core_ops.get_range(handle, dev_id,
-							resource_subtype,
+							sub_types[i],
 							&res->desc[i].start,
 							&res->desc[i].num);
 		if (ret) {
 			dev_dbg(dev, "dev = %d subtype %d not allocated for this host\n",
-				dev_id, resource_subtype);
+				dev_id, sub_types[i]);
 			res->desc[i].start = 0;
 			res->desc[i].num = 0;
 			continue;
 		}
 		dev_dbg(dev, "dev = %d, subtype = %d, start = %d, num = %d\n",
-			dev_id, resource_subtype, res->desc[i].start,
+			dev_id, sub_types[i], res->desc[i].start,
 			res->desc[i].num);
 		valid_set = true;
 	return ERR_PTR(-EINVAL);
 }
+/**
+ * devm_ti_sci_get_of_resource() - Get a TISCI resource assigned to a device
+ * @handle:	TISCI handle
+ * @dev:	Device pointer to which the resource is assigned
+ * @dev_id:	TISCI device id to which the resource is assigned
+ * @of_prop:	property name by which the resource are represented
+ *
+ * Return: Pointer to ti_sci_resource if all went well else appropriate
+ *	   error pointer.
+ */
+struct ti_sci_resource *
+devm_ti_sci_get_of_resource(const struct ti_sci_handle *handle,
+			    struct device *dev, u32 dev_id, char *of_prop)
+{
+	struct ti_sci_resource *res;
+	u32 *sub_types;
+	int sets;
+	sets = of_property_count_elems_of_size(dev_of_node(dev), of_prop,
+					       sizeof(u32));
+	if (sets < 0) {
+		dev_err(dev, "%s resource type ids not available\n", of_prop);
+		return ERR_PTR(sets);
+	}
+	sub_types = kcalloc(sets, sizeof(*sub_types), GFP_KERNEL);
+	if (!sub_types)
+		return ERR_PTR(-ENOMEM);
+	of_property_read_u32_array(dev_of_node(dev), of_prop, sub_types, sets);
+	res = devm_ti_sci_get_resource_sets(handle, dev, dev_id, sub_types,
+					    sets);
+	kfree(sub_types);
+	return res;
+}
+EXPORT_SYMBOL_GPL(devm_ti_sci_get_of_resource);
+/**
+ * devm_ti_sci_get_resource() - Get a resource range assigned to the device
+ * @handle:	TISCI handle
+ * @dev:	Device pointer to which the resource is assigned
+ * @dev_id:	TISCI device id to which the resource is assigned
+ * @suub_type:	TISCI resource subytpe representing the resource.
+ *
+ * Return: Pointer to ti_sci_resource if all went well else appropriate
+ *	   error pointer.
+ */
+struct ti_sci_resource *
+devm_ti_sci_get_resource(const struct ti_sci_handle *handle, struct device *dev,
+			 u32 dev_id, u32 sub_type)
+{
+	return devm_ti_sci_get_resource_sets(handle, dev, dev_id, &sub_type, 1);
+}
+EXPORT_SYMBOL_GPL(devm_ti_sci_get_resource);
 static int tisci_reboot_handler(struct notifier_block *nb, unsigned long mode,
 				void *cmd)
 {
 	/* Limited by MBOX_TX_QUEUE_LEN. K2G can handle upto 128 messages! */
 	.max_msgs = 20,
 	.max_msg_size = 64,
-	.rm_type_map = NULL,
-};
-static struct ti_sci_rm_type_map ti_sci_am654_rm_type_map[] = {
-	{.dev_id = 56, .type = 0x00b}, /* GIC_IRQ */
-	{.dev_id = 179, .type = 0x000}, /* MAIN_NAV_UDMASS_IA0 */
-	{.dev_id = 187, .type = 0x009}, /* MAIN_NAV_RA */
-	{.dev_id = 188, .type = 0x006}, /* MAIN_NAV_UDMAP */
-	{.dev_id = 194, .type = 0x007}, /* MCU_NAV_UDMAP */
-	{.dev_id = 195, .type = 0x00a}, /* MCU_NAV_RA */
-	{.dev_id = 0, .type = 0x000}, /* end of table */
 };
 /* Description for AM654 */
 	/* Limited by MBOX_TX_QUEUE_LEN. K2G can handle upto 128 messages! */
 	.max_msgs = 20,
 	.max_msg_size = 60,
-	.rm_type_map = ti_sci_am654_rm_type_map,
 };
 static const struct of_device_id ti_sci_of_match[] = {

drivers/gpio/gpio-aspeed-sgpio.c+3−3

@@ -303,16 +303,16 @@ static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type) · 302 unmodified lines
303	switch (type & IRQ_TYPE_SENSE_MASK) {	303	switch (type & IRQ_TYPE_SENSE_MASK) {
304	case IRQ_TYPE_EDGE_BOTH:	304	case IRQ_TYPE_EDGE_BOTH:
305	type2 \|= bit;	305	type2 \|= bit;
306	/* fall through */	306	fallthrough;
307	case IRQ_TYPE_EDGE_RISING:	307	case IRQ_TYPE_EDGE_RISING:
308	type0 \|= bit;	308	type0 \|= bit;
309	/* fall through */	309	fallthrough;
310	case IRQ_TYPE_EDGE_FALLING:	310	case IRQ_TYPE_EDGE_FALLING:
311	handler = handle_edge_irq;	311	handler = handle_edge_irq;
312	break;	312	break;
313	case IRQ_TYPE_LEVEL_HIGH:	313	case IRQ_TYPE_LEVEL_HIGH:
314	type0 \|= bit;	314	type0 \|= bit;
315	/* fall through */	315	fallthrough;
316	case IRQ_TYPE_LEVEL_LOW:	316	case IRQ_TYPE_LEVEL_LOW:
317	type1 \|= bit;	317	type1 \|= bit;
318	handler = handle_level_irq;	318	handler = handle_level_irq;

drivers/gpio/gpio-aspeed.c+3−3

@@ -611,16 +611,16 @@ static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type) · 610 unmodified lines
611	switch (type & IRQ_TYPE_SENSE_MASK) {	611	switch (type & IRQ_TYPE_SENSE_MASK) {
612	case IRQ_TYPE_EDGE_BOTH:	612	case IRQ_TYPE_EDGE_BOTH:
613	type2 \|= bit;	613	type2 \|= bit;
614	/* fall through */	614	fallthrough;
615	case IRQ_TYPE_EDGE_RISING:	615	case IRQ_TYPE_EDGE_RISING:
616	type0 \|= bit;	616	type0 \|= bit;
617	/* fall through */	617	fallthrough;
618	case IRQ_TYPE_EDGE_FALLING:	618	case IRQ_TYPE_EDGE_FALLING:
619	handler = handle_edge_irq;	619	handler = handle_edge_irq;
620	break;	620	break;
621	case IRQ_TYPE_LEVEL_HIGH:	621	case IRQ_TYPE_LEVEL_HIGH:
622	type0 \|= bit;	622	type0 \|= bit;
623	/* fall through */	623	fallthrough;
624	case IRQ_TYPE_LEVEL_LOW:	624	case IRQ_TYPE_LEVEL_LOW:
625	type1 \|= bit;	625	type1 \|= bit;
626	handler = handle_level_irq;	626	handler = handle_level_irq;

drivers/gpio/gpio-ath79.c+1−1

@@ -129,7 +129,7 @@ static int ath79_gpio_irq_set_type(struct irq_data *data, · 128 unmodified lines
129		129
130	case IRQ_TYPE_LEVEL_HIGH:	130	case IRQ_TYPE_LEVEL_HIGH:
131	polarity \|= mask;	131	polarity \|= mask;
132	/* fall through */	132	fallthrough;
133	case IRQ_TYPE_LEVEL_LOW:	133	case IRQ_TYPE_LEVEL_LOW:
134	type \|= mask;	134	type \|= mask;
135	break;	135	break;

drivers/gpio/gpio-eic-sprd.c+1−3

 		sprd_eic->chip.free = sprd_eic_free;
 		sprd_eic->chip.set_config = sprd_eic_set_config;
 		sprd_eic->chip.set = sprd_eic_set;
-		/* fall-through */
+		fallthrough;
 	case SPRD_EIC_ASYNC:
-		/* fall-through */
 	case SPRD_EIC_SYNC:
 		sprd_eic->chip.get = sprd_eic_get;
 		break;
 	case SPRD_EIC_LATCH:
-		/* fall-through */
 	default:
 		break;
 	}

drivers/gpio/gpio-stmpe.c+2−2

@@ -308,7 +308,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, · 307 unmodified lines
308	if (ret < 0)	308	if (ret < 0)
309	return;	309	return;
310	edge_det = !!(ret & mask);	310	edge_det = !!(ret & mask);
311	/* fall through */	311	fallthrough;
312	case STMPE1801:	312	case STMPE1801:
313	rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB + bank];	313	rise_reg = stmpe->regs[STMPE_IDX_GPRER_LSB + bank];
314	fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB + bank];	314	fall_reg = stmpe->regs[STMPE_IDX_GPFER_LSB + bank];
@@ -321,7 +321,7 @@ static void stmpe_dbg_show_one(struct seq_file *s, · 6 unmodified lines
321	if (ret < 0)	321	if (ret < 0)
322	return;	322	return;
323	fall = !!(ret & mask);	323	fall = !!(ret & mask);
324	/* fall through */	324	fallthrough;
325	case STMPE801:	325	case STMPE801:
326	case STMPE1600:	326	case STMPE1600:
327	irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB + bank];	327	irqen_reg = stmpe->regs[STMPE_IDX_IEGPIOR_LSB + bank];

drivers/gpio/gpiolib-acpi.c+1−1

@@ -1264,7 +1264,7 @@ static int acpi_gpio_package_count(const union acpi_object *obj) · 1263 unmodified lines
1264	switch (element->type) {	1264	switch (element->type) {
1265	case ACPI_TYPE_LOCAL_REFERENCE:	1265	case ACPI_TYPE_LOCAL_REFERENCE:
1266	element += 3;	1266	element += 3;
1267	/* Fallthrough */	1267	fallthrough;
1268	case ACPI_TYPE_INTEGER:	1268	case ACPI_TYPE_INTEGER:
1269	element++;	1269	element++;
1270	count++;	1270	count++;

drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10_3.c+1−1

@@ -152,7 +152,7 @@ static uint32_t get_sdma_rlc_reg_offset(struct amdgpu_device *adev, · 151 unmodified lines
152	dev_warn(adev->dev,	152	dev_warn(adev->dev,
153	"Invalid sdma engine id (%d), using engine id 0\n",	153	"Invalid sdma engine id (%d), using engine id 0\n",
154	engine_id);	154	engine_id);
155	/* fall through */	155	fallthrough;
156	case 0:	156	case 0:
157	sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA0, 0,	157	sdma_engine_reg_base = SOC15_REG_OFFSET(SDMA0, 0,
158	mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL;	158	mmSDMA0_RLC0_RB_CNTL) - mmSDMA0_RLC0_RB_CNTL;

drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c+5−0

 		case CHIP_VEGA20:
 		case CHIP_ARCTURUS:
 		case CHIP_SIENNA_CICHLID:
+		case CHIP_NAVY_FLOUNDER:
 			/* enable runpm if runpm=1 */
 			if (amdgpu_runtime_pm > 0)
 				adev->runpm = true;
 		 * in the bitfields */
 		if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK)
 			se_num = 0xffffffff;
+		else if (se_num >= AMDGPU_GFX_MAX_SE)
+			return -EINVAL;
 		if (sh_num == AMDGPU_INFO_MMR_SH_INDEX_MASK)
 			sh_num = 0xffffffff;
+		else if (sh_num >= AMDGPU_GFX_MAX_SH_PER_SE)
+			return -EINVAL;
 		if (info->read_mmr_reg.count > 128)
 			return -EINVAL;

drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c+1−2

@@ -522,8 +522,7 @@ static int psp_asd_load(struct psp_context *psp) · 521 unmodified lines
522	* add workaround to bypass it for sriov now.	522	* add workaround to bypass it for sriov now.
523	* TODO: add version check to make it common	523	* TODO: add version check to make it common
524	*/	524	*/
525	if (amdgpu_sriov_vf(psp->adev) \|\|	525	if (amdgpu_sriov_vf(psp->adev) \|\| !psp->asd_fw)
526	(psp->adev->asic_type == CHIP_NAVY_FLOUNDER))
527	return 0;	526	return 0;
528		527
529	cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);	528	cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);

drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+2−4

@@ -7263,10 +7263,8 @@ static void gfx_v10_0_update_medium_grain_clock_gating(struct amdgpu_device *ade · 7262 unmodified lines
7263	def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);	7263	def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE);
7264	data &= ~(RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK \|	7264	data &= ~(RLC_CGTT_MGCG_OVERRIDE__GRBM_CGTT_SCLK_OVERRIDE_MASK \|
7265	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK \|	7265	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGCG_OVERRIDE_MASK \|
7266	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK);	7266	RLC_CGTT_MGCG_OVERRIDE__GFXIP_MGLS_OVERRIDE_MASK \|
7267		7267	RLC_CGTT_MGCG_OVERRIDE__ENABLE_CGTS_LEGACY_MASK);
7268	/* only for Vega10 & Raven1 */
7269	data \|= RLC_CGTT_MGCG_OVERRIDE__RLC_CGTT_SCLK_OVERRIDE_MASK;
7270		7268
7271	if (def != data)	7269	if (def != data)
7272	WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);	7270	WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data);

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c+1−1

@@ -3250,7 +3250,7 @@ static void gfx_v8_0_tiling_mode_table_init(struct amdgpu_device *adev) · 3249 unmodified lines
3250	dev_warn(adev->dev,	3250	dev_warn(adev->dev,
3251	"Unknown chip type (%d) in function gfx_v8_0_tiling_mode_table_init() falling through to CHIP_CARRIZO\n",	3251	"Unknown chip type (%d) in function gfx_v8_0_tiling_mode_table_init() falling through to CHIP_CARRIZO\n",
3252	adev->asic_type);	3252	adev->asic_type);
3253	/* fall through */	3253	fallthrough;
3254		3254
3255	case CHIP_CARRIZO:	3255	case CHIP_CARRIZO:
3256	modearray[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) \|	3256	modearray[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) \|

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c+1−1

@@ -1297,7 +1297,7 @@ static void gmc_v9_0_init_golden_registers(struct amdgpu_device *adev) · 1296 unmodified lines
1297	case CHIP_VEGA10:	1297	case CHIP_VEGA10:
1298	if (amdgpu_sriov_vf(adev))	1298	if (amdgpu_sriov_vf(adev))
1299	break;	1299	break;
1300	/* fall through */	1300	fallthrough;
1301	case CHIP_VEGA20:	1301	case CHIP_VEGA20:
1302	soc15_program_register_sequence(adev,	1302	soc15_program_register_sequence(adev,
1303	golden_settings_mmhub_1_0_0,	1303	golden_settings_mmhub_1_0_0,

drivers/gpu/drm/amd/amdgpu/nv.c+1−0

@@ -364,6 +364,7 @@ nv_asic_reset_method(struct amdgpu_device *adev) · 363 unmodified lines
364		364
365	switch (adev->asic_type) {	365	switch (adev->asic_type) {
366	case CHIP_SIENNA_CICHLID:	366	case CHIP_SIENNA_CICHLID:
		367	case CHIP_NAVY_FLOUNDER:
367	return AMD_RESET_METHOD_MODE1;	368	return AMD_RESET_METHOD_MODE1;
368	default:	369	default:
369	if (smu_baco_is_support(smu))	370	if (smu_baco_is_support(smu))

drivers/gpu/drm/amd/amdgpu/si_dpm.c+1−1

@@ -6196,7 +6196,7 @@ static void si_request_link_speed_change_before_state_change(struct amdgpu_devic · 6195 unmodified lines
6196	si_pi->force_pcie_gen = AMDGPU_PCIE_GEN2;	6196	si_pi->force_pcie_gen = AMDGPU_PCIE_GEN2;
6197	if (current_link_speed == AMDGPU_PCIE_GEN2)	6197	if (current_link_speed == AMDGPU_PCIE_GEN2)
6198	break;	6198	break;
6199	/* fall through */	6199	fallthrough;
6200	case AMDGPU_PCIE_GEN2:	6200	case AMDGPU_PCIE_GEN2:
6201	if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)	6201	if (amdgpu_acpi_pcie_performance_request(adev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
6202	break;	6202	break;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+50−43

 				    &dm_atomic_state_funcs);
 	r = amdgpu_display_modeset_create_props(adev);
-	if (r)
+	if (r) {
+		dc_release_state(state->context);
+		kfree(state);
 		return r;
+	}
 	r = amdgpu_dm_audio_init(adev);
-	if (r)
+	if (r) {
+		dc_release_state(state->context);
+		kfree(state);
 		return r;
+	}
 	return 0;
 }
 #if defined(CONFIG_ACPI)
 	struct amdgpu_dm_backlight_caps caps;
+	memset(&caps, 0, sizeof(caps));
 	if (dm->backlight_caps.caps_valid)
 		return;
 	return rc ? 0 : 1;
 }
-static u32 convert_brightness(const struct amdgpu_dm_backlight_caps *caps,
+static int get_brightness_range(const struct amdgpu_dm_backlight_caps *caps,
-			      const uint32_t user_brightness)
+				unsigned *min, unsigned *max)
 {
-	u32 min, max, conversion_pace;
-	u32 brightness = user_brightness;
 	if (!caps)
-		goto out;
+		return 0;
-	if (!caps->aux_support) {
+	if (caps->aux_support) {
-		max = caps->max_input_signal;
+		// Firmware limits are in nits, DC API wants millinits.
-		min = caps->min_input_signal;
+		*max = 1000 * caps->aux_max_input_signal;
-		/*
+		*min = 1000 * caps->aux_min_input_signal;
-		 * The brightness input is in the range 0-255
-		 * It needs to be rescaled to be between the
-		 * requested min and max input signal
-		 * It also needs to be scaled up by 0x101 to
-		 * match the DC interface which has a range of
-		 * 0 to 0xffff
-		 */
-		conversion_pace = 0x101;
-		brightness =
-			user_brightness
-			* conversion_pace
-			* (max - min)
-			/ AMDGPU_MAX_BL_LEVEL
-			+ min * conversion_pace;
 	} else {
-		/* TODO
+		// Firmware limits are 8-bit, PWM control is 16-bit.
-		 * We are doing a linear interpolation here, which is OK but
+		*max = 0x101 * caps->max_input_signal;
-		 * does not provide the optimal result. We probably want
+		*min = 0x101 * caps->min_input_signal;
-		 * something close to the Perceptual Quantizer (PQ) curve.
-		 */
-		max = caps->aux_max_input_signal;
-		min = caps->aux_min_input_signal;
-		brightness = (AMDGPU_MAX_BL_LEVEL - user_brightness) * min
-			       + user_brightness * max;
-		// Multiple the value by 1000 since we use millinits
-		brightness *= 1000;
-		brightness = DIV_ROUND_CLOSEST(brightness, AMDGPU_MAX_BL_LEVEL);
 	}
+	return 1;
+}
-out:
+static u32 convert_brightness_from_user(const struct amdgpu_dm_backlight_caps *caps,
-	return brightness;
+					uint32_t brightness)
+{
+	unsigned min, max;
+	if (!get_brightness_range(caps, &min, &max))
+		return brightness;
+	// Rescale 0..255 to min..max
+	return min + DIV_ROUND_CLOSEST((max - min) * brightness,
+				       AMDGPU_MAX_BL_LEVEL);
+}
+static u32 convert_brightness_to_user(const struct amdgpu_dm_backlight_caps *caps,
+				      uint32_t brightness)
+{
+	unsigned min, max;
+	if (!get_brightness_range(caps, &min, &max))
+		return brightness;
+	if (brightness < min)
+		return 0;
+	// Rescale min..max to 0..255
+	return DIV_ROUND_CLOSEST(AMDGPU_MAX_BL_LEVEL * (brightness - min),
+				 max - min);
 }
 static int amdgpu_dm_backlight_update_status(struct backlight_device *bd)
 	link = (struct dc_link *)dm->backlight_link;
-	brightness = convert_brightness(&caps, bd->props.brightness);
+	brightness = convert_brightness_from_user(&caps, bd->props.brightness);
 	// Change brightness based on AUX property
 	if (caps.aux_support)
 		return set_backlight_via_aux(link, brightness);
 	if (ret == DC_ERROR_UNEXPECTED)
 		return bd->props.brightness;
-	return ret;
+	return convert_brightness_to_user(&dm->backlight_caps, ret);
 }
 static const struct backlight_ops amdgpu_dm_backlight_ops = {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+1−1

@@ -68,7 +68,7 @@ static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, · 67 unmodified lines
68	result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,	68	result = dc_link_aux_transfer_raw(TO_DM_AUX(aux)->ddc_service, &payload,
69	&operation_result);	69	&operation_result);
70		70
71	if (payload.write)	71	if (payload.write && result >= 0)
72	result = msg->size;	72	result = msg->size;
73		73
74	if (result < 0)	74	if (result < 0)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c+10−0

 	return display_count;
 }
+void rn_set_low_power_state(struct clk_mgr *clk_mgr_base)
+{
+	struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base);
+	rn_vbios_smu_set_dcn_low_power_state(clk_mgr, DCN_PWR_STATE_LOW_POWER);
+	/* update power state */
+	clk_mgr_base->clks.pwr_state = DCN_PWR_STATE_LOW_POWER;
+}
 void rn_update_clocks(struct clk_mgr *clk_mgr_base,
 			struct dc_state *context,
 			bool safe_to_lower)
 	.init_clocks = rn_init_clocks,
 	.enable_pme_wa = rn_enable_pme_wa,
 	.are_clock_states_equal = rn_are_clock_states_equal,
+	.set_low_power_state = rn_set_low_power_state,
 	.notify_wm_ranges = rn_notify_wm_ranges,
 	.notify_link_rate_change = rn_notify_link_rate_change,
 };

drivers/gpu/drm/amd/display/dc/core/dc_link.c+2−1

 		sink_caps->signal = dp_passive_dongle_detection(link->ddc,
 								sink_caps,
 								audio_support);
+		link->dpcd_caps.dongle_type = sink_caps->dongle_type;
 	}
 	return true;
 		core_link_set_avmute(pipe_ctx, true);
 	}
-	dc->hwss.blank_stream(pipe_ctx);
 #if defined(CONFIG_DRM_AMD_DC_HDCP)
 	update_psp_stream_config(pipe_ctx, true);
 #endif
+	dc->hwss.blank_stream(pipe_ctx);
 	if (pipe_ctx->stream->signal == SIGNAL_TYPE_DISPLAY_PORT_MST)
 		deallocate_mst_payload(pipe_ctx);

drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c+4−4

@@ -4409,9 +4409,9 @@ bool dc_link_get_backlight_level_nits(struct dc_link *link, · 4408 unmodified lines
4409	link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))	4409	link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
4410	return false;	4410	return false;
4411		4411
4412	if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_CURRENT_PEAK,	4412	if (core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_CURRENT_PEAK,
4413	dpcd_backlight_get.raw,	4413	dpcd_backlight_get.raw,
4414	sizeof(union dpcd_source_backlight_get)))	4414	sizeof(union dpcd_source_backlight_get)) != DC_OK)
4415	return false;	4415	return false;
4416		4416
4417	*backlight_millinits_avg =	4417	*backlight_millinits_avg =
@@ -4450,9 +4450,9 @@ bool dc_link_read_default_bl_aux(struct dc_link link, uint32_t backlight_milli · 32 unmodified lines
4450	link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))	4450	link->connector_signal != SIGNAL_TYPE_DISPLAY_PORT))
4451	return false;	4451	return false;
4452		4452
4453	if (!core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,	4453	if (core_link_read_dpcd(link, DP_SOURCE_BACKLIGHT_LEVEL,
4454	(uint8_t *) backlight_millinits,	4454	(uint8_t *) backlight_millinits,
4455	sizeof(uint32_t)))	4455	sizeof(uint32_t)) != DC_OK)
4456	return false;	4456	return false;
4457		4457
4458	return true;	4458	return true;

drivers/gpu/drm/amd/display/dc/dc_stream.h+1−1

@@ -233,7 +233,7 @@ struct dc_stream_state { · 232 unmodified lines
233	union stream_update_flags update_flags;	233	union stream_update_flags update_flags;
234	};	234	};
235		235
236	#define ABM_LEVEL_IMMEDIATE_DISABLE 0xFFFFFFFF	236	#define ABM_LEVEL_IMMEDIATE_DISABLE 255
237		237
238	struct dc_stream_update {	238	struct dc_stream_update {
239	struct dc_stream_state *stream;	239	struct dc_stream_state *stream;

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c+31−22

@@ -1450,33 +1450,42 @@ void dcn10_init_hw(struct dc *dc) · 1449 unmodified lines
1450	void dcn10_power_down_on_boot(struct dc *dc)	1450	void dcn10_power_down_on_boot(struct dc *dc)
1451	{	1451	{
1452	int i = 0;	1452	int i = 0;
		1453	struct dc_link *edp_link;
1453		1454
1454	if (dc->config.power_down_display_on_boot) {	1455	if (!dc->config.power_down_display_on_boot)
1455	struct dc_link *edp_link = get_edp_link(dc);	1456	return;
1456		1457
1457	if (edp_link &&	1458	edp_link = get_edp_link(dc);
1458	edp_link->link_enc->funcs->is_dig_enabled &&	1459	if (edp_link &&
1459	edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&	1460	edp_link->link_enc->funcs->is_dig_enabled &&
1460	dc->hwseq->funcs.edp_backlight_control &&	1461	edp_link->link_enc->funcs->is_dig_enabled(edp_link->link_enc) &&
1461	dc->hwss.power_down &&	1462	dc->hwseq->funcs.edp_backlight_control &&
1462	dc->hwss.edp_power_control) {	1463	dc->hwss.power_down &&
1463	dc->hwseq->funcs.edp_backlight_control(edp_link, false);	1464	dc->hwss.edp_power_control) {
1464	dc->hwss.power_down(dc);	1465	dc->hwseq->funcs.edp_backlight_control(edp_link, false);
1465	dc->hwss.edp_power_control(edp_link, false);	1466	dc->hwss.power_down(dc);
1466	} else {	1467	dc->hwss.edp_power_control(edp_link, false);
1467	for (i = 0; i < dc->link_count; i++) {	1468	} else {
1468	struct dc_link *link = dc->links[i];	1469	for (i = 0; i < dc->link_count; i++) {
1469		1470	struct dc_link *link = dc->links[i];
1470	if (link->link_enc->funcs->is_dig_enabled &&
1471	link->link_enc->funcs->is_dig_enabled(link->link_enc) &&
1472	dc->hwss.power_down) {
1473	dc->hwss.power_down(dc);
1474	break;
1475	}
1476		1471
		1472	if (link->link_enc->funcs->is_dig_enabled &&
		1473	link->link_enc->funcs->is_dig_enabled(link->link_enc) &&
		1474	dc->hwss.power_down) {
		1475	dc->hwss.power_down(dc);
		1476	break;
1477	}	1477	}
		1478
1478	}	1479	}
1479	}	1480	}
		1481
		1482	/*
		1483	* Call update_clocks with empty context
		1484	* to send DISPLAY_OFF
		1485	* Otherwise DISPLAY_OFF may not be asserted
		1486	*/
		1487	if (dc->clk_mgr->funcs->set_low_power_state)
		1488	dc->clk_mgr->funcs->set_low_power_state(dc->clk_mgr);
1480	}	1489	}
1481		1490
1482	void dcn10_reset_hw_ctx_wrap(	1491	void dcn10_reset_hw_ctx_wrap(

drivers/gpu/drm/amd/display/dc/dcn10/dcn10_resource.c+8−0

 	bool video_large = false;
 	bool desktop_large = false;
 	bool dcc_disabled = false;
+	bool mpo_enabled = false;
 	for (i = 0; i < context->stream_count; i++) {
 		if (context->stream_status[i].plane_count == 0)
 		if (context->stream_status[i].plane_count > 2)
 			return DC_FAIL_UNSUPPORTED_1;
+		if (context->stream_status[i].plane_count > 1)
+			mpo_enabled = true;
 		for (j = 0; j < context->stream_status[i].plane_count; j++) {
 			struct dc_plane_state *plane =
 				context->stream_status[i].plane_states[j];
 		}
 	}
+	/* Disable MPO in multi-display configurations. */
+	if (context->stream_count > 1 && mpo_enabled)
+		return DC_FAIL_UNSUPPORTED_1;
 	/*
 	 * Workaround: On DCN10 there is UMC issue that causes underflow when
 	 * playing 4k video on 4k desktop with video downscaled and single channel

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h+2−0

@@ -230,6 +230,8 @@ struct clk_mgr_funcs { · 229 unmodified lines
230		230
231	int (get_dp_ref_clk_frequency)(struct clk_mgr clk_mgr);	231	int (get_dp_ref_clk_frequency)(struct clk_mgr clk_mgr);
232		232
		233	void (set_low_power_state)(struct clk_mgr clk_mgr);
		234
233	void (init_clocks)(struct clk_mgr clk_mgr);	235	void (init_clocks)(struct clk_mgr clk_mgr);
234		236
235	void (enable_pme_wa) (struct clk_mgr clk_mgr);	237	void (enable_pme_wa) (struct clk_mgr clk_mgr);

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c+7−3

 {
 	int ret = 0;
 	uint32_t feature_mask[2];
-	unsigned long feature_enabled;
+	uint64_t feature_enabled;
 	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
-	feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
+	if (ret)
-			   ((uint64_t)feature_mask[1] << 32));
+		return false;
+	feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
 	return !!(feature_enabled & SMC_DPM_FEATURE);
 }

drivers/gpu/drm/amd/powerplay/hwmgr/smu10_hwmgr.c+3−6

 {
 	struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
-	if (smu10_data->need_min_deep_sleep_dcefclk &&
+	if (clock && smu10_data->deep_sleep_dcefclk != clock) {
-		smu10_data->deep_sleep_dcefclk != clock) {
 		smu10_data->deep_sleep_dcefclk = clock;
 		smum_send_msg_to_smc_with_parameter(hwmgr,
 					PPSMC_MSG_SetMinDeepSleepDcefclk,
 {
 	struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
-	if (smu10_data->dcf_actual_hard_min_freq &&
+	if (clock && smu10_data->dcf_actual_hard_min_freq != clock) {
-		smu10_data->dcf_actual_hard_min_freq != clock) {
 		smu10_data->dcf_actual_hard_min_freq = clock;
 		smum_send_msg_to_smc_with_parameter(hwmgr,
 					PPSMC_MSG_SetHardMinDcefclkByFreq,
 {
 	struct smu10_hwmgr *smu10_data = (struct smu10_hwmgr *)(hwmgr->backend);
-	if (smu10_data->f_actual_hard_min_freq &&
+	if (clock && smu10_data->f_actual_hard_min_freq != clock) {
-		smu10_data->f_actual_hard_min_freq != clock) {
 		smu10_data->f_actual_hard_min_freq = clock;
 		smum_send_msg_to_smc_with_parameter(hwmgr,
 					PPSMC_MSG_SetHardMinFclkByFreq,

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c+2−1

 	case AMDGPU_PP_SENSOR_GPU_POWER:
 		return smu7_get_gpu_power(hwmgr, (uint32_t *)value);
 	case AMDGPU_PP_SENSOR_VDDGFX:
-		if ((data->vr_config & 0xff) == 0x2)
+		if ((data->vr_config & VRCONF_VDDGFX_MASK) ==
+		    (VR_SVI2_PLANE_2 << VRCONF_VDDGFX_SHIFT))
 			val_vid = PHM_READ_INDIRECT_FIELD(hwmgr->device,
 					CGS_IND_REG__SMC, PWR_SVI2_STATUS, PLANE2_VID);
 		else

drivers/gpu/drm/amd/powerplay/hwmgr/vega10_thermal.c+22−10

@@ -363,17 +363,29 @@ int vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr) · 362 unmodified lines
363	static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,	363	static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
364	struct PP_TemperatureRange *range)	364	struct PP_TemperatureRange *range)
365	{	365	{
		366	struct phm_ppt_v2_information *pp_table_info =
		367	(struct phm_ppt_v2_information *)(hwmgr->pptable);
		368	struct phm_tdp_table *tdp_table = pp_table_info->tdp_table;
366	struct amdgpu_device *adev = hwmgr->adev;	369	struct amdgpu_device *adev = hwmgr->adev;
367	int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP *	370	int low = VEGA10_THERMAL_MINIMUM_ALERT_TEMP;
368	PP_TEMPERATURE_UNITS_PER_CENTIGRADES;	371	int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP;
369	int high = VEGA10_THERMAL_MAXIMUM_ALERT_TEMP *
370	PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
371	uint32_t val;	372	uint32_t val;
372		373
373	if (low < range->min)	374	/* compare them in unit celsius degree */
374	low = range->min;	375	if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
375	if (high > range->max)	376	low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
376	high = range->max;	377
		378	/*
		379	* As a common sense, usSoftwareShutdownTemp should be bigger
		380	* than ThotspotLimit. For any invalid usSoftwareShutdownTemp,
		381	* we will just use the max possible setting VEGA10_THERMAL_MAXIMUM_ALERT_TEMP
		382	* to avoid false alarms.
		383	*/
		384	if ((tdp_table->usSoftwareShutdownTemp >
		385	range->hotspot_crit_max / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)) {
		386	if (high > tdp_table->usSoftwareShutdownTemp)
		387	high = tdp_table->usSoftwareShutdownTemp;
		388	}
377		389
378	if (low > high)	390	if (low > high)
379	return -EINVAL;	391	return -EINVAL;
@@ -382,8 +394,8 @@ static int vega10_thermal_set_temperature_range(struct pp_hwmgr *hwmgr, · 2 unmodified lines
382		394
383	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);	395	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
384	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);	396	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
385	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));	397	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
386	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));	398	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
387	val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) &	399	val &= (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK) &
388	(~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK) &	400	(~THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK) &
389	(~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK);	401	(~THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK);

drivers/gpu/drm/amd/powerplay/hwmgr/vega12_thermal.c+11−10

 static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
 		struct PP_TemperatureRange *range)
 {
+	struct phm_ppt_v3_information *pptable_information =
+		(struct phm_ppt_v3_information *)hwmgr->pptable;
 	struct amdgpu_device *adev = hwmgr->adev;
-	int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
+	int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP;
-			PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP;
-	int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
-			PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 	uint32_t val;
-	if (low < range->min)
+	/* compare them in unit celsius degree */
-		low = range->min;
+	if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
-	if (high > range->max)
+		low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
-		high = range->max;
+	if (high > pptable_information->us_software_shutdown_temp)
+		high = pptable_information->us_software_shutdown_temp;
 	if (low > high)
 		return -EINVAL;
 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
 	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
-	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
+	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
-	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
+	val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
 	val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
 	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/powerplay/hwmgr/vega20_thermal.c+11−10

 static int vega20_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
 		struct PP_TemperatureRange *range)
 {
+	struct phm_ppt_v3_information *pptable_information =
+		(struct phm_ppt_v3_information *)hwmgr->pptable;
 	struct amdgpu_device *adev = hwmgr->adev;
-	int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP *
+	int low = VEGA20_THERMAL_MINIMUM_ALERT_TEMP;
-			PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+	int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP;
-	int high = VEGA20_THERMAL_MAXIMUM_ALERT_TEMP *
-			PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
 	uint32_t val;
-	if (low < range->min)
+	/* compare them in unit celsius degree */
-		low = range->min;
+	if (low < range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES)
-	if (high > range->max)
+		low = range->min / PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
-		high = range->max;
+	if (high > pptable_information->us_software_shutdown_temp)
+		high = pptable_information->us_software_shutdown_temp;
 	if (low > high)
 		return -EINVAL;
 	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
 	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
-	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
+	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, high);
-	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
+	val = CGS_REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, low);
 	val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
 	WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);

drivers/gpu/drm/amd/powerplay/navi10_ppt.c+7−3

 {
 	int ret = 0;
 	uint32_t feature_mask[2];
-	unsigned long feature_enabled;
+	uint64_t feature_enabled;
 	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
-	feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
+	if (ret)
-			   ((uint64_t)feature_mask[1] << 32));
+		return false;
+	feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
 	return !!(feature_enabled & SMC_DPM_FEATURE);
 }

drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c+19−6

 	FEATURE_MASK(FEATURE_DPM_LINK_BIT)       | \
 	FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT)     | \
 	FEATURE_MASK(FEATURE_DPM_FCLK_BIT)	 | \
-	FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT))
+	FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT)	 | \
+	FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT))
 #define SMU_11_0_7_GFX_BUSY_THRESHOLD 15
 	MSG_MAP(TransferTableSmu2Dram,		PPSMC_MSG_TransferTableSmu2Dram,       0),
 	MSG_MAP(TransferTableDram2Smu,		PPSMC_MSG_TransferTableDram2Smu,       0),
 	MSG_MAP(UseDefaultPPTable,		PPSMC_MSG_UseDefaultPPTable,           0),
+	MSG_MAP(RunDcBtc,			PPSMC_MSG_RunDcBtc,                    0),
 	MSG_MAP(EnterBaco,			PPSMC_MSG_EnterBaco,                   0),
 	MSG_MAP(SetSoftMinByFreq,		PPSMC_MSG_SetSoftMinByFreq,            0),
 	MSG_MAP(SetSoftMaxByFreq,		PPSMC_MSG_SetSoftMaxByFreq,            0),
 	*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT)
 				| FEATURE_MASK(FEATURE_DPM_FCLK_BIT)
+				| FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT)
 				| FEATURE_MASK(FEATURE_DS_SOCCLK_BIT)
 				| FEATURE_MASK(FEATURE_DS_DCEFCLK_BIT)
 				| FEATURE_MASK(FEATURE_DS_FCLK_BIT)
 			ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn, 0, NULL);
 			if (ret)
 				return ret;
-			if (adev->asic_type == CHIP_SIENNA_CICHLID) {
+			if (adev->vcn.num_vcn_inst > 1) {
 				ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerUpVcn,
 								  0x10000, NULL);
 				if (ret)
 			ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn, 0, NULL);
 			if (ret)
 				return ret;
-			if (adev->asic_type == CHIP_SIENNA_CICHLID) {
+			if (adev->vcn.num_vcn_inst > 1) {
 				ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn,
 								  0x10000, NULL);
 				if (ret)
 {
 	int ret = 0;
 	uint32_t feature_mask[2];
-	unsigned long feature_enabled;
+	uint64_t feature_enabled;
 	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);
-	feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |
+	if (ret)
-			   ((uint64_t)feature_mask[1] << 32));
+		return false;
+	feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0];
 	return !!(feature_enabled & SMC_DPM_FEATURE);
 }
 	return ret;
 }
+static int sienna_cichlid_run_btc(struct smu_context *smu)
+{
+	return smu_cmn_send_smc_msg(smu, SMU_MSG_RunDcBtc, NULL);
+}
 static bool sienna_cichlid_is_baco_supported(struct smu_context *smu)
 {
 	struct amdgpu_device *adev = smu->adev;
 	.mode1_reset = smu_v11_0_mode1_reset,
 	.get_dpm_ultimate_freq = sienna_cichlid_get_dpm_ultimate_freq,
 	.set_soft_freq_limited_range = smu_v11_0_set_soft_freq_limited_range,
+	.run_btc = sienna_cichlid_run_btc,
 	.get_pp_feature_mask = smu_cmn_get_pp_feature_mask,
 	.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
 };

drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c+2−0

 #include "cgs_common.h"
 #include "atombios.h"
 #include "pppcielanes.h"
+#include "smu7_smumgr.h"
 #include "smu/smu_7_0_1_d.h"
 #include "smu/smu_7_0_1_sh_mask.h"
 	.request_smu_load_specific_fw = NULL,
 	.send_msg_to_smc = ci_send_msg_to_smc,
 	.send_msg_to_smc_with_parameter = ci_send_msg_to_smc_with_parameter,
+	.get_argument = smu7_get_argument,
 	.download_pptable_settings = NULL,
 	.upload_pptable_settings = NULL,
 	.get_offsetof = ci_get_offsetof,

drivers/gpu/drm/arm/malidp_hw.c+3−3

@@ -532,7 +532,7 @@ static int malidp500_enable_memwrite(struct malidp_hw_device *hwdev, · 531 unmodified lines
532	malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);	532	malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);
533	malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);	533	malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);
534	malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);	534	malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);
535	/* fall through */	535	fallthrough;
536	case 1:	536	case 1:
537	malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);	537	malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);
538	malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);	538	malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);
@@ -869,7 +869,7 @@ static int malidp550_enable_memwrite(struct malidp_hw_device *hwdev, · 330 unmodified lines
869	malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);	869	malidp_hw_write(hwdev, lower_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_LOW);
870	malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);	870	malidp_hw_write(hwdev, upper_32_bits(addrs[1]), base + MALIDP_MW_P2_PTR_HIGH);
871	malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);	871	malidp_hw_write(hwdev, pitches[1], base + MALIDP_MW_P2_STRIDE);
872	/* fall through */	872	fallthrough;
873	case 1:	873	case 1:
874	malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);	874	malidp_hw_write(hwdev, lower_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_LOW);
875	malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);	875	malidp_hw_write(hwdev, upper_32_bits(addrs[0]), base + MALIDP_MW_P1_PTR_HIGH);
@@ -1324,7 +1324,7 @@ static irqreturn_t malidp_se_irq(int irq, void *arg) · 448 unmodified lines
1324	break;	1324	break;
1325	case MW_RESTART:	1325	case MW_RESTART:
1326	drm_writeback_signal_completion(&malidp->mw_connector, 0);	1326	drm_writeback_signal_completion(&malidp->mw_connector, 0);
1327	/* fall through - to a new start */	1327	fallthrough; /* to a new start */
1328	case MW_START:	1328	case MW_START:
1329	/* writeback started, need to emulate one-shot mode */	1329	/* writeback started, need to emulate one-shot mode */
1330	hw->disable_memwrite(hwdev);	1330	hw->disable_memwrite(hwdev);

drivers/gpu/drm/ast/ast_main.c+1−1

@@ -240,7 +240,7 @@ static int ast_detect_chip(struct drm_device dev, bool need_post) · 239 unmodified lines
240	ast->dp501_fw_addr = NULL;	240	ast->dp501_fw_addr = NULL;
241	}	241	}
242	}	242	}
243	/* fallthrough */	243	fallthrough;
244	case 0x0c:	244	case 0x0c:
245	ast->tx_chip_type = AST_TX_DP501;	245	ast->tx_chip_type = AST_TX_DP501;
246	}	246	}

drivers/gpu/drm/bridge/nwl-dsi.c+0−2

 		switch (data_type) {
 		case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE:
-			fallthrough;
 		case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE:
 			if (xfer->msg->rx_len > 1) {
 				/* read second byte */
 			}
 			fallthrough;
 		case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE:
-			fallthrough;
 		case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE:
 			if (xfer->msg->rx_len > 0) {
 				/* read first byte */

drivers/gpu/drm/bridge/synopsys/dw-hdmi-i2s-audio.c+2−2

@@ -61,10 +61,10 @@ static int dw_hdmi_i2s_hw_params(struct device dev, void data, · 60 unmodified lines
61	switch (hparms->channels) {	61	switch (hparms->channels) {
62	case 7 ... 8:	62	case 7 ... 8:
63	conf0 \|= HDMI_AUD_CONF0_I2S_EN3;	63	conf0 \|= HDMI_AUD_CONF0_I2S_EN3;
64	/* Fall-thru */	64	fallthrough;
65	case 5 ... 6:	65	case 5 ... 6:
66	conf0 \|= HDMI_AUD_CONF0_I2S_EN2;	66	conf0 \|= HDMI_AUD_CONF0_I2S_EN2;
67	/* Fall-thru */	67	fallthrough;
68	case 3 ... 4:	68	case 3 ... 4:
69	conf0 \|= HDMI_AUD_CONF0_I2S_EN1;	69	conf0 \|= HDMI_AUD_CONF0_I2S_EN1;
70	/* Fall-thru */	70	/* Fall-thru */

drivers/gpu/drm/bridge/ti-sn65dsi86.c+3−3

@@ -601,13 +601,13 @@ static void ti_sn_bridge_read_valid_rates(struct ti_sn_bridge *pdata, · 600 unmodified lines
601	DRM_DEV_ERROR(pdata->dev,	601	DRM_DEV_ERROR(pdata->dev,
602	"Unexpected max rate (%#x); assuming 5.4 GHz\n",	602	"Unexpected max rate (%#x); assuming 5.4 GHz\n",
603	(int)dpcd_val);	603	(int)dpcd_val);
604	/* fall through */	604	fallthrough;
605	case DP_LINK_BW_5_4:	605	case DP_LINK_BW_5_4:
606	rate_valid[7] = 1;	606	rate_valid[7] = 1;
607	/* fall through */	607	fallthrough;
608	case DP_LINK_BW_2_7:	608	case DP_LINK_BW_2_7:
609	rate_valid[4] = 1;	609	rate_valid[4] = 1;
610	/* fall through */	610	fallthrough;
611	case DP_LINK_BW_1_62:	611	case DP_LINK_BW_1_62:
612	rate_valid[1] = 1;	612	rate_valid[1] = 1;
613	break;	613	break;

drivers/gpu/drm/drm_atomic_helper.c+4−3

 #include <drm/drm_bridge.h>
 #include <drm/drm_damage_helper.h>
 #include <drm/drm_device.h>
+#include <drm/drm_drv.h>
 #include <drm/drm_plane_helper.h>
 #include <drm/drm_print.h>
 #include <drm/drm_self_refresh_helper.h>
 	if (ret)
 		DRM_ERROR("Disabling all crtc's during unload failed with %i\n", ret);
-	DRM_MODESET_LOCK_ALL_END(ctx, ret);
+	DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 }
 EXPORT_SYMBOL(drm_atomic_helper_shutdown);
 	}
 unlock:
-	DRM_MODESET_LOCK_ALL_END(ctx, err);
+	DRM_MODESET_LOCK_ALL_END(dev, ctx, err);
 	if (err)
 		return ERR_PTR(err);
 	err = drm_atomic_helper_commit_duplicated_state(state, &ctx);
-	DRM_MODESET_LOCK_ALL_END(ctx, err);
+	DRM_MODESET_LOCK_ALL_END(dev, ctx, err);
 	drm_atomic_state_put(state);
 	return err;

drivers/gpu/drm/drm_bufs.c+1−1

@@ -537,7 +537,7 @@ int drm_legacy_rmmap_locked(struct drm_device dev, struct drm_local_map map) · 536 unmodified lines
537	switch (map->type) {	537	switch (map->type) {
538	case _DRM_REGISTERS:	538	case _DRM_REGISTERS:
539	iounmap(map->handle);	539	iounmap(map->handle);
540	/* FALLTHROUGH */	540	fallthrough;
541	case _DRM_FRAME_BUFFER:	541	case _DRM_FRAME_BUFFER:
542	arch_phys_wc_del(map->mtrr);	542	arch_phys_wc_del(map->mtrr);
543	break;	543	break;

drivers/gpu/drm/drm_color_mgmt.c+1−1

@@ -294,7 +294,7 @@ int drm_mode_gamma_set_ioctl(struct drm_device *dev, · 293 unmodified lines
294	crtc->gamma_size, &ctx);	294	crtc->gamma_size, &ctx);
295		295
296	out:	296	out:
297	DRM_MODESET_LOCK_ALL_END(ctx, ret);	297	DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
298	return ret;	298	return ret;
299		299
300	}	300	}

drivers/gpu/drm/drm_crtc.c+1−3

 	if (crtc_req->mode_valid && !drm_lease_held(file_priv, plane->base.id))
 		return -EACCES;
-	mutex_lock(&crtc->dev->mode_config.mutex);
 	DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx,
 				   DRM_MODESET_ACQUIRE_INTERRUPTIBLE, ret);
 	fb = NULL;
 	mode = NULL;
-	DRM_MODESET_LOCK_ALL_END(ctx, ret);
+	DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
-	mutex_unlock(&crtc->dev->mode_config.mutex);
 	return ret;
 }

drivers/gpu/drm/drm_dp_helper.c+1−1

@@ -492,7 +492,7 @@ int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE], · 491 unmodified lines
492	case DP_DS_16BPC:	492	case DP_DS_16BPC:
493	return 16;	493	return 16;
494	}	494	}
495	/* fall through */	495	fallthrough;
496	default:	496	default:
497	return 0;	497	return 0;
498	}	498	}

drivers/gpu/drm/drm_dp_mst_topology.c+2−2

@@ -5040,8 +5040,8 @@ int drm_dp_mst_add_affected_dsc_crtcs(struct drm_atomic_state *state, struct drm · 5039 unmodified lines
5040		5040
5041	crtc = conn_state->crtc;	5041	crtc = conn_state->crtc;
5042		5042
5043	if (WARN_ON(!crtc))	5043	if (!crtc)
5044	return -EINVAL;	5044	continue;
5045		5045
5046	if (!drm_dp_mst_dsc_aux_for_port(pos->port))	5046	if (!drm_dp_mst_dsc_aux_for_port(pos->port))
5047	continue;	5047	continue;

drivers/gpu/drm/drm_mode_object.c+2−2

@@ -428,7 +428,7 @@ int drm_mode_obj_get_properties_ioctl(struct drm_device dev, void data, · 427 unmodified lines
428	out_unref:	428	out_unref:
429	drm_mode_object_put(obj);	429	drm_mode_object_put(obj);
430	out:	430	out:
431	DRM_MODESET_LOCK_ALL_END(ctx, ret);	431	DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
432	return ret;	432	return ret;
433	}	433	}
434		434
@@ -470,7 +470,7 @@ static int set_property_legacy(struct drm_mode_object *obj, · 35 unmodified lines
470	break;	470	break;
471	}	471	}
472	drm_property_change_valid_put(prop, ref);	472	drm_property_change_valid_put(prop, ref);
473	DRM_MODESET_LOCK_ALL_END(ctx, ret);	473	DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
474		474
475	return ret;	475	return ret;
476	}	476	}

drivers/gpu/drm/drm_modes.c+1−1

@@ -1930,7 +1930,7 @@ void drm_mode_convert_to_umode(struct drm_mode_modeinfo *out, · 1929 unmodified lines
1930	default:	1930	default:
1931	WARN(1, "Invalid aspect ratio (0%x) on mode\n",	1931	WARN(1, "Invalid aspect ratio (0%x) on mode\n",
1932	in->picture_aspect_ratio);	1932	in->picture_aspect_ratio);
1933	/* fall through */	1933	fallthrough;
1934	case HDMI_PICTURE_ASPECT_NONE:	1934	case HDMI_PICTURE_ASPECT_NONE:
1935	out->flags \|= DRM_MODE_FLAG_PIC_AR_NONE;	1935	out->flags \|= DRM_MODE_FLAG_PIC_AR_NONE;
1936	break;	1936	break;

drivers/gpu/drm/drm_plane.c+1−1

@@ -792,7 +792,7 @@ static int setplane_internal(struct drm_plane *plane, · 791 unmodified lines
792	crtc_x, crtc_y, crtc_w, crtc_h,	792	crtc_x, crtc_y, crtc_w, crtc_h,
793	src_x, src_y, src_w, src_h, &ctx);	793	src_x, src_y, src_w, src_h, &ctx);
794		794
795	DRM_MODESET_LOCK_ALL_END(ctx, ret);	795	DRM_MODESET_LOCK_ALL_END(plane->dev, ctx, ret);
796		796
797	return ret;	797	return ret;
798	}	798	}

drivers/gpu/drm/etnaviv/etnaviv_gpu.c+9−2

@@ -337,9 +337,16 @@ static void etnaviv_hw_identify(struct etnaviv_gpu *gpu) · 336 unmodified lines
337		337
338	gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL);	338	gpu->identity.model = gpu_read(gpu, VIVS_HI_CHIP_MODEL);
339	gpu->identity.revision = gpu_read(gpu, VIVS_HI_CHIP_REV);	339	gpu->identity.revision = gpu_read(gpu, VIVS_HI_CHIP_REV);
340	gpu->identity.product_id = gpu_read(gpu, VIVS_HI_CHIP_PRODUCT_ID);
341	gpu->identity.customer_id = gpu_read(gpu, VIVS_HI_CHIP_CUSTOMER_ID);	340	gpu->identity.customer_id = gpu_read(gpu, VIVS_HI_CHIP_CUSTOMER_ID);
342	gpu->identity.eco_id = gpu_read(gpu, VIVS_HI_CHIP_ECO_ID);	341
		342	/*
		343	* Reading these two registers on GC600 rev 0x19 result in a
		344	* unhandled fault: external abort on non-linefetch
		345	*/
		346	if (!etnaviv_is_model_rev(gpu, GC600, 0x19)) {
		347	gpu->identity.product_id = gpu_read(gpu, VIVS_HI_CHIP_PRODUCT_ID);
		348	gpu->identity.eco_id = gpu_read(gpu, VIVS_HI_CHIP_ECO_ID);
		349	}
343		350
344	/*	351	/*
345	* !!!! HACK ALERT !!!!	352	* !!!! HACK ALERT !!!!

drivers/gpu/drm/etnaviv/etnaviv_sched.c+6−5

 	u32 dma_addr;
 	int change;
+	/* block scheduler */
+	drm_sched_stop(&gpu->sched, sched_job);
 	/*
 	 * If the GPU managed to complete this jobs fence, the timout is
 	 * spurious. Bail out.
 	 */
 	if (dma_fence_is_signaled(submit->out_fence))
-		return;
+		goto out_no_timeout;
 	/*
 	 * If the GPU is still making forward progress on the front-end (which
 	change = dma_addr - gpu->hangcheck_dma_addr;
 	if (change < 0 || change > 16) {
 		gpu->hangcheck_dma_addr = dma_addr;
-		return;
+		goto out_no_timeout;
 	}
-	/* block scheduler */
-	drm_sched_stop(&gpu->sched, sched_job);
 	if(sched_job)
 		drm_sched_increase_karma(sched_job);
 	drm_sched_resubmit_jobs(&gpu->sched);
+out_no_timeout:
 	/* restart scheduler after GPU is usable again */
 	drm_sched_start(&gpu->sched, true);
 }

drivers/gpu/drm/exynos/exynos_drm_dsi.c+5−5

@@ -987,10 +987,10 @@ static void exynos_dsi_send_to_fifo(struct exynos_dsi *dsi, · 986 unmodified lines
987	switch (length) {	987	switch (length) {
988	case 3:	988	case 3:
989	reg \|= payload[2] << 16;	989	reg \|= payload[2] << 16;
990	/* Fall through */	990	fallthrough;
991	case 2:	991	case 2:
992	reg \|= payload[1] << 8;	992	reg \|= payload[1] << 8;
993	/* Fall through */	993	fallthrough;
994	case 1:	994	case 1:
995	reg \|= payload[0];	995	reg \|= payload[0];
996	exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg);	996	exynos_dsi_write(dsi, DSIM_PAYLOAD_REG, reg);
@@ -1038,7 +1038,7 @@ static void exynos_dsi_read_from_fifo(struct exynos_dsi *dsi, · 41 unmodified lines
1038	payload[1] = reg >> 16;	1038	payload[1] = reg >> 16;
1039	++xfer->rx_done;	1039	++xfer->rx_done;
1040	}	1040	}
1041	/* Fall through */	1041	fallthrough;
1042	case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE:	1042	case MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE:
1043	case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE:	1043	case MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE:
1044	payload[0] = reg >> 8;	1044	payload[0] = reg >> 8;
@@ -1082,10 +1082,10 @@ static void exynos_dsi_read_from_fifo(struct exynos_dsi *dsi, · 37 unmodified lines
1082	switch (length) {	1082	switch (length) {
1083	case 3:	1083	case 3:
1084	payload[2] = (reg >> 16) & 0xff;	1084	payload[2] = (reg >> 16) & 0xff;
1085	/* Fall through */	1085	fallthrough;
1086	case 2:	1086	case 2:
1087	payload[1] = (reg >> 8) & 0xff;	1087	payload[1] = (reg >> 8) & 0xff;
1088	/* Fall through */	1088	fallthrough;
1089	case 1:	1089	case 1:
1090	payload[0] = reg & 0xff;	1090	payload[0] = reg & 0xff;
1091	}	1091	}

drivers/gpu/drm/exynos/exynos_drm_fbdev.c+1−1

@@ -92,7 +92,7 @@ static int exynos_drm_fbdev_update(struct drm_fb_helper *helper, · 91 unmodified lines
92	offset = fbi->var.xoffset * fb->format->cpp[0];	92	offset = fbi->var.xoffset * fb->format->cpp[0];
93	offset += fbi->var.yoffset * fb->pitches[0];	93	offset += fbi->var.yoffset * fb->pitches[0];
94		94
95	fbi->screen_base = exynos_gem->kvaddr + offset;	95	fbi->screen_buffer = exynos_gem->kvaddr + offset;
96	fbi->screen_size = size;	96	fbi->screen_size = size;
97	fbi->fix.smem_len = size;	97	fbi->fix.smem_len = size;
98		98

drivers/gpu/drm/exynos/exynos_drm_gem.h+1−1

@@ -40,7 +40,7 @@ struct exynos_drm_gem { · 39 unmodified lines
40	unsigned int flags;	40	unsigned int flags;
41	unsigned long size;	41	unsigned long size;
42	void *cookie;	42	void *cookie;
43	void __iomem *kvaddr;	43	void *kvaddr;
44	dma_addr_t dma_addr;	44	dma_addr_t dma_addr;
45	unsigned long dma_attrs;	45	unsigned long dma_attrs;
46	struct sg_table *sgt;	46	struct sg_table *sgt;

drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c+3−3

@@ -101,19 +101,19 @@ static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane, · 100 unmodified lines
101	break;	101	break;
102	case DRM_FORMAT_ARGB8888:	102	case DRM_FORMAT_ARGB8888:
103	alpha = DCU_LAYER_AB_WHOLE_FRAME;	103	alpha = DCU_LAYER_AB_WHOLE_FRAME;
104	/* fall-through */	104	fallthrough;
105	case DRM_FORMAT_XRGB8888:	105	case DRM_FORMAT_XRGB8888:
106	bpp = FSL_DCU_ARGB8888;	106	bpp = FSL_DCU_ARGB8888;
107	break;	107	break;
108	case DRM_FORMAT_ARGB4444:	108	case DRM_FORMAT_ARGB4444:
109	alpha = DCU_LAYER_AB_WHOLE_FRAME;	109	alpha = DCU_LAYER_AB_WHOLE_FRAME;
110	/* fall-through */	110	fallthrough;
111	case DRM_FORMAT_XRGB4444:	111	case DRM_FORMAT_XRGB4444:
112	bpp = FSL_DCU_ARGB4444;	112	bpp = FSL_DCU_ARGB4444;
113	break;	113	break;
114	case DRM_FORMAT_ARGB1555:	114	case DRM_FORMAT_ARGB1555:
115	alpha = DCU_LAYER_AB_WHOLE_FRAME;	115	alpha = DCU_LAYER_AB_WHOLE_FRAME;
116	/* fall-through */	116	fallthrough;
117	case DRM_FORMAT_XRGB1555:	117	case DRM_FORMAT_XRGB1555:
118	bpp = FSL_DCU_ARGB1555;	118	bpp = FSL_DCU_ARGB1555;
119	break;	119	break;

drivers/gpu/drm/i915/display/icl_dsi.c+3−3

@@ -712,7 +712,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, · 711 unmodified lines
712	switch (intel_dsi->pixel_format) {	712	switch (intel_dsi->pixel_format) {
713	default:	713	default:
714	MISSING_CASE(intel_dsi->pixel_format);	714	MISSING_CASE(intel_dsi->pixel_format);
715	/* fallthrough */	715	fallthrough;
716	case MIPI_DSI_FMT_RGB565:	716	case MIPI_DSI_FMT_RGB565:
717	tmp \|= PIX_FMT_RGB565;	717	tmp \|= PIX_FMT_RGB565;
718	break;	718	break;
@@ -739,7 +739,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, · 20 unmodified lines
739	switch (intel_dsi->video_mode_format) {	739	switch (intel_dsi->video_mode_format) {
740	default:	740	default:
741	MISSING_CASE(intel_dsi->video_mode_format);	741	MISSING_CASE(intel_dsi->video_mode_format);
742	/* fallthrough */	742	fallthrough;
743	case VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS:	743	case VIDEO_MODE_NON_BURST_WITH_SYNC_EVENTS:
744	tmp \|= VIDEO_MODE_SYNC_EVENT;	744	tmp \|= VIDEO_MODE_SYNC_EVENT;
745	break;	745	break;
@@ -792,7 +792,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, · 46 unmodified lines
792	switch (pipe) {	792	switch (pipe) {
793	default:	793	default:
794	MISSING_CASE(pipe);	794	MISSING_CASE(pipe);
795	/* fallthrough */	795	fallthrough;
796	case PIPE_A:	796	case PIPE_A:
797	tmp \|= TRANS_DDI_EDP_INPUT_A_ON;	797	tmp \|= TRANS_DDI_EDP_INPUT_A_ON;
798	break;	798	break;

drivers/gpu/drm/i915/display/intel_bios.c+3−3

@@ -905,7 +905,7 @@ parse_psr(struct drm_i915_private dev_priv, const struct bdb_header bdb) · 904 unmodified lines
905	drm_dbg_kms(&dev_priv->drm,	905	drm_dbg_kms(&dev_priv->drm,
906	"VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",	906	"VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
907	psr_table->tp1_wakeup_time);	907	psr_table->tp1_wakeup_time);
908	/* fallthrough */	908	fallthrough;
909	case 2:	909	case 2:
910	dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;	910	dev_priv->vbt.psr.tp1_wakeup_time_us = 2500;
911	break;	911	break;
@@ -925,7 +925,7 @@ parse_psr(struct drm_i915_private dev_priv, const struct bdb_header bdb) · 13 unmodified lines
925	drm_dbg_kms(&dev_priv->drm,	925	drm_dbg_kms(&dev_priv->drm,
926	"VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",	926	"VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
927	psr_table->tp2_tp3_wakeup_time);	927	psr_table->tp2_tp3_wakeup_time);
928	/* fallthrough */	928	fallthrough;
929	case 2:	929	case 2:
930	dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;	930	dev_priv->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
931	break;	931	break;
@@ -1775,7 +1775,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv, · 843 unmodified lines
1775	switch (child->hdmi_max_data_rate) {	1775	switch (child->hdmi_max_data_rate) {
1776	default:	1776	default:
1777	MISSING_CASE(child->hdmi_max_data_rate);	1777	MISSING_CASE(child->hdmi_max_data_rate);
1778	/* fall through */	1778	fallthrough;
1779	case HDMI_MAX_DATA_RATE_PLATFORM:	1779	case HDMI_MAX_DATA_RATE_PLATFORM:
1780	max_tmds_clock = 0;	1780	max_tmds_clock = 0;
1781	break;	1781	break;

drivers/gpu/drm/i915/display/intel_cdclk.c+5−5

@@ -326,7 +326,7 @@ static void pnv_get_cdclk(struct drm_i915_private *dev_priv, · 325 unmodified lines
326	default:	326	default:
327	drm_err(&dev_priv->drm,	327	drm_err(&dev_priv->drm,
328	"Unknown pnv display core clock 0x%04x\n", gcfgc);	328	"Unknown pnv display core clock 0x%04x\n", gcfgc);
329	/* fall through */	329	fallthrough;
330	case GC_DISPLAY_CLOCK_133_MHZ_PNV:	330	case GC_DISPLAY_CLOCK_133_MHZ_PNV:
331	cdclk_config->cdclk = 133333;	331	cdclk_config->cdclk = 133333;
332	break;	332	break;
@@ -766,7 +766,7 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv, · 433 unmodified lines
766	switch (cdclk) {	766	switch (cdclk) {
767	default:	767	default:
768	MISSING_CASE(cdclk);	768	MISSING_CASE(cdclk);
769	/* fall through */	769	fallthrough;
770	case 337500:	770	case 337500:
771	val \|= LCPLL_CLK_FREQ_337_5_BDW;	771	val \|= LCPLL_CLK_FREQ_337_5_BDW;
772	break;	772	break;
@@ -1042,7 +1042,7 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv, · 269 unmodified lines
1042	drm_WARN_ON(&dev_priv->drm,	1042	drm_WARN_ON(&dev_priv->drm,
1043	cdclk != dev_priv->cdclk.hw.bypass);	1043	cdclk != dev_priv->cdclk.hw.bypass);
1044	drm_WARN_ON(&dev_priv->drm, vco != 0);	1044	drm_WARN_ON(&dev_priv->drm, vco != 0);
1045	/* fall through */	1045	fallthrough;
1046	case 308571:	1046	case 308571:
1047	case 337500:	1047	case 337500:
1048	freq_select = CDCLK_FREQ_337_308;	1048	freq_select = CDCLK_FREQ_337_308;
@@ -1333,7 +1333,7 @@ static void icl_readout_refclk(struct drm_i915_private *dev_priv, · 284 unmodified lines
1333	switch (dssm) {	1333	switch (dssm) {
1334	default:	1334	default:
1335	MISSING_CASE(dssm);	1335	MISSING_CASE(dssm);
1336	/* fall through */	1336	fallthrough;
1337	case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:	1337	case ICL_DSSM_CDCLK_PLL_REFCLK_24MHz:
1338	cdclk_config->ref = 24000;	1338	cdclk_config->ref = 24000;
1339	break;	1339	break;
@@ -1561,7 +1561,7 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv, · 221 unmodified lines
1561	drm_WARN_ON(&dev_priv->drm,	1561	drm_WARN_ON(&dev_priv->drm,
1562	cdclk != dev_priv->cdclk.hw.bypass);	1562	cdclk != dev_priv->cdclk.hw.bypass);
1563	drm_WARN_ON(&dev_priv->drm, vco != 0);	1563	drm_WARN_ON(&dev_priv->drm, vco != 0);
1564	/* fall through */	1564	fallthrough;
1565	case 2:	1565	case 2:
1566	divider = BXT_CDCLK_CD2X_DIV_SEL_1;	1566	divider = BXT_CDCLK_CD2X_DIV_SEL_1;
1567	break;	1567	break;

drivers/gpu/drm/i915/display/intel_combo_phy.c+5−5

@@ -52,7 +52,7 @@ cnl_get_procmon_ref_values(struct drm_i915_private *dev_priv, enum phy phy) · 51 unmodified lines
52	switch (val & (PROCESS_INFO_MASK \| VOLTAGE_INFO_MASK)) {	52	switch (val & (PROCESS_INFO_MASK \| VOLTAGE_INFO_MASK)) {
53	default:	53	default:
54	MISSING_CASE(val);	54	MISSING_CASE(val);
55	/* fall through */	55	fallthrough;
56	case VOLTAGE_INFO_0_85V \| PROCESS_INFO_DOT_0:	56	case VOLTAGE_INFO_0_85V \| PROCESS_INFO_DOT_0:
57	procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];	57	procmon = &cnl_procmon_values[PROCMON_0_85V_DOT_0];
58	break;	58	break;
@@ -258,7 +258,7 @@ static bool phy_is_master(struct drm_i915_private *dev_priv, enum phy phy) · 199 unmodified lines
258	static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,	258	static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv,
259	enum phy phy)	259	enum phy phy)
260	{	260	{
261	bool ret;	261	bool ret = true;
262	u32 expected_val = 0;	262	u32 expected_val = 0;
263		263
264	if (!icl_combo_phy_enabled(dev_priv, phy))	264	if (!icl_combo_phy_enabled(dev_priv, phy))
@@ -276,7 +276,7 @@ static bool icl_combo_phy_verify_state(struct drm_i915_private *dev_priv, · 11 unmodified lines
276	DCC_MODE_SELECT_CONTINUOSLY);	276	DCC_MODE_SELECT_CONTINUOSLY);
277	}	277	}
278		278
279	ret = cnl_verify_procmon_ref_values(dev_priv, phy);	279	ret &= cnl_verify_procmon_ref_values(dev_priv, phy);
280		280
281	if (phy_is_master(dev_priv, phy)) {	281	if (phy_is_master(dev_priv, phy)) {
282	ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),	282	ret &= check_phy_reg(dev_priv, phy, ICL_PORT_COMP_DW8(phy),
@@ -320,7 +320,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, · 37 unmodified lines
320	break;	320	break;
321	default:	321	default:
322	MISSING_CASE(lane_count);	322	MISSING_CASE(lane_count);
323	/* fall-through */	323	fallthrough;
324	case 4:	324	case 4:
325	lane_mask = PWR_UP_ALL_LANES;	325	lane_mask = PWR_UP_ALL_LANES;
326	break;	326	break;
@@ -337,7 +337,7 @@ void intel_combo_phy_power_up_lanes(struct drm_i915_private *dev_priv, · 10 unmodified lines
337	break;	337	break;
338	default:	338	default:
339	MISSING_CASE(lane_count);	339	MISSING_CASE(lane_count);
340	/* fall-through */	340	fallthrough;
341	case 4:	341	case 4:
342	lane_mask = PWR_UP_ALL_LANES;	342	lane_mask = PWR_UP_ALL_LANES;
343	break;	343	break;

drivers/gpu/drm/i915/display/intel_ddi.c+2−2

@@ -1941,7 +1941,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder, · 1940 unmodified lines
1941	switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {	1941	switch (tmp & TRANS_DDI_EDP_INPUT_MASK) {
1942	default:	1942	default:
1943	MISSING_CASE(tmp & TRANS_DDI_EDP_INPUT_MASK);	1943	MISSING_CASE(tmp & TRANS_DDI_EDP_INPUT_MASK);
1944	/* fallthrough */	1944	fallthrough;
1945	case TRANS_DDI_EDP_INPUT_A_ON:	1945	case TRANS_DDI_EDP_INPUT_A_ON:
1946	case TRANS_DDI_EDP_INPUT_A_ONOFF:	1946	case TRANS_DDI_EDP_INPUT_A_ONOFF:
1947	*pipe_mask = BIT(PIPE_A);	1947	*pipe_mask = BIT(PIPE_A);
@@ -4332,7 +4332,7 @@ void intel_ddi_get_config(struct intel_encoder *encoder, · 2384 unmodified lines
4332	pipe_config->hdmi_scrambling = true;	4332	pipe_config->hdmi_scrambling = true;
4333	if (temp & TRANS_DDI_HIGH_TMDS_CHAR_RATE)	4333	if (temp & TRANS_DDI_HIGH_TMDS_CHAR_RATE)
4334	pipe_config->hdmi_high_tmds_clock_ratio = true;	4334	pipe_config->hdmi_high_tmds_clock_ratio = true;
4335	/* fall through */	4335	fallthrough;
4336	case TRANS_DDI_MODE_SELECT_DVI:	4336	case TRANS_DDI_MODE_SELECT_DVI:
4337	pipe_config->output_types \|= BIT(INTEL_OUTPUT_HDMI);	4337	pipe_config->output_types \|= BIT(INTEL_OUTPUT_HDMI);
4338	pipe_config->lane_count = 4;	4338	pipe_config->lane_count = 4;

drivers/gpu/drm/i915/display/intel_display.c+10−10

@@ -2030,12 +2030,12 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane) · 2029 unmodified lines
2030	case I915_FORMAT_MOD_Y_TILED_CCS:	2030	case I915_FORMAT_MOD_Y_TILED_CCS:
2031	if (is_ccs_plane(fb, color_plane))	2031	if (is_ccs_plane(fb, color_plane))
2032	return 128;	2032	return 128;
2033	/* fall through */	2033	fallthrough;
2034	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:	2034	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
2035	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:	2035	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
2036	if (is_ccs_plane(fb, color_plane))	2036	if (is_ccs_plane(fb, color_plane))
2037	return 64;	2037	return 64;
2038	/* fall through */	2038	fallthrough;
2039	case I915_FORMAT_MOD_Y_TILED:	2039	case I915_FORMAT_MOD_Y_TILED:
2040	if (IS_GEN(dev_priv, 2) \|\| HAS_128_BYTE_Y_TILING(dev_priv))	2040	if (IS_GEN(dev_priv, 2) \|\| HAS_128_BYTE_Y_TILING(dev_priv))
2041	return 128;	2041	return 128;
@@ -2044,7 +2044,7 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, int color_plane) · 2 unmodified lines
2044	case I915_FORMAT_MOD_Yf_TILED_CCS:	2044	case I915_FORMAT_MOD_Yf_TILED_CCS:
2045	if (is_ccs_plane(fb, color_plane))	2045	if (is_ccs_plane(fb, color_plane))
2046	return 128;	2046	return 128;
2047	/* fall through */	2047	fallthrough;
2048	case I915_FORMAT_MOD_Yf_TILED:	2048	case I915_FORMAT_MOD_Yf_TILED:
2049	switch (cpp) {	2049	switch (cpp) {
2050	case 1:	2050	case 1:
@@ -2186,7 +2186,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, · 135 unmodified lines
2186	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:	2186	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
2187	if (is_semiplanar_uv_plane(fb, color_plane))	2187	if (is_semiplanar_uv_plane(fb, color_plane))
2188	return intel_tile_row_size(fb, color_plane);	2188	return intel_tile_row_size(fb, color_plane);
2189	/* Fall-through */	2189	fallthrough;
2190	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:	2190	case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
2191	return 16 * 1024;	2191	return 16 * 1024;
2192	case I915_FORMAT_MOD_Y_TILED_CCS:	2192	case I915_FORMAT_MOD_Y_TILED_CCS:
@@ -2195,7 +2195,7 @@ static unsigned int intel_surf_alignment(const struct drm_framebuffer *fb, · 2 unmodified lines
2195	if (INTEL_GEN(dev_priv) >= 12 &&	2195	if (INTEL_GEN(dev_priv) >= 12 &&
2196	is_semiplanar_uv_plane(fb, color_plane))	2196	is_semiplanar_uv_plane(fb, color_plane))
2197	return intel_tile_row_size(fb, color_plane);	2197	return intel_tile_row_size(fb, color_plane);
2198	/* Fall-through */	2198	fallthrough;
2199	case I915_FORMAT_MOD_Yf_TILED:	2199	case I915_FORMAT_MOD_Yf_TILED:
2200	return 1 * 1024 * 1024;	2200	return 1 * 1024 * 1024;
2201	default:	2201	default:
@@ -6252,7 +6252,7 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state, · 4050 unmodified lines
6252	case DRM_FORMAT_ARGB16161616F:	6252	case DRM_FORMAT_ARGB16161616F:
6253	if (INTEL_GEN(dev_priv) >= 11)	6253	if (INTEL_GEN(dev_priv) >= 11)
6254	break;	6254	break;
6255	/* fall through */	6255	fallthrough;
6256	default:	6256	default:
6257	drm_dbg_kms(&dev_priv->drm,	6257	drm_dbg_kms(&dev_priv->drm,
6258	"[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",	6258	"[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
@@ -10946,7 +10946,7 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port, · 4687 unmodified lines
10946	break;	10946	break;
10947	default:	10947	default:
10948	MISSING_CASE(ddi_pll_sel);	10948	MISSING_CASE(ddi_pll_sel);
10949	/* fall through */	10949	fallthrough;
10950	case PORT_CLK_SEL_NONE:	10950	case PORT_CLK_SEL_NONE:
10951	return;	10951	return;
10952	}	10952	}
@@ -11006,10 +11006,10 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc, · 53 unmodified lines
11006	drm_WARN(dev, 1,	11006	drm_WARN(dev, 1,
11007	"unknown pipe linked to transcoder %s\n",	11007	"unknown pipe linked to transcoder %s\n",
11008	transcoder_name(panel_transcoder));	11008	transcoder_name(panel_transcoder));
11009	/* fall through */	11009	fallthrough;
11010	case TRANS_DDI_EDP_INPUT_A_ONOFF:	11010	case TRANS_DDI_EDP_INPUT_A_ONOFF:
11011	force_thru = true;	11011	force_thru = true;
11012	/* fall through */	11012	fallthrough;
11013	case TRANS_DDI_EDP_INPUT_A_ON:	11013	case TRANS_DDI_EDP_INPUT_A_ON:
11014	trans_pipe = PIPE_A;	11014	trans_pipe = PIPE_A;
11015	break;	11015	break;
@@ -13236,7 +13236,7 @@ static bool check_digital_port_conflicts(struct intel_atomic_state *state) · 2220 unmodified lines
13236	case INTEL_OUTPUT_DDI:	13236	case INTEL_OUTPUT_DDI:
13237	if (drm_WARN_ON(dev, !HAS_DDI(to_i915(dev))))	13237	if (drm_WARN_ON(dev, !HAS_DDI(to_i915(dev))))
13238	break;	13238	break;
13239	/* else, fall through */	13239	fallthrough;
13240	case INTEL_OUTPUT_DP:	13240	case INTEL_OUTPUT_DP:
13241	case INTEL_OUTPUT_HDMI:	13241	case INTEL_OUTPUT_HDMI:
13242	case INTEL_OUTPUT_EDP:	13242	case INTEL_OUTPUT_EDP:

drivers/gpu/drm/i915/display/intel_dpll_mgr.c+4−4

@@ -892,7 +892,7 @@ static int hsw_ddi_wrpll_get_freq(struct drm_i915_private *dev_priv, · 891 unmodified lines
892	refclk = dev_priv->dpll.ref_clks.nssc;	892	refclk = dev_priv->dpll.ref_clks.nssc;
893	break;	893	break;
894	}	894	}
895	/* fall through */	895	fallthrough;
896	case WRPLL_REF_PCH_SSC:	896	case WRPLL_REF_PCH_SSC:
897	/*	897	/*
898	* We could calculate spread here, but our checking	898	* We could calculate spread here, but our checking
@@ -2977,7 +2977,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state, · 2078 unmodified lines
2977	switch (dev_priv->dpll.ref_clks.nssc) {	2977	switch (dev_priv->dpll.ref_clks.nssc) {
2978	default:	2978	default:
2979	MISSING_CASE(dev_priv->dpll.ref_clks.nssc);	2979	MISSING_CASE(dev_priv->dpll.ref_clks.nssc);
2980	/* fall-through */	2980	fallthrough;
2981	case 19200:	2981	case 19200:
2982	*pll_params = tgl_tbt_pll_19_2MHz_values;	2982	*pll_params = tgl_tbt_pll_19_2MHz_values;
2983	break;	2983	break;
@@ -2992,7 +2992,7 @@ static bool icl_calc_tbt_pll(struct intel_crtc_state *crtc_state, · 8 unmodified lines
2992	switch (dev_priv->dpll.ref_clks.nssc) {	2992	switch (dev_priv->dpll.ref_clks.nssc) {
2993	default:	2993	default:
2994	MISSING_CASE(dev_priv->dpll.ref_clks.nssc);	2994	MISSING_CASE(dev_priv->dpll.ref_clks.nssc);
2995	/* fall-through */	2995	fallthrough;
2996	case 19200:	2996	case 19200:
2997	case 38400:	2997	case 38400:
2998	*pll_params = icl_tbt_pll_19_2MHz_values;	2998	*pll_params = icl_tbt_pll_19_2MHz_values;
@@ -3120,7 +3120,7 @@ static bool icl_mg_pll_find_divisors(int clock_khz, bool is_dp, bool use_ssc, · 121 unmodified lines
3120	switch (div1) {	3120	switch (div1) {
3121	default:	3121	default:
3122	MISSING_CASE(div1);	3122	MISSING_CASE(div1);
3123	/* fall through */	3123	fallthrough;
3124	case 2:	3124	case 2:
3125	hsdiv = MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_2;	3125	hsdiv = MG_CLKTOP2_HSCLKCTL_HSDIV_RATIO_2;
3126	break;	3126	break;

drivers/gpu/drm/i915/display/intel_hdcp.c+26−6

 		/* Fill up the empty slots in sha_text and write it out */
 		sha_empty = sizeof(sha_text) - sha_leftovers;
-		for (j = 0; j < sha_empty; j++)
+		for (j = 0; j < sha_empty; j++) {
-			sha_text |= ksv[j] << ((sizeof(sha_text) - j - 1) * 8);
+			u8 off = ((sizeof(sha_text) - j - 1 - sha_leftovers) * 8);
+			sha_text |= ksv[j] << off;
+		}
 		ret = intel_write_sha_text(dev_priv, sha_text);
 		if (ret < 0)
 		/* Write 32 bits of text */
 		intel_de_write(dev_priv, HDCP_REP_CTL,
 			       rep_ctl | HDCP_SHA1_TEXT_32);
-		sha_text |= bstatus[0] << 24 | bstatus[1] << 16;
+		sha_text |= bstatus[0] << 8 | bstatus[1];
 		ret = intel_write_sha_text(dev_priv, sha_text);
 		if (ret < 0)
 			return ret;
 				return ret;
 			sha_idx += sizeof(sha_text);
 		}
+		/*
+		 * Terminate the SHA-1 stream by hand. For the other leftover
+		 * cases this is appended by the hardware.
+		 */
+		intel_de_write(dev_priv, HDCP_REP_CTL,
+			       rep_ctl | HDCP_SHA1_TEXT_32);
+		sha_text = DRM_HDCP_SHA1_TERMINATOR << 24;
+		ret = intel_write_sha_text(dev_priv, sha_text);
+		if (ret < 0)
+			return ret;
+		sha_idx += sizeof(sha_text);
 	} else if (sha_leftovers == 3) {
-		/* Write 32 bits of text */
+		/* Write 32 bits of text (filled from LSB) */
 		intel_de_write(dev_priv, HDCP_REP_CTL,
 			       rep_ctl | HDCP_SHA1_TEXT_32);
-		sha_text |= bstatus[0] << 24;
+		sha_text |= bstatus[0];
 		ret = intel_write_sha_text(dev_priv, sha_text);
 		if (ret < 0)
 			return ret;
 		sha_idx += sizeof(sha_text);
-		/* Write 8 bits of text, 24 bits of M0 */
+		/* Write 8 bits of text (filled from LSB), 24 bits of M0 */
 		intel_de_write(dev_priv, HDCP_REP_CTL,
 			       rep_ctl | HDCP_SHA1_TEXT_8);
 		ret = intel_write_sha_text(dev_priv, bstatus[1]);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = dig_port->base.port;
 	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
+	u32 repeater_ctl;
 	int ret;
 	drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
 		return -ETIMEDOUT;
 	}
+	repeater_ctl = intel_hdcp_get_repeater_ctl(dev_priv, cpu_transcoder,
+						   port);
+	intel_de_write(dev_priv, HDCP_REP_CTL,
+		       intel_de_read(dev_priv, HDCP_REP_CTL) & ~repeater_ctl);
 	ret = hdcp->shim->toggle_signalling(dig_port, false);
 	if (ret) {
 		drm_err(&dev_priv->drm, "Failed to disable HDCP signalling\n");

drivers/gpu/drm/i915/display/intel_panel.c+1−1

@@ -229,7 +229,7 @@ int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, · 228 unmodified lines
229	case DRM_MODE_SCALE_NONE:	229	case DRM_MODE_SCALE_NONE:
230	WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);	230	WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w);
231	WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);	231	WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h);
232	/* fall through */	232	fallthrough;
233	case DRM_MODE_SCALE_FULLSCREEN:	233	case DRM_MODE_SCALE_FULLSCREEN:
234	x = y = 0;	234	x = y = 0;
235	width = adjusted_mode->crtc_hdisplay;	235	width = adjusted_mode->crtc_hdisplay;

drivers/gpu/drm/i915/display/intel_sdvo.c+6−6

@@ -1531,7 +1531,7 @@ static void intel_sdvo_pre_enable(struct intel_atomic_state *state, · 1530 unmodified lines
1531	default:	1531	default:
1532	drm_WARN(&dev_priv->drm, 1,	1532	drm_WARN(&dev_priv->drm, 1,
1533	"unknown pixel multiplier specified\n");	1533	"unknown pixel multiplier specified\n");
1534	/* fall through */	1534	fallthrough;
1535	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;	1535	case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1536	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;	1536	case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1537	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;	1537	case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
@@ -2549,19 +2549,19 @@ intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo) · 1011 unmodified lines
2549	switch (sdvo->controlled_output) {	2549	switch (sdvo->controlled_output) {
2550	case SDVO_OUTPUT_LVDS1:	2550	case SDVO_OUTPUT_LVDS1:
2551	mask \|= SDVO_OUTPUT_LVDS1;	2551	mask \|= SDVO_OUTPUT_LVDS1;
2552	/* fall through */	2552	fallthrough;
2553	case SDVO_OUTPUT_LVDS0:	2553	case SDVO_OUTPUT_LVDS0:
2554	mask \|= SDVO_OUTPUT_LVDS0;	2554	mask \|= SDVO_OUTPUT_LVDS0;
2555	/* fall through */	2555	fallthrough;
2556	case SDVO_OUTPUT_TMDS1:	2556	case SDVO_OUTPUT_TMDS1:
2557	mask \|= SDVO_OUTPUT_TMDS1;	2557	mask \|= SDVO_OUTPUT_TMDS1;
2558	/* fall through */	2558	fallthrough;
2559	case SDVO_OUTPUT_TMDS0:	2559	case SDVO_OUTPUT_TMDS0:
2560	mask \|= SDVO_OUTPUT_TMDS0;	2560	mask \|= SDVO_OUTPUT_TMDS0;
2561	/* fall through */	2561	fallthrough;
2562	case SDVO_OUTPUT_RGB1:	2562	case SDVO_OUTPUT_RGB1:
2563	mask \|= SDVO_OUTPUT_RGB1;	2563	mask \|= SDVO_OUTPUT_RGB1;
2564	/* fall through */	2564	fallthrough;
2565	case SDVO_OUTPUT_RGB0:	2565	case SDVO_OUTPUT_RGB0:
2566	mask \|= SDVO_OUTPUT_RGB0;	2566	mask \|= SDVO_OUTPUT_RGB0;
2567	break;	2567	break;

drivers/gpu/drm/i915/display/intel_sprite.c+11−11

@@ -2147,7 +2147,7 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state, · 2146 unmodified lines
2147	case DRM_FORMAT_RGB565:	2147	case DRM_FORMAT_RGB565:
2148	if (INTEL_GEN(dev_priv) >= 11)	2148	if (INTEL_GEN(dev_priv) >= 11)
2149	break;	2149	break;
2150	/* fall through */	2150	fallthrough;
2151	case DRM_FORMAT_C8:	2151	case DRM_FORMAT_C8:
2152	case DRM_FORMAT_XRGB16161616F:	2152	case DRM_FORMAT_XRGB16161616F:
2153	case DRM_FORMAT_XBGR16161616F:	2153	case DRM_FORMAT_XBGR16161616F:
@@ -2702,7 +2702,7 @@ static bool g4x_sprite_format_mod_supported(struct drm_plane *_plane, · 548 unmodified lines
2702	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|	2702	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|
2703	modifier == I915_FORMAT_MOD_X_TILED)	2703	modifier == I915_FORMAT_MOD_X_TILED)
2704	return true;	2704	return true;
2705	/* fall through */	2705	fallthrough;
2706	default:	2706	default:
2707	return false;	2707	return false;
2708	}	2708	}
@@ -2733,7 +2733,7 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane, · 24 unmodified lines
2733	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|	2733	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|
2734	modifier == I915_FORMAT_MOD_X_TILED)	2734	modifier == I915_FORMAT_MOD_X_TILED)
2735	return true;	2735	return true;
2736	/* fall through */	2736	fallthrough;
2737	default:	2737	default:
2738	return false;	2738	return false;
2739	}	2739	}
@@ -2768,7 +2768,7 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane, · 28 unmodified lines
2768	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|	2768	if (modifier == DRM_FORMAT_MOD_LINEAR \|\|
2769	modifier == I915_FORMAT_MOD_X_TILED)	2769	modifier == I915_FORMAT_MOD_X_TILED)
2770	return true;	2770	return true;
2771	/* fall through */	2771	fallthrough;
2772	default:	2772	default:
2773	return false;	2773	return false;
2774	}	2774	}
@@ -2801,7 +2801,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 26 unmodified lines
2801	case DRM_FORMAT_ABGR8888:	2801	case DRM_FORMAT_ABGR8888:
2802	if (is_ccs_modifier(modifier))	2802	if (is_ccs_modifier(modifier))
2803	return true;	2803	return true;
2804	/* fall through */	2804	fallthrough;
2805	case DRM_FORMAT_RGB565:	2805	case DRM_FORMAT_RGB565:
2806	case DRM_FORMAT_XRGB2101010:	2806	case DRM_FORMAT_XRGB2101010:
2807	case DRM_FORMAT_XBGR2101010:	2807	case DRM_FORMAT_XBGR2101010:
@@ -2819,7 +2819,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 11 unmodified lines
2819	case DRM_FORMAT_XVYU2101010:	2819	case DRM_FORMAT_XVYU2101010:
2820	if (modifier == I915_FORMAT_MOD_Yf_TILED)	2820	if (modifier == I915_FORMAT_MOD_Yf_TILED)
2821	return true;	2821	return true;
2822	/* fall through */	2822	fallthrough;
2823	case DRM_FORMAT_C8:	2823	case DRM_FORMAT_C8:
2824	case DRM_FORMAT_XBGR16161616F:	2824	case DRM_FORMAT_XBGR16161616F:
2825	case DRM_FORMAT_ABGR16161616F:	2825	case DRM_FORMAT_ABGR16161616F:
@@ -2834,7 +2834,7 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane, · 8 unmodified lines
2834	modifier == I915_FORMAT_MOD_X_TILED \|\|	2834	modifier == I915_FORMAT_MOD_X_TILED \|\|
2835	modifier == I915_FORMAT_MOD_Y_TILED)	2835	modifier == I915_FORMAT_MOD_Y_TILED)
2836	return true;	2836	return true;
2837	/* fall through */	2837	fallthrough;
2838	default:	2838	default:
2839	return false;	2839	return false;
2840	}	2840	}
@@ -2861,7 +2861,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 20 unmodified lines
2861	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:	2861	case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
2862	if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id))	2862	if (!gen12_plane_supports_mc_ccs(dev_priv, plane->id))
2863	return false;	2863	return false;
2864	/* fall through */	2864	fallthrough;
2865	case DRM_FORMAT_MOD_LINEAR:	2865	case DRM_FORMAT_MOD_LINEAR:
2866	case I915_FORMAT_MOD_X_TILED:	2866	case I915_FORMAT_MOD_X_TILED:
2867	case I915_FORMAT_MOD_Y_TILED:	2867	case I915_FORMAT_MOD_Y_TILED:
@@ -2878,7 +2878,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 10 unmodified lines
2878	case DRM_FORMAT_ABGR8888:	2878	case DRM_FORMAT_ABGR8888:
2879	if (is_ccs_modifier(modifier))	2879	if (is_ccs_modifier(modifier))
2880	return true;	2880	return true;
2881	/* fall through */	2881	fallthrough;
2882	case DRM_FORMAT_YUYV:	2882	case DRM_FORMAT_YUYV:
2883	case DRM_FORMAT_YVYU:	2883	case DRM_FORMAT_YVYU:
2884	case DRM_FORMAT_UYVY:	2884	case DRM_FORMAT_UYVY:
@@ -2890,7 +2890,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 5 unmodified lines
2890	case DRM_FORMAT_P016:	2890	case DRM_FORMAT_P016:
2891	if (modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS)	2891	if (modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS)
2892	return true;	2892	return true;
2893	/* fall through */	2893	fallthrough;
2894	case DRM_FORMAT_RGB565:	2894	case DRM_FORMAT_RGB565:
2895	case DRM_FORMAT_XRGB2101010:	2895	case DRM_FORMAT_XRGB2101010:
2896	case DRM_FORMAT_XBGR2101010:	2896	case DRM_FORMAT_XBGR2101010:
@@ -2911,7 +2911,7 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane, · 14 unmodified lines
2911	modifier == I915_FORMAT_MOD_X_TILED \|\|	2911	modifier == I915_FORMAT_MOD_X_TILED \|\|
2912	modifier == I915_FORMAT_MOD_Y_TILED)	2912	modifier == I915_FORMAT_MOD_Y_TILED)
2913	return true;	2913	return true;
2914	/* fall through */	2914	fallthrough;
2915	default:	2915	default:
2916	return false;	2916	return false;
2917	}	2917	}

drivers/gpu/drm/i915/display/intel_tc.c+1−1

@@ -159,7 +159,7 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port) · 158 unmodified lines
159	switch (lane_mask) {	159	switch (lane_mask) {
160	default:	160	default:
161	MISSING_CASE(lane_mask);	161	MISSING_CASE(lane_mask);
162	/* fall-through */	162	fallthrough;
163	case 0x1:	163	case 0x1:
164	case 0x2:	164	case 0x2:
165	case 0x4:	165	case 0x4:

drivers/gpu/drm/i915/gem/i915_gem_mman.c+1−1

@@ -209,7 +209,7 @@ static vm_fault_t i915_error_to_vmf_fault(int err) · 208 unmodified lines
209	switch (err) {	209	switch (err) {
210	default:	210	default:
211	WARN_ONCE(err, "unhandled error in %s: %i\n", __func__, err);	211	WARN_ONCE(err, "unhandled error in %s: %i\n", __func__, err);
212	/* fallthrough */	212	fallthrough;
213	case -EIO: /* shmemfs failure from swap device */	213	case -EIO: /* shmemfs failure from swap device */
214	case -EFAULT: /* purged object */	214	case -EFAULT: /* purged object */
215	case -ENODEV: /* bad object, how did you get here! */	215	case -ENODEV: /* bad object, how did you get here! */

drivers/gpu/drm/i915/gem/i915_gem_pages.c+1−1

@@ -276,7 +276,7 @@ static void i915_gem_object_map(struct drm_i915_gem_object obj, · 275 unmodified lines
276	switch (type) {	276	switch (type) {
277	default:	277	default:
278	MISSING_CASE(type);	278	MISSING_CASE(type);
279	/* fallthrough - to use PAGE_KERNEL anyway */	279	fallthrough; /* to use PAGE_KERNEL anyway */
280	case I915_MAP_WB:	280	case I915_MAP_WB:
281	pgprot = PAGE_KERNEL;	281	pgprot = PAGE_KERNEL;
282	break;	282	break;

drivers/gpu/drm/i915/gem/i915_gem_stolen.c+3−3

@@ -249,7 +249,7 @@ static void vlv_get_stolen_reserved(struct drm_i915_private *i915, · 248 unmodified lines
249	switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {	249	switch (reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK) {
250	default:	250	default:
251	MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);	251	MISSING_CASE(reg_val & GEN7_STOLEN_RESERVED_SIZE_MASK);
252	/* fall through */	252	fallthrough;
253	case GEN7_STOLEN_RESERVED_1M:	253	case GEN7_STOLEN_RESERVED_1M:
254	size = 1024 1024;	254	size = 1024 1024;
255	break;	255	break;
@@ -416,7 +416,7 @@ static int i915_gem_init_stolen(struct drm_i915_private *i915) · 160 unmodified lines
416	case 4:	416	case 4:
417	if (!IS_G4X(i915))	417	if (!IS_G4X(i915))
418	break;	418	break;
419	/* fall through */	419	fallthrough;
420	case 5:	420	case 5:
421	g4x_get_stolen_reserved(i915, uncore,	421	g4x_get_stolen_reserved(i915, uncore,
422	&reserved_base, &reserved_size);	422	&reserved_base, &reserved_size);
@@ -445,7 +445,7 @@ static int i915_gem_init_stolen(struct drm_i915_private *i915) · 22 unmodified lines
445	break;	445	break;
446	default:	446	default:
447	MISSING_CASE(INTEL_GEN(i915));	447	MISSING_CASE(INTEL_GEN(i915));
448	/* fall-through */	448	fallthrough;
449	case 11:	449	case 11:
450	case 12:	450	case 12:
451	icl_get_stolen_reserved(i915, uncore,	451	icl_get_stolen_reserved(i915, uncore,

drivers/gpu/drm/i915/gem/i915_gem_userptr.c+0−8

@@ -596,14 +596,6 @@ static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj) · 595 unmodified lines
596	GFP_KERNEL \|	596	GFP_KERNEL \|
597	__GFP_NORETRY \|	597	__GFP_NORETRY \|
598	__GFP_NOWARN);	598	__GFP_NOWARN);
599	/*
600	* Using __get_user_pages_fast() with a read-only
601	* access is questionable. A read-only page may be
602	* COW-broken, and then this might end up giving
603	* the wrong side of the COW..
604	*
605	* We may or may not care.
606	*/
607	if (pvec) {	599	if (pvec) {
608	/* defer to worker if malloc fails */	600	/* defer to worker if malloc fails */
609	if (!i915_gem_object_is_readonly(obj))	601	if (!i915_gem_object_is_readonly(obj))

drivers/gpu/drm/i915/gt/intel_engine_cs.c+1−1

@@ -213,7 +213,7 @@ u32 intel_engine_context_size(struct intel_gt *gt, u8 class) · 212 unmodified lines
213	break;	213	break;
214	default:	214	default:
215	MISSING_CASE(class);	215	MISSING_CASE(class);
216	/* fall through */	216	fallthrough;
217	case VIDEO_DECODE_CLASS:	217	case VIDEO_DECODE_CLASS:
218	case VIDEO_ENHANCEMENT_CLASS:	218	case VIDEO_ENHANCEMENT_CLASS:
219	case COPY_ENGINE_CLASS:	219	case COPY_ENGINE_CLASS:

drivers/gpu/drm/i915/gt/intel_ggtt.c+1−1

@@ -1437,7 +1437,7 @@ i915_get_ggtt_vma_pages(struct i915_vma *vma) · 1436 unmodified lines
1437	switch (vma->ggtt_view.type) {	1437	switch (vma->ggtt_view.type) {
1438	default:	1438	default:
1439	GEM_BUG_ON(vma->ggtt_view.type);	1439	GEM_BUG_ON(vma->ggtt_view.type);
1440	/* fall through */	1440	fallthrough;
1441	case I915_GGTT_VIEW_NORMAL:	1441	case I915_GGTT_VIEW_NORMAL:
1442	vma->pages = vma->obj->mm.pages;	1442	vma->pages = vma->obj->mm.pages;
1443	return 0;	1443	return 0;

drivers/gpu/drm/i915/gt/intel_ring_submission.c+1−1

@@ -100,7 +100,7 @@ static void set_hwsp(struct intel_engine_cs *engine, u32 offset) · 99 unmodified lines
100	*/	100	*/
101	default:	101	default:
102	GEM_BUG_ON(engine->id);	102	GEM_BUG_ON(engine->id);
103	/* fallthrough */	103	fallthrough;
104	case RCS0:	104	case RCS0:
105	hwsp = RENDER_HWS_PGA_GEN7;	105	hwsp = RENDER_HWS_PGA_GEN7;
106	break;	106	break;

drivers/gpu/drm/i915/gvt/handlers.c+1−1

@@ -1226,7 +1226,7 @@ static int handle_g2v_notification(struct intel_vgpu *vgpu, int notification) · 1225 unmodified lines
1226	switch (notification) {	1226	switch (notification) {
1227	case VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE:	1227	case VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE:
1228	root_entry_type = GTT_TYPE_PPGTT_ROOT_L3_ENTRY;	1228	root_entry_type = GTT_TYPE_PPGTT_ROOT_L3_ENTRY;
1229	/* fall through */	1229	fallthrough;
1230	case VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE:	1230	case VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE:
1231	mm = intel_vgpu_get_ppgtt_mm(vgpu, root_entry_type, pdps);	1231	mm = intel_vgpu_get_ppgtt_mm(vgpu, root_entry_type, pdps);
1232	return PTR_ERR_OR_ZERO(mm);	1232	return PTR_ERR_OR_ZERO(mm);

drivers/gpu/drm/i915/i915_gpu_error.c+1−1

@@ -1159,7 +1159,7 @@ static void engine_record_registers(struct intel_engine_coredump *ee) · 1158 unmodified lines
1159	switch (engine->id) {	1159	switch (engine->id) {
1160	default:	1160	default:
1161	MISSING_CASE(engine->id);	1161	MISSING_CASE(engine->id);
1162	/* fall through */	1162	fallthrough;
1163	case RCS0:	1163	case RCS0:
1164	mmio = RENDER_HWS_PGA_GEN7;	1164	mmio = RENDER_HWS_PGA_GEN7;
1165	break;	1165	break;

drivers/gpu/drm/i915/i915_pmu.c+1−1

@@ -474,7 +474,7 @@ config_status(struct drm_i915_private *i915, u64 config) · 473 unmodified lines
474	if (IS_VALLEYVIEW(i915) \|\| IS_CHERRYVIEW(i915))	474	if (IS_VALLEYVIEW(i915) \|\| IS_CHERRYVIEW(i915))
475	/* Requires a mutex for sampling! */	475	/* Requires a mutex for sampling! */
476	return -ENODEV;	476	return -ENODEV;
477	/* Fall-through. */	477	fallthrough;
478	case I915_PMU_REQUESTED_FREQUENCY:	478	case I915_PMU_REQUESTED_FREQUENCY:
479	if (INTEL_GEN(i915) < 6)	479	if (INTEL_GEN(i915) < 6)
480	return -ENODEV;	480	return -ENODEV;

drivers/gpu/drm/imx/ipuv3-plane.c+1−1

@@ -447,7 +447,7 @@ static int ipu_plane_atomic_check(struct drm_plane *plane, · 446 unmodified lines
447	if (fb->pitches[1] != fb->pitches[2])	447	if (fb->pitches[1] != fb->pitches[2])
448	return -EINVAL;	448	return -EINVAL;
449		449
450	/* fall-through */	450	fallthrough;
451	case DRM_FORMAT_NV12:	451	case DRM_FORMAT_NV12:
452	case DRM_FORMAT_NV16:	452	case DRM_FORMAT_NV16:
453	ubo = drm_plane_state_to_ubo(state);	453	ubo = drm_plane_state_to_ubo(state);

drivers/gpu/drm/meson/meson_osd_afbcd.c+1−1

@@ -205,7 +205,7 @@ static int meson_g12a_afbcd_pixel_fmt(u64 modifier, uint32_t format) · 204 unmodified lines
205	/* YTR is forbidden for non XBGR formats */	205	/* YTR is forbidden for non XBGR formats */
206	if (modifier & AFBC_FORMAT_MOD_YTR)	206	if (modifier & AFBC_FORMAT_MOD_YTR)
207	return -EINVAL;	207	return -EINVAL;
208	/* fall through */	208	fallthrough;
209	case DRM_FORMAT_XBGR8888:	209	case DRM_FORMAT_XBGR8888:
210	case DRM_FORMAT_ABGR8888:	210	case DRM_FORMAT_ABGR8888:
211	return MAFBC_FMT_RGBA8888;	211	return MAFBC_FMT_RGBA8888;

drivers/gpu/drm/meson/meson_overlay.c+2−2

@@ -654,7 +654,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, · 653 unmodified lines
654	priv->viu.vd1_addr2,	654	priv->viu.vd1_addr2,
655	priv->viu.vd1_stride2,	655	priv->viu.vd1_stride2,
656	priv->viu.vd1_height2);	656	priv->viu.vd1_height2);
657	/* fallthrough */	657	fallthrough;
658	case 2:	658	case 2:
659	gem = drm_fb_cma_get_gem_obj(fb, 1);	659	gem = drm_fb_cma_get_gem_obj(fb, 1);
660	priv->viu.vd1_addr1 = gem->paddr + fb->offsets[1];	660	priv->viu.vd1_addr1 = gem->paddr + fb->offsets[1];
@@ -666,7 +666,7 @@ static void meson_overlay_atomic_update(struct drm_plane *plane, · 5 unmodified lines
666	priv->viu.vd1_addr1,	666	priv->viu.vd1_addr1,
667	priv->viu.vd1_stride1,	667	priv->viu.vd1_stride1,
668	priv->viu.vd1_height1);	668	priv->viu.vd1_height1);
669	/* fallthrough */	669	fallthrough;
670	case 1:	670	case 1:
671	gem = drm_fb_cma_get_gem_obj(fb, 0);	671	gem = drm_fb_cma_get_gem_obj(fb, 0);
672	priv->viu.vd1_addr0 = gem->paddr + fb->offsets[0];	672	priv->viu.vd1_addr0 = gem->paddr + fb->offsets[0];

drivers/gpu/drm/msm/adreno/a5xx_gpu.c+2−2

@@ -59,7 +59,7 @@ static void a5xx_submit_in_rb(struct msm_gpu gpu, struct msm_gem_submit submit · 58 unmodified lines
59	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:	59	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
60	if (priv->lastctx == ctx)	60	if (priv->lastctx == ctx)
61	break;	61	break;
62	/* fall-thru */	62	fallthrough;
63	case MSM_SUBMIT_CMD_BUF:	63	case MSM_SUBMIT_CMD_BUF:
64	/* copy commands into RB: */	64	/* copy commands into RB: */
65	obj = submit->bos[submit->cmd[i].idx].obj;	65	obj = submit->bos[submit->cmd[i].idx].obj;
@@ -150,7 +150,7 @@ static void a5xx_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 84 unmodified lines
150	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:	150	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
151	if (priv->lastctx == ctx)	151	if (priv->lastctx == ctx)
152	break;	152	break;
153	/* fall-thru */	153	fallthrough;
154	case MSM_SUBMIT_CMD_BUF:	154	case MSM_SUBMIT_CMD_BUF:
155	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);	155	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
156	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));	156	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gmu.c+30−10

 	if (!gmu->legacy) {
 		a6xx_hfi_set_freq(gmu, perf_index);
-		icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
+		dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
 		pm_runtime_put(gmu->dev);
 		return;
 	}
 	if (ret)
 		dev_err(gmu->dev, "GMU set GPU frequency error: %d\n", ret);
-	/*
+	dev_pm_opp_set_bw(&gpu->pdev->dev, opp);
-	 * Eventually we will want to scale the path vote with the frequency but
-	 * for now leave it at max so that the performance is nominal.
-	 */
-	icc_set_bw(gpu->icc_path, 0, MBps_to_icc(7216));
 	pm_runtime_put(gmu->dev);
 }
 {
 	int ret;
 	u32 val;
+	u32 mask, reset_val;
+	val = gmu_read(gmu, REG_A6XX_GMU_CM3_DTCM_START + 0xff8);
+	if (val <= 0x20010004) {
+		mask = 0xffffffff;
+		reset_val = 0xbabeface;
+	} else {
+		mask = 0x1ff;
+		reset_val = 0x100;
+	}
 	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 1);
 	gmu_write(gmu, REG_A6XX_GMU_CM3_SYSRESET, 0);
 	ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_CM3_FW_INIT_RESULT, val,
-		val == 0xbabeface, 100, 10000);
+		(val & mask) == reset_val, 100, 10000);
 	if (ret)
 		DRM_DEV_ERROR(gmu->dev, "GMU firmware initialization timed out\n");
 		gmu_rmw(gmu, REG_A6XX_GMU_PWR_COL_INTER_FRAME_CTRL, 0,
 			A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_IFPC_ENABLE |
 			A6XX_GMU_PWR_COL_INTER_FRAME_CTRL_HM_POWER_COLLAPSE_ENABLE);
-		/* Fall through */
+		fallthrough;
 	case GMU_IDLE_STATE_SPTP:
 		gmu_write(gmu, REG_A6XX_GMU_PWR_COL_SPTPRAC_HYST,
 			GMU_PWR_COL_HYST);
 	if (IS_ERR_OR_NULL(gpu_opp))
 		return;
+	gmu->freq = 0; /* so a6xx_gmu_set_freq() doesn't exit early */
 	a6xx_gmu_set_freq(gpu, gpu_opp);
 	dev_pm_opp_put(gpu_opp);
 }
+static void a6xx_gmu_set_initial_bw(struct msm_gpu *gpu, struct a6xx_gmu *gmu)
+{
+	struct dev_pm_opp *gpu_opp;
+	unsigned long gpu_freq = gmu->gpu_freqs[gmu->current_perf_index];
+	gpu_opp = dev_pm_opp_find_freq_exact(&gpu->pdev->dev, gpu_freq, true);
+	if (IS_ERR_OR_NULL(gpu_opp))
+		return;
+	dev_pm_opp_set_bw(&gpu->pdev->dev, gpu_opp);
+	dev_pm_opp_put(gpu_opp);
+}
 int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
 {
 	struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
 	}
 	/* Set the bus quota to a reasonable value for boot */
-	icc_set_bw(gpu->icc_path, 0, MBps_to_icc(3072));
+	a6xx_gmu_set_initial_bw(gpu, gmu);
 	/* Enable the GMU interrupt */
 	gmu_write(gmu, REG_A6XX_GMU_AO_HOST_INTERRUPT_CLR, ~0);
 		a6xx_gmu_shutdown(gmu);
 	/* Remove the bus vote */
-	icc_set_bw(gpu->icc_path, 0, 0);
+	dev_pm_opp_set_bw(&gpu->pdev->dev, NULL);
 	/*
 	 * Make sure the GX domain is off before turning off the GMU (CX)

drivers/gpu/drm/msm/adreno/a6xx_gpu.c+1−1

@@ -117,7 +117,7 @@ static void a6xx_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 116 unmodified lines
117	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:	117	case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
118	if (priv->lastctx == ctx)	118	if (priv->lastctx == ctx)
119	break;	119	break;
120	/* fall-thru */	120	fallthrough;
121	case MSM_SUBMIT_CMD_BUF:	121	case MSM_SUBMIT_CMD_BUF:
122	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);	122	OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
123	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));	123	OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c+2−1

@@ -938,7 +938,8 @@ struct msm_gpu_state a6xx_gpu_state_get(struct msm_gpu gpu) · 937 unmodified lines
938	msm_gem_kernel_put(dumper.bo, gpu->aspace, true);	938	msm_gem_kernel_put(dumper.bo, gpu->aspace, true);
939	}	939	}
940		940
941	a6xx_get_debugbus(gpu, a6xx_state);	941	if (snapshot_debugbus)
		942	a6xx_get_debugbus(gpu, a6xx_state);
942		943
943	return &a6xx_state->base;	944	return &a6xx_state->base;
944	}	945	}

drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h+1−1

@@ -372,7 +372,7 @@ static const struct a6xx_indexed_registers { · 371 unmodified lines
372	u32 data;	372	u32 data;
373	u32 count;	373	u32 count;
374	} a6xx_indexed_reglist[] = {	374	} a6xx_indexed_reglist[] = {
375	{ "CP_SEQ_STAT", REG_A6XX_CP_SQE_STAT_ADDR,	375	{ "CP_SQE_STAT", REG_A6XX_CP_SQE_STAT_ADDR,
376	REG_A6XX_CP_SQE_STAT_DATA, 0x33 },	376	REG_A6XX_CP_SQE_STAT_DATA, 0x33 },
377	{ "CP_DRAW_STATE", REG_A6XX_CP_DRAW_STATE_ADDR,	377	{ "CP_DRAW_STATE", REG_A6XX_CP_DRAW_STATE_ADDR,
378	REG_A6XX_CP_DRAW_STATE_DATA, 0x100 },	378	REG_A6XX_CP_DRAW_STATE_DATA, 0x100 },

drivers/gpu/drm/msm/adreno/adreno_device.c+4−0

 MODULE_PARM_DESC(hang_debug, "Dump registers when hang is detected (can be slow!)");
 module_param_named(hang_debug, hang_debug, bool, 0600);
+bool snapshot_debugbus = false;
+MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)");
+module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);
 static const struct adreno_info gpulist[] = {
 	{
 		.rev   = ADRENO_REV(2, 0, 0, 0),

drivers/gpu/drm/msm/adreno/adreno_gpu.c+2−2

@@ -396,7 +396,7 @@ int adreno_hw_init(struct msm_gpu *gpu) · 395 unmodified lines
396	ring->next = ring->start;	396	ring->next = ring->start;
397		397
398	/* reset completed fence seqno: */	398	/* reset completed fence seqno: */
399	ring->memptrs->fence = ring->seqno;	399	ring->memptrs->fence = ring->fctx->completed_fence;
400	ring->memptrs->rptr = 0;	400	ring->memptrs->rptr = 0;
401	}	401	}
402		402
@@ -474,7 +474,7 @@ void adreno_submit(struct msm_gpu gpu, struct msm_gem_submit submit, · 71 unmodified lines
474	/* ignore if there has not been a ctx switch: */	474	/* ignore if there has not been a ctx switch: */
475	if (priv->lastctx == ctx)	475	if (priv->lastctx == ctx)
476	break;	476	break;
477	/* fall-thru */	477	fallthrough;
478	case MSM_SUBMIT_CMD_BUF:	478	case MSM_SUBMIT_CMD_BUF:
479	OUT_PKT3(ring, adreno_is_a4xx(adreno_gpu) ?	479	OUT_PKT3(ring, adreno_is_a4xx(adreno_gpu) ?
480	CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);	480	CP_INDIRECT_BUFFER_PFE : CP_INDIRECT_BUFFER_PFD, 2);

drivers/gpu/drm/msm/adreno/adreno_gpu.h+2−0

@@ -21,6 +21,8 @@ · 20 unmodified lines
21	#define REG_SKIP ~0	21	#define REG_SKIP ~0
22	#define REG_ADRENO_SKIP(_offset) [_offset] = REG_SKIP	22	#define REG_ADRENO_SKIP(_offset) [_offset] = REG_SKIP
23		23
		24	extern bool snapshot_debugbus;
		25
24	/**	26	/**
25	* adreno_regs: List of registers that are used in across all	27	* adreno_regs: List of registers that are used in across all
26	* 3D devices. Each device type has different offset value for the same	28	* 3D devices. Each device type has different offset value for the same

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c+1−1

@@ -827,7 +827,7 @@ static void dpu_crtc_enable(struct drm_crtc *crtc, · 826 unmodified lines
827	{	827	{
828	struct dpu_crtc *dpu_crtc;	828	struct dpu_crtc *dpu_crtc;
829	struct drm_encoder *encoder;	829	struct drm_encoder *encoder;
830	bool request_bandwidth;	830	bool request_bandwidth = false;
831		831
832	if (!crtc) {	832	if (!crtc) {
833	DPU_ERROR("invalid crtc\n");	833	DPU_ERROR("invalid crtc\n");

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c+11−9

@@ -599,7 +599,10 @@ static int dpu_encoder_virt_atomic_check( · 598 unmodified lines
599	dpu_kms = to_dpu_kms(priv->kms);	599	dpu_kms = to_dpu_kms(priv->kms);
600	mode = &crtc_state->mode;	600	mode = &crtc_state->mode;
601	adj_mode = &crtc_state->adjusted_mode;	601	adj_mode = &crtc_state->adjusted_mode;
602	global_state = dpu_kms_get_existing_global_state(dpu_kms);	602	global_state = dpu_kms_get_global_state(crtc_state->state);
		603	if (IS_ERR(global_state))
		604	return PTR_ERR(global_state);
		605
603	trace_dpu_enc_atomic_check(DRMID(drm_enc));	606	trace_dpu_enc_atomic_check(DRMID(drm_enc));
604		607
605	/* perform atomic check on the first physical encoder (master) */	608	/* perform atomic check on the first physical encoder (master) */
@@ -625,12 +628,15 @@ static int dpu_encoder_virt_atomic_check( · 19 unmodified lines
625	/* Reserve dynamic resources now. */	628	/* Reserve dynamic resources now. */
626	if (!ret) {	629	if (!ret) {
627	/*	630	/*
628	* Avoid reserving resources when mode set is pending. Topology	631	* Release and Allocate resources on every modeset
629	* info may not be available to complete reservation.	632	* Dont allocate when active is false.
630	*/	633	*/
631	if (drm_atomic_crtc_needs_modeset(crtc_state)) {	634	if (drm_atomic_crtc_needs_modeset(crtc_state)) {
632	ret = dpu_rm_reserve(&dpu_kms->rm, global_state,	635	dpu_rm_release(global_state, drm_enc);
633	drm_enc, crtc_state, topology);	636
		637	if (!crtc_state->active_changed \|\| crtc_state->active)
		638	ret = dpu_rm_reserve(&dpu_kms->rm, global_state,
		639	drm_enc, crtc_state, topology);
634	}	640	}
635	}	641	}
636		642
@@ -1181,7 +1187,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) · 544 unmodified lines
1181	struct dpu_encoder_virt *dpu_enc = NULL;	1187	struct dpu_encoder_virt *dpu_enc = NULL;
1182	struct msm_drm_private *priv;	1188	struct msm_drm_private *priv;
1183	struct dpu_kms *dpu_kms;	1189	struct dpu_kms *dpu_kms;
1184	struct dpu_global_state *global_state;
1185	int i = 0;	1190	int i = 0;
1186		1191
1187	if (!drm_enc) {	1192	if (!drm_enc) {
@@ -1200,7 +1205,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) · 12 unmodified lines
1200		1205
1201	priv = drm_enc->dev->dev_private;	1206	priv = drm_enc->dev->dev_private;
1202	dpu_kms = to_dpu_kms(priv->kms);	1207	dpu_kms = to_dpu_kms(priv->kms);
1203	global_state = dpu_kms_get_existing_global_state(dpu_kms);
1204		1208
1205	trace_dpu_enc_disable(DRMID(drm_enc));	1209	trace_dpu_enc_disable(DRMID(drm_enc));
1206		1210
@@ -1230,8 +1234,6 @@ static void dpu_encoder_virt_disable(struct drm_encoder *drm_enc) · 23 unmodified lines
1230		1234
1231	DPU_DEBUG_ENC(dpu_enc, "encoder disabled\n");	1235	DPU_DEBUG_ENC(dpu_enc, "encoder disabled\n");
1232		1236
1233	dpu_rm_release(global_state, drm_enc);
1234
1235	mutex_unlock(&dpu_enc->enc_lock);	1237	mutex_unlock(&dpu_enc->enc_lock);
1236	}	1238	}
1237		1239

drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c+2−2

@@ -866,9 +866,9 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, · 865 unmodified lines
866	crtc_state = drm_atomic_get_new_crtc_state(state->state,	866	crtc_state = drm_atomic_get_new_crtc_state(state->state,
867	state->crtc);	867	state->crtc);
868		868
869	min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxdwnscale);	869	min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxupscale);
870	ret = drm_atomic_helper_check_plane_state(state, crtc_state, min_scale,	870	ret = drm_atomic_helper_check_plane_state(state, crtc_state, min_scale,
871	pdpu->pipe_sblk->maxupscale << 16,	871	pdpu->pipe_sblk->maxdwnscale << 16,
872	true, true);	872	true, true);
873	if (ret) {	873	if (ret) {
874	DPU_DEBUG_PLANE(pdpu, "Check plane state failed (%d)\n", ret);	874	DPU_DEBUG_PLANE(pdpu, "Check plane state failed (%d)\n", ret);

drivers/gpu/drm/msm/msm_atomic.c+36−0

@@ -27,6 +27,34 @@ int msm_atomic_prepare_fb(struct drm_plane *plane, · 26 unmodified lines
27	return msm_framebuffer_prepare(new_state->fb, kms->aspace);	27	return msm_framebuffer_prepare(new_state->fb, kms->aspace);
28	}	28	}
29		29
		30	/*
		31	* Helpers to control vblanks while we flush.. basically just to ensure
		32	* that vblank accounting is switched on, so we get valid seqn/timestamp
		33	* on pageflip events (if requested)
		34	*/
		35
		36	static void vblank_get(struct msm_kms *kms, unsigned crtc_mask)
		37	{
		38	struct drm_crtc *crtc;
		39
		40	for_each_crtc_mask(kms->dev, crtc, crtc_mask) {
		41	if (!crtc->state->active)
		42	continue;
		43	drm_crtc_vblank_get(crtc);
		44	}
		45	}
		46
		47	static void vblank_put(struct msm_kms *kms, unsigned crtc_mask)
		48	{
		49	struct drm_crtc *crtc;
		50
		51	for_each_crtc_mask(kms->dev, crtc, crtc_mask) {
		52	if (!crtc->state->active)
		53	continue;
		54	drm_crtc_vblank_put(crtc);
		55	}
		56	}
		57
30	static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx)	58	static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx)
31	{	59	{
32	unsigned crtc_mask = BIT(crtc_idx);	60	unsigned crtc_mask = BIT(crtc_idx);
@@ -44,6 +72,8 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx) · 11 unmodified lines
44		72
45	kms->funcs->enable_commit(kms);	73	kms->funcs->enable_commit(kms);
46		74
		75	vblank_get(kms, crtc_mask);
		76
47	/*	77	/*
48	* Flush hardware updates:	78	* Flush hardware updates:
49	*/	79	*/
@@ -58,6 +88,8 @@ static void msm_atomic_async_commit(struct msm_kms *kms, int crtc_idx) · 8 unmodified lines
58	kms->funcs->wait_flush(kms, crtc_mask);	88	kms->funcs->wait_flush(kms, crtc_mask);
59	trace_msm_atomic_wait_flush_finish(crtc_mask);	89	trace_msm_atomic_wait_flush_finish(crtc_mask);
60		90
		91	vblank_put(kms, crtc_mask);
		92
61	mutex_lock(&kms->commit_lock);	93	mutex_lock(&kms->commit_lock);
62	kms->funcs->complete_commit(kms, crtc_mask);	94	kms->funcs->complete_commit(kms, crtc_mask);
63	mutex_unlock(&kms->commit_lock);	95	mutex_unlock(&kms->commit_lock);
@@ -221,6 +253,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) · 157 unmodified lines
221	*/	253	*/
222	kms->pending_crtc_mask &= ~crtc_mask;	254	kms->pending_crtc_mask &= ~crtc_mask;
223		255
		256	vblank_get(kms, crtc_mask);
		257
224	/*	258	/*
225	* Flush hardware updates:	259	* Flush hardware updates:
226	*/	260	*/
@@ -235,6 +269,8 @@ void msm_atomic_commit_tail(struct drm_atomic_state *state) · 8 unmodified lines
235	kms->funcs->wait_flush(kms, crtc_mask);	269	kms->funcs->wait_flush(kms, crtc_mask);
236	trace_msm_atomic_wait_flush_finish(crtc_mask);	270	trace_msm_atomic_wait_flush_finish(crtc_mask);
237		271
		272	vblank_put(kms, crtc_mask);
		273
238	mutex_lock(&kms->commit_lock);	274	mutex_lock(&kms->commit_lock);
239	kms->funcs->complete_commit(kms, crtc_mask);	275	kms->funcs->complete_commit(kms, crtc_mask);
240	mutex_unlock(&kms->commit_lock);	276	mutex_unlock(&kms->commit_lock);

drivers/gpu/drm/msm/msm_drv.c+8−0

 	return 0;
 }
+static void msm_pdev_shutdown(struct platform_device *pdev)
+{
+	struct drm_device *drm = platform_get_drvdata(pdev);
+	drm_atomic_helper_shutdown(drm);
+}
 static const struct of_device_id dt_match[] = {
 	{ .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
 	{ .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
 static struct platform_driver msm_platform_driver = {
 	.probe      = msm_pdev_probe,
 	.remove     = msm_pdev_remove,
+	.shutdown   = msm_pdev_shutdown,
 	.driver     = {
 		.name   = "msm",
 		.of_match_table = dt_match,

drivers/gpu/drm/msm/msm_ringbuffer.c+2−1

@@ -27,7 +27,8 @@ struct msm_ringbuffer msm_ringbuffer_new(struct msm_gpu gpu, int id, · 26 unmodified lines
27	ring->id = id;	27	ring->id = id;
28		28
29	ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,	29	ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,
30	MSM_BO_WC, gpu->aspace, &ring->bo, &ring->iova);	30	MSM_BO_WC \| MSM_BO_GPU_READONLY, gpu->aspace, &ring->bo,
		31	&ring->iova);
31		32
32	if (IS_ERR(ring->start)) {	33	if (IS_ERR(ring->start)) {
33	ret = PTR_ERR(ring->start);	34	ret = PTR_ERR(ring->start);

drivers/gpu/drm/nouveau/dispnv50/core507d.c+4−1

 					interlock[NV50_DISP_INTERLOCK_OVLY] |
 		  NVDEF(NV507D, UPDATE, NOT_DRIVER_FRIENDLY, FALSE) |
 		  NVDEF(NV507D, UPDATE, NOT_DRIVER_UNFRIENDLY, FALSE) |
-		  NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE));
+		  NVDEF(NV507D, UPDATE, INHIBIT_INTERRUPTS, FALSE),
+				SET_NOTIFIER_CONTROL,
+		  NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, DISABLE));
 	return PUSH_KICK(push);
 }

drivers/gpu/drm/nouveau/dispnv50/crcc37d.c+1−1

@@ -6,7 +6,7 @@ · 5 unmodified lines
6	#include "disp.h"	6	#include "disp.h"
7	#include "head.h"	7	#include "head.h"
8		8
9	#include <nvif/push507c.h>	9	#include <nvif/pushc37b.h>
10		10
11	#include <nvhw/class/clc37d.h>	11	#include <nvhw/class/clc37d.h>
12		12

drivers/gpu/drm/nouveau/dispnv50/disp.c+6−0

 	dmac->push->end = dmac->push->bgn;
 	dmac->max = 0x1000/4 - 1;
+	/* EVO channels are affected by a HW bug where the last 12 DWORDs
+	 * of the push buffer aren't able to be used safely.
+	 */
+	if (disp->oclass < GV100_DISP)
+		dmac->max -= 12;
 	args->pushbuf = nvif_handle(&dmac->_push.mem.object);
 	ret = nv50_chan_create(device, disp, oclass, head, data, size,

drivers/gpu/drm/nouveau/include/nvif/push507c.h+1−1

@@ -20,6 +20,6 @@ · 19 unmodified lines
20	PUSH_ASSERT(!((o) & ~DRF_SMASK(NV507C_DMA_JUMP_OFFSET)), "offset"); \	20	PUSH_ASSERT(!((o) & ~DRF_SMASK(NV507C_DMA_JUMP_OFFSET)), "offset"); \
21	PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, JUMP) \| \	21	PUSH_DATA__((p), NVDEF(NV507C, DMA, OPCODE, JUMP) \| \
22	NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2), \	22	NVVAL(NV507C, DMA, JUMP_OFFSET, (o) >> 2), \
23	"jump 0x%08x - %s", (u32)(o), __func__); \	23	" jump 0x%08x - %s", (u32)(o), __func__); \
24	} while(0)	24	} while(0)
25	#endif	25	#endif

drivers/gpu/drm/omapdrm/dss/venc.c+1−1

@@ -597,7 +597,7 @@ static void venc_bridge_mode_set(struct drm_bridge *bridge, · 596 unmodified lines
597	switch (venc_mode) {	597	switch (venc_mode) {
598	default:	598	default:
599	WARN_ON_ONCE(1);	599	WARN_ON_ONCE(1);
600	/* Fall-through */	600	fallthrough;
601	case VENC_MODE_PAL:	601	case VENC_MODE_PAL:
602	venc->config = &venc_config_pal_trm;	602	venc->config = &venc_config_pal_trm;
603	break;	603	break;

drivers/gpu/drm/omapdrm/omap_crtc.c+2−1

 	if (omap_state->manually_updated)
 		return;
-	spin_lock_irq(&crtc->dev->event_lock);
 	drm_crtc_vblank_on(crtc);
 	ret = drm_crtc_vblank_get(crtc);
 	WARN_ON(ret != 0);
+	spin_lock_irq(&crtc->dev->event_lock);
 	omap_crtc_arm_event(crtc);
 	spin_unlock_irq(&crtc->dev->event_lock);
 }

drivers/gpu/drm/qxl/qxl_display.c+3−2

 #include <linux/crc32.h>
 #include <linux/delay.h>
+#include <drm/drm_drv.h>
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_gem_framebuffer_helper.h>
 	DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE, ret);
 	qxl_update_offset_props(qdev);
-	DRM_MODESET_LOCK_ALL_END(ctx, ret);
+	DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 	if (!drm_helper_hpd_irq_event(dev)) {
 		/* notify that the monitor configuration changed, to
 		   adjust at the arbitrary resolution */
 			  clips, num_clips, inc, 0);
 out_lock_end:
-	DRM_MODESET_LOCK_ALL_END(ctx, ret);
+	DRM_MODESET_LOCK_ALL_END(fb->dev, ctx, ret);
 	return 0;
 }

drivers/gpu/drm/radeon/ci_dpm.c+1−1

@@ -4856,7 +4856,7 @@ static void ci_request_link_speed_change_before_state_change(struct radeon_devic · 4855 unmodified lines
4856	pi->force_pcie_gen = RADEON_PCIE_GEN2;	4856	pi->force_pcie_gen = RADEON_PCIE_GEN2;
4857	if (current_link_speed == RADEON_PCIE_GEN2)	4857	if (current_link_speed == RADEON_PCIE_GEN2)
4858	break;	4858	break;
4859	/* fall through */	4859	fallthrough;
4860	case RADEON_PCIE_GEN2:	4860	case RADEON_PCIE_GEN2:
4861	if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)	4861	if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
4862	break;	4862	break;

drivers/gpu/drm/radeon/r300.c+2−2

@@ -820,7 +820,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, · 819 unmodified lines
820	((idx_value >> 21) & 0xF));	820	((idx_value >> 21) & 0xF));
821	return -EINVAL;	821	return -EINVAL;
822	}	822	}
823	/* Fall through. */	823	fallthrough;
824	case 6:	824	case 6:
825	track->cb[i].cpp = 4;	825	track->cb[i].cpp = 4;
826	break;	826	break;
@@ -971,7 +971,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, · 144 unmodified lines
971	return -EINVAL;	971	return -EINVAL;
972	}	972	}
973	/* The same rules apply as for DXT3/5. */	973	/* The same rules apply as for DXT3/5. */
974	/* Fall through. */	974	fallthrough;
975	case R300_TX_FORMAT_DXT3:	975	case R300_TX_FORMAT_DXT3:
976	case R300_TX_FORMAT_DXT5:	976	case R300_TX_FORMAT_DXT5:
977	track->textures[i].cpp = 1;	977	track->textures[i].cpp = 1;

drivers/gpu/drm/radeon/r420.c+1−1

@@ -115,7 +115,7 @@ void r420_pipes_init(struct radeon_device *rdev) · 114 unmodified lines
115	default:	115	default:
116	/* force to 1 pipe */	116	/* force to 1 pipe */
117	num_pipes = 1;	117	num_pipes = 1;
118	/* fall through */	118	fallthrough;
119	case 1:	119	case 1:
120	tmp = (0 << 1);	120	tmp = (0 << 1);
121	break;	121	break;

drivers/gpu/drm/radeon/r600_cs.c+2−2

@@ -487,7 +487,7 @@ static int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) · 486 unmodified lines
487	return -EINVAL;	487	return -EINVAL;
488	}	488	}
489	}	489	}
490	/* fall through */	490	fallthrough;
491	case V_0280A0_CLEAR_ENABLE:	491	case V_0280A0_CLEAR_ENABLE:
492	{	492	{
493	uint32_t block_max = G_028100_CMASK_BLOCK_MAX(track->cb_color_mask[i]);	493	uint32_t block_max = G_028100_CMASK_BLOCK_MAX(track->cb_color_mask[i]);
@@ -1535,7 +1535,7 @@ static int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, · 1041 unmodified lines
1535	break;	1535	break;
1536	case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:	1536	case V_038000_SQ_TEX_DIM_2D_ARRAY_MSAA:
1537	is_array = true;	1537	is_array = true;
1538	/* fall through */	1538	fallthrough;
1539	case V_038000_SQ_TEX_DIM_2D_MSAA:	1539	case V_038000_SQ_TEX_DIM_2D_MSAA:
1540	array_check.nsamples = 1 << llevel;	1540	array_check.nsamples = 1 << llevel;
1541	llevel = 0;	1541	llevel = 0;

drivers/gpu/drm/radeon/radeon_display.c+1−1

@@ -933,7 +933,7 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, · 932 unmodified lines
933		933
934	/* get matching reference and feedback divider */	934	/* get matching reference and feedback divider */
935	*ref_div = min(max(den/post_div, 1u), ref_div_max);	935	*ref_div = min(max(den/post_div, 1u), ref_div_max);
936	fb_div = DIV_ROUND_CLOSEST(nom ref_div post_div, den);	936	fb_div = max(nom ref_div post_div / den, 1u);
937		937
938	/* limit fb divider to its maximum */	938	/* limit fb divider to its maximum */
939	if (*fb_div > fb_div_max) {	939	if (*fb_div > fb_div_max) {

drivers/gpu/drm/radeon/radeon_uvd.c+1−1

@@ -454,7 +454,7 @@ static int radeon_uvd_validate_codec(struct radeon_cs_parser *p, · 453 unmodified lines
454	if (p->rdev->family >= CHIP_PALM)	454	if (p->rdev->family >= CHIP_PALM)
455	return 0;	455	return 0;
456		456
457	/* fall through */	457	fallthrough;
458	default:	458	default:
459	DRM_ERROR("UVD codec not supported by hardware %d!\n",	459	DRM_ERROR("UVD codec not supported by hardware %d!\n",
460	stream_type);	460	stream_type);

drivers/gpu/drm/radeon/si_dpm.c+1−1

@@ -5744,7 +5744,7 @@ static void si_request_link_speed_change_before_state_change(struct radeon_devic · 5743 unmodified lines
5744	si_pi->force_pcie_gen = RADEON_PCIE_GEN2;	5744	si_pi->force_pcie_gen = RADEON_PCIE_GEN2;
5745	if (current_link_speed == RADEON_PCIE_GEN2)	5745	if (current_link_speed == RADEON_PCIE_GEN2)
5746	break;	5746	break;
5747	/* fall through */	5747	fallthrough;
5748	case RADEON_PCIE_GEN2:	5748	case RADEON_PCIE_GEN2:
5749	if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)	5749	if (radeon_acpi_pcie_performance_request(rdev, PCIE_PERF_REQ_PECI_GEN2, false) == 0)
5750	break;	5750	break;

drivers/gpu/drm/radeon/uvd_v1_0.c+1−1

@@ -219,7 +219,7 @@ done: · 218 unmodified lines
219	WREG32(RS_DQ_RD_RET_CONF, 0x3f);	219	WREG32(RS_DQ_RD_RET_CONF, 0x3f);
220	WREG32(MC_CONFIG, 0x1f);	220	WREG32(MC_CONFIG, 0x1f);
221		221
222	/* fall through */	222	fallthrough;
223	case CHIP_RV670:	223	case CHIP_RV670:
224	case CHIP_RV635:	224	case CHIP_RV635:
225		225

drivers/gpu/drm/savage/savage_state.c+5−5

@@ -306,7 +306,7 @@ static int savage_dispatch_dma_prim(drm_savage_private_t * dev_priv, · 305 unmodified lines
306	case SAVAGE_PRIM_TRILIST_201:	306	case SAVAGE_PRIM_TRILIST_201:
307	reorder = 1;	307	reorder = 1;
308	prim = SAVAGE_PRIM_TRILIST;	308	prim = SAVAGE_PRIM_TRILIST;
309	/* fall through */	309	fallthrough;
310	case SAVAGE_PRIM_TRILIST:	310	case SAVAGE_PRIM_TRILIST:
311	if (n % 3 != 0) {	311	if (n % 3 != 0) {
312	DRM_ERROR("wrong number of vertices %u in TRILIST\n",	312	DRM_ERROR("wrong number of vertices %u in TRILIST\n",
@@ -444,7 +444,7 @@ static int savage_dispatch_vb_prim(drm_savage_private_t * dev_priv, · 131 unmodified lines
444	case SAVAGE_PRIM_TRILIST_201:	444	case SAVAGE_PRIM_TRILIST_201:
445	reorder = 1;	445	reorder = 1;
446	prim = SAVAGE_PRIM_TRILIST;	446	prim = SAVAGE_PRIM_TRILIST;
447	/* fall through */	447	fallthrough;
448	case SAVAGE_PRIM_TRILIST:	448	case SAVAGE_PRIM_TRILIST:
449	if (n % 3 != 0) {	449	if (n % 3 != 0) {
450	DRM_ERROR("wrong number of vertices %u in TRILIST\n",	450	DRM_ERROR("wrong number of vertices %u in TRILIST\n",
@@ -566,7 +566,7 @@ static int savage_dispatch_dma_idx(drm_savage_private_t * dev_priv, · 115 unmodified lines
566	case SAVAGE_PRIM_TRILIST_201:	566	case SAVAGE_PRIM_TRILIST_201:
567	reorder = 1;	567	reorder = 1;
568	prim = SAVAGE_PRIM_TRILIST;	568	prim = SAVAGE_PRIM_TRILIST;
569	/* fall through */	569	fallthrough;
570	case SAVAGE_PRIM_TRILIST:	570	case SAVAGE_PRIM_TRILIST:
571	if (n % 3 != 0) {	571	if (n % 3 != 0) {
572	DRM_ERROR("wrong number of indices %u in TRILIST\n", n);	572	DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
@@ -705,7 +705,7 @@ static int savage_dispatch_vb_idx(drm_savage_private_t * dev_priv, · 132 unmodified lines
705	case SAVAGE_PRIM_TRILIST_201:	705	case SAVAGE_PRIM_TRILIST_201:
706	reorder = 1;	706	reorder = 1;
707	prim = SAVAGE_PRIM_TRILIST;	707	prim = SAVAGE_PRIM_TRILIST;
708	/* fall through */	708	fallthrough;
709	case SAVAGE_PRIM_TRILIST:	709	case SAVAGE_PRIM_TRILIST:
710	if (n % 3 != 0) {	710	if (n % 3 != 0) {
711	DRM_ERROR("wrong number of indices %u in TRILIST\n", n);	711	DRM_ERROR("wrong number of indices %u in TRILIST\n", n);
@@ -1066,7 +1066,7 @@ int savage_bci_cmdbuf(struct drm_device dev, void data, struct drm_file *file_ · 354 unmodified lines
1066	ret = -EINVAL;	1066	ret = -EINVAL;
1067	goto done;	1067	goto done;
1068	}	1068	}
1069	/* fall through */	1069	fallthrough;
1070	case SAVAGE_CMD_DMA_PRIM:	1070	case SAVAGE_CMD_DMA_PRIM:
1071	case SAVAGE_CMD_VB_PRIM:	1071	case SAVAGE_CMD_VB_PRIM:
1072	if (!first_draw_cmd)	1072	if (!first_draw_cmd)

drivers/gpu/drm/sti/sti_hdmi.c+3−3

@@ -850,13 +850,13 @@ static int hdmi_audio_configure(struct sti_hdmi *hdmi) · 849 unmodified lines
850	switch (info->channels) {	850	switch (info->channels) {
851	case 8:	851	case 8:
852	audio_cfg \|= HDMI_AUD_CFG_CH78_VALID;	852	audio_cfg \|= HDMI_AUD_CFG_CH78_VALID;
853	/* fall through */	853	fallthrough;
854	case 6:	854	case 6:
855	audio_cfg \|= HDMI_AUD_CFG_CH56_VALID;	855	audio_cfg \|= HDMI_AUD_CFG_CH56_VALID;
856	/* fall through */	856	fallthrough;
857	case 4:	857	case 4:
858	audio_cfg \|= HDMI_AUD_CFG_CH34_VALID \| HDMI_AUD_CFG_8CH;	858	audio_cfg \|= HDMI_AUD_CFG_CH34_VALID \| HDMI_AUD_CFG_8CH;
859	/* fall through */	859	fallthrough;
860	case 2:	860	case 2:
861	audio_cfg \|= HDMI_AUD_CFG_CH12_VALID;	861	audio_cfg \|= HDMI_AUD_CFG_CH12_VALID;
862	break;	862	break;

drivers/gpu/drm/sun4i/sun4i_tcon.c+2−2

@@ -195,7 +195,7 @@ void sun4i_tcon_set_status(struct sun4i_tcon *tcon, · 194 unmodified lines
195	switch (encoder->encoder_type) {	195	switch (encoder->encoder_type) {
196	case DRM_MODE_ENCODER_LVDS:	196	case DRM_MODE_ENCODER_LVDS:
197	is_lvds = true;	197	is_lvds = true;
198	/* Fallthrough */	198	fallthrough;
199	case DRM_MODE_ENCODER_DSI:	199	case DRM_MODE_ENCODER_DSI:
200	case DRM_MODE_ENCODER_NONE:	200	case DRM_MODE_ENCODER_NONE:
201	channel = 0;	201	channel = 0;
@@ -342,7 +342,7 @@ static void sun4i_tcon0_mode_set_dithering(struct sun4i_tcon *tcon, · 140 unmodified lines
342	/* R and B components are only 5 bits deep */	342	/* R and B components are only 5 bits deep */
343	val \|= SUN4I_TCON0_FRM_CTL_MODE_R;	343	val \|= SUN4I_TCON0_FRM_CTL_MODE_R;
344	val \|= SUN4I_TCON0_FRM_CTL_MODE_B;	344	val \|= SUN4I_TCON0_FRM_CTL_MODE_B;
345	/* Fall through */	345	fallthrough;
346	case MEDIA_BUS_FMT_RGB666_1X18:	346	case MEDIA_BUS_FMT_RGB666_1X18:
347	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:	347	case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
348	/* Fall through: enable dithering */	348	/* Fall through: enable dithering */

drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c+1−1

@@ -1024,7 +1024,7 @@ static ssize_t sun6i_dsi_transfer(struct mipi_dsi_host *host, · 1023 unmodified lines
1024	ret = sun6i_dsi_dcs_read(dsi, msg);	1024	ret = sun6i_dsi_dcs_read(dsi, msg);
1025	break;	1025	break;
1026	}	1026	}
1027	/* Else, fall through */	1027	fallthrough;
1028		1028
1029	default:	1029	default:
1030	ret = -EINVAL;	1030	ret = -EINVAL;

drivers/gpu/drm/tegra/dc.c+1−1

@@ -135,7 +135,7 @@ static inline u32 compute_dda_inc(unsigned int in, unsigned int out, bool v, · 134 unmodified lines
135		135
136	default:	136	default:
137	WARN_ON_ONCE(1);	137	WARN_ON_ONCE(1);
138	/* fallthrough */	138	fallthrough;
139	case 4:	139	case 4:
140	max = 4;	140	max = 4;
141	break;	141	break;

drivers/gpu/drm/tilcdc/tilcdc_crtc.c+1−1

@@ -386,7 +386,7 @@ static void tilcdc_crtc_set_mode(struct drm_crtc *crtc) · 385 unmodified lines
386	case DRM_FORMAT_XBGR8888:	386	case DRM_FORMAT_XBGR8888:
387	case DRM_FORMAT_XRGB8888:	387	case DRM_FORMAT_XRGB8888:
388	reg \|= LCDC_V2_TFT_24BPP_UNPACK;	388	reg \|= LCDC_V2_TFT_24BPP_UNPACK;
389	/* fallthrough */	389	fallthrough;
390	case DRM_FORMAT_BGR888:	390	case DRM_FORMAT_BGR888:
391	case DRM_FORMAT_RGB888:	391	case DRM_FORMAT_RGB888:
392	reg \|= LCDC_V2_TFT_24BPP_MODE;	392	reg \|= LCDC_V2_TFT_24BPP_MODE;

drivers/gpu/drm/ttm/ttm_bo_vm.c+1−1

@@ -523,7 +523,7 @@ int ttm_bo_vm_access(struct vm_area_struct *vma, unsigned long addr, · 522 unmodified lines
523	if (unlikely(ret != 0))	523	if (unlikely(ret != 0))
524	return ret;	524	return ret;
525	}	525	}
526	/* fall through */	526	fallthrough;
527	case TTM_PL_TT:	527	case TTM_PL_TT:
528	ret = ttm_bo_vm_access_kmap(bo, offset, buf, len, write);	528	ret = ttm_bo_vm_access_kmap(bo, offset, buf, len, write);
529	break;	529	break;

drivers/gpu/drm/via/via_dmablit.c+4−4

@@ -179,21 +179,21 @@ via_free_sg_info(struct pci_dev pdev, drm_via_sg_info_t vsg) · 178 unmodified lines
179	switch (vsg->state) {	179	switch (vsg->state) {
180	case dr_via_device_mapped:	180	case dr_via_device_mapped:
181	via_unmap_blit_from_device(pdev, vsg);	181	via_unmap_blit_from_device(pdev, vsg);
182	/* fall through */	182	fallthrough;
183	case dr_via_desc_pages_alloc:	183	case dr_via_desc_pages_alloc:
184	for (i = 0; i < vsg->num_desc_pages; ++i) {	184	for (i = 0; i < vsg->num_desc_pages; ++i) {
185	if (vsg->desc_pages[i] != NULL)	185	if (vsg->desc_pages[i] != NULL)
186	free_page((unsigned long)vsg->desc_pages[i]);	186	free_page((unsigned long)vsg->desc_pages[i]);
187	}	187	}
188	kfree(vsg->desc_pages);	188	kfree(vsg->desc_pages);
189	/* fall through */	189	fallthrough;
190	case dr_via_pages_locked:	190	case dr_via_pages_locked:
191	unpin_user_pages_dirty_lock(vsg->pages, vsg->num_pages,	191	unpin_user_pages_dirty_lock(vsg->pages, vsg->num_pages,
192	(vsg->direction == DMA_FROM_DEVICE));	192	(vsg->direction == DMA_FROM_DEVICE));
193	/* fall through */	193	fallthrough;
194	case dr_via_pages_alloc:	194	case dr_via_pages_alloc:
195	vfree(vsg->pages);	195	vfree(vsg->pages);
196	/* fall through */	196	fallthrough;
197	default:	197	default:
198	vsg->state = dr_via_sg_init;	198	vsg->state = dr_via_sg_init;
199	}	199	}

drivers/gpu/drm/xen/xen_drm_front.c+0−3

 	switch (backend_state) {
 	case XenbusStateReconfiguring:
-		/* fall through */
 	case XenbusStateReconfigured:
-		/* fall through */
 	case XenbusStateInitialised:
 		break;
 		break;
 	case XenbusStateUnknown:
-		/* fall through */
 	case XenbusStateClosed:
 		if (xb_dev->state == XenbusStateClosed)
 			break;

drivers/gpu/drm/xen/xen_drm_front_gem.c+5−4

 #include <drm/drm_probe_helper.h>
 #include <xen/balloon.h>
+#include <xen/xen.h>
 #include "xen_drm_front.h"
 #include "xen_drm_front_gem.h"
 		 * allocate ballooned pages which will be used to map
 		 * grant references provided by the backend
 		 */
-		ret = alloc_xenballooned_pages(xen_obj->num_pages,
+		ret = xen_alloc_unpopulated_pages(xen_obj->num_pages,
-					       xen_obj->pages);
+					          xen_obj->pages);
 		if (ret < 0) {
 			DRM_ERROR("Cannot allocate %zu ballooned pages: %d\n",
 				  xen_obj->num_pages, ret);
 	} else {
 		if (xen_obj->pages) {
 			if (xen_obj->be_alloc) {
-				free_xenballooned_pages(xen_obj->num_pages,
+				xen_free_unpopulated_pages(xen_obj->num_pages,
-							xen_obj->pages);
+							   xen_obj->pages);
 				gem_free_pages_array(xen_obj);
 			} else {
 				drm_gem_put_pages(&xen_obj->base,

drivers/gpu/ipu-v3/ipu-dc.c+1−1

@@ -141,7 +141,7 @@ static int ipu_bus_format_to_map(u32 fmt) · 140 unmodified lines
141	switch (fmt) {	141	switch (fmt) {
142	default:	142	default:
143	WARN_ON(1);	143	WARN_ON(1);
144	/* fall-through */	144	fallthrough;
145	case MEDIA_BUS_FMT_RGB888_1X24:	145	case MEDIA_BUS_FMT_RGB888_1X24:
146	return IPU_DC_MAP_RGB24;	146	return IPU_DC_MAP_RGB24;
147	case MEDIA_BUS_FMT_RGB565_1X16:	147	case MEDIA_BUS_FMT_RGB565_1X16:

drivers/hid/hid-core.c+13−2

 	}
 }
+/*
+ * Compute the size of a report.
+ */
+static size_t hid_compute_report_size(struct hid_report *report)
+{
+	if (report->size)
+		return ((report->size - 1) >> 3) + 1;
+	return 0;
+}
 /*
  * Create a report. 'data' has to be allocated using
  * hid_alloc_report_buf() so that it has proper size.
 	if (report->id > 0)
 		*data++ = report->id;
-	memset(data, 0, ((report->size - 1) >> 3) + 1);
+	memset(data, 0, hid_compute_report_size(report));
 	for (n = 0; n < report->maxfield; n++)
 		hid_output_field(report->device, report->field[n], data);
 }
 		csize--;
 	}
-	rsize = ((report->size - 1) >> 3) + 1;
+	rsize = hid_compute_report_size(report);
 	if (report_enum->numbered && rsize >= HID_MAX_BUFFER_SIZE)
 		rsize = HID_MAX_BUFFER_SIZE - 1;

drivers/hid/hid-cougar.c+1−1

@@ -321,7 +321,7 @@ static const struct kernel_param_ops cougar_g6_is_space_ops = { · 320 unmodified lines
321	};	321	};
322	module_param_cb(g6_is_space, &cougar_g6_is_space_ops, &g6_is_space, 0644);	322	module_param_cb(g6_is_space, &cougar_g6_is_space_ops, &g6_is_space, 0644);
323		323
324	static struct hid_device_id cougar_id_table[] = {	324	static const struct hid_device_id cougar_id_table[] = {
325	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,	325	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,
326	USB_DEVICE_ID_COUGAR_500K_GAMING_KEYBOARD) },	326	USB_DEVICE_ID_COUGAR_500K_GAMING_KEYBOARD) },
327	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,	327	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,

drivers/hid/hid-elan.c+2−0

 	ret = input_mt_init_slots(input, ELAN_MAX_FINGERS, INPUT_MT_POINTER);
 	if (ret) {
 		hid_err(hdev, "Failed to init elan MT slots: %d\n", ret);
+		input_free_device(input);
 		return ret;
 	}
 	if (ret) {
 		hid_err(hdev, "Failed to register elan input device: %d\n",
 			ret);
+		input_mt_destroy_slots(input);
 		input_free_device(input);
 		return ret;
 	}

drivers/hid/hid-ids.h+6−0

 #define USB_DEVICE_ID_LENOVO_TPPRODOCK	0x6067
 #define USB_DEVICE_ID_LENOVO_X1_COVER	0x6085
 #define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_608D	0x608d
+#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6019	0x6019
+#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_602E	0x602e
+#define USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6093	0x6093
 #define USB_VENDOR_ID_LG		0x1fd2
 #define USB_DEVICE_ID_LG_MULTITOUCH	0x0064
 #define USB_DEVICE_ID_MS_POWER_COVER     0x07da
 #define USB_DEVICE_ID_MS_XBOX_ONE_S_CONTROLLER	0x02fd
 #define USB_DEVICE_ID_MS_PIXART_MOUSE    0x00cb
+#define USB_DEVICE_ID_8BITDO_SN30_PRO_PLUS      0x02e0
 #define USB_VENDOR_ID_MOJO		0x8282
 #define USB_DEVICE_ID_RETRO_ADAPTER	0x3201
 #define USB_DEVICE_ID_SAITEK_RAT9	0x0cfa
 #define USB_DEVICE_ID_SAITEK_MMO7	0x0cd0
 #define USB_DEVICE_ID_SAITEK_X52	0x075c
+#define USB_DEVICE_ID_SAITEK_X52_2	0x0255
+#define USB_DEVICE_ID_SAITEK_X52_PRO	0x0762
 #define USB_VENDOR_ID_SAMSUNG		0x0419
 #define USB_DEVICE_ID_SAMSUNG_IR_REMOTE	0x0001

drivers/hid/hid-input.c+4−0

 	}
 mapped:
+	/* Mapping failed, bail out */
+	if (!bit)
+		return;
 	if (device->driver->input_mapped &&
 	    device->driver->input_mapped(device, hidinput, field, usage,
 					 &bit, &max) < 0) {

drivers/hid/hid-lg-g15.c+1−1

@@ -680,7 +680,7 @@ static int lg_g15_register_led(struct lg_g15_data *g15, int i) · 679 unmodified lines
680	* but it does have a separate power-on (reset) value.	680	* but it does have a separate power-on (reset) value.
681	*/	681	*/
682	g15->leds[i].cdev.name = "g15::power_on_backlight_val";	682	g15->leds[i].cdev.name = "g15::power_on_backlight_val";
683	/* fall through */	683	fallthrough;
684	case LG_G15_KBD_BRIGHTNESS:	684	case LG_G15_KBD_BRIGHTNESS:
685	g15->leds[i].cdev.brightness_set_blocking =	685	g15->leds[i].cdev.brightness_set_blocking =
686	lg_g510_kbd_led_set;	686	lg_g510_kbd_led_set;

drivers/hid/hid-logitech-dj.c+1−1

@@ -844,7 +844,7 @@ static void logi_dj_recv_queue_notification(struct dj_receiver_dev *djrcv_dev, · 843 unmodified lines
844	workitem.type = WORKITEM_TYPE_EMPTY;	844	workitem.type = WORKITEM_TYPE_EMPTY;
845	break;	845	break;
846	}	846	}
847	/* fall-through */	847	fallthrough;
848	case REPORT_TYPE_NOTIF_DEVICE_UNPAIRED:	848	case REPORT_TYPE_NOTIF_DEVICE_UNPAIRED:
849	workitem.quad_id_msb =	849	workitem.quad_id_msb =
850	dj_report->report_params[DEVICE_PAIRED_PARAM_EQUAD_ID_MSB];	850	dj_report->report_params[DEVICE_PAIRED_PARAM_EQUAD_ID_MSB];

drivers/hid/hid-macally.c+1−1

@@ -29,7 +29,7 @@ static __u8 macally_report_fixup(struct hid_device hdev, __u8 *rdesc, · 28 unmodified lines
29	return rdesc;	29	return rdesc;
30	}	30	}
31		31
32	static struct hid_device_id macally_id_table[] = {	32	static const struct hid_device_id macally_id_table[] = {
33	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,	33	{ HID_USB_DEVICE(USB_VENDOR_ID_SOLID_YEAR,
34	USB_DEVICE_ID_MACALLY_IKEY_KEYBOARD) },	34	USB_DEVICE_ID_MACALLY_IKEY_KEYBOARD) },
35	{ }	35	{ }

drivers/hid/hid-microsoft.c+2−3

 {
 	switch (usage->hid & HID_USAGE_PAGE) {
 	case 0xff070000:
-		/* fall-through */
 	case HID_UP_DIGITIZER:
 		/* ignore those axis */
 		return -1;
 	case HID_UP_GENDESK:
 		switch (usage->hid) {
 		case HID_GD_X:
-			/* fall-through */
 		case HID_GD_Y:
-			/* fall-through */
 		case HID_GD_RFKILL_BTN:
 			/* ignore those axis */
 			return -1;
 		.driver_data = MS_SURFACE_DIAL },
 	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_XBOX_ONE_S_CONTROLLER),
 		.driver_data = MS_QUIRK_FF },
+	{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_8BITDO_SN30_PRO_PLUS),
+		.driver_data = MS_QUIRK_FF },
 	{ }
 };
 MODULE_DEVICE_TABLE(hid, ms_devices);

drivers/hid/hid-multitouch.c+2−0

@@ -856,6 +856,8 @@ static int mt_touch_input_mapping(struct hid_device hdev, struct hid_input hi, · 855 unmodified lines
856	code = BTN_0 + ((usage->hid - 1) & HID_USAGE);	856	code = BTN_0 + ((usage->hid - 1) & HID_USAGE);
857		857
858	hid_map_usage(hi, usage, bit, max, EV_KEY, code);	858	hid_map_usage(hi, usage, bit, max, EV_KEY, code);
		859	if (!*bit)
		860	return -1;
859	input_set_capability(hi->input, EV_KEY, code);	861	input_set_capability(hi->input, EV_KEY, code);
860	return 1;	862	return 1;
861		863

drivers/hid/hid-quirks.c+5−0

 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_KYE_EASYPEN_M406XE), HID_QUIRK_MULTI_INPUT },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_KYE, USB_DEVICE_ID_PIXART_USB_OPTICAL_MOUSE_ID2), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_608D), HID_QUIRK_ALWAYS_POLL },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6019), HID_QUIRK_ALWAYS_POLL },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_602E), HID_QUIRK_ALWAYS_POLL },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_LENOVO, USB_DEVICE_ID_LENOVO_PIXART_USB_MOUSE_6093), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_C007), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_C077), HID_QUIRK_ALWAYS_POLL },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_KEYBOARD_G710_PLUS), HID_QUIRK_NOGET },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_RETROUSB, USB_DEVICE_ID_RETROUSB_SNES_RETROPORT), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RUMBLEPAD), HID_QUIRK_BADPAD },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52_2), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
+	{ HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_X52_PRO), HID_QUIRK_INCREMENT_USAGE_ON_DUPLICATE },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD2), HID_QUIRK_NO_INIT_REPORTS },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SEMICO, USB_DEVICE_ID_SEMICO_USB_KEYKOARD), HID_QUIRK_NO_INIT_REPORTS },
 	{ HID_USB_DEVICE(USB_VENDOR_ID_SENNHEISER, USB_DEVICE_ID_SENNHEISER_BTD500USB), HID_QUIRK_NOGET },

drivers/hid/hid-rmi.c+0−1

@@ -428,7 +428,6 @@ static void rmi_report(struct hid_device hid, struct hid_report report) · 427 unmodified lines
428		428
429	switch (report->id) {	429	switch (report->id) {
430	case RMI_READ_DATA_REPORT_ID:	430	case RMI_READ_DATA_REPORT_ID:
431	/* fall-through */
432	case RMI_ATTN_REPORT_ID:	431	case RMI_ATTN_REPORT_ID:
433	return;	432	return;
434	}	433	}

drivers/hid/hid-roccat-kone.c+1−1

@@ -780,7 +780,7 @@ static void kone_keep_values_up_to_date(struct kone_device *kone, · 779 unmodified lines
780	case kone_mouse_event_switch_profile:	780	case kone_mouse_event_switch_profile:
781	kone->actual_dpi = kone->profiles[event->value - 1].	781	kone->actual_dpi = kone->profiles[event->value - 1].
782	startup_dpi;	782	startup_dpi;
783	/* fall through */	783	fallthrough;
784	case kone_mouse_event_osd_profile:	784	case kone_mouse_event_osd_profile:
785	kone->actual_profile = event->value;	785	kone->actual_profile = event->value;
786	break;	786	break;

drivers/hid/hid-uclogic-params.c+1−1

@@ -974,7 +974,7 @@ int uclogic_params_init(struct uclogic_params *params, · 973 unmodified lines
974	}	974	}
975	break;	975	break;
976	}	976	}
977	/* FALL THROUGH */	977	fallthrough;
978	case VID_PID(USB_VENDOR_ID_HUION,	978	case VID_PID(USB_VENDOR_ID_HUION,
979	USB_DEVICE_ID_HUION_TABLET):	979	USB_DEVICE_ID_HUION_TABLET):
980	case VID_PID(USB_VENDOR_ID_HUION,	980	case VID_PID(USB_VENDOR_ID_HUION,

drivers/hid/hid-wiimote-core.c+0−2

 	case WIIMOTE_EXT_GUITAR:
 		return sprintf(buf, "guitar\n");
 	case WIIMOTE_EXT_UNKNOWN:
-		/* fallthrough */
 	default:
 		return sprintf(buf, "unknown\n");
 	}
 	case WIIMOTE_DEV_PENDING:
 		return sprintf(buf, "pending\n");
 	case WIIMOTE_DEV_UNKNOWN:
-		/* fallthrough */
 	default:
 		return sprintf(buf, "unknown\n");
 	}

drivers/hid/i2c-hid/i2c-hid-core.c+13−9

 		dev_err(&client->dev, "failed to change power setting.\n");
 set_pwr_exit:
+	/*
+	 * The HID over I2C specification states that if a DEVICE needs time
+	 * after the PWR_ON request, it should utilise CLOCK stretching.
+	 * However, it has been observered that the Windows driver provides a
+	 * 1ms sleep between the PWR_ON and RESET requests.
+	 * According to Goodix Windows even waits 60 ms after (other?)
+	 * PWR_ON requests. Testing has confirmed that several devices
+	 * will not work properly without a delay after a PWR_ON request.
+	 */
+	if (!ret && power_state == I2C_HID_PWR_ON)
+		msleep(60);
 	return ret;
 }
 	if (ret)
 		goto out_unlock;
-	/*
-	 * The HID over I2C specification states that if a DEVICE needs time
-	 * after the PWR_ON request, it should utilise CLOCK stretching.
-	 * However, it has been observered that the Windows driver provides a
-	 * 1ms sleep between the PWR_ON and RESET requests and that some devices
-	 * rely on this.
-	 */
-	usleep_range(1000, 5000);
 	i2c_hid_dbg(ihid, "resetting...\n");
 	ret = i2c_hid_command(client, &hid_reset_cmd, NULL, 0);

drivers/hid/usbhid/hid-core.c+24−29

 #include <linux/wait.h>
 #include <linux/workqueue.h>
 #include <linux/string.h>
-#include <linux/timekeeping.h>
 #include <linux/usb.h>
 				set_bit(HID_NO_BANDWIDTH, &usbhid->iofl);
 		} else {
 			clear_bit(HID_NO_BANDWIDTH, &usbhid->iofl);
-			if (test_bit(HID_RESUME_RUNNING, &usbhid->iofl)) {
-				/*
-				 * In case events are generated while nobody was
-				 * listening, some are released when the device
-				 * is re-opened. Wait 50 msec for the queue to
-				 * empty before allowing events to go through
-				 * hid.
-				 */
-				usbhid->input_start_time =
-					ktime_add_ms(ktime_get_coarse(), 50);
-			}
 		}
 	}
 	spin_unlock_irqrestore(&usbhid->lock, flags);
 		if (!test_bit(HID_OPENED, &usbhid->iofl))
 			break;
 		usbhid_mark_busy(usbhid);
-		if (test_bit(HID_RESUME_RUNNING, &usbhid->iofl)) {
+		if (!test_bit(HID_RESUME_RUNNING, &usbhid->iofl)) {
-			if (ktime_before(ktime_get_coarse(),
+			hid_input_report(urb->context, HID_INPUT_REPORT,
-					 usbhid->input_start_time))
+					 urb->transfer_buffer,
-				break;
+					 urb->actual_length, 1);
-			clear_bit(HID_RESUME_RUNNING, &usbhid->iofl);
+			/*
+			 * autosuspend refused while keys are pressed
+			 * because most keyboards don't wake up when
+			 * a key is released
+			 */
+			if (hid_check_keys_pressed(hid))
+				set_bit(HID_KEYS_PRESSED, &usbhid->iofl);
+			else
+				clear_bit(HID_KEYS_PRESSED, &usbhid->iofl);
 		}
-		hid_input_report(urb->context, HID_INPUT_REPORT,
-				 urb->transfer_buffer, urb->actual_length, 1);
-		/*
-		 * autosuspend refused while keys are pressed
-		 * because most keyboards don't wake up when
-		 * a key is released
-		 */
-		if (hid_check_keys_pressed(hid))
-			set_bit(HID_KEYS_PRESSED, &usbhid->iofl);
-		else
-			clear_bit(HID_KEYS_PRESSED, &usbhid->iofl);
 		break;
 	case -EPIPE:		/* stall */
 		usbhid_mark_busy(usbhid);
 	usb_autopm_put_interface(usbhid->intf);
+	/*
+	 * In case events are generated while nobody was listening,
+	 * some are released when the device is re-opened.
+	 * Wait 50 msec for the queue to empty before allowing events
+	 * to go through hid.
+	 */
+	if (res == 0)
+		msleep(50);
+	clear_bit(HID_RESUME_RUNNING, &usbhid->iofl);
  Done:
 	mutex_unlock(&usbhid->mutex);
 	return res;

drivers/hid/usbhid/hiddev.c+4−1

 		switch (cmd) {
 		case HIDIOCGUSAGE:
+			if (uref->usage_index >= field->report_count)
+				goto inval;
 			uref->value = field->value[uref->usage_index];
 			if (copy_to_user(user_arg, uref, sizeof(*uref)))
 				goto fault;
 			goto goodreturn;
 		case HIDIOCSUSAGE:
+			if (uref->usage_index >= field->report_count)
+				goto inval;
 			field->value[uref->usage_index] = uref->value;
 			goto goodreturn;
 		break;
 	case HIDIOCGUCODE:
-		/* fall through */
 	case HIDIOCGUSAGE:
 	case HIDIOCSUSAGE:
 	case HIDIOCGUSAGES:

drivers/hid/usbhid/usbhid.h+0−2

 #include <linux/types.h>
 #include <linux/slab.h>
-#include <linux/ktime.h>
 #include <linux/list.h>
 #include <linux/mutex.h>
 #include <linux/timer.h>
 	struct mutex mutex;						/* start/stop/open/close */
 	spinlock_t lock;						/* fifo spinlock */
 	unsigned long iofl;                                             /* I/O flags (CTRL_RUNNING, OUT_RUNNING) */
-	ktime_t input_start_time;					/* When to start handling input */
 	struct timer_list io_retry;                                     /* Retry timer */
 	unsigned long stop_retry;                                       /* Time to give up, in jiffies */
 	unsigned int retry_delay;                                       /* Delay length in ms */

drivers/hid/wacom_wac.c+16−16

@@ -341,7 +341,7 @@ static int wacom_graphire_irq(struct wacom_wac *wacom) · 340 unmodified lines
341		341
342	case 2: /* Mouse with wheel */	342	case 2: /* Mouse with wheel */
343	input_report_key(input, BTN_MIDDLE, data[1] & 0x04);	343	input_report_key(input, BTN_MIDDLE, data[1] & 0x04);
344	/* fall through */	344	fallthrough;
345		345
346	case 3: /* Mouse without wheel */	346	case 3: /* Mouse without wheel */
347	wacom->tool[0] = BTN_TOOL_MOUSE;	347	wacom->tool[0] = BTN_TOOL_MOUSE;
@@ -1201,7 +1201,7 @@ static int wacom_intuos_bt_irq(struct wacom_wac *wacom, size_t len) · 853 unmodified lines
1201	case 0x04:	1201	case 0x04:
1202	wacom_intuos_bt_process_data(wacom, data + i);	1202	wacom_intuos_bt_process_data(wacom, data + i);
1203	i += 10;	1203	i += 10;
1204	/* fall through */	1204	fallthrough;
1205	case 0x03:	1205	case 0x03:
1206	wacom_intuos_bt_process_data(wacom, data + i);	1206	wacom_intuos_bt_process_data(wacom, data + i);
1207	i += 10;	1207	i += 10;
@@ -2148,7 +2148,7 @@ static void wacom_wac_pad_event(struct hid_device hdev, struct hid_field field · 940 unmodified lines
2148	for (i = 0; i < wacom->led.count; i++)	2148	for (i = 0; i < wacom->led.count; i++)
2149	wacom_update_led(wacom, features->numbered_buttons,	2149	wacom_update_led(wacom, features->numbered_buttons,
2150	value, i);	2150	value, i);
2151	/* fall through*/	2151	fallthrough;
2152	default:	2152	default:
2153	do_report = true;	2153	do_report = true;
2154	break;	2154	break;
@@ -3602,14 +3602,14 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 1447 unmodified lines
3602	switch (features->type) {	3602	switch (features->type) {
3603	case GRAPHIRE_BT:	3603	case GRAPHIRE_BT:
3604	__clear_bit(ABS_MISC, input_dev->absbit);	3604	__clear_bit(ABS_MISC, input_dev->absbit);
3605	/* fall through */	3605	fallthrough;
3606		3606
3607	case WACOM_MO:	3607	case WACOM_MO:
3608	case WACOM_G4:	3608	case WACOM_G4:
3609	input_set_abs_params(input_dev, ABS_DISTANCE, 0,	3609	input_set_abs_params(input_dev, ABS_DISTANCE, 0,
3610	features->distance_max,	3610	features->distance_max,
3611	features->distance_fuzz, 0);	3611	features->distance_fuzz, 0);
3612	/* fall through */	3612	fallthrough;
3613		3613
3614	case GRAPHIRE:	3614	case GRAPHIRE:
3615	input_set_capability(input_dev, EV_REL, REL_WHEEL);	3615	input_set_capability(input_dev, EV_REL, REL_WHEEL);
@@ -3649,7 +3649,7 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 33 unmodified lines
3649	case INTUOS4S:	3649	case INTUOS4S:
3650	input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0);	3650	input_set_abs_params(input_dev, ABS_Z, -900, 899, 0, 0);
3651	input_abs_set_res(input_dev, ABS_Z, 287);	3651	input_abs_set_res(input_dev, ABS_Z, 287);
3652	/* fall through */	3652	fallthrough;
3653		3653
3654	case INTUOS:	3654	case INTUOS:
3655	wacom_setup_intuos(wacom_wac);	3655	wacom_setup_intuos(wacom_wac);
@@ -3682,7 +3682,7 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 26 unmodified lines
3682	case TABLETPC:	3682	case TABLETPC:
3683	case TABLETPCE:	3683	case TABLETPCE:
3684	__clear_bit(ABS_MISC, input_dev->absbit);	3684	__clear_bit(ABS_MISC, input_dev->absbit);
3685	/* fall through */	3685	fallthrough;
3686		3686
3687	case DTUS:	3687	case DTUS:
3688	case DTUSX:	3688	case DTUSX:
@@ -3696,7 +3696,7 @@ int wacom_setup_pen_input_capabilities(struct input_dev *input_dev, · 7 unmodified lines
3696		3696
3697	case PTU:	3697	case PTU:
3698	__set_bit(BTN_STYLUS2, input_dev->keybit);	3698	__set_bit(BTN_STYLUS2, input_dev->keybit);
3699	/* fall through */	3699	fallthrough;
3700		3700
3701	case PENPARTNER:	3701	case PENPARTNER:
3702	__set_bit(BTN_TOOL_PEN, input_dev->keybit);	3702	__set_bit(BTN_TOOL_PEN, input_dev->keybit);
@@ -3799,7 +3799,7 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 96 unmodified lines
3799	input_abs_set_res(input_dev, ABS_MT_POSITION_X, 40);	3799	input_abs_set_res(input_dev, ABS_MT_POSITION_X, 40);
3800	input_abs_set_res(input_dev, ABS_MT_POSITION_Y, 40);	3800	input_abs_set_res(input_dev, ABS_MT_POSITION_Y, 40);
3801		3801
3802	/* fall through */	3802	fallthrough;
3803		3803
3804	case INTUOS5:	3804	case INTUOS5:
3805	case INTUOS5L:	3805	case INTUOS5L:
@@ -3817,7 +3817,7 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 11 unmodified lines
3817	input_set_abs_params(input_dev, ABS_MT_WIDTH_MAJOR, 0, features->x_max, 0, 0);	3817	input_set_abs_params(input_dev, ABS_MT_WIDTH_MAJOR, 0, features->x_max, 0, 0);
3818	input_set_abs_params(input_dev, ABS_MT_WIDTH_MINOR, 0, features->y_max, 0, 0);	3818	input_set_abs_params(input_dev, ABS_MT_WIDTH_MINOR, 0, features->y_max, 0, 0);
3819	input_set_abs_params(input_dev, ABS_MT_ORIENTATION, 0, 1, 0, 0);	3819	input_set_abs_params(input_dev, ABS_MT_ORIENTATION, 0, 1, 0, 0);
3820	/* fall through */	3820	fallthrough;
3821		3821
3822	case WACOM_27QHDT:	3822	case WACOM_27QHDT:
3823	if (wacom_wac->shared->touch->product == 0x32C \|\|	3823	if (wacom_wac->shared->touch->product == 0x32C \|\|
@@ -3826,14 +3826,14 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 2 unmodified lines
3826	__set_bit(SW_MUTE_DEVICE, input_dev->swbit);	3826	__set_bit(SW_MUTE_DEVICE, input_dev->swbit);
3827	wacom_wac->shared->has_mute_touch_switch = true;	3827	wacom_wac->shared->has_mute_touch_switch = true;
3828	}	3828	}
3829	/* fall through */	3829	fallthrough;
3830		3830
3831	case MTSCREEN:	3831	case MTSCREEN:
3832	case MTTPC:	3832	case MTTPC:
3833	case MTTPC_B:	3833	case MTTPC_B:
3834	case TABLETPC2FG:	3834	case TABLETPC2FG:
3835	input_mt_init_slots(input_dev, features->touch_max, INPUT_MT_DIRECT);	3835	input_mt_init_slots(input_dev, features->touch_max, INPUT_MT_DIRECT);
3836	/fall through /	3836	fallthrough;
3837		3837
3838	case TABLETPC:	3838	case TABLETPC:
3839	case TABLETPCE:	3839	case TABLETPCE:
@@ -3843,7 +3843,7 @@ int wacom_setup_touch_input_capabilities(struct input_dev *input_dev, · 3 unmodified lines
3843	case INTUOSHT2:	3843	case INTUOSHT2:
3844	input_dev->evbit[0] \|= BIT_MASK(EV_SW);	3844	input_dev->evbit[0] \|= BIT_MASK(EV_SW);
3845	__set_bit(SW_MUTE_DEVICE, input_dev->swbit);	3845	__set_bit(SW_MUTE_DEVICE, input_dev->swbit);
3846	/* fall through */	3846	fallthrough;
3847		3847
3848	case BAMBOO_PT:	3848	case BAMBOO_PT:
3849	case BAMBOO_TOUCH:	3849	case BAMBOO_TOUCH:
@@ -4099,7 +4099,7 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, · 249 unmodified lines
4099		4099
4100	__set_bit(KEY_BUTTONCONFIG, input_dev->keybit);	4100	__set_bit(KEY_BUTTONCONFIG, input_dev->keybit);
4101	__set_bit(KEY_INFO, input_dev->keybit);	4101	__set_bit(KEY_INFO, input_dev->keybit);
4102	/* fall through */	4102	fallthrough;
4103		4103
4104	case WACOM_21UX2:	4104	case WACOM_21UX2:
4105	case WACOM_BEE:	4105	case WACOM_BEE:
@@ -4115,7 +4115,7 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, · 9 unmodified lines
4115	case INTUOS3:	4115	case INTUOS3:
4116	case INTUOS3L:	4116	case INTUOS3L:
4117	input_set_abs_params(input_dev, ABS_RY, 0, 4096, 0, 0);	4117	input_set_abs_params(input_dev, ABS_RY, 0, 4096, 0, 0);
4118	/* fall through */	4118	fallthrough;
4119		4119
4120	case INTUOS3S:	4120	case INTUOS3S:
4121	input_set_abs_params(input_dev, ABS_RX, 0, 4096, 0, 0);	4121	input_set_abs_params(input_dev, ABS_RX, 0, 4096, 0, 0);
@@ -4139,7 +4139,7 @@ int wacom_setup_pad_input_capabilities(struct input_dev *input_dev, · 17 unmodified lines
4139	* ID_INPUT_TABLET to be set.	4139	* ID_INPUT_TABLET to be set.
4140	*/	4140	*/
4141	__set_bit(BTN_STYLUS, input_dev->keybit);	4141	__set_bit(BTN_STYLUS, input_dev->keybit);
4142	/* fall through */	4142	fallthrough;
4143		4143
4144	case INTUOS4:	4144	case INTUOS4:
4145	case INTUOS4L:	4145	case INTUOS4L:

drivers/hsi/clients/ssi_protocol.c+3−3

@@ -291,7 +291,7 @@ static void ssip_set_rxstate(struct ssi_protocol *ssi, unsigned int state) · 290 unmodified lines
291	/* CMT speech workaround */	291	/* CMT speech workaround */
292	if (atomic_read(&ssi->tx_usecnt))	292	if (atomic_read(&ssi->tx_usecnt))
293	break;	293	break;
294	/* Else, fall through */	294	fallthrough;
295	case RECEIVING:	295	case RECEIVING:
296	mod_timer(&ssi->keep_alive, jiffies +	296	mod_timer(&ssi->keep_alive, jiffies +
297	msecs_to_jiffies(SSIP_KATOUT));	297	msecs_to_jiffies(SSIP_KATOUT));
@@ -466,7 +466,7 @@ static void ssip_keep_alive(struct timer_list *t) · 168 unmodified lines
466	case SEND_READY:	466	case SEND_READY:
467	if (atomic_read(&ssi->tx_usecnt) == 0)	467	if (atomic_read(&ssi->tx_usecnt) == 0)
468	break;	468	break;
469	/* Fall through */	469	fallthrough;
470	/*	470	/*
471	* Workaround for cmt-speech in that case	471	* Workaround for cmt-speech in that case
472	* we relay on audio timers.	472	* we relay on audio timers.
@@ -668,7 +668,7 @@ static void ssip_rx_bootinforeq(struct hsi_client *cl, u32 cmd) · 195 unmodified lines
668	case ACTIVE:	668	case ACTIVE:
669	dev_err(&cl->device, "Boot info req on active state\n");	669	dev_err(&cl->device, "Boot info req on active state\n");
670	ssip_error(cl);	670	ssip_error(cl);
671	/* Fall through */	671	fallthrough;
672	case INIT:	672	case INIT:
673	case HANDSHAKE:	673	case HANDSHAKE:
674	spin_lock_bh(&ssi->lock);	674	spin_lock_bh(&ssi->lock);

drivers/hsi/controllers/omap_ssi_core.c+1−1

@@ -296,7 +296,7 @@ static int ssi_clk_event(struct notifier_block *nb, unsigned long event, · 295 unmodified lines
296	break;	296	break;
297	case ABORT_RATE_CHANGE:	297	case ABORT_RATE_CHANGE:
298	dev_dbg(&ssi->device, "abort rate change\n");	298	dev_dbg(&ssi->device, "abort rate change\n");
299	/* Fall through */	299	fallthrough;
300	case POST_RATE_CHANGE:	300	case POST_RATE_CHANGE:
301	dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n",	301	dev_dbg(&ssi->device, "post rate change (%lu -> %lu)\n",
302	clk_data->old_rate, clk_data->new_rate);	302	clk_data->old_rate, clk_data->new_rate);

drivers/hv/hv_kvp.c+1−1

@@ -354,7 +354,7 @@ static void process_ib_ipinfo(void in_msg, void out_msg, int op) · 353 unmodified lines
354		354
355	out->body.kvp_ip_val.dhcp_enabled = in->kvp_ip_val.dhcp_enabled;	355	out->body.kvp_ip_val.dhcp_enabled = in->kvp_ip_val.dhcp_enabled;
356		356
357	/* fallthrough */	357	fallthrough;
358		358
359	case KVP_OP_GET_IP_INFO:	359	case KVP_OP_GET_IP_INFO:
360	utf16s_to_utf8s((wchar_t *)in->kvp_ip_val.adapter_id,	360	utf16s_to_utf8s((wchar_t *)in->kvp_ip_val.adapter_id,

drivers/hv/hv_util.c+51−14

@@ -282,26 +282,52 @@ static struct { · 281 unmodified lines
282	spinlock_t lock;	282	spinlock_t lock;
283	} host_ts;	283	} host_ts;
284		284
285	static struct timespec64 hv_get_adj_host_time(void)	285	static inline u64 reftime_to_ns(u64 reftime)
286	{	286	{
287	struct timespec64 ts;	287	return (reftime - WLTIMEDELTA) * 100;
288	u64 newtime, reftime;	288	}
		289
		290	/*
		291	* Hard coded threshold for host timesync delay: 600 seconds
		292	*/
		293	static const u64 HOST_TIMESYNC_DELAY_THRESH = 600 * (u64)NSEC_PER_SEC;
		294
		295	static int hv_get_adj_host_time(struct timespec64 *ts)
		296	{
		297	u64 newtime, reftime, timediff_adj;
289	unsigned long flags;	298	unsigned long flags;
		299	int ret = 0;
290		300
291	spin_lock_irqsave(&host_ts.lock, flags);	301	spin_lock_irqsave(&host_ts.lock, flags);
292	reftime = hv_read_reference_counter();	302	reftime = hv_read_reference_counter();
293	newtime = host_ts.host_time + (reftime - host_ts.ref_time);	303
294	ts = ns_to_timespec64((newtime - WLTIMEDELTA) * 100);	304	/*
		305	* We need to let the caller know that last update from host
		306	* is older than the max allowable threshold. clock_gettime()
		307	* and PTP ioctl do not have a documented error that we could
		308	* return for this specific case. Use ESTALE to report this.
		309	*/
		310	timediff_adj = reftime - host_ts.ref_time;
		311	if (timediff_adj * 100 > HOST_TIMESYNC_DELAY_THRESH) {
		312	pr_warn_once("TIMESYNC IC: Stale time stamp, %llu nsecs old\n",
		313	(timediff_adj * 100));
		314	ret = -ESTALE;
		315	}
		316
		317	newtime = host_ts.host_time + timediff_adj;
		318	*ts = ns_to_timespec64(reftime_to_ns(newtime));
295	spin_unlock_irqrestore(&host_ts.lock, flags);	319	spin_unlock_irqrestore(&host_ts.lock, flags);
296		320
297	return ts;	321	return ret;
298	}	322	}
299		323
300	static void hv_set_host_time(struct work_struct *work)	324	static void hv_set_host_time(struct work_struct *work)
301	{	325	{
302	struct timespec64 ts = hv_get_adj_host_time();
303		326
304	do_settimeofday64(&ts);	327	struct timespec64 ts;
		328
		329	if (!hv_get_adj_host_time(&ts))
		330	do_settimeofday64(&ts);
305	}	331	}
306		332
307	/*	333	/*
@@ -361,10 +387,23 @@ static void timesync_onchannelcallback(void *context) · 53 unmodified lines
361	struct ictimesync_ref_data *refdata;	387	struct ictimesync_ref_data *refdata;
362	u8 *time_txf_buf = util_timesynch.recv_buffer;	388	u8 *time_txf_buf = util_timesynch.recv_buffer;
363		389
364	vmbus_recvpacket(channel, time_txf_buf,	390	/*
365	HV_HYP_PAGE_SIZE, &recvlen, &requestid);	391	* Drain the ring buffer and use the last packet to update
		392	* host_ts
		393	*/
		394	while (1) {
		395	int ret = vmbus_recvpacket(channel, time_txf_buf,
		396	HV_HYP_PAGE_SIZE, &recvlen,
		397	&requestid);
		398	if (ret) {
		399	pr_warn_once("TimeSync IC pkt recv failed (Err: %d)\n",
		400	ret);
		401	break;
		402	}
		403
		404	if (!recvlen)
		405	break;
366		406
367	if (recvlen > 0) {
368	icmsghdrp = (struct icmsg_hdr *)&time_txf_buf[	407	icmsghdrp = (struct icmsg_hdr *)&time_txf_buf[
369	sizeof(struct vmbuspipe_hdr)];	408	sizeof(struct vmbuspipe_hdr)];
370		409
@@ -622,9 +661,7 @@ static int hv_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) · 251 unmodified lines
622		661
623	static int hv_ptp_gettime(struct ptp_clock_info info, struct timespec64 ts)	662	static int hv_ptp_gettime(struct ptp_clock_info info, struct timespec64 ts)
624	{	663	{
625	*ts = hv_get_adj_host_time();	664	return hv_get_adj_host_time(ts);
626
627	return 0;
628	}	665	}
629		666
630	static struct ptp_clock_info ptp_hyperv_info = {	667	static struct ptp_clock_info ptp_hyperv_info = {

drivers/hwmon/adt7462.c+4−4

@@ -435,7 +435,7 @@ static const char voltage_label(struct adt7462_data data, int which) · 434 unmodified lines
435	case 3:	435	case 3:
436	return "+1.5V";	436	return "+1.5V";
437	}	437	}
438	/* fall through */	438	fallthrough;
439	case 2:	439	case 2:
440	if (!(data->pin_cfg[1] & ADT7462_PIN22_INPUT))	440	if (!(data->pin_cfg[1] & ADT7462_PIN22_INPUT))
441	return "+12V3";	441	return "+12V3";
@@ -493,7 +493,7 @@ static const char voltage_label(struct adt7462_data data, int which) · 51 unmodified lines
493	case 3:	493	case 3:
494	return "+1.5";	494	return "+1.5";
495	}	495	}
496	/* fall through */	496	fallthrough;
497	case 11:	497	case 11:
498	if (data->pin_cfg[3] >> ADT7462_PIN28_SHIFT ==	498	if (data->pin_cfg[3] >> ADT7462_PIN28_SHIFT ==
499	ADT7462_PIN28_VOLT &&	499	ADT7462_PIN28_VOLT &&
@@ -531,7 +531,7 @@ static int voltage_multiplier(struct adt7462_data *data, int which) · 31 unmodified lines
531	case 3:	531	case 3:
532	return 7800;	532	return 7800;
533	}	533	}
534	/* fall through */	534	fallthrough;
535	case 2:	535	case 2:
536	if (!(data->pin_cfg[1] & ADT7462_PIN22_INPUT))	536	if (!(data->pin_cfg[1] & ADT7462_PIN22_INPUT))
537	return 62500;	537	return 62500;
@@ -589,7 +589,7 @@ static int voltage_multiplier(struct adt7462_data *data, int which) · 51 unmodified lines
589	case 3:	589	case 3:
590	return 7800;	590	return 7800;
591	}	591	}
592	/* fall through */	592	fallthrough;
593	case 11:	593	case 11:
594	case 12:	594	case 12:
595	if (data->pin_cfg[3] >> ADT7462_PIN28_SHIFT ==	595	if (data->pin_cfg[3] >> ADT7462_PIN28_SHIFT ==

drivers/hwmon/applesmc.c+16−15

@@ -753,15 +753,18 @@ static ssize_t applesmc_light_show(struct device *dev, · 752 unmodified lines
753	}	753	}
754		754
755	ret = applesmc_read_key(LIGHT_SENSOR_LEFT_KEY, buffer, data_length);	755	ret = applesmc_read_key(LIGHT_SENSOR_LEFT_KEY, buffer, data_length);
		756	if (ret)
		757	goto out;
756	/* newer macbooks report a single 10-bit bigendian value */	758	/* newer macbooks report a single 10-bit bigendian value */
757	if (data_length == 10) {	759	if (data_length == 10) {
758	left = be16_to_cpu((__be16 )(buffer + 6)) >> 2;	760	left = be16_to_cpu((__be16 )(buffer + 6)) >> 2;
759	goto out;	761	goto out;
760	}	762	}
761	left = buffer[2];	763	left = buffer[2];
		764
		765	ret = applesmc_read_key(LIGHT_SENSOR_RIGHT_KEY, buffer, data_length);
762	if (ret)	766	if (ret)
763	goto out;	767	goto out;
764	ret = applesmc_read_key(LIGHT_SENSOR_RIGHT_KEY, buffer, data_length);
765	right = buffer[2];	768	right = buffer[2];
766		769
767	out:	770	out:
@@ -810,12 +813,11 @@ static ssize_t applesmc_show_fan_speed(struct device *dev, · 42 unmodified lines
810	to_index(attr));	813	to_index(attr));
811		814
812	ret = applesmc_read_key(newkey, buffer, 2);	815	ret = applesmc_read_key(newkey, buffer, 2);
813	speed = ((buffer[0] << 8 \| buffer[1]) >> 2);
814
815	if (ret)	816	if (ret)
816	return ret;	817	return ret;
817	else	818
818	return snprintf(sysfsbuf, PAGE_SIZE, "%u\n", speed);	819	speed = ((buffer[0] << 8 \| buffer[1]) >> 2);
		820	return snprintf(sysfsbuf, PAGE_SIZE, "%u\n", speed);
819	}	821	}
820		822
821	static ssize_t applesmc_store_fan_speed(struct device *dev,	823	static ssize_t applesmc_store_fan_speed(struct device *dev,
@@ -851,12 +853,11 @@ static ssize_t applesmc_show_fan_manual(struct device *dev, · 29 unmodified lines
851	u8 buffer[2];	853	u8 buffer[2];
852		854
853	ret = applesmc_read_key(FANS_MANUAL, buffer, 2);	855	ret = applesmc_read_key(FANS_MANUAL, buffer, 2);
854	manual = ((buffer[0] << 8 \| buffer[1]) >> to_index(attr)) & 0x01;
855
856	if (ret)	856	if (ret)
857	return ret;	857	return ret;
858	else	858
859	return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", manual);	859	manual = ((buffer[0] << 8 \| buffer[1]) >> to_index(attr)) & 0x01;
		860	return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", manual);
860	}	861	}
861		862
862	static ssize_t applesmc_store_fan_manual(struct device *dev,	863	static ssize_t applesmc_store_fan_manual(struct device *dev,
@@ -872,10 +873,11 @@ static ssize_t applesmc_store_fan_manual(struct device *dev, · 9 unmodified lines
872	return -EINVAL;	873	return -EINVAL;
873		874
874	ret = applesmc_read_key(FANS_MANUAL, buffer, 2);	875	ret = applesmc_read_key(FANS_MANUAL, buffer, 2);
875	val = (buffer[0] << 8 \| buffer[1]);
876	if (ret)	876	if (ret)
877	goto out;	877	goto out;
878		878
		879	val = (buffer[0] << 8 \| buffer[1]);
		880
879	if (input)	881	if (input)
880	val = val \| (0x01 << to_index(attr));	882	val = val \| (0x01 << to_index(attr));
881	else	883	else
@@ -951,13 +953,12 @@ static ssize_t applesmc_key_count_show(struct device *dev, · 69 unmodified lines
951	u32 count;	953	u32 count;
952		954
953	ret = applesmc_read_key(KEY_COUNT_KEY, buffer, 4);	955	ret = applesmc_read_key(KEY_COUNT_KEY, buffer, 4);
954	count = ((u32)buffer[0]<<24) + ((u32)buffer[1]<<16) +
955	((u32)buffer[2]<<8) + buffer[3];
956
957	if (ret)	956	if (ret)
958	return ret;	957	return ret;
959	else	958
960	return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", count);	959	count = ((u32)buffer[0]<<24) + ((u32)buffer[1]<<16) +
		960	((u32)buffer[2]<<8) + buffer[3];
		961	return snprintf(sysfsbuf, PAGE_SIZE, "%d\n", count);
961	}	962	}
962		963
963	static ssize_t applesmc_key_at_index_read_show(struct device *dev,	964	static ssize_t applesmc_key_at_index_read_show(struct device *dev,

drivers/hwmon/emc1403.c+2−2

@@ -406,10 +406,10 @@ static int emc1403_probe(struct i2c_client *client, · 405 unmodified lines
406	switch (id->driver_data) {	406	switch (id->driver_data) {
407	case emc1404:	407	case emc1404:
408	data->groups[2] = &emc1404_group;	408	data->groups[2] = &emc1404_group;
409	/* fall through */	409	fallthrough;
410	case emc1403:	410	case emc1403:
411	data->groups[1] = &emc1403_group;	411	data->groups[1] = &emc1403_group;
412	/* fall through */	412	fallthrough;
413	case emc1402:	413	case emc1402:
414	data->groups[0] = &emc1402_group;	414	data->groups[0] = &emc1402_group;
415	}	415	}

drivers/hwmon/f71882fg.c+2−2

@@ -1285,7 +1285,7 @@ static struct f71882fg_data f71882fg_update_device(struct device dev) · 1284 unmodified lines
1285	data->pwm_auto_point_pwm[nr][0] =	1285	data->pwm_auto_point_pwm[nr][0] =
1286	f71882fg_read8(data,	1286	f71882fg_read8(data,
1287	F71882FG_REG_POINT_PWM(nr, 0));	1287	F71882FG_REG_POINT_PWM(nr, 0));
1288	/* Fall through */	1288	fallthrough;
1289	case f71862fg:	1289	case f71862fg:
1290	data->pwm_auto_point_pwm[nr][1] =	1290	data->pwm_auto_point_pwm[nr][1] =
1291	f71882fg_read8(data,	1291	f71882fg_read8(data,
@@ -2442,7 +2442,7 @@ static int f71882fg_probe(struct platform_device *pdev) · 1150 unmodified lines
2442	case f71869a:	2442	case f71869a:
2443	/* These always have signed auto point temps */	2443	/* These always have signed auto point temps */
2444	data->auto_point_temp_signed = 1;	2444	data->auto_point_temp_signed = 1;
2445	/* Fall through - to select correct fan/pwm reg bank! */	2445	fallthrough; /* to select correct fan/pwm reg bank! */
2446	case f71889fg:	2446	case f71889fg:
2447	case f71889ed:	2447	case f71889ed:
2448	case f71889a:	2448	case f71889a:

drivers/hwmon/gsc-hwmon.c+1−0

@@ -172,6 +172,7 @@ gsc_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, · 171 unmodified lines
172	case mode_temperature:	172	case mode_temperature:
173	if (tmp > 0x8000)	173	if (tmp > 0x8000)
174	tmp -= 0xffff;	174	tmp -= 0xffff;
		175	tmp = 100; / convert to millidegrees celsius */
175	break;	176	break;
176	case mode_voltage_raw:	177	case mode_voltage_raw:
177	tmp = clamp_val(tmp, 0, BIT(GSC_HWMON_RESOLUTION));	178	tmp = clamp_val(tmp, 0, BIT(GSC_HWMON_RESOLUTION));

drivers/hwmon/hwmon-vid.c+2−2

@@ -96,7 +96,7 @@ int vid_from_reg(int val, u8 vrm) · 95 unmodified lines
96	val &= 0x1f;	96	val &= 0x1f;
97	if (val == 0x1f)	97	if (val == 0x1f)
98	return 0;	98	return 0;
99	/* fall through */	99	fallthrough;
100	case 25: /* AMD NPT 0Fh */	100	case 25: /* AMD NPT 0Fh */
101	val &= 0x3f;	101	val &= 0x3f;
102	return (val < 32) ? 1550 - 25 * val	102	return (val < 32) ? 1550 - 25 * val
@@ -122,7 +122,7 @@ int vid_from_reg(int val, u8 vrm) · 19 unmodified lines
122		122
123	case 84: /* VRM 8.4 */	123	case 84: /* VRM 8.4 */
124	val &= 0x0f;	124	val &= 0x0f;
125	/* fall through */	125	fallthrough;
126	case 82: /* VRM 8.2 */	126	case 82: /* VRM 8.2 */
127	val &= 0x1f;	127	val &= 0x1f;
128	return val == 0x1f ? 0 :	128	return val == 0x1f ? 0 :

drivers/hwmon/ina3221.c+1−1

@@ -352,7 +352,7 @@ static int ina3221_read_curr(struct device *dev, u32 attr, · 351 unmodified lines
352	if (ret)	352	if (ret)
353	return ret;	353	return ret;
354		354
355	/* fall through */	355	fallthrough;
356	case hwmon_curr_crit:	356	case hwmon_curr_crit:
357	case hwmon_curr_max:	357	case hwmon_curr_max:
358	if (!resistance_uo)	358	if (!resistance_uo)

drivers/hwmon/nct6775.c+1−1

@@ -2669,7 +2669,7 @@ static void pwm_update_registers(struct nct6775_data *data, int nr) · 2668 unmodified lines
2669	case thermal_cruise:	2669	case thermal_cruise:
2670	nct6775_write_value(data, data->REG_TARGET[nr],	2670	nct6775_write_value(data, data->REG_TARGET[nr],
2671	data->target_temp[nr]);	2671	data->target_temp[nr]);
2672	/* fall through */	2672	fallthrough;
2673	default:	2673	default:
2674	reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);	2674	reg = nct6775_read_value(data, data->REG_FAN_MODE[nr]);
2675	reg = (reg & ~data->tolerance_mask) \|	2675	reg = (reg & ~data->tolerance_mask) \|

drivers/hwmon/nct7904.c+2−2

@@ -231,7 +231,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel, · 230 unmodified lines
231	if (ret < 0)	231	if (ret < 0)
232	return ret;	232	return ret;
233	cnt = ((ret & 0xff00) >> 3) \| (ret & 0x1f);	233	cnt = ((ret & 0xff00) >> 3) \| (ret & 0x1f);
234	if (cnt == 0x1fff)	234	if (cnt == 0 \|\| cnt == 0x1fff)
235	rpm = 0;	235	rpm = 0;
236	else	236	else
237	rpm = 1350000 / cnt;	237	rpm = 1350000 / cnt;
@@ -243,7 +243,7 @@ static int nct7904_read_fan(struct device *dev, u32 attr, int channel, · 5 unmodified lines
243	if (ret < 0)	243	if (ret < 0)
244	return ret;	244	return ret;
245	cnt = ((ret & 0xff00) >> 3) \| (ret & 0x1f);	245	cnt = ((ret & 0xff00) >> 3) \| (ret & 0x1f);
246	if (cnt == 0x1fff)	246	if (cnt == 0 \|\| cnt == 0x1fff)
247	rpm = 0;	247	rpm = 0;
248	else	248	else
249	rpm = 1350000 / cnt;	249	rpm = 1350000 / cnt;

drivers/hwmon/occ/common.c+3−3

@@ -752,7 +752,7 @@ static int occ_setup_sensor_attrs(struct occ *occ) · 751 unmodified lines
752	switch (sensors->freq.version) {	752	switch (sensors->freq.version) {
753	case 2:	753	case 2:
754	show_freq = occ_show_freq_2;	754	show_freq = occ_show_freq_2;
755	/* fall through */	755	fallthrough;
756	case 1:	756	case 1:
757	num_attrs += (sensors->freq.num_sensors * 2);	757	num_attrs += (sensors->freq.num_sensors * 2);
758	break;	758	break;
@@ -763,7 +763,7 @@ static int occ_setup_sensor_attrs(struct occ *occ) · 4 unmodified lines
763	switch (sensors->power.version) {	763	switch (sensors->power.version) {
764	case 2:	764	case 2:
765	show_power = occ_show_power_2;	765	show_power = occ_show_power_2;
766	/* fall through */	766	fallthrough;
767	case 1:	767	case 1:
768	num_attrs += (sensors->power.num_sensors * 4);	768	num_attrs += (sensors->power.num_sensors * 4);
769	break;	769	break;
@@ -781,7 +781,7 @@ static int occ_setup_sensor_attrs(struct occ *occ) · 11 unmodified lines
781	break;	781	break;
782	case 3:	782	case 3:
783	show_caps = occ_show_caps_3;	783	show_caps = occ_show_caps_3;
784	/* fall through */	784	fallthrough;
785	case 2:	785	case 2:
786	num_attrs += (sensors->caps.num_sensors * 8);	786	num_attrs += (sensors->caps.num_sensors * 8);
787	break;	787	break;

drivers/hwmon/pmbus/isl68137.c+6−1

 	raa_dmpvr1_2rail,
 	raa_dmpvr2_1rail,
 	raa_dmpvr2_2rail,
+	raa_dmpvr2_2rail_nontc,
 	raa_dmpvr2_3rail,
 	raa_dmpvr2_hv,
 };
 		info->pages = 1;
 		info->read_word_data = raa_dmpvr2_read_word_data;
 		break;
+	case raa_dmpvr2_2rail_nontc:
+		info->func[0] &= ~PMBUS_HAVE_TEMP;
+		info->func[1] &= ~PMBUS_HAVE_TEMP;
+		fallthrough;
 	case raa_dmpvr2_2rail:
 		info->pages = 2;
 		info->read_word_data = raa_dmpvr2_read_word_data;
 	{"raa228000", raa_dmpvr2_hv},
 	{"raa228004", raa_dmpvr2_hv},
 	{"raa228006", raa_dmpvr2_hv},
-	{"raa228228", raa_dmpvr2_2rail},
+	{"raa228228", raa_dmpvr2_2rail_nontc},
 	{"raa229001", raa_dmpvr2_2rail},
 	{"raa229004", raa_dmpvr2_2rail},
 	{}

drivers/hwmon/w83627hf.c+1−1

@@ -1213,7 +1213,7 @@ temp_type_store(struct device dev, struct device_attribute devattr, · 1212 unmodified lines
1213	case W83781D_DEFAULT_BETA:	1213	case W83781D_DEFAULT_BETA:
1214	dev_warn(dev, "Sensor type %d is deprecated, please use 4 "	1214	dev_warn(dev, "Sensor type %d is deprecated, please use 4 "
1215	"instead\n", W83781D_DEFAULT_BETA);	1215	"instead\n", W83781D_DEFAULT_BETA);
1216	/* fall through */	1216	fallthrough;
1217	case 4: /* thermistor */	1217	case 4: /* thermistor */
1218	tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);	1218	tmp = w83627hf_read_value(data, W83781D_REG_SCFG1);
1219	w83627hf_write_value(data, W83781D_REG_SCFG1,	1219	w83627hf_write_value(data, W83781D_REG_SCFG1,

drivers/hwmon/w83781d.c+1−1

@@ -814,7 +814,7 @@ store_sensor(struct device dev, struct device_attribute da, · 813 unmodified lines
814	dev_warn(dev,	814	dev_warn(dev,
815	"Sensor type %d is deprecated, please use 4 instead\n",	815	"Sensor type %d is deprecated, please use 4 instead\n",
816	W83781D_DEFAULT_BETA);	816	W83781D_DEFAULT_BETA);
817	/* fall through */	817	fallthrough;
818	case 4: /* thermistor */	818	case 4: /* thermistor */
819	tmp = w83781d_read_value(data, W83781D_REG_SCFG1);	819	tmp = w83781d_read_value(data, W83781D_REG_SCFG1);
820	w83781d_write_value(data, W83781D_REG_SCFG1,	820	w83781d_write_value(data, W83781D_REG_SCFG1,

drivers/hwmon/w83795.c+1−1

@@ -2127,7 +2127,7 @@ static void w83795_apply_temp_config(struct w83795_data *data, u8 config, · 2126 unmodified lines
2127	if (temp_chan >= 4)	2127	if (temp_chan >= 4)
2128	break;	2128	break;
2129	data->temp_mode \|= 1 << temp_chan;	2129	data->temp_mode \|= 1 << temp_chan;
2130	/* fall through */	2130	fallthrough;
2131	case 0x3: /* Thermistor */	2131	case 0x3: /* Thermistor */
2132	data->has_temp \|= 1 << temp_chan;	2132	data->has_temp \|= 1 << temp_chan;
2133	break;	2133	break;

drivers/hwtracing/coresight/coresight-cpu-debug.c+2−2

@@ -346,10 +346,10 @@ static void debug_init_arch_data(void *info) · 345 unmodified lines
346	switch (mode) {	346	switch (mode) {
347	case EDDEVID_IMPL_FULL:	347	case EDDEVID_IMPL_FULL:
348	drvdata->edvidsr_present = true;	348	drvdata->edvidsr_present = true;
349	/* Fall through */	349	fallthrough;
350	case EDDEVID_IMPL_EDPCSR_EDCIDSR:	350	case EDDEVID_IMPL_EDPCSR_EDCIDSR:
351	drvdata->edcidsr_present = true;	351	drvdata->edcidsr_present = true;
352	/* Fall through */	352	fallthrough;
353	case EDDEVID_IMPL_EDPCSR:	353	case EDDEVID_IMPL_EDPCSR:
354	/*	354	/*
355	* In ARM DDI 0487A.k, the EDDEVID1.PCSROffset is used to	355	* In ARM DDI 0487A.k, the EDDEVID1.PCSROffset is used to

drivers/hwtracing/coresight/coresight-etm4x.c+0−1

@@ -1382,7 +1382,6 @@ static int etm4_cpu_pm_notify(struct notifier_block *nb, unsigned long cmd, · 1381 unmodified lines
1382	return NOTIFY_BAD;	1382	return NOTIFY_BAD;
1383	break;	1383	break;
1384	case CPU_PM_EXIT:	1384	case CPU_PM_EXIT:
1385	/* fallthrough */
1386	case CPU_PM_ENTER_FAILED:	1385	case CPU_PM_ENTER_FAILED:
1387	if (drvdata->state_needs_restore)	1386	if (drvdata->state_needs_restore)
1388	etm4_cpu_restore(drvdata);	1387	etm4_cpu_restore(drvdata);

drivers/hwtracing/coresight/coresight-tmc.c+0−2

 	 */
 	switch (drvdata->memwidth) {
 	case TMC_MEM_INTF_WIDTH_32BITS:
-	/* fallthrough */
 	case TMC_MEM_INTF_WIDTH_64BITS:
-	/* fallthrough */
 	case TMC_MEM_INTF_WIDTH_128BITS:
 		mask = GENMASK(31, 4);
 		break;

drivers/hwtracing/intel_th/sth.c+2−2

@@ -84,11 +84,11 @@ static ssize_t notrace sth_stm_packet(struct stm_data *stm_data, · 83 unmodified lines
84	/* Global packets (GERR, XSYNC, TRIG) are sent with register writes */	84	/* Global packets (GERR, XSYNC, TRIG) are sent with register writes */
85	case STP_PACKET_GERR:	85	case STP_PACKET_GERR:
86	reg += 4;	86	reg += 4;
87	/* fall through */	87	fallthrough;
88		88
89	case STP_PACKET_XSYNC:	89	case STP_PACKET_XSYNC:
90	reg += 8;	90	reg += 8;
91	/* fall through */	91	fallthrough;
92		92
93	case STP_PACKET_TRIG:	93	case STP_PACKET_TRIG:
94	if (flags & STP_PACKET_TIMESTAMPED)	94	if (flags & STP_PACKET_TIMESTAMPED)

drivers/i2c/busses/i2c-bcm-iproc.c+2−2

@@ -720,7 +720,7 @@ static int bcm_iproc_i2c_xfer_internal(struct bcm_iproc_i2c_dev *iproc_i2c, · 719 unmodified lines
720		720
721	/* mark the last byte */	721	/* mark the last byte */
722	if (!process_call && (i == msg->len - 1))	722	if (!process_call && (i == msg->len - 1))
723	val \|= 1 << M_TX_WR_STATUS_SHIFT;	723	val \|= BIT(M_TX_WR_STATUS_SHIFT);
724		724
725	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);	725	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);
726	}	726	}
@@ -738,7 +738,7 @@ static int bcm_iproc_i2c_xfer_internal(struct bcm_iproc_i2c_dev *iproc_i2c, · 11 unmodified lines
738	*/	738	*/
739	addr = i2c_8bit_addr_from_msg(msg);	739	addr = i2c_8bit_addr_from_msg(msg);
740	/* mark it the last byte out */	740	/* mark it the last byte out */
741	val = addr \| (1 << M_TX_WR_STATUS_SHIFT);	741	val = addr \| BIT(M_TX_WR_STATUS_SHIFT);
742	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);	742	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);
743	}	743	}
744		744

drivers/i2c/busses/i2c-omap.c+0−1

@@ -1425,7 +1425,6 @@ omap_i2c_probe(struct platform_device *pdev) · 1424 unmodified lines
1425	major = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev);	1425	major = OMAP_I2C_REV_SCHEME_0_MAJOR(omap->rev);
1426	break;	1426	break;
1427	case OMAP_I2C_SCHEME_1:	1427	case OMAP_I2C_SCHEME_1:
1428	/* FALLTHROUGH */
1429	default:	1428	default:
1430	omap->regs = (u8 *)reg_map_ip_v2;	1429	omap->regs = (u8 *)reg_map_ip_v2;
1431	rev = (rev << 16) \|	1430	rev = (rev << 16) \|

drivers/i2c/busses/i2c-opal.c+1−1

@@ -125,7 +125,7 @@ static int i2c_opal_smbus_xfer(struct i2c_adapter *adap, u16 addr, · 124 unmodified lines
125	case I2C_SMBUS_BYTE:	125	case I2C_SMBUS_BYTE:
126	req.buffer_ra = cpu_to_be64(__pa(&data->byte));	126	req.buffer_ra = cpu_to_be64(__pa(&data->byte));
127	req.size = cpu_to_be32(1);	127	req.size = cpu_to_be32(1);
128	/* Fall through */	128	fallthrough;
129	case I2C_SMBUS_QUICK:	129	case I2C_SMBUS_QUICK:
130	req.type = (read_write == I2C_SMBUS_READ) ?	130	req.type = (read_write == I2C_SMBUS_READ) ?
131	OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE;	131	OPAL_I2C_RAW_READ : OPAL_I2C_RAW_WRITE;

drivers/i2c/busses/i2c-rcar.c+1−0

@@ -590,6 +590,7 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv) · 589 unmodified lines
590	/* master sent stop */	590	/* master sent stop */
591	if (ssr_filtered & SSR) {	591	if (ssr_filtered & SSR) {
592	i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value);	592	i2c_slave_event(priv->slave, I2C_SLAVE_STOP, &value);
		593	rcar_i2c_write(priv, ICSCR, SIE \| SDBS); /* clear our NACK */
593	rcar_i2c_write(priv, ICSIER, SAR);	594	rcar_i2c_write(priv, ICSIER, SAR);
594	rcar_i2c_write(priv, ICSSR, ~SSR & 0xff);	595	rcar_i2c_write(priv, ICSSR, ~SSR & 0xff);
595	}	596	}

drivers/i2c/i2c-core-acpi.c+0−10

@@ -276,16 +276,6 @@ void i2c_acpi_register_devices(struct i2c_adapter *adap) · 275 unmodified lines
276	dev_warn(&adap->dev, "failed to enumerate I2C slaves\n");	276	dev_warn(&adap->dev, "failed to enumerate I2C slaves\n");
277	}	277	}
278		278
279	const struct acpi_device_id *
280	i2c_acpi_match_device(const struct acpi_device_id *matches,
281	struct i2c_client *client)
282	{
283	if (!(client && matches))
284	return NULL;
285
286	return acpi_match_device(matches, &client->dev);
287	}
288
289	static const struct acpi_device_id i2c_acpi_force_400khz_device_ids[] = {	279	static const struct acpi_device_id i2c_acpi_force_400khz_device_ids[] = {
290	/*	280	/*
291	* These Silead touchscreen controllers only work at 400KHz, for	281	* These Silead touchscreen controllers only work at 400KHz, for

drivers/i2c/i2c-core-base.c+1−1

@@ -480,7 +480,7 @@ static int i2c_device_probe(struct device *dev) · 479 unmodified lines
480	* or ACPI ID table is supplied for the probing device.	480	* or ACPI ID table is supplied for the probing device.
481	*/	481	*/
482	if (!driver->id_table &&	482	if (!driver->id_table &&
483	!i2c_acpi_match_device(dev->driver->acpi_match_table, client) &&	483	!acpi_driver_match_device(dev, dev->driver) &&
484	!i2c_of_match_device(dev->driver->of_match_table, client)) {	484	!i2c_of_match_device(dev->driver->of_match_table, client)) {
485	status = -ENODEV;	485	status = -ENODEV;
486	goto put_sync_adapter;	486	goto put_sync_adapter;

drivers/i2c/i2c-core.h+0−9

 }
 #ifdef CONFIG_ACPI
-const struct acpi_device_id *
-i2c_acpi_match_device(const struct acpi_device_id *matches,
-		      struct i2c_client *client);
 void i2c_acpi_register_devices(struct i2c_adapter *adap);
 int i2c_acpi_get_irq(struct i2c_client *client);
 #else /* CONFIG_ACPI */
 static inline void i2c_acpi_register_devices(struct i2c_adapter *adap) { }
-static inline const struct acpi_device_id *
-i2c_acpi_match_device(const struct acpi_device_id *matches,
-		      struct i2c_client *client)
-{
-	return NULL;
-}
 static inline int i2c_acpi_get_irq(struct i2c_client *client)
 {

drivers/i3c/master/dw-i3c-master.c+1−1

@@ -603,7 +603,7 @@ static int dw_i3c_master_bus_init(struct i3c_master_controller *m) · 602 unmodified lines
603	ret = dw_i2c_clk_cfg(master);	603	ret = dw_i2c_clk_cfg(master);
604	if (ret)	604	if (ret)
605	return ret;	605	return ret;
606	/* fall through */	606	fallthrough;
607	case I3C_BUS_MODE_PURE:	607	case I3C_BUS_MODE_PURE:
608	ret = dw_i3c_clk_cfg(master);	608	ret = dw_i3c_clk_cfg(master);
609	if (ret)	609	if (ret)

drivers/ide/hpt366.c+3−3

@@ -575,14 +575,14 @@ static u8 hpt3xx_udma_filter(ide_drive_t *drive) · 574 unmodified lines
575	if (!HPT370_ALLOW_ATA100_5 \|\|	575	if (!HPT370_ALLOW_ATA100_5 \|\|
576	check_in_drive_list(drive, bad_ata100_5))	576	check_in_drive_list(drive, bad_ata100_5))
577	return ATA_UDMA4;	577	return ATA_UDMA4;
578	/* fall through */	578	fallthrough;
579	case HPT372 :	579	case HPT372 :
580	case HPT372A:	580	case HPT372A:
581	case HPT372N:	581	case HPT372N:
582	case HPT374 :	582	case HPT374 :
583	if (ata_id_is_sata(drive->id))	583	if (ata_id_is_sata(drive->id))
584	mask &= ~0x0e;	584	mask &= ~0x0e;
585	/* fall through */	585	fallthrough;
586	default:	586	default:
587	return mask;	587	return mask;
588	}	588	}
@@ -602,7 +602,7 @@ static u8 hpt3xx_mdma_filter(ide_drive_t *drive) · 13 unmodified lines
602	case HPT374 :	602	case HPT374 :
603	if (ata_id_is_sata(drive->id))	603	if (ata_id_is_sata(drive->id))
604	return 0x00;	604	return 0x00;
605	/* fall through */	605	fallthrough;
606	default:	606	default:
607	return 0x07;	607	return 0x07;
608	}	608	}

drivers/ide/ide-cd.c+2−2

@@ -350,7 +350,7 @@ static int cdrom_decode_status(ide_drive_t *drive, u8 stat) · 349 unmodified lines
350	*/	350	*/
351	if (scsi_req(rq)->cmd[0] == GPCMD_START_STOP_UNIT)	351	if (scsi_req(rq)->cmd[0] == GPCMD_START_STOP_UNIT)
352	break;	352	break;
353	/* fall-through */	353	fallthrough;
354	case DATA_PROTECT:	354	case DATA_PROTECT:
355	/*	355	/*
356	* No point in retrying after an illegal request or data	356	* No point in retrying after an illegal request or data
@@ -750,7 +750,7 @@ static ide_startstop_t cdrom_newpc_intr(ide_drive_t *drive) · 393 unmodified lines
750	case REQ_OP_DRV_IN:	750	case REQ_OP_DRV_IN:
751	case REQ_OP_DRV_OUT:	751	case REQ_OP_DRV_OUT:
752	expiry = ide_cd_expiry;	752	expiry = ide_cd_expiry;
753	/FALLTHRU/	753	fallthrough;
754	default:	754	default:
755	timeout = ATAPI_WAIT_PC;	755	timeout = ATAPI_WAIT_PC;
756	break;	756	break;

drivers/ide/ide-floppy.c+1−1

@@ -428,7 +428,7 @@ static int ide_floppy_get_capacity(ide_drive_t *drive) · 427 unmodified lines
428	* (maintains previous driver behaviour)	428	* (maintains previous driver behaviour)
429	*/	429	*/
430	break;	430	break;
431	/* fall through */	431	fallthrough;
432	case CAPACITY_CURRENT:	432	case CAPACITY_CURRENT:
433	/* Normal Zip/LS-120 disks */	433	/* Normal Zip/LS-120 disks */
434	if (memcmp(cap_desc, &floppy->cap_desc, 8))	434	if (memcmp(cap_desc, &floppy->cap_desc, 8))

drivers/ide/ide-probe.c+1−1

@@ -143,7 +143,7 @@ static void ide_classify_atapi_dev(ide_drive_t *drive) · 142 unmodified lines
143	}	143	}
144	/* Early cdrom models used zero */	144	/* Early cdrom models used zero */
145	type = ide_cdrom;	145	type = ide_cdrom;
146	/* fall through */	146	fallthrough;
147	case ide_cdrom:	147	case ide_cdrom:
148	drive->dev_flags \|= IDE_DFLAG_REMOVABLE;	148	drive->dev_flags \|= IDE_DFLAG_REMOVABLE;
149	#ifdef CONFIG_PPC	149	#ifdef CONFIG_PPC

drivers/ide/ide-taskfile.c+6−6

@@ -129,7 +129,7 @@ ide_startstop_t do_rw_taskfile(ide_drive_t drive, struct ide_cmd orig_cmd) · 128 unmodified lines
129	return pre_task_out_intr(drive, cmd);	129	return pre_task_out_intr(drive, cmd);
130	}	130	}
131	handler = task_pio_intr;	131	handler = task_pio_intr;
132	/* fall through */	132	fallthrough;
133	case ATA_PROT_NODATA:	133	case ATA_PROT_NODATA:
134	if (handler == NULL)	134	if (handler == NULL)
135	handler = task_no_data_intr;	135	handler = task_no_data_intr;
@@ -141,7 +141,7 @@ ide_startstop_t do_rw_taskfile(ide_drive_t drive, struct ide_cmd orig_cmd) · 5 unmodified lines
141	hwif->expiry = dma_ops->dma_timer_expiry;	141	hwif->expiry = dma_ops->dma_timer_expiry;
142	ide_execute_command(drive, cmd, ide_dma_intr, 2 * WAIT_CMD);	142	ide_execute_command(drive, cmd, ide_dma_intr, 2 * WAIT_CMD);
143	dma_ops->dma_start(drive);	143	dma_ops->dma_start(drive);
144	/* fall through */	144	fallthrough;
145	default:	145	default:
146	return ide_started;	146	return ide_started;
147	}	147	}
@@ -579,10 +579,10 @@ int ide_taskfile_ioctl(ide_drive_t *drive, unsigned long arg) · 431 unmodified lines
579	goto abort;	579	goto abort;
580	}	580	}
581	cmd.tf_flags \|= IDE_TFLAG_MULTI_PIO;	581	cmd.tf_flags \|= IDE_TFLAG_MULTI_PIO;
582	/* fall through */	582	fallthrough;
583	case TASKFILE_OUT:	583	case TASKFILE_OUT:
584	cmd.protocol = ATA_PROT_PIO;	584	cmd.protocol = ATA_PROT_PIO;
585	/* fall through */	585	fallthrough;
586	case TASKFILE_OUT_DMAQ:	586	case TASKFILE_OUT_DMAQ:
587	case TASKFILE_OUT_DMA:	587	case TASKFILE_OUT_DMA:
588	cmd.tf_flags \|= IDE_TFLAG_WRITE;	588	cmd.tf_flags \|= IDE_TFLAG_WRITE;
@@ -598,10 +598,10 @@ int ide_taskfile_ioctl(ide_drive_t *drive, unsigned long arg) · 9 unmodified lines
598	goto abort;	598	goto abort;
599	}	599	}
600	cmd.tf_flags \|= IDE_TFLAG_MULTI_PIO;	600	cmd.tf_flags \|= IDE_TFLAG_MULTI_PIO;
601	/* fall through */	601	fallthrough;
602	case TASKFILE_IN:	602	case TASKFILE_IN:
603	cmd.protocol = ATA_PROT_PIO;	603	cmd.protocol = ATA_PROT_PIO;
604	/* fall through */	604	fallthrough;
605	case TASKFILE_IN_DMAQ:	605	case TASKFILE_IN_DMAQ:
606	case TASKFILE_IN_DMA:	606	case TASKFILE_IN_DMA:
607	nsect = taskin / SECTOR_SIZE;	607	nsect = taskin / SECTOR_SIZE;

drivers/ide/sis5513.c+1−1

@@ -494,7 +494,7 @@ static int init_chipset_sis5513(struct pci_dev *dev) · 493 unmodified lines
494	pci_read_config_byte(dev, 0x09, &reg);	494	pci_read_config_byte(dev, 0x09, &reg);
495	if ((reg & 0x0f) != 0x00)	495	if ((reg & 0x0f) != 0x00)
496	pci_write_config_byte(dev, 0x09, reg&0xf0);	496	pci_write_config_byte(dev, 0x09, reg&0xf0);
497	/* fall through */	497	fallthrough;
498	case ATA_16:	498	case ATA_16:
499	/* force per drive recovery and active timings	499	/* force per drive recovery and active timings
500	needed on ATA_33 and below chips */	500	needed on ATA_33 and below chips */

drivers/idle/intel_idle.c+0−16

@@ -89,14 +89,6 @@ static unsigned int mwait_substates __initdata; · 88 unmodified lines
89	*/	89	*/
90	#define CPUIDLE_FLAG_ALWAYS_ENABLE BIT(15)	90	#define CPUIDLE_FLAG_ALWAYS_ENABLE BIT(15)
91		91
92	/*
93	* Set this flag for states where the HW flushes the TLB for us
94	* and so we don't need cross-calls to keep it consistent.
95	* If this flag is set, SW flushes the TLB, so even if the
96	* HW doesn't do the flushing, this flag is safe to use.
97	*/
98	#define CPUIDLE_FLAG_TLB_FLUSHED BIT(16)
99
100	/*	92	/*
101	* MWAIT takes an 8-bit "hint" in EAX "suggesting"	93	* MWAIT takes an 8-bit "hint" in EAX "suggesting"
102	* the C-state (top nibble) and sub-state (bottom nibble)	94	* the C-state (top nibble) and sub-state (bottom nibble)
@@ -131,14 +123,6 @@ static __cpuidle int intel_idle(struct cpuidle_device *dev, · 28 unmodified lines
131	unsigned long eax = flg2MWAIT(state->flags);	123	unsigned long eax = flg2MWAIT(state->flags);
132	unsigned long ecx = 1; /* break on interrupt flag */	124	unsigned long ecx = 1; /* break on interrupt flag */
133	bool tick;	125	bool tick;
134	int cpu = smp_processor_id();
135
136	/*
137	* leave_mm() to avoid costly and often unnecessary wakeups
138	* for flushing the user TLB's associated with the active mm.
139	*/
140	if (state->flags & CPUIDLE_FLAG_TLB_FLUSHED)
141	leave_mm(cpu);
142		126
143	if (!static_cpu_has(X86_FEATURE_ARAT)) {	127	if (!static_cpu_has(X86_FEATURE_ARAT)) {
144	/*	128	/*

drivers/iio/accel/mma8452.c+1−1

@@ -1580,7 +1580,7 @@ static int mma8452_probe(struct i2c_client *client, · 1579 unmodified lines
1580	case FXLS8471_DEVICE_ID:	1580	case FXLS8471_DEVICE_ID:
1581	if (ret == data->chip_info->chip_id)	1581	if (ret == data->chip_info->chip_id)
1582	break;	1582	break;
1583	/* fall through */	1583	fallthrough;
1584	default:	1584	default:
1585	ret = -ENODEV;	1585	ret = -ENODEV;
1586	goto disable_regulators;	1586	goto disable_regulators;

drivers/iio/adc/ab8500-gpadc.c+1−1

@@ -484,7 +484,7 @@ static int ab8500_gpadc_read(struct ab8500_gpadc *gpadc, · 483 unmodified lines
484	delay_max = 10000; /* large range optimises sleepmode */	484	delay_max = 10000; /* large range optimises sleepmode */
485	break;	485	break;
486	}	486	}
487	/* Fall through */	487	fallthrough;
488	default:	488	default:
489	ctrl1 \|= AB8500_GPADC_CTRL1_BUF_ENA;	489	ctrl1 \|= AB8500_GPADC_CTRL1_BUF_ENA;
490	break;	490	break;

drivers/iio/adc/cpcap-adc.c+1−1

@@ -690,7 +690,7 @@ static void cpcap_adc_phase(struct cpcap_adc_request *req) · 689 unmodified lines
690	break;	690	break;
691	case CPCAP_ADC_BATTI_PI17:	691	case CPCAP_ADC_BATTI_PI17:
692	index = req->bank_index;	692	index = req->bank_index;
693	/* fallthrough */	693	fallthrough;
694	default:	694	default:
695	req->result += conv_tbl[index].cal_offset;	695	req->result += conv_tbl[index].cal_offset;
696	req->result += conv_tbl[index].align_offset;	696	req->result += conv_tbl[index].align_offset;

drivers/iio/chemical/sps30.c+1−1

@@ -118,7 +118,7 @@ static int sps30_do_cmd(struct sps30_state state, u16 cmd, u8 data, int size) · 117 unmodified lines
118	case SPS30_READ_AUTO_CLEANING_PERIOD:	118	case SPS30_READ_AUTO_CLEANING_PERIOD:
119	buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8;	119	buf[0] = SPS30_AUTO_CLEANING_PERIOD >> 8;
120	buf[1] = (u8)(SPS30_AUTO_CLEANING_PERIOD & 0xff);	120	buf[1] = (u8)(SPS30_AUTO_CLEANING_PERIOD & 0xff);
121	/* fall through */	121	fallthrough;
122	case SPS30_READ_DATA_READY_FLAG:	122	case SPS30_READ_DATA_READY_FLAG:
123	case SPS30_READ_DATA:	123	case SPS30_READ_DATA:
124	case SPS30_READ_SERIAL:	124	case SPS30_READ_SERIAL:

drivers/iio/dac/ad5592r-base.c+0−2

 			break;
 		case CH_MODE_UNUSED:
-			/* fall-through */
 		default:
 			switch (st->channel_offstate[i]) {
 			case CH_OFFSTATE_OUT_TRISTATE:
 				break;
 			case CH_OFFSTATE_PULLDOWN:
-				/* fall-through */
 			default:
 				pulldown |= BIT(i);
 				break;

drivers/iio/dac/dpot-dac.c+3−2

 		case IIO_VAL_INT:
 			/*
 			 * Convert integer scale to fractional scale by
-			 * setting the denominator (val2) to one, and...
+			 * setting the denominator (val2) to one...
 			 */
 			*val2 = 1;
 			ret = IIO_VAL_FRACTIONAL;
-			/* fall through */
+			/* ...and fall through. Say it again for GCC. */
+			fallthrough;
 		case IIO_VAL_FRACTIONAL:
 			*val *= regulator_get_voltage(dac->vref) / 1000;
 			*val2 *= dac->max_ohms;

drivers/iio/health/max30102.c+2−2

@@ -273,10 +273,10 @@ static int max30102_read_measurement(struct max30102_data *data, · 272 unmodified lines
273	switch (measurements) {	273	switch (measurements) {
274	case 3:	274	case 3:
275	MAX30102_COPY_DATA(2);	275	MAX30102_COPY_DATA(2);
276	/* fall through */	276	fallthrough;
277	case 2:	277	case 2:
278	MAX30102_COPY_DATA(1);	278	MAX30102_COPY_DATA(1);
279	/* fall through */	279	fallthrough;
280	case 1:	280	case 1:
281	MAX30102_COPY_DATA(0);	281	MAX30102_COPY_DATA(0);
282	break;	282	break;

drivers/iio/imu/adis.c+3−3

@@ -97,11 +97,11 @@ int __adis_write_reg(struct adis *adis, unsigned int reg, · 96 unmodified lines
97	adis->tx[9] = (value >> 24) & 0xff;	97	adis->tx[9] = (value >> 24) & 0xff;
98	adis->tx[6] = ADIS_WRITE_REG(reg + 2);	98	adis->tx[6] = ADIS_WRITE_REG(reg + 2);
99	adis->tx[7] = (value >> 16) & 0xff;	99	adis->tx[7] = (value >> 16) & 0xff;
100	/* fall through */	100	fallthrough;
101	case 2:	101	case 2:
102	adis->tx[4] = ADIS_WRITE_REG(reg + 1);	102	adis->tx[4] = ADIS_WRITE_REG(reg + 1);
103	adis->tx[5] = (value >> 8) & 0xff;	103	adis->tx[5] = (value >> 8) & 0xff;
104	/* fall through */	104	fallthrough;
105	case 1:	105	case 1:
106	adis->tx[2] = ADIS_WRITE_REG(reg);	106	adis->tx[2] = ADIS_WRITE_REG(reg);
107	adis->tx[3] = value & 0xff;	107	adis->tx[3] = value & 0xff;
@@ -191,7 +191,7 @@ int __adis_read_reg(struct adis *adis, unsigned int reg, · 83 unmodified lines
191	adis->tx[2] = ADIS_READ_REG(reg + 2);	191	adis->tx[2] = ADIS_READ_REG(reg + 2);
192	adis->tx[3] = 0;	192	adis->tx[3] = 0;
193	spi_message_add_tail(&xfers[1], &msg);	193	spi_message_add_tail(&xfers[1], &msg);
194	/* fall through */	194	fallthrough;
195	case 2:	195	case 2:
196	adis->tx[4] = ADIS_READ_REG(reg);	196	adis->tx[4] = ADIS_READ_REG(reg);
197	adis->tx[5] = 0;	197	adis->tx[5] = 0;

drivers/iio/industrialio-core.c+2−2

@@ -599,7 +599,7 @@ static ssize_t __iio_format_value(char *buf, size_t len, unsigned int type, · 598 unmodified lines
599	return scnprintf(buf, len, "%d", vals[0]);	599	return scnprintf(buf, len, "%d", vals[0]);
600	case IIO_VAL_INT_PLUS_MICRO_DB:	600	case IIO_VAL_INT_PLUS_MICRO_DB:
601	scale_db = true;	601	scale_db = true;
602	/* fall through */	602	fallthrough;
603	case IIO_VAL_INT_PLUS_MICRO:	603	case IIO_VAL_INT_PLUS_MICRO:
604	if (vals[1] < 0)	604	if (vals[1] < 0)
605	return scnprintf(buf, len, "-%d.%06u%s", abs(vals[0]),	605	return scnprintf(buf, len, "-%d.%06u%s", abs(vals[0]),
@@ -918,7 +918,7 @@ static ssize_t iio_write_channel_info(struct device *dev, · 312 unmodified lines
918	break;	918	break;
919	case IIO_VAL_INT_PLUS_MICRO_DB:	919	case IIO_VAL_INT_PLUS_MICRO_DB:
920	scale_db = true;	920	scale_db = true;
921	/* fall through */	921	fallthrough;
922	case IIO_VAL_INT_PLUS_MICRO:	922	case IIO_VAL_INT_PLUS_MICRO:
923	fract_mult = 100000;	923	fract_mult = 100000;
924	break;	924	break;

drivers/iio/light/si1145.c+1−1

@@ -1042,7 +1042,7 @@ static int si1145_initialize(struct si1145_data *data) · 1041 unmodified lines
1042	SI1145_LED_CURRENT_45mA);	1042	SI1145_LED_CURRENT_45mA);
1043	if (ret < 0)	1043	if (ret < 0)
1044	return ret;	1044	return ret;
1045	/* fallthrough */	1045	fallthrough;
1046	case 2:	1046	case 2:
1047	ret = i2c_smbus_write_byte_data(client,	1047	ret = i2c_smbus_write_byte_data(client,
1048	SI1145_REG_PS_LED21,	1048	SI1145_REG_PS_LED21,

drivers/iio/magnetometer/ak8974.c+1−1

@@ -499,7 +499,7 @@ static int ak8974_detect(struct ak8974 *ak8974) · 498 unmodified lines
499	switch (whoami) {	499	switch (whoami) {
500	case AK8974_WHOAMI_VALUE_AMI306:	500	case AK8974_WHOAMI_VALUE_AMI306:
501	name = "ami306";	501	name = "ami306";
502	/* fall-through */	502	fallthrough;
503	case AK8974_WHOAMI_VALUE_AMI305:	503	case AK8974_WHOAMI_VALUE_AMI305:
504	ret = regmap_read(ak8974->map, AMI305_VER, &fw);	504	ret = regmap_read(ak8974->map, AMI305_VER, &fw);
505	if (ret)	505	if (ret)

drivers/infiniband/core/cm.c+6−6

@@ -3034,7 +3034,7 @@ static int cm_rej_handler(struct cm_work *work) · 3033 unmodified lines
3034	case IB_CM_REP_SENT:	3034	case IB_CM_REP_SENT:
3035	case IB_CM_MRA_REP_RCVD:	3035	case IB_CM_MRA_REP_RCVD:
3036	ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);	3036	ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
3037	/* fall through */	3037	fallthrough;
3038	case IB_CM_REQ_RCVD:	3038	case IB_CM_REQ_RCVD:
3039	case IB_CM_MRA_REQ_SENT:	3039	case IB_CM_MRA_REQ_SENT:
3040	if (IBA_GET(CM_REJ_REASON, rej_msg) == IB_CM_REJ_STALE_CONN)	3040	if (IBA_GET(CM_REJ_REASON, rej_msg) == IB_CM_REJ_STALE_CONN)
@@ -3044,7 +3044,7 @@ static int cm_rej_handler(struct cm_work *work) · 3 unmodified lines
3044	break;	3044	break;
3045	case IB_CM_DREQ_SENT:	3045	case IB_CM_DREQ_SENT:
3046	ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);	3046	ib_cancel_mad(cm_id_priv->av.port->mad_agent, cm_id_priv->msg);
3047	/* fall through */	3047	fallthrough;
3048	case IB_CM_REP_RCVD:	3048	case IB_CM_REP_RCVD:
3049	case IB_CM_MRA_REP_SENT:	3049	case IB_CM_MRA_REP_SENT:
3050	cm_enter_timewait(cm_id_priv);	3050	cm_enter_timewait(cm_id_priv);
@@ -3058,7 +3058,7 @@ static int cm_rej_handler(struct cm_work *work) · 7 unmodified lines
3058	cm_enter_timewait(cm_id_priv);	3058	cm_enter_timewait(cm_id_priv);
3059	break;	3059	break;
3060	}	3060	}
3061	/* fall through */	3061	fallthrough;
3062	default:	3062	default:
3063	pr_debug("%s: local_id %d, cm_id_priv->id.state: %d\n",	3063	pr_debug("%s: local_id %d, cm_id_priv->id.state: %d\n",
3064	__func__, be32_to_cpu(cm_id_priv->id.local_id),	3064	__func__, be32_to_cpu(cm_id_priv->id.local_id),
@@ -3116,7 +3116,7 @@ int ib_send_cm_mra(struct ib_cm_id *cm_id, · 51 unmodified lines
3116	msg_response = CM_MSG_RESPONSE_OTHER;	3116	msg_response = CM_MSG_RESPONSE_OTHER;
3117	break;	3117	break;
3118	}	3118	}
3119	/* fall through */	3119	fallthrough;
3120	default:	3120	default:
3121	pr_debug("%s: local_id %d, cm_id_priv->id.state: %d\n",	3121	pr_debug("%s: local_id %d, cm_id_priv->id.state: %d\n",
3122	__func__, be32_to_cpu(cm_id_priv->id.local_id),	3122	__func__, be32_to_cpu(cm_id_priv->id.local_id),
@@ -3227,7 +3227,7 @@ static int cm_mra_handler(struct cm_work *work) · 104 unmodified lines
3227	case IB_CM_MRA_REP_RCVD:	3227	case IB_CM_MRA_REP_RCVD:
3228	atomic_long_inc(&work->port->counter_group[CM_RECV_DUPLICATES].	3228	atomic_long_inc(&work->port->counter_group[CM_RECV_DUPLICATES].
3229	counter[CM_MRA_COUNTER]);	3229	counter[CM_MRA_COUNTER]);
3230	/* fall through */	3230	fallthrough;
3231	default:	3231	default:
3232	pr_debug("%s local_id %d, cm_id_priv->id.state: %d\n",	3232	pr_debug("%s local_id %d, cm_id_priv->id.state: %d\n",
3233	__func__, be32_to_cpu(cm_id_priv->id.local_id),	3233	__func__, be32_to_cpu(cm_id_priv->id.local_id),
@@ -4214,7 +4214,7 @@ static int cm_init_qp_rts_attr(struct cm_id_private *cm_id_priv, · 980 unmodified lines
4214	qp_attr->retry_cnt = cm_id_priv->retry_count;	4214	qp_attr->retry_cnt = cm_id_priv->retry_count;
4215	qp_attr->rnr_retry = cm_id_priv->rnr_retry_count;	4215	qp_attr->rnr_retry = cm_id_priv->rnr_retry_count;
4216	qp_attr->max_rd_atomic = cm_id_priv->initiator_depth;	4216	qp_attr->max_rd_atomic = cm_id_priv->initiator_depth;
4217	/* fall through */	4217	fallthrough;
4218	case IB_QPT_XRC_TGT:	4218	case IB_QPT_XRC_TGT:
4219	*qp_attr_mask \|= IB_QP_TIMEOUT;	4219	*qp_attr_mask \|= IB_QP_TIMEOUT;
4220	qp_attr->timeout = cm_id_priv->av.timeout;	4220	qp_attr->timeout = cm_id_priv->av.timeout;

drivers/infiniband/core/cma.c+2−1

 		event.event = RDMA_CM_EVENT_ESTABLISHED;
 		break;
 	case IB_CM_DREQ_ERROR:
-		event.status = -ETIMEDOUT; /* fall through */
+		event.status = -ETIMEDOUT;
+		fallthrough;
 	case IB_CM_DREQ_RECEIVED:
 	case IB_CM_DREP_RECEIVED:
 		if (!cma_comp_exch(id_priv, RDMA_CM_CONNECT,

drivers/infiniband/core/rw.c+0−1

@@ -510,7 +510,6 @@ struct ib_send_wr rdma_rw_ctx_wrs(struct rdma_rw_ctx ctx, struct ib_qp *qp, · 509 unmodified lines
510	switch (ctx->type) {	510	switch (ctx->type) {
511	case RDMA_RW_SIG_MR:	511	case RDMA_RW_SIG_MR:
512	case RDMA_RW_MR:	512	case RDMA_RW_MR:
513	/* fallthrough */
514	for (i = 0; i < ctx->nr_ops; i++) {	513	for (i = 0; i < ctx->nr_ops; i++) {
515	rdma_rw_update_lkey(&ctx->reg[i],	514	rdma_rw_update_lkey(&ctx->reg[i],
516	ctx->reg[i].wr.wr.opcode !=	515	ctx->reg[i].wr.wr.opcode !=

drivers/infiniband/core/ucma.c+2−2

@@ -794,7 +794,7 @@ static void ucma_copy_ib_route(struct rdma_ucm_query_route_resp *resp, · 793 unmodified lines
794	case 2:	794	case 2:
795	ib_copy_path_rec_to_user(&resp->ib_route[1],	795	ib_copy_path_rec_to_user(&resp->ib_route[1],
796	&route->path_rec[1]);	796	&route->path_rec[1]);
797	/* fall through */	797	fallthrough;
798	case 1:	798	case 1:
799	ib_copy_path_rec_to_user(&resp->ib_route[0],	799	ib_copy_path_rec_to_user(&resp->ib_route[0],
800	&route->path_rec[0]);	800	&route->path_rec[0]);
@@ -820,7 +820,7 @@ static void ucma_copy_iboe_route(struct rdma_ucm_query_route_resp *resp, · 19 unmodified lines
820	case 2:	820	case 2:
821	ib_copy_path_rec_to_user(&resp->ib_route[1],	821	ib_copy_path_rec_to_user(&resp->ib_route[1],
822	&route->path_rec[1]);	822	&route->path_rec[1]);
823	/* fall through */	823	fallthrough;
824	case 1:	824	case 1:
825	ib_copy_path_rec_to_user(&resp->ib_route[0],	825	ib_copy_path_rec_to_user(&resp->ib_route[0],
826	&route->path_rec[0]);	826	&route->path_rec[0]);

drivers/infiniband/core/uverbs_ioctl.c+2−2

@@ -259,7 +259,7 @@ static int uverbs_process_attr(struct bundle_priv *pbundle, · 258 unmodified lines
259	return -EOPNOTSUPP;	259	return -EOPNOTSUPP;
260		260
261	e->ptr_attr.enum_id = uattr->attr_data.enum_data.elem_id;	261	e->ptr_attr.enum_id = uattr->attr_data.enum_data.elem_id;
262	/* fall through */	262	fallthrough;
263	case UVERBS_ATTR_TYPE_PTR_IN:	263	case UVERBS_ATTR_TYPE_PTR_IN:
264	/* Ensure that any data provided by userspace beyond the known	264	/* Ensure that any data provided by userspace beyond the known
265	* struct is zero. Userspace that knows how to use some future	265	* struct is zero. Userspace that knows how to use some future
@@ -271,7 +271,7 @@ static int uverbs_process_attr(struct bundle_priv *pbundle, · 5 unmodified lines
271	!uverbs_is_attr_cleared(uattr, val_spec->u.ptr.len))	271	!uverbs_is_attr_cleared(uattr, val_spec->u.ptr.len))
272	return -EOPNOTSUPP;	272	return -EOPNOTSUPP;
273		273
274	/* fall through */	274	fallthrough;
275	case UVERBS_ATTR_TYPE_PTR_OUT:	275	case UVERBS_ATTR_TYPE_PTR_OUT:
276	if (uattr->len < val_spec->u.ptr.min_len \|\|	276	if (uattr->len < val_spec->u.ptr.min_len \|\|
277	(!val_spec->zero_trailing &&	277	(!val_spec->zero_trailing &&

drivers/infiniband/hw/bnxt_re/ib_verbs.c+1−1

@@ -2657,7 +2657,7 @@ int bnxt_re_post_send(struct ib_qp ib_qp, const struct ib_send_wr wr, · 2656 unmodified lines
2657	default:	2657	default:
2658	break;	2658	break;
2659	}	2659	}
2660	/* fall through */	2660	fallthrough;
2661	case IB_WR_SEND_WITH_INV:	2661	case IB_WR_SEND_WITH_INV:
2662	rc = bnxt_re_build_send_wqe(qp, wr, &wqe);	2662	rc = bnxt_re_build_send_wqe(qp, wr, &wqe);
2663	break;	2663	break;

drivers/infiniband/hw/bnxt_re/qplib_fp.c+1−1

@@ -1779,7 +1779,7 @@ int bnxt_qplib_post_send(struct bnxt_qplib_qp *qp, · 1778 unmodified lines
1779		1779
1780	break;	1780	break;
1781	}	1781	}
1782	/* fall thru */	1782	fallthrough;
1783	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:	1783	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_IMM:
1784	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:	1784	case BNXT_QPLIB_SWQE_TYPE_SEND_WITH_INV:
1785	{	1785	{

drivers/infiniband/hw/cxgb4/cm.c+2−2

@@ -2885,7 +2885,7 @@ static int peer_abort(struct c4iw_dev dev, struct sk_buff skb) · 2884 unmodified lines
2885	case MORIBUND:	2885	case MORIBUND:
2886	case CLOSING:	2886	case CLOSING:
2887	stop_ep_timer(ep);	2887	stop_ep_timer(ep);
2888	/FALLTHROUGH/	2888	fallthrough;
2889	case FPDU_MODE:	2889	case FPDU_MODE:
2890	if (ep->com.qp && ep->com.qp->srq) {	2890	if (ep->com.qp && ep->com.qp->srq) {
2891	srqidx = ABORT_RSS_SRQIDX_G(	2891	srqidx = ABORT_RSS_SRQIDX_G(
@@ -3759,7 +3759,7 @@ static void active_ofld_conn_reply(struct c4iw_dev dev, struct sk_buff skb, · 867 unmodified lines
3759	send_fw_act_open_req(ep, atid);	3759	send_fw_act_open_req(ep, atid);
3760	return;	3760	return;
3761	}	3761	}
3762	/* fall through */	3762	fallthrough;
3763	case FW_EADDRINUSE:	3763	case FW_EADDRINUSE:
3764	set_bit(ACT_RETRY_INUSE, &ep->com.history);	3764	set_bit(ACT_RETRY_INUSE, &ep->com.history);
3765	if (ep->retry_count++ < ACT_OPEN_RETRY_COUNT) {	3765	if (ep->retry_count++ < ACT_OPEN_RETRY_COUNT) {

drivers/infiniband/hw/cxgb4/qp.c+1−1

@@ -1165,7 +1165,7 @@ int c4iw_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 1164 unmodified lines
1165	break;	1165	break;
1166	}	1166	}
1167	fw_flags \|= FW_RI_RDMA_WRITE_WITH_IMMEDIATE;	1167	fw_flags \|= FW_RI_RDMA_WRITE_WITH_IMMEDIATE;
1168	/FALLTHROUGH/	1168	fallthrough;
1169	case IB_WR_RDMA_WRITE:	1169	case IB_WR_RDMA_WRITE:
1170	fw_opcode = FW_RI_RDMA_WRITE_WR;	1170	fw_opcode = FW_RI_RDMA_WRITE_WR;
1171	swsqe->opcode = FW_RI_RDMA_WRITE;	1171	swsqe->opcode = FW_RI_RDMA_WRITE;

drivers/infiniband/hw/hfi1/pio_copy.c+0−1

@@ -209,7 +209,6 @@ static inline void jcopy(u8 dest, const u8 src, u32 n) · 208 unmodified lines
209	fallthrough;	209	fallthrough;
210	case 1:	210	case 1:
211	dest++ = src++;	211	dest++ = src++;
212	/* fall through */
213	}	212	}
214	}	213	}
215		214

drivers/infiniband/hw/i40iw/i40iw_cm.c+1−1

@@ -2443,7 +2443,7 @@ static void i40iw_handle_rst_pkt(struct i40iw_cm_node *cm_node, · 2442 unmodified lines
2443	case I40IW_CM_STATE_FIN_WAIT1:	2443	case I40IW_CM_STATE_FIN_WAIT1:
2444	case I40IW_CM_STATE_LAST_ACK:	2444	case I40IW_CM_STATE_LAST_ACK:
2445	cm_node->cm_id->rem_ref(cm_node->cm_id);	2445	cm_node->cm_id->rem_ref(cm_node->cm_id);
2446	/* fall through */	2446	fallthrough;
2447	case I40IW_CM_STATE_TIME_WAIT:	2447	case I40IW_CM_STATE_TIME_WAIT:
2448	cm_node->state = I40IW_CM_STATE_CLOSED;	2448	cm_node->state = I40IW_CM_STATE_CLOSED;
2449	i40iw_rem_ref_cm_node(cm_node);	2449	i40iw_rem_ref_cm_node(cm_node);

drivers/infiniband/hw/i40iw/i40iw_ctrl.c+2−3

 		info->out_rdrsp = true;
 		break;
 	case I40IW_AE_SOURCE_RSVD:
-		/* fallthrough */
 	default:
 		break;
 	}
 					LS_64(1, I40IW_CQPSQ_UPESD_ENTRY_VALID)));
 		set_64bit_val(wqe, 56, info->entry[2].data);
-		/* fallthrough */
+		fallthrough;
 	case 2:
 		set_64bit_val(wqe, 32,
 			      (LS_64(info->entry[1].cmd, I40IW_CQPSQ_UPESD_SDCMD) |
 					LS_64(1, I40IW_CQPSQ_UPESD_ENTRY_VALID)));
 		set_64bit_val(wqe, 40, info->entry[1].data);
-		/* fallthrough */
+		fallthrough;
 	case 1:
 		set_64bit_val(wqe, 0,
 			      LS_64(info->entry[0].cmd, I40IW_CQPSQ_UPESD_SDCMD));

drivers/infiniband/hw/i40iw/i40iw_hw.c+1−2

 				i40iw_cm_disconn(iwqp);
 			break;
 		case I40IW_AE_BAD_CLOSE:
-			/* fall through */
 		case I40IW_AE_RESET_SENT:
 			i40iw_next_iw_state(iwqp, I40IW_QP_STATE_ERROR, 1, 0, 0);
 			i40iw_cm_disconn(iwqp);
 		case I40IW_AE_UDA_XMIT_DGRAM_TOO_LONG:
 		case I40IW_AE_UDA_XMIT_DGRAM_TOO_SHORT:
 			ctx_info->err_rq_idx_valid = false;
-			/* fall through */
+			fallthrough;
 		default:
 			if (!info->sq && ctx_info->err_rq_idx_valid) {
 				ctx_info->err_rq_idx = info->wqe_idx;

drivers/infiniband/hw/i40iw/i40iw_main.c+10−12

 		iwdev->iw_status = 0;
 		i40iw_port_ibevent(iwdev);
 		i40iw_destroy_rdma_device(iwdev->iwibdev);
-		/* fallthrough */
+		fallthrough;
 	case IP_ADDR_REGISTERED:
 		if (!iwdev->reset)
 			i40iw_del_macip_entry(iwdev, (u8)iwdev->mac_ip_table_idx);
-		/* fallthrough */
+		fallthrough;
-		/* fallthrough */
 	case PBLE_CHUNK_MEM:
 		i40iw_destroy_pble_pool(dev, iwdev->pble_rsrc);
-		/* fallthrough */
+		fallthrough;
 	case CEQ_CREATED:
 		i40iw_dele_ceqs(iwdev);
-		/* fallthrough */
+		fallthrough;
 	case AEQ_CREATED:
 		i40iw_destroy_aeq(iwdev);
-		/* fallthrough */
+		fallthrough;
 	case IEQ_CREATED:
 		i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_IEQ, iwdev->reset);
-		/* fallthrough */
+		fallthrough;
 	case ILQ_CREATED:
 		i40iw_puda_dele_resources(&iwdev->vsi, I40IW_PUDA_RSRC_TYPE_ILQ, iwdev->reset);
-		/* fallthrough */
+		fallthrough;
 	case CCQ_CREATED:
 		i40iw_destroy_ccq(iwdev);
-		/* fallthrough */
+		fallthrough;
 	case HMC_OBJS_CREATED:
 		i40iw_del_hmc_objects(dev, dev->hmc_info, true, iwdev->reset);
-		/* fallthrough */
+		fallthrough;
 	case CQP_CREATED:
 		i40iw_destroy_cqp(iwdev, true);
-		/* fallthrough */
+		fallthrough;
 	case INITIAL_STATE:
 		i40iw_cleanup_cm_core(&iwdev->cm_core);
 		if (iwdev->vsi.pestat) {
 		i40iw_del_init_mem(iwdev);
 		break;
 	case INVALID_STATE:
-		/* fallthrough */
 	default:
 		i40iw_pr_err("bad init_state = %d\n", iwdev->init_state);
 		break;

drivers/infiniband/hw/i40iw/i40iw_puda.c+2−2

@@ -814,13 +814,13 @@ void i40iw_puda_dele_resources(struct i40iw_sc_vsi *vsi, · 813 unmodified lines
814	switch (rsrc->completion) {	814	switch (rsrc->completion) {
815	case PUDA_HASH_CRC_COMPLETE:	815	case PUDA_HASH_CRC_COMPLETE:
816	i40iw_free_hash_desc(rsrc->hash_desc);	816	i40iw_free_hash_desc(rsrc->hash_desc);
817	/* fall through */	817	fallthrough;
818	case PUDA_QP_CREATED:	818	case PUDA_QP_CREATED:
819	if (!reset)	819	if (!reset)
820	i40iw_puda_free_qp(rsrc);	820	i40iw_puda_free_qp(rsrc);
821		821
822	i40iw_free_dma_mem(dev->hw, &rsrc->qpmem);	822	i40iw_free_dma_mem(dev->hw, &rsrc->qpmem);
823	/* fallthrough */	823	fallthrough;
824	case PUDA_CQ_CREATED:	824	case PUDA_CQ_CREATED:
825	if (!reset)	825	if (!reset)
826	i40iw_puda_free_cq(rsrc);	826	i40iw_puda_free_cq(rsrc);

drivers/infiniband/hw/i40iw/i40iw_utils.c+3−5

 	switch (event) {
 	case NETDEV_DOWN:
 		action = I40IW_ARP_DELETE;
-		/* Fall through */
+		fallthrough;
 	case NETDEV_UP:
-		/* Fall through */
 	case NETDEV_CHANGEADDR:
 		/* Just skip if no need to handle ARP cache */
 	switch (event) {
 	case NETDEV_DOWN:
 		action = I40IW_ARP_DELETE;
-		/* Fall through */
+		fallthrough;
 	case NETDEV_UP:
-		/* Fall through */
 	case NETDEV_CHANGEADDR:
 		i40iw_manage_arp_cache(iwdev,
 				       netdev->dev_addr,
 	switch (event) {
 	case NETDEV_DOWN:
 		iwdev->iw_status = 0;
-		/* Fall through */
+		fallthrough;
 	case NETDEV_UP:
 		i40iw_port_ibevent(iwdev);
 		break;

drivers/infiniband/hw/i40iw/i40iw_verbs.c+2−3

 	case I40IW_QP_STATE_RTS:
 		if (iwqp->iwarp_state == I40IW_QP_STATE_IDLE)
 			i40iw_send_reset(iwqp->cm_node);
-		/* fall through */
+		fallthrough;
 	case I40IW_QP_STATE_IDLE:
 	case I40IW_QP_STATE_TERMINATE:
 	case I40IW_QP_STATE_CLOSING:
 		switch (ib_wr->opcode) {
 		case IB_WR_SEND:
-			/* fall-through */
 		case IB_WR_SEND_WITH_INV:
 			if (ib_wr->opcode == IB_WR_SEND) {
 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
 			break;
 		case IB_WR_RDMA_READ_WITH_INV:
 			inv_stag = true;
-			/* fall-through*/
+			fallthrough;
 		case IB_WR_RDMA_READ:
 			if (ib_wr->num_sge > I40IW_MAX_SGE_RD) {
 				err = -EINVAL;

drivers/infiniband/hw/mlx4/cq.c+2−2

@@ -765,13 +765,13 @@ repoll: · 764 unmodified lines
765	switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {	765	switch (cqe->owner_sr_opcode & MLX4_CQE_OPCODE_MASK) {
766	case MLX4_OPCODE_RDMA_WRITE_IMM:	766	case MLX4_OPCODE_RDMA_WRITE_IMM:
767	wc->wc_flags \|= IB_WC_WITH_IMM;	767	wc->wc_flags \|= IB_WC_WITH_IMM;
768	/* fall through */	768	fallthrough;
769	case MLX4_OPCODE_RDMA_WRITE:	769	case MLX4_OPCODE_RDMA_WRITE:
770	wc->opcode = IB_WC_RDMA_WRITE;	770	wc->opcode = IB_WC_RDMA_WRITE;
771	break;	771	break;
772	case MLX4_OPCODE_SEND_IMM:	772	case MLX4_OPCODE_SEND_IMM:
773	wc->wc_flags \|= IB_WC_WITH_IMM;	773	wc->wc_flags \|= IB_WC_WITH_IMM;
774	/* fall through */	774	fallthrough;
775	case MLX4_OPCODE_SEND:	775	case MLX4_OPCODE_SEND:
776	case MLX4_OPCODE_SEND_INVAL:	776	case MLX4_OPCODE_SEND_INVAL:
777	wc->opcode = IB_WC_SEND;	777	wc->opcode = IB_WC_SEND;

drivers/infiniband/hw/mlx4/mcg.c+1−1

@@ -944,7 +944,7 @@ int mlx4_ib_mcg_multiplex_handler(struct ib_device *ibdev, int port, · 943 unmodified lines
944	switch (sa_mad->mad_hdr.method) {	944	switch (sa_mad->mad_hdr.method) {
945	case IB_MGMT_METHOD_SET:	945	case IB_MGMT_METHOD_SET:
946	may_create = 1;	946	may_create = 1;
947	/* fall through */	947	fallthrough;
948	case IB_SA_METHOD_DELETE:	948	case IB_SA_METHOD_DELETE:
949	req = kzalloc(sizeof *req, GFP_KERNEL);	949	req = kzalloc(sizeof *req, GFP_KERNEL);
950	if (!req)	950	if (!req)

drivers/infiniband/hw/mlx4/qp.c+3−3

@@ -1578,12 +1578,12 @@ static struct ib_qp _mlx4_ib_create_qp(struct ib_pd pd, · 1577 unmodified lines
1578	pd = to_mxrcd(init_attr->xrcd)->pd;	1578	pd = to_mxrcd(init_attr->xrcd)->pd;
1579	xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn;	1579	xrcdn = to_mxrcd(init_attr->xrcd)->xrcdn;
1580	init_attr->send_cq = to_mxrcd(init_attr->xrcd)->cq;	1580	init_attr->send_cq = to_mxrcd(init_attr->xrcd)->cq;
1581	/* fall through */	1581	fallthrough;
1582	case IB_QPT_XRC_INI:	1582	case IB_QPT_XRC_INI:
1583	if (!(to_mdev(pd->device)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))	1583	if (!(to_mdev(pd->device)->dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC))
1584	return ERR_PTR(-ENOSYS);	1584	return ERR_PTR(-ENOSYS);
1585	init_attr->recv_cq = init_attr->send_cq;	1585	init_attr->recv_cq = init_attr->send_cq;
1586	/* fall through */	1586	fallthrough;
1587	case IB_QPT_RC:	1587	case IB_QPT_RC:
1588	case IB_QPT_UC:	1588	case IB_QPT_UC:
1589	case IB_QPT_RAW_PACKET:	1589	case IB_QPT_RAW_PACKET:
@@ -1592,7 +1592,7 @@ static struct ib_qp _mlx4_ib_create_qp(struct ib_pd pd, · 2 unmodified lines
1592	return ERR_PTR(-ENOMEM);	1592	return ERR_PTR(-ENOMEM);
1593	qp->pri.vid = 0xFFFF;	1593	qp->pri.vid = 0xFFFF;
1594	qp->alt.vid = 0xFFFF;	1594	qp->alt.vid = 0xFFFF;
1595	/* fall through */	1595	fallthrough;
1596	case IB_QPT_UD:	1596	case IB_QPT_UD:
1597	{	1597	{
1598	err = create_qp_common(pd, init_attr, udata, 0, &qp);	1598	err = create_qp_common(pd, init_attr, udata, 0, &qp);

drivers/infiniband/hw/mlx5/cq.c+2−2

@@ -121,13 +121,13 @@ static void handle_good_req(struct ib_wc wc, struct mlx5_cqe64 cqe, · 120 unmodified lines
121	switch (be32_to_cpu(cqe->sop_drop_qpn) >> 24) {	121	switch (be32_to_cpu(cqe->sop_drop_qpn) >> 24) {
122	case MLX5_OPCODE_RDMA_WRITE_IMM:	122	case MLX5_OPCODE_RDMA_WRITE_IMM:
123	wc->wc_flags \|= IB_WC_WITH_IMM;	123	wc->wc_flags \|= IB_WC_WITH_IMM;
124	/* fall through */	124	fallthrough;
125	case MLX5_OPCODE_RDMA_WRITE:	125	case MLX5_OPCODE_RDMA_WRITE:
126	wc->opcode = IB_WC_RDMA_WRITE;	126	wc->opcode = IB_WC_RDMA_WRITE;
127	break;	127	break;
128	case MLX5_OPCODE_SEND_IMM:	128	case MLX5_OPCODE_SEND_IMM:
129	wc->wc_flags \|= IB_WC_WITH_IMM;	129	wc->wc_flags \|= IB_WC_WITH_IMM;
130	/* fall through */	130	fallthrough;
131	case MLX5_OPCODE_SEND:	131	case MLX5_OPCODE_SEND:
132	case MLX5_OPCODE_SEND_INVAL:	132	case MLX5_OPCODE_SEND_INVAL:
133	wc->opcode = IB_WC_SEND;	133	wc->opcode = IB_WC_SEND;

drivers/infiniband/hw/mlx5/mad.c+1−2

 		if (MLX5_CAP_GEN(dev->mdev, vport_counters) &&
 		    method == IB_MGMT_METHOD_GET)
 			return process_pma_cmd(dev, port_num, in, out);
-		/* fallthrough */
+		fallthrough;
 	case MLX5_IB_VENDOR_CLASS1:
-		/* fallthrough */
 	case MLX5_IB_VENDOR_CLASS2:
 	case IB_MGMT_CLASS_CONG_MGMT: {
 		if (method != IB_MGMT_METHOD_GET &&

drivers/infiniband/hw/mlx5/main.c+1−1

@@ -2872,7 +2872,7 @@ static void mlx5_ib_handle_event(struct work_struct *_work) · 2871 unmodified lines
2872	break;	2872	break;
2873	case MLX5_EVENT_TYPE_GENERAL_EVENT:	2873	case MLX5_EVENT_TYPE_GENERAL_EVENT:
2874	handle_general_event(ibdev, work->param, &ibev);	2874	handle_general_event(ibdev, work->param, &ibev);
2875	/* fall through */	2875	fallthrough;
2876	default:	2876	default:
2877	goto out;	2877	goto out;
2878	}	2878	}

drivers/infiniband/hw/mlx5/qp.c+2−2

@@ -416,7 +416,7 @@ static int sq_overhead(struct ib_qp_init_attr *attr) · 415 unmodified lines
416	switch (attr->qp_type) {	416	switch (attr->qp_type) {
417	case IB_QPT_XRC_INI:	417	case IB_QPT_XRC_INI:
418	size += sizeof(struct mlx5_wqe_xrc_seg);	418	size += sizeof(struct mlx5_wqe_xrc_seg);
419	/* fall through */	419	fallthrough;
420	case IB_QPT_RC:	420	case IB_QPT_RC:
421	size += sizeof(struct mlx5_wqe_ctrl_seg) +	421	size += sizeof(struct mlx5_wqe_ctrl_seg) +
422	max(sizeof(struct mlx5_wqe_atomic_seg) +	422	max(sizeof(struct mlx5_wqe_atomic_seg) +
@@ -441,7 +441,7 @@ static int sq_overhead(struct ib_qp_init_attr *attr) · 18 unmodified lines
441	if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)	441	if (attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO)
442	size += sizeof(struct mlx5_wqe_eth_pad) +	442	size += sizeof(struct mlx5_wqe_eth_pad) +
443	sizeof(struct mlx5_wqe_eth_seg);	443	sizeof(struct mlx5_wqe_eth_seg);
444	/* fall through */	444	fallthrough;
445	case IB_QPT_SMI:	445	case IB_QPT_SMI:
446	case MLX5_IB_QPT_HW_GSI:	446	case MLX5_IB_QPT_HW_GSI:
447	size += sizeof(struct mlx5_wqe_ctrl_seg) +	447	size += sizeof(struct mlx5_wqe_ctrl_seg) +

drivers/infiniband/hw/mthca/mthca_av.c+1−1

@@ -115,7 +115,7 @@ static u8 ib_rate_to_memfree(u8 req_rate, u8 cur_rate) · 114 unmodified lines
115	switch ((cur_rate - 1) / req_rate) {	115	switch ((cur_rate - 1) / req_rate) {
116	case 0: return MTHCA_RATE_MEMFREE_FULL;	116	case 0: return MTHCA_RATE_MEMFREE_FULL;
117	case 1: return MTHCA_RATE_MEMFREE_HALF;	117	case 1: return MTHCA_RATE_MEMFREE_HALF;
118	case 2: /* fall through */	118	case 2:
119	case 3: return MTHCA_RATE_MEMFREE_QUARTER;	119	case 3: return MTHCA_RATE_MEMFREE_QUARTER;
120	default: return MTHCA_RATE_MEMFREE_EIGHTH;	120	default: return MTHCA_RATE_MEMFREE_EIGHTH;
121	}	121	}

drivers/infiniband/hw/ocrdma/ocrdma_verbs.c+2−2

@@ -2134,7 +2134,7 @@ int ocrdma_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 2133 unmodified lines
2134	case IB_WR_SEND_WITH_IMM:	2134	case IB_WR_SEND_WITH_IMM:
2135	hdr->cw \|= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);	2135	hdr->cw \|= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2136	hdr->immdt = ntohl(wr->ex.imm_data);	2136	hdr->immdt = ntohl(wr->ex.imm_data);
2137	/* fall through */	2137	fallthrough;
2138	case IB_WR_SEND:	2138	case IB_WR_SEND:
2139	hdr->cw \|= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);	2139	hdr->cw \|= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
2140	ocrdma_build_send(qp, hdr, wr);	2140	ocrdma_build_send(qp, hdr, wr);
@@ -2148,7 +2148,7 @@ int ocrdma_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 7 unmodified lines
2148	case IB_WR_RDMA_WRITE_WITH_IMM:	2148	case IB_WR_RDMA_WRITE_WITH_IMM:
2149	hdr->cw \|= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);	2149	hdr->cw \|= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
2150	hdr->immdt = ntohl(wr->ex.imm_data);	2150	hdr->immdt = ntohl(wr->ex.imm_data);
2151	/* fall through */	2151	fallthrough;
2152	case IB_WR_RDMA_WRITE:	2152	case IB_WR_RDMA_WRITE:
2153	hdr->cw \|= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);	2153	hdr->cw \|= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2154	status = ocrdma_build_write(qp, hdr, wr);	2154	status = ocrdma_build_write(qp, hdr, wr);

drivers/infiniband/hw/qedr/verbs.c+1−1

@@ -3528,7 +3528,7 @@ static int __qedr_post_send(struct ib_qp ibqp, const struct ib_send_wr wr, · 3527 unmodified lines
3528	break;	3528	break;
3529	case IB_WR_RDMA_READ_WITH_INV:	3529	case IB_WR_RDMA_READ_WITH_INV:
3530	SET_FIELD2(wqe->flags, RDMA_SQ_RDMA_WQE_1ST_READ_INV_FLG, 1);	3530	SET_FIELD2(wqe->flags, RDMA_SQ_RDMA_WQE_1ST_READ_INV_FLG, 1);
3531	/* fallthrough -- same is identical to RDMA READ */	3531	fallthrough; /* same is identical to RDMA READ */
3532		3532
3533	case IB_WR_RDMA_READ:	3533	case IB_WR_RDMA_READ:
3534	wqe->req_type = RDMA_SQ_REQ_TYPE_RDMA_RD;	3534	wqe->req_type = RDMA_SQ_REQ_TYPE_RDMA_RD;

drivers/infiniband/hw/qib/qib_iba6120.c+2−2

 		state = IB_PORT_ARMED;
 		break;
 	case IB_6120_L_STATE_ACTIVE:
-		/* fall through */
 	case IB_6120_L_STATE_ACT_DEFER:
 		state = IB_PORT_ACTIVE;
 		break;
-	default: /* fall through */
+	default:
+		fallthrough;
 	case IB_6120_L_STATE_DOWN:
 		state = IB_PORT_DOWN;
 		break;

drivers/infiniband/hw/qib/qib_iba7220.c+2−2

 		state = IB_PORT_ARMED;
 		break;
 	case IB_7220_L_STATE_ACTIVE:
-		/* fall through */
 	case IB_7220_L_STATE_ACT_DEFER:
 		state = IB_PORT_ACTIVE;
 		break;
-	default: /* fall through */
+	default:
+		fallthrough;
 	case IB_7220_L_STATE_DOWN:
 		state = IB_PORT_DOWN;
 		break;

drivers/infiniband/hw/qib/qib_iba7322.c+3−3

 		state = IB_PORT_ARMED;
 		break;
 	case IB_7322_L_STATE_ACTIVE:
-		/* fall through */
 	case IB_7322_L_STATE_ACT_DEFER:
 		state = IB_PORT_ACTIVE;
 		break;
-	default: /* fall through */
+	default:
+		fallthrough;
 	case IB_7322_L_STATE_DOWN:
 		state = IB_PORT_DOWN;
 		break;
 				    "Invalid num_vls %u, using 4 VLs\n",
 				    qib_num_cfg_vls);
 			qib_num_cfg_vls = 4;
-			/* fall through */
+			fallthrough;
 		case 4:
 			ppd->vls_supported = IB_VL_VL0_3;
 			break;

drivers/infiniband/hw/qib/qib_mad.c+6−6

@@ -433,7 +433,7 @@ static int check_mkey(struct qib_ibport ibp, struct ib_smp smp, int mad_flags) · 432 unmodified lines
433	/* Bad mkey not a violation below level 2 */	433	/* Bad mkey not a violation below level 2 */
434	if (ibp->rvp.mkeyprot < 2)	434	if (ibp->rvp.mkeyprot < 2)
435	break;	435	break;
436	/* fall through */	436	fallthrough;
437	case IB_MGMT_METHOD_SET:	437	case IB_MGMT_METHOD_SET:
438	case IB_MGMT_METHOD_TRAP_REPRESS:	438	case IB_MGMT_METHOD_TRAP_REPRESS:
439	if (ibp->rvp.mkey_violations != 0xFFFF)	439	if (ibp->rvp.mkey_violations != 0xFFFF)
@@ -828,7 +828,7 @@ static int subn_set_portinfo(struct ib_smp smp, struct ib_device ibdev, · 388 unmodified lines
828	case IB_PORT_NOP:	828	case IB_PORT_NOP:
829	if (lstate == 0)	829	if (lstate == 0)
830	break;	830	break;
831	/* FALLTHROUGH */	831	fallthrough;
832	case IB_PORT_DOWN:	832	case IB_PORT_DOWN:
833	if (lstate == 0)	833	if (lstate == 0)
834	lstate = QIB_IB_LINKDOWN_ONLY;	834	lstate = QIB_IB_LINKDOWN_ONLY;
@@ -1928,7 +1928,7 @@ static int process_subn(struct ib_device *ibdev, int mad_flags, · 1093 unmodified lines
1928	ret = IB_MAD_RESULT_SUCCESS;	1928	ret = IB_MAD_RESULT_SUCCESS;
1929	goto bail;	1929	goto bail;
1930	}	1930	}
1931	/* FALLTHROUGH */	1931	fallthrough;
1932	default:	1932	default:
1933	smp->status \|= IB_SMP_UNSUP_METH_ATTR;	1933	smp->status \|= IB_SMP_UNSUP_METH_ATTR;
1934	ret = reply(smp);	1934	ret = reply(smp);
@@ -1962,7 +1962,7 @@ static int process_subn(struct ib_device *ibdev, int mad_flags, · 27 unmodified lines
1962	ret = IB_MAD_RESULT_SUCCESS;	1962	ret = IB_MAD_RESULT_SUCCESS;
1963	goto bail;	1963	goto bail;
1964	}	1964	}
1965	/* FALLTHROUGH */	1965	fallthrough;
1966	default:	1966	default:
1967	smp->status \|= IB_SMP_UNSUP_METH_ATTR;	1967	smp->status \|= IB_SMP_UNSUP_METH_ATTR;
1968	ret = reply(smp);	1968	ret = reply(smp);
@@ -2322,7 +2322,7 @@ static int process_cc(struct ib_device *ibdev, int mad_flags, · 353 unmodified lines
2322	ret = cc_get_congestion_control_table(ccp, ibdev, port);	2322	ret = cc_get_congestion_control_table(ccp, ibdev, port);
2323	goto bail;	2323	goto bail;
2324		2324
2325	/* FALLTHROUGH */	2325	fallthrough;
2326	default:	2326	default:
2327	ccp->status \|= IB_SMP_UNSUP_METH_ATTR;	2327	ccp->status \|= IB_SMP_UNSUP_METH_ATTR;
2328	ret = reply((struct ib_smp *) ccp);	2328	ret = reply((struct ib_smp *) ccp);
@@ -2339,7 +2339,7 @@ static int process_cc(struct ib_device *ibdev, int mad_flags, · 10 unmodified lines
2339	ret = cc_set_congestion_control_table(ccp, ibdev, port);	2339	ret = cc_set_congestion_control_table(ccp, ibdev, port);
2340	goto bail;	2340	goto bail;
2341		2341
2342	/* FALLTHROUGH */	2342	fallthrough;
2343	default:	2343	default:
2344	ccp->status \|= IB_SMP_UNSUP_METH_ATTR;	2344	ccp->status \|= IB_SMP_UNSUP_METH_ATTR;
2345	ret = reply((struct ib_smp *) ccp);	2345	ret = reply((struct ib_smp *) ccp);

drivers/infiniband/hw/qib/qib_rc.c+9−9

@@ -83,7 +83,7 @@ static int qib_make_rc_ack(struct qib_ibdev dev, struct rvt_qp qp, · 82 unmodified lines
83	rvt_put_mr(e->rdma_sge.mr);	83	rvt_put_mr(e->rdma_sge.mr);
84	e->rdma_sge.mr = NULL;	84	e->rdma_sge.mr = NULL;
85	}	85	}
86	/* FALLTHROUGH */	86	fallthrough;
87	case OP(ATOMIC_ACKNOWLEDGE):	87	case OP(ATOMIC_ACKNOWLEDGE):
88	/*	88	/*
89	* We can increment the tail pointer now that the last	89	* We can increment the tail pointer now that the last
@@ -92,7 +92,7 @@ static int qib_make_rc_ack(struct qib_ibdev dev, struct rvt_qp qp, · 2 unmodified lines
92	*/	92	*/
93	if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)	93	if (++qp->s_tail_ack_queue > QIB_MAX_RDMA_ATOMIC)
94	qp->s_tail_ack_queue = 0;	94	qp->s_tail_ack_queue = 0;
95	/* FALLTHROUGH */	95	fallthrough;
96	case OP(SEND_ONLY):	96	case OP(SEND_ONLY):
97	case OP(ACKNOWLEDGE):	97	case OP(ACKNOWLEDGE):
98	/* Check for no next entry in the queue. */	98	/* Check for no next entry in the queue. */
@@ -149,7 +149,7 @@ static int qib_make_rc_ack(struct qib_ibdev dev, struct rvt_qp qp, · 50 unmodified lines
149		149
150	case OP(RDMA_READ_RESPONSE_FIRST):	150	case OP(RDMA_READ_RESPONSE_FIRST):
151	qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);	151	qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
152	/* FALLTHROUGH */	152	fallthrough;
153	case OP(RDMA_READ_RESPONSE_MIDDLE):	153	case OP(RDMA_READ_RESPONSE_MIDDLE):
154	qp->s_cur_sge = &qp->s_ack_rdma_sge;	154	qp->s_cur_sge = &qp->s_ack_rdma_sge;
155	qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;	155	qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
@@ -471,10 +471,10 @@ no_flow_control: · 315 unmodified lines
471	* See qib_restart_rc().	471	* See qib_restart_rc().
472	*/	472	*/
473	qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);	473	qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
474	/* FALLTHROUGH */	474	fallthrough;
475	case OP(SEND_FIRST):	475	case OP(SEND_FIRST):
476	qp->s_state = OP(SEND_MIDDLE);	476	qp->s_state = OP(SEND_MIDDLE);
477	/* FALLTHROUGH */	477	fallthrough;
478	case OP(SEND_MIDDLE):	478	case OP(SEND_MIDDLE):
479	bth2 = qp->s_psn++ & QIB_PSN_MASK;	479	bth2 = qp->s_psn++ & QIB_PSN_MASK;
480	ss = &qp->s_sge;	480	ss = &qp->s_sge;
@@ -510,10 +510,10 @@ no_flow_control: · 29 unmodified lines
510	* See qib_restart_rc().	510	* See qib_restart_rc().
511	*/	511	*/
512	qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);	512	qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
513	/* FALLTHROUGH */	513	fallthrough;
514	case OP(RDMA_WRITE_FIRST):	514	case OP(RDMA_WRITE_FIRST):
515	qp->s_state = OP(RDMA_WRITE_MIDDLE);	515	qp->s_state = OP(RDMA_WRITE_MIDDLE);
516	/* FALLTHROUGH */	516	fallthrough;
517	case OP(RDMA_WRITE_MIDDLE):	517	case OP(RDMA_WRITE_MIDDLE):
518	bth2 = qp->s_psn++ & QIB_PSN_MASK;	518	bth2 = qp->s_psn++ & QIB_PSN_MASK;
519	ss = &qp->s_sge;	519	ss = &qp->s_sge;
@@ -1807,7 +1807,7 @@ void qib_rc_rcv(struct qib_ctxtdata rcd, struct ib_header hdr, · 1287 unmodified lines
1807	if (!ret)	1807	if (!ret)
1808	goto rnr_nak;	1808	goto rnr_nak;
1809	qp->r_rcv_len = 0;	1809	qp->r_rcv_len = 0;
1810	/* FALLTHROUGH */	1810	fallthrough;
1811	case OP(SEND_MIDDLE):	1811	case OP(SEND_MIDDLE):
1812	case OP(RDMA_WRITE_MIDDLE):	1812	case OP(RDMA_WRITE_MIDDLE):
1813	send_middle:	1813	send_middle:
@@ -1839,7 +1839,7 @@ send_middle: · 25 unmodified lines
1839	qp->r_rcv_len = 0;	1839	qp->r_rcv_len = 0;
1840	if (opcode == OP(SEND_ONLY))	1840	if (opcode == OP(SEND_ONLY))
1841	goto no_immediate_data;	1841	goto no_immediate_data;
1842	/* fall through -- for SEND_ONLY_WITH_IMMEDIATE */	1842	fallthrough; /* for SEND_ONLY_WITH_IMMEDIATE */
1843	case OP(SEND_LAST_WITH_IMMEDIATE):	1843	case OP(SEND_LAST_WITH_IMMEDIATE):
1844	send_last_imm:	1844	send_last_imm:
1845	wc.ex.imm_data = ohdr->u.imm_data;	1845	wc.ex.imm_data = ohdr->u.imm_data;

drivers/infiniband/hw/qib/qib_sdma.c+1−1

@@ -763,7 +763,7 @@ void __qib_sdma_process_event(struct qib_pportdata *ppd, · 762 unmodified lines
763	* bringing the link up with traffic active on	763	* bringing the link up with traffic active on
764	* 7220, e.g. */	764	* 7220, e.g. */
765	ss->go_s99_running = 1;	765	ss->go_s99_running = 1;
766	/* fall through -- and start dma engine */	766	fallthrough; /* and start dma engine */
767	case qib_sdma_event_e10_go_hw_start:	767	case qib_sdma_event_e10_go_hw_start:
768	/* This reference means the state machine is started */	768	/* This reference means the state machine is started */
769	sdma_get(&ppd->sdma_state);	769	sdma_get(&ppd->sdma_state);

drivers/infiniband/hw/qib/qib_uc.c+4−4

@@ -161,7 +161,7 @@ int qib_make_uc_req(struct rvt_qp qp, unsigned long flags) · 160 unmodified lines
161		161
162	case OP(SEND_FIRST):	162	case OP(SEND_FIRST):
163	qp->s_state = OP(SEND_MIDDLE);	163	qp->s_state = OP(SEND_MIDDLE);
164	/* FALLTHROUGH */	164	fallthrough;
165	case OP(SEND_MIDDLE):	165	case OP(SEND_MIDDLE):
166	len = qp->s_len;	166	len = qp->s_len;
167	if (len > pmtu) {	167	if (len > pmtu) {
@@ -185,7 +185,7 @@ int qib_make_uc_req(struct rvt_qp qp, unsigned long flags) · 17 unmodified lines
185		185
186	case OP(RDMA_WRITE_FIRST):	186	case OP(RDMA_WRITE_FIRST):
187	qp->s_state = OP(RDMA_WRITE_MIDDLE);	187	qp->s_state = OP(RDMA_WRITE_MIDDLE);
188	/* FALLTHROUGH */	188	fallthrough;
189	case OP(RDMA_WRITE_MIDDLE):	189	case OP(RDMA_WRITE_MIDDLE):
190	len = qp->s_len;	190	len = qp->s_len;
191	if (len > pmtu) {	191	if (len > pmtu) {
@@ -351,7 +351,7 @@ send_first: · 159 unmodified lines
351	goto no_immediate_data;	351	goto no_immediate_data;
352	else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))	352	else if (opcode == OP(SEND_ONLY_WITH_IMMEDIATE))
353	goto send_last_imm;	353	goto send_last_imm;
354	/* FALLTHROUGH */	354	fallthrough;
355	case OP(SEND_MIDDLE):	355	case OP(SEND_MIDDLE):
356	/* Check for invalid length PMTU or posted rwqe len. */	356	/* Check for invalid length PMTU or posted rwqe len. */
357	if (unlikely(tlen != (hdrsize + pmtu + 4)))	357	if (unlikely(tlen != (hdrsize + pmtu + 4)))
@@ -440,7 +440,7 @@ rdma_first: · 82 unmodified lines
440	wc.ex.imm_data = ohdr->u.rc.imm_data;	440	wc.ex.imm_data = ohdr->u.rc.imm_data;
441	goto rdma_last_imm;	441	goto rdma_last_imm;
442	}	442	}
443	/* FALLTHROUGH */	443	fallthrough;
444	case OP(RDMA_WRITE_MIDDLE):	444	case OP(RDMA_WRITE_MIDDLE):
445	/* Check for invalid length PMTU or posted rwqe len. */	445	/* Check for invalid length PMTU or posted rwqe len. */
446	if (unlikely(tlen != (hdrsize + pmtu + 4)))	446	if (unlikely(tlen != (hdrsize + pmtu + 4)))

drivers/infiniband/hw/qib/qib_verbs.c+1−1

@@ -237,7 +237,7 @@ static void qib_qp_rcv(struct qib_ctxtdata rcd, struct ib_header hdr, · 236 unmodified lines
237	case IB_QPT_GSI:	237	case IB_QPT_GSI:
238	if (ib_qib_disable_sma)	238	if (ib_qib_disable_sma)
239	break;	239	break;
240	/* FALLTHROUGH */	240	fallthrough;
241	case IB_QPT_UD:	241	case IB_QPT_UD:
242	qib_ud_rcv(ibp, hdr, has_grh, data, tlen, qp);	242	qib_ud_rcv(ibp, hdr, has_grh, data, tlen, qp);
243	break;	243	break;

drivers/infiniband/hw/vmw_pvrdma/pvrdma_qp.c+1−1

@@ -238,7 +238,7 @@ struct ib_qp pvrdma_create_qp(struct ib_pd pd, · 237 unmodified lines
238	ret = -EINVAL;	238	ret = -EINVAL;
239	goto err_qp;	239	goto err_qp;
240	}	240	}
241	/* fall through */	241	fallthrough;
242	case IB_QPT_RC:	242	case IB_QPT_RC:
243	case IB_QPT_UD:	243	case IB_QPT_UD:
244	qp = kzalloc(sizeof(*qp), GFP_KERNEL);	244	qp = kzalloc(sizeof(*qp), GFP_KERNEL);

drivers/infiniband/sw/rdmavt/qp.c+1−1

@@ -1111,7 +1111,7 @@ struct ib_qp rvt_create_qp(struct ib_pd ibpd, · 1110 unmodified lines
1111	if (init_attr->port_num == 0 \|\|	1111	if (init_attr->port_num == 0 \|\|
1112	init_attr->port_num > ibpd->device->phys_port_cnt)	1112	init_attr->port_num > ibpd->device->phys_port_cnt)
1113	return ERR_PTR(-EINVAL);	1113	return ERR_PTR(-EINVAL);
1114	/* fall through */	1114	fallthrough;
1115	case IB_QPT_UC:	1115	case IB_QPT_UC:
1116	case IB_QPT_RC:	1116	case IB_QPT_RC:
1117	case IB_QPT_UD:	1117	case IB_QPT_UD:

drivers/infiniband/sw/rxe/rxe_comp.c+1−1

@@ -282,7 +282,7 @@ static inline enum comp_state check_ack(struct rxe_qp *qp, · 281 unmodified lines
282	if ((syn & AETH_TYPE_MASK) != AETH_ACK)	282	if ((syn & AETH_TYPE_MASK) != AETH_ACK)
283	return COMPST_ERROR;	283	return COMPST_ERROR;
284		284
285	/* fall through */	285	fallthrough;
286	/* (IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE doesn't have an AETH)	286	/* (IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE doesn't have an AETH)
287	*/	287	*/
288	case IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE:	288	case IB_OPCODE_RC_RDMA_READ_RESPONSE_MIDDLE:

drivers/infiniband/sw/rxe/rxe_task.c+1−1

@@ -71,7 +71,7 @@ void rxe_do_task(unsigned long data) · 70 unmodified lines
71		71
72	case TASK_STATE_BUSY:	72	case TASK_STATE_BUSY:
73	task->state = TASK_STATE_ARMED;	73	task->state = TASK_STATE_ARMED;
74	/* fall through */	74	fallthrough;
75	case TASK_STATE_ARMED:	75	case TASK_STATE_ARMED:
76	spin_unlock_irqrestore(&task->state_lock, flags);	76	spin_unlock_irqrestore(&task->state_lock, flags);
77	return;	77	return;

drivers/infiniband/sw/rxe/rxe_verbs.c+1−1

@@ -540,7 +540,7 @@ static void init_send_wr(struct rxe_qp qp, struct rxe_send_wr wr, · 539 unmodified lines
540	switch (wr->opcode) {	540	switch (wr->opcode) {
541	case IB_WR_RDMA_WRITE_WITH_IMM:	541	case IB_WR_RDMA_WRITE_WITH_IMM:
542	wr->ex.imm_data = ibwr->ex.imm_data;	542	wr->ex.imm_data = ibwr->ex.imm_data;
543	/* fall through */	543	fallthrough;
544	case IB_WR_RDMA_READ:	544	case IB_WR_RDMA_READ:
545	case IB_WR_RDMA_WRITE:	545	case IB_WR_RDMA_WRITE:
546	wr->wr.rdma.remote_addr = rdma_wr(ibwr)->remote_addr;	546	wr->wr.rdma.remote_addr = rdma_wr(ibwr)->remote_addr;

drivers/infiniband/sw/siw/siw_cm.c+0−2

 	switch (cep->state) {
 	case SIW_EPSTATE_RDMA_MODE:
-		/* fall through */
 	case SIW_EPSTATE_LISTENING:
 		break;
 	case SIW_EPSTATE_AWAIT_MPAREQ:
-		/* fall through */
 	case SIW_EPSTATE_AWAIT_MPAREP:
 		siw_cm_queue_work(cep, SIW_CM_WORK_READ_MPAHDR);
 		break;

drivers/infiniband/sw/siw/siw_qp_rx.c+2−2

@@ -1215,7 +1215,7 @@ static int siw_rdmap_complete(struct siw_qp *qp, int error) · 1214 unmodified lines
1215	case RDMAP_SEND_SE:	1215	case RDMAP_SEND_SE:
1216	case RDMAP_SEND_SE_INVAL:	1216	case RDMAP_SEND_SE_INVAL:
1217	wqe->rqe.flags \|= SIW_WQE_SOLICITED;	1217	wqe->rqe.flags \|= SIW_WQE_SOLICITED;
1218	/* Fall through */	1218	fallthrough;
1219		1219
1220	case RDMAP_SEND:	1220	case RDMAP_SEND:
1221	case RDMAP_SEND_INVAL:	1221	case RDMAP_SEND_INVAL:
@@ -1386,7 +1386,7 @@ int siw_tcp_rx_data(read_descriptor_t rd_desc, struct sk_buff skb, · 164 unmodified lines
1386	* DDP segment.	1386	* DDP segment.
1387	*/	1387	*/
1388	qp->rx_fpdu->first_ddp_seg = 0;	1388	qp->rx_fpdu->first_ddp_seg = 0;
1389	/* Fall through */	1389	fallthrough;
1390		1390
1391	case SIW_GET_DATA_START:	1391	case SIW_GET_DATA_START:
1392	/*	1392	/*

drivers/infiniband/sw/siw/siw_qp_tx.c+2−2

@@ -1042,7 +1042,7 @@ next_wqe: · 1041 unmodified lines
1042	case SIW_OP_SEND_REMOTE_INV:	1042	case SIW_OP_SEND_REMOTE_INV:
1043	case SIW_OP_WRITE:	1043	case SIW_OP_WRITE:
1044	siw_wqe_put_mem(wqe, tx_type);	1044	siw_wqe_put_mem(wqe, tx_type);
1045	/* Fall through */	1045	fallthrough;
1046		1046
1047	case SIW_OP_INVAL_STAG:	1047	case SIW_OP_INVAL_STAG:
1048	case SIW_OP_REG_MR:	1048	case SIW_OP_REG_MR:
@@ -1128,7 +1128,7 @@ next_wqe: · 79 unmodified lines
1128	case SIW_OP_READ:	1128	case SIW_OP_READ:
1129	case SIW_OP_READ_LOCAL_INV:	1129	case SIW_OP_READ_LOCAL_INV:
1130	siw_wqe_put_mem(wqe, tx_type);	1130	siw_wqe_put_mem(wqe, tx_type);
1131	/* Fall through */	1131	fallthrough;
1132		1132
1133	case SIW_OP_INVAL_STAG:	1133	case SIW_OP_INVAL_STAG:
1134	case SIW_OP_REG_MR:	1134	case SIW_OP_REG_MR:

drivers/infiniband/ulp/ipoib/ipoib_cm.c+2−2

@@ -512,13 +512,13 @@ static int ipoib_cm_rx_handler(struct ib_cm_id *cm_id, · 511 unmodified lines
512	return ipoib_cm_req_handler(cm_id, event);	512	return ipoib_cm_req_handler(cm_id, event);
513	case IB_CM_DREQ_RECEIVED:	513	case IB_CM_DREQ_RECEIVED:
514	ib_send_cm_drep(cm_id, NULL, 0);	514	ib_send_cm_drep(cm_id, NULL, 0);
515	/* Fall through */	515	fallthrough;
516	case IB_CM_REJ_RECEIVED:	516	case IB_CM_REJ_RECEIVED:
517	p = cm_id->context;	517	p = cm_id->context;
518	priv = ipoib_priv(p->dev);	518	priv = ipoib_priv(p->dev);
519	if (ib_modify_qp(p->qp, &ipoib_cm_err_attr, IB_QP_STATE))	519	if (ib_modify_qp(p->qp, &ipoib_cm_err_attr, IB_QP_STATE))
520	ipoib_warn(priv, "unable to move qp to error state\n");	520	ipoib_warn(priv, "unable to move qp to error state\n");
521	/* Fall through */	521	fallthrough;
522	default:	522	default:
523	return 0;	523	return 0;
524	}	524	}

drivers/infiniband/ulp/ipoib/ipoib_main.c+1−1

@@ -502,7 +502,7 @@ static struct net_device *ipoib_get_net_dev_by_params( · 501 unmodified lines
502	default:	502	default:
503	dev_warn_ratelimited(&dev->dev,	503	dev_warn_ratelimited(&dev->dev,
504	"duplicate IP address detected\n");	504	"duplicate IP address detected\n");
505	/* Fall through */	505	fallthrough;
506	case 1:	506	case 1:
507	return net_dev;	507	return net_dev;
508	}	508	}

drivers/infiniband/ulp/iser/iser_verbs.c+1−1

@@ -711,7 +711,7 @@ static int iser_cma_handler(struct rdma_cm_id cma_id, struct rdma_cm_event eve · 710 unmodified lines
711	case RDMA_CM_EVENT_REJECTED:	711	case RDMA_CM_EVENT_REJECTED:
712	iser_info("Connection rejected: %s\n",	712	iser_info("Connection rejected: %s\n",
713	rdma_reject_msg(cma_id, event->status));	713	rdma_reject_msg(cma_id, event->status));
714	/* FALLTHROUGH */	714	fallthrough;
715	case RDMA_CM_EVENT_ADDR_ERROR:	715	case RDMA_CM_EVENT_ADDR_ERROR:
716	case RDMA_CM_EVENT_ROUTE_ERROR:	716	case RDMA_CM_EVENT_ROUTE_ERROR:
717	case RDMA_CM_EVENT_CONNECT_ERROR:	717	case RDMA_CM_EVENT_CONNECT_ERROR:

drivers/infiniband/ulp/isert/ib_isert.c+5−5

@@ -664,8 +664,8 @@ isert_cma_handler(struct rdma_cm_id cma_id, struct rdma_cm_event event) · 663 unmodified lines
664	case RDMA_CM_EVENT_ESTABLISHED:	664	case RDMA_CM_EVENT_ESTABLISHED:
665	isert_connected_handler(cma_id);	665	isert_connected_handler(cma_id);
666	break;	666	break;
667	case RDMA_CM_EVENT_ADDR_CHANGE: /* FALLTHRU */	667	case RDMA_CM_EVENT_ADDR_CHANGE:
668	case RDMA_CM_EVENT_DISCONNECTED: /* FALLTHRU */	668	case RDMA_CM_EVENT_DISCONNECTED:
669	case RDMA_CM_EVENT_TIMEWAIT_EXIT: /* FALLTHRU */	669	case RDMA_CM_EVENT_TIMEWAIT_EXIT: /* FALLTHRU */
670	ret = isert_disconnected_handler(cma_id, event->event);	670	ret = isert_disconnected_handler(cma_id, event->event);
671	break;	671	break;
@@ -684,7 +684,7 @@ isert_cma_handler(struct rdma_cm_id cma_id, struct rdma_cm_event event) · 12 unmodified lines
684	case RDMA_CM_EVENT_REJECTED:	684	case RDMA_CM_EVENT_REJECTED:
685	isert_info("Connection rejected: %s\n",	685	isert_info("Connection rejected: %s\n",
686	rdma_reject_msg(cma_id, event->status));	686	rdma_reject_msg(cma_id, event->status));
687	/* fall through */	687	fallthrough;
688	case RDMA_CM_EVENT_UNREACHABLE:	688	case RDMA_CM_EVENT_UNREACHABLE:
689	case RDMA_CM_EVENT_CONNECT_ERROR:	689	case RDMA_CM_EVENT_CONNECT_ERROR:
690	ret = isert_connect_error(cma_id);	690	ret = isert_connect_error(cma_id);
@@ -1470,7 +1470,7 @@ isert_put_cmd(struct isert_cmd *isert_cmd, bool comp_err) · 779 unmodified lines
1470	transport_generic_free_cmd(&cmd->se_cmd, 0);	1470	transport_generic_free_cmd(&cmd->se_cmd, 0);
1471	break;	1471	break;
1472	}	1472	}
1473	/* fall through */	1473	fallthrough;
1474	default:	1474	default:
1475	iscsit_release_cmd(cmd);	1475	iscsit_release_cmd(cmd);
1476	break;	1476	break;
@@ -1648,7 +1648,7 @@ isert_do_control_comp(struct work_struct *work) · 171 unmodified lines
1648	switch (cmd->i_state) {	1648	switch (cmd->i_state) {
1649	case ISTATE_SEND_TASKMGTRSP:	1649	case ISTATE_SEND_TASKMGTRSP:
1650	iscsit_tmr_post_handler(cmd, cmd->conn);	1650	iscsit_tmr_post_handler(cmd, cmd->conn);
1651	/* fall through */	1651	fallthrough;
1652	case ISTATE_SEND_REJECT:	1652	case ISTATE_SEND_REJECT:
1653	case ISTATE_SEND_TEXTRSP:	1653	case ISTATE_SEND_TEXTRSP:
1654	cmd->i_state = ISTATE_SENT_STATUS;	1654	cmd->i_state = ISTATE_SENT_STATUS;

drivers/infiniband/ulp/opa_vnic/opa_vnic_vema.c+0−1

@@ -547,7 +547,6 @@ static void vema_get(struct opa_vnic_vema_port *port, · 546 unmodified lines
547	vema_get_mac_entries(port, recvd_mad, rsp_mad);	547	vema_get_mac_entries(port, recvd_mad, rsp_mad);
548	break;	548	break;
549	case OPA_EM_ATTR_IFACE_UCAST_MACS:	549	case OPA_EM_ATTR_IFACE_UCAST_MACS:
550	/* fall through */
551	case OPA_EM_ATTR_IFACE_MCAST_MACS:	550	case OPA_EM_ATTR_IFACE_MCAST_MACS:
552	vema_get_mac_list(port, recvd_mad, rsp_mad, attr_id);	551	vema_get_mac_list(port, recvd_mad, rsp_mad, attr_id);
553	break;	552	break;

drivers/input/joystick/fsia6b.c+2−2

@@ -102,12 +102,12 @@ static irqreturn_t fsia6b_serio_irq(struct serio *serio, · 101 unmodified lines
102	input_report_key(fsia6b->dev,	102	input_report_key(fsia6b->dev,
103	sw_id++,	103	sw_id++,
104	sw_state == 0);	104	sw_state == 0);
105	/* fall-through */	105	fallthrough;
106	case '2':	106	case '2':
107	input_report_key(fsia6b->dev,	107	input_report_key(fsia6b->dev,
108	sw_id++,	108	sw_id++,
109	sw_state == 1);	109	sw_state == 1);
110	/* fall-through */	110	fallthrough;
111	case '1':	111	case '1':
112	input_report_key(fsia6b->dev,	112	input_report_key(fsia6b->dev,
113	sw_id++,	113	sw_id++,

drivers/input/joystick/gamecon.c+0−1

@@ -885,7 +885,6 @@ static int gc_setup_pad(struct gc *gc, int idx, int pad_type) · 884 unmodified lines
885		885
886	case GC_MULTI:	886	case GC_MULTI:
887	input_set_capability(input_dev, EV_KEY, BTN_TRIGGER);	887	input_set_capability(input_dev, EV_KEY, BTN_TRIGGER);
888	/* fall through */
889	break;	888	break;
890		889
891	case GC_PSX:	890	case GC_PSX:

drivers/input/tablet/wacom_serial4.c+1−1

@@ -213,7 +213,7 @@ static void wacom_handle_model_response(struct wacom *wacom) · 212 unmodified lines
213	case 0x3731: /* PL-710 */	213	case 0x3731: /* PL-710 */
214	wacom->res_x = 2540;	214	wacom->res_x = 2540;
215	wacom->res_y = 2540;	215	wacom->res_y = 2540;
216	/* fall through */	216	fallthrough;
217	case 0x3535: /* PL-550 */	217	case 0x3535: /* PL-550 */
218	case 0x3830: /* PL-800 */	218	case 0x3830: /* PL-800 */
219	wacom->extra_z_bits = 2;	219	wacom->extra_z_bits = 2;

drivers/input/touchscreen/atmel_mxt_ts.c+1−1

@@ -477,7 +477,7 @@ static int mxt_lookup_bootloader_address(struct mxt_data *data, bool retry) · 476 unmodified lines
477	bootloader = appmode - 0x24;	477	bootloader = appmode - 0x24;
478	break;	478	break;
479	}	479	}
480	/* Fall through - for normal case */	480	fallthrough; /* for normal case */
481	case 0x4c:	481	case 0x4c:
482	case 0x4d:	482	case 0x4d:
483	case 0x5a:	483	case 0x5a:

drivers/input/touchscreen/wm831x-ts.c+1−1

@@ -290,7 +290,7 @@ static int wm831x_ts_probe(struct platform_device *pdev) · 289 unmodified lines
290	default:	290	default:
291	dev_err(&pdev->dev, "Unsupported ISEL setting: %d\n",	291	dev_err(&pdev->dev, "Unsupported ISEL setting: %d\n",
292	pdata->isel);	292	pdata->isel);
293	/* Fall through */	293	fallthrough;
294	case 200:	294	case 200:
295	case 0:	295	case 0:
296	wm831x_set_bits(wm831x, WM831X_TOUCH_CONTROL_2,	296	wm831x_set_bits(wm831x, WM831X_TOUCH_CONTROL_2,

drivers/iommu/amd/Kconfig+1−1

@@ -10,7 +10,7 @@ config AMD_IOMMU · 9 unmodified lines
10	select IOMMU_API	10	select IOMMU_API
11	select IOMMU_IOVA	11	select IOMMU_IOVA
12	select IOMMU_DMA	12	select IOMMU_DMA
13	depends on X86_64 && PCI && ACPI	13	depends on X86_64 && PCI && ACPI && HAVE_CMPXCHG_DOUBLE
14	help	14	help
15	With this option you can enable support for AMD IOMMU hardware in	15	With this option you can enable support for AMD IOMMU hardware in
16	your system. An IOMMU is a hardware component which provides	16	your system. An IOMMU is a hardware component which provides

drivers/iommu/amd/init.c+20−3

@@ -1511,7 +1511,14 @@ static int __init init_iommu_one(struct amd_iommu iommu, struct ivhd_header h) · 1510 unmodified lines
1511	iommu->mmio_phys_end = MMIO_REG_END_OFFSET;	1511	iommu->mmio_phys_end = MMIO_REG_END_OFFSET;
1512	else	1512	else
1513	iommu->mmio_phys_end = MMIO_CNTR_CONF_OFFSET;	1513	iommu->mmio_phys_end = MMIO_CNTR_CONF_OFFSET;
1514	if (((h->efr_attr & (0x1 << IOMMU_FEAT_GASUP_SHIFT)) == 0))	1514
		1515	/*
		1516	* Note: GA (128-bit IRTE) mode requires cmpxchg16b supports.
		1517	* GAM also requires GA mode. Therefore, we need to
		1518	* check cmpxchg16b support before enabling it.
		1519	*/
		1520	if (!boot_cpu_has(X86_FEATURE_CX16) \|\|
		1521	((h->efr_attr & (0x1 << IOMMU_FEAT_GASUP_SHIFT)) == 0))
1515	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;	1522	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;
1516	break;	1523	break;
1517	case 0x11:	1524	case 0x11:
@@ -1520,8 +1527,18 @@ static int __init init_iommu_one(struct amd_iommu iommu, struct ivhd_header h) · 2 unmodified lines
1520	iommu->mmio_phys_end = MMIO_REG_END_OFFSET;	1527	iommu->mmio_phys_end = MMIO_REG_END_OFFSET;
1521	else	1528	else
1522	iommu->mmio_phys_end = MMIO_CNTR_CONF_OFFSET;	1529	iommu->mmio_phys_end = MMIO_CNTR_CONF_OFFSET;
1523	if (((h->efr_reg & (0x1 << IOMMU_EFR_GASUP_SHIFT)) == 0))	1530
		1531	/*
		1532	* Note: GA (128-bit IRTE) mode requires cmpxchg16b supports.
		1533	* XT, GAM also requires GA mode. Therefore, we need to
		1534	* check cmpxchg16b support before enabling them.
		1535	*/
		1536	if (!boot_cpu_has(X86_FEATURE_CX16) \|\|
		1537	((h->efr_reg & (0x1 << IOMMU_EFR_GASUP_SHIFT)) == 0)) {
1524	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;	1538	amd_iommu_guest_ir = AMD_IOMMU_GUEST_IR_LEGACY;
		1539	break;
		1540	}
		1541
1525	/*	1542	/*
1526	* Note: Since iommu_update_intcapxt() leverages	1543	* Note: Since iommu_update_intcapxt() leverages
1527	* the IOMMU MMIO access to MSI capability block registers	1544	* the IOMMU MMIO access to MSI capability block registers
@@ -2258,7 +2275,7 @@ static void iommu_enable_ga(struct amd_iommu *iommu) · 730 unmodified lines
2258	switch (amd_iommu_guest_ir) {	2275	switch (amd_iommu_guest_ir) {
2259	case AMD_IOMMU_GUEST_IR_VAPIC:	2276	case AMD_IOMMU_GUEST_IR_VAPIC:
2260	iommu_feature_enable(iommu, CONTROL_GAM_EN);	2277	iommu_feature_enable(iommu, CONTROL_GAM_EN);
2261	/* Fall through */	2278	fallthrough;
2262	case AMD_IOMMU_GUEST_IR_LEGACY_GA:	2279	case AMD_IOMMU_GUEST_IR_LEGACY_GA:
2263	iommu_feature_enable(iommu, CONTROL_GA_EN);	2280	iommu_feature_enable(iommu, CONTROL_GA_EN);
2264	iommu->irte_ops = &irte_128_ops;	2281	iommu->irte_ops = &irte_128_ops;

drivers/iommu/amd/iommu.c+21−5

@@ -2659,7 +2659,12 @@ static int amd_iommu_def_domain_type(struct device *dev) · 2658 unmodified lines
2659	if (!dev_data)	2659	if (!dev_data)
2660	return 0;	2660	return 0;
2661		2661
2662	if (dev_data->iommu_v2)	2662	/*
		2663	* Do not identity map IOMMUv2 capable devices when memory encryption is
		2664	* active, because some of those devices (AMD GPUs) don't have the
		2665	* encryption bit in their DMA-mask and require remapping.
		2666	*/
		2667	if (!mem_encrypt_active() && dev_data->iommu_v2)
2663	return IOMMU_DOMAIN_IDENTITY;	2668	return IOMMU_DOMAIN_IDENTITY;
2664		2669
2665	return 0;	2670	return 0;
@@ -3292,6 +3297,7 @@ out: · 626 unmodified lines
3292	static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte,	3297	static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte,
3293	struct amd_ir_data *data)	3298	struct amd_ir_data *data)
3294	{	3299	{
		3300	bool ret;
3295	struct irq_remap_table *table;	3301	struct irq_remap_table *table;
3296	struct amd_iommu *iommu;	3302	struct amd_iommu *iommu;
3297	unsigned long flags;	3303	unsigned long flags;
@@ -3309,10 +3315,18 @@ static int modify_irte_ga(u16 devid, int index, struct irte_ga *irte, · 11 unmodified lines
3309		3315
3310	entry = (struct irte_ga *)table->table;	3316	entry = (struct irte_ga *)table->table;
3311	entry = &entry[index];	3317	entry = &entry[index];
3312	entry->lo.fields_remap.valid = 0;	3318
3313	entry->hi.val = irte->hi.val;	3319	ret = cmpxchg_double(&entry->lo.val, &entry->hi.val,
3314	entry->lo.val = irte->lo.val;	3320	entry->lo.val, entry->hi.val,
3315	entry->lo.fields_remap.valid = 1;	3321	irte->lo.val, irte->hi.val);
		3322	/*
		3323	* We use cmpxchg16 to atomically update the 128-bit IRTE,
		3324	* and it cannot be updated by the hardware or other processors
		3325	* behind us, so the return value of cmpxchg16 should be the
		3326	* same as the old value.
		3327	*/
		3328	WARN_ON(!ret);
		3329
3316	if (data)	3330	if (data)
3317	data->ref = entry;	3331	data->ref = entry;
3318		3332
@@ -3850,6 +3864,7 @@ int amd_iommu_deactivate_guest_mode(void *data) · 531 unmodified lines
3850	struct amd_ir_data ir_data = (struct amd_ir_data )data;	3864	struct amd_ir_data ir_data = (struct amd_ir_data )data;
3851	struct irte_ga entry = (struct irte_ga ) ir_data->entry;	3865	struct irte_ga entry = (struct irte_ga ) ir_data->entry;
3852	struct irq_cfg *cfg = ir_data->cfg;	3866	struct irq_cfg *cfg = ir_data->cfg;
		3867	u64 valid = entry->lo.fields_remap.valid;
3853		3868
3854	if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) \|\|	3869	if (!AMD_IOMMU_GUEST_IR_VAPIC(amd_iommu_guest_ir) \|\|
3855	!entry \|\| !entry->lo.fields_vapic.guest_mode)	3870	!entry \|\| !entry->lo.fields_vapic.guest_mode)
@@ -3858,6 +3873,7 @@ int amd_iommu_deactivate_guest_mode(void *data) · 2 unmodified lines
3858	entry->lo.val = 0;	3873	entry->lo.val = 0;
3859	entry->hi.val = 0;	3874	entry->hi.val = 0;
3860		3875
		3876	entry->lo.fields_remap.valid = valid;
3861	entry->lo.fields_remap.dm = apic->irq_dest_mode;	3877	entry->lo.fields_remap.dm = apic->irq_dest_mode;
3862	entry->lo.fields_remap.int_type = apic->irq_delivery_mode;	3878	entry->lo.fields_remap.int_type = apic->irq_delivery_mode;
3863	entry->hi.fields.vector = cfg->vector;	3879	entry->hi.fields.vector = cfg->vector;

drivers/iommu/amd/iommu_v2.c+7−0

@@ -737,6 +737,13 @@ int amd_iommu_init_device(struct pci_dev *pdev, int pasids) · 736 unmodified lines
737		737
738	might_sleep();	738	might_sleep();
739		739
		740	/*
		741	* When memory encryption is active the device is likely not in a
		742	* direct-mapped domain. Forbid using IOMMUv2 functionality for now.
		743	*/
		744	if (mem_encrypt_active())
		745	return -ENODEV;
		746
740	if (!amd_iommu_v2_supported())	747	if (!amd_iommu_v2_supported())
741	return -ENODEV;	748	return -ENODEV;
742		749

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c+5−6

 		break;
 	case CMDQ_OP_CFGI_CD:
 		cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SSID, ent->cfgi.ssid);
-		/* Fallthrough */
+		fallthrough;
 	case CMDQ_OP_CFGI_STE:
 		cmd[0] |= FIELD_PREP(CMDQ_CFGI_0_SID, ent->cfgi.sid);
 		cmd[1] |= FIELD_PREP(CMDQ_CFGI_1_LEAF, ent->cfgi.leaf);
 		break;
 	case CMDQ_OP_TLBI_NH_ASID:
 		cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_ASID, ent->tlbi.asid);
-		/* Fallthrough */
+		fallthrough;
 	case CMDQ_OP_TLBI_S12_VMALL:
 		cmd[0] |= FIELD_PREP(CMDQ_TLBI_0_VMID, ent->tlbi.vmid);
 		break;
 		 */
 		return;
 	case CMDQ_ERR_CERROR_ILL_IDX:
-		/* Fallthrough */
 	default:
 		break;
 	}
 	switch (FIELD_GET(IDR0_STALL_MODEL, reg)) {
 	case IDR0_STALL_MODEL_FORCE:
 		smmu->features |= ARM_SMMU_FEAT_STALL_FORCE;
-		/* Fallthrough */
+		fallthrough;
 	case IDR0_STALL_MODEL_STALL:
 		smmu->features |= ARM_SMMU_FEAT_STALLS;
 	}
 	switch (FIELD_GET(IDR0_TTF, reg)) {
 	case IDR0_TTF_AARCH32_64:
 		smmu->ias = 40;
-		/* Fallthrough */
+		fallthrough;
 	case IDR0_TTF_AARCH64:
 		break;
 	default:
 	default:
 		dev_info(smmu->dev,
 			"unknown output address size. Truncating to 48-bit\n");
-		/* Fallthrough */
+		fallthrough;
 	case IDR5_OAS_48_BIT:
 		smmu->oas = 48;
 	}

drivers/iommu/intel/iommu.c+62−53

 	return (level - 1) * LEVEL_STRIDE;
 }
-static inline int pfn_level_offset(unsigned long pfn, int level)
+static inline int pfn_level_offset(u64 pfn, int level)
 {
 	return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK;
 }
-static inline unsigned long level_mask(int level)
+static inline u64 level_mask(int level)
 {
-	return -1UL << level_to_offset_bits(level);
+	return -1ULL << level_to_offset_bits(level);
 }
-static inline unsigned long level_size(int level)
+static inline u64 level_size(int level)
 {
-	return 1UL << level_to_offset_bits(level);
+	return 1ULL << level_to_offset_bits(level);
 }
-static inline unsigned long align_to_level(unsigned long pfn, int level)
+static inline u64 align_to_level(u64 pfn, int level)
 {
 	return (pfn + level_size(level) - 1) & level_mask(level);
 }
 static inline unsigned long lvl_to_nr_pages(unsigned int lvl)
 {
-	return  1 << min_t(int, (lvl - 1) * LEVEL_STRIDE, MAX_AGAW_PFN_WIDTH);
+	return 1UL << min_t(int, (lvl - 1) * LEVEL_STRIDE, MAX_AGAW_PFN_WIDTH);
 }
 /* VT-d pages must always be _smaller_ than MM pages. Otherwise things
 int intel_iommu_gfx_mapped;
 EXPORT_SYMBOL_GPL(intel_iommu_gfx_mapped);
-#define DUMMY_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-1))
 #define DEFER_DEVICE_DOMAIN_INFO ((struct device_domain_info *)(-2))
 struct device_domain_info *get_domain_info(struct device *dev)
 {
 		return NULL;
 	info = dev_iommu_priv_get(dev);
-	if (unlikely(info == DUMMY_DEVICE_DOMAIN_INFO ||
+	if (unlikely(info == DEFER_DEVICE_DOMAIN_INFO))
-		     info == DEFER_DEVICE_DOMAIN_INFO))
 		return NULL;
 	return info;
 	return &context[devfn];
 }
-static int iommu_dummy(struct device *dev)
-{
-	return dev_iommu_priv_get(dev) == DUMMY_DEVICE_DOMAIN_INFO;
-}
 static bool attach_deferred(struct device *dev)
 {
 	return dev_iommu_priv_get(dev) == DEFER_DEVICE_DOMAIN_INFO;
 	return false;
 }
+static bool quirk_ioat_snb_local_iommu(struct pci_dev *pdev)
+{
+	struct dmar_drhd_unit *drhd;
+	u32 vtbar;
+	int rc;
+	/* We know that this device on this chipset has its own IOMMU.
+	 * If we find it under a different IOMMU, then the BIOS is lying
+	 * to us. Hope that the IOMMU for this device is actually
+	 * disabled, and it needs no translation...
+	 */
+	rc = pci_bus_read_config_dword(pdev->bus, PCI_DEVFN(0, 0), 0xb0, &vtbar);
+	if (rc) {
+		/* "can't" happen */
+		dev_info(&pdev->dev, "failed to run vt-d quirk\n");
+		return false;
+	}
+	vtbar &= 0xffff0000;
+	/* we know that the this iommu should be at offset 0xa000 from vtbar */
+	drhd = dmar_find_matched_drhd_unit(pdev);
+	if (!drhd || drhd->reg_base_addr - vtbar != 0xa000) {
+		pr_warn_once(FW_BUG "BIOS assigned incorrect VT-d unit for Intel(R) QuickData Technology device\n");
+		add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
+		return true;
+	}
+	return false;
+}
+static bool iommu_is_dummy(struct intel_iommu *iommu, struct device *dev)
+{
+	if (!iommu || iommu->drhd->ignored)
+		return true;
+	if (dev_is_pci(dev)) {
+		struct pci_dev *pdev = to_pci_dev(dev);
+		if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
+		    pdev->device == PCI_DEVICE_ID_INTEL_IOAT_SNB &&
+		    quirk_ioat_snb_local_iommu(pdev))
+			return true;
+	}
+	return false;
+}
 struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn)
 {
 	struct dmar_drhd_unit *drhd = NULL;
 	u16 segment = 0;
 	int i;
-	if (!dev || iommu_dummy(dev))
+	if (!dev)
 		return NULL;
 	if (dev_is_pci(dev)) {
 		dev = &ACPI_COMPANION(dev)->dev;
 	rcu_read_lock();
-	for_each_active_iommu(iommu, drhd) {
+	for_each_iommu(iommu, drhd) {
 		if (pdev && segment != drhd->segment)
 			continue;
 	}
 	iommu = NULL;
  out:
+	if (iommu_is_dummy(iommu, dev))
+		iommu = NULL;
 	rcu_read_unlock();
 	return iommu;
 {
 	struct device_domain_info *info;
-	if (unlikely(attach_deferred(dev) || iommu_dummy(dev)))
+	if (unlikely(attach_deferred(dev)))
 		return NULL;
 	/* No lock here, assumes no domain exit in normal case */
 	iova_cache_put();
 }
-static void quirk_ioat_snb_local_iommu(struct pci_dev *pdev)
-{
-	struct dmar_drhd_unit *drhd;
-	u32 vtbar;
-	int rc;
-	/* We know that this device on this chipset has its own IOMMU.
-	 * If we find it under a different IOMMU, then the BIOS is lying
-	 * to us. Hope that the IOMMU for this device is actually
-	 * disabled, and it needs no translation...
-	 */
-	rc = pci_bus_read_config_dword(pdev->bus, PCI_DEVFN(0, 0), 0xb0, &vtbar);
-	if (rc) {
-		/* "can't" happen */
-		dev_info(&pdev->dev, "failed to run vt-d quirk\n");
-		return;
-	}
-	vtbar &= 0xffff0000;
-	/* we know that the this iommu should be at offset 0xa000 from vtbar */
-	drhd = dmar_find_matched_drhd_unit(pdev);
-	if (!drhd || drhd->reg_base_addr - vtbar != 0xa000) {
-		pr_warn_once(FW_BUG "BIOS assigned incorrect VT-d unit for Intel(R) QuickData Technology device\n");
-		add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
-		dev_iommu_priv_set(&pdev->dev, DUMMY_DEVICE_DOMAIN_INFO);
-	}
-}
-DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB, quirk_ioat_snb_local_iommu);
 static void __init init_no_remapping_devices(void)
 {
 	struct dmar_drhd_unit *drhd;
 		/* This IOMMU has *only* gfx devices. Either bypass it or
 		   set the gfx_mapped flag, as appropriate */
 		drhd->gfx_dedicated = 1;
-		if (!dmar_map_gfx) {
+		if (!dmar_map_gfx)
 			drhd->ignored = 1;
-			for_each_active_dev_scope(drhd->devices,
-						  drhd->devices_cnt, i, dev)
-				dev_iommu_priv_set(dev, DUMMY_DEVICE_DOMAIN_INFO);
-		}
 	}
 }
 	switch (type) {
 	case IOMMU_DOMAIN_DMA:
-	/* fallthrough */
 	case IOMMU_DOMAIN_UNMANAGED:
 		dmar_domain = alloc_domain(0);
 		if (!dmar_domain) {

drivers/iommu/intel/irq_remapping.c+8−2

 	/* Enable interrupt-remapping */
 	iommu->gcmd |= DMA_GCMD_IRE;
-	iommu->gcmd &= ~DMA_GCMD_CFI;  /* Block compatibility-format MSIs */
 	writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
 	IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
 		      readl, (sts & DMA_GSTS_IRES), sts);
+	/* Block compatibility-format MSIs */
+	if (sts & DMA_GSTS_CFIS) {
+		iommu->gcmd &= ~DMA_GCMD_CFI;
+		writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+		IOMMU_WAIT_OP(iommu, DMAR_GSTS_REG,
+			      readl, !(sts & DMA_GSTS_CFIS), sts);
+	}
 	/*
 	 * With CFI clear in the Global Command register, we should be
 	 * protected from dangerous (i.e. compatibility) interrupts

drivers/iommu/virtio-iommu.c+1−1

@@ -440,7 +440,7 @@ static int viommu_add_resv_mem(struct viommu_endpoint *vdev, · 439 unmodified lines
440	default:	440	default:
441	dev_warn(vdev->dev, "unknown resv mem subtype 0x%x\n",	441	dev_warn(vdev->dev, "unknown resv mem subtype 0x%x\n",
442	mem->subtype);	442	mem->subtype);
443	/* Fall-through */	443	fallthrough;
444	case VIRTIO_IOMMU_RESV_MEM_T_RESERVED:	444	case VIRTIO_IOMMU_RESV_MEM_T_RESERVED:
445	region = iommu_alloc_resv_region(start, size, 0,	445	region = iommu_alloc_resv_region(start, size, 0,
446	IOMMU_RESV_RESERVED);	446	IOMMU_RESV_RESERVED);

drivers/irqchip/Kconfig+1−1

@@ -425,7 +425,7 @@ config GOLDFISH_PIC · 424 unmodified lines
425	for Goldfish based virtual platforms.	425	for Goldfish based virtual platforms.
426		426
427	config QCOM_PDC	427	config QCOM_PDC
428	tristate "QCOM PDC"	428	bool "QCOM PDC"
429	depends on ARCH_QCOM	429	depends on ARCH_QCOM
430	select IRQ_DOMAIN_HIERARCHY	430	select IRQ_DOMAIN_HIERARCHY
431	help	431	help

drivers/irqchip/irq-gic-v3-its.c+2−2

@@ -2737,7 +2737,7 @@ static bool allocate_vpe_l2_table(int cpu, u32 id) · 2736 unmodified lines
2737	switch (gpsz) {	2737	switch (gpsz) {
2738	default:	2738	default:
2739	WARN_ON(1);	2739	WARN_ON(1);
2740	/* fall through */	2740	fallthrough;
2741	case GIC_PAGE_SIZE_4K:	2741	case GIC_PAGE_SIZE_4K:
2742	psz = SZ_4K;	2742	psz = SZ_4K;
2743	break;	2743	break;
@@ -2832,7 +2832,7 @@ static int allocate_vpe_l1_table(void) · 88 unmodified lines
2832	switch (gpsz) {	2832	switch (gpsz) {
2833	default:	2833	default:
2834	gpsz = GIC_PAGE_SIZE_4K;	2834	gpsz = GIC_PAGE_SIZE_4K;
2835	/* fall through */	2835	fallthrough;
2836	case GIC_PAGE_SIZE_4K:	2836	case GIC_PAGE_SIZE_4K:
2837	psz = SZ_4K;	2837	psz = SZ_4K;
2838	break;	2838	break;

drivers/irqchip/irq-gic-v3.c+4−4

@@ -965,10 +965,10 @@ static void gic_cpu_sys_reg_init(void) · 964 unmodified lines
965	case 7:	965	case 7:
966	write_gicreg(0, ICC_AP0R3_EL1);	966	write_gicreg(0, ICC_AP0R3_EL1);
967	write_gicreg(0, ICC_AP0R2_EL1);	967	write_gicreg(0, ICC_AP0R2_EL1);
968	/* Fall through */	968	fallthrough;
969	case 6:	969	case 6:
970	write_gicreg(0, ICC_AP0R1_EL1);	970	write_gicreg(0, ICC_AP0R1_EL1);
971	/* Fall through */	971	fallthrough;
972	case 5:	972	case 5:
973	case 4:	973	case 4:
974	write_gicreg(0, ICC_AP0R0_EL1);	974	write_gicreg(0, ICC_AP0R0_EL1);
@@ -982,10 +982,10 @@ static void gic_cpu_sys_reg_init(void) · 7 unmodified lines
982	case 7:	982	case 7:
983	write_gicreg(0, ICC_AP1R3_EL1);	983	write_gicreg(0, ICC_AP1R3_EL1);
984	write_gicreg(0, ICC_AP1R2_EL1);	984	write_gicreg(0, ICC_AP1R2_EL1);
985	/* Fall through */	985	fallthrough;
986	case 6:	986	case 6:
987	write_gicreg(0, ICC_AP1R1_EL1);	987	write_gicreg(0, ICC_AP1R1_EL1);
988	/* Fall through */	988	fallthrough;
989	case 5:	989	case 5:
990	case 4:	990	case 4:
991	write_gicreg(0, ICC_AP1R0_EL1);	991	write_gicreg(0, ICC_AP1R0_EL1);

drivers/irqchip/irq-imx-gpcv2.c+1−1

@@ -259,7 +259,7 @@ static int __init imx_gpcv2_irqchip_init(struct device_node *node, · 258 unmodified lines
259	case 4:	259	case 4:
260	writel_relaxed(~0, reg + GPC_IMR1_CORE2);	260	writel_relaxed(~0, reg + GPC_IMR1_CORE2);
261	writel_relaxed(~0, reg + GPC_IMR1_CORE3);	261	writel_relaxed(~0, reg + GPC_IMR1_CORE3);
262	/* fall through */	262	fallthrough;
263	case 2:	263	case 2:
264	writel_relaxed(~0, reg + GPC_IMR1_CORE0);	264	writel_relaxed(~0, reg + GPC_IMR1_CORE0);
265	writel_relaxed(~0, reg + GPC_IMR1_CORE1);	265	writel_relaxed(~0, reg + GPC_IMR1_CORE1);

drivers/irqchip/irq-ingenic.c+1−1

@@ -125,7 +125,7 @@ static int __init ingenic_intc_of_init(struct device_node *node, · 124 unmodified lines
125	irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);	125	irq_reg_writel(gc, IRQ_MSK(32), JZ_REG_INTC_SET_MASK);
126	}	126	}
127		127
128	if (request_irq(parent_irq, intc_cascade, 0,	128	if (request_irq(parent_irq, intc_cascade, IRQF_NO_SUSPEND,
129	"SoC intc cascade interrupt", NULL))	129	"SoC intc cascade interrupt", NULL))
130	pr_err("Failed to register SoC intc cascade interrupt\n");	130	pr_err("Failed to register SoC intc cascade interrupt\n");
131	return 0;	131	return 0;

drivers/irqchip/irq-mips-gic.c+1−1

@@ -480,7 +480,7 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq, · 479 unmodified lines
480	case GIC_LOCAL_INT_TIMER:	480	case GIC_LOCAL_INT_TIMER:
481	/* CONFIG_MIPS_CMP workaround (see __gic_init) */	481	/* CONFIG_MIPS_CMP workaround (see __gic_init) */
482	map = GIC_MAP_PIN_MAP_TO_PIN \| timer_cpu_pin;	482	map = GIC_MAP_PIN_MAP_TO_PIN \| timer_cpu_pin;
483	/* fall-through */	483	fallthrough;
484	case GIC_LOCAL_INT_PERFCTR:	484	case GIC_LOCAL_INT_PERFCTR:
485	case GIC_LOCAL_INT_FDC:	485	case GIC_LOCAL_INT_FDC:
486	/*	486	/*

drivers/irqchip/irq-mtk-cirq.c+1−3

@@ -295,6 +295,4 @@ out_free: · 294 unmodified lines
295	return ret;	295	return ret;
296	}	296	}
297		297
298	IRQCHIP_PLATFORM_DRIVER_BEGIN(mtk_cirq)	298	IRQCHIP_DECLARE(mtk_cirq, "mediatek,mtk-cirq", mtk_cirq_of_init);
299	IRQCHIP_MATCH("mediatek,mtk-cirq", mtk_cirq_of_init)
300	IRQCHIP_PLATFORM_DRIVER_END(mtk_cirq)

drivers/irqchip/irq-mtk-sysirq.c+1−3

@@ -231,6 +231,4 @@ out_free_chip: · 230 unmodified lines
231	kfree(chip_data);	231	kfree(chip_data);
232	return ret;	232	return ret;
233	}	233	}
234	IRQCHIP_PLATFORM_DRIVER_BEGIN(mtk_sysirq)	234	IRQCHIP_DECLARE(mtk_sysirq, "mediatek,mt6577-sysirq", mtk_sysirq_of_init);
235	IRQCHIP_MATCH("mediatek,mt6577-sysirq", mtk_sysirq_of_init)
236	IRQCHIP_PLATFORM_DRIVER_END(mtk_sysirq)

drivers/irqchip/irq-stm32-exti.c+12−2

 	irq_gc_unlock(gc);
 }
+/* directly set the target bit without reading first. */
+static inline void stm32_exti_write_bit(struct irq_data *d, u32 reg)
+{
+	struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
+	void __iomem *base = chip_data->host_data->base;
+	u32 val = BIT(d->hwirq % IRQS_PER_BANK);
+	writel_relaxed(val, base + reg);
+}
 static inline u32 stm32_exti_set_bit(struct irq_data *d, u32 reg)
 {
 	struct stm32_exti_chip_data *chip_data = irq_data_get_irq_chip_data(d);
 	raw_spin_lock(&chip_data->rlock);
-	stm32_exti_set_bit(d, stm32_bank->rpr_ofst);
+	stm32_exti_write_bit(d, stm32_bank->rpr_ofst);
 	if (stm32_bank->fpr_ofst != UNDEF_REG)
-		stm32_exti_set_bit(d, stm32_bank->fpr_ofst);
+		stm32_exti_write_bit(d, stm32_bank->fpr_ofst);
 	raw_spin_unlock(&chip_data->rlock);

drivers/irqchip/irq-ti-sci-inta.c+79−16

@@ -8,6 +8,7 @@ · 7 unmodified lines
8		8
9	#include <linux/err.h>	9	#include <linux/err.h>
10	#include <linux/io.h>	10	#include <linux/io.h>
		11	#include <linux/irq.h>
11	#include <linux/irqchip.h>	12	#include <linux/irqchip.h>
12	#include <linux/irqdomain.h>	13	#include <linux/irqdomain.h>
13	#include <linux/interrupt.h>	14	#include <linux/interrupt.h>
@@ -83,6 +84,7 @@ struct ti_sci_inta_vint_desc { · 69 unmodified lines
83	* @vint_mutex: Mutex to protect vint_list	84	* @vint_mutex: Mutex to protect vint_list
84	* @base: Base address of the memory mapped IO registers	85	* @base: Base address of the memory mapped IO registers
85	* @pdev: Pointer to platform device.	86	* @pdev: Pointer to platform device.
		87	* @ti_sci_id: TI-SCI device identifier
86	*/	88	*/
87	struct ti_sci_inta_irq_domain {	89	struct ti_sci_inta_irq_domain {
88	const struct ti_sci_handle *sci;	90	const struct ti_sci_handle *sci;
@@ -93,6 +95,7 @@ struct ti_sci_inta_irq_domain { · 4 unmodified lines
93	struct mutex vint_mutex;	95	struct mutex vint_mutex;
94	void __iomem *base;	96	void __iomem *base;
95	struct platform_device *pdev;	97	struct platform_device *pdev;
		98	u32 ti_sci_id;
96	};	99	};
97		100
98	#define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \	101	#define to_vint_desc(e, i) container_of(e, struct ti_sci_inta_vint_desc, \
@@ -128,6 +131,37 @@ static void ti_sci_inta_irq_handler(struct irq_desc *desc) · 29 unmodified lines
128	chained_irq_exit(irq_desc_get_chip(desc), desc);	131	chained_irq_exit(irq_desc_get_chip(desc), desc);
129	}	132	}
130		133
		134	/**
		135	* ti_sci_inta_xlate_irq() - Translate hwirq to parent's hwirq.
		136	* @inta: IRQ domain corresponding to Interrupt Aggregator
		137	* @irq: Hardware irq corresponding to the above irq domain
		138	*
		139	* Return parent irq number if translation is available else -ENOENT.
		140	*/
		141	static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta,
		142	u16 vint_id)
		143	{
		144	struct device_node *np = dev_of_node(&inta->pdev->dev);
		145	u32 base, parent_base, size;
		146	const __be32 *range;
		147	int len;
		148
		149	range = of_get_property(np, "ti,interrupt-ranges", &len);
		150	if (!range)
		151	return vint_id;
		152
		153	for (len /= sizeof(*range); len >= 3; len -= 3) {
		154	base = be32_to_cpu(*range++);
		155	parent_base = be32_to_cpu(*range++);
		156	size = be32_to_cpu(*range++);
		157
		158	if (base <= vint_id && vint_id < base + size)
		159	return vint_id - base + parent_base;
		160	}
		161
		162	return -ENOENT;
		163	}
		164
131	/**	165	/**
132	* ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator	166	* ti_sci_inta_alloc_parent_irq() - Allocate parent irq to Interrupt aggregator
133	* @domain: IRQ domain corresponding to Interrupt Aggregator	167	* @domain: IRQ domain corresponding to Interrupt Aggregator
@@ -139,30 +173,52 @@ static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_dom · 5 unmodified lines
139	struct ti_sci_inta_irq_domain *inta = domain->host_data;	173	struct ti_sci_inta_irq_domain *inta = domain->host_data;
140	struct ti_sci_inta_vint_desc *vint_desc;	174	struct ti_sci_inta_vint_desc *vint_desc;
141	struct irq_fwspec parent_fwspec;	175	struct irq_fwspec parent_fwspec;
		176	struct device_node *parent_node;
142	unsigned int parent_virq;	177	unsigned int parent_virq;
143	u16 vint_id;	178	u16 vint_id, p_hwirq;
		179	int ret;
144		180
145	vint_id = ti_sci_get_free_resource(inta->vint);	181	vint_id = ti_sci_get_free_resource(inta->vint);
146	if (vint_id == TI_SCI_RESOURCE_NULL)	182	if (vint_id == TI_SCI_RESOURCE_NULL)
147	return ERR_PTR(-EINVAL);	183	return ERR_PTR(-EINVAL);
148		184
		185	p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id);
		186	if (p_hwirq < 0) {
		187	ret = p_hwirq;
		188	goto free_vint;
		189	}
		190
149	vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);	191	vint_desc = kzalloc(sizeof(*vint_desc), GFP_KERNEL);
150	if (!vint_desc)	192	if (!vint_desc) {
151	return ERR_PTR(-ENOMEM);	193	ret = -ENOMEM;
		194	goto free_vint;
		195	}
152		196
153	vint_desc->domain = domain;	197	vint_desc->domain = domain;
154	vint_desc->vint_id = vint_id;	198	vint_desc->vint_id = vint_id;
155	INIT_LIST_HEAD(&vint_desc->list);	199	INIT_LIST_HEAD(&vint_desc->list);
156		200
157	parent_fwspec.fwnode = of_node_to_fwnode(of_irq_find_parent(dev_of_node(&inta->pdev->dev)));	201	parent_node = of_irq_find_parent(dev_of_node(&inta->pdev->dev));
158	parent_fwspec.param_count = 2;	202	parent_fwspec.fwnode = of_node_to_fwnode(parent_node);
159	parent_fwspec.param[0] = inta->pdev->id;	203
160	parent_fwspec.param[1] = vint_desc->vint_id;	204	if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
		205	/* Parent is GIC */
		206	parent_fwspec.param_count = 3;
		207	parent_fwspec.param[0] = 0;
		208	parent_fwspec.param[1] = p_hwirq - 32;
		209	parent_fwspec.param[2] = IRQ_TYPE_LEVEL_HIGH;
		210	} else {
		211	/* Parent is Interrupt Router */
		212	parent_fwspec.param_count = 1;
		213	parent_fwspec.param[0] = p_hwirq;
		214	}
161		215
162	parent_virq = irq_create_fwspec_mapping(&parent_fwspec);	216	parent_virq = irq_create_fwspec_mapping(&parent_fwspec);
163	if (parent_virq == 0) {	217	if (parent_virq == 0) {
164	kfree(vint_desc);	218	dev_err(&inta->pdev->dev, "Parent IRQ allocation failed\n");
165	return ERR_PTR(-EINVAL);	219	ret = -EINVAL;
		220	goto free_vint_desc;
		221
166	}	222	}
167	vint_desc->parent_virq = parent_virq;	223	vint_desc->parent_virq = parent_virq;
168		224
@@ -171,6 +227,11 @@ static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_dom · 2 unmodified lines
171	ti_sci_inta_irq_handler, vint_desc);	227	ti_sci_inta_irq_handler, vint_desc);
172		228
173	return vint_desc;	229	return vint_desc;
		230	free_vint_desc:
		231	kfree(vint_desc);
		232	free_vint:
		233	ti_sci_release_resource(inta->vint, vint_id);
		234	return ERR_PTR(ret);
174	}	235	}
175		236
176	/**	237	/**
@@ -202,7 +263,7 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_event(struct ti_sci_inta · 25 unmodified lines
202		263
203	err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,	264	err = inta->sci->ops.rm_irq_ops.set_event_map(inta->sci,
204	dev_id, dev_index,	265	dev_id, dev_index,
205	inta->pdev->id,	266	inta->ti_sci_id,
206	vint_desc->vint_id,	267	vint_desc->vint_id,
207	event_desc->global_event,	268	event_desc->global_event,
208	free_bit);	269	free_bit);
@@ -299,7 +360,7 @@ static void ti_sci_inta_free_irq(struct ti_sci_inta_event_desc *event_desc, · 90 unmodified lines
299	inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,	360	inta->sci->ops.rm_irq_ops.free_event_map(inta->sci,
300	HWIRQ_TO_DEVID(hwirq),	361	HWIRQ_TO_DEVID(hwirq),
301	HWIRQ_TO_IRQID(hwirq),	362	HWIRQ_TO_IRQID(hwirq),
302	inta->pdev->id,	363	inta->ti_sci_id,
303	vint_desc->vint_id,	364	vint_desc->vint_id,
304	event_desc->global_event,	365	event_desc->global_event,
305	event_desc->vint_bit);	366	event_desc->vint_bit);
@@ -547,21 +608,21 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) · 241 unmodified lines
547	return ret;	608	return ret;
548	}	609	}
549		610
550	ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &pdev->id);	611	ret = of_property_read_u32(dev->of_node, "ti,sci-dev-id", &inta->ti_sci_id);
551	if (ret) {	612	if (ret) {
552	dev_err(dev, "missing 'ti,sci-dev-id' property\n");	613	dev_err(dev, "missing 'ti,sci-dev-id' property\n");
553	return -EINVAL;	614	return -EINVAL;
554	}	615	}
555		616
556	inta->vint = devm_ti_sci_get_of_resource(inta->sci, dev, pdev->id,	617	inta->vint = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
557	"ti,sci-rm-range-vint");	618	TI_SCI_RESASG_SUBTYPE_IA_VINT);
558	if (IS_ERR(inta->vint)) {	619	if (IS_ERR(inta->vint)) {
559	dev_err(dev, "VINT resource allocation failed\n");	620	dev_err(dev, "VINT resource allocation failed\n");
560	return PTR_ERR(inta->vint);	621	return PTR_ERR(inta->vint);
561	}	622	}
562		623
563	inta->global_event = devm_ti_sci_get_of_resource(inta->sci, dev, pdev->id,	624	inta->global_event = devm_ti_sci_get_resource(inta->sci, dev, inta->ti_sci_id,
564	"ti,sci-rm-range-global-event");	625	TI_SCI_RESASG_SUBTYPE_GLOBAL_EVENT_SEVT);
565	if (IS_ERR(inta->global_event)) {	626	if (IS_ERR(inta->global_event)) {
566	dev_err(dev, "Global event resource allocation failed\n");	627	dev_err(dev, "Global event resource allocation failed\n");
567	return PTR_ERR(inta->global_event);	628	return PTR_ERR(inta->global_event);
@@ -592,6 +653,8 @@ static int ti_sci_inta_irq_domain_probe(struct platform_device *pdev) · 24 unmodified lines
592	INIT_LIST_HEAD(&inta->vint_list);	653	INIT_LIST_HEAD(&inta->vint_list);
593	mutex_init(&inta->vint_mutex);	654	mutex_init(&inta->vint_mutex);
594		655
		656	dev_info(dev, "Interrupt Aggregator domain %d created\n", pdev->id);
		657
595	return 0;	658	return 0;
596	}	659	}
597		660

drivers/irqchip/irq-ti-sci-intr.c+93−59

@@ -17,29 +17,20 @@ · 16 unmodified lines
17	#include <linux/of_irq.h>	17	#include <linux/of_irq.h>
18	#include <linux/soc/ti/ti_sci_protocol.h>	18	#include <linux/soc/ti/ti_sci_protocol.h>
19		19
20	#define TI_SCI_DEV_ID_MASK 0xffff
21	#define TI_SCI_DEV_ID_SHIFT 16
22	#define TI_SCI_IRQ_ID_MASK 0xffff
23	#define TI_SCI_IRQ_ID_SHIFT 0
24	#define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \
25	(TI_SCI_DEV_ID_MASK))
26	#define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK))
27	#define TO_HWIRQ(dev, index) ((((dev) & TI_SCI_DEV_ID_MASK) << \
28	TI_SCI_DEV_ID_SHIFT) \| \
29	((index) & TI_SCI_IRQ_ID_MASK))
30
31	/**	20	/**
32	* struct ti_sci_intr_irq_domain - Structure representing a TISCI based	21	* struct ti_sci_intr_irq_domain - Structure representing a TISCI based
33	* Interrupt Router IRQ domain.	22	* Interrupt Router IRQ domain.
34	* @sci: Pointer to TISCI handle	23	* @sci: Pointer to TISCI handle
35	* @dst_irq: TISCI resource pointer representing GIC irq controller.	24	* @out_irqs: TISCI resource pointer representing INTR irqs.
36	* @dst_id: TISCI device ID of the GIC irq controller.	25	* @dev: Struct device pointer.
		26	* @ti_sci_id: TI-SCI device identifier
37	* @type: Specifies the trigger type supported by this Interrupt Router	27	* @type: Specifies the trigger type supported by this Interrupt Router
38	*/	28	*/
39	struct ti_sci_intr_irq_domain {	29	struct ti_sci_intr_irq_domain {
40	const struct ti_sci_handle *sci;	30	const struct ti_sci_handle *sci;
41	struct ti_sci_resource *dst_irq;	31	struct ti_sci_resource *out_irqs;
42	u32 dst_id;	32	struct device *dev;
		33	u32 ti_sci_id;
43	u32 type;	34	u32 type;
44	};	35	};
45		36
@@ -70,15 +61,44 @@ static int ti_sci_intr_irq_domain_translate(struct irq_domain *domain, · 24 unmodified lines
70	{	61	{
71	struct ti_sci_intr_irq_domain *intr = domain->host_data;	62	struct ti_sci_intr_irq_domain *intr = domain->host_data;
72		63
73	if (fwspec->param_count != 2)	64	if (fwspec->param_count != 1)
74	return -EINVAL;	65	return -EINVAL;
75		66
76	*hwirq = TO_HWIRQ(fwspec->param[0], fwspec->param[1]);	67	*hwirq = fwspec->param[0];
77	*type = intr->type;	68	*type = intr->type;
78		69
79	return 0;	70	return 0;
80	}	71	}
81		72
		73	/**
		74	* ti_sci_intr_xlate_irq() - Translate hwirq to parent's hwirq.
		75	* @intr: IRQ domain corresponding to Interrupt Router
		76	* @irq: Hardware irq corresponding to the above irq domain
		77	*
		78	* Return parent irq number if translation is available else -ENOENT.
		79	*/
		80	static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq)
		81	{
		82	struct device_node *np = dev_of_node(intr->dev);
		83	u32 base, pbase, size, len;
		84	const __be32 *range;
		85
		86	range = of_get_property(np, "ti,interrupt-ranges", &len);
		87	if (!range)
		88	return irq;
		89
		90	for (len /= sizeof(*range); len >= 3; len -= 3) {
		91	base = be32_to_cpu(*range++);
		92	pbase = be32_to_cpu(*range++);
		93	size = be32_to_cpu(*range++);
		94
		95	if (base <= irq && irq < base + size)
		96	return irq - base + pbase;
		97	}
		98
		99	return -ENOENT;
		100	}
		101
82	/**	102	/**
83	* ti_sci_intr_irq_domain_free() - Free the specified IRQs from the domain.	103	* ti_sci_intr_irq_domain_free() - Free the specified IRQs from the domain.
84	* @domain: Domain to which the irqs belong	104	* @domain: Domain to which the irqs belong
@@ -89,66 +109,76 @@ static void ti_sci_intr_irq_domain_free(struct irq_domain *domain, · 4 unmodified lines
89	unsigned int virq, unsigned int nr_irqs)	109	unsigned int virq, unsigned int nr_irqs)
90	{	110	{
91	struct ti_sci_intr_irq_domain *intr = domain->host_data;	111	struct ti_sci_intr_irq_domain *intr = domain->host_data;
92	struct irq_data data, parent_data;	112	struct irq_data *data;
93	u16 dev_id, irq_index;	113	int out_irq;
94		114
95	parent_data = irq_domain_get_irq_data(domain->parent, virq);
96	data = irq_domain_get_irq_data(domain, virq);	115	data = irq_domain_get_irq_data(domain, virq);
97	irq_index = HWIRQ_TO_IRQID(data->hwirq);	116	out_irq = (uintptr_t)data->chip_data;
98	dev_id = HWIRQ_TO_DEVID(data->hwirq);
99		117
100	intr->sci->ops.rm_irq_ops.free_irq(intr->sci, dev_id, irq_index,	118	intr->sci->ops.rm_irq_ops.free_irq(intr->sci,
101	intr->dst_id, parent_data->hwirq);	119	intr->ti_sci_id, data->hwirq,
102	ti_sci_release_resource(intr->dst_irq, parent_data->hwirq);	120	intr->ti_sci_id, out_irq);
		121	ti_sci_release_resource(intr->out_irqs, out_irq);
103	irq_domain_free_irqs_parent(domain, virq, 1);	122	irq_domain_free_irqs_parent(domain, virq, 1);
104	irq_domain_reset_irq_data(data);	123	irq_domain_reset_irq_data(data);
105	}	124	}
106		125
107	/**	126	/**
108	* ti_sci_intr_alloc_gic_irq() - Allocate GIC specific IRQ	127	* ti_sci_intr_alloc_parent_irq() - Allocate parent IRQ
109	* @domain: Pointer to the interrupt router IRQ domain	128	* @domain: Pointer to the interrupt router IRQ domain
110	* @virq: Corresponding Linux virtual IRQ number	129	* @virq: Corresponding Linux virtual IRQ number
111	* @hwirq: Corresponding hwirq for the IRQ within this IRQ domain	130	* @hwirq: Corresponding hwirq for the IRQ within this IRQ domain
112	*	131	*
113	* Returns 0 if all went well else appropriate error pointer.	132	* Returns parent irq if all went well else appropriate error pointer.
114	*/	133	*/
115	static int ti_sci_intr_alloc_gic_irq(struct irq_domain *domain,	134	static int ti_sci_intr_alloc_parent_irq(struct irq_domain *domain,
116	unsigned int virq, u32 hwirq)	135	unsigned int virq, u32 hwirq)
117	{	136	{
118	struct ti_sci_intr_irq_domain *intr = domain->host_data;	137	struct ti_sci_intr_irq_domain *intr = domain->host_data;
		138	struct device_node *parent_node;
119	struct irq_fwspec fwspec;	139	struct irq_fwspec fwspec;
120	u16 dev_id, irq_index;	140	u16 out_irq, p_hwirq;
121	u16 dst_irq;	141	int err = 0;
122	int err;
123
124	dev_id = HWIRQ_TO_DEVID(hwirq);
125	irq_index = HWIRQ_TO_IRQID(hwirq);
126		142
127	dst_irq = ti_sci_get_free_resource(intr->dst_irq);	143	out_irq = ti_sci_get_free_resource(intr->out_irqs);
128	if (dst_irq == TI_SCI_RESOURCE_NULL)	144	if (out_irq == TI_SCI_RESOURCE_NULL)
129	return -EINVAL;	145	return -EINVAL;
130		146
131	fwspec.fwnode = domain->parent->fwnode;	147	p_hwirq = ti_sci_intr_xlate_irq(intr, out_irq);
132	fwspec.param_count = 3;	148	if (p_hwirq < 0)
133	fwspec.param[0] = 0; /* SPI */	149	goto err_irqs;
134	fwspec.param[1] = dst_irq - 32; /* SPI offset */	150
135	fwspec.param[2] = intr->type;	151	parent_node = of_irq_find_parent(dev_of_node(intr->dev));
		152	fwspec.fwnode = of_node_to_fwnode(parent_node);
		153
		154	if (of_device_is_compatible(parent_node, "arm,gic-v3")) {
		155	/* Parent is GIC */
		156	fwspec.param_count = 3;
		157	fwspec.param[0] = 0; /* SPI */
		158	fwspec.param[1] = p_hwirq - 32; /* SPI offset */
		159	fwspec.param[2] = intr->type;
		160	} else {
		161	/* Parent is Interrupt Router */
		162	fwspec.param_count = 1;
		163	fwspec.param[0] = p_hwirq;
		164	}
136		165
137	err = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);	166	err = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec);
138	if (err)	167	if (err)
139	goto err_irqs;	168	goto err_irqs;
140		169
141	err = intr->sci->ops.rm_irq_ops.set_irq(intr->sci, dev_id, irq_index,	170	err = intr->sci->ops.rm_irq_ops.set_irq(intr->sci,
142	intr->dst_id, dst_irq);	171	intr->ti_sci_id, hwirq,
		172	intr->ti_sci_id, out_irq);
143	if (err)	173	if (err)
144	goto err_msg;	174	goto err_msg;
145		175
146	return 0;	176	return p_hwirq;
147		177
148	err_msg:	178	err_msg:
149	irq_domain_free_irqs_parent(domain, virq, 1);	179	irq_domain_free_irqs_parent(domain, virq, 1);
150	err_irqs:	180	err_irqs:
151	ti_sci_release_resource(intr->dst_irq, dst_irq);	181	ti_sci_release_resource(intr->out_irqs, out_irq);
152	return err;	182	return err;
153	}	183	}
154		184
@@ -168,18 +198,19 @@ static int ti_sci_intr_irq_domain_alloc(struct irq_domain *domain, · 13 unmodified lines
168	struct irq_fwspec *fwspec = data;	198	struct irq_fwspec *fwspec = data;
169	unsigned long hwirq;	199	unsigned long hwirq;
170	unsigned int flags;	200	unsigned int flags;
171	int err;	201	int err, p_hwirq;
172		202
173	err = ti_sci_intr_irq_domain_translate(domain, fwspec, &hwirq, &flags);	203	err = ti_sci_intr_irq_domain_translate(domain, fwspec, &hwirq, &flags);
174	if (err)	204	if (err)
175	return err;	205	return err;
176		206
177	err = ti_sci_intr_alloc_gic_irq(domain, virq, hwirq);	207	p_hwirq = ti_sci_intr_alloc_parent_irq(domain, virq, hwirq);
178	if (err)	208	if (p_hwirq < 0)
179	return err;	209	return p_hwirq;
180		210
181	irq_domain_set_hwirq_and_chip(domain, virq, hwirq,	211	irq_domain_set_hwirq_and_chip(domain, virq, hwirq,
182	&ti_sci_intr_irq_chip, NULL);	212	&ti_sci_intr_irq_chip,
		213	(void *)(uintptr_t)p_hwirq);
183		214
184	return 0;	215	return 0;
185	}	216	}
@@ -214,6 +245,7 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) · 28 unmodified lines
214	if (!intr)	245	if (!intr)
215	return -ENOMEM;	246	return -ENOMEM;
216		247
		248	intr->dev = dev;
217	ret = of_property_read_u32(dev_of_node(dev), "ti,intr-trigger-type",	249	ret = of_property_read_u32(dev_of_node(dev), "ti,intr-trigger-type",
218	&intr->type);	250	&intr->type);
219	if (ret) {	251	if (ret) {
@@ -230,19 +262,19 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) · 10 unmodified lines
230	return ret;	262	return ret;
231	}	263	}
232		264
233	ret = of_property_read_u32(dev_of_node(dev), "ti,sci-dst-id",	265	ret = of_property_read_u32(dev_of_node(dev), "ti,sci-dev-id",
234	&intr->dst_id);	266	&intr->ti_sci_id);
235	if (ret) {	267	if (ret) {
236	dev_err(dev, "missing 'ti,sci-dst-id' property\n");	268	dev_err(dev, "missing 'ti,sci-dev-id' property\n");
237	return -EINVAL;	269	return -EINVAL;
238	}	270	}
239		271
240	intr->dst_irq = devm_ti_sci_get_of_resource(intr->sci, dev,	272	intr->out_irqs = devm_ti_sci_get_resource(intr->sci, dev,
241	intr->dst_id,	273	intr->ti_sci_id,
242	"ti,sci-rm-range-girq");	274	TI_SCI_RESASG_SUBTYPE_IR_OUTPUT);
243	if (IS_ERR(intr->dst_irq)) {	275	if (IS_ERR(intr->out_irqs)) {
244	dev_err(dev, "Destination irq resource allocation failed\n");	276	dev_err(dev, "Destination irq resource allocation failed\n");
245	return PTR_ERR(intr->dst_irq);	277	return PTR_ERR(intr->out_irqs);
246	}	278	}
247		279
248	domain = irq_domain_add_hierarchy(parent_domain, 0, 0, dev_of_node(dev),	280	domain = irq_domain_add_hierarchy(parent_domain, 0, 0, dev_of_node(dev),
@@ -252,6 +284,8 @@ static int ti_sci_intr_irq_domain_probe(struct platform_device *pdev) · 3 unmodified lines
252	return -ENOMEM;	284	return -ENOMEM;
253	}	285	}
254		286
		287	dev_info(dev, "Interrupt Router %d domain created\n", intr->ti_sci_id);
		288
255	return 0;	289	return 0;
256	}	290	}
257		291

drivers/irqchip/irq-vic.c+1−1

@@ -455,7 +455,7 @@ static void __init __vic_init(void __iomem *base, int parent_irq, int irq_start, · 454 unmodified lines
455	return;	455	return;
456	default:	456	default:
457	printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");	457	printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
458	/* fall through */	458	fallthrough;
459	case AMBA_VENDOR_ARM:	459	case AMBA_VENDOR_ARM:
460	break;	460	break;
461	}	461	}

drivers/irqchip/irqchip.c+1−1

@@ -52,7 +52,7 @@ int platform_irqchip_probe(struct platform_device *pdev) · 51 unmodified lines
52	* interrupt controller. The actual initialization callback of this	52	* interrupt controller. The actual initialization callback of this
53	* interrupt controller can check for specific domains as necessary.	53	* interrupt controller can check for specific domains as necessary.
54	*/	54	*/
55	if (par_np && !irq_find_matching_host(np, DOMAIN_BUS_ANY))	55	if (par_np && !irq_find_matching_host(par_np, DOMAIN_BUS_ANY))
56	return -EPROBE_DEFER;	56	return -EPROBE_DEFER;
57		57
58	return irq_init_cb(np, par_np);	58	return irq_init_cb(np, par_np);

drivers/irqchip/qcom-pdc.c+1−7

 #include <linux/irqdomain.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
-#include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_address.h>
 #include <linux/of_device.h>
-#include <linux/of_irq.h>
 #include <linux/soc/qcom/irq.h>
 #include <linux/spinlock.h>
 #include <linux/slab.h>
 	return ret;
 }
-IRQCHIP_PLATFORM_DRIVER_BEGIN(qcom_pdc)
+IRQCHIP_DECLARE(qcom_pdc, "qcom,pdc", qcom_pdc_init);
-IRQCHIP_MATCH("qcom,pdc", qcom_pdc_init)
-IRQCHIP_PLATFORM_DRIVER_END(qcom_pdc)
-MODULE_DESCRIPTION("Qualcomm Technologies, Inc. Power Domain Controller");
-MODULE_LICENSE("GPL v2");

drivers/isdn/hardware/mISDN/avmfritz.c+1−1

@@ -348,7 +348,7 @@ modehdlc(struct bchannel *bch, int protocol) · 347 unmodified lines
348	switch (protocol) {	348	switch (protocol) {
349	case -1: /* used for init */	349	case -1: /* used for init */
350	bch->state = -1;	350	bch->state = -1;
351	/* fall through */	351	fallthrough;
352	case ISDN_P_NONE:	352	case ISDN_P_NONE:
353	if (bch->state == ISDN_P_NONE)	353	if (bch->state == ISDN_P_NONE)
354	break;	354	break;

drivers/isdn/hardware/mISDN/hfc_multi_8xx.h+0−1

@@ -121,7 +121,6 @@ setup_embedded(struct hfc_multi hc, struct hm_map m) · 120 unmodified lines
121	case HFC_IO_MODE_EMBSD:	121	case HFC_IO_MODE_EMBSD:
122	test_and_set_bit(HFC_CHIP_EMBSD, &hc->chip);	122	test_and_set_bit(HFC_CHIP_EMBSD, &hc->chip);
123	hc->slots = 128; /* required */	123	hc->slots = 128; /* required */
124	/* fall through */
125	hc->HFC_outb = HFC_outb_embsd;	124	hc->HFC_outb = HFC_outb_embsd;
126	hc->HFC_inb = HFC_inb_embsd;	125	hc->HFC_inb = HFC_inb_embsd;
127	hc->HFC_inw = HFC_inw_embsd;	126	hc->HFC_inw = HFC_inw_embsd;

drivers/isdn/hardware/mISDN/hfcpci.c+1−1

@@ -1280,7 +1280,7 @@ mode_hfcpci(struct bchannel *bch, int bc, int protocol) · 1279 unmodified lines
1280	case (-1): /* used for init */	1280	case (-1): /* used for init */
1281	bch->state = -1;	1281	bch->state = -1;
1282	bch->nr = bc;	1282	bch->nr = bc;
1283	/* fall through */	1283	fallthrough;
1284	case (ISDN_P_NONE):	1284	case (ISDN_P_NONE):
1285	if (bch->state == ISDN_P_NONE)	1285	if (bch->state == ISDN_P_NONE)
1286	return 0;	1286	return 0;

drivers/isdn/hardware/mISDN/hfcsusb.c+1−1

@@ -695,7 +695,7 @@ hfcsusb_setup_bch(struct bchannel *bch, int protocol) · 694 unmodified lines
695	switch (protocol) {	695	switch (protocol) {
696	case (-1): /* used for init */	696	case (-1): /* used for init */
697	bch->state = -1;	697	bch->state = -1;
698	/* fall through */	698	fallthrough;
699	case (ISDN_P_NONE):	699	case (ISDN_P_NONE):
700	if (bch->state == ISDN_P_NONE)	700	if (bch->state == ISDN_P_NONE)
701	return 0; /* already in idle state */	701	return 0; /* already in idle state */

drivers/isdn/hardware/mISDN/isdnhdlc.c+1−1

@@ -397,7 +397,7 @@ int isdnhdlc_encode(struct isdnhdlc_vars hdlc, const u8 src, u16 slen, · 396 unmodified lines
397	dsize--;	397	dsize--;
398	break;	398	break;
399	}	399	}
400	/* fall through */	400	fallthrough;
401	case HDLC_SENDFLAG_ONE:	401	case HDLC_SENDFLAG_ONE:
402	if (hdlc->bit_shift == 8) {	402	if (hdlc->bit_shift == 8) {
403	hdlc->cbin = hdlc->ffvalue >>	403	hdlc->cbin = hdlc->ffvalue >>

drivers/isdn/hardware/mISDN/mISDNinfineon.c+1−1

@@ -875,7 +875,7 @@ release_card(struct inf_hw *card) { · 874 unmodified lines
875	release_card(card->sc[i]);	875	release_card(card->sc[i]);
876	card->sc[i] = NULL;	876	card->sc[i] = NULL;
877	}	877	}
878	/* fall through */	878	fallthrough;
879	default:	879	default:
880	pci_disable_device(card->pdev);	880	pci_disable_device(card->pdev);
881	pci_set_drvdata(card->pdev, NULL);	881	pci_set_drvdata(card->pdev, NULL);

drivers/isdn/hardware/mISDN/mISDNisar.c+4−4

@@ -957,7 +957,7 @@ isar_pump_statev_fax(struct isar_ch *ch, u8 devt) { · 956 unmodified lines
957	break;	957	break;
958	case PCTRL_CMD_FTM:	958	case PCTRL_CMD_FTM:
959	p1 = 2;	959	p1 = 2;
960	/* fall through */	960	fallthrough;
961	case PCTRL_CMD_FTH:	961	case PCTRL_CMD_FTH:
962	send_mbox(ch->is, dps \| ISAR_HIS_PUMPCTRL,	962	send_mbox(ch->is, dps \| ISAR_HIS_PUMPCTRL,
963	PCTRL_CMD_SILON, 1, &p1);	963	PCTRL_CMD_SILON, 1, &p1);
@@ -1163,7 +1163,7 @@ setup_pump(struct isar_ch *ch) { · 199 unmodified lines
1163	send_mbox(ch->is, dps \| ISAR_HIS_PUMPCFG,	1163	send_mbox(ch->is, dps \| ISAR_HIS_PUMPCFG,
1164	PMOD_DTMF, 1, param);	1164	PMOD_DTMF, 1, param);
1165	}	1165	}
1166	/* fall through */	1166	fallthrough;
1167	case ISDN_P_B_MODEM_ASYNC:	1167	case ISDN_P_B_MODEM_ASYNC:
1168	ctrl = PMOD_DATAMODEM;	1168	ctrl = PMOD_DATAMODEM;
1169	if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {	1169	if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
@@ -1255,7 +1255,7 @@ setup_iom2(struct isar_ch *ch) { · 85 unmodified lines
1255	case ISDN_P_B_MODEM_ASYNC:	1255	case ISDN_P_B_MODEM_ASYNC:
1256	case ISDN_P_B_T30_FAX:	1256	case ISDN_P_B_T30_FAX:
1257	cmsb \|= IOM_CTRL_RCV;	1257	cmsb \|= IOM_CTRL_RCV;
1258	/* fall through */	1258	fallthrough;
1259	case ISDN_P_B_L2DTMF:	1259	case ISDN_P_B_L2DTMF:
1260	if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))	1260	if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
1261	cmsb \|= IOM_CTRL_RCV;	1261	cmsb \|= IOM_CTRL_RCV;
@@ -1548,7 +1548,7 @@ isar_l2l1(struct mISDNchannel ch, struct sk_buff skb) · 286 unmodified lines
1548	ich->is->name, hh->id);	1548	ich->is->name, hh->id);
1549	ret = -EINVAL;	1549	ret = -EINVAL;
1550	}	1550	}
1551	/* fall through */	1551	fallthrough;
1552	default:	1552	default:
1553	pr_info("%s: %s unknown prim(%x,%x)\n",	1553	pr_info("%s: %s unknown prim(%x,%x)\n",
1554	ich->is->name, __func__, hh->prim, hh->id);	1554	ich->is->name, __func__, hh->prim, hh->id);

drivers/isdn/mISDN/stack.c+1−1

@@ -528,7 +528,7 @@ create_l2entity(struct mISDNdevice dev, struct mISDNchannel ch, · 527 unmodified lines
528	rq.protocol = ISDN_P_NT_S0;	528	rq.protocol = ISDN_P_NT_S0;
529	if (dev->Dprotocols & (1 << ISDN_P_NT_E1))	529	if (dev->Dprotocols & (1 << ISDN_P_NT_E1))
530	rq.protocol = ISDN_P_NT_E1;	530	rq.protocol = ISDN_P_NT_E1;
531	/* fall through */	531	fallthrough;
532	case ISDN_P_LAPD_TE:	532	case ISDN_P_LAPD_TE:
533	ch->recv = mISDN_queue_message;	533	ch->recv = mISDN_queue_message;
534	ch->peer = &dev->D.st->own;	534	ch->peer = &dev->D.st->own;

drivers/lightnvm/pblk-core.c+1−1

@@ -301,7 +301,7 @@ void pblk_free_rqd(struct pblk pblk, struct nvm_rq rqd, int type) · 300 unmodified lines
301	switch (type) {	301	switch (type) {
302	case PBLK_WRITE:	302	case PBLK_WRITE:
303	kfree(((struct pblk_c_ctx *)nvm_rq_to_pdu(rqd))->lun_bitmap);	303	kfree(((struct pblk_c_ctx *)nvm_rq_to_pdu(rqd))->lun_bitmap);
304	/* fall through */	304	fallthrough;
305	case PBLK_WRITE_INT:	305	case PBLK_WRITE_INT:
306	pool = &pblk->w_rq_pool;	306	pool = &pblk->w_rq_pool;
307	break;	307	break;

drivers/macintosh/adbhid.c+1−1

@@ -881,7 +881,7 @@ adbhid_input_register(int id, int default_id, int original_handler_id, · 880 unmodified lines
881	}	881	}
882	if (hid->name[0])	882	if (hid->name[0])
883	break;	883	break;
884	/* else fall through */	884	fallthrough;
885		885
886	default:	886	default:
887	pr_info("Trying to register unknown ADB device to input layer.\n");	887	pr_info("Trying to register unknown ADB device to input layer.\n");

drivers/macintosh/smu.c+1−1

@@ -852,7 +852,7 @@ int smu_queue_i2c(struct smu_i2c_cmd *cmd) · 851 unmodified lines
852	break;	852	break;
853	case SMU_I2C_TRANSFER_COMBINED:	853	case SMU_I2C_TRANSFER_COMBINED:
854	cmd->info.devaddr &= 0xfe;	854	cmd->info.devaddr &= 0xfe;
855	/* fall through */	855	fallthrough;
856	case SMU_I2C_TRANSFER_STDSUB:	856	case SMU_I2C_TRANSFER_STDSUB:
857	if (cmd->info.sublen > 3)	857	if (cmd->info.sublen > 3)
858	return -EINVAL;	858	return -EINVAL;

drivers/md/bcache/journal.c+1−1

@@ -608,7 +608,7 @@ static void do_journal_discard(struct cache *ca) · 607 unmodified lines
608	ca->sb.njournal_buckets;	608	ca->sb.njournal_buckets;
609		609
610	atomic_set(&ja->discard_in_flight, DISCARD_READY);	610	atomic_set(&ja->discard_in_flight, DISCARD_READY);
611	/* fallthrough */	611	fallthrough;
612		612
613	case DISCARD_READY:	613	case DISCARD_READY:
614	if (ja->discard_idx == ja->last_idx)	614	if (ja->discard_idx == ja->last_idx)

drivers/md/bcache/util.c+7−7

@@ -33,27 +33,27 @@ int bch_ ## name ## _h(const char cp, type res) \ · 32 unmodified lines
33	case 'y': \	33	case 'y': \
34	case 'z': \	34	case 'z': \
35	u++; \	35	u++; \
36	/* fall through */ \	36	fallthrough; \
37	case 'e': \	37	case 'e': \
38	u++; \	38	u++; \
39	/* fall through */ \	39	fallthrough; \
40	case 'p': \	40	case 'p': \
41	u++; \	41	u++; \
42	/* fall through */ \	42	fallthrough; \
43	case 't': \	43	case 't': \
44	u++; \	44	u++; \
45	/* fall through */ \	45	fallthrough; \
46	case 'g': \	46	case 'g': \
47	u++; \	47	u++; \
48	/* fall through */ \	48	fallthrough; \
49	case 'm': \	49	case 'm': \
50	u++; \	50	u++; \
51	/* fall through */ \	51	fallthrough; \
52	case 'k': \	52	case 'k': \
53	u++; \	53	u++; \
54	if (e++ == cp) \	54	if (e++ == cp) \
55	return -EINVAL; \	55	return -EINVAL; \
56	/* fall through */ \	56	fallthrough; \
57	case '\n': \	57	case '\n': \
58	case '\0': \	58	case '\0': \
59	if (*e == '\n') \	59	if (*e == '\n') \

drivers/md/dm-cache-metadata.c+6−2

 					  CACHE_MAX_CONCURRENT_LOCKS);
 	if (IS_ERR(cmd->bm)) {
 		DMERR("could not create block manager");
-		return PTR_ERR(cmd->bm);
+		r = PTR_ERR(cmd->bm);
+		cmd->bm = NULL;
+		return r;
 	}
 	r = __open_or_format_metadata(cmd, may_format_device);
-	if (r)
+	if (r) {
 		dm_block_manager_destroy(cmd->bm);
+		cmd->bm = NULL;
+	}
 	return r;
 }

drivers/md/dm-crypt.c+3−3

@@ -739,7 +739,7 @@ static int crypt_iv_eboiv_gen(struct crypt_config cc, u8 iv, · 738 unmodified lines
739	u8 buf[MAX_CIPHER_BLOCKSIZE] __aligned(__alignof__(__le64));	739	u8 buf[MAX_CIPHER_BLOCKSIZE] __aligned(__alignof__(__le64));
740	struct skcipher_request *req;	740	struct skcipher_request *req;
741	struct scatterlist src, dst;	741	struct scatterlist src, dst;
742	struct crypto_wait wait;	742	DECLARE_CRYPTO_WAIT(wait);
743	int err;	743	int err;
744		744
745	req = skcipher_request_alloc(any_tfm(cc), GFP_NOIO);	745	req = skcipher_request_alloc(any_tfm(cc), GFP_NOIO);
@@ -936,7 +936,7 @@ static int crypt_iv_elephant(struct crypt_config cc, struct dm_crypt_request d · 190 unmodified lines
936	u8 es, ks, data, data2, *data_offset;	936	u8 es, ks, data, data2, *data_offset;
937	struct skcipher_request *req;	937	struct skcipher_request *req;
938	struct scatterlist sg, sg2, src, dst;	938	struct scatterlist sg, sg2, src, dst;
939	struct crypto_wait wait;	939	DECLARE_CRYPTO_WAIT(wait);
940	int i, r;	940	int i, r;
941		941
942	req = skcipher_request_alloc(elephant->tfm, GFP_NOIO);	942	req = skcipher_request_alloc(elephant->tfm, GFP_NOIO);
@@ -1552,7 +1552,7 @@ static blk_status_t crypt_convert(struct crypt_config *cc, · 609 unmodified lines
1552	case -EBUSY:	1552	case -EBUSY:
1553	wait_for_completion(&ctx->restart);	1553	wait_for_completion(&ctx->restart);
1554	reinit_completion(&ctx->restart);	1554	reinit_completion(&ctx->restart);
1555	/* fall through */	1555	fallthrough;
1556	/*	1556	/*
1557	* The request is queued and processed asynchronously,	1557	* The request is queued and processed asynchronously,
1558	* completion function kcryptd_async_done() will be called.	1558	* completion function kcryptd_async_done() will be called.

drivers/md/dm-integrity.c+12−0

 	range.logical_sector = le64_to_cpu(ic->sb->recalc_sector);
 	if (unlikely(range.logical_sector >= ic->provided_data_sectors)) {
 		if (ic->mode == 'B') {
+			block_bitmap_op(ic, ic->recalc_bitmap, 0, ic->provided_data_sectors, BITMAP_OP_CLEAR);
 			DEBUG_print("queue_delayed_work: bitmap_flush_work\n");
 			queue_delayed_work(ic->commit_wq, &ic->bitmap_flush_work, 0);
 		}
 		goto err;
 	}
+	if (ic->mode == 'B') {
+		sector_t start, end;
+		start = (range.logical_sector >>
+			 (ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit)) <<
+			(ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit);
+		end = ((range.logical_sector + range.n_sectors) >>
+		       (ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit)) <<
+			(ic->sb->log2_sectors_per_block + ic->log2_blocks_per_bitmap_bit);
+		block_bitmap_op(ic, ic->recalc_bitmap, start, end - start, BITMAP_OP_CLEAR);
+	}
 advance_and_next:
 	cond_resched();

drivers/md/dm-mpath.c+16−8

@@ -1287,17 +1287,25 @@ static void multipath_wait_for_pg_init_completion(struct multipath *m) · 1286 unmodified lines
1287	static void flush_multipath_work(struct multipath *m)	1287	static void flush_multipath_work(struct multipath *m)
1288	{	1288	{
1289	if (m->hw_handler_name) {	1289	if (m->hw_handler_name) {
1290	set_bit(MPATHF_PG_INIT_DISABLED, &m->flags);	1290	unsigned long flags;
1291	smp_mb__after_atomic();	1291
		1292	if (!atomic_read(&m->pg_init_in_progress))
		1293	goto skip;
		1294
		1295	spin_lock_irqsave(&m->lock, flags);
		1296	if (atomic_read(&m->pg_init_in_progress) &&
		1297	!test_and_set_bit(MPATHF_PG_INIT_DISABLED, &m->flags)) {
		1298	spin_unlock_irqrestore(&m->lock, flags);
1292		1299
1293	if (atomic_read(&m->pg_init_in_progress))
1294	flush_workqueue(kmpath_handlerd);	1300	flush_workqueue(kmpath_handlerd);
1295	multipath_wait_for_pg_init_completion(m);	1301	multipath_wait_for_pg_init_completion(m);
1296		1302
1297	clear_bit(MPATHF_PG_INIT_DISABLED, &m->flags);	1303	spin_lock_irqsave(&m->lock, flags);
1298	smp_mb__after_atomic();	1304	clear_bit(MPATHF_PG_INIT_DISABLED, &m->flags);
		1305	}
		1306	spin_unlock_irqrestore(&m->lock, flags);
1299	}	1307	}
1300		1308	skip:
1301	if (m->queue_mode == DM_TYPE_BIO_BASED)	1309	if (m->queue_mode == DM_TYPE_BIO_BASED)
1302	flush_work(&m->process_queued_bios);	1310	flush_work(&m->process_queued_bios);
1303	flush_work(&m->trigger_event);	1311	flush_work(&m->trigger_event);
@@ -1554,7 +1562,7 @@ static void pg_init_done(void *data, int errors) · 250 unmodified lines
1554	case SCSI_DH_RETRY:	1562	case SCSI_DH_RETRY:
1555	/* Wait before retrying. */	1563	/* Wait before retrying. */
1556	delay_retry = true;	1564	delay_retry = true;
1557	/* fall through */	1565	fallthrough;
1558	case SCSI_DH_IMM_RETRY:	1566	case SCSI_DH_IMM_RETRY:
1559	case SCSI_DH_RES_TEMP_UNAVAIL:	1567	case SCSI_DH_RES_TEMP_UNAVAIL:
1560	if (pg_init_limit_reached(m, pgpath))	1568	if (pg_init_limit_reached(m, pgpath))

drivers/md/dm-thin-metadata.c+7−3

 					  THIN_MAX_CONCURRENT_LOCKS);
 	if (IS_ERR(pmd->bm)) {
 		DMERR("could not create block manager");
-		return PTR_ERR(pmd->bm);
+		r = PTR_ERR(pmd->bm);
+		pmd->bm = NULL;
+		return r;
 	}
 	r = __open_or_format_metadata(pmd, format_device);
-	if (r)
+	if (r) {
 		dm_block_manager_destroy(pmd->bm);
+		pmd->bm = NULL;
+	}
 	return r;
 }
 	}
 	pmd_write_lock_in_core(pmd);
-	if (!dm_bm_is_read_only(pmd->bm) && !pmd->fail_io) {
+	if (!pmd->fail_io && !dm_bm_is_read_only(pmd->bm)) {
 		r = __commit_transaction(pmd);
 		if (r < 0)
 			DMWARN("%s: __commit_transaction() failed, error = %d",

drivers/md/dm-writecache.c+10−2

 	pfn_t pfn;
 	int id;
 	struct page **pages;
+	sector_t offset;
 	wc->memory_vmapped = false;
 		goto err1;
 	}
+	offset = get_start_sect(wc->ssd_dev->bdev);
+	if (offset & (PAGE_SIZE / 512 - 1)) {
+		r = -EINVAL;
+		goto err1;
+	}
+	offset >>= PAGE_SHIFT - 9;
 	id = dax_read_lock();
-	da = dax_direct_access(wc->ssd_dev->dax_dev, 0, p, &wc->memory_map, &pfn);
+	da = dax_direct_access(wc->ssd_dev->dax_dev, offset, p, &wc->memory_map, &pfn);
 	if (da < 0) {
 		wc->memory_map = NULL;
 		r = da;
 		i = 0;
 		do {
 			long daa;
-			daa = dax_direct_access(wc->ssd_dev->dax_dev, i, p - i,
+			daa = dax_direct_access(wc->ssd_dev->dax_dev, offset + i, p - i,
 						NULL, &pfn);
 			if (daa <= 0) {
 				r = daa ? daa : -EINVAL;

drivers/md/dm.c+1−1

@@ -1021,7 +1021,7 @@ static void clone_endio(struct bio *bio) · 1020 unmodified lines
1021	switch (r) {	1021	switch (r) {
1022	case DM_ENDIO_REQUEUE:	1022	case DM_ENDIO_REQUEUE:
1023	error = BLK_STS_DM_REQUEUE;	1023	error = BLK_STS_DM_REQUEUE;
1024	/FALLTHRU/	1024	fallthrough;
1025	case DM_ENDIO_DONE:	1025	case DM_ENDIO_DONE:
1026	break;	1026	break;
1027	case DM_ENDIO_INCOMPLETE:	1027	case DM_ENDIO_INCOMPLETE:

drivers/md/md-autodetect.c+2−2

@@ -102,10 +102,10 @@ static int __init md_setup(char *str) · 101 unmodified lines
102	pername = "raid0";	102	pername = "raid0";
103	break;	103	break;
104	}	104	}
105	/* FALL THROUGH */	105	fallthrough;
106	case 1: /* the first device is numeric */	106	case 1: /* the first device is numeric */
107	str = str1;	107	str = str1;
108	/* FALL THROUGH */	108	fallthrough;
109	case 0:	109	case 0:
110	md_setup_args[ent].level = LEVEL_NONE;	110	md_setup_args[ent].level = LEVEL_NONE;
111	pername="super-block";	111	pername="super-block";

drivers/md/md-bitmap.c+1−1

@@ -1433,7 +1433,7 @@ int md_bitmap_startwrite(struct bitmap *bitmap, sector_t offset, unsigned long s · 1432 unmodified lines
1433	case 0:	1433	case 0:
1434	md_bitmap_file_set_bit(bitmap, offset);	1434	md_bitmap_file_set_bit(bitmap, offset);
1435	md_bitmap_count_page(&bitmap->counts, offset, 1);	1435	md_bitmap_count_page(&bitmap->counts, offset, 1);
1436	/* fall through */	1436	fallthrough;
1437	case 1:	1437	case 1:
1438	*bmc = 2;	1438	*bmc = 2;
1439	}	1439	}

drivers/md/persistent-data/dm-block-manager.c+8−6

 	void *p;
 	int r;
-	if (bm->read_only)
+	if (dm_bm_is_read_only(bm))
 		return -EPERM;
 	p = dm_bufio_read(bm->bufio, b, (struct dm_buffer **) result);
 	struct buffer_aux *aux;
 	void *p;
-	if (bm->read_only)
+	if (dm_bm_is_read_only(bm))
 		return -EPERM;
 	p = dm_bufio_new(bm->bufio, b, (struct dm_buffer **) result);
 int dm_bm_flush(struct dm_block_manager *bm)
 {
-	if (bm->read_only)
+	if (dm_bm_is_read_only(bm))
 		return -EPERM;
 	return dm_bufio_write_dirty_buffers(bm->bufio);
 bool dm_bm_is_read_only(struct dm_block_manager *bm)
 {
-	return bm->read_only;
+	return (bm ? bm->read_only : true);
 }
 EXPORT_SYMBOL_GPL(dm_bm_is_read_only);
 void dm_bm_set_read_only(struct dm_block_manager *bm)
 {
-	bm->read_only = true;
+	if (bm)
+		bm->read_only = true;
 }
 EXPORT_SYMBOL_GPL(dm_bm_set_read_only);
 void dm_bm_set_read_write(struct dm_block_manager *bm)
 {
-	bm->read_only = false;
+	if (bm)
+		bm->read_only = false;
 }
 EXPORT_SYMBOL_GPL(dm_bm_set_read_write);

drivers/md/raid5.c+7−4

 			break;
 		}
 		dev = &sh->dev[s->failed_num[0]];
-		/* fall through */
+		fallthrough;
 	case check_state_compute_result:
 		sh->check_state = check_state_idle;
 		if (!dev)
 		/* we have 2-disk failure */
 		BUG_ON(s->failed != 2);
-		/* fall through */
+		fallthrough;
 	case check_state_compute_result:
 		sh->check_state = check_state_idle;
 	/*
 	 * The value should not be bigger than PAGE_SIZE. It requires to
-	 * be multiple of DEFAULT_STRIPE_SIZE.
+	 * be multiple of DEFAULT_STRIPE_SIZE and the value should be power
+	 * of two.
 	 */
-	if (new % DEFAULT_STRIPE_SIZE != 0 || new > PAGE_SIZE || new == 0)
+	if (new % DEFAULT_STRIPE_SIZE != 0 ||
+			new > PAGE_SIZE || new == 0 ||
+			new != roundup_pow_of_two(new))
 		return -EINVAL;
 	err = mddev_lock(mddev);

drivers/media/common/v4l2-tpg/v4l2-tpg-core.c+18−18

@@ -210,7 +210,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 209 unmodified lines
210	tpg->vdownsampling[1] = 1;	210	tpg->vdownsampling[1] = 1;
211	tpg->hdownsampling[1] = 1;	211	tpg->hdownsampling[1] = 1;
212	tpg->planes = 2;	212	tpg->planes = 2;
213	/* fall through */	213	fallthrough;
214	case V4L2_PIX_FMT_RGB332:	214	case V4L2_PIX_FMT_RGB332:
215	case V4L2_PIX_FMT_RGB565:	215	case V4L2_PIX_FMT_RGB565:
216	case V4L2_PIX_FMT_RGB565X:	216	case V4L2_PIX_FMT_RGB565X:
@@ -271,7 +271,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 54 unmodified lines
271	case V4L2_PIX_FMT_YUV420M:	271	case V4L2_PIX_FMT_YUV420M:
272	case V4L2_PIX_FMT_YVU420M:	272	case V4L2_PIX_FMT_YVU420M:
273	tpg->buffers = 3;	273	tpg->buffers = 3;
274	/* fall through */	274	fallthrough;
275	case V4L2_PIX_FMT_YUV420:	275	case V4L2_PIX_FMT_YUV420:
276	case V4L2_PIX_FMT_YVU420:	276	case V4L2_PIX_FMT_YVU420:
277	tpg->vdownsampling[1] = 2;	277	tpg->vdownsampling[1] = 2;
@@ -284,7 +284,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 6 unmodified lines
284	case V4L2_PIX_FMT_YUV422M:	284	case V4L2_PIX_FMT_YUV422M:
285	case V4L2_PIX_FMT_YVU422M:	285	case V4L2_PIX_FMT_YVU422M:
286	tpg->buffers = 3;	286	tpg->buffers = 3;
287	/* fall through */	287	fallthrough;
288	case V4L2_PIX_FMT_YUV422P:	288	case V4L2_PIX_FMT_YUV422P:
289	tpg->vdownsampling[1] = 1;	289	tpg->vdownsampling[1] = 1;
290	tpg->vdownsampling[2] = 1;	290	tpg->vdownsampling[2] = 1;
@@ -296,7 +296,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 5 unmodified lines
296	case V4L2_PIX_FMT_NV16M:	296	case V4L2_PIX_FMT_NV16M:
297	case V4L2_PIX_FMT_NV61M:	297	case V4L2_PIX_FMT_NV61M:
298	tpg->buffers = 2;	298	tpg->buffers = 2;
299	/* fall through */	299	fallthrough;
300	case V4L2_PIX_FMT_NV16:	300	case V4L2_PIX_FMT_NV16:
301	case V4L2_PIX_FMT_NV61:	301	case V4L2_PIX_FMT_NV61:
302	tpg->vdownsampling[1] = 1;	302	tpg->vdownsampling[1] = 1;
@@ -308,7 +308,7 @@ bool tpg_s_fourcc(struct tpg_data *tpg, u32 fourcc) · 5 unmodified lines
308	case V4L2_PIX_FMT_NV12M:	308	case V4L2_PIX_FMT_NV12M:
309	case V4L2_PIX_FMT_NV21M:	309	case V4L2_PIX_FMT_NV21M:
310	tpg->buffers = 2;	310	tpg->buffers = 2;
311	/* fall through */	311	fallthrough;
312	case V4L2_PIX_FMT_NV12:	312	case V4L2_PIX_FMT_NV12:
313	case V4L2_PIX_FMT_NV21:	313	case V4L2_PIX_FMT_NV21:
314	tpg->vdownsampling[1] = 2;	314	tpg->vdownsampling[1] = 2;
@@ -1275,7 +1275,7 @@ static void gen_twopix(struct tpg_data *tpg, · 960 unmodified lines
1275	case V4L2_PIX_FMT_RGB444:	1275	case V4L2_PIX_FMT_RGB444:
1276	case V4L2_PIX_FMT_XRGB444:	1276	case V4L2_PIX_FMT_XRGB444:
1277	alpha = 0;	1277	alpha = 0;
1278	/* fall through */	1278	fallthrough;
1279	case V4L2_PIX_FMT_YUV444:	1279	case V4L2_PIX_FMT_YUV444:
1280	case V4L2_PIX_FMT_ARGB444:	1280	case V4L2_PIX_FMT_ARGB444:
1281	buf[0][offset] = (g_u_s << 4) \| b_v;	1281	buf[0][offset] = (g_u_s << 4) \| b_v;
@@ -1283,21 +1283,21 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1283	break;	1283	break;
1284	case V4L2_PIX_FMT_RGBX444:	1284	case V4L2_PIX_FMT_RGBX444:
1285	alpha = 0;	1285	alpha = 0;
1286	/* fall through */	1286	fallthrough;
1287	case V4L2_PIX_FMT_RGBA444:	1287	case V4L2_PIX_FMT_RGBA444:
1288	buf[0][offset] = (b_v << 4) \| (alpha >> 4);	1288	buf[0][offset] = (b_v << 4) \| (alpha >> 4);
1289	buf[0][offset + 1] = (r_y_h << 4) \| g_u_s;	1289	buf[0][offset + 1] = (r_y_h << 4) \| g_u_s;
1290	break;	1290	break;
1291	case V4L2_PIX_FMT_XBGR444:	1291	case V4L2_PIX_FMT_XBGR444:
1292	alpha = 0;	1292	alpha = 0;
1293	/* fall through */	1293	fallthrough;
1294	case V4L2_PIX_FMT_ABGR444:	1294	case V4L2_PIX_FMT_ABGR444:
1295	buf[0][offset] = (g_u_s << 4) \| r_y_h;	1295	buf[0][offset] = (g_u_s << 4) \| r_y_h;
1296	buf[0][offset + 1] = (alpha & 0xf0) \| b_v;	1296	buf[0][offset + 1] = (alpha & 0xf0) \| b_v;
1297	break;	1297	break;
1298	case V4L2_PIX_FMT_BGRX444:	1298	case V4L2_PIX_FMT_BGRX444:
1299	alpha = 0;	1299	alpha = 0;
1300	/* fall through */	1300	fallthrough;
1301	case V4L2_PIX_FMT_BGRA444:	1301	case V4L2_PIX_FMT_BGRA444:
1302	buf[0][offset] = (r_y_h << 4) \| (alpha >> 4);	1302	buf[0][offset] = (r_y_h << 4) \| (alpha >> 4);
1303	buf[0][offset + 1] = (b_v << 4) \| g_u_s;	1303	buf[0][offset + 1] = (b_v << 4) \| g_u_s;
@@ -1305,7 +1305,7 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1305	case V4L2_PIX_FMT_RGB555:	1305	case V4L2_PIX_FMT_RGB555:
1306	case V4L2_PIX_FMT_XRGB555:	1306	case V4L2_PIX_FMT_XRGB555:
1307	alpha = 0;	1307	alpha = 0;
1308	/* fall through */	1308	fallthrough;
1309	case V4L2_PIX_FMT_YUV555:	1309	case V4L2_PIX_FMT_YUV555:
1310	case V4L2_PIX_FMT_ARGB555:	1310	case V4L2_PIX_FMT_ARGB555:
1311	buf[0][offset] = (g_u_s << 5) \| b_v;	1311	buf[0][offset] = (g_u_s << 5) \| b_v;
@@ -1314,7 +1314,7 @@ static void gen_twopix(struct tpg_data *tpg, · 2 unmodified lines
1314	break;	1314	break;
1315	case V4L2_PIX_FMT_RGBX555:	1315	case V4L2_PIX_FMT_RGBX555:
1316	alpha = 0;	1316	alpha = 0;
1317	/* fall through */	1317	fallthrough;
1318	case V4L2_PIX_FMT_RGBA555:	1318	case V4L2_PIX_FMT_RGBA555:
1319	buf[0][offset] = (g_u_s << 6) \| (b_v << 1) \|	1319	buf[0][offset] = (g_u_s << 6) \| (b_v << 1) \|
1320	((alpha & 0x80) >> 7);	1320	((alpha & 0x80) >> 7);
@@ -1322,7 +1322,7 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1322	break;	1322	break;
1323	case V4L2_PIX_FMT_XBGR555:	1323	case V4L2_PIX_FMT_XBGR555:
1324	alpha = 0;	1324	alpha = 0;
1325	/* fall through */	1325	fallthrough;
1326	case V4L2_PIX_FMT_ABGR555:	1326	case V4L2_PIX_FMT_ABGR555:
1327	buf[0][offset] = (g_u_s << 5) \| r_y_h;	1327	buf[0][offset] = (g_u_s << 5) \| r_y_h;
1328	buf[0][offset + 1] = (alpha & 0x80) \| (b_v << 2)	1328	buf[0][offset + 1] = (alpha & 0x80) \| (b_v << 2)
@@ -1330,7 +1330,7 @@ static void gen_twopix(struct tpg_data *tpg, · 1 unmodified line
1330	break;	1330	break;
1331	case V4L2_PIX_FMT_BGRX555:	1331	case V4L2_PIX_FMT_BGRX555:
1332	alpha = 0;	1332	alpha = 0;
1333	/* fall through */	1333	fallthrough;
1334	case V4L2_PIX_FMT_BGRA555:	1334	case V4L2_PIX_FMT_BGRA555:
1335	buf[0][offset] = (g_u_s << 6) \| (r_y_h << 1) \|	1335	buf[0][offset] = (g_u_s << 6) \| (r_y_h << 1) \|
1336	((alpha & 0x80) >> 7);	1336	((alpha & 0x80) >> 7);
@@ -1339,7 +1339,7 @@ static void gen_twopix(struct tpg_data *tpg, · 2 unmodified lines
1339	case V4L2_PIX_FMT_RGB555X:	1339	case V4L2_PIX_FMT_RGB555X:
1340	case V4L2_PIX_FMT_XRGB555X:	1340	case V4L2_PIX_FMT_XRGB555X:
1341	alpha = 0;	1341	alpha = 0;
1342	/* fall through */	1342	fallthrough;
1343	case V4L2_PIX_FMT_ARGB555X:	1343	case V4L2_PIX_FMT_ARGB555X:
1344	buf[0][offset] = (alpha & 0x80) \| (r_y_h << 2) \| (g_u_s >> 3);	1344	buf[0][offset] = (alpha & 0x80) \| (r_y_h << 2) \| (g_u_s >> 3);
1345	buf[0][offset + 1] = (g_u_s << 5) \| b_v;	1345	buf[0][offset + 1] = (g_u_s << 5) \| b_v;
@@ -1366,7 +1366,7 @@ static void gen_twopix(struct tpg_data *tpg, · 20 unmodified lines
1366	case V4L2_PIX_FMT_HSV32:	1366	case V4L2_PIX_FMT_HSV32:
1367	case V4L2_PIX_FMT_XYUV32:	1367	case V4L2_PIX_FMT_XYUV32:
1368	alpha = 0;	1368	alpha = 0;
1369	/* fall through */	1369	fallthrough;
1370	case V4L2_PIX_FMT_YUV32:	1370	case V4L2_PIX_FMT_YUV32:
1371	case V4L2_PIX_FMT_ARGB32:	1371	case V4L2_PIX_FMT_ARGB32:
1372	case V4L2_PIX_FMT_AYUV32:	1372	case V4L2_PIX_FMT_AYUV32:
@@ -1377,7 +1377,7 @@ static void gen_twopix(struct tpg_data *tpg, · 4 unmodified lines
1377	break;	1377	break;
1378	case V4L2_PIX_FMT_RGBX32:	1378	case V4L2_PIX_FMT_RGBX32:
1379	alpha = 0;	1379	alpha = 0;
1380	/* fall through */	1380	fallthrough;
1381	case V4L2_PIX_FMT_RGBA32:	1381	case V4L2_PIX_FMT_RGBA32:
1382	buf[0][offset] = r_y_h;	1382	buf[0][offset] = r_y_h;
1383	buf[0][offset + 1] = g_u_s;	1383	buf[0][offset + 1] = g_u_s;
@@ -1388,7 +1388,7 @@ static void gen_twopix(struct tpg_data *tpg, · 4 unmodified lines
1388	case V4L2_PIX_FMT_XBGR32:	1388	case V4L2_PIX_FMT_XBGR32:
1389	case V4L2_PIX_FMT_VUYX32:	1389	case V4L2_PIX_FMT_VUYX32:
1390	alpha = 0;	1390	alpha = 0;
1391	/* fall through */	1391	fallthrough;
1392	case V4L2_PIX_FMT_ABGR32:	1392	case V4L2_PIX_FMT_ABGR32:
1393	case V4L2_PIX_FMT_VUYA32:	1393	case V4L2_PIX_FMT_VUYA32:
1394	buf[0][offset] = b_v;	1394	buf[0][offset] = b_v;
@@ -1398,7 +1398,7 @@ static void gen_twopix(struct tpg_data *tpg, · 3 unmodified lines
1398	break;	1398	break;
1399	case V4L2_PIX_FMT_BGRX32:	1399	case V4L2_PIX_FMT_BGRX32:
1400	alpha = 0;	1400	alpha = 0;
1401	/* fall through */	1401	fallthrough;
1402	case V4L2_PIX_FMT_BGRA32:	1402	case V4L2_PIX_FMT_BGRA32:
1403	buf[0][offset] = alpha;	1403	buf[0][offset] = alpha;
1404	buf[0][offset + 1] = b_v;	1404	buf[0][offset + 1] = b_v;

drivers/media/dvb-core/dvb_net.c+1−1

@@ -546,7 +546,7 @@ static int dvb_net_ule_new_payload(struct dvb_net_ule_handle *h) · 545 unmodified lines
546	h->priv->ule_sndu_type_1 = 1;	546	h->priv->ule_sndu_type_1 = 1;
547	h->ts_remain -= 1;	547	h->ts_remain -= 1;
548	h->from_where += 1;	548	h->from_where += 1;
549	/* fallthrough */	549	fallthrough;
550	case 0:	550	case 0:
551	h->new_ts = 1;	551	h->new_ts = 1;
552	h->ts += TS_SZ;	552	h->ts += TS_SZ;

drivers/media/dvb-frontends/bcm3510.c+1−1

@@ -773,7 +773,7 @@ static int bcm3510_init(struct dvb_frontend* fe) · 772 unmodified lines
773	deb_info("attempting to download firmware\n");	773	deb_info("attempting to download firmware\n");
774	if ((ret = bcm3510_init_cold(st)) < 0)	774	if ((ret = bcm3510_init_cold(st)) < 0)
775	return ret;	775	return ret;
776	/* fall-through */	776	fallthrough;
777	case JDEC_EEPROM_LOAD_WAIT:	777	case JDEC_EEPROM_LOAD_WAIT:
778	deb_info("firmware is loaded\n");	778	deb_info("firmware is loaded\n");
779	bcm3510_check_firmware_version(st);	779	bcm3510_check_firmware_version(st);

drivers/media/dvb-frontends/dib0090.c+1−1

@@ -1693,7 +1693,7 @@ static int dib0090_dc_offset_calibration(struct dib0090_state *state, enum front · 1692 unmodified lines
1693	if (state->identity.p1g)	1693	if (state->identity.p1g)
1694	state->dc = dc_p1g_table;	1694	state->dc = dc_p1g_table;
1695		1695
1696	/* fall through */	1696	fallthrough;
1697	case CT_TUNER_STEP_0:	1697	case CT_TUNER_STEP_0:
1698	dprintk("Start/continue DC calibration for %s path\n",	1698	dprintk("Start/continue DC calibration for %s path\n",
1699	(state->dc->i == 1) ? "I" : "Q");	1699	(state->dc->i == 1) ? "I" : "Q");

drivers/media/dvb-frontends/dib3000mb.c+1−1

@@ -224,7 +224,7 @@ static int dib3000mb_set_frontend(struct dvb_frontend *fe, int tuner) · 223 unmodified lines
224	switch (c->hierarchy) {	224	switch (c->hierarchy) {
225	case HIERARCHY_NONE:	225	case HIERARCHY_NONE:
226	deb_setf("hierarchy: none\n");	226	deb_setf("hierarchy: none\n");
227	/* fall through */	227	fallthrough;
228	case HIERARCHY_1:	228	case HIERARCHY_1:
229	deb_setf("hierarchy: alpha=1\n");	229	deb_setf("hierarchy: alpha=1\n");
230	wr(DIB3000MB_REG_VIT_ALPHA, DIB3000_ALPHA_1);	230	wr(DIB3000MB_REG_VIT_ALPHA, DIB3000_ALPHA_1);

drivers/media/dvb-frontends/dib7000p.c+1−1

@@ -276,7 +276,7 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p · 275 unmodified lines
276	if (state->version != SOC7090)	276	if (state->version != SOC7090)
277	reg_1280 &= ~((1 << 11));	277	reg_1280 &= ~((1 << 11));
278	reg_1280 &= ~(1 << 6);	278	reg_1280 &= ~(1 << 6);
279	/* fall-through */	279	fallthrough;
280	case DIB7000P_POWER_INTERFACE_ONLY:	280	case DIB7000P_POWER_INTERFACE_ONLY:
281	/* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */	281	/* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */
282	/* TODO power up either SDIO or I2C */	282	/* TODO power up either SDIO or I2C */

drivers/media/dvb-frontends/drx39xyj/drxj.c+56−47

 			pr_err("error %d\n", rc);
 			goto rw_error;
 		}
-		/* fallthrough */
+		fallthrough;
 	case SIO_HI_RA_RAM_CMD_BRDCTRL:
 		rc = drxj_dap_write_reg16(dev_addr, SIO_HI_RA_RAM_PAR_2__A, cmd->param2, 0);
 		if (rc != 0) {
 			pr_err("error %d\n", rc);
 			goto rw_error;
 		}
-		/* fallthrough */
+		fallthrough;
 	case SIO_HI_RA_RAM_CMD_NULL:
 		/* No parameters */
 		break;
 			/* coef = 188/204                          */
 			max_bit_rate =
 			    (ext_attr->curr_symbol_rate / 8) * nr_bits * 188;
-			/* fall-through - as b/c Annex A/C need following settings */
+			fallthrough;	/* as b/c Annex A/C need following settings */
 		case DRX_STANDARD_ITU_B:
 			rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0);
 			if (rc != 0) {
 		if (!ext_attr->has_smatx)
 			return -EIO;
 		switch (uio_cfg->mode) {
-		case DRX_UIO_MODE_FIRMWARE_SMA:	/* fall through */
+		case DRX_UIO_MODE_FIRMWARE_SMA:
-		case DRX_UIO_MODE_FIRMWARE_SAW:	/* fall through */
+		case DRX_UIO_MODE_FIRMWARE_SAW:
 		case DRX_UIO_MODE_READWRITE:
 			ext_attr->uio_sma_tx_mode = uio_cfg->mode;
 			break;
 		if (!ext_attr->has_smarx)
 			return -EIO;
 		switch (uio_cfg->mode) {
-		case DRX_UIO_MODE_FIRMWARE0:	/* fall through */
+		case DRX_UIO_MODE_FIRMWARE0:
 		case DRX_UIO_MODE_READWRITE:
 			ext_attr->uio_sma_rx_mode = uio_cfg->mode;
 			break;
 		if (!ext_attr->has_gpio)
 			return -EIO;
 		switch (uio_cfg->mode) {
-		case DRX_UIO_MODE_FIRMWARE0:	/* fall through */
+		case DRX_UIO_MODE_FIRMWARE0:
 		case DRX_UIO_MODE_READWRITE:
 			ext_attr->uio_gpio_mode = uio_cfg->mode;
 			break;
 			}
 			ext_attr->uio_irqn_mode = uio_cfg->mode;
 			break;
-		case DRX_UIO_MODE_FIRMWARE0:	/* fall through */
+		case DRX_UIO_MODE_FIRMWARE0:
 		default:
 			return -EINVAL;
 			break;
 		if (rc != 0) {
 			pr_err("error %d\n", rc);
 			goto rw_error;
-		}	/* fallthrough */
+		}
+		fallthrough;
 	case 4:
 		rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_3__A, *(cmd->parameter + 3), 0);
 		if (rc != 0) {
 			pr_err("error %d\n", rc);
 			goto rw_error;
-		}	/* fallthrough */
+		}
+		fallthrough;
 	case 3:
 		rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_2__A, *(cmd->parameter + 2), 0);
 		if (rc != 0) {
 			pr_err("error %d\n", rc);
 			goto rw_error;
-		}	/* fallthrough */
+		}
+		fallthrough;
 	case 2:
 		rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_1__A, *(cmd->parameter + 1), 0);
 		if (rc != 0) {
 			pr_err("error %d\n", rc);
 			goto rw_error;
-		}	/* fallthrough */
+		}
+		fallthrough;
 	case 1:
 		rc = drxj_dap_write_reg16(dev_addr, SCU_RAM_PARAM_0__A, *(cmd->parameter + 0), 0);
 		if (rc != 0) {
 			pr_err("error %d\n", rc);
 			goto rw_error;
-		}	/* fallthrough */
+		}
+		fallthrough;
 	case 0:
 		/* do nothing */
 		break;
 			if (rc != 0) {
 				pr_err("error %d\n", rc);
 				goto rw_error;
-			}	/* fallthrough */
+			}
+			fallthrough;
 		case 3:
 			rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_2__A, cmd->result + 2, 0);
 			if (rc != 0) {
 				pr_err("error %d\n", rc);
 				goto rw_error;
-			}	/* fallthrough */
+			}
+			fallthrough;
 		case 2:
 			rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_1__A, cmd->result + 1, 0);
 			if (rc != 0) {
 				pr_err("error %d\n", rc);
 				goto rw_error;
-			}	/* fallthrough */
+			}
+			fallthrough;
 		case 1:
 			rc = drxj_dap_read_reg16(dev_addr, SCU_RAM_PARAM_0__A, cmd->result + 0, 0);
 			if (rc != 0) {
 				pr_err("error %d\n", rc);
 				goto rw_error;
-			}	/* fallthrough */
+			}
+			fallthrough;
 		case 0:
 			/* do nothing */
 			break;
 		   Sound carrier is already 3Mhz above centre frequency due
 		   to tuner setting so now add an extra shift of 1MHz... */
 		fm_frequency_shift = 1000;
-		/*fall through */
+		fallthrough;
 	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_NTSC:
 	case DRX_STANDARD_PAL_SECAM_BG:
 	    (standard == DRX_STANDARD_NTSC)) {
 		switch (channel->bandwidth) {
 		case DRX_BANDWIDTH_6MHZ:
-		case DRX_BANDWIDTH_UNKNOWN:	/* fall through */
+		case DRX_BANDWIDTH_UNKNOWN:
 			channel->bandwidth = DRX_BANDWIDTH_6MHZ;
 			break;
-		case DRX_BANDWIDTH_8MHZ:	/* fall through */
+		case DRX_BANDWIDTH_8MHZ:
-		case DRX_BANDWIDTH_7MHZ:	/* fall through */
+		case DRX_BANDWIDTH_7MHZ:
 		default:
 			return -EINVAL;
 		}
 		}
 		switch (channel->constellation) {
-		case DRX_CONSTELLATION_QAM16:	/* fall through */
+		case DRX_CONSTELLATION_QAM16:
-		case DRX_CONSTELLATION_QAM32:	/* fall through */
+		case DRX_CONSTELLATION_QAM32:
-		case DRX_CONSTELLATION_QAM64:	/* fall through */
+		case DRX_CONSTELLATION_QAM64:
-		case DRX_CONSTELLATION_QAM128:	/* fall through */
+		case DRX_CONSTELLATION_QAM128:
 		case DRX_CONSTELLATION_QAM256:
 			bandwidth_temp = channel->symbolrate * bw_rolloff_factor;
 			bandwidth = bandwidth_temp / 100;
 		}
 		break;
 #ifndef DRXJ_VSB_ONLY
-	case DRX_STANDARD_ITU_A:	/* fallthrough */
+	case DRX_STANDARD_ITU_A:
-	case DRX_STANDARD_ITU_B:	/* fallthrough */
+	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_ITU_C:
 		rc = set_qam_channel(demod, channel, tuner_freq_offset);
 		if (rc != 0) {
 		    SCU_RAM_COMMAND_CMD_DEMOD_GET_LOCK;
 		break;
 #endif
-	case DRX_STANDARD_UNKNOWN:	/* fallthrough */
+	case DRX_STANDARD_UNKNOWN:
 	default:
 		return -EIO;
 	}
 	 */
 	switch (prev_standard) {
 #ifndef DRXJ_VSB_ONLY
-	case DRX_STANDARD_ITU_A:	/* fallthrough */
+	case DRX_STANDARD_ITU_A:
-	case DRX_STANDARD_ITU_B:	/* fallthrough */
+	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_ITU_C:
 		rc = power_down_qam(demod, false);
 		if (rc != 0) {
 	case DRX_STANDARD_UNKNOWN:
 		/* Do nothing */
 		break;
-	case DRX_STANDARD_AUTO:	/* fallthrough */
+	case DRX_STANDARD_AUTO:
 	default:
 		return -EINVAL;
 	}
 	switch (*standard) {
 #ifndef DRXJ_VSB_ONLY
-	case DRX_STANDARD_ITU_A:	/* fallthrough */
+	case DRX_STANDARD_ITU_A:
-	case DRX_STANDARD_ITU_B:	/* fallthrough */
+	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_ITU_C:
 		do {
 			u16 dummy;
 				goto rw_error;
 			}
 			break;
-		case DRX_STANDARD_PAL_SECAM_BG:	/* fallthrough */
+		case DRX_STANDARD_PAL_SECAM_BG:
-		case DRX_STANDARD_PAL_SECAM_DK:	/* fallthrough */
+		case DRX_STANDARD_PAL_SECAM_DK:
-		case DRX_STANDARD_PAL_SECAM_I:	/* fallthrough */
+		case DRX_STANDARD_PAL_SECAM_I:
-		case DRX_STANDARD_PAL_SECAM_L:	/* fallthrough */
+		case DRX_STANDARD_PAL_SECAM_L:
-		case DRX_STANDARD_PAL_SECAM_LP:	/* fallthrough */
+		case DRX_STANDARD_PAL_SECAM_LP:
-		case DRX_STANDARD_NTSC:	/* fallthrough */
+		case DRX_STANDARD_NTSC:
 		case DRX_STANDARD_FM:
 			rc = power_down_atv(demod, ext_attr->standard, true);
 			if (rc != 0) {
 		case DRX_STANDARD_UNKNOWN:
 			/* Do nothing */
 			break;
-		case DRX_STANDARD_AUTO:	/* fallthrough */
+		case DRX_STANDARD_AUTO:
 		default:
 			return -EIO;
 		}
 		ext_attr->vsb_pre_saw_cfg = *pre_saw;
 		break;
 #ifndef DRXJ_VSB_ONLY
-	case DRX_STANDARD_ITU_A:	/* fallthrough */
+	case DRX_STANDARD_ITU_A:
-	case DRX_STANDARD_ITU_B:	/* fallthrough */
+	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_ITU_C:
 		ext_attr->qam_pre_saw_cfg = *pre_saw;
 		break;
 	ext_attr = (struct drxj_data *) demod->my_ext_attr;
 	switch (afe_gain->standard) {
-	case DRX_STANDARD_8VSB:	/* fallthrough */
+	case DRX_STANDARD_8VSB:	fallthrough;
 #ifndef DRXJ_VSB_ONLY
-	case DRX_STANDARD_ITU_A:	/* fallthrough */
+	case DRX_STANDARD_ITU_A:
-	case DRX_STANDARD_ITU_B:	/* fallthrough */
+	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_ITU_C:
 #endif
 		/* Do nothing */
 		ext_attr->vsb_pga_cfg = gain * 13 + 140;
 		break;
 #ifndef DRXJ_VSB_ONLY
-	case DRX_STANDARD_ITU_A:	/* fallthrough */
+	case DRX_STANDARD_ITU_A:
-	case DRX_STANDARD_ITU_B:	/* fallthrough */
+	case DRX_STANDARD_ITU_B:
 	case DRX_STANDARD_ITU_C:
 		ext_attr->qam_pga_cfg = gain * 13 + 140;
 		break;

drivers/media/dvb-frontends/drxd_hard.c+6−6

@@ -1512,14 +1512,14 @@ static int SetDeviceTypeId(struct drxd_state *state) · 1511 unmodified lines
1512	switch (deviceId) {	1512	switch (deviceId) {
1513	case 4:	1513	case 4:
1514	state->diversity = 1;	1514	state->diversity = 1;
1515	/* fall through */	1515	fallthrough;
1516	case 3:	1516	case 3:
1517	case 7:	1517	case 7:
1518	state->PGA = 1;	1518	state->PGA = 1;
1519	break;	1519	break;
1520	case 6:	1520	case 6:
1521	state->diversity = 1;	1521	state->diversity = 1;
1522	/* fall through */	1522	fallthrough;
1523	case 5:	1523	case 5:
1524	case 8:	1524	case 8:
1525	break;	1525	break;
@@ -1966,7 +1966,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 440 unmodified lines
1966	switch (p->transmission_mode) {	1966	switch (p->transmission_mode) {
1967	default: /* Not set, detect it automatically */	1967	default: /* Not set, detect it automatically */
1968	operationMode \|= SC_RA_RAM_OP_AUTO_MODE__M;	1968	operationMode \|= SC_RA_RAM_OP_AUTO_MODE__M;
1969	/* fall through - try first guess DRX_FFTMODE_8K */	1969	fallthrough; /* try first guess DRX_FFTMODE_8K */
1970	case TRANSMISSION_MODE_8K:	1970	case TRANSMISSION_MODE_8K:
1971	transmissionParams \|= SC_RA_RAM_OP_PARAM_MODE_8K;	1971	transmissionParams \|= SC_RA_RAM_OP_PARAM_MODE_8K;
1972	if (state->type_A) {	1972	if (state->type_A) {
@@ -2139,7 +2139,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 166 unmodified lines
2139	switch (p->modulation) {	2139	switch (p->modulation) {
2140	default:	2140	default:
2141	operationMode \|= SC_RA_RAM_OP_AUTO_CONST__M;	2141	operationMode \|= SC_RA_RAM_OP_AUTO_CONST__M;
2142	/* fall through - try first guess DRX_CONSTELLATION_QAM64 */	2142	fallthrough; /* try first guess DRX_CONSTELLATION_QAM64 */
2143	case QAM_64:	2143	case QAM_64:
2144	transmissionParams \|= SC_RA_RAM_OP_PARAM_CONST_QAM64;	2144	transmissionParams \|= SC_RA_RAM_OP_PARAM_CONST_QAM64;
2145	if (state->type_A) {	2145	if (state->type_A) {
@@ -2266,7 +2266,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 120 unmodified lines
2266	break;	2266	break;
2267	default:	2267	default:
2268	operationMode \|= SC_RA_RAM_OP_AUTO_RATE__M;	2268	operationMode \|= SC_RA_RAM_OP_AUTO_RATE__M;
2269	/* fall through */	2269	fallthrough;
2270	case FEC_2_3:	2270	case FEC_2_3:
2271	transmissionParams \|= SC_RA_RAM_OP_PARAM_RATE_2_3;	2271	transmissionParams \|= SC_RA_RAM_OP_PARAM_RATE_2_3;
2272	if (state->type_A)	2272	if (state->type_A)
@@ -2301,7 +2301,7 @@ static int DRX_Start(struct drxd_state *state, s32 off) · 28 unmodified lines
2301	switch (p->bandwidth_hz) {	2301	switch (p->bandwidth_hz) {
2302	case 0:	2302	case 0:
2303	p->bandwidth_hz = 8000000;	2303	p->bandwidth_hz = 8000000;
2304	/* fall through */	2304	fallthrough;
2305	case 8000000:	2305	case 8000000:
2306	/* (64/7)(8/8)1000000 */	2306	/* (64/7)(8/8)1000000 */
2307	bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;	2307	bandwidth = DRXD_BANDWIDTH_8MHZ_IN_HZ;

drivers/media/dvb-frontends/drxk_hard.c+12−12

@@ -1756,7 +1756,7 @@ static int setoperation_mode(struct drxk_state *state, · 1755 unmodified lines
1756	goto error;	1756	goto error;
1757	state->m_operation_mode = OM_NONE;	1757	state->m_operation_mode = OM_NONE;
1758	break;	1758	break;
1759	case OM_QAM_ITU_A: /* fallthrough */	1759	case OM_QAM_ITU_A:
1760	case OM_QAM_ITU_C:	1760	case OM_QAM_ITU_C:
1761	status = mpegts_stop(state);	1761	status = mpegts_stop(state);
1762	if (status < 0)	1762	if (status < 0)
@@ -1783,7 +1783,7 @@ static int setoperation_mode(struct drxk_state *state, · 20 unmodified lines
1783	if (status < 0)	1783	if (status < 0)
1784	goto error;	1784	goto error;
1785	break;	1785	break;
1786	case OM_QAM_ITU_A: /* fallthrough */	1786	case OM_QAM_ITU_A:
1787	case OM_QAM_ITU_C:	1787	case OM_QAM_ITU_C:
1788	dprintk(1, ": DVB-C Annex %c\n",	1788	dprintk(1, ": DVB-C Annex %c\n",
1789	(state->m_operation_mode == OM_QAM_ITU_A) ? 'A' : 'C');	1789	(state->m_operation_mode == OM_QAM_ITU_A) ? 'A' : 'C');
@@ -2012,7 +2012,7 @@ static int mpegts_dto_setup(struct drxk_state *state, · 222 unmodified lines
2012	fec_oc_rcn_ctl_rate = 0xC00000;	2012	fec_oc_rcn_ctl_rate = 0xC00000;
2013	static_clk = state->m_dvbt_static_clk;	2013	static_clk = state->m_dvbt_static_clk;
2014	break;	2014	break;
2015	case OM_QAM_ITU_A: /* fallthrough */	2015	case OM_QAM_ITU_A:
2016	case OM_QAM_ITU_C:	2016	case OM_QAM_ITU_C:
2017	fec_oc_tmd_mode = 0x0004;	2017	fec_oc_tmd_mode = 0x0004;
2018	fec_oc_rcn_ctl_rate = 0xD2B4EE; /* good for >63 Mb/s */	2018	fec_oc_rcn_ctl_rate = 0xD2B4EE; /* good for >63 Mb/s */
@@ -3249,11 +3249,11 @@ static int dvbt_sc_command(struct drxk_state *state, · 1230 unmodified lines
3249	case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM:	3249	case OFDM_SC_RA_RAM_CMD_SET_PREF_PARAM:
3250	case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM:	3250	case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM:
3251	status \|= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1);	3251	status \|= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1);
3252	/* fall through - All commands using 1 parameters */	3252	fallthrough; /* All commands using 1 parameters */
3253	case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING:	3253	case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING:
3254	case OFDM_SC_RA_RAM_CMD_USER_IO:	3254	case OFDM_SC_RA_RAM_CMD_USER_IO:
3255	status \|= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0);	3255	status \|= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0);
3256	/* fall through - All commands using 0 parameters */	3256	fallthrough; /* All commands using 0 parameters */
3257	case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM:	3257	case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM:
3258	case OFDM_SC_RA_RAM_CMD_NULL:	3258	case OFDM_SC_RA_RAM_CMD_NULL:
3259	/* Write command */	3259	/* Write command */
@@ -3761,7 +3761,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 501 unmodified lines
3761	case TRANSMISSION_MODE_AUTO:	3761	case TRANSMISSION_MODE_AUTO:
3762	default:	3762	default:
3763	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_MODE__M;	3763	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_MODE__M;
3764	/* fall through - try first guess DRX_FFTMODE_8K */	3764	fallthrough; /* try first guess DRX_FFTMODE_8K */
3765	case TRANSMISSION_MODE_8K:	3765	case TRANSMISSION_MODE_8K:
3766	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_MODE_8K;	3766	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_MODE_8K;
3767	break;	3767	break;
@@ -3775,7 +3775,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 7 unmodified lines
3775	default:	3775	default:
3776	case GUARD_INTERVAL_AUTO:	3776	case GUARD_INTERVAL_AUTO:
3777	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M;	3777	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M;
3778	/* fall through - try first guess DRX_GUARD_1DIV4 */	3778	fallthrough; /* try first guess DRX_GUARD_1DIV4 */
3779	case GUARD_INTERVAL_1_4:	3779	case GUARD_INTERVAL_1_4:
3780	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_GUARD_4;	3780	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_GUARD_4;
3781	break;	3781	break;
@@ -3798,7 +3798,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 16 unmodified lines
3798	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_HIER__M;	3798	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_HIER__M;
3799	/* try first guess SC_RA_RAM_OP_PARAM_HIER_NO */	3799	/* try first guess SC_RA_RAM_OP_PARAM_HIER_NO */
3800	/* transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_HIER_NO; */	3800	/* transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_HIER_NO; */
3801	/* fall through */	3801	fallthrough;
3802	case HIERARCHY_1:	3802	case HIERARCHY_1:
3803	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_HIER_A1;	3803	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_HIER_A1;
3804	break;	3804	break;
@@ -3816,7 +3816,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 11 unmodified lines
3816	case QAM_AUTO:	3816	case QAM_AUTO:
3817	default:	3817	default:
3818	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_CONST__M;	3818	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_CONST__M;
3819	/* fall through - try first guess DRX_CONSTELLATION_QAM64 */	3819	fallthrough; /* try first guess DRX_CONSTELLATION_QAM64 */
3820	case QAM_64:	3820	case QAM_64:
3821	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64;	3821	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64;
3822	break;	3822	break;
@@ -3841,7 +3841,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 18 unmodified lines
3841	WR16(dev_addr, OFDM_EC_SB_PRIOR__A,	3841	WR16(dev_addr, OFDM_EC_SB_PRIOR__A,
3842	OFDM_EC_SB_PRIOR_HI));	3842	OFDM_EC_SB_PRIOR_HI));
3843	break;	3843	break;
3844	case DRX_PRIORITY_UNKNOWN: /* fall through */	3844	case DRX_PRIORITY_UNKNOWN:
3845	default:	3845	default:
3846	status = -EINVAL;	3846	status = -EINVAL;
3847	goto error;	3847	goto error;
@@ -3859,7 +3859,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 11 unmodified lines
3859	case FEC_AUTO:	3859	case FEC_AUTO:
3860	default:	3860	default:
3861	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_RATE__M;	3861	operation_mode \|= OFDM_SC_RA_RAM_OP_AUTO_RATE__M;
3862	/* fall through - try first guess DRX_CODERATE_2DIV3 */	3862	fallthrough; /* try first guess DRX_CODERATE_2DIV3 */
3863	case FEC_2_3:	3863	case FEC_2_3:
3864	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3;	3864	transmission_params \|= OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3;
3865	break;	3865	break;
@@ -3893,7 +3893,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz, · 27 unmodified lines
3893	switch (state->props.bandwidth_hz) {	3893	switch (state->props.bandwidth_hz) {
3894	case 0:	3894	case 0:
3895	state->props.bandwidth_hz = 8000000;	3895	state->props.bandwidth_hz = 8000000;
3896	/* fall through */	3896	fallthrough;
3897	case 8000000:	3897	case 8000000:
3898	bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ;	3898	bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ;
3899	status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,	3899	status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,

drivers/media/dvb-frontends/lgdt3306a.c+1−1

@@ -768,7 +768,7 @@ static int lgdt3306a_set_if(struct lgdt3306a_state *state, · 767 unmodified lines
768	default:	768	default:
769	pr_warn("IF=%d KHz is not supported, 3250 assumed\n",	769	pr_warn("IF=%d KHz is not supported, 3250 assumed\n",
770	if_freq_khz);	770	if_freq_khz);
771	/* fallthrough */	771	fallthrough;
772	case 3250: /* 3.25Mhz */	772	case 3250: /* 3.25Mhz */
773	nco1 = 0x34;	773	nco1 = 0x34;
774	nco2 = 0x00;	774	nco2 = 0x00;

drivers/media/dvb-frontends/mt352.c+1−1

@@ -201,7 +201,7 @@ static int mt352_set_parameters(struct dvb_frontend *fe) · 200 unmodified lines
201	if (op->hierarchy == HIERARCHY_AUTO \|\|	201	if (op->hierarchy == HIERARCHY_AUTO \|\|
202	op->hierarchy == HIERARCHY_NONE)	202	op->hierarchy == HIERARCHY_NONE)
203	break;	203	break;
204	/* fall through */	204	fallthrough;
205	default:	205	default:
206	return -EINVAL;	206	return -EINVAL;
207	}	207	}

drivers/media/dvb-frontends/mxl5xx.c+1−1

@@ -739,7 +739,7 @@ static int get_frontend(struct dvb_frontend *fe, · 738 unmodified lines
739	default:	739	default:
740	break;	740	break;
741	}	741	}
742	/* Fall through */	742	fallthrough;
743	case SYS_DVBS:	743	case SYS_DVBS:
744	switch ((enum MXL_HYDRA_MODULATION_E)	744	switch ((enum MXL_HYDRA_MODULATION_E)
745	reg_data[DMD_MODULATION_SCHEME_ADDR]) {	745	reg_data[DMD_MODULATION_SCHEME_ADDR]) {

drivers/media/dvb-frontends/or51132.c+1−1

@@ -482,7 +482,7 @@ start: · 481 unmodified lines
482	switch (reg&0xff) {	482	switch (reg&0xff) {
483	case 0x06:	483	case 0x06:
484	if (reg & 0x1000) usK = 3 << 24;	484	if (reg & 0x1000) usK = 3 << 24;
485	/* fall through */	485	fallthrough;
486	case 0x43: /* QAM64 */	486	case 0x43: /* QAM64 */
487	c = 150204167;	487	c = 150204167;
488	break;	488	break;

drivers/media/dvb-frontends/s5h1411.c+1−1

@@ -398,7 +398,7 @@ static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz) · 397 unmodified lines
398	default:	398	default:
399	dprintk("%s(%d KHz) Invalid, defaulting to 5380\n",	399	dprintk("%s(%d KHz) Invalid, defaulting to 5380\n",
400	__func__, KHz);	400	__func__, KHz);
401	/* fall through */	401	fallthrough;
402	case 5380:	402	case 5380:
403	case 44000:	403	case 44000:
404	s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4);	404	s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4);

drivers/media/dvb-frontends/zl10353.c+2−2

@@ -201,7 +201,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe) · 200 unmodified lines
201	break;	201	break;
202	default:	202	default:
203	c->bandwidth_hz = 8000000;	203	c->bandwidth_hz = 8000000;
204	/* fall through */	204	fallthrough;
205	case 8000000:	205	case 8000000:
206	zl10353_single_write(fe, MCLK_RATIO, 0x75);	206	zl10353_single_write(fe, MCLK_RATIO, 0x75);
207	zl10353_single_write(fe, 0x64, 0x36);	207	zl10353_single_write(fe, 0x64, 0x36);
@@ -258,7 +258,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe) · 50 unmodified lines
258	if (c->hierarchy == HIERARCHY_AUTO \|\|	258	if (c->hierarchy == HIERARCHY_AUTO \|\|
259	c->hierarchy == HIERARCHY_NONE)	259	c->hierarchy == HIERARCHY_NONE)
260	break;	260	break;
261	/* fall through */	261	fallthrough;
262	default:	262	default:
263	return -EINVAL;	263	return -EINVAL;
264	}	264	}

drivers/media/i2c/Kconfig+2−2

@@ -467,7 +467,7 @@ config VIDEO_VPX3220 · 466 unmodified lines
467	config VIDEO_MAX9286	467	config VIDEO_MAX9286
468	tristate "Maxim MAX9286 GMSL deserializer support"	468	tristate "Maxim MAX9286 GMSL deserializer support"
469	depends on I2C && I2C_MUX	469	depends on I2C && I2C_MUX
470	depends on OF	470	depends on OF_GPIO
471	select V4L2_FWNODE	471	select V4L2_FWNODE
472	select VIDEO_V4L2_SUBDEV_API	472	select VIDEO_V4L2_SUBDEV_API
473	select MEDIA_CONTROLLER	473	select MEDIA_CONTROLLER
@@ -741,7 +741,7 @@ config VIDEO_HI556 · 267 unmodified lines
741	config VIDEO_IMX214	741	config VIDEO_IMX214
742	tristate "Sony IMX214 sensor support"	742	tristate "Sony IMX214 sensor support"
743	depends on GPIOLIB && I2C && VIDEO_V4L2	743	depends on GPIOLIB && I2C && VIDEO_V4L2
744	depends on V4L2_FWNODE	744	select V4L2_FWNODE
745	select MEDIA_CONTROLLER	745	select MEDIA_CONTROLLER
746	select VIDEO_V4L2_SUBDEV_API	746	select VIDEO_V4L2_SUBDEV_API
747	select REGMAP_I2C	747	select REGMAP_I2C

drivers/media/pci/cx23885/cx23885-cards.c+2−2

drivers/media/pci/ddbridge/ddbridge-core.c+12−11

 			dvb_unregister_frontend(dvb->fe2);
 		if (dvb->fe)
 			dvb_unregister_frontend(dvb->fe);
-		/* fallthrough */
+		fallthrough;
 	case 0x30:
 		dvb_module_release(dvb->i2c_client[0]);
 		dvb->i2c_client[0] = NULL;
 			dvb_frontend_detach(dvb->fe);
 		dvb->fe = NULL;
 		dvb->fe2 = NULL;
-		/* fallthrough */
+		fallthrough;
 	case 0x20:
 		dvb_net_release(&dvb->dvbnet);
-		/* fallthrough */
+		fallthrough;
 	case 0x12:
 		dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
 					      &dvb->hw_frontend);
 		dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
 					      &dvb->mem_frontend);
-		/* fallthrough */
+		fallthrough;
 	case 0x11:
 		dvb_dmxdev_release(&dvb->dmxdev);
-		/* fallthrough */
+		fallthrough;
 	case 0x10:
 		dvb_dmx_release(&dvb->demux);
-		/* fallthrough */
+		fallthrough;
 	case 0x01:
 		break;
 	}
 			osc24 = 0;
 		else
 			osc24 = 1;
-		/* fall-through */
+		fallthrough;
 	case DDB_TUNER_DVBCT2_SONY_P:
 	case DDB_TUNER_DVBC2T2_SONY_P:
 	case DDB_TUNER_ISDBT_SONY_P:
 		break;
 	case DDB_TUNER_DVBC2T2I_SONY:
 		osc24 = 1;
-		/* fall-through */
+		fallthrough;
 	case DDB_TUNER_DVBCT2_SONY:
 	case DDB_TUNER_DVBC2T2_SONY:
 	case DDB_TUNER_ISDBT_SONY:
 		ret = ddb_ci_attach(port, ci_bitrate);
 		if (ret < 0)
 			break;
-		/* fall-through */
+		fallthrough;
 	case DDB_PORT_LOOP:
 		ret = dvb_register_device(port->dvb[0].adap,
 					  &port->dvb[0].dev,
 					ddb_input_init(port, 4 + i, 1, 4 + i);
 					ddb_output_init(port, i);
 					break;
-				} /* fallthrough */
+				}
+				fallthrough;
 			case DDB_OCTOPUS:
 				ddb_input_init(port, 2 * i, 0, 2 * i);
 				ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1);
 	default:
 	case 2:
 		destroy_workqueue(ddb_wq);
-		/* fall-through */
+		fallthrough;
 	case 1:
 		ddb_class_destroy();
 		break;

drivers/media/pci/meye/meye.c+1−1

@@ -952,7 +952,7 @@ static int meyeioc_sync(struct file file, void fh, int *i) · 951 unmodified lines
952	mutex_unlock(&meye.lock);	952	mutex_unlock(&meye.lock);
953	return -EINTR;	953	return -EINTR;
954	}	954	}
955	/* fall through */	955	fallthrough;
956	case MEYE_BUF_DONE:	956	case MEYE_BUF_DONE:
957	meye.grab_buffer[*i].state = MEYE_BUF_UNUSED;	957	meye.grab_buffer[*i].state = MEYE_BUF_UNUSED;
958	if (kfifo_out_locked(&meye.doneq, (unsigned char *)&unused,	958	if (kfifo_out_locked(&meye.doneq, (unsigned char *)&unused,

drivers/media/pci/ttpci/av7110.c+2−2

@@ -637,7 +637,7 @@ static void gpioirq(unsigned long cookie) · 636 unmodified lines
637	iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);	637	iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
638	break;	638	break;
639	}	639	}
640	/* fall through */	640	fallthrough;
641		641
642	case DATA_TS_RECORD:	642	case DATA_TS_RECORD:
643	case DATA_PES_RECORD:	643	case DATA_PES_RECORD:
@@ -2176,7 +2176,7 @@ static int frontend_init(struct av7110 *av7110) · 1532 unmodified lines
2176	break;	2176	break;
2177	}	2177	}
2178	}	2178	}
2179	/* fall-thru */	2179	fallthrough;
2180		2180
2181	case 0x0008: // Hauppauge/TT DVB-T	2181	case 0x0008: // Hauppauge/TT DVB-T
2182	// Grundig 29504-401	2182	// Grundig 29504-401

drivers/media/pci/ttpci/av7110_hw.c+1−1

@@ -1107,7 +1107,7 @@ int av7110_osd_cmd(struct av7110 av7110, osd_cmd_t dc) · 1106 unmodified lines
1107	break;	1107	break;
1108	case OSD_SetRow:	1108	case OSD_SetRow:
1109	dc->y1 = dc->y0;	1109	dc->y1 = dc->y0;
1110	/* fall through */	1110	fallthrough;
1111	case OSD_SetBlock:	1111	case OSD_SetBlock:
1112	ret = OSDSetBlock(av7110, dc->x0, dc->y0, dc->x1, dc->y1, dc->color, dc->data);	1112	ret = OSDSetBlock(av7110, dc->x0, dc->y0, dc->x1, dc->y1, dc->color, dc->data);
1113	break;	1113	break;

drivers/media/pci/ttpci/av7110_ipack.c+1−1

@@ -182,7 +182,7 @@ int av7110_ipack_instant_repack (const u8 buf, int count, struct ipack p) · 181 unmodified lines
182	case DSM_CC_STREAM :	182	case DSM_CC_STREAM :
183	case ISO13522_STREAM:	183	case ISO13522_STREAM:
184	p->done = 1;	184	p->done = 1;
185	/* fall through */	185	fallthrough;
186	case PRIVATE_STREAM1:	186	case PRIVATE_STREAM1:
187	case VIDEO_STREAM_S ... VIDEO_STREAM_E:	187	case VIDEO_STREAM_S ... VIDEO_STREAM_E:
188	case AUDIO_STREAM_S ... AUDIO_STREAM_E:	188	case AUDIO_STREAM_S ... AUDIO_STREAM_E:

drivers/media/pci/ttpci/budget-av.c+1−1

@@ -1226,7 +1226,7 @@ static void frontend_init(struct budget_av *budget_av) · 1225 unmodified lines
1226	* but so far it has been only confirmed for this type	1226	* but so far it has been only confirmed for this type
1227	*/	1227	*/
1228	budget_av->reinitialise_demod = 1;	1228	budget_av->reinitialise_demod = 1;
1229	/* fall through */	1229	fallthrough;
1230	case SUBID_DVBS_KNC1_PLUS:	1230	case SUBID_DVBS_KNC1_PLUS:
1231	case SUBID_DVBS_EASYWATCH_1:	1231	case SUBID_DVBS_EASYWATCH_1:
1232	if (saa->pci->subsystem_vendor == 0x1894) {	1232	if (saa->pci->subsystem_vendor == 0x1894) {

drivers/media/pci/ttpci/budget.c+2−2

@@ -613,7 +613,7 @@ static void frontend_init(struct budget *budget) · 612 unmodified lines
613	break;	613	break;
614	}	614	}
615	}	615	}
616	/* fall through */	616	fallthrough;
617	case 0x1018: // TT Budget-S-1401 (philips tda10086/philips tda8262)	617	case 0x1018: // TT Budget-S-1401 (philips tda10086/philips tda8262)
618	{	618	{
619	struct dvb_frontend *fe;	619	struct dvb_frontend *fe;
@@ -638,7 +638,7 @@ static void frontend_init(struct budget *budget) · 18 unmodified lines
638	break;	638	break;
639	}	639	}
640	}	640	}
641	/* fall through */	641	fallthrough;
642		642
643	case 0x101c: { /* TT S2-1600 */	643	case 0x101c: { /* TT S2-1600 */
644	const struct stv6110x_devctl *ctl;	644	const struct stv6110x_devctl *ctl;

drivers/media/platform/sh_vou.c+2−2

@@ -220,7 +220,7 @@ static void sh_vou_stream_config(struct sh_vou_device *vou_dev) · 219 unmodified lines
220	break;	220	break;
221	case V4L2_PIX_FMT_RGB565:	221	case V4L2_PIX_FMT_RGB565:
222	dataswap ^= 1;	222	dataswap ^= 1;
223	/* fall through */	223	fallthrough;
224	case V4L2_PIX_FMT_RGB565X:	224	case V4L2_PIX_FMT_RGB565X:
225	row_coeff = 2;	225	row_coeff = 2;
226	break;	226	break;
@@ -802,7 +802,7 @@ static u32 sh_vou_ntsc_mode(enum sh_vou_bus_fmt bus_fmt) · 575 unmodified lines
802	default:	802	default:
803	pr_warn("%s(): Invalid bus-format code %d, using default 8-bit\n",	803	pr_warn("%s(): Invalid bus-format code %d, using default 8-bit\n",
804	__func__, bus_fmt);	804	__func__, bus_fmt);
805	/* fall through */	805	fallthrough;
806	case SH_VOU_BUS_8BIT:	806	case SH_VOU_BUS_8BIT:
807	return 1;	807	return 1;
808	case SH_VOU_BUS_16BIT:	808	case SH_VOU_BUS_16BIT:

drivers/media/platform/ti-vpe/cal.h+1−1

@@ -226,7 +226,7 @@ static inline void cal_write_field(struct cal_dev *cal, u32 offset, u32 value, · 225 unmodified lines
226	u32 val = cal_read(cal, offset);	226	u32 val = cal_read(cal, offset);
227		227
228	val &= ~mask;	228	val &= ~mask;
229	val \|= FIELD_PREP(mask, value);	229	val \|= (value << __ffs(mask)) & mask;
230	cal_write(cal, offset, val);	230	cal_write(cal, offset, val);
231	}	231	}
232		232

drivers/media/radio/radio-si476x.c+2−1

 si476x_phase_diversity_mode_to_idx(enum si476x_phase_diversity_mode mode)
 {
 	switch (mode) {
-	default:		/* FALLTHROUGH */
+	default:
+		fallthrough;
 	case SI476X_PHDIV_DISABLED:
 		return SI476X_IDX_PHDIV_DISABLED;
 	case SI476X_PHDIV_PRIMARY_COMBINING:

drivers/media/radio/tea575x.c+1−1

@@ -249,7 +249,7 @@ int snd_tea575x_enum_freq_bands(struct snd_tea575x *tea, · 248 unmodified lines
249	index = BAND_AM;	249	index = BAND_AM;
250	break;	250	break;
251	}	251	}
252	/* Fall through */	252	fallthrough;
253	default:	253	default:
254	return -EINVAL;	254	return -EINVAL;
255	}	255	}

drivers/media/rc/bpf-lirc.c+1−1

@@ -112,7 +112,7 @@ lirc_mode2_func_proto(enum bpf_func_id func_id, const struct bpf_prog *prog) · 111 unmodified lines
112	case BPF_FUNC_trace_printk:	112	case BPF_FUNC_trace_printk:
113	if (perfmon_capable())	113	if (perfmon_capable())
114	return bpf_get_trace_printk_proto();	114	return bpf_get_trace_printk_proto();
115	/* fall through */	115	fallthrough;
116	default:	116	default:
117	return NULL;	117	return NULL;
118	}	118	}

drivers/media/rc/gpio-ir-tx.c+5−11

 	struct gpio_desc *gpio;
 	unsigned int carrier;
 	unsigned int duty_cycle;
-	/* we need a spinlock to hold the cpu while transmitting */
-	spinlock_t lock;
 };
 static const struct of_device_id gpio_ir_tx_of_match[] = {
 static void gpio_ir_tx_unmodulated(struct gpio_ir *gpio_ir, uint *txbuf,
 				   uint count)
 {
-	unsigned long flags;
 	ktime_t edge;
 	s32 delta;
 	int i;
-	spin_lock_irqsave(&gpio_ir->lock, flags);
+	local_irq_disable();
 	edge = ktime_get();
 	}
 	gpiod_set_value(gpio_ir->gpio, 0);
-	spin_unlock_irqrestore(&gpio_ir->lock, flags);
 }
 static void gpio_ir_tx_modulated(struct gpio_ir *gpio_ir, uint *txbuf,
 				 uint count)
 {
-	unsigned long flags;
 	ktime_t edge;
 	/*
 	 * delta should never exceed 0.5 seconds (IR_MAX_DURATION) and on
 	space = DIV_ROUND_CLOSEST((100 - gpio_ir->duty_cycle) *
 				  (NSEC_PER_SEC / 100), gpio_ir->carrier);
-	spin_lock_irqsave(&gpio_ir->lock, flags);
+	local_irq_disable();
 	edge = ktime_get();
 			edge = last;
 		}
 	}
-	spin_unlock_irqrestore(&gpio_ir->lock, flags);
 }
 static int gpio_ir_tx(struct rc_dev *dev, unsigned int *txbuf,
 		      unsigned int count)
 {
 	struct gpio_ir *gpio_ir = dev->priv;
+	unsigned long flags;
+	local_irq_save(flags);
 	if (gpio_ir->carrier)
 		gpio_ir_tx_modulated(gpio_ir, txbuf, count);
 	else
 		gpio_ir_tx_unmodulated(gpio_ir, txbuf, count);
+	local_irq_restore(flags);
 	return count;
 }
 	gpio_ir->carrier = 38000;
 	gpio_ir->duty_cycle = 50;
-	spin_lock_init(&gpio_ir->lock);
 	rc = devm_rc_register_device(&pdev->dev, rcdev);
 	if (rc < 0)

drivers/media/rc/ir-rc6-decoder.c+1−1

@@ -64,7 +64,7 @@ static enum rc6_mode rc6_mode(struct rc6_dec *data) · 63 unmodified lines
64	case 6:	64	case 6:
65	if (!data->toggle)	65	if (!data->toggle)
66	return RC6_MODE_6A;	66	return RC6_MODE_6A;
67	/* fall through */	67	fallthrough;
68	default:	68	default:
69	return RC6_MODE_UNKNOWN;	69	return RC6_MODE_UNKNOWN;
70	}	70	}

drivers/media/rc/ir-sony-decoder.c+1−1

@@ -102,7 +102,7 @@ static int ir_sony_decode(struct rc_dev *dev, struct ir_raw_event ev) · 101 unmodified lines
102	}	102	}
103		103
104	data->state = STATE_FINISHED;	104	data->state = STATE_FINISHED;
105	/* Fall through */	105	fallthrough;
106		106
107	case STATE_FINISHED:	107	case STATE_FINISHED:
108	if (ev.pulse)	108	if (ev.pulse)

drivers/media/rc/mceusb.c+1−1

@@ -1726,7 +1726,7 @@ static int mceusb_dev_probe(struct usb_interface *intf, · 1725 unmodified lines
1726	goto mem_alloc_fail;	1726	goto mem_alloc_fail;
1727		1727
1728	ir->pipe_in = pipe;	1728	ir->pipe_in = pipe;
1729	ir->buf_in = usb_alloc_coherent(dev, maxp, GFP_ATOMIC, &ir->dma_in);	1729	ir->buf_in = usb_alloc_coherent(dev, maxp, GFP_KERNEL, &ir->dma_in);
1730	if (!ir->buf_in)	1730	if (!ir->buf_in)
1731	goto buf_in_alloc_fail;	1731	goto buf_in_alloc_fail;
1732		1732

drivers/media/rc/rc-main.c+28−16

 	}
 	mutex_lock(&dev->lock);
+	if (!dev->registered) {
+		mutex_unlock(&dev->lock);
+		return -ENODEV;
+	}
 	old_protocols = *current_protocols;
 	new_protocols = old_protocols;
 		return -EINVAL;
 	mutex_lock(&dev->lock);
+	if (!dev->registered) {
+		mutex_unlock(&dev->lock);
+		return -ENODEV;
+	}
 	new_filter = *filter;
 	if (fattr->mask)
 	int i;
 	mutex_lock(&dev->lock);
+	if (!dev->registered) {
+		mutex_unlock(&dev->lock);
+		return -ENODEV;
+	}
 	allowed = dev->allowed_wakeup_protocols;
 	kfree(dev);
 }
-#define ADD_HOTPLUG_VAR(fmt, val...)					\
-	do {								\
-		int err = add_uevent_var(env, fmt, val);		\
-		if (err)						\
-			return err;					\
-	} while (0)
 static int rc_dev_uevent(struct device *device, struct kobj_uevent_env *env)
 {
 	struct rc_dev *dev = to_rc_dev(device);
+	int ret = 0;
-	if (dev->rc_map.name)
+	mutex_lock(&dev->lock);
-		ADD_HOTPLUG_VAR("NAME=%s", dev->rc_map.name);
-	if (dev->driver_name)
-		ADD_HOTPLUG_VAR("DRV_NAME=%s", dev->driver_name);
-	if (dev->device_name)
-		ADD_HOTPLUG_VAR("DEV_NAME=%s", dev->device_name);
-	return 0;
+	if (!dev->registered)
+		ret = -ENODEV;
+	if (ret == 0 && dev->rc_map.name)
+		ret = add_uevent_var(env, "NAME=%s", dev->rc_map.name);
+	if (ret == 0 && dev->driver_name)
+		ret = add_uevent_var(env, "DRV_NAME=%s", dev->driver_name);
+	if (ret == 0 && dev->device_name)
+		ret = add_uevent_var(env, "DEV_NAME=%s", dev->device_name);
+	mutex_unlock(&dev->lock);
+	return ret;
 }
 /*
 	del_timer_sync(&dev->timer_keyup);
 	del_timer_sync(&dev->timer_repeat);
-	rc_free_rx_device(dev);
 	mutex_lock(&dev->lock);
 	if (dev->users && dev->close)
 		dev->close(dev);
 	dev->registered = false;
 	mutex_unlock(&dev->lock);
+	rc_free_rx_device(dev);
 	/*
 	 * lirc device should be freed with dev->registered = false, so
 	 * that userspace polling will get notified.

drivers/media/test-drivers/vicodec/vicodec-core.c+1−0

@@ -1994,6 +1994,7 @@ static int vicodec_request_validate(struct media_request *req) · 1993 unmodified lines
1994	}	1994	}
1995	ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl,	1995	ctrl = v4l2_ctrl_request_hdl_ctrl_find(hdl,
1996	vicodec_ctrl_stateless_state.id);	1996	vicodec_ctrl_stateless_state.id);
		1997	v4l2_ctrl_request_hdl_put(hdl);
1997	if (!ctrl) {	1998	if (!ctrl) {
1998	v4l2_info(&ctx->dev->v4l2_dev,	1999	v4l2_info(&ctx->dev->v4l2_dev,
1999	"Missing required codec control\n");	2000	"Missing required codec control\n");

drivers/media/tuners/xc5000.c+1−1

@@ -756,7 +756,7 @@ static int xc5000_set_digital_params(struct dvb_frontend *fe) · 755 unmodified lines
756	if (!bw)	756	if (!bw)
757	bw = 6000000;	757	bw = 6000000;
758	/* fall to OFDM handling */	758	/* fall to OFDM handling */
759	/* fall through */	759	fallthrough;
760	case SYS_DMBTH:	760	case SYS_DMBTH:
761	case SYS_DVBT:	761	case SYS_DVBT:
762	case SYS_DVBT2:	762	case SYS_DVBT2:

drivers/media/usb/b2c2/flexcop-usb.c+1−1

@@ -525,7 +525,7 @@ static int flexcop_usb_init(struct flexcop_usb *fc_usb) · 524 unmodified lines
525	case USB_SPEED_HIGH:	525	case USB_SPEED_HIGH:
526	info("running at HIGH speed.");	526	info("running at HIGH speed.");
527	break;	527	break;
528	case USB_SPEED_UNKNOWN: /* fall through */	528	case USB_SPEED_UNKNOWN:
529	default:	529	default:
530	err("cannot handle USB speed because it is unknown.");	530	err("cannot handle USB speed because it is unknown.");
531	return -ENODEV;	531	return -ENODEV;

drivers/media/usb/cpia2/cpia2_core.c+18−18

@@ -165,7 +165,7 @@ int cpia2_do_command(struct camera_data *cam, · 164 unmodified lines
165	break;	165	break;
166	case CPIA2_CMD_SET_VP_BRIGHTNESS:	166	case CPIA2_CMD_SET_VP_BRIGHTNESS:
167	cmd.buffer.block_data[0] = param;	167	cmd.buffer.block_data[0] = param;
168	/* fall through */	168	fallthrough;
169	case CPIA2_CMD_GET_VP_BRIGHTNESS:	169	case CPIA2_CMD_GET_VP_BRIGHTNESS:
170	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	170	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
171	cmd.reg_count = 1;	171	cmd.reg_count = 1;
@@ -176,7 +176,7 @@ int cpia2_do_command(struct camera_data *cam, · 4 unmodified lines
176	break;	176	break;
177	case CPIA2_CMD_SET_CONTRAST:	177	case CPIA2_CMD_SET_CONTRAST:
178	cmd.buffer.block_data[0] = param;	178	cmd.buffer.block_data[0] = param;
179	/* fall through */	179	fallthrough;
180	case CPIA2_CMD_GET_CONTRAST:	180	case CPIA2_CMD_GET_CONTRAST:
181	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	181	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
182	cmd.reg_count = 1;	182	cmd.reg_count = 1;
@@ -184,7 +184,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
184	break;	184	break;
185	case CPIA2_CMD_SET_VP_SATURATION:	185	case CPIA2_CMD_SET_VP_SATURATION:
186	cmd.buffer.block_data[0] = param;	186	cmd.buffer.block_data[0] = param;
187	/* fall through */	187	fallthrough;
188	case CPIA2_CMD_GET_VP_SATURATION:	188	case CPIA2_CMD_GET_VP_SATURATION:
189	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	189	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
190	cmd.reg_count = 1;	190	cmd.reg_count = 1;
@@ -195,7 +195,7 @@ int cpia2_do_command(struct camera_data *cam, · 4 unmodified lines
195	break;	195	break;
196	case CPIA2_CMD_SET_VP_GPIO_DATA:	196	case CPIA2_CMD_SET_VP_GPIO_DATA:
197	cmd.buffer.block_data[0] = param;	197	cmd.buffer.block_data[0] = param;
198	/* fall through */	198	fallthrough;
199	case CPIA2_CMD_GET_VP_GPIO_DATA:	199	case CPIA2_CMD_GET_VP_GPIO_DATA:
200	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	200	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
201	cmd.reg_count = 1;	201	cmd.reg_count = 1;
@@ -203,7 +203,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
203	break;	203	break;
204	case CPIA2_CMD_SET_VP_GPIO_DIRECTION:	204	case CPIA2_CMD_SET_VP_GPIO_DIRECTION:
205	cmd.buffer.block_data[0] = param;	205	cmd.buffer.block_data[0] = param;
206	/* fall through */	206	fallthrough;
207	case CPIA2_CMD_GET_VP_GPIO_DIRECTION:	207	case CPIA2_CMD_GET_VP_GPIO_DIRECTION:
208	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	208	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
209	cmd.reg_count = 1;	209	cmd.reg_count = 1;
@@ -211,7 +211,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
211	break;	211	break;
212	case CPIA2_CMD_SET_VC_MP_GPIO_DATA:	212	case CPIA2_CMD_SET_VC_MP_GPIO_DATA:
213	cmd.buffer.block_data[0] = param;	213	cmd.buffer.block_data[0] = param;
214	/* fall through */	214	fallthrough;
215	case CPIA2_CMD_GET_VC_MP_GPIO_DATA:	215	case CPIA2_CMD_GET_VC_MP_GPIO_DATA:
216	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;	216	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
217	cmd.reg_count = 1;	217	cmd.reg_count = 1;
@@ -219,7 +219,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
219	break;	219	break;
220	case CPIA2_CMD_SET_VC_MP_GPIO_DIRECTION:	220	case CPIA2_CMD_SET_VC_MP_GPIO_DIRECTION:
221	cmd.buffer.block_data[0] = param;	221	cmd.buffer.block_data[0] = param;
222	/fall through /	222	fallthrough;
223	case CPIA2_CMD_GET_VC_MP_GPIO_DIRECTION:	223	case CPIA2_CMD_GET_VC_MP_GPIO_DIRECTION:
224	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;	224	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
225	cmd.reg_count = 1;	225	cmd.reg_count = 1;
@@ -234,7 +234,7 @@ int cpia2_do_command(struct camera_data *cam, · 8 unmodified lines
234	break;	234	break;
235	case CPIA2_CMD_SET_FLICKER_MODES:	235	case CPIA2_CMD_SET_FLICKER_MODES:
236	cmd.buffer.block_data[0] = param;	236	cmd.buffer.block_data[0] = param;
237	/* fall through */	237	fallthrough;
238	case CPIA2_CMD_GET_FLICKER_MODES:	238	case CPIA2_CMD_GET_FLICKER_MODES:
239	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	239	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
240	cmd.reg_count = 1;	240	cmd.reg_count = 1;
@@ -281,7 +281,7 @@ int cpia2_do_command(struct camera_data *cam, · 40 unmodified lines
281	break;	281	break;
282	case CPIA2_CMD_SET_USER_MODE:	282	case CPIA2_CMD_SET_USER_MODE:
283	cmd.buffer.block_data[0] = param;	283	cmd.buffer.block_data[0] = param;
284	/* fall through */	284	fallthrough;
285	case CPIA2_CMD_GET_USER_MODE:	285	case CPIA2_CMD_GET_USER_MODE:
286	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	286	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
287	cmd.reg_count = 1;	287	cmd.reg_count = 1;
@@ -301,7 +301,7 @@ int cpia2_do_command(struct camera_data *cam, · 13 unmodified lines
301	break;	301	break;
302	case CPIA2_CMD_SET_WAKEUP:	302	case CPIA2_CMD_SET_WAKEUP:
303	cmd.buffer.block_data[0] = param;	303	cmd.buffer.block_data[0] = param;
304	/* fall through */	304	fallthrough;
305	case CPIA2_CMD_GET_WAKEUP:	305	case CPIA2_CMD_GET_WAKEUP:
306	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;	306	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
307	cmd.reg_count = 1;	307	cmd.reg_count = 1;
@@ -309,7 +309,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
309	break;	309	break;
310	case CPIA2_CMD_SET_PW_CONTROL:	310	case CPIA2_CMD_SET_PW_CONTROL:
311	cmd.buffer.block_data[0] = param;	311	cmd.buffer.block_data[0] = param;
312	/* fall through */	312	fallthrough;
313	case CPIA2_CMD_GET_PW_CONTROL:	313	case CPIA2_CMD_GET_PW_CONTROL:
314	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;	314	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
315	cmd.reg_count = 1;	315	cmd.reg_count = 1;
@@ -322,7 +322,7 @@ int cpia2_do_command(struct camera_data *cam, · 6 unmodified lines
322	break;	322	break;
323	case CPIA2_CMD_SET_SYSTEM_CTRL:	323	case CPIA2_CMD_SET_SYSTEM_CTRL:
324	cmd.buffer.block_data[0] = param;	324	cmd.buffer.block_data[0] = param;
325	/* fall through */	325	fallthrough;
326	case CPIA2_CMD_GET_SYSTEM_CTRL:	326	case CPIA2_CMD_GET_SYSTEM_CTRL:
327	cmd.req_mode =	327	cmd.req_mode =
328	CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_SYSTEM;	328	CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_SYSTEM;
@@ -331,7 +331,7 @@ int cpia2_do_command(struct camera_data *cam, · 2 unmodified lines
331	break;	331	break;
332	case CPIA2_CMD_SET_VP_SYSTEM_CTRL:	332	case CPIA2_CMD_SET_VP_SYSTEM_CTRL:
333	cmd.buffer.block_data[0] = param;	333	cmd.buffer.block_data[0] = param;
334	/* fall through */	334	fallthrough;
335	case CPIA2_CMD_GET_VP_SYSTEM_CTRL:	335	case CPIA2_CMD_GET_VP_SYSTEM_CTRL:
336	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	336	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
337	cmd.reg_count = 1;	337	cmd.reg_count = 1;
@@ -339,7 +339,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
339	break;	339	break;
340	case CPIA2_CMD_SET_VP_EXP_MODES:	340	case CPIA2_CMD_SET_VP_EXP_MODES:
341	cmd.buffer.block_data[0] = param;	341	cmd.buffer.block_data[0] = param;
342	/* fall through */	342	fallthrough;
343	case CPIA2_CMD_GET_VP_EXP_MODES:	343	case CPIA2_CMD_GET_VP_EXP_MODES:
344	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	344	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
345	cmd.reg_count = 1;	345	cmd.reg_count = 1;
@@ -347,7 +347,7 @@ int cpia2_do_command(struct camera_data *cam, · 1 unmodified line
347	break;	347	break;
348	case CPIA2_CMD_SET_DEVICE_CONFIG:	348	case CPIA2_CMD_SET_DEVICE_CONFIG:
349	cmd.buffer.block_data[0] = param;	349	cmd.buffer.block_data[0] = param;
350	/* fall through */	350	fallthrough;
351	case CPIA2_CMD_GET_DEVICE_CONFIG:	351	case CPIA2_CMD_GET_DEVICE_CONFIG:
352	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	352	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
353	cmd.reg_count = 1;	353	cmd.reg_count = 1;
@@ -368,7 +368,7 @@ int cpia2_do_command(struct camera_data *cam, · 14 unmodified lines
368	break;	368	break;
369	case CPIA2_CMD_SET_VC_CONTROL:	369	case CPIA2_CMD_SET_VC_CONTROL:
370	cmd.buffer.block_data[0] = param;	370	cmd.buffer.block_data[0] = param;
371	/* fall through */	371	fallthrough;
372	case CPIA2_CMD_GET_VC_CONTROL:	372	case CPIA2_CMD_GET_VC_CONTROL:
373	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;	373	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VC;
374	cmd.reg_count = 1;	374	cmd.reg_count = 1;
@@ -403,7 +403,7 @@ int cpia2_do_command(struct camera_data *cam, · 28 unmodified lines
403	this register can also affect	403	this register can also affect
404	flicker modes */	404	flicker modes */
405	cmd.buffer.block_data[0] = param;	405	cmd.buffer.block_data[0] = param;
406	/* fall through */	406	fallthrough;
407	case CPIA2_CMD_GET_USER_EFFECTS:	407	case CPIA2_CMD_GET_USER_EFFECTS:
408	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;	408	cmd.req_mode = CAMERAACCESS_TYPE_BLOCK \| CAMERAACCESS_VP;
409	cmd.reg_count = 1;	409	cmd.reg_count = 1;
@@ -1751,7 +1751,7 @@ int cpia2_set_fps(struct camera_data *cam, int framerate) · 1341 unmodified lines
1751	CPIA2_VP_SENSOR_FLAGS_500) {	1751	CPIA2_VP_SENSOR_FLAGS_500) {
1752	return -EINVAL;	1752	return -EINVAL;
1753	}	1753	}
1754	/* Fall through */	1754	fallthrough;
1755	case CPIA2_VP_FRAMERATE_15:	1755	case CPIA2_VP_FRAMERATE_15:
1756	case CPIA2_VP_FRAMERATE_12_5:	1756	case CPIA2_VP_FRAMERATE_12_5:
1757	case CPIA2_VP_FRAMERATE_7_5:	1757	case CPIA2_VP_FRAMERATE_7_5:

drivers/media/usb/cx231xx/cx231xx-video.c+1−1

@@ -996,7 +996,7 @@ void cx231xx_v4l2_create_entities(struct cx231xx *dev) · 995 unmodified lines
996	/* The DVB core will handle it */	996	/* The DVB core will handle it */
997	if (dev->tuner_type == TUNER_ABSENT)	997	if (dev->tuner_type == TUNER_ABSENT)
998	continue;	998	continue;
999	/* fall through */	999	fallthrough;
1000	default: /* just to shut up a gcc warning */	1000	default: /* just to shut up a gcc warning */
1001	ent->function = MEDIA_ENT_F_CONN_RF;	1001	ent->function = MEDIA_ENT_F_CONN_RF;
1002	break;	1002	break;

drivers/media/usb/dvb-usb/dib0700_devices.c+6−6

@@ -1659,14 +1659,14 @@ static int dib8096_set_param_override(struct dvb_frontend *fe) · 1658 unmodified lines
1659		1659
1660	switch (band) {	1660	switch (band) {
1661	default:	1661	default:
1662	deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);	1662	deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
1663	/* fall through */	1663	fallthrough;
1664	case BAND_VHF:	1664	case BAND_VHF:
1665	state->dib8000_ops.set_gpio(fe, 3, 0, 1);	1665	state->dib8000_ops.set_gpio(fe, 3, 0, 1);
1666	break;	1666	break;
1667	case BAND_UHF:	1667	case BAND_UHF:
1668	state->dib8000_ops.set_gpio(fe, 3, 0, 0);	1668	state->dib8000_ops.set_gpio(fe, 3, 0, 0);
1669	break;	1669	break;
1670	}	1670	}
1671		1671
1672	ret = state->set_param_save(fe);	1672	ret = state->set_param_save(fe);

drivers/media/usb/dvb-usb/dw2102.c+3−3

@@ -1886,12 +1886,12 @@ static int dw2102_load_firmware(struct usb_device *dev, · 1885 unmodified lines
1886	switch (le16_to_cpu(dev->descriptor.idProduct)) {	1886	switch (le16_to_cpu(dev->descriptor.idProduct)) {
1887	case USB_PID_TEVII_S650:	1887	case USB_PID_TEVII_S650:
1888	dw2104_properties.rc.core.rc_codes = RC_MAP_TEVII_NEC;	1888	dw2104_properties.rc.core.rc_codes = RC_MAP_TEVII_NEC;
1889	/* fall through */	1889	fallthrough;
1890	case USB_PID_DW2104:	1890	case USB_PID_DW2104:
1891	reset = 1;	1891	reset = 1;
1892	dw210x_op_rw(dev, 0xc4, 0x0000, 0, &reset, 1,	1892	dw210x_op_rw(dev, 0xc4, 0x0000, 0, &reset, 1,
1893	DW210X_WRITE_MSG);	1893	DW210X_WRITE_MSG);
1894	/* fall through */	1894	fallthrough;
1895	case USB_PID_DW3101:	1895	case USB_PID_DW3101:
1896	reset = 0;	1896	reset = 0;
1897	dw210x_op_rw(dev, 0xbf, 0x0040, 0, &reset, 0,	1897	dw210x_op_rw(dev, 0xbf, 0x0040, 0, &reset, 0,
@@ -1924,7 +1924,7 @@ static int dw2102_load_firmware(struct usb_device *dev, · 26 unmodified lines
1924	break;	1924	break;
1925	}	1925	}
1926	}	1926	}
1927	/* fall through */	1927	fallthrough;
1928	case 0x2101:	1928	case 0x2101:
1929	dw210x_op_rw(dev, 0xbc, 0x0030, 0, &reset16[0], 2,	1929	dw210x_op_rw(dev, 0xbc, 0x0030, 0, &reset16[0], 2,
1930	DW210X_READ_MSG);	1930	DW210X_READ_MSG);

drivers/media/v4l2-core/v4l2-ctrls.c+1−1

@@ -2200,7 +2200,7 @@ static int check_range(enum v4l2_ctrl_type type, · 2199 unmodified lines
2200	case V4L2_CTRL_TYPE_BOOLEAN:	2200	case V4L2_CTRL_TYPE_BOOLEAN:
2201	if (step != 1 \|\| max > 1 \|\| min < 0)	2201	if (step != 1 \|\| max > 1 \|\| min < 0)
2202	return -ERANGE;	2202	return -ERANGE;
2203	/* fall through */	2203	fallthrough;
2204	case V4L2_CTRL_TYPE_U8:	2204	case V4L2_CTRL_TYPE_U8:
2205	case V4L2_CTRL_TYPE_U16:	2205	case V4L2_CTRL_TYPE_U16:
2206	case V4L2_CTRL_TYPE_U32:	2206	case V4L2_CTRL_TYPE_U32:

drivers/media/v4l2-core/v4l2-ioctl.c+27−25

@@ -782,7 +782,6 @@ static void v4l_print_frmsizeenum(const void *arg, bool write_only) · 781 unmodified lines
782	p->stepwise.step_height);	782	p->stepwise.step_height);
783	break;	783	break;
784	case V4L2_FRMSIZE_TYPE_CONTINUOUS:	784	case V4L2_FRMSIZE_TYPE_CONTINUOUS:
785	/* fall through */
786	default:	785	default:
787	pr_cont("\n");	786	pr_cont("\n");
788	break;	787	break;
@@ -816,7 +815,6 @@ static void v4l_print_frmivalenum(const void *arg, bool write_only) · 27 unmodified lines
816	p->stepwise.step.denominator);	815	p->stepwise.step.denominator);
817	break;	816	break;
818	case V4L2_FRMIVAL_TYPE_CONTINUOUS:	817	case V4L2_FRMIVAL_TYPE_CONTINUOUS:
819	/* fall through */
820	default:	818	default:
821	pr_cont("\n");	819	pr_cont("\n");
822	break;	820	break;
@@ -3189,14 +3187,16 @@ static int video_put_user(void __user arg, void parg, unsigned int cmd) · 2366 unmodified lines
3189	#ifdef CONFIG_COMPAT_32BIT_TIME	3187	#ifdef CONFIG_COMPAT_32BIT_TIME
3190	case VIDIOC_DQEVENT_TIME32: {	3188	case VIDIOC_DQEVENT_TIME32: {
3191	struct v4l2_event *ev = parg;	3189	struct v4l2_event *ev = parg;
3192	struct v4l2_event_time32 ev32 = {	3190	struct v4l2_event_time32 ev32;
3193	.type = ev->type,	3191
3194	.pending = ev->pending,	3192	memset(&ev32, 0, sizeof(ev32));
3195	.sequence = ev->sequence,	3193
3196	.timestamp.tv_sec = ev->timestamp.tv_sec,	3194	ev32.type = ev->type;
3197	.timestamp.tv_nsec = ev->timestamp.tv_nsec,	3195	ev32.pending = ev->pending;
3198	.id = ev->id,	3196	ev32.sequence = ev->sequence;
3199	};	3197	ev32.timestamp.tv_sec = ev->timestamp.tv_sec;
		3198	ev32.timestamp.tv_nsec = ev->timestamp.tv_nsec;
		3199	ev32.id = ev->id;
3200		3200
3201	memcpy(&ev32.u, &ev->u, sizeof(ev->u));	3201	memcpy(&ev32.u, &ev->u, sizeof(ev->u));
3202	memcpy(&ev32.reserved, &ev->reserved, sizeof(ev->reserved));	3202	memcpy(&ev32.reserved, &ev->reserved, sizeof(ev->reserved));
@@ -3210,21 +3210,23 @@ static int video_put_user(void __user arg, void parg, unsigned int cmd) · 7 unmodified lines
3210	case VIDIOC_DQBUF_TIME32:	3210	case VIDIOC_DQBUF_TIME32:
3211	case VIDIOC_PREPARE_BUF_TIME32: {	3211	case VIDIOC_PREPARE_BUF_TIME32: {
3212	struct v4l2_buffer *vb = parg;	3212	struct v4l2_buffer *vb = parg;
3213	struct v4l2_buffer_time32 vb32 = {	3213	struct v4l2_buffer_time32 vb32;
3214	.index = vb->index,	3214
3215	.type = vb->type,	3215	memset(&vb32, 0, sizeof(vb32));
3216	.bytesused = vb->bytesused,	3216
3217	.flags = vb->flags,	3217	vb32.index = vb->index;
3218	.field = vb->field,	3218	vb32.type = vb->type;
3219	.timestamp.tv_sec = vb->timestamp.tv_sec,	3219	vb32.bytesused = vb->bytesused;
3220	.timestamp.tv_usec = vb->timestamp.tv_usec,	3220	vb32.flags = vb->flags;
3221	.timecode = vb->timecode,	3221	vb32.field = vb->field;
3222	.sequence = vb->sequence,	3222	vb32.timestamp.tv_sec = vb->timestamp.tv_sec;
3223	.memory = vb->memory,	3223	vb32.timestamp.tv_usec = vb->timestamp.tv_usec;
3224	.m.userptr = vb->m.userptr,	3224	vb32.timecode = vb->timecode;
3225	.length = vb->length,	3225	vb32.sequence = vb->sequence;
3226	.request_fd = vb->request_fd,	3226	vb32.memory = vb->memory;
3227	};	3227	vb32.m.userptr = vb->m.userptr;
		3228	vb32.length = vb->length;
		3229	vb32.request_fd = vb->request_fd;
3228		3230
3229	if (copy_to_user(arg, &vb32, sizeof(vb32)))	3231	if (copy_to_user(arg, &vb32, sizeof(vb32)))
3230	return -EFAULT;	3232	return -EFAULT;

drivers/media/v4l2-core/videobuf-core.c+1−1

@@ -354,7 +354,7 @@ static void videobuf_status(struct videobuf_queue q, struct v4l2_buffer b, · 353 unmodified lines
354	break;	354	break;
355	case VIDEOBUF_ERROR:	355	case VIDEOBUF_ERROR:
356	b->flags \|= V4L2_BUF_FLAG_ERROR;	356	b->flags \|= V4L2_BUF_FLAG_ERROR;
357	/* fall through */	357	fallthrough;
358	case VIDEOBUF_DONE:	358	case VIDEOBUF_DONE:
359	b->flags \|= V4L2_BUF_FLAG_DONE;	359	b->flags \|= V4L2_BUF_FLAG_DONE;
360	break;	360	break;

drivers/memory/omap-gpmc.c+0−1

@@ -313,7 +313,6 @@ static unsigned long gpmc_get_clk_period(int cs, enum gpmc_clk_domain cd) · 312 unmodified lines
313	tick_ps *= div;	313	tick_ps *= div;
314	break;	314	break;
315	case GPMC_CD_FCLK:	315	case GPMC_CD_FCLK:
316	/* FALL-THROUGH */
317	default:	316	default:
318	break;	317	break;
319	}	318	}

drivers/memstick/core/ms_block.c+6−6

@@ -371,7 +371,7 @@ again: · 370 unmodified lines
371	serial mode), then just fall through */	371	serial mode), then just fall through */
372	if (msb_read_int_reg(msb, -1))	372	if (msb_read_int_reg(msb, -1))
373	return 0;	373	return 0;
374	/* fallthrough */	374	fallthrough;
375		375
376	case MSB_RP_RECEIVE_INT_REQ_RESULT:	376	case MSB_RP_RECEIVE_INT_REQ_RESULT:
377	intreg = mrq->data[0];	377	intreg = mrq->data[0];
@@ -403,7 +403,7 @@ again: · 25 unmodified lines
403	case MSB_RP_RECEIVE_STATUS_REG:	403	case MSB_RP_RECEIVE_STATUS_REG:
404	msb->regs.status = (struct ms_status_register )mrq->data;	404	msb->regs.status = (struct ms_status_register )mrq->data;
405	msb->state = MSB_RP_SEND_OOB_READ;	405	msb->state = MSB_RP_SEND_OOB_READ;
406	/* fallthrough */	406	fallthrough;
407		407
408	case MSB_RP_SEND_OOB_READ:	408	case MSB_RP_SEND_OOB_READ:
409	if (!msb_read_regs(msb,	409	if (!msb_read_regs(msb,
@@ -418,7 +418,7 @@ again: · 8 unmodified lines
418	msb->regs.extra_data =	418	msb->regs.extra_data =
419	(struct ms_extra_data_register ) mrq->data;	419	(struct ms_extra_data_register ) mrq->data;
420	msb->state = MSB_RP_SEND_READ_DATA;	420	msb->state = MSB_RP_SEND_READ_DATA;
421	/* fallthrough */	421	fallthrough;
422		422
423	case MSB_RP_SEND_READ_DATA:	423	case MSB_RP_SEND_READ_DATA:
424	/* Skip that state if we only read the oob */	424	/* Skip that state if we only read the oob */
@@ -518,7 +518,7 @@ again: · 93 unmodified lines
518	msb->state = MSB_WB_RECEIVE_INT_REQ;	518	msb->state = MSB_WB_RECEIVE_INT_REQ;
519	if (msb_read_int_reg(msb, -1))	519	if (msb_read_int_reg(msb, -1))
520	return 0;	520	return 0;
521	/* fallthrough */	521	fallthrough;
522		522
523	case MSB_WB_RECEIVE_INT_REQ:	523	case MSB_WB_RECEIVE_INT_REQ:
524	intreg = mrq->data[0];	524	intreg = mrq->data[0];
@@ -549,7 +549,7 @@ again: · 24 unmodified lines
549		549
550	msb->int_polling = false;	550	msb->int_polling = false;
551	msb->state = MSB_WB_SEND_WRITE_DATA;	551	msb->state = MSB_WB_SEND_WRITE_DATA;
552	/* fallthrough */	552	fallthrough;
553		553
554	case MSB_WB_SEND_WRITE_DATA:	554	case MSB_WB_SEND_WRITE_DATA:
555	sg_init_table(sg, ARRAY_SIZE(sg));	555	sg_init_table(sg, ARRAY_SIZE(sg));
@@ -628,7 +628,7 @@ again: · 72 unmodified lines
628	msb->state = MSB_SC_RECEIVE_INT_REQ;	628	msb->state = MSB_SC_RECEIVE_INT_REQ;
629	if (msb_read_int_reg(msb, -1))	629	if (msb_read_int_reg(msb, -1))
630	return 0;	630	return 0;
631	/* fallthrough */	631	fallthrough;
632		632
633	case MSB_SC_RECEIVE_INT_REQ:	633	case MSB_SC_RECEIVE_INT_REQ:
634	intreg = mrq->data[0];	634	intreg = mrq->data[0];

drivers/memstick/host/jmb38x_ms.c+2−2

@@ -255,11 +255,11 @@ static unsigned int jmb38x_ms_write_data(struct jmb38x_ms_host *host, · 254 unmodified lines
255	case 3:	255	case 3:
256	host->io_word[0] \|= buf[off + 2] << 16;	256	host->io_word[0] \|= buf[off + 2] << 16;
257	host->io_pos++;	257	host->io_pos++;
258	/* fall through */	258	fallthrough;
259	case 2:	259	case 2:
260	host->io_word[0] \|= buf[off + 1] << 8;	260	host->io_word[0] \|= buf[off + 1] << 8;
261	host->io_pos++;	261	host->io_pos++;
262	/* fall through */	262	fallthrough;
263	case 1:	263	case 1:
264	host->io_word[0] \|= buf[off];	264	host->io_word[0] \|= buf[off];
265	host->io_pos++;	265	host->io_pos++;

drivers/memstick/host/tifm_ms.c+2−2

@@ -162,11 +162,11 @@ static unsigned int tifm_ms_write_data(struct tifm_ms *host, · 161 unmodified lines
162	case 3:	162	case 3:
163	host->io_word \|= buf[off + 2] << 16;	163	host->io_word \|= buf[off + 2] << 16;
164	host->io_pos++;	164	host->io_pos++;
165	/* fall through */	165	fallthrough;
166	case 2:	166	case 2:
167	host->io_word \|= buf[off + 1] << 8;	167	host->io_word \|= buf[off + 1] << 8;
168	host->io_pos++;	168	host->io_pos++;
169	/* fall through */	169	fallthrough;
170	case 1:	170	case 1:
171	host->io_word \|= buf[off];	171	host->io_word \|= buf[off];
172	host->io_pos++;	172	host->io_pos++;

drivers/message/fusion/mptbase.c+3−3

@@ -642,7 +642,7 @@ mptbase_reply(MPT_ADAPTER ioc, MPT_FRAME_HDR req, MPT_FRAME_HDR *reply) · 641 unmodified lines
642	freereq = 0;	642	freereq = 0;
643	if (event != MPI_EVENT_EVENT_CHANGE)	643	if (event != MPI_EVENT_EVENT_CHANGE)
644	break;	644	break;
645	/* fall through */	645	fallthrough;
646	case MPI_FUNCTION_CONFIG:	646	case MPI_FUNCTION_CONFIG:
647	case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:	647	case MPI_FUNCTION_SAS_IO_UNIT_CONTROL:
648	ioc->mptbase_cmds.status \|= MPT_MGMT_STATUS_COMMAND_GOOD;	648	ioc->mptbase_cmds.status \|= MPT_MGMT_STATUS_COMMAND_GOOD;
@@ -1887,7 +1887,7 @@ mpt_attach(struct pci_dev pdev, const struct pci_device_id id) · 1238 unmodified lines
1887	case MPI_MANUFACTPAGE_DEVICEID_FC939X:	1887	case MPI_MANUFACTPAGE_DEVICEID_FC939X:
1888	case MPI_MANUFACTPAGE_DEVICEID_FC949X:	1888	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
1889	ioc->errata_flag_1064 = 1;	1889	ioc->errata_flag_1064 = 1;
1890	/* fall through */	1890	fallthrough;
1891	case MPI_MANUFACTPAGE_DEVICEID_FC909:	1891	case MPI_MANUFACTPAGE_DEVICEID_FC909:
1892	case MPI_MANUFACTPAGE_DEVICEID_FC929:	1892	case MPI_MANUFACTPAGE_DEVICEID_FC929:
1893	case MPI_MANUFACTPAGE_DEVICEID_FC919:	1893	case MPI_MANUFACTPAGE_DEVICEID_FC919:
@@ -1932,7 +1932,7 @@ mpt_attach(struct pci_dev pdev, const struct pci_device_id id) · 38 unmodified lines
1932	pcixcmd &= 0x8F;	1932	pcixcmd &= 0x8F;
1933	pci_write_config_byte(pdev, 0x6a, pcixcmd);	1933	pci_write_config_byte(pdev, 0x6a, pcixcmd);
1934	}	1934	}
1935	/* fall through */	1935	fallthrough;
1936		1936
1937	case MPI_MANUFACTPAGE_DEVID_1030_53C1035:	1937	case MPI_MANUFACTPAGE_DEVID_1030_53C1035:
1938	ioc->bus_type = SPI;	1938	ioc->bus_type = SPI;

drivers/message/fusion/mptsas.c+1−1

@@ -4326,7 +4326,7 @@ mptsas_hotplug_work(MPT_ADAPTER ioc, struct fw_event_work fw_event, · 4325 unmodified lines
4326	}	4326	}
4327	}	4327	}
4328	mpt_findImVolumes(ioc);	4328	mpt_findImVolumes(ioc);
4329	/* fall through */	4329	fallthrough;
4330		4330
4331	case MPTSAS_ADD_DEVICE:	4331	case MPTSAS_ADD_DEVICE:
4332	memset(&sas_device, 0, sizeof(struct mptsas_devinfo));	4332	memset(&sas_device, 0, sizeof(struct mptsas_devinfo));

drivers/message/fusion/mptscsih.c+2−2

@@ -784,7 +784,7 @@ mptscsih_io_done(MPT_ADAPTER ioc, MPT_FRAME_HDR mf, MPT_FRAME_HDR *mr) · 783 unmodified lines
784	/*	784	/*
785	* Allow non-SAS & non-NEXUS_LOSS to drop into below code	785	* Allow non-SAS & non-NEXUS_LOSS to drop into below code
786	*/	786	*/
787	/* Fall through */	787	fallthrough;
788		788
789	case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */	789	case MPI_IOCSTATUS_SCSI_TASK_TERMINATED: /* 0x0048 */
790	/* Linux handles an unsolicited DID_RESET better	790	/* Linux handles an unsolicited DID_RESET better
@@ -881,7 +881,7 @@ mptscsih_io_done(MPT_ADAPTER ioc, MPT_FRAME_HDR mf, MPT_FRAME_HDR *mr) · 90 unmodified lines
881		881
882	case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */	882	case MPI_IOCSTATUS_SCSI_DATA_OVERRUN: /* 0x0044 */
883	scsi_set_resid(sc, 0);	883	scsi_set_resid(sc, 0);
884	/* Fall through */	884	fallthrough;
885	case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */	885	case MPI_IOCSTATUS_SCSI_RECOVERED_ERROR: /* 0x0040 */
886	case MPI_IOCSTATUS_SUCCESS: /* 0x0000 */	886	case MPI_IOCSTATUS_SUCCESS: /* 0x0000 */
887	sc->result = (DID_OK << 16) \| scsi_status;	887	sc->result = (DID_OK << 16) \| scsi_status;

drivers/mfd/db8500-prcmu.c+2−2

@@ -1515,10 +1515,10 @@ static unsigned long dsiclk_rate(u8 n) · 1514 unmodified lines
1515	switch (divsel) {	1515	switch (divsel) {
1516	case PRCM_DSI_PLLOUT_SEL_PHI_4:	1516	case PRCM_DSI_PLLOUT_SEL_PHI_4:
1517	div *= 2;	1517	div *= 2;
1518	/* Fall through */	1518	fallthrough;
1519	case PRCM_DSI_PLLOUT_SEL_PHI_2:	1519	case PRCM_DSI_PLLOUT_SEL_PHI_2:
1520	div *= 2;	1520	div *= 2;
1521	/* Fall through */	1521	fallthrough;
1522	case PRCM_DSI_PLLOUT_SEL_PHI:	1522	case PRCM_DSI_PLLOUT_SEL_PHI:
1523	return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK),	1523	return pll_rate(PRCM_PLLDSI_FREQ, clock_rate(PRCMU_HDMICLK),
1524	PLL_RAW) / div;	1524	PLL_RAW) / div;

drivers/mfd/iqs62x.c+3−3

@@ -136,7 +136,7 @@ static int iqs62x_dev_init(struct iqs62x_core *iqs62x) · 135 unmodified lines
136	if (val & IQS620_PROX_SETTINGS_4_SAR_EN)	136	if (val & IQS620_PROX_SETTINGS_4_SAR_EN)
137	iqs62x->ui_sel = IQS62X_UI_SAR1;	137	iqs62x->ui_sel = IQS62X_UI_SAR1;
138		138
139	/* fall through */	139	fallthrough;
140		140
141	case IQS621_PROD_NUM:	141	case IQS621_PROD_NUM:
142	ret = regmap_write(iqs62x->regmap, IQS620_GLBL_EVENT_MASK,	142	ret = regmap_write(iqs62x->regmap, IQS620_GLBL_EVENT_MASK,
@@ -470,7 +470,7 @@ static irqreturn_t iqs62x_irq(int irq, void *context) · 327 unmodified lines
470	case IQS62X_EVENT_UI_LO:	470	case IQS62X_EVENT_UI_LO:
471	event_data.ui_data = get_unaligned_le16(&event_map[i]);	471	event_data.ui_data = get_unaligned_le16(&event_map[i]);
472		472
473	/* fall through */	473	fallthrough;
474		474
475	case IQS62X_EVENT_UI_HI:	475	case IQS62X_EVENT_UI_HI:
476	case IQS62X_EVENT_NONE:	476	case IQS62X_EVENT_NONE:
@@ -491,7 +491,7 @@ static irqreturn_t iqs62x_irq(int irq, void *context) · 14 unmodified lines
491	case IQS62X_EVENT_HYST:	491	case IQS62X_EVENT_HYST:
492	event_map[i] <<= iqs62x->dev_desc->hyst_shift;	492	event_map[i] <<= iqs62x->dev_desc->hyst_shift;
493		493
494	/* fall through */	494	fallthrough;
495		495
496	case IQS62X_EVENT_WHEEL:	496	case IQS62X_EVENT_WHEEL:
497	case IQS62X_EVENT_HALL:	497	case IQS62X_EVENT_HALL:

drivers/mfd/mfd-core.c+6−6

 	const __be32 *reg;
 	u64 of_node_addr;
-	/* Skip devices 'disabled' by Device Tree */
-	if (!of_device_is_available(np))
-		return -ENODEV;
 	/* Skip if OF node has previously been allocated to a device */
 	list_for_each_entry(of_entry, &mfd_of_node_list, list)
 		if (of_entry->np == np)
 	if (IS_ENABLED(CONFIG_OF) && parent->of_node && cell->of_compatible) {
 		for_each_child_of_node(parent->of_node, np) {
 			if (of_device_is_compatible(np, cell->of_compatible)) {
+				/* Ignore 'disabled' devices error free */
+				if (!of_device_is_available(np)) {
+					ret = 0;
+					goto fail_alias;
+				}
 				ret = mfd_match_of_node_to_dev(pdev, np, cell);
 				if (ret == -EAGAIN)
 					continue;
 	regulator_bulk_unregister_supply_alias(dev, cell->parent_supplies,
 					       cell->num_parent_supplies);
-	kfree(cell);
 	platform_device_unregister(pdev);
 	return 0;
 }

drivers/mfd/mxs-lradc.c+1−1

@@ -172,7 +172,7 @@ static int mxs_lradc_probe(struct platform_device *pdev) · 171 unmodified lines
172	MXS_LRADC_TOUCHSCREEN_5WIRE;	172	MXS_LRADC_TOUCHSCREEN_5WIRE;
173	break;	173	break;
174	}	174	}
175	/* fall through - to an error message for i.MX23 */	175	fallthrough; /* to an error message for i.MX23 */
176	default:	176	default:
177	dev_err(&pdev->dev,	177	dev_err(&pdev->dev,
178	"Unsupported number of touchscreen wires (%d)\n"	178	"Unsupported number of touchscreen wires (%d)\n"

drivers/mfd/omap-usb-host.c+2−2

@@ -308,7 +308,7 @@ static int usbhs_runtime_resume(struct device *dev) · 307 unmodified lines
308	i, r);	308	i, r);
309	}	309	}
310	}	310	}
311	/* Fall through - as HSIC mode needs utmi_clk */	311	fallthrough; /* as HSIC mode needs utmi_clk */
312		312
313	case OMAP_EHCI_PORT_MODE_TLL:	313	case OMAP_EHCI_PORT_MODE_TLL:
314	if (!IS_ERR(omap->utmi_clk[i])) {	314	if (!IS_ERR(omap->utmi_clk[i])) {
@@ -344,7 +344,7 @@ static int usbhs_runtime_suspend(struct device *dev) · 29 unmodified lines
344		344
345	if (!IS_ERR(omap->hsic480m_clk[i]))	345	if (!IS_ERR(omap->hsic480m_clk[i]))
346	clk_disable_unprepare(omap->hsic480m_clk[i]);	346	clk_disable_unprepare(omap->hsic480m_clk[i]);
347	/* Fall through - as utmi_clks were used in HSIC mode */	347	fallthrough; /* as utmi_clks were used in HSIC mode */
348		348
349	case OMAP_EHCI_PORT_MODE_TLL:	349	case OMAP_EHCI_PORT_MODE_TLL:
350	if (!IS_ERR(omap->utmi_clk[i]))	350	if (!IS_ERR(omap->utmi_clk[i]))

drivers/mfd/rave-sp.c+2−2

@@ -270,7 +270,7 @@ static void stuff(unsigned char dest, const unsigned char *src, size_t n) · 269 unmodified lines
270	case RAVE_SP_ETX:	270	case RAVE_SP_ETX:
271	case RAVE_SP_DLE:	271	case RAVE_SP_DLE:
272	*dest++ = RAVE_SP_DLE;	272	*dest++ = RAVE_SP_DLE;
273	/* FALLTHROUGH */	273	fallthrough;
274	default:	274	default:
275	*dest++ = byte;	275	*dest++ = byte;
276	}	276	}
@@ -541,7 +541,7 @@ static int rave_sp_receive_buf(struct serdev_device *serdev, · 264 unmodified lines
541	* deframer buffer	541	* deframer buffer
542	*/	542	*/
543		543
544	/* FALLTHROUGH */	544	fallthrough;
545		545
546	case RAVE_SP_EXPECT_ESCAPED_DATA:	546	case RAVE_SP_EXPECT_ESCAPED_DATA:
547	if (deframer->length == sizeof(deframer->data)) {	547	if (deframer->length == sizeof(deframer->data)) {

drivers/mfd/syscon.c+1−1

@@ -95,7 +95,7 @@ static struct syscon of_syscon_register(struct device_node np, bool check_clk) · 94 unmodified lines
95	break;	95	break;
96	default:	96	default:
97	pr_err("Failed to retrieve valid hwlock: %d\n", ret);	97	pr_err("Failed to retrieve valid hwlock: %d\n", ret);
98	/* fall-through */	98	fallthrough;
99	case -EPROBE_DEFER:	99	case -EPROBE_DEFER:
100	goto err_regmap;	100	goto err_regmap;
101	}	101	}

drivers/misc/eeprom/at25.c+5−5

@@ -90,10 +90,10 @@ static int at25_ee_read(void *priv, unsigned int offset, · 89 unmodified lines
90	switch (at25->addrlen) {	90	switch (at25->addrlen) {
91	default: /* case 3 */	91	default: /* case 3 */
92	*cp++ = offset >> 16;	92	*cp++ = offset >> 16;
93	/* fall through */	93	fallthrough;
94	case 2:	94	case 2:
95	*cp++ = offset >> 8;	95	*cp++ = offset >> 8;
96	/* fall through */	96	fallthrough;
97	case 1:	97	case 1:
98	case 0: /* can't happen: for better codegen */	98	case 0: /* can't happen: for better codegen */
99	*cp++ = offset >> 0;	99	*cp++ = offset >> 0;
@@ -178,10 +178,10 @@ static int at25_ee_write(void priv, unsigned int off, void val, size_t count) · 78 unmodified lines
178	switch (at25->addrlen) {	178	switch (at25->addrlen) {
179	default: /* case 3 */	179	default: /* case 3 */
180	*cp++ = offset >> 16;	180	*cp++ = offset >> 16;
181	/* fall through */	181	fallthrough;
182	case 2:	182	case 2:
183	*cp++ = offset >> 8;	183	*cp++ = offset >> 8;
184	/* fall through */	184	fallthrough;
185	case 1:	185	case 1:
186	case 0: /* can't happen: for better codegen */	186	case 0: /* can't happen: for better codegen */
187	*cp++ = offset >> 0;	187	*cp++ = offset >> 0;
@@ -278,7 +278,7 @@ static int at25_fw_to_chip(struct device dev, struct spi_eeprom chip) · 90 unmodified lines
278	switch (val) {	278	switch (val) {
279	case 9:	279	case 9:
280	chip->flags \|= EE_INSTR_BIT3_IS_ADDR;	280	chip->flags \|= EE_INSTR_BIT3_IS_ADDR;
281	/* fall through */	281	fallthrough;
282	case 8:	282	case 8:
283	chip->flags \|= EE_ADDR1;	283	chip->flags \|= EE_ADDR1;
284	break;	284	break;

drivers/misc/habanalabs/common/command_buffer.c+14−2

 #include <linux/mm.h>
 #include <linux/slab.h>
+#include <linux/uaccess.h>
 #include <linux/genalloc.h>
 static void cb_fini(struct hl_device *hdev, struct hl_cb *cb)
 	struct hl_device *hdev = hpriv->hdev;
 	struct hl_cb *cb;
 	phys_addr_t address;
-	u32 handle;
+	u32 handle, user_cb_size;
 	int rc;
 	handle = vma->vm_pgoff;
 	}
 	/* Validation check */
-	if ((vma->vm_end - vma->vm_start) != ALIGN(cb->size, PAGE_SIZE)) {
+	user_cb_size = vma->vm_end - vma->vm_start;
+	if (user_cb_size != ALIGN(cb->size, PAGE_SIZE)) {
 		dev_err(hdev->dev,
 			"CB mmap failed, mmap size 0x%lx != 0x%x cb size\n",
 			vma->vm_end - vma->vm_start, cb->size);
 		goto put_cb;
 	}
+	if (!access_ok((void __user *) (uintptr_t) vma->vm_start,
+							user_cb_size)) {
+		dev_err(hdev->dev,
+			"user pointer is invalid - 0x%lx\n",
+			vma->vm_start);
+		rc = -EINVAL;
+		goto put_cb;
+	}
 	spin_lock(&cb->lock);
 	if (cb->mmap) {

drivers/misc/habanalabs/common/command_submission.c+8−0

@@ -808,6 +808,14 @@ static int cs_ioctl_signal_wait(struct hl_fpriv *hpriv, enum hl_cs_type cs_type, · 807 unmodified lines
808		808
809	/* currently it is guaranteed to have only one chunk */	809	/* currently it is guaranteed to have only one chunk */
810	chunk = &cs_chunk_array[0];	810	chunk = &cs_chunk_array[0];
		811
		812	if (chunk->queue_index >= hdev->asic_prop.max_queues) {
		813	dev_err(hdev->dev, "Queue index %d is invalid\n",
		814	chunk->queue_index);
		815	rc = -EINVAL;
		816	goto free_cs_chunk_array;
		817	}
		818
811	q_idx = chunk->queue_index;	819	q_idx = chunk->queue_index;
812	hw_queue_prop = &hdev->asic_prop.hw_queues_props[q_idx];	820	hw_queue_prop = &hdev->asic_prop.hw_queues_props[q_idx];
813	q_type = hw_queue_prop->type;	821	q_type = hw_queue_prop->type;

drivers/misc/habanalabs/common/debugfs.c+4−4

@@ -19,7 +19,7 @@ · 18 unmodified lines
19	static struct dentry *hl_debug_root;	19	static struct dentry *hl_debug_root;
20		20
21	static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr,	21	static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr,
22	u8 i2c_reg, u32 *val)	22	u8 i2c_reg, long *val)
23	{	23	{
24	struct armcp_packet pkt;	24	struct armcp_packet pkt;
25	int rc;	25	int rc;
@@ -36,7 +36,7 @@ static int hl_debugfs_i2c_read(struct hl_device *hdev, u8 i2c_bus, u8 i2c_addr, · 10 unmodified lines
36	pkt.i2c_reg = i2c_reg;	36	pkt.i2c_reg = i2c_reg;
37		37
38	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),	38	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
39	0, (long *) val);	39	0, val);
40		40
41	if (rc)	41	if (rc)
42	dev_err(hdev->dev, "Failed to read from I2C, error %d\n", rc);	42	dev_err(hdev->dev, "Failed to read from I2C, error %d\n", rc);
@@ -827,7 +827,7 @@ static ssize_t hl_i2c_data_read(struct file f, char __user buf, · 784 unmodified lines
827	struct hl_dbg_device_entry *entry = file_inode(f)->i_private;	827	struct hl_dbg_device_entry *entry = file_inode(f)->i_private;
828	struct hl_device *hdev = entry->hdev;	828	struct hl_device *hdev = entry->hdev;
829	char tmp_buf[32];	829	char tmp_buf[32];
830	u32 val;	830	long val;
831	ssize_t rc;	831	ssize_t rc;
832		832
833	if (*ppos)	833	if (*ppos)
@@ -842,7 +842,7 @@ static ssize_t hl_i2c_data_read(struct file f, char __user buf, · 8 unmodified lines
842	return rc;	842	return rc;
843	}	843	}
844		844
845	sprintf(tmp_buf, "0x%02x\n", val);	845	sprintf(tmp_buf, "0x%02lx\n", val);
846	rc = simple_read_from_buffer(buf, count, ppos, tmp_buf,	846	rc = simple_read_from_buffer(buf, count, ppos, tmp_buf,
847	strlen(tmp_buf));	847	strlen(tmp_buf));
848		848

drivers/misc/habanalabs/common/device.c+7−2

 	for (i = 0 ; i < hdev->asic_prop.completion_queues_count ; i++) {
 		snprintf(workq_name, 32, "hl-free-jobs-%u", i);
 		hdev->cq_wq[i] = create_singlethread_workqueue(workq_name);
-		if (hdev->cq_wq == NULL) {
+		if (hdev->cq_wq[i] == NULL) {
 			dev_err(hdev->dev, "Failed to allocate CQ workqueue\n");
 			rc = -ENOMEM;
 			goto free_cq_wq;
 			goto out_err;
 		}
-		hl_set_max_power(hdev, hdev->max_power);
+		hl_set_max_power(hdev);
 	} else {
 		rc = hdev->asic_funcs->soft_reset_late_init(hdev);
 		if (rc) {
 		goto out_disabled;
 	}
+	/* Need to call this again because the max power might change,
+	 * depending on card type for certain ASICs
+	 */
+	hl_set_max_power(hdev);
 	/*
 	 * hl_hwmon_init() must be called after device_late_init(), because only
 	 * there we get the information from the device about which

drivers/misc/habanalabs/common/firmware_if.c+9−0

 #include <linux/io-64-nonatomic-lo-hi.h>
 #include <linux/slab.h>
+#define FW_FILE_MAX_SIZE	0x1400000 /* maximum size of 20MB */
 /**
  * hl_fw_load_fw_to_device() - Load F/W code to device's memory.
  *
 	dev_dbg(hdev->dev, "%s firmware size == %zu\n", fw_name, fw_size);
+	if (fw_size > FW_FILE_MAX_SIZE) {
+		dev_err(hdev->dev,
+			"FW file size %zu exceeds maximum of %u bytes\n",
+			fw_size, FW_FILE_MAX_SIZE);
+		rc = -EINVAL;
+		goto out;
+	}
 	fw_data = (const u64 *) fw->data;
 	memcpy_toio(dst, fw_data, fw_size);

drivers/misc/habanalabs/common/habanalabs.h+5−2

  *                     details.
  * @in_reset: is device in reset flow.
  * @curr_pll_profile: current PLL profile.
+ * @card_type: Various ASICs have several card types. This indicates the card
+ *             type of the current device.
  * @cs_active_cnt: number of active command submissions on this device (active
  *                 means already in H/W queues)
  * @major: habanalabs kernel driver major.
 	u64				clock_gating_mask;
 	atomic_t			in_reset;
 	enum hl_pll_frequency		curr_pll_profile;
+	enum armcp_card_types		card_type;
 	int				cs_active_cnt;
 	u32				major;
 	u32				high_pll;
  *
  * Return: true if the area is inside the valid range, false otherwise.
  */
-static inline bool hl_mem_area_inside_range(u64 address, u32 size,
+static inline bool hl_mem_area_inside_range(u64 address, u64 size,
 				u64 range_start_address, u64 range_end_address)
 {
 	u64 end_address = address + size;
 void hl_set_pwm_info(struct hl_device *hdev, int sensor_index, u32 attr,
 			long value);
 u64 hl_get_max_power(struct hl_device *hdev);
-void hl_set_max_power(struct hl_device *hdev, u64 value);
+void hl_set_max_power(struct hl_device *hdev);
 int hl_set_voltage(struct hl_device *hdev,
 			int sensor_index, u32 attr, long value);
 int hl_set_current(struct hl_device *hdev,

drivers/misc/habanalabs/common/memory.c+7−2

 	num_pgs = (args->alloc.mem_size + (page_size - 1)) >> page_shift;
 	total_size = num_pgs << page_shift;
+	if (!total_size) {
+		dev_err(hdev->dev, "Cannot allocate 0 bytes\n");
+		return -EINVAL;
+	}
 	contiguous = args->flags & HL_MEM_CONTIGUOUS;
 	if (contiguous) {
 	phys_pg_pack->contiguous = contiguous;
 	phys_pg_pack->pages = kvmalloc_array(num_pgs, sizeof(u64), GFP_KERNEL);
-	if (!phys_pg_pack->pages) {
+	if (ZERO_OR_NULL_PTR(phys_pg_pack->pages)) {
 		rc = -ENOMEM;
 		goto pages_arr_err;
 	}
 	phys_pg_pack->pages = kvmalloc_array(total_npages, sizeof(u64),
 						GFP_KERNEL);
-	if (!phys_pg_pack->pages) {
+	if (ZERO_OR_NULL_PTR(phys_pg_pack->pages)) {
 		rc = -ENOMEM;
 		goto page_pack_arr_mem_err;
 	}

drivers/misc/habanalabs/common/mmu.c+1−1

@@ -450,7 +450,7 @@ int hl_mmu_init(struct hl_device *hdev) · 449 unmodified lines
450	hdev->mmu_shadow_hop0 = kvmalloc_array(prop->max_asid,	450	hdev->mmu_shadow_hop0 = kvmalloc_array(prop->max_asid,
451	prop->mmu_hop_table_size,	451	prop->mmu_hop_table_size,
452	GFP_KERNEL \| __GFP_ZERO);	452	GFP_KERNEL \| __GFP_ZERO);
453	if (!hdev->mmu_shadow_hop0) {	453	if (ZERO_OR_NULL_PTR(hdev->mmu_shadow_hop0)) {
454	rc = -ENOMEM;	454	rc = -ENOMEM;
455	goto err_pool_add;	455	goto err_pool_add;
456	}	456	}

drivers/misc/habanalabs/common/pci.c+5−3

 	}
 	/* Point to the specified address */
-	rc = hl_pci_iatu_write(hdev, offset + 0x14,
+	rc |= hl_pci_iatu_write(hdev, offset + 0x14,
 			lower_32_bits(pci_region->addr));
 	rc |= hl_pci_iatu_write(hdev, offset + 0x18,
 			upper_32_bits(pci_region->addr));
 	rc = hdev->asic_funcs->init_iatu(hdev);
 	if (rc) {
 		dev_err(hdev->dev, "Failed to initialize iATU\n");
-		goto disable_device;
+		goto unmap_pci_bars;
 	}
 	rc = hl_pci_set_dma_mask(hdev);
 	if (rc)
-		goto disable_device;
+		goto unmap_pci_bars;
 	return 0;
+unmap_pci_bars:
+	hl_pci_bars_unmap(hdev);
 disable_device:
 	pci_clear_master(pdev);
 	pci_disable_device(pdev);

drivers/misc/habanalabs/common/sysfs.c+4−3

@@ -81,7 +81,7 @@ u64 hl_get_max_power(struct hl_device *hdev) · 80 unmodified lines
81	return result;	81	return result;
82	}	82	}
83		83
84	void hl_set_max_power(struct hl_device *hdev, u64 value)	84	void hl_set_max_power(struct hl_device *hdev)
85	{	85	{
86	struct armcp_packet pkt;	86	struct armcp_packet pkt;
87	int rc;	87	int rc;
@@ -90,7 +90,7 @@ void hl_set_max_power(struct hl_device *hdev, u64 value) · 2 unmodified lines
90		90
91	pkt.ctl = cpu_to_le32(ARMCP_PACKET_MAX_POWER_SET <<	91	pkt.ctl = cpu_to_le32(ARMCP_PACKET_MAX_POWER_SET <<
92	ARMCP_PKT_CTL_OPCODE_SHIFT);	92	ARMCP_PKT_CTL_OPCODE_SHIFT);
93	pkt.value = cpu_to_le64(value);	93	pkt.value = cpu_to_le64(hdev->max_power);
94		94
95	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),	95	rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
96	0, NULL);	96	0, NULL);
@@ -316,7 +316,7 @@ static ssize_t max_power_store(struct device *dev, · 219 unmodified lines
316	}	316	}
317		317
318	hdev->max_power = value;	318	hdev->max_power = value;
319	hl_set_max_power(hdev, value);	319	hl_set_max_power(hdev);
320		320
321	out:	321	out:
322	return count;	322	return count;
@@ -422,6 +422,7 @@ int hl_sysfs_init(struct hl_device *hdev) · 99 unmodified lines
422	hdev->pm_mng_profile = PM_AUTO;	422	hdev->pm_mng_profile = PM_AUTO;
423	else	423	else
424	hdev->pm_mng_profile = PM_MANUAL;	424	hdev->pm_mng_profile = PM_MANUAL;
		425
425	hdev->max_power = hdev->asic_prop.max_power_default;	426	hdev->max_power = hdev->asic_prop.max_power_default;
426		427
427	hdev->asic_funcs->add_device_attr(hdev, &hl_dev_clks_attr_group);	428	hdev->asic_funcs->add_device_attr(hdev, &hl_dev_clks_attr_group);

drivers/misc/habanalabs/gaudi/gaudi.c+67−25

 	[PACKET_LOAD_AND_EXE]	= sizeof(struct packet_load_and_exe)
 };
+static inline bool validate_packet_id(enum packet_id id)
+{
+	switch (id) {
+	case PACKET_WREG_32:
+	case PACKET_WREG_BULK:
+	case PACKET_MSG_LONG:
+	case PACKET_MSG_SHORT:
+	case PACKET_CP_DMA:
+	case PACKET_REPEAT:
+	case PACKET_MSG_PROT:
+	case PACKET_FENCE:
+	case PACKET_LIN_DMA:
+	case PACKET_NOP:
+	case PACKET_STOP:
+	case PACKET_ARB_POINT:
+	case PACKET_WAIT:
+	case PACKET_LOAD_AND_EXE:
+		return true;
+	default:
+		return false;
+	}
+}
 static const char * const
 gaudi_tpc_interrupts_cause[GAUDI_NUM_OF_TPC_INTR_CAUSE] = {
 	"tpc_address_exceed_slm",
 	prop->num_of_events = GAUDI_EVENT_SIZE;
 	prop->tpc_enabled_mask = TPC_ENABLED_MASK;
-	prop->max_power_default = MAX_POWER_DEFAULT;
+	prop->max_power_default = MAX_POWER_DEFAULT_PCI;
 	prop->cb_pool_cb_cnt = GAUDI_CB_POOL_CB_CNT;
 	prop->cb_pool_cb_size = GAUDI_CB_POOL_CB_SIZE;
 {
 	struct gaudi_device *gaudi = hdev->asic_specific;
 	u32 qman_offset;
+	bool enable;
 	int i;
 	/* In case we are during debug session, don't enable the clock gate
 		return;
 	for (i = GAUDI_PCI_DMA_1, qman_offset = 0 ; i < GAUDI_HBM_DMA_1 ; i++) {
-		if (!(hdev->clock_gating_mask &
+		enable = !!(hdev->clock_gating_mask &
-					(BIT_ULL(gaudi_dma_assignment[i]))))
+				(BIT_ULL(gaudi_dma_assignment[i])));
-			continue;
 		qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
-		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
+		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,
+				enable ? QMAN_CGM1_PWR_GATE_EN : 0);
 		WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
-				QMAN_UPPER_CP_CGM_PWR_GATE_EN);
+				enable ? QMAN_UPPER_CP_CGM_PWR_GATE_EN : 0);
 	}
 	for (i = GAUDI_HBM_DMA_1 ; i < GAUDI_DMA_MAX ; i++) {
-		if (!(hdev->clock_gating_mask &
+		enable = !!(hdev->clock_gating_mask &
-					(BIT_ULL(gaudi_dma_assignment[i]))))
+				(BIT_ULL(gaudi_dma_assignment[i])));
-			continue;
 		qman_offset = gaudi_dma_assignment[i] * DMA_QMAN_OFFSET;
-		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset, QMAN_CGM1_PWR_GATE_EN);
+		WREG32(mmDMA0_QM_CGM_CFG1 + qman_offset,
+				enable ? QMAN_CGM1_PWR_GATE_EN : 0);
 		WREG32(mmDMA0_QM_CGM_CFG + qman_offset,
-				QMAN_COMMON_CP_CGM_PWR_GATE_EN);
+				enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
 	}
-	if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0))) {
+	enable = !!(hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_0)));
-		WREG32(mmMME0_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
+	WREG32(mmMME0_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0);
-		WREG32(mmMME0_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
+	WREG32(mmMME0_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
-	}
-	if (hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2))) {
+	enable = !!(hdev->clock_gating_mask & (BIT_ULL(GAUDI_ENGINE_ID_MME_2)));
-		WREG32(mmMME2_QM_CGM_CFG1, QMAN_CGM1_PWR_GATE_EN);
+	WREG32(mmMME2_QM_CGM_CFG1, enable ? QMAN_CGM1_PWR_GATE_EN : 0);
-		WREG32(mmMME2_QM_CGM_CFG, QMAN_COMMON_CP_CGM_PWR_GATE_EN);
+	WREG32(mmMME2_QM_CGM_CFG, enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
-	}
 	for (i = 0, qman_offset = 0 ; i < TPC_NUMBER_OF_ENGINES ; i++) {
-		if (!(hdev->clock_gating_mask &
+		enable = !!(hdev->clock_gating_mask &
-					(BIT_ULL(GAUDI_ENGINE_ID_TPC_0 + i))))
+				(BIT_ULL(GAUDI_ENGINE_ID_TPC_0 + i)));
-			continue;
 		WREG32(mmTPC0_QM_CGM_CFG1 + qman_offset,
-				QMAN_CGM1_PWR_GATE_EN);
+				enable ? QMAN_CGM1_PWR_GATE_EN : 0);
 		WREG32(mmTPC0_QM_CGM_CFG + qman_offset,
-				QMAN_COMMON_CP_CGM_PWR_GATE_EN);
+				enable ? QMAN_COMMON_CP_CGM_PWR_GATE_EN : 0);
 		qman_offset += TPC_QMAN_OFFSET;
 	}
 				PACKET_HEADER_PACKET_ID_MASK) >>
 					PACKET_HEADER_PACKET_ID_SHIFT);
+		if (!validate_packet_id(pkt_id)) {
+			dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
+			rc = -EINVAL;
+			break;
+		}
 		pkt_size = gaudi_packet_sizes[pkt_id];
 		cb_parsed_length += pkt_size;
 		if (cb_parsed_length > parser->user_cb_size) {
 				PACKET_HEADER_PACKET_ID_MASK) >>
 					PACKET_HEADER_PACKET_ID_SHIFT);
+		if (!validate_packet_id(pkt_id)) {
+			dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
+			rc = -EINVAL;
+			break;
+		}
 		pkt_size = gaudi_packet_sizes[pkt_id];
 		cb_parsed_length += pkt_size;
 		if (cb_parsed_length > parser->user_cb_size) {
 	*memory_wrapper_idx = 0xFF;
 	/* Iterate through memory wrappers, a single bit must be set */
-	for (i = 0 ; i > num_mem_regs ; i++) {
+	for (i = 0 ; i < num_mem_regs ; i++) {
 		err_addr += i * 4;
 		err_word = RREG32(err_addr);
 		if (err_word) {
 		strncpy(prop->armcp_info.card_name, GAUDI_DEFAULT_CARD_NAME,
 				CARD_NAME_MAX_LEN);
+	hdev->card_type = le32_to_cpu(hdev->asic_prop.armcp_info.card_type);
+	if (hdev->card_type == armcp_card_type_pci)
+		prop->max_power_default = MAX_POWER_DEFAULT_PCI;
+	else if (hdev->card_type == armcp_card_type_pmc)
+		prop->max_power_default = MAX_POWER_DEFAULT_PMC;
+	hdev->max_power = prop->max_power_default;
 	return 0;
 }

drivers/misc/habanalabs/gaudi/gaudiP.h+2−1

@@ -41,7 +41,8 @@ · 40 unmodified lines
41		41
42	#define GAUDI_MAX_CLK_FREQ 2200000000ull /* 2200 MHz */	42	#define GAUDI_MAX_CLK_FREQ 2200000000ull /* 2200 MHz */
43		43
44	#define MAX_POWER_DEFAULT 200000 /* 200W */	44	#define MAX_POWER_DEFAULT_PCI 200000 /* 200W */
		45	#define MAX_POWER_DEFAULT_PMC 350000 /* 350W */
45		46
46	#define GAUDI_CPU_TIMEOUT_USEC 15000000 /* 15s */	47	#define GAUDI_CPU_TIMEOUT_USEC 15000000 /* 15s */
47		48

drivers/misc/habanalabs/gaudi/gaudi_coresight.c+7−1

 }
 static bool gaudi_etr_validate_address(struct hl_device *hdev, u64 addr,
-					u32 size, bool *is_host)
+					u64 size, bool *is_host)
 {
 	struct asic_fixed_properties *prop = &hdev->asic_prop;
 	struct gaudi_device *gaudi = hdev->asic_specific;
 		return false;
 	}
+	if (addr > (addr + size)) {
+		dev_err(hdev->dev,
+			"ETR buffer size %llu overflow\n", size);
+		return false;
+	}
 	/* PMMU and HPMMU addresses are equal, check only one of them */
 	if ((gaudi->hw_cap_initialized & HW_CAP_MMU) &&
 		hl_mem_area_inside_range(addr, size,

drivers/misc/habanalabs/goya/goya.c+31−0

@@ -139,6 +139,25 @@ static u16 goya_packet_sizes[MAX_PACKET_ID] = { · 138 unmodified lines
139	[PACKET_STOP] = sizeof(struct packet_stop)	139	[PACKET_STOP] = sizeof(struct packet_stop)
140	};	140	};
141		141
		142	static inline bool validate_packet_id(enum packet_id id)
		143	{
		144	switch (id) {
		145	case PACKET_WREG_32:
		146	case PACKET_WREG_BULK:
		147	case PACKET_MSG_LONG:
		148	case PACKET_MSG_SHORT:
		149	case PACKET_CP_DMA:
		150	case PACKET_MSG_PROT:
		151	case PACKET_FENCE:
		152	case PACKET_LIN_DMA:
		153	case PACKET_NOP:
		154	case PACKET_STOP:
		155	return true;
		156	default:
		157	return false;
		158	}
		159	}
		160
142	static u64 goya_mmu_regs[GOYA_MMU_REGS_NUM] = {	161	static u64 goya_mmu_regs[GOYA_MMU_REGS_NUM] = {
143	mmDMA_QM_0_GLBL_NON_SECURE_PROPS,	162	mmDMA_QM_0_GLBL_NON_SECURE_PROPS,
144	mmDMA_QM_1_GLBL_NON_SECURE_PROPS,	163	mmDMA_QM_1_GLBL_NON_SECURE_PROPS,
@@ -3455,6 +3474,12 @@ static int goya_validate_cb(struct hl_device *hdev, · 3310 unmodified lines
3455	PACKET_HEADER_PACKET_ID_MASK) >>	3474	PACKET_HEADER_PACKET_ID_MASK) >>
3456	PACKET_HEADER_PACKET_ID_SHIFT);	3475	PACKET_HEADER_PACKET_ID_SHIFT);
3457		3476
		3477	if (!validate_packet_id(pkt_id)) {
		3478	dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
		3479	rc = -EINVAL;
		3480	break;
		3481	}
		3482
3458	pkt_size = goya_packet_sizes[pkt_id];	3483	pkt_size = goya_packet_sizes[pkt_id];
3459	cb_parsed_length += pkt_size;	3484	cb_parsed_length += pkt_size;
3460	if (cb_parsed_length > parser->user_cb_size) {	3485	if (cb_parsed_length > parser->user_cb_size) {
@@ -3690,6 +3715,12 @@ static int goya_patch_cb(struct hl_device *hdev, · 229 unmodified lines
3690	PACKET_HEADER_PACKET_ID_MASK) >>	3715	PACKET_HEADER_PACKET_ID_MASK) >>
3691	PACKET_HEADER_PACKET_ID_SHIFT);	3716	PACKET_HEADER_PACKET_ID_SHIFT);
3692		3717
		3718	if (!validate_packet_id(pkt_id)) {
		3719	dev_err(hdev->dev, "Invalid packet id %u\n", pkt_id);
		3720	rc = -EINVAL;
		3721	break;
		3722	}
		3723
3693	pkt_size = goya_packet_sizes[pkt_id];	3724	pkt_size = goya_packet_sizes[pkt_id];
3694	cb_parsed_length += pkt_size;	3725	cb_parsed_length += pkt_size;
3695	if (cb_parsed_length > parser->user_cb_size) {	3726	if (cb_parsed_length > parser->user_cb_size) {

drivers/misc/habanalabs/goya/goya_coresight.c+7−1

 }
 static int goya_etr_validate_address(struct hl_device *hdev, u64 addr,
-		u32 size)
+		u64 size)
 {
 	struct asic_fixed_properties *prop = &hdev->asic_prop;
 	u64 range_start, range_end;
+	if (addr > (addr + size)) {
+		dev_err(hdev->dev,
+			"ETR buffer size %llu overflow\n", size);
+		return false;
+	}
 	if (hdev->mmu_enable) {
 		range_start = prop->dmmu.start_addr;
 		range_end = prop->dmmu.end_addr;

drivers/misc/mei/hdcp/mei_hdcp.c+24−16

@@ -546,38 +546,46 @@ static int mei_hdcp_verify_mprime(struct device *dev, · 545 unmodified lines
546	struct hdcp_port_data *data,	546	struct hdcp_port_data *data,
547	struct hdcp2_rep_stream_ready *stream_ready)	547	struct hdcp2_rep_stream_ready *stream_ready)
548	{	548	{
549	struct wired_cmd_repeater_auth_stream_req_in	549	struct wired_cmd_repeater_auth_stream_req_in *verify_mprime_in;
550	verify_mprime_in = { { 0 } };
551	struct wired_cmd_repeater_auth_stream_req_out	550	struct wired_cmd_repeater_auth_stream_req_out
552	verify_mprime_out = { { 0 } };	551	verify_mprime_out = { { 0 } };
553	struct mei_cl_device *cldev;	552	struct mei_cl_device *cldev;
554	ssize_t byte;	553	ssize_t byte;
		554	size_t cmd_size;
555		555
556	if (!dev \|\| !stream_ready \|\| !data)	556	if (!dev \|\| !stream_ready \|\| !data)
557	return -EINVAL;	557	return -EINVAL;
558		558
559	cldev = to_mei_cl_device(dev);	559	cldev = to_mei_cl_device(dev);
560		560
561	verify_mprime_in.header.api_version = HDCP_API_VERSION;	561	cmd_size = struct_size(verify_mprime_in, streams, data->k);
562	verify_mprime_in.header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;	562	if (cmd_size == SIZE_MAX)
563	verify_mprime_in.header.status = ME_HDCP_STATUS_SUCCESS;	563	return -EINVAL;
564	verify_mprime_in.header.buffer_len =	564
		565	verify_mprime_in = kzalloc(cmd_size, GFP_KERNEL);
		566	if (!verify_mprime_in)
		567	return -ENOMEM;
		568
		569	verify_mprime_in->header.api_version = HDCP_API_VERSION;
		570	verify_mprime_in->header.command_id = WIRED_REPEATER_AUTH_STREAM_REQ;
		571	verify_mprime_in->header.status = ME_HDCP_STATUS_SUCCESS;
		572	verify_mprime_in->header.buffer_len =
565	WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;	573	WIRED_CMD_BUF_LEN_REPEATER_AUTH_STREAM_REQ_MIN_IN;
566		574
567	verify_mprime_in.port.integrated_port_type = data->port_type;	575	verify_mprime_in->port.integrated_port_type = data->port_type;
568	verify_mprime_in.port.physical_port = (u8)data->fw_ddi;	576	verify_mprime_in->port.physical_port = (u8)data->fw_ddi;
569	verify_mprime_in.port.attached_transcoder = (u8)data->fw_tc;	577	verify_mprime_in->port.attached_transcoder = (u8)data->fw_tc;
		578
		579	memcpy(verify_mprime_in->m_prime, stream_ready->m_prime, HDCP_2_2_MPRIME_LEN);
		580	drm_hdcp_cpu_to_be24(verify_mprime_in->seq_num_m, data->seq_num_m);
570		581
571	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,	582	memcpy(verify_mprime_in->streams, data->streams,
572	HDCP_2_2_MPRIME_LEN);
573	drm_hdcp_cpu_to_be24(verify_mprime_in.seq_num_m, data->seq_num_m);
574	memcpy(verify_mprime_in.streams, data->streams,
575	array_size(data->k, sizeof(*data->streams)));	583	array_size(data->k, sizeof(*data->streams)));
576		584
577	verify_mprime_in.k = cpu_to_be16(data->k);	585	verify_mprime_in->k = cpu_to_be16(data->k);
578		586
579	byte = mei_cldev_send(cldev, (u8 *)&verify_mprime_in,	587	byte = mei_cldev_send(cldev, (u8 *)verify_mprime_in, cmd_size);
580	sizeof(verify_mprime_in));	588	kfree(verify_mprime_in);
581	if (byte < 0) {	589	if (byte < 0) {
582	dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);	590	dev_dbg(dev, "mei_cldev_send failed. %zd\n", byte);
583	return byte;	591	return byte;

drivers/misc/mic/scif/scif_api.c+2−2

@@ -178,7 +178,7 @@ int scif_close(scif_epd_t epd) · 177 unmodified lines
178	case SCIFEP_ZOMBIE:	178	case SCIFEP_ZOMBIE:
179	dev_err(scif_info.mdev.this_device,	179	dev_err(scif_info.mdev.this_device,
180	"SCIFAPI close: zombie state unexpected\n");	180	"SCIFAPI close: zombie state unexpected\n");
181	/* fall through */	181	fallthrough;
182	case SCIFEP_DISCONNECTED:	182	case SCIFEP_DISCONNECTED:
183	spin_unlock(&ep->lock);	183	spin_unlock(&ep->lock);
184	scif_unregister_all_windows(epd);	184	scif_unregister_all_windows(epd);
@@ -645,7 +645,7 @@ int __scif_connect(scif_epd_t epd, struct scif_port_id *dst, bool non_block) · 460 unmodified lines
645	ep->port.port = err;	645	ep->port.port = err;
646	ep->port.node = scif_info.nodeid;	646	ep->port.node = scif_info.nodeid;
647	ep->conn_async_state = ASYNC_CONN_IDLE;	647	ep->conn_async_state = ASYNC_CONN_IDLE;
648	/* Fall through */	648	fallthrough;
649	case SCIFEP_BOUND:	649	case SCIFEP_BOUND:
650	/*	650	/*
651	* If a non-blocking connect has been already initiated	651	* If a non-blocking connect has been already initiated

drivers/misc/mic/scif/scif_rma.c+1−1

@@ -657,7 +657,7 @@ int scif_unregister_window(struct scif_window *window) · 656 unmodified lines
657	window->unreg_state = OP_IN_PROGRESS;	657	window->unreg_state = OP_IN_PROGRESS;
658	send_msg = true;	658	send_msg = true;
659	}	659	}
660	/* fall through */	660	fallthrough;
661	case OP_IN_PROGRESS:	661	case OP_IN_PROGRESS:
662	{	662	{
663	scif_get_window(window, 1);	663	scif_get_window(window, 1);

drivers/misc/sgi-gru/grukservices.c+2−2

@@ -622,7 +622,7 @@ static int send_noop_message(void cb, struct gru_message_queue_desc mqd, · 621 unmodified lines
622	break;	622	break;
623	case CBSS_PAGE_OVERFLOW:	623	case CBSS_PAGE_OVERFLOW:
624	STAT(mesq_noop_page_overflow);	624	STAT(mesq_noop_page_overflow);
625	/* fall through */	625	fallthrough;
626	default:	626	default:
627	BUG();	627	BUG();
628	}	628	}
@@ -780,7 +780,7 @@ static int send_message_failure(void cb, struct gru_message_queue_desc mqd, · 151 unmodified lines
780	break;	780	break;
781	case CBSS_PAGE_OVERFLOW:	781	case CBSS_PAGE_OVERFLOW:
782	STAT(mesq_page_overflow);	782	STAT(mesq_page_overflow);
783	/* fall through */	783	fallthrough;
784	default:	784	default:
785	BUG();	785	BUG();
786	}	786	}

drivers/misc/sgi-xp/xpc_main.c+2−2

@@ -1173,7 +1173,7 @@ xpc_system_die(struct notifier_block nb, unsigned long event, void _die_args) · 1172 unmodified lines
1173	if (!xpc_kdebug_ignore)	1173	if (!xpc_kdebug_ignore)
1174	break;	1174	break;
1175		1175
1176	/* fall through */	1176	fallthrough;
1177	case DIE_MCA_MONARCH_ENTER:	1177	case DIE_MCA_MONARCH_ENTER:
1178	case DIE_INIT_MONARCH_ENTER:	1178	case DIE_INIT_MONARCH_ENTER:
1179	xpc_arch_ops.offline_heartbeat();	1179	xpc_arch_ops.offline_heartbeat();
@@ -1184,7 +1184,7 @@ xpc_system_die(struct notifier_block nb, unsigned long event, void _die_args) · 4 unmodified lines
1184	if (!xpc_kdebug_ignore)	1184	if (!xpc_kdebug_ignore)
1185	break;	1185	break;
1186		1186
1187	/* fall through */	1187	fallthrough;
1188	case DIE_MCA_MONARCH_LEAVE:	1188	case DIE_MCA_MONARCH_LEAVE:
1189	case DIE_INIT_MONARCH_LEAVE:	1189	case DIE_INIT_MONARCH_LEAVE:
1190	xpc_arch_ops.online_heartbeat();	1190	xpc_arch_ops.online_heartbeat();

drivers/misc/sgi-xp/xpc_partition.c+2−2

@@ -441,10 +441,10 @@ xpc_discovery(void) · 440 unmodified lines
441	switch (region_size) {	441	switch (region_size) {
442	case 128:	442	case 128:
443	max_regions *= 2;	443	max_regions *= 2;
444	/* fall through */	444	fallthrough;
445	case 64:	445	case 64:
446	max_regions *= 2;	446	max_regions *= 2;
447	/* fall through */	447	fallthrough;
448	case 32:	448	case 32:
449	max_regions *= 2;	449	max_regions *= 2;
450	region_size = 16;	450	region_size = 16;

drivers/misc/sgi-xp/xpc_uv.c+1−1

@@ -574,7 +574,7 @@ xpc_handle_activate_mq_msg_uv(struct xpc_partition *part, · 573 unmodified lines
574		574
575	xpc_wakeup_channel_mgr(part);	575	xpc_wakeup_channel_mgr(part);
576	}	576	}
577	/* fall through */	577	fallthrough;
578	case XPC_ACTIVATE_MQ_MSG_MARK_ENGAGED_UV:	578	case XPC_ACTIVATE_MQ_MSG_MARK_ENGAGED_UV:
579	spin_lock_irqsave(&part_uv->flags_lock, irq_flags);	579	spin_lock_irqsave(&part_uv->flags_lock, irq_flags);
580	part_uv->flags \|= XPC_P_ENGAGED_UV;	580	part_uv->flags \|= XPC_P_ENGAGED_UV;

drivers/mmc/core/host.c+1−1

@@ -191,7 +191,7 @@ int mmc_of_parse(struct mmc_host *host) · 190 unmodified lines
191	switch (bus_width) {	191	switch (bus_width) {
192	case 8:	192	case 8:
193	host->caps \|= MMC_CAP_8_BIT_DATA;	193	host->caps \|= MMC_CAP_8_BIT_DATA;
194	/* fall through - Hosts capable of 8-bit can also do 4 bits */	194	fallthrough; /* Hosts capable of 8-bit can also do 4 bits */
195	case 4:	195	case 4:
196	host->caps \|= MMC_CAP_4_BIT_DATA;	196	host->caps \|= MMC_CAP_4_BIT_DATA;
197	break;	197	break;

drivers/mmc/host/atmel-mci.c+4−4

@@ -2418,7 +2418,7 @@ static void atmci_get_cap(struct atmel_mci *host) · 2417 unmodified lines
2418	case 0x600:	2418	case 0x600:
2419	case 0x500:	2419	case 0x500:
2420	host->caps.has_odd_clk_div = 1;	2420	host->caps.has_odd_clk_div = 1;
2421	/* Fall through */	2421	fallthrough;
2422	case 0x400:	2422	case 0x400:
2423	case 0x300:	2423	case 0x300:
2424	host->caps.has_dma_conf_reg = 1;	2424	host->caps.has_dma_conf_reg = 1;
@@ -2426,16 +2426,16 @@ static void atmci_get_cap(struct atmel_mci *host) · 1 unmodified line
2426	host->caps.has_cfg_reg = 1;	2426	host->caps.has_cfg_reg = 1;
2427	host->caps.has_cstor_reg = 1;	2427	host->caps.has_cstor_reg = 1;
2428	host->caps.has_highspeed = 1;	2428	host->caps.has_highspeed = 1;
2429	/* Fall through */	2429	fallthrough;
2430	case 0x200:	2430	case 0x200:
2431	host->caps.has_rwproof = 1;	2431	host->caps.has_rwproof = 1;
2432	host->caps.need_blksz_mul_4 = 0;	2432	host->caps.need_blksz_mul_4 = 0;
2433	host->caps.need_notbusy_for_read_ops = 1;	2433	host->caps.need_notbusy_for_read_ops = 1;
2434	/* Fall through */	2434	fallthrough;
2435	case 0x100:	2435	case 0x100:
2436	host->caps.has_bad_data_ordering = 0;	2436	host->caps.has_bad_data_ordering = 0;
2437	host->caps.need_reset_after_xfer = 0;	2437	host->caps.need_reset_after_xfer = 0;
2438	/* Fall through */	2438	fallthrough;
2439	case 0x0:	2439	case 0x0:
2440	break;	2440	break;
2441	default:	2441	default:

drivers/mmc/host/davinci_mmc.c+1−1

@@ -300,7 +300,7 @@ static void mmc_davinci_start_command(struct mmc_davinci_host *host, · 299 unmodified lines
300	* then it's harmless for us to allow it.	300	* then it's harmless for us to allow it.
301	*/	301	*/
302	cmd_reg \|= MMCCMD_BSYEXP;	302	cmd_reg \|= MMCCMD_BSYEXP;
303	/* FALLTHROUGH */	303	fallthrough;
304	case MMC_RSP_R1: /* 48 bits, CRC */	304	case MMC_RSP_R1: /* 48 bits, CRC */
305	cmd_reg \|= MMCCMD_RSPFMT_R1456;	305	cmd_reg \|= MMCCMD_RSPFMT_R1456;
306	break;	306	break;

drivers/mmc/host/dw_mmc-k3.c+1−1

@@ -238,7 +238,7 @@ static void dw_mci_hs_set_timing(struct dw_mci *host, int timing, · 237 unmodified lines
238	if (smpl_phase >= USE_DLY_MIN_SMPL &&	238	if (smpl_phase >= USE_DLY_MIN_SMPL &&
239	smpl_phase <= USE_DLY_MAX_SMPL)	239	smpl_phase <= USE_DLY_MAX_SMPL)
240	use_smpl_dly = 1;	240	use_smpl_dly = 1;
241	/* fallthrough */	241	fallthrough;
242	case MMC_TIMING_UHS_SDR50:	242	case MMC_TIMING_UHS_SDR50:
243	if (smpl_phase >= ENABLE_SHIFT_MIN_SMPL &&	243	if (smpl_phase >= ENABLE_SHIFT_MIN_SMPL &&
244	smpl_phase <= ENABLE_SHIFT_MAX_SMPL)	244	smpl_phase <= ENABLE_SHIFT_MAX_SMPL)

drivers/mmc/host/dw_mmc.c+3−3

@@ -2030,7 +2030,7 @@ static void dw_mci_tasklet_func(unsigned long priv) · 2029 unmodified lines
2030	}	2030	}
2031		2031
2032	prev_state = state = STATE_SENDING_DATA;	2032	prev_state = state = STATE_SENDING_DATA;
2033	/* fall through */	2033	fallthrough;
2034		2034
2035	case STATE_SENDING_DATA:	2035	case STATE_SENDING_DATA:
2036	/*	2036	/*
@@ -2088,7 +2088,7 @@ static void dw_mci_tasklet_func(unsigned long priv) · 51 unmodified lines
2088	}	2088	}
2089	prev_state = state = STATE_DATA_BUSY;	2089	prev_state = state = STATE_DATA_BUSY;
2090		2090
2091	/* fall through */	2091	fallthrough;
2092		2092
2093	case STATE_DATA_BUSY:	2093	case STATE_DATA_BUSY:
2094	if (!dw_mci_clear_pending_data_complete(host)) {	2094	if (!dw_mci_clear_pending_data_complete(host)) {
@@ -2141,7 +2141,7 @@ static void dw_mci_tasklet_func(unsigned long priv) · 46 unmodified lines
2141	*/	2141	*/
2142	prev_state = state = STATE_SENDING_STOP;	2142	prev_state = state = STATE_SENDING_STOP;
2143		2143
2144	/* fall through */	2144	fallthrough;
2145		2145
2146	case STATE_SENDING_STOP:	2146	case STATE_SENDING_STOP:
2147	if (!dw_mci_clear_pending_cmd_complete(host))	2147	if (!dw_mci_clear_pending_cmd_complete(host))

drivers/mmc/host/jz4740_mmc.c+2−2

@@ -739,7 +739,7 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) · 738 unmodified lines
739	break;	739	break;
740		740
741	jz_mmc_prepare_data_transfer(host);	741	jz_mmc_prepare_data_transfer(host);
742	/* fall through */	742	fallthrough;
743		743
744	case JZ4740_MMC_STATE_TRANSFER_DATA:	744	case JZ4740_MMC_STATE_TRANSFER_DATA:
745	if (host->use_dma) {	745	if (host->use_dma) {
@@ -774,7 +774,7 @@ static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) · 28 unmodified lines
774	break;	774	break;
775	}	775	}
776	jz4740_mmc_write_irq_reg(host, JZ_MMC_IRQ_DATA_TRAN_DONE);	776	jz4740_mmc_write_irq_reg(host, JZ_MMC_IRQ_DATA_TRAN_DONE);
777	/* fall through */	777	fallthrough;
778		778
779	case JZ4740_MMC_STATE_SEND_STOP:	779	case JZ4740_MMC_STATE_SEND_STOP:
780	if (!req->stop)	780	if (!req->stop)

drivers/mmc/host/meson-mx-sdio.c+1−1

@@ -294,7 +294,7 @@ static void meson_mx_mmc_set_ios(struct mmc_host mmc, struct mmc_ios ios) · 293 unmodified lines
294	switch (ios->power_mode) {	294	switch (ios->power_mode) {
295	case MMC_POWER_OFF:	295	case MMC_POWER_OFF:
296	vdd = 0;	296	vdd = 0;
297	/* fall through */	297	fallthrough;
298	case MMC_POWER_UP:	298	case MMC_POWER_UP:
299	if (!IS_ERR(mmc->supply.vmmc)) {	299	if (!IS_ERR(mmc->supply.vmmc)) {
300	host->error = mmc_regulator_set_ocr(mmc,	300	host->error = mmc_regulator_set_ocr(mmc,

drivers/mmc/host/mtk-sd.c+13−0

 #include <linux/slab.h>
 #include <linux/spinlock.h>
 #include <linux/interrupt.h>
+#include <linux/reset.h>
 #include <linux/mmc/card.h>
 #include <linux/mmc/core.h>
 	struct pinctrl_state *pins_uhs;
 	struct delayed_work req_timeout;
 	int irq;		/* host interrupt */
+	struct reset_control *reset;
 	struct clk *src_clk;	/* msdc source clock */
 	struct clk *h_clk;      /* msdc h_clk */
 	u32 val;
 	u32 tune_reg = host->dev_comp->pad_tune_reg;
+	if (host->reset) {
+		reset_control_assert(host->reset);
+		usleep_range(10, 50);
+		reset_control_deassert(host->reset);
+	}
 	/* Configure to MMC/SD mode, clock free running */
 	sdr_set_bits(host->base + MSDC_CFG, MSDC_CFG_MODE | MSDC_CFG_CKPDN);
 	if (IS_ERR(host->src_clk_cg))
 		host->src_clk_cg = NULL;
+	host->reset = devm_reset_control_get_optional_exclusive(&pdev->dev,
+								"hrst");
+	if (IS_ERR(host->reset))
+		return PTR_ERR(host->reset);
 	host->irq = platform_get_irq(pdev, 0);
 	if (host->irq < 0) {
 		ret = -EINVAL;

drivers/mmc/host/renesas_sdhi_core.c+1−1

@@ -685,7 +685,7 @@ static int renesas_sdhi_write16_hook(struct tmio_mmc_host *host, int addr) · 684 unmodified lines
685	case HOST_MODE:	685	case HOST_MODE:
686	if (host->pdata->flags & TMIO_MMC_HAVE_CBSY)	686	if (host->pdata->flags & TMIO_MMC_HAVE_CBSY)
687	bit = TMIO_STAT_CMD_BUSY;	687	bit = TMIO_STAT_CMD_BUSY;
688	/* fallthrough */	688	fallthrough;
689	case CTL_SD_CARD_CLK_CTL:	689	case CTL_SD_CARD_CLK_CTL:
690	return renesas_sdhi_wait_idle(host, bit);	690	return renesas_sdhi_wait_idle(host, bit);
691	}	691	}

drivers/mmc/host/sdhci-acpi.c+57−10

@@ -535,6 +535,11 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = { · 534 unmodified lines
535	.caps = MMC_CAP_NONREMOVABLE,	535	.caps = MMC_CAP_NONREMOVABLE,
536	};	536	};
537		537
		538	struct amd_sdhci_host {
		539	bool tuned_clock;
		540	bool dll_enabled;
		541	};
		542
538	/* AMD sdhci reset dll register. */	543	/* AMD sdhci reset dll register. */
539	#define SDHCI_AMD_RESET_DLL_REGISTER 0x908	544	#define SDHCI_AMD_RESET_DLL_REGISTER 0x908
540		545
@@ -555,26 +560,66 @@ static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host) · 14 unmodified lines
555	}	560	}
556		561
557	/*	562	/*
558	* For AMD Platform it is required to disable the tuning	563	* The initialization sequence for HS400 is:
559	* bit first controller to bring to HS Mode from HS200	564	* HS->HS200->Perform Tuning->HS->HS400
560	* mode, later enable to tune to HS400 mode.	565	*
		566	* The re-tuning sequence is:
		567	* HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
		568	*
		569	* The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
		570	* mode. If we switch to a different mode, we need to disable the tuned clock.
		571	* If we have previously performed tuning and switch back to HS200 or
		572	* HS400, we can re-enable the tuned clock.
		573	*
561	*/	574	*/
562	static void amd_set_ios(struct mmc_host mmc, struct mmc_ios ios)	575	static void amd_set_ios(struct mmc_host mmc, struct mmc_ios ios)
563	{	576	{
564	struct sdhci_host *host = mmc_priv(mmc);	577	struct sdhci_host *host = mmc_priv(mmc);
		578	struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
		579	struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
565	unsigned int old_timing = host->timing;	580	unsigned int old_timing = host->timing;
		581	u16 val;
566		582
567	sdhci_set_ios(mmc, ios);	583	sdhci_set_ios(mmc, ios);
568	if (old_timing == MMC_TIMING_MMC_HS200 &&	584
569	ios->timing == MMC_TIMING_MMC_HS)	585	if (old_timing != host->timing && amd_host->tuned_clock) {
570	sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);	586	if (host->timing == MMC_TIMING_MMC_HS400 \|\|
571	if (old_timing != MMC_TIMING_MMC_HS400 &&	587	host->timing == MMC_TIMING_MMC_HS200) {
572	ios->timing == MMC_TIMING_MMC_HS400) {	588	val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
573	sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);	589	val \|= SDHCI_CTRL_TUNED_CLK;
574	sdhci_acpi_amd_hs400_dll(host);	590	sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
		591	} else {
		592	val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
		593	val &= ~SDHCI_CTRL_TUNED_CLK;
		594	sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
		595	}
		596
		597	/* DLL is only required for HS400 */
		598	if (host->timing == MMC_TIMING_MMC_HS400 &&
		599	!amd_host->dll_enabled) {
		600	sdhci_acpi_amd_hs400_dll(host);
		601	amd_host->dll_enabled = true;
		602	}
575	}	603	}
576	}	604	}
577		605
		606	static int amd_sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
		607	{
		608	int err;
		609	struct sdhci_host *host = mmc_priv(mmc);
		610	struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
		611	struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
		612
		613	amd_host->tuned_clock = false;
		614
		615	err = sdhci_execute_tuning(mmc, opcode);
		616
		617	if (!err && !host->tuning_err)
		618	amd_host->tuned_clock = true;
		619
		620	return err;
		621	}
		622
578	static const struct sdhci_ops sdhci_acpi_ops_amd = {	623	static const struct sdhci_ops sdhci_acpi_ops_amd = {
579	.set_clock = sdhci_set_clock,	624	.set_clock = sdhci_set_clock,
580	.set_bus_width = sdhci_set_bus_width,	625	.set_bus_width = sdhci_set_bus_width,
@@ -602,6 +647,7 @@ static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev, · 21 unmodified lines
602		647
603	host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;	648	host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
604	host->mmc_host_ops.set_ios = amd_set_ios;	649	host->mmc_host_ops.set_ios = amd_set_ios;
		650	host->mmc_host_ops.execute_tuning = amd_sdhci_execute_tuning;
605	return 0;	651	return 0;
606	}	652	}
607		653
@@ -613,6 +659,7 @@ static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { · 5 unmodified lines
613	SDHCI_QUIRK_32BIT_ADMA_SIZE,	659	SDHCI_QUIRK_32BIT_ADMA_SIZE,
614	.quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,	660	.quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
615	.probe_slot = sdhci_acpi_emmc_amd_probe_slot,	661	.probe_slot = sdhci_acpi_emmc_amd_probe_slot,
		662	.priv_size = sizeof(struct amd_sdhci_host),
616	};	663	};
617		664
618	struct sdhci_acpi_uid_slot {	665	struct sdhci_acpi_uid_slot {

drivers/mmc/host/sdhci-esdhc-imx.c+1−1

@@ -1556,7 +1556,7 @@ static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev, · 1555 unmodified lines
1556	"failed to request card-detect gpio!\n");	1556	"failed to request card-detect gpio!\n");
1557	return err;	1557	return err;
1558	}	1558	}
1559	/* fall through */	1559	fallthrough;
1560		1560
1561	case ESDHC_CD_CONTROLLER:	1561	case ESDHC_CD_CONTROLLER:
1562	/* we have a working card_detect back */	1562	/* we have a working card_detect back */

drivers/mmc/host/sdhci-pci-core.c+9−1

 	sdhci_dumpregs(mmc_priv(mmc));
 }
+static void sdhci_cqhci_reset(struct sdhci_host *host, u8 mask)
+{
+	if ((host->mmc->caps2 & MMC_CAP2_CQE) && (mask & SDHCI_RESET_ALL) &&
+	    host->mmc->cqe_private)
+		cqhci_deactivate(host->mmc);
+	sdhci_reset(host, mask);
+}
 /*****************************************************************************\
  *                                                                           *
  * Hardware specific quirk handling                                          *
 	.set_power		= sdhci_intel_set_power,
 	.enable_dma		= sdhci_pci_enable_dma,
 	.set_bus_width		= sdhci_set_bus_width,
-	.reset			= sdhci_reset,
+	.reset			= sdhci_cqhci_reset,
 	.set_uhs_signaling	= sdhci_set_uhs_signaling,
 	.hw_reset		= sdhci_pci_hw_reset,
 	.irq			= sdhci_cqhci_irq,

drivers/mmc/host/sdhci-s3c.c+1−1

@@ -609,7 +609,7 @@ static int sdhci_s3c_probe(struct platform_device *pdev) · 608 unmodified lines
609	switch (pdata->max_width) {	609	switch (pdata->max_width) {
610	case 8:	610	case 8:
611	host->mmc->caps \|= MMC_CAP_8_BIT_DATA;	611	host->mmc->caps \|= MMC_CAP_8_BIT_DATA;
612	/* Fall through */	612	fallthrough;
613	case 4:	613	case 4:
614	host->mmc->caps \|= MMC_CAP_4_BIT_DATA;	614	host->mmc->caps \|= MMC_CAP_4_BIT_DATA;
615	break;	615	break;

drivers/mmc/host/sdhci-sprd.c+1−1

@@ -470,7 +470,7 @@ static int sdhci_sprd_voltage_switch(struct mmc_host mmc, struct mmc_ios ios) · 469 unmodified lines
470	break;	470	break;
471		471
472	default:	472	default:
473	/* fall-through */	473	fallthrough;
474	case MMC_SIGNAL_VOLTAGE_330:	474	case MMC_SIGNAL_VOLTAGE_330:
475	ret = pinctrl_select_state(sprd_host->pinctrl,	475	ret = pinctrl_select_state(sprd_host->pinctrl,
476	sprd_host->pins_default);	476	sprd_host->pins_default);

drivers/mmc/host/sdhci-tegra.c+51−4

 #define NVQUIRK_DIS_CARD_CLK_CONFIG_TAP			BIT(8)
 #define NVQUIRK_CQHCI_DCMD_R1B_CMD_TIMING		BIT(9)
+/*
+ * NVQUIRK_HAS_TMCLK is for SoC's having separate timeout clock for Tegra
+ * SDMMC hardware data timeout.
+ */
+#define NVQUIRK_HAS_TMCLK				BIT(10)
 /* SDMMC CQE Base Address for Tegra Host Ver 4.1 and Higher */
 #define SDHCI_TEGRA_CQE_BASE_ADDR			0xF000
 struct sdhci_tegra {
 	const struct sdhci_tegra_soc_data *soc_data;
 	struct gpio_desc *power_gpio;
+	struct clk *tmclk;
 	bool ddr_signaling;
 	bool pad_calib_required;
 	bool pad_control_available;
 static const struct sdhci_pltfm_data sdhci_tegra210_pdata = {
 	.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
-		  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
 		  SDHCI_QUIRK_SINGLE_POWER_WRITE |
 		  SDHCI_QUIRK_NO_HISPD_BIT |
 		  SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
 		    NVQUIRK_HAS_PADCALIB |
 		    NVQUIRK_DIS_CARD_CLK_CONFIG_TAP |
 		    NVQUIRK_ENABLE_SDR50 |
-		    NVQUIRK_ENABLE_SDR104,
+		    NVQUIRK_ENABLE_SDR104 |
+		    NVQUIRK_HAS_TMCLK,
 	.min_tap_delay = 106,
 	.max_tap_delay = 185,
 };
 static const struct sdhci_pltfm_data sdhci_tegra186_pdata = {
 	.quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |
-		  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
 		  SDHCI_QUIRK_SINGLE_POWER_WRITE |
 		  SDHCI_QUIRK_NO_HISPD_BIT |
 		  SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC |
 		    NVQUIRK_DIS_CARD_CLK_CONFIG_TAP |
 		    NVQUIRK_ENABLE_SDR50 |
 		    NVQUIRK_ENABLE_SDR104 |
+		    NVQUIRK_HAS_TMCLK |
 		    NVQUIRK_CQHCI_DCMD_R1B_CMD_TIMING,
 	.min_tap_delay = 84,
 	.max_tap_delay = 136,
 		    NVQUIRK_HAS_PADCALIB |
 		    NVQUIRK_DIS_CARD_CLK_CONFIG_TAP |
 		    NVQUIRK_ENABLE_SDR50 |
-		    NVQUIRK_ENABLE_SDR104,
+		    NVQUIRK_ENABLE_SDR104 |
+		    NVQUIRK_HAS_TMCLK,
 	.min_tap_delay = 96,
 	.max_tap_delay = 139,
 };
 		goto err_power_req;
 	}
+	/*
+	 * Tegra210 has a separate SDMMC_LEGACY_TM clock used for host
+	 * timeout clock and SW can choose TMCLK or SDCLK for hardware
+	 * data timeout through the bit USE_TMCLK_FOR_DATA_TIMEOUT of
+	 * the register SDHCI_TEGRA_VENDOR_SYS_SW_CTRL.
+	 *
+	 * USE_TMCLK_FOR_DATA_TIMEOUT bit default is set to 1 and SDMMC uses
+	 * 12Mhz TMCLK which is advertised in host capability register.
+	 * With TMCLK of 12Mhz provides maximum data timeout period that can
+	 * be achieved is 11s better than using SDCLK for data timeout.
+	 *
+	 * So, TMCLK is set to 12Mhz and kept enabled all the time on SoC's
+	 * supporting separate TMCLK.
+	 */
+	if (soc_data->nvquirks & NVQUIRK_HAS_TMCLK) {
+		clk = devm_clk_get(&pdev->dev, "tmclk");
+		if (IS_ERR(clk)) {
+			rc = PTR_ERR(clk);
+			if (rc == -EPROBE_DEFER)
+				goto err_power_req;
+			dev_warn(&pdev->dev, "failed to get tmclk: %d\n", rc);
+			clk = NULL;
+		}
+		clk_set_rate(clk, 12000000);
+		rc = clk_prepare_enable(clk);
+		if (rc) {
+			dev_err(&pdev->dev,
+				"failed to enable tmclk: %d\n", rc);
+			goto err_power_req;
+		}
+		tegra_host->tmclk = clk;
+	}
 	clk = devm_clk_get(mmc_dev(host->mmc), NULL);
 	if (IS_ERR(clk)) {
 		rc = PTR_ERR(clk);
 err_rst_get:
 	clk_disable_unprepare(pltfm_host->clk);
 err_clk_get:
+	clk_disable_unprepare(tegra_host->tmclk);
 err_power_req:
 err_parse_dt:
 	sdhci_pltfm_free(pdev);
 	reset_control_assert(tegra_host->rst);
 	usleep_range(2000, 4000);
 	clk_disable_unprepare(pltfm_host->clk);
+	clk_disable_unprepare(tegra_host->tmclk);
 	sdhci_pltfm_free(pdev);

drivers/mmc/host/sdhci-xenon-phy.c+1−1

@@ -527,7 +527,7 @@ static bool xenon_emmc_phy_slow_mode(struct sdhci_host *host, · 526 unmodified lines
527	ret = true;	527	ret = true;
528	break;	528	break;
529	}	529	}
530	/* fall through */	530	fallthrough;
531	default:	531	default:
532	reg &= ~XENON_TIMING_ADJUST_SLOW_MODE;	532	reg &= ~XENON_TIMING_ADJUST_SLOW_MODE;
533	ret = false;	533	ret = false;

drivers/mmc/host/sdhci.c+1−1

@@ -2825,7 +2825,7 @@ int sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode) · 2824 unmodified lines
2825	case MMC_TIMING_UHS_SDR50:	2825	case MMC_TIMING_UHS_SDR50:
2826	if (host->flags & SDHCI_SDR50_NEEDS_TUNING)	2826	if (host->flags & SDHCI_SDR50_NEEDS_TUNING)
2827	break;	2827	break;
2828	/* FALLTHROUGH */	2828	fallthrough;
2829		2829
2830	default:	2830	default:
2831	goto out;	2831	goto out;

drivers/mmc/host/tifm_sd.c+1−1

@@ -335,7 +335,7 @@ static unsigned int tifm_sd_op_flags(struct mmc_command *cmd) · 334 unmodified lines
335	break;	335	break;
336	case MMC_RSP_R1B:	336	case MMC_RSP_R1B:
337	rc \|= TIFM_MMCSD_RSP_BUSY;	337	rc \|= TIFM_MMCSD_RSP_BUSY;
338	/* fall-through */	338	fallthrough;
339	case MMC_RSP_R1:	339	case MMC_RSP_R1:
340	rc \|= TIFM_MMCSD_RSP_R1;	340	rc \|= TIFM_MMCSD_RSP_R1;
341	break;	341	break;

drivers/mmc/host/usdhi6rol0.c+3−3

@@ -1343,7 +1343,7 @@ static int usdhi6_stop_cmd(struct usdhi6_host *host) · 1342 unmodified lines
1343	host->wait = USDHI6_WAIT_FOR_STOP;	1343	host->wait = USDHI6_WAIT_FOR_STOP;
1344	return 0;	1344	return 0;
1345	}	1345	}
1346	/* fall through - Unsupported STOP command. */	1346	fallthrough; /* Unsupported STOP command */
1347	default:	1347	default:
1348	dev_err(mmc_dev(host->mmc),	1348	dev_err(mmc_dev(host->mmc),
1349	"unsupported stop CMD%d for CMD%d\n",	1349	"unsupported stop CMD%d for CMD%d\n",
@@ -1691,7 +1691,7 @@ static void usdhi6_timeout_work(struct work_struct *work) · 341 unmodified lines
1691	switch (host->wait) {	1691	switch (host->wait) {
1692	default:	1692	default:
1693	dev_err(mmc_dev(host->mmc), "Invalid state %u\n", host->wait);	1693	dev_err(mmc_dev(host->mmc), "Invalid state %u\n", host->wait);
1694	/* fall through - mrq can be NULL, but is impossible. */	1694	fallthrough; /* mrq can be NULL, but is impossible */
1695	case USDHI6_WAIT_FOR_CMD:	1695	case USDHI6_WAIT_FOR_CMD:
1696	usdhi6_error_code(host);	1696	usdhi6_error_code(host);
1697	if (mrq)	1697	if (mrq)
@@ -1713,7 +1713,7 @@ static void usdhi6_timeout_work(struct work_struct *work) · 15 unmodified lines
1713	host->offset, data->blocks, data->blksz, data->sg_len,	1713	host->offset, data->blocks, data->blksz, data->sg_len,
1714	sg_dma_len(sg), sg->offset);	1714	sg_dma_len(sg), sg->offset);
1715	usdhi6_sg_unmap(host, true);	1715	usdhi6_sg_unmap(host, true);
1716	/* fall through - page unmapped in USDHI6_WAIT_FOR_DATA_END. */	1716	fallthrough; /* page unmapped in USDHI6_WAIT_FOR_DATA_END */
1717	case USDHI6_WAIT_FOR_DATA_END:	1717	case USDHI6_WAIT_FOR_DATA_END:
1718	usdhi6_error_code(host);	1718	usdhi6_error_code(host);
1719	data->error = -ETIMEDOUT;	1719	data->error = -ETIMEDOUT;

drivers/mux/adgs1408.c+1−1

@@ -93,7 +93,7 @@ static int adgs1408_probe(struct spi_device *spi) · 92 unmodified lines
93	mux->idle_state = idle_state;	93	mux->idle_state = idle_state;
94	break;	94	break;
95	}	95	}
96	/* fall through */	96	fallthrough;
97	default:	97	default:
98	dev_err(dev, "invalid idle-state %d\n", idle_state);	98	dev_err(dev, "invalid idle-state %d\n", idle_state);
99	return -EINVAL;	99	return -EINVAL;

drivers/net/appletalk/cops.c+1−1

@@ -301,7 +301,7 @@ static int __init cops_probe1(struct net_device *dev, int ioaddr) · 300 unmodified lines
301	dev->irq = cops_irq(ioaddr, board);	301	dev->irq = cops_irq(ioaddr, board);
302	if (dev->irq)	302	if (dev->irq)
303	break;	303	break;
304	/* fall through - Once no IRQ found on this port. */	304	fallthrough; /* Once no IRQ found on this port */
305	case 1:	305	case 1:
306	retval = -EINVAL;	306	retval = -EINVAL;
307	goto err_out;	307	goto err_out;

drivers/net/arcnet/arc-rimi.c+3−3

@@ -363,13 +363,13 @@ static int __init arcrimi_setup(char *s) · 362 unmodified lines
363	switch (ints[0]) {	363	switch (ints[0]) {
364	default: /* ERROR */	364	default: /* ERROR */
365	pr_err("Too many arguments\n");	365	pr_err("Too many arguments\n");
366	/* Fall through */	366	fallthrough;
367	case 3: /* Node ID */	367	case 3: /* Node ID */
368	node = ints[3];	368	node = ints[3];
369	/* Fall through */	369	fallthrough;
370	case 2: /* IRQ */	370	case 2: /* IRQ */
371	irq = ints[2];	371	irq = ints[2];
372	/* Fall through */	372	fallthrough;
373	case 1: /* IO address */	373	case 1: /* IO address */
374	io = ints[1];	374	io = ints[1];
375	}	375	}

drivers/net/arcnet/com20020-isa.c+6−6

@@ -197,22 +197,22 @@ static int __init com20020isa_setup(char *s) · 196 unmodified lines
197	switch (ints[0]) {	197	switch (ints[0]) {
198	default: /* ERROR */	198	default: /* ERROR */
199	pr_info("Too many arguments\n");	199	pr_info("Too many arguments\n");
200	/* Fall through */	200	fallthrough;
201	case 6: /* Timeout */	201	case 6: /* Timeout */
202	timeout = ints[6];	202	timeout = ints[6];
203	/* Fall through */	203	fallthrough;
204	case 5: /* CKP value */	204	case 5: /* CKP value */
205	clockp = ints[5];	205	clockp = ints[5];
206	/* Fall through */	206	fallthrough;
207	case 4: /* Backplane flag */	207	case 4: /* Backplane flag */
208	backplane = ints[4];	208	backplane = ints[4];
209	/* Fall through */	209	fallthrough;
210	case 3: /* Node ID */	210	case 3: /* Node ID */
211	node = ints[3];	211	node = ints[3];
212	/* Fall through */	212	fallthrough;
213	case 2: /* IRQ */	213	case 2: /* IRQ */
214	irq = ints[2];	214	irq = ints[2];
215	/* Fall through */	215	fallthrough;
216	case 1: /* IO address */	216	case 1: /* IO address */
217	io = ints[1];	217	io = ints[1];
218	}	218	}

drivers/net/arcnet/com90io.c+2−2

@@ -363,10 +363,10 @@ static int __init com90io_setup(char *s) · 362 unmodified lines
363	switch (ints[0]) {	363	switch (ints[0]) {
364	default: /* ERROR */	364	default: /* ERROR */
365	pr_err("Too many arguments\n");	365	pr_err("Too many arguments\n");
366	/* Fall through */	366	fallthrough;
367	case 2: /* IRQ */	367	case 2: /* IRQ */
368	irq = ints[2];	368	irq = ints[2];
369	/* Fall through */	369	fallthrough;
370	case 1: /* IO address */	370	case 1: /* IO address */
371	io = ints[1];	371	io = ints[1];
372	}	372	}

drivers/net/arcnet/com90xx.c+3−3

@@ -693,13 +693,13 @@ static int __init com90xx_setup(char *s) · 692 unmodified lines
693	switch (ints[0]) {	693	switch (ints[0]) {
694	default: /* ERROR */	694	default: /* ERROR */
695	pr_err("Too many arguments\n");	695	pr_err("Too many arguments\n");
696	/* Fall through */	696	fallthrough;
697	case 3: /* Mem address */	697	case 3: /* Mem address */
698	shmem = ints[3];	698	shmem = ints[3];
699	/* Fall through */	699	fallthrough;
700	case 2: /* IRQ */	700	case 2: /* IRQ */
701	irq = ints[2];	701	irq = ints[2];
702	/* Fall through */	702	fallthrough;
703	case 1: /* IO address */	703	case 1: /* IO address */
704	io = ints[1];	704	io = ints[1];
705	}	705	}

drivers/net/bonding/bond_3ad.c+2−2

@@ -1149,7 +1149,7 @@ static void ad_rx_machine(struct lacpdu lacpdu, struct port port) · 1148 unmodified lines
1149	port->actor_oper_port_state &= ~LACP_STATE_EXPIRED;	1149	port->actor_oper_port_state &= ~LACP_STATE_EXPIRED;
1150	port->sm_rx_state = AD_RX_PORT_DISABLED;	1150	port->sm_rx_state = AD_RX_PORT_DISABLED;
1151		1151
1152	/* Fall Through */	1152	fallthrough;
1153	case AD_RX_PORT_DISABLED:	1153	case AD_RX_PORT_DISABLED:
1154	port->sm_vars &= ~AD_PORT_MATCHED;	1154	port->sm_vars &= ~AD_PORT_MATCHED;
1155	break;	1155	break;
@@ -1588,7 +1588,7 @@ static struct aggregator ad_agg_selection_test(struct aggregator best, · 432 unmodified lines
1588	if (__agg_active_ports(curr) < __agg_active_ports(best))	1588	if (__agg_active_ports(curr) < __agg_active_ports(best))
1589	return best;	1589	return best;
1590		1590
1591	/FALLTHROUGH/	1591	fallthrough;
1592	case BOND_AD_STABLE:	1592	case BOND_AD_STABLE:
1593	case BOND_AD_BANDWIDTH:	1593	case BOND_AD_BANDWIDTH:
1594	if (__get_agg_bandwidth(curr) > __get_agg_bandwidth(best))	1594	if (__get_agg_bandwidth(curr) > __get_agg_bandwidth(best))

drivers/net/bonding/bond_main.c+4−4

@@ -2274,7 +2274,7 @@ static int bond_miimon_inspect(struct bonding *bond) · 2273 unmodified lines
2274	"active " : "backup ") : "",	2274	"active " : "backup ") : "",
2275	bond->params.downdelay * bond->params.miimon);	2275	bond->params.downdelay * bond->params.miimon);
2276	}	2276	}
2277	/FALLTHRU/	2277	fallthrough;
2278	case BOND_LINK_FAIL:	2278	case BOND_LINK_FAIL:
2279	if (link_state) {	2279	if (link_state) {
2280	/* recovered before downdelay expired */	2280	/* recovered before downdelay expired */
@@ -2310,7 +2310,7 @@ static int bond_miimon_inspect(struct bonding *bond) · 29 unmodified lines
2310	bond->params.updelay *	2310	bond->params.updelay *
2311	bond->params.miimon);	2311	bond->params.miimon);
2312	}	2312	}
2313	/FALLTHRU/	2313	fallthrough;
2314	case BOND_LINK_BACK:	2314	case BOND_LINK_BACK:
2315	if (!link_state) {	2315	if (!link_state) {
2316	bond_propose_link_state(slave, BOND_LINK_DOWN);	2316	bond_propose_link_state(slave, BOND_LINK_DOWN);
@@ -3322,7 +3322,7 @@ static int bond_slave_netdev_event(unsigned long event, · 1005 unmodified lines
3322		3322
3323	if (BOND_MODE(bond) == BOND_MODE_8023AD)	3323	if (BOND_MODE(bond) == BOND_MODE_8023AD)
3324	bond_3ad_adapter_speed_duplex_changed(slave);	3324	bond_3ad_adapter_speed_duplex_changed(slave);
3325	/* Fallthrough */	3325	fallthrough;
3326	case NETDEV_DOWN:	3326	case NETDEV_DOWN:
3327	/* Refresh slave-array if applicable!	3327	/* Refresh slave-array if applicable!
3328	* If the setup does not use miimon or arpmon (mode-specific!),	3328	* If the setup does not use miimon or arpmon (mode-specific!),
@@ -3760,7 +3760,7 @@ static int bond_do_ioctl(struct net_device bond_dev, struct ifreq ifr, int cmd · 431 unmodified lines
3760	return -EINVAL;	3760	return -EINVAL;
3761		3761
3762	mii->phy_id = 0;	3762	mii->phy_id = 0;
3763	/* Fall Through */	3763	fallthrough;
3764	case SIOCGMIIREG:	3764	case SIOCGMIIREG:
3765	/* We do this again just in case we were called by SIOCGMIIREG	3765	/* We do this again just in case we were called by SIOCGMIIREG
3766	* instead of SIOCGMIIPHY.	3766	* instead of SIOCGMIIPHY.

drivers/net/can/at91_can.c+2−2

@@ -898,7 +898,7 @@ static void at91_irq_err_state(struct net_device *dev, · 897 unmodified lines
898	CAN_ERR_CRTL_TX_WARNING :	898	CAN_ERR_CRTL_TX_WARNING :
899	CAN_ERR_CRTL_RX_WARNING;	899	CAN_ERR_CRTL_RX_WARNING;
900	}	900	}
901	/* fall through */	901	fallthrough;
902	case CAN_STATE_ERROR_WARNING:	902	case CAN_STATE_ERROR_WARNING:
903	/*	903	/*
904	* from: ERROR_ACTIVE, ERROR_WARNING	904	* from: ERROR_ACTIVE, ERROR_WARNING
@@ -948,7 +948,7 @@ static void at91_irq_err_state(struct net_device *dev, · 43 unmodified lines
948	netdev_dbg(dev, "Error Active\n");	948	netdev_dbg(dev, "Error Active\n");
949	cf->can_id \|= CAN_ERR_PROT;	949	cf->can_id \|= CAN_ERR_PROT;
950	cf->data[2] = CAN_ERR_PROT_ACTIVE;	950	cf->data[2] = CAN_ERR_PROT_ACTIVE;
951	/* fall through */	951	fallthrough;
952	case CAN_STATE_ERROR_WARNING:	952	case CAN_STATE_ERROR_WARNING:
953	reg_idr = AT91_IRQ_ERRA \| AT91_IRQ_WARN \| AT91_IRQ_BOFF;	953	reg_idr = AT91_IRQ_ERRA \| AT91_IRQ_WARN \| AT91_IRQ_BOFF;
954	reg_ier = AT91_IRQ_ERRP;	954	reg_ier = AT91_IRQ_ERRP;

drivers/net/can/peak_canfd/peak_pciefd_main.c+1−1

@@ -659,7 +659,7 @@ static int pciefd_can_probe(struct pciefd_board *pciefd) · 658 unmodified lines
659	pciefd_can_writereg(priv, CANFD_CLK_SEL_80MHZ,	659	pciefd_can_writereg(priv, CANFD_CLK_SEL_80MHZ,
660	PCIEFD_REG_CAN_CLK_SEL);	660	PCIEFD_REG_CAN_CLK_SEL);
661		661
662	/* fall through */	662	fallthrough;
663	case CANFD_CLK_SEL_80MHZ:	663	case CANFD_CLK_SEL_80MHZ:
664	priv->ucan.can.clock.freq = 80 * 1000 * 1000;	664	priv->ucan.can.clock.freq = 80 * 1000 * 1000;
665	break;	665	break;

drivers/net/can/sja1000/sja1000_platform.c+1−1

@@ -150,7 +150,7 @@ static void sp_populate_of(struct sja1000_priv priv, struct device_node of) · 149 unmodified lines
150	priv->read_reg = sp_read_reg16;	150	priv->read_reg = sp_read_reg16;
151	priv->write_reg = sp_write_reg16;	151	priv->write_reg = sp_write_reg16;
152	break;	152	break;
153	case 1: /* fallthrough */	153	case 1:
154	default:	154	default:
155	priv->read_reg = sp_read_reg8;	155	priv->read_reg = sp_read_reg8;
156	priv->write_reg = sp_write_reg8;	156	priv->write_reg = sp_write_reg8;

drivers/net/can/slcan.c+2−2

@@ -153,7 +153,7 @@ static void slc_bump(struct slcan *sl) · 152 unmodified lines
153	switch (*cmd) {	153	switch (*cmd) {
154	case 'r':	154	case 'r':
155	cf.can_id = CAN_RTR_FLAG;	155	cf.can_id = CAN_RTR_FLAG;
156	/* fallthrough */	156	fallthrough;
157	case 't':	157	case 't':
158	/* store dlc ASCII value and terminate SFF CAN ID string */	158	/* store dlc ASCII value and terminate SFF CAN ID string */
159	cf.can_dlc = sl->rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN];	159	cf.can_dlc = sl->rbuff[SLC_CMD_LEN + SLC_SFF_ID_LEN];
@@ -163,7 +163,7 @@ static void slc_bump(struct slcan *sl) · 3 unmodified lines
163	break;	163	break;
164	case 'R':	164	case 'R':
165	cf.can_id = CAN_RTR_FLAG;	165	cf.can_id = CAN_RTR_FLAG;
166	/* fallthrough */	166	fallthrough;
167	case 'T':	167	case 'T':
168	cf.can_id \|= CAN_EFF_FLAG;	168	cf.can_id \|= CAN_EFF_FLAG;
169	/* store dlc ASCII value and terminate EFF CAN ID string */	169	/* store dlc ASCII value and terminate EFF CAN ID string */

drivers/net/can/spi/mcp251x.c+1−1

@@ -864,7 +864,7 @@ static irqreturn_t mcp251x_can_ist(int irq, void *dev_id) · 863 unmodified lines
864	if (new_state >= CAN_STATE_ERROR_WARNING &&	864	if (new_state >= CAN_STATE_ERROR_WARNING &&
865	new_state <= CAN_STATE_BUS_OFF)	865	new_state <= CAN_STATE_BUS_OFF)
866	priv->can.can_stats.error_warning++;	866	priv->can.can_stats.error_warning++;
867	/* fall through */	867	fallthrough;
868	case CAN_STATE_ERROR_WARNING:	868	case CAN_STATE_ERROR_WARNING:
869	if (new_state >= CAN_STATE_ERROR_PASSIVE &&	869	if (new_state >= CAN_STATE_ERROR_PASSIVE &&
870	new_state <= CAN_STATE_BUS_OFF)	870	new_state <= CAN_STATE_BUS_OFF)

drivers/net/can/usb/peak_usb/pcan_usb.c+1−1

@@ -415,7 +415,7 @@ static int pcan_usb_decode_error(struct pcan_usb_msg_context *mc, u8 n, · 414 unmodified lines
415	new_state = CAN_STATE_ERROR_WARNING;	415	new_state = CAN_STATE_ERROR_WARNING;
416	break;	416	break;
417	}	417	}
418	/* fall through */	418	fallthrough;
419		419
420	case CAN_STATE_ERROR_WARNING:	420	case CAN_STATE_ERROR_WARNING:
421	if (n & PCAN_USB_ERROR_BUS_HEAVY) {	421	if (n & PCAN_USB_ERROR_BUS_HEAVY) {

drivers/net/can/usb/peak_usb/pcan_usb_core.c+1−1

@@ -345,7 +345,7 @@ static netdev_tx_t peak_usb_ndo_start_xmit(struct sk_buff *skb, · 344 unmodified lines
345	default:	345	default:
346	netdev_warn(netdev, "tx urb submitting failed err=%d\n",	346	netdev_warn(netdev, "tx urb submitting failed err=%d\n",
347	err);	347	err);
348	/* fall through */	348	fallthrough;
349	case -ENOENT:	349	case -ENOENT:
350	/* cable unplugged */	350	/* cable unplugged */
351	stats->tx_dropped++;	351	stats->tx_dropped++;

drivers/net/can/usb/peak_usb/pcan_usb_pro.c+2−2

@@ -133,10 +133,10 @@ static int pcan_msg_add_rec(struct pcan_usb_pro_msg *pm, int id, ...) · 132 unmodified lines
133	switch (id) {	133	switch (id) {
134	case PCAN_USBPRO_TXMSG8:	134	case PCAN_USBPRO_TXMSG8:
135	i += 4;	135	i += 4;
136	/* fall through */	136	fallthrough;
137	case PCAN_USBPRO_TXMSG4:	137	case PCAN_USBPRO_TXMSG4:
138	i += 4;	138	i += 4;
139	/* fall through */	139	fallthrough;
140	case PCAN_USBPRO_TXMSG0:	140	case PCAN_USBPRO_TXMSG0:
141	*pc++ = va_arg(ap, int);	141	*pc++ = va_arg(ap, int);
142	*pc++ = va_arg(ap, int);	142	*pc++ = va_arg(ap, int);

drivers/net/dsa/b53/b53_common.c+1−1

@@ -1061,7 +1061,7 @@ static void b53_force_port_config(struct b53_device *dev, int port, · 1060 unmodified lines
1061	switch (speed) {	1061	switch (speed) {
1062	case 2000:	1062	case 2000:
1063	reg \|= PORT_OVERRIDE_SPEED_2000M;	1063	reg \|= PORT_OVERRIDE_SPEED_2000M;
1064	/* fallthrough */	1064	fallthrough;
1065	case SPEED_1000:	1065	case SPEED_1000:
1066	reg \|= PORT_OVERRIDE_SPEED_1000M;	1066	reg \|= PORT_OVERRIDE_SPEED_1000M;
1067	break;	1067	break;

drivers/net/dsa/b53/b53_serdes.c+1−1

@@ -170,7 +170,7 @@ void b53_serdes_phylink_validate(struct b53_device *dev, int port, · 169 unmodified lines
170	switch (lane) {	170	switch (lane) {
171	case 0:	171	case 0:
172	phylink_set(supported, 2500baseX_Full);	172	phylink_set(supported, 2500baseX_Full);
173	/* fallthrough */	173	fallthrough;
174	case 1:	174	case 1:
175	phylink_set(supported, 1000baseX_Full);	175	phylink_set(supported, 1000baseX_Full);
176	break;	176	break;

drivers/net/dsa/bcm_sf2.c+1−1

@@ -566,7 +566,7 @@ static void bcm_sf2_sw_mac_config(struct dsa_switch *ds, int port, · 565 unmodified lines
566	switch (state->interface) {	566	switch (state->interface) {
567	case PHY_INTERFACE_MODE_RGMII:	567	case PHY_INTERFACE_MODE_RGMII:
568	id_mode_dis = 1;	568	id_mode_dis = 1;
569	/* fallthrough */	569	fallthrough;
570	case PHY_INTERFACE_MODE_RGMII_TXID:	570	case PHY_INTERFACE_MODE_RGMII_TXID:
571	port_mode = EXT_GPHY;	571	port_mode = EXT_GPHY;
572	break;	572	break;

drivers/net/dsa/microchip/ksz9477.c+1−1

@@ -1083,7 +1083,7 @@ static phy_interface_t ksz9477_get_interface(struct ksz_device *dev, int port) · 1082 unmodified lines
1083	interface = PHY_INTERFACE_MODE_GMII;	1083	interface = PHY_INTERFACE_MODE_GMII;
1084	if (gbit)	1084	if (gbit)
1085	break;	1085	break;
1086	/* fall through */	1086	fallthrough;
1087	case 0:	1087	case 0:
1088	interface = PHY_INTERFACE_MODE_MII;	1088	interface = PHY_INTERFACE_MODE_MII;
1089	break;	1089	break;

drivers/net/dsa/mt7530.c+6−3

 	case P5_INTF_SEL_PHY_P0:
 		/* MT7530_P5_MODE_GPHY_P0: 2nd GMAC -> P5 -> P0 */
 		val |= MHWTRAP_PHY0_SEL;
-		/* fall through */
+		fallthrough;
 	case P5_INTF_SEL_PHY_P4:
 		/* MT7530_P5_MODE_GPHY_P4: 2nd GMAC -> P5 -> P4 */
 		val &= ~MHWTRAP_P5_MAC_SEL & ~MHWTRAP_P5_DIS;
 			if (phy_node->parent == priv->dev->of_node->parent) {
 				ret = of_get_phy_mode(mac_np, &interface);
-				if (ret && ret != -ENODEV)
+				if (ret && ret != -ENODEV) {
+					of_node_put(mac_np);
 					return ret;
+				}
 				id = of_mdio_parse_addr(ds->dev, phy_node);
 				if (id == 0)
 					priv->p5_intf_sel = P5_INTF_SEL_PHY_P0;
 				if (id == 4)
 					priv->p5_intf_sel = P5_INTF_SEL_PHY_P4;
 			}
+			of_node_put(mac_np);
 			of_node_put(phy_node);
 			break;
 		}
 		phylink_set(mask, 100baseT_Full);
 		if (state->interface != PHY_INTERFACE_MODE_MII) {
-			phylink_set(mask, 1000baseT_Half);
+			/* This switch only supports 1G full-duplex. */
 			phylink_set(mask, 1000baseT_Full);
 			if (port == 5)
 				phylink_set(mask, 1000baseX_Full);

drivers/net/dsa/mv88e6xxx/chip.c+1−1

@@ -875,7 +875,7 @@ static uint64_t _mv88e6xxx_get_ethtool_stat(struct mv88e6xxx_chip *chip, · 874 unmodified lines
875	break;	875	break;
876	case STATS_TYPE_BANK1:	876	case STATS_TYPE_BANK1:
877	reg = bank1_select;	877	reg = bank1_select;
878	/* fall through */	878	fallthrough;
879	case STATS_TYPE_BANK0:	879	case STATS_TYPE_BANK0:
880	reg \|= s->reg \| histogram;	880	reg \|= s->reg \| histogram;
881	mv88e6xxx_g1_stats_read(chip, reg, &low);	881	mv88e6xxx_g1_stats_read(chip, reg, &low);

drivers/net/dsa/ocelot/felix.c+1−0

@@ -400,6 +400,7 @@ static int felix_parse_ports_node(struct felix *felix, · 399 unmodified lines
400	if (err < 0) {	400	if (err < 0) {
401	dev_err(dev, "Unsupported PHY mode %s on port %d\n",	401	dev_err(dev, "Unsupported PHY mode %s on port %d\n",
402	phy_modes(phy_mode), port);	402	phy_modes(phy_mode), port);
		403	of_node_put(child);
403	return err;	404	return err;
404	}	405	}
405		406

drivers/net/dsa/sja1105/sja1105_main.c+1−1

@@ -3415,7 +3415,7 @@ static int sja1105_check_device_id(struct sja1105_private *priv) · 3414 unmodified lines
3415		3415
3416	sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);	3416	sja1105_unpack(prod_id, &part_no, 19, 4, SJA1105_SIZE_DEVICE_ID);
3417		3417
3418	for (match = sja1105_dt_ids; match->compatible; match++) {	3418	for (match = sja1105_dt_ids; match->compatible[0]; match++) {
3419	const struct sja1105_info *info = match->data;	3419	const struct sja1105_info *info = match->data;
3420		3420
3421	/* Is what's been probed in our match table at all? */	3421	/* Is what's been probed in our match table at all? */

drivers/net/ethernet/3com/3c509.c+2−2

@@ -1259,14 +1259,14 @@ el3_up(struct net_device *dev) · 1258 unmodified lines
1259	pr_cont("Forcing 3c5x9b full-duplex mode");	1259	pr_cont("Forcing 3c5x9b full-duplex mode");
1260	break;	1260	break;
1261	}	1261	}
1262	/* fall through */	1262	fallthrough;
1263	case 8:	1263	case 8:
1264	/* set full-duplex mode based on eeprom config setting */	1264	/* set full-duplex mode based on eeprom config setting */
1265	if ((sw_info & 0x000f) && (sw_info & 0x8000)) {	1265	if ((sw_info & 0x000f) && (sw_info & 0x8000)) {
1266	pr_cont("Setting 3c5x9b full-duplex mode (from EEPROM configuration bit)");	1266	pr_cont("Setting 3c5x9b full-duplex mode (from EEPROM configuration bit)");
1267	break;	1267	break;
1268	}	1268	}
1269	/* fall through */	1269	fallthrough;
1270	default:	1270	default:
1271	/* xcvr=(0 \|\| 4) OR user has an old 3c5x9 non "B" model */	1271	/* xcvr=(0 \|\| 4) OR user has an old 3c5x9 non "B" model */
1272	pr_cont("Setting 3c5x9/3c5x9B half-duplex mode");	1272	pr_cont("Setting 3c5x9/3c5x9B half-duplex mode");

drivers/net/ethernet/3com/3c574_cs.c+1−1

@@ -1046,7 +1046,7 @@ static int el3_ioctl(struct net_device dev, struct ifreq rq, int cmd) · 1045 unmodified lines
1046	switch(cmd) {	1046	switch(cmd) {
1047	case SIOCGMIIPHY: /* Get the address of the PHY in use. */	1047	case SIOCGMIIPHY: /* Get the address of the PHY in use. */
1048	data->phy_id = phy;	1048	data->phy_id = phy;
1049	/* fall through */	1049	fallthrough;
1050	case SIOCGMIIREG: /* Read the specified MII register. */	1050	case SIOCGMIIREG: /* Read the specified MII register. */
1051	{	1051	{
1052	int saved_window;	1052	int saved_window;

drivers/net/ethernet/8390/axnet_cs.c+1−1

@@ -610,7 +610,7 @@ static int axnet_ioctl(struct net_device dev, struct ifreq rq, int cmd) · 609 unmodified lines
610	switch (cmd) {	610	switch (cmd) {
611	case SIOCGMIIPHY:	611	case SIOCGMIIPHY:
612	data->phy_id = info->phy_id;	612	data->phy_id = info->phy_id;
613	/* Fall through */	613	fallthrough;
614	case SIOCGMIIREG: /* Read MII PHY register. */	614	case SIOCGMIIREG: /* Read MII PHY register. */
615	data->val_out = mdio_read(mii_addr, data->phy_id, data->reg_num & 0x1f);	615	data->val_out = mdio_read(mii_addr, data->phy_id, data->reg_num & 0x1f);
616	return 0;	616	return 0;

drivers/net/ethernet/8390/pcnet_cs.c+1−1

@@ -1108,7 +1108,7 @@ static int ei_ioctl(struct net_device dev, struct ifreq rq, int cmd) · 1107 unmodified lines
1108	switch (cmd) {	1108	switch (cmd) {
1109	case SIOCGMIIPHY:	1109	case SIOCGMIIPHY:
1110	data->phy_id = info->phy_id;	1110	data->phy_id = info->phy_id;
1111	/* fall through */	1111	fallthrough;
1112	case SIOCGMIIREG: /* Read MII PHY register. */	1112	case SIOCGMIIREG: /* Read MII PHY register. */
1113	data->val_out = mdio_read(mii_addr, data->phy_id, data->reg_num & 0x1f);	1113	data->val_out = mdio_read(mii_addr, data->phy_id, data->reg_num & 0x1f);
1114	return 0;	1114	return 0;

drivers/net/ethernet/alacritech/slicoss.c+6−6

@@ -1712,13 +1712,13 @@ static bool slic_is_fiber(unsigned short subdev) · 1711 unmodified lines
1712	{	1712	{
1713	switch (subdev) {	1713	switch (subdev) {
1714	/* Mojave */	1714	/* Mojave */
1715	case PCI_SUBDEVICE_ID_ALACRITECH_1000X1F: /* fallthrough */	1715	case PCI_SUBDEVICE_ID_ALACRITECH_1000X1F:
1716	case PCI_SUBDEVICE_ID_ALACRITECH_SES1001F: /* fallthrough */	1716	case PCI_SUBDEVICE_ID_ALACRITECH_SES1001F: fallthrough;
1717	/* Oasis */	1717	/* Oasis */
1718	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF: /* fallthrough */	1718	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF:
1719	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF: /* fallthrough */	1719	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF:
1720	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF: /* fallthrough */	1720	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF:
1721	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF: /* fallthrough */	1721	case PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF:
1722	return true;	1722	return true;
1723	}	1723	}
1724	return false;	1724	return false;

drivers/net/ethernet/alteon/acenic.c+1−1

@@ -547,7 +547,7 @@ static int acenic_probe_one(struct pci_dev *pdev, · 546 unmodified lines
547	ap->name);	547	ap->name);
548	break;	548	break;
549	}	549	}
550	/* Fall through */	550	fallthrough;
551	case PCI_VENDOR_ID_SGI:	551	case PCI_VENDOR_ID_SGI:
552	printk(KERN_INFO "%s: SGI AceNIC ", ap->name);	552	printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
553	break;	553	break;

drivers/net/ethernet/amd/amd8111e.c+1−1

@@ -1475,7 +1475,7 @@ static int amd8111e_ioctl(struct net_device dev , struct ifreq ifr, int cmd) · 1474 unmodified lines
1475	case SIOCGMIIPHY:	1475	case SIOCGMIIPHY:
1476	data->phy_id = lp->ext_phy_addr;	1476	data->phy_id = lp->ext_phy_addr;
1477		1477
1478	/* fallthru */	1478	fallthrough;
1479	case SIOCGMIIREG:	1479	case SIOCGMIIREG:
1480		1480
1481	spin_lock_irq(&lp->lock);	1481	spin_lock_irq(&lp->lock);

drivers/net/ethernet/amd/xgbe/xgbe-drv.c+3−3

drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c+13−0

 	XGBE_PORT_MODE_10GBASE_T,
 	XGBE_PORT_MODE_10GBASE_R,
 	XGBE_PORT_MODE_SFP,
+	XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG,
 	XGBE_PORT_MODE_MAX,
 };
 	if (ad_reg & 0x80) {
 		switch (phy_data->port_mode) {
 		case XGBE_PORT_MODE_BACKPLANE:
+		case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 			mode = XGBE_MODE_KR;
 			break;
 		default:
 	} else if (ad_reg & 0x20) {
 		switch (phy_data->port_mode) {
 		case XGBE_PORT_MODE_BACKPLANE:
+		case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 			mode = XGBE_MODE_KX_1000;
 			break;
 		case XGBE_PORT_MODE_1000BASE_X:
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		XGBE_SET_ADV(dlks, 10000baseKR_Full);
 		break;
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
 		return XGBE_AN_MODE_CL73;
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 		return XGBE_AN_MODE_NONE;
 	case XGBE_PORT_MODE_1000BASE_T:
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		return xgbe_phy_switch_bp_mode(pdata);
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 		return xgbe_phy_switch_bp_2500_mode(pdata);
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		return xgbe_phy_get_bp_mode(speed);
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 		return xgbe_phy_get_bp_2500_mode(speed);
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		return xgbe_phy_use_bp_mode(pdata, mode);
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 		return xgbe_phy_use_bp_2500_mode(pdata, mode);
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		return xgbe_phy_valid_speed_bp_mode(speed);
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 		return xgbe_phy_valid_speed_bp_2500_mode(speed);
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
 		    (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
 			return false;
 	switch (phy_data->port_mode) {
 	case XGBE_PORT_MODE_BACKPLANE:
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 	case XGBE_PORT_MODE_BACKPLANE_2500:
 		if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE)
 			return false;
 	/* Backplane support */
 	case XGBE_PORT_MODE_BACKPLANE:
 		XGBE_SET_SUP(lks, Autoneg);
+		fallthrough;
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
 		XGBE_SET_SUP(lks, Pause);
 		XGBE_SET_SUP(lks, Asym_Pause);
 		XGBE_SET_SUP(lks, Backplane);

drivers/net/ethernet/arc/emac_mdio.c+1−0

@@ -153,6 +153,7 @@ int arc_mdio_probe(struct arc_emac_priv *priv) · 152 unmodified lines
153	if (IS_ERR(data->reset_gpio)) {	153	if (IS_ERR(data->reset_gpio)) {
154	error = PTR_ERR(data->reset_gpio);	154	error = PTR_ERR(data->reset_gpio);
155	dev_err(priv->dev, "Failed to request gpio: %d\n", error);	155	dev_err(priv->dev, "Failed to request gpio: %d\n", error);
		156	mdiobus_free(bus);
156	return error;	157	return error;
157	}	158	}
158		159

drivers/net/ethernet/broadcom/bcmsysport.c+4−2

 	priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
 				      sizeof(struct bcm_sysport_tx_ring),
 				      GFP_KERNEL);
-	if (!priv->tx_rings)
+	if (!priv->tx_rings) {
-		return -ENOMEM;
+		ret = -ENOMEM;
+		goto err_free_netdev;
+	}
 	priv->is_lite = params->is_lite;
 	priv->num_rx_desc_words = params->num_rx_desc_words;

drivers/net/ethernet/broadcom/bgmac-bcma.c+1−1

@@ -217,7 +217,7 @@ static int bgmac_probe(struct bcma_device *core) · 216 unmodified lines
217	/* BCM 471X/535X family */	217	/* BCM 471X/535X family */
218	case BCMA_CHIP_ID_BCM4716:	218	case BCMA_CHIP_ID_BCM4716:
219	bgmac->feature_flags \|= BGMAC_FEAT_CLKCTLST;	219	bgmac->feature_flags \|= BGMAC_FEAT_CLKCTLST;
220	/* fallthrough */	220	fallthrough;
221	case BCMA_CHIP_ID_BCM47162:	221	case BCMA_CHIP_ID_BCM47162:
222	bgmac->feature_flags \|= BGMAC_FEAT_FLW_CTRL2;	222	bgmac->feature_flags \|= BGMAC_FEAT_FLW_CTRL2;
223	bgmac->feature_flags \|= BGMAC_FEAT_SET_RXQ_CLK;	223	bgmac->feature_flags \|= BGMAC_FEAT_SET_RXQ_CLK;

drivers/net/ethernet/broadcom/bgmac-platform.c+1−1

@@ -131,7 +131,7 @@ static void bgmac_nicpm_speed_set(struct net_device *net_dev) · 130 unmodified lines
131	switch (bgmac->net_dev->phydev->speed) {	131	switch (bgmac->net_dev->phydev->speed) {
132	default:	132	default:
133	netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");	133	netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");
134	/* fall through */	134	fallthrough;
135	case SPEED_1000:	135	case SPEED_1000:
136	val \|= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;	136	val \|= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;
137	break;	137	break;

drivers/net/ethernet/broadcom/bnx2.c+7−7

@@ -1337,13 +1337,13 @@ bnx2_set_mac_link(struct bnx2 *bp) · 1336 unmodified lines
1337	val \|= BNX2_EMAC_MODE_PORT_MII_10M;	1337	val \|= BNX2_EMAC_MODE_PORT_MII_10M;
1338	break;	1338	break;
1339	}	1339	}
1340	/* fall through */	1340	fallthrough;
1341	case SPEED_100:	1341	case SPEED_100:
1342	val \|= BNX2_EMAC_MODE_PORT_MII;	1342	val \|= BNX2_EMAC_MODE_PORT_MII;
1343	break;	1343	break;
1344	case SPEED_2500:	1344	case SPEED_2500:
1345	val \|= BNX2_EMAC_MODE_25G_MODE;	1345	val \|= BNX2_EMAC_MODE_25G_MODE;
1346	/* fall through */	1346	fallthrough;
1347	case SPEED_1000:	1347	case SPEED_1000:
1348	val \|= BNX2_EMAC_MODE_PORT_GMII;	1348	val \|= BNX2_EMAC_MODE_PORT_GMII;
1349	break;	1349	break;
@@ -1995,26 +1995,26 @@ bnx2_remote_phy_event(struct bnx2 *bp) · 645 unmodified lines
1995	switch (speed) {	1995	switch (speed) {
1996	case BNX2_LINK_STATUS_10HALF:	1996	case BNX2_LINK_STATUS_10HALF:
1997	bp->duplex = DUPLEX_HALF;	1997	bp->duplex = DUPLEX_HALF;
1998	/* fall through */	1998	fallthrough;
1999	case BNX2_LINK_STATUS_10FULL:	1999	case BNX2_LINK_STATUS_10FULL:
2000	bp->line_speed = SPEED_10;	2000	bp->line_speed = SPEED_10;
2001	break;	2001	break;
2002	case BNX2_LINK_STATUS_100HALF:	2002	case BNX2_LINK_STATUS_100HALF:
2003	bp->duplex = DUPLEX_HALF;	2003	bp->duplex = DUPLEX_HALF;
2004	/* fall through */	2004	fallthrough;
2005	case BNX2_LINK_STATUS_100BASE_T4:	2005	case BNX2_LINK_STATUS_100BASE_T4:
2006	case BNX2_LINK_STATUS_100FULL:	2006	case BNX2_LINK_STATUS_100FULL:
2007	bp->line_speed = SPEED_100;	2007	bp->line_speed = SPEED_100;
2008	break;	2008	break;
2009	case BNX2_LINK_STATUS_1000HALF:	2009	case BNX2_LINK_STATUS_1000HALF:
2010	bp->duplex = DUPLEX_HALF;	2010	bp->duplex = DUPLEX_HALF;
2011	/* fall through */	2011	fallthrough;
2012	case BNX2_LINK_STATUS_1000FULL:	2012	case BNX2_LINK_STATUS_1000FULL:
2013	bp->line_speed = SPEED_1000;	2013	bp->line_speed = SPEED_1000;
2014	break;	2014	break;
2015	case BNX2_LINK_STATUS_2500HALF:	2015	case BNX2_LINK_STATUS_2500HALF:
2016	bp->duplex = DUPLEX_HALF;	2016	bp->duplex = DUPLEX_HALF;
2017	/* fall through */	2017	fallthrough;
2018	case BNX2_LINK_STATUS_2500FULL:	2018	case BNX2_LINK_STATUS_2500FULL:
2019	bp->line_speed = SPEED_2500;	2019	bp->line_speed = SPEED_2500;
2020	break;	2020	break;
@@ -7856,7 +7856,7 @@ bnx2_ioctl(struct net_device dev, struct ifreq ifr, int cmd) · 5835 unmodified lines
7856	case SIOCGMIIPHY:	7856	case SIOCGMIIPHY:
7857	data->phy_id = bp->phy_addr;	7857	data->phy_id = bp->phy_addr;
7858		7858
7859	/* fallthru */	7859	fallthrough;
7860	case SIOCGMIIREG: {	7860	case SIOCGMIIREG: {
7861	u32 mii_regval;	7861	u32 mii_regval;
7862		7862

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c+7−7

@@ -4712,14 +4712,14 @@ static void bnx2x_sync_link(struct link_params *params, · 4711 unmodified lines
4712	LINK_STATUS_SPEED_AND_DUPLEX_MASK) {	4712	LINK_STATUS_SPEED_AND_DUPLEX_MASK) {
4713	case LINK_10THD:	4713	case LINK_10THD:
4714	vars->duplex = DUPLEX_HALF;	4714	vars->duplex = DUPLEX_HALF;
4715	/* Fall thru */	4715	fallthrough;
4716	case LINK_10TFD:	4716	case LINK_10TFD:
4717	vars->line_speed = SPEED_10;	4717	vars->line_speed = SPEED_10;
4718	break;	4718	break;
4719		4719
4720	case LINK_100TXHD:	4720	case LINK_100TXHD:
4721	vars->duplex = DUPLEX_HALF;	4721	vars->duplex = DUPLEX_HALF;
4722	/* Fall thru */	4722	fallthrough;
4723	case LINK_100T4:	4723	case LINK_100T4:
4724	case LINK_100TXFD:	4724	case LINK_100TXFD:
4725	vars->line_speed = SPEED_100;	4725	vars->line_speed = SPEED_100;
@@ -4727,14 +4727,14 @@ static void bnx2x_sync_link(struct link_params *params, · 1 unmodified line
4727		4727
4728	case LINK_1000THD:	4728	case LINK_1000THD:
4729	vars->duplex = DUPLEX_HALF;	4729	vars->duplex = DUPLEX_HALF;
4730	/* Fall thru */	4730	fallthrough;
4731	case LINK_1000TFD:	4731	case LINK_1000TFD:
4732	vars->line_speed = SPEED_1000;	4732	vars->line_speed = SPEED_1000;
4733	break;	4733	break;
4734		4734
4735	case LINK_2500THD:	4735	case LINK_2500THD:
4736	vars->duplex = DUPLEX_HALF;	4736	vars->duplex = DUPLEX_HALF;
4737	/* Fall thru */	4737	fallthrough;
4738	case LINK_2500TFD:	4738	case LINK_2500TFD:
4739	vars->line_speed = SPEED_2500;	4739	vars->line_speed = SPEED_2500;
4740	break;	4740	break;
@@ -6339,7 +6339,7 @@ int bnx2x_set_led(struct link_params *params, · 1598 unmodified lines
6339	*/	6339	*/
6340	if (!vars->link_up)	6340	if (!vars->link_up)
6341	break;	6341	break;
6342	/* fall through */	6342	fallthrough;
6343	case LED_MODE_ON:	6343	case LED_MODE_ON:
6344	if (((params->phy[EXT_PHY1].type ==	6344	if (((params->phy[EXT_PHY1].type ==
6345	PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) \|\|	6345	PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) \|\|
@@ -12508,13 +12508,13 @@ static void bnx2x_phy_def_cfg(struct link_params *params, · 6162 unmodified lines
12508	switch (link_config & PORT_FEATURE_LINK_SPEED_MASK) {	12508	switch (link_config & PORT_FEATURE_LINK_SPEED_MASK) {
12509	case PORT_FEATURE_LINK_SPEED_10M_HALF:	12509	case PORT_FEATURE_LINK_SPEED_10M_HALF:
12510	phy->req_duplex = DUPLEX_HALF;	12510	phy->req_duplex = DUPLEX_HALF;
12511	/* fall through */	12511	fallthrough;
12512	case PORT_FEATURE_LINK_SPEED_10M_FULL:	12512	case PORT_FEATURE_LINK_SPEED_10M_FULL:
12513	phy->req_line_speed = SPEED_10;	12513	phy->req_line_speed = SPEED_10;
12514	break;	12514	break;
12515	case PORT_FEATURE_LINK_SPEED_100M_HALF:	12515	case PORT_FEATURE_LINK_SPEED_100M_HALF:
12516	phy->req_duplex = DUPLEX_HALF;	12516	phy->req_duplex = DUPLEX_HALF;
12517	/* fall through */	12517	fallthrough;
12518	case PORT_FEATURE_LINK_SPEED_100M_FULL:	12518	case PORT_FEATURE_LINK_SPEED_100M_FULL:
12519	phy->req_line_speed = SPEED_100;	12519	phy->req_line_speed = SPEED_100;
12520	break;	12520	break;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c+2−2

@@ -8600,11 +8600,11 @@ int bnx2x_set_int_mode(struct bnx2x *bp) · 8599 unmodified lines
8600	bp->num_queues,	8600	bp->num_queues,
8601	1 + bp->num_cnic_queues);	8601	1 + bp->num_cnic_queues);
8602		8602
8603	/* fall through */	8603	fallthrough;
8604	case BNX2X_INT_MODE_MSI:	8604	case BNX2X_INT_MODE_MSI:
8605	bnx2x_enable_msi(bp);	8605	bnx2x_enable_msi(bp);
8606		8606
8607	/* fall through */	8607	fallthrough;
8608	case BNX2X_INT_MODE_INTX:	8608	case BNX2X_INT_MODE_INTX:
8609	bp->num_ethernet_queues = 1;	8609	bp->num_ethernet_queues = 1;
8610	bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;	8610	bp->num_queues = bp->num_ethernet_queues + bp->num_cnic_queues;

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sp.c+2−2

@@ -3258,7 +3258,7 @@ static int bnx2x_mcast_validate_e2(struct bnx2x *bp, · 3257 unmodified lines
3258	/* DEL command deletes all currently configured MACs */	3258	/* DEL command deletes all currently configured MACs */
3259	case BNX2X_MCAST_CMD_DEL:	3259	case BNX2X_MCAST_CMD_DEL:
3260	o->set_registry_size(o, 0);	3260	o->set_registry_size(o, 0);
3261	/* fall through */	3261	fallthrough;
3262		3262
3263	/* RESTORE command will restore the entire multicast configuration */	3263	/* RESTORE command will restore the entire multicast configuration */
3264	case BNX2X_MCAST_CMD_RESTORE:	3264	case BNX2X_MCAST_CMD_RESTORE:
@@ -3592,7 +3592,7 @@ static int bnx2x_mcast_validate_e1(struct bnx2x *bp, · 327 unmodified lines
3592	/* DEL command deletes all currently configured MACs */	3592	/* DEL command deletes all currently configured MACs */
3593	case BNX2X_MCAST_CMD_DEL:	3593	case BNX2X_MCAST_CMD_DEL:
3594	o->set_registry_size(o, 0);	3594	o->set_registry_size(o, 0);
3595	/* fall through */	3595	fallthrough;
3596		3596
3597	/* RESTORE command will restore the entire multicast configuration */	3597	/* RESTORE command will restore the entire multicast configuration */
3598	case BNX2X_MCAST_CMD_RESTORE:	3598	case BNX2X_MCAST_CMD_RESTORE:

drivers/net/ethernet/broadcom/bnx2x/bnx2x_sriov.c+2−2

@@ -1809,7 +1809,7 @@ get_vf: · 1808 unmodified lines
1809	DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",	1809	DP(BNX2X_MSG_IOV, "got VF [%d:%d] RSS update ramrod\n",
1810	vf->abs_vfid, qidx);	1810	vf->abs_vfid, qidx);
1811	bnx2x_vf_handle_rss_update_eqe(bp, vf);	1811	bnx2x_vf_handle_rss_update_eqe(bp, vf);
1812	/* fall through */	1812	fallthrough;
1813	case EVENT_RING_OPCODE_VF_FLR:	1813	case EVENT_RING_OPCODE_VF_FLR:
1814	/* Do nothing for now */	1814	/* Do nothing for now */
1815	return 0;	1815	return 0;
@@ -2207,7 +2207,7 @@ int bnx2x_vf_free(struct bnx2x bp, struct bnx2x_virtf vf) · 391 unmodified lines
2207	rc = bnx2x_vf_close(bp, vf);	2207	rc = bnx2x_vf_close(bp, vf);
2208	if (rc)	2208	if (rc)
2209	goto op_err;	2209	goto op_err;
2210	/* Fall through - to release resources */	2210	fallthrough; /* to release resources */
2211	case VF_ACQUIRED:	2211	case VF_ACQUIRED:
2212	DP(BNX2X_MSG_IOV, "about to free resources\n");	2212	DP(BNX2X_MSG_IOV, "about to free resources\n");
2213	bnx2x_vf_free_resc(bp, vf);	2213	bnx2x_vf_free_resc(bp, vf);

drivers/net/ethernet/broadcom/bnxt/bnxt.c+67−39

 static void bnxt_queue_fw_reset_work(struct bnxt *bp, unsigned long delay)
 {
+	if (!(test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)))
+		return;
 	if (BNXT_PF(bp))
 		queue_delayed_work(bnxt_pf_wq, &bp->fw_reset_task, delay);
 	else
 static void bnxt_cancel_sp_work(struct bnxt *bp)
 {
-	if (BNXT_PF(bp))
+	if (BNXT_PF(bp)) {
 		flush_workqueue(bnxt_pf_wq);
-	else
+	} else {
 		cancel_work_sync(&bp->sp_task);
+		cancel_delayed_work_sync(&bp->fw_reset_task);
+	}
 }
 static void bnxt_sched_reset(struct bnxt *bp, struct bnxt_rx_ring_info *rxr)
 		break;
 	case BNXT_FW_HEALTH_REG_TYPE_GRC:
 		reg_off = fw_health->mapped_regs[reg_idx];
-		/* fall through */
+		fallthrough;
 	case BNXT_FW_HEALTH_REG_TYPE_BAR0:
 		val = readl(bp->bar0 + reg_off);
 		break;
 		}
 		set_bit(BNXT_LINK_SPEED_CHNG_SP_EVENT, &bp->sp_event);
 	}
-	/* fall through */
+		fallthrough;
 	case ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE:
 	case ASYNC_EVENT_CMPL_EVENT_ID_PORT_PHY_CFG_CHANGE:
 		set_bit(BNXT_LINK_CFG_CHANGE_SP_EVENT, &bp->sp_event);
-		/* fall through */
+		fallthrough;
 	case ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE:
 		set_bit(BNXT_LINK_CHNG_SP_EVENT, &bp->sp_event);
 		break;
 	return cp + ulp_stat;
 }
+/* Check if a default RSS map needs to be setup.  This function is only
+ * used on older firmware that does not require reserving RX rings.
+ */
+static void bnxt_check_rss_tbl_no_rmgr(struct bnxt *bp)
+{
+	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
+	/* The RSS map is valid for RX rings set to resv_rx_rings */
+	if (hw_resc->resv_rx_rings != bp->rx_nr_rings) {
+		hw_resc->resv_rx_rings = bp->rx_nr_rings;
+		if (!netif_is_rxfh_configured(bp->dev))
+			bnxt_set_dflt_rss_indir_tbl(bp);
+	}
+}
 static bool bnxt_need_reserve_rings(struct bnxt *bp)
 {
 	struct bnxt_hw_resc *hw_resc = &bp->hw_resc;
 	int rx = bp->rx_nr_rings, stat;
 	int vnic = 1, grp = rx;
-	if (bp->hwrm_spec_code < 0x10601)
+	if (hw_resc->resv_tx_rings != bp->tx_nr_rings &&
-		return false;
+	    bp->hwrm_spec_code >= 0x10601)
-	if (hw_resc->resv_tx_rings != bp->tx_nr_rings)
 		return true;
+	/* Old firmware does not need RX ring reservations but we still
+	 * need to setup a default RSS map when needed.  With new firmware
+	 * we go through RX ring reservations first and then set up the
+	 * RSS map for the successfully reserved RX rings when needed.
+	 */
+	if (!BNXT_NEW_RM(bp)) {
+		bnxt_check_rss_tbl_no_rmgr(bp);
+		return false;
+	}
 	if ((bp->flags & BNXT_FLAG_RFS) && !(bp->flags & BNXT_FLAG_CHIP_P5))
 		vnic = rx + 1;
 	if (bp->flags & BNXT_FLAG_AGG_RINGS)
 		rx <<= 1;
 	stat = bnxt_get_func_stat_ctxs(bp);
-	if (BNXT_NEW_RM(bp) &&
+	if (hw_resc->resv_rx_rings != rx || hw_resc->resv_cp_rings != cp ||
-	    (hw_resc->resv_rx_rings != rx || hw_resc->resv_cp_rings != cp ||
+	    hw_resc->resv_vnics != vnic || hw_resc->resv_stat_ctxs != stat ||
-	     hw_resc->resv_vnics != vnic || hw_resc->resv_stat_ctxs != stat ||
+	    (hw_resc->resv_hw_ring_grps != grp &&
-	     (hw_resc->resv_hw_ring_grps != grp &&
+	     !(bp->flags & BNXT_FLAG_CHIP_P5)))
-	      !(bp->flags & BNXT_FLAG_CHIP_P5))))
 		return true;
 	if ((bp->flags & BNXT_FLAG_CHIP_P5) && BNXT_PF(bp) &&
 	    hw_resc->resv_irqs != nq)
 	if (!tx || !rx || !cp || !grp || !vnic || !stat)
 		return -ENOMEM;
+	if (!netif_is_rxfh_configured(bp->dev))
+		bnxt_set_dflt_rss_indir_tbl(bp);
 	return rc;
 }
 			rc = bnxt_init_int_mode(bp);
 		bnxt_ulp_irq_restart(bp, rc);
 	}
-	if (!netif_is_rxfh_configured(bp->dev))
-		bnxt_set_dflt_rss_indir_tbl(bp);
 	if (rc) {
 		netdev_err(bp->dev, "ring reservation/IRQ init failure rc: %d\n", rc);
 		return rc;
 	struct hwrm_temp_monitor_query_input req = {0};
 	struct hwrm_temp_monitor_query_output *resp;
 	struct bnxt *bp = dev_get_drvdata(dev);
-	u32 temp = 0;
+	u32 len = 0;
 	resp = bp->hwrm_cmd_resp_addr;
 	bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_TEMP_MONITOR_QUERY, -1, -1);
 	mutex_lock(&bp->hwrm_cmd_lock);
-	if (!_hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT))
+	if (!_hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT))
-		temp = resp->temp * 1000; /* display millidegree */
+		len = sprintf(buf, "%u\n", resp->temp * 1000); /* display millidegree */
 	mutex_unlock(&bp->hwrm_cmd_lock);
-	return sprintf(buf, "%u\n", temp);
+	if (len)
+		return len;
+	return sprintf(buf, "unknown\n");
 }
 static SENSOR_DEVICE_ATTR(temp1_input, 0444, bnxt_show_temp, NULL, 0);
 		}
 	}
-	bnxt_enable_napi(bp);
-	bnxt_debug_dev_init(bp);
 	rc = bnxt_init_nic(bp, irq_re_init);
 	if (rc) {
 		netdev_err(bp->dev, "bnxt_init_nic err: %x\n", rc);
-		goto open_err;
+		goto open_err_irq;
 	}
+	bnxt_enable_napi(bp);
+	bnxt_debug_dev_init(bp);
 	if (link_re_init) {
 		mutex_lock(&bp->link_lock);
 		rc = bnxt_update_phy_setting(bp);
 		bnxt_vf_reps_open(bp);
 	return 0;
-open_err:
-	bnxt_debug_dev_exit(bp);
-	bnxt_disable_napi(bp);
 open_err_irq:
 	bnxt_del_napi(bp);
 	case SIOCGMIIPHY:
 		mdio->phy_id = bp->link_info.phy_addr;
-		/* fallthru */
+		fallthrough;
 	case SIOCGMIIREG: {
 		u16 mii_regval = 0;
 		writel(reg_off & BNXT_GRC_BASE_MASK,
 		       bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT + 4);
 		reg_off = (reg_off & BNXT_GRC_OFFSET_MASK) + 0x2000;
-		/* fall through */
+		fallthrough;
 	case BNXT_FW_HEALTH_REG_TYPE_BAR0:
 		writel(val, bp->bar0 + reg_off);
 		break;
 		}
 		bp->fw_reset_state = BNXT_FW_RESET_STATE_RESET_FW;
 	}
-	/* fall through */
+		fallthrough;
 	case BNXT_FW_RESET_STATE_RESET_FW:
 		bnxt_reset_all(bp);
 		bp->fw_reset_state = BNXT_FW_RESET_STATE_ENABLE_DEV;
 		}
 		pci_set_master(bp->pdev);
 		bp->fw_reset_state = BNXT_FW_RESET_STATE_POLL_FW;
-		/* fall through */
+		fallthrough;
 	case BNXT_FW_RESET_STATE_POLL_FW:
 		bp->hwrm_cmd_timeout = SHORT_HWRM_CMD_TIMEOUT;
 		rc = __bnxt_hwrm_ver_get(bp, true);
 		}
 		bp->hwrm_cmd_timeout = DFLT_HWRM_CMD_TIMEOUT;
 		bp->fw_reset_state = BNXT_FW_RESET_STATE_OPENING;
-		/* fall through */
+		fallthrough;
 	case BNXT_FW_RESET_STATE_OPENING:
 		while (!rtnl_trylock()) {
 			bnxt_queue_fw_reset_work(bp, HZ / 10);
 	unregister_netdev(dev);
 	bnxt_dl_unregister(bp);
 	bnxt_shutdown_tc(bp);
+	clear_bit(BNXT_STATE_IN_FW_RESET, &bp->state);
 	bnxt_cancel_sp_work(bp);
 	bp->sp_event = 0;
 	if (BNXT_CHIP_P5(bp))
 		bp->flags |= BNXT_FLAG_CHIP_P5;
+	rc = bnxt_alloc_rss_indir_tbl(bp);
+	if (rc)
+		goto init_err_pci_clean;
 	rc = bnxt_fw_init_one_p2(bp);
 	if (rc)
 		goto init_err_pci_clean;
 	 */
 	bp->tx_nr_rings_per_tc = bp->tx_nr_rings;
-	rc = bnxt_alloc_rss_indir_tbl(bp);
-	if (rc)
-		goto init_err_pci_clean;
-	bnxt_set_dflt_rss_indir_tbl(bp);
 	if (BNXT_PF(bp)) {
 		if (!bnxt_pf_wq) {
 			bnxt_pf_wq =
 		    (long)pci_resource_start(pdev, 0), dev->dev_addr);
 	pcie_print_link_status(pdev);
+	pci_save_state(pdev);
 	return 0;
 init_err_cleanup:
 			"Cannot re-enable PCI device after reset.\n");
 	} else {
 		pci_set_master(pdev);
+		pci_restore_state(pdev);
+		pci_save_state(pdev);
 		err = bnxt_hwrm_func_reset(bp);
 		if (!err) {

drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+8−12

 static int bnxt_get_num_ring_stats(struct bnxt *bp)
 {
 	int rx, tx, cmn;
-	bool sh = false;
-	if (bp->flags & BNXT_FLAG_SHARED_RINGS)
-		sh = true;
 	rx = NUM_RING_RX_HW_STATS + NUM_RING_RX_SW_STATS +
 	     bnxt_get_num_tpa_ring_stats(bp);
 	tx = NUM_RING_TX_HW_STATS;
 	cmn = NUM_RING_CMN_SW_STATS;
-	if (sh)
+	return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
-		return (rx + tx + cmn) * bp->cp_nr_rings;
+	       cmn * bp->cp_nr_rings;
-	else
-		return rx * bp->rx_nr_rings + tx * bp->tx_nr_rings +
-		       cmn * bp->cp_nr_rings;
 }
 static int bnxt_get_num_stats(struct bnxt *bp)
 	int max_tx_sch_inputs;
 	/* Get the most up-to-date max_tx_sch_inputs. */
-	if (BNXT_NEW_RM(bp))
+	if (netif_running(dev) && BNXT_NEW_RM(bp))
 		bnxt_hwrm_func_resc_qcaps(bp, false);
 	max_tx_sch_inputs = hw_resc->max_tx_sch_inputs;
 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
-		/* fall through */
+		fallthrough;
 	case SCTP_V4_FLOW:
 	case AH_ESP_V4_FLOW:
 	case AH_V4_FLOW:
 		if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
 			cmd->data |= RXH_IP_SRC | RXH_IP_DST |
 				     RXH_L4_B_0_1 | RXH_L4_B_2_3;
-		/* fall through */
+		fallthrough;
 	case SCTP_V6_FLOW:
 	case AH_ESP_V6_FLOW:
 	case AH_V6_FLOW:
 	if (rc != 0)
 		return rc;
+	if (!dir_entries || !entry_length)
+		return -EIO;
 	/* Insert 2 bytes of directory info (count and size of entries) */
 	if (len < 2)
 		return -EINVAL;

drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c+2−2

@@ -201,10 +201,10 @@ bool bnxt_rx_xdp(struct bnxt bp, struct bnxt_rx_ring_info rxr, u16 cons, · 200 unmodified lines
201	break;	201	break;
202	default:	202	default:
203	bpf_warn_invalid_xdp_action(act);	203	bpf_warn_invalid_xdp_action(act);
204	/* Fall thru */	204	fallthrough;
205	case XDP_ABORTED:	205	case XDP_ABORTED:
206	trace_xdp_exception(bp->dev, xdp_prog, act);	206	trace_xdp_exception(bp->dev, xdp_prog, act);
207	/* Fall thru */	207	fallthrough;
208	case XDP_DROP:	208	case XDP_DROP:
209	bnxt_reuse_rx_data(rxr, cons, page);	209	bnxt_reuse_rx_data(rxr, cons, page);
210	break;	210	break;

drivers/net/ethernet/broadcom/cnic.c+2−2

@@ -3311,7 +3311,7 @@ static int cnic_ctl(void data, struct cnic_ctl_info info) · 3310 unmodified lines
3311	}	3311	}
3312	case CNIC_CTL_FCOE_STATS_GET_CMD:	3312	case CNIC_CTL_FCOE_STATS_GET_CMD:
3313	ulp_type = CNIC_ULP_FCOE;	3313	ulp_type = CNIC_ULP_FCOE;
3314	/* fall through */	3314	fallthrough;
3315	case CNIC_CTL_ISCSI_STATS_GET_CMD:	3315	case CNIC_CTL_ISCSI_STATS_GET_CMD:
3316	cnic_hold(dev);	3316	cnic_hold(dev);
3317	cnic_copy_ulp_stats(dev, ulp_type);	3317	cnic_copy_ulp_stats(dev, ulp_type);
@@ -4044,7 +4044,7 @@ static void cnic_cm_process_kcqe(struct cnic_dev dev, struct kcqe kcqe) · 726 unmodified lines
4044	l4kcqe->status, l5kcqe->completion_status);	4044	l4kcqe->status, l5kcqe->completion_status);
4045	opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;	4045	opcode = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
4046	}	4046	}
4047	/* Fall through */	4047	fallthrough;
4048	case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:	4048	case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
4049	case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:	4049	case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
4050	case L4_KCQE_OPCODE_VALUE_RESET_COMP:	4050	case L4_KCQE_OPCODE_VALUE_RESET_COMP:

drivers/net/ethernet/broadcom/genet/bcmgenet.c+3−3

@@ -1185,10 +1185,10 @@ static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv) · 1184 unmodified lines
1185	continue;	1185	continue;
1186	case BCMGENET_STAT_RUNT:	1186	case BCMGENET_STAT_RUNT:
1187	offset += BCMGENET_STAT_OFFSET;	1187	offset += BCMGENET_STAT_OFFSET;
1188	/* fall through */	1188	fallthrough;
1189	case BCMGENET_STAT_MIB_TX:	1189	case BCMGENET_STAT_MIB_TX:
1190	offset += BCMGENET_STAT_OFFSET;	1190	offset += BCMGENET_STAT_OFFSET;
1191	/* fall through */	1191	fallthrough;
1192	case BCMGENET_STAT_MIB_RX:	1192	case BCMGENET_STAT_MIB_RX:
1193	val = bcmgenet_umac_readl(priv,	1193	val = bcmgenet_umac_readl(priv,
1194	UMAC_MIB_START + j + offset);	1194	UMAC_MIB_START + j + offset);
@@ -1364,7 +1364,7 @@ static int bcmgenet_validate_flow(struct net_device *dev, · 169 unmodified lines
1364	case ETHER_FLOW:	1364	case ETHER_FLOW:
1365	eth_mask = &cmd->fs.m_u.ether_spec;	1365	eth_mask = &cmd->fs.m_u.ether_spec;
1366	/* don't allow mask which isn't valid */	1366	/* don't allow mask which isn't valid */
1367	if (VALIDATE_MASK(eth_mask->h_source) \|\|	1367	if (VALIDATE_MASK(eth_mask->h_dest) \|\|
1368	VALIDATE_MASK(eth_mask->h_source) \|\|	1368	VALIDATE_MASK(eth_mask->h_source) \|\|
1369	VALIDATE_MASK(eth_mask->h_proto)) {	1369	VALIDATE_MASK(eth_mask->h_proto)) {
1370	netdev_err(dev, "rxnfc: Unsupported mask\n");	1370	netdev_err(dev, "rxnfc: Unsupported mask\n");

drivers/net/ethernet/broadcom/genet/bcmmii.c+1−1

@@ -192,7 +192,7 @@ int bcmgenet_mii_config(struct net_device *dev, bool init) · 191 unmodified lines
192	switch (priv->phy_interface) {	192	switch (priv->phy_interface) {
193	case PHY_INTERFACE_MODE_INTERNAL:	193	case PHY_INTERFACE_MODE_INTERNAL:
194	phy_name = "internal PHY";	194	phy_name = "internal PHY";
195	/* fall through */	195	fallthrough;
196	case PHY_INTERFACE_MODE_MOCA:	196	case PHY_INTERFACE_MODE_MOCA:
197	/* Irrespective of the actually configured PHY speed (100 or	197	/* Irrespective of the actually configured PHY speed (100 or
198	* 1000) GENETv4 only has an internal GPHY so we will just end	198	* 1000) GENETv4 only has an internal GPHY so we will just end

drivers/net/ethernet/broadcom/tg3.c+40−31

 	case TG3_APE_LOCK_GPIO:
 		if (tg3_asic_rev(tp) == ASIC_REV_5761)
 			return 0;
-		/* fall through */
+		fallthrough;
 	case TG3_APE_LOCK_GRC:
 	case TG3_APE_LOCK_MEM:
 		if (!tp->pci_fn)
 	case TG3_APE_LOCK_GPIO:
 		if (tg3_asic_rev(tp) == ASIC_REV_5761)
 			return;
-		/* fall through */
+		fallthrough;
 	case TG3_APE_LOCK_GRC:
 	case TG3_APE_LOCK_MEM:
 		if (!tp->pci_fn)
 			phydev->dev_flags |= PHY_BRCM_EXT_IBND_RX_ENABLE;
 		if (tg3_flag(tp, RGMII_EXT_IBND_TX_EN))
 			phydev->dev_flags |= PHY_BRCM_EXT_IBND_TX_ENABLE;
-		/* fall through */
+		fallthrough;
 	case PHY_ID_RTL8211C:
 		phydev->interface = PHY_INTERFACE_MODE_RGMII;
 		break;
 			phy_support_asym_pause(phydev);
 			break;
 		}
-		/* fall through */
+		fallthrough;
 	case PHY_INTERFACE_MODE_MII:
 		phy_set_max_speed(phydev, SPEED_100);
 		phy_support_asym_pause(phydev);
 				      MII_TG3_DSP_TAP26_RMRXSTO |
 				      MII_TG3_DSP_TAP26_OPCSINPT;
 			tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
-			/* Fall through */
+			fallthrough;
 		case ASIC_REV_5720:
 		case ASIC_REV_5762:
 			if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
 				tp->link_config.speed = SPEED_1000;
 				break;
 			}
-			/* Fall through */
+			fallthrough;
 		default:
 			goto done;
 		}
 		if (ap->flags & (MR_AN_ENABLE | MR_RESTART_AN))
 			ap->state = ANEG_STATE_AN_ENABLE;
-		/* fall through */
+		fallthrough;
 	case ANEG_STATE_AN_ENABLE:
 		ap->flags &= ~(MR_AN_COMPLETE | MR_PAGE_RX);
 		if (ap->flags & MR_AN_ENABLE) {
 		ret = ANEG_TIMER_ENAB;
 		ap->state = ANEG_STATE_RESTART;
-		/* fall through */
+		fallthrough;
 	case ANEG_STATE_RESTART:
 		delta = ap->cur_time - ap->link_time;
 		if (delta > ANEG_STATE_SETTLE_TIME)
 		ap->state = ANEG_STATE_ACK_DETECT;
-		/* fall through */
+		fallthrough;
 	case ANEG_STATE_ACK_DETECT:
 		if (ap->ack_match != 0) {
 			if ((ap->rxconfig & ~ANEG_CFG_ACK) ==
 static inline void tg3_reset_task_cancel(struct tg3 *tp)
 {
-	cancel_work_sync(&tp->reset_task);
+	if (test_and_clear_bit(TG3_FLAG_RESET_TASK_PENDING, tp->tg3_flags))
-	tg3_flag_clear(tp, RESET_TASK_PENDING);
+		cancel_work_sync(&tp->reset_task);
 	tg3_flag_clear(tp, TX_RECOVERY_PENDING);
 }
 	switch (limit) {
 	case 16:
 		tw32(MAC_RCV_RULE_15,  0); tw32(MAC_RCV_VALUE_15,  0);
-		/* fall through */
+		fallthrough;
 	case 15:
 		tw32(MAC_RCV_RULE_14,  0); tw32(MAC_RCV_VALUE_14,  0);
-		/* fall through */
+		fallthrough;
 	case 14:
 		tw32(MAC_RCV_RULE_13,  0); tw32(MAC_RCV_VALUE_13,  0);
-		/* fall through */
+		fallthrough;
 	case 13:
 		tw32(MAC_RCV_RULE_12,  0); tw32(MAC_RCV_VALUE_12,  0);
-		/* fall through */
+		fallthrough;
 	case 12:
 		tw32(MAC_RCV_RULE_11,  0); tw32(MAC_RCV_VALUE_11,  0);
-		/* fall through */
+		fallthrough;
 	case 11:
 		tw32(MAC_RCV_RULE_10,  0); tw32(MAC_RCV_VALUE_10,  0);
-		/* fall through */
+		fallthrough;
 	case 10:
 		tw32(MAC_RCV_RULE_9,  0); tw32(MAC_RCV_VALUE_9,  0);
-		/* fall through */
+		fallthrough;
 	case 9:
 		tw32(MAC_RCV_RULE_8,  0); tw32(MAC_RCV_VALUE_8,  0);
-		/* fall through */
+		fallthrough;
 	case 8:
 		tw32(MAC_RCV_RULE_7,  0); tw32(MAC_RCV_VALUE_7,  0);
-		/* fall through */
+		fallthrough;
 	case 7:
 		tw32(MAC_RCV_RULE_6,  0); tw32(MAC_RCV_VALUE_6,  0);
-		/* fall through */
+		fallthrough;
 	case 6:
 		tw32(MAC_RCV_RULE_5,  0); tw32(MAC_RCV_VALUE_5,  0);
-		/* fall through */
+		fallthrough;
 	case 5:
 		tw32(MAC_RCV_RULE_4,  0); tw32(MAC_RCV_VALUE_4,  0);
-		/* fall through */
+		fallthrough;
 	case 4:
 		/* tw32(MAC_RCV_RULE_3,  0); tw32(MAC_RCV_VALUE_3,  0); */
 	case 3:
 	tg3_halt(tp, RESET_KIND_SHUTDOWN, 0);
 	err = tg3_init_hw(tp, true);
-	if (err)
+	if (err) {
+		tg3_full_unlock(tp);
+		tp->irq_sync = 0;
+		tg3_napi_enable(tp);
+		/* Clear this flag so that tg3_reset_task_cancel() will not
+		 * call cancel_work_sync() and wait forever.
+		 */
+		tg3_flag_clear(tp, RESET_TASK_PENDING);
+		dev_close(tp->dev);
 		goto out;
+	}
 	tg3_netif_start(tp);
-out:
 	tg3_full_unlock(tp);
 	if (!err)
 		tg3_phy_start(tp);
 	tg3_flag_clear(tp, RESET_TASK_PENDING);
+out:
 	rtnl_unlock();
 }
 	case SIOCGMIIPHY:
 		data->phy_id = tp->phy_addr;
-		/* fall through */
+		fallthrough;
 	case SIOCGMIIREG: {
 		u32 mii_regval;
 				val |= DMA_RWCTRL_WRITE_BNDRY_64_PCIE;
 				break;
 			}
-			/* fallthrough */
+			fallthrough;
 		case 128:
 		default:
 			val &= ~DMA_RWCTRL_WRITE_BNDRY_DISAB_PCIE;
 					DMA_RWCTRL_WRITE_BNDRY_16);
 				break;
 			}
-			/* fallthrough */
+			fallthrough;
 		case 32:
 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
 				val |= (DMA_RWCTRL_READ_BNDRY_32 |
 					DMA_RWCTRL_WRITE_BNDRY_32);
 				break;
 			}
-			/* fallthrough */
+			fallthrough;
 		case 64:
 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
 				val |= (DMA_RWCTRL_READ_BNDRY_64 |
 					DMA_RWCTRL_WRITE_BNDRY_64);
 				break;
 			}
-			/* fallthrough */
+			fallthrough;
 		case 128:
 			if (goal == BOUNDARY_SINGLE_CACHELINE) {
 				val |= (DMA_RWCTRL_READ_BNDRY_128 |
 					DMA_RWCTRL_WRITE_BNDRY_128);
 				break;
 			}
-			/* fallthrough */
+			fallthrough;
 		case 256:
 			val |= (DMA_RWCTRL_READ_BNDRY_256 |
 				DMA_RWCTRL_WRITE_BNDRY_256);

drivers/net/ethernet/brocade/bna/bfa_ioc.c+3−3

@@ -321,7 +321,7 @@ bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event) · 320 unmodified lines
321	case IOC_E_PFFAILED:	321	case IOC_E_PFFAILED:
322	case IOC_E_HWERROR:	322	case IOC_E_HWERROR:
323	del_timer(&ioc->ioc_timer);	323	del_timer(&ioc->ioc_timer);
324	/* fall through */	324	fallthrough;
325	case IOC_E_TIMEOUT:	325	case IOC_E_TIMEOUT:
326	ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);	326	ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
327	bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);	327	bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
@@ -780,7 +780,7 @@ bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event) · 452 unmodified lines
780		780
781	case IOCPF_E_INITFAIL:	781	case IOCPF_E_INITFAIL:
782	del_timer(&ioc->iocpf_timer);	782	del_timer(&ioc->iocpf_timer);
783	/* fall through */	783	fallthrough;
784		784
785	case IOCPF_E_TIMEOUT:	785	case IOCPF_E_TIMEOUT:
786	bfa_nw_ioc_hw_sem_release(ioc);	786	bfa_nw_ioc_hw_sem_release(ioc);
@@ -849,7 +849,7 @@ bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event) · 62 unmodified lines
849		849
850	case IOCPF_E_FAIL:	850	case IOCPF_E_FAIL:
851	del_timer(&ioc->iocpf_timer);	851	del_timer(&ioc->iocpf_timer);
852	/* fall through*/	852	fallthrough;
853		853
854	case IOCPF_E_TIMEOUT:	854	case IOCPF_E_TIMEOUT:
855	bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);	855	bfa_ioc_set_cur_ioc_fwstate(ioc, BFI_IOC_FAIL);

drivers/net/ethernet/brocade/bna/bna_enet.c+1−1

@@ -1084,7 +1084,7 @@ bna_enet_sm_cfg_wait(struct bna_enet *enet, · 1083 unmodified lines
1084		1084
1085	case ENET_E_CHLD_STOPPED:	1085	case ENET_E_CHLD_STOPPED:
1086	bna_enet_rx_start(enet);	1086	bna_enet_rx_start(enet);
1087	/* Fall through */	1087	fallthrough;
1088	case ENET_E_FWRESP_PAUSE:	1088	case ENET_E_FWRESP_PAUSE:
1089	if (enet->flags & BNA_ENET_F_PAUSE_CHANGED) {	1089	if (enet->flags & BNA_ENET_F_PAUSE_CHANGED) {
1090	enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;	1090	enet->flags &= ~BNA_ENET_F_PAUSE_CHANGED;

drivers/net/ethernet/brocade/bna/bna_tx_rx.c+1−1

@@ -1636,7 +1636,7 @@ bna_bfi_rx_enet_start(struct bna_rx *rx) · 1635 unmodified lines
1636	&q1->qpt);	1636	&q1->qpt);
1637	cfg_req->q_cfg[i].qs.rx_buffer_size =	1637	cfg_req->q_cfg[i].qs.rx_buffer_size =
1638	htons((u16)q1->buffer_size);	1638	htons((u16)q1->buffer_size);
1639	/* Fall through */	1639	fallthrough;
1640		1640
1641	case BNA_RXP_SINGLE:	1641	case BNA_RXP_SINGLE:
1642	/* Large/Single RxQ */	1642	/* Large/Single RxQ */

drivers/net/ethernet/cadence/macb_ptp.c+1−1

@@ -460,7 +460,7 @@ int gem_set_hwtst(struct net_device dev, struct ifreq ifr, int cmd) · 459 unmodified lines
460	case HWTSTAMP_TX_ONESTEP_SYNC:	460	case HWTSTAMP_TX_ONESTEP_SYNC:
461	if (gem_ptp_set_one_step_sync(bp, 1) != 0)	461	if (gem_ptp_set_one_step_sync(bp, 1) != 0)
462	return -ERANGE;	462	return -ERANGE;
463	/* fall through */	463	fallthrough;
464	case HWTSTAMP_TX_ON:	464	case HWTSTAMP_TX_ON:
465	tx_bd_control = TSTAMP_ALL_FRAMES;	465	tx_bd_control = TSTAMP_ALL_FRAMES;
466	break;	466	break;

drivers/net/ethernet/cavium/liquidio/lio_main.c+14−15

 		schedule_timeout_uninterruptible(HZ / 10);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_HOST_OK:
-		/* fallthrough */
 	case OCT_DEV_CONSOLE_INIT_DONE:
 		/* Remove any consoles */
 		octeon_remove_consoles(oct);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_IO_QUEUES_DONE:
 		if (lio_wait_for_instr_fetch(oct))
 			dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
 		octeon_free_sc_done_list(oct);
 		octeon_free_sc_zombie_list(oct);
-	/* fallthrough */
+		fallthrough;
 	case OCT_DEV_INTR_SET_DONE:
 		/* Disable interrupts  */
 		oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
 		kfree(oct->irq_name_storage);
 		oct->irq_name_storage = NULL;
-	/* fallthrough */
+		fallthrough;
 	case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
 		if (OCTEON_CN23XX_PF(oct))
 			octeon_free_ioq_vector(oct);
-	/* fallthrough */
+		fallthrough;
 	case OCT_DEV_MBOX_SETUP_DONE:
 		if (OCTEON_CN23XX_PF(oct))
 			oct->fn_list.free_mbox(oct);
-	/* fallthrough */
+		fallthrough;
 	case OCT_DEV_IN_RESET:
 	case OCT_DEV_DROQ_INIT_DONE:
 		/* Wait for any pending operations */
 			}
 		}
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_RESP_LIST_INIT_DONE:
 		octeon_delete_response_list(oct);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_INSTR_QUEUE_INIT_DONE:
 		for (i = 0; i < MAX_OCTEON_INSTR_QUEUES(oct); i++) {
 			if (!(oct->io_qmask.iq & BIT_ULL(i)))
 		if (oct->sriov_info.sriov_enabled)
 			pci_disable_sriov(oct->pci_dev);
 #endif
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_SC_BUFF_POOL_INIT_DONE:
 		octeon_free_sc_buffer_pool(oct);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_DISPATCH_INIT_DONE:
 		octeon_delete_dispatch_list(oct);
 		cancel_delayed_work_sync(&oct->nic_poll_work.work);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_PCI_MAP_DONE:
 		refcount = octeon_deregister_device(oct);
 		octeon_unmap_pci_barx(oct, 0);
 		octeon_unmap_pci_barx(oct, 1);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_PCI_ENABLE_DONE:
 		pci_clear_master(oct->pci_dev);
 		/* Disable the device, releasing the PCI INT */
 		pci_disable_device(oct->pci_dev);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_BEGIN_STATE:
 		/* Nothing to be done here either */
 		break;
 	case SIOCSHWTSTAMP:
 		if (lio->oct_dev->ptp_enable)
 			return hwtstamp_ioctl(netdev, ifr);
-		/* fall through */
+		fallthrough;
 	default:
 		return -EOPNOTSUPP;
 	}

drivers/net/ethernet/cavium/liquidio/lio_vf_main.c+12−13

 		schedule_timeout_uninterruptible(HZ / 10);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_HOST_OK:
-		/* fallthrough */
 	case OCT_DEV_IO_QUEUES_DONE:
 		if (lio_wait_for_instr_fetch(oct))
 			dev_err(&oct->pci_dev->dev, "IQ had pending instructions\n");
 		octeon_free_sc_done_list(oct);
 		octeon_free_sc_zombie_list(oct);
-	/* fall through */
+		fallthrough;
 	case OCT_DEV_INTR_SET_DONE:
 		/* Disable interrupts  */
 		oct->fn_list.disable_interrupt(oct, OCTEON_ALL_INTR);
 		else
 			cn23xx_vf_ask_pf_to_do_flr(oct);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_MSIX_ALLOC_VECTOR_DONE:
 		octeon_free_ioq_vector(oct);
-		/* fallthrough */
+		fallthrough;
 	case OCT_DEV_MBOX_SETUP_DONE:
 		oct->fn_list.free_mbox(oct);
-		/* fallthrough */

51 more lines aren’t shown here.

drivers/net/ethernet/cavium/thunder/nicvf_ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/cavium/thunder/nicvf_main.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/chelsio/cxgb3/cxgb3_main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/chelsio/cxgb3/l2t.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/chelsio/cxgb4/cxgb4_thermal.c+6−2

This diff is large: its 29 lines aren’t shown here.

drivers/net/ethernet/chelsio/cxgb4/l2t.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/chelsio/cxgb4/t4_hw.c+3−3

This diff is large: its 17 lines aren’t shown here.

drivers/net/ethernet/chelsio/cxgb4vf/cxgb4vf_main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/cisco/enic/enic_main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/cortina/gemini.c+17−17

This diff is large: its 52 lines aren’t shown here.

drivers/net/ethernet/davicom/dm9000.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/dec/tulip/de4x5.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/net/ethernet/dec/tulip/tulip_core.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/dec/tulip/winbond-840.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/emulex/benet/be_ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/freescale/dpaa/dpaa_eth.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/freescale/dpaa/dpaa_ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/freescale/fman/fman_memac.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/freescale/fman/fman_port.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/freescale/ucc_geth.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/hisilicon/hns/hns_enet.c+6−3

This diff is large: its 23 lines aren’t shown here.

drivers/net/ethernet/hisilicon/hns/hns_ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+5−3

This diff is large: its 36 lines aren’t shown here.

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+1−3

This diff is large: its 22 lines aren’t shown here.

drivers/net/ethernet/ibm/ehea/ehea_main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/ibm/emac/core.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/ibm/ibmvnic.c+14−1

This diff is large: its 47 lines aren’t shown here.

drivers/net/ethernet/intel/e1000e/netdev.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/net/ethernet/intel/igb/igb_main.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/net/ethernet/marvell/mvneta.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/marvell/mvpp2/mvpp2_cls.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/marvell/skge.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/marvell/sky2.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/mediatek/mtk_eth_soc.c+3−3

This diff is large: its 23 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlx4/mr.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxfw/mlxfw_fsm.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/core.c+9−9

This diff is large: its 31 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/core_env.c+3−3

This diff is large: its 20 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/core_hwmon.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/spectrum.c+2−2

This diff is large: its 11 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/spectrum.h+5−5

This diff is large: its 17 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/spectrum_router.c+16−16

This diff is large: its 116 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/spectrum_span.c+3−3

This diff is large: its 16 lines aren’t shown here.

drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c+6−6

This diff is large: its 40 lines aren’t shown here.

drivers/net/ethernet/microchip/lan743x_ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/mscc/ocelot.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/natsemi/natsemi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/neterion/vxge/vxge-config.c+3−3

This diff is large: its 24 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/crypto/tls.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/flower/action.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/flower/cmsg.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/flower/offload.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/flower/tunnel_conf.c+2−0

This diff is large: its 16 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/nfp_asm.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/nfp_net_common.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c+2−2

This diff is large: its 15 lines aren’t shown here.

drivers/net/ethernet/netronome/nfp/nfpcore/nfp_rtsym.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_param.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/packetengines/yellowfin.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/pensando/ionic/ionic_txrx.c+3−10

This diff is large: its 39 lines aren’t shown here.

drivers/net/ethernet/qlogic/netxen/netxen_nic_ethtool.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/qlogic/qed/qed_cxt.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/qlogic/qed/qed_dev.c+2−2

This diff is large: its 17 lines aren’t shown here.

drivers/net/ethernet/qlogic/qed/qed_main.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/qlogic/qed/qed_mcp.c+5−5

This diff is large: its 45 lines aren’t shown here.

drivers/net/ethernet/qlogic/qla3xxx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/qlogic/qlcnic/qlcnic_ethtool.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/realtek/r8169_main.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/renesas/ravb_main.c+55−55

This diff is large: its 166 lines aren’t shown here.

drivers/net/ethernet/rocker/rocker_main.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/net/ethernet/samsung/sxgbe/sxgbe_ethtool.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/sfc/ef100_rx.c+4−4

This diff is large: its 32 lines aren’t shown here.

drivers/net/ethernet/sfc/falcon/ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/sfc/falcon/farch.c+7−7

This diff is large: its 58 lines aren’t shown here.

drivers/net/ethernet/sfc/farch.c+7−7

This diff is large: its 58 lines aren’t shown here.

drivers/net/ethernet/sfc/mcdi_filters.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/sfc/mcdi_port_common.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/sfc/rx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/sis/sis900.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/smsc/smc911x.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/socionext/netsec.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/stmicro/stmmac/dwmac-anarion.c+4−3

This diff is large: its 14 lines aren’t shown here.

drivers/net/ethernet/stmicro/stmmac/stmmac_selftests.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/stmicro/stmmac/stmmac_tc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/sun/cassini.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/sun/niu.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/sun/sungem.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/ti/am65-cpsw-nuss.c+2−0

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/ti/cpsw-phy-sel.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/ethernet/ti/cpsw.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/ti/cpsw_new.c+22−7

This diff is large: its 42 lines aren’t shown here.

drivers/net/ethernet/ti/cpsw_priv.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/ethernet/ti/tlan.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/toshiba/ps3_gelic_wireless.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/ethernet/toshiba/spider_net.c+14−14

This diff is large: its 63 lines aren’t shown here.

drivers/net/ethernet/xircom/xirc2ps_cs.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/fddi/skfp/pcmplc.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/fjes/fjes_main.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/gtp.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/net/hamradio/baycom_epp.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/hamradio/mkiss.c+2−3

This diff is large: its 26 lines aren’t shown here.

drivers/net/macvlan.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/mii.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/netdevsim/bus.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/netdevsim/fib.c+3−3

This diff is large: its 18 lines aren’t shown here.

drivers/net/phy/adin.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/net/phy/dp83640.c+4−4

This diff is large: its 26 lines aren’t shown here.

drivers/net/phy/dp83867.c+2−2

This diff is large: its 12 lines aren’t shown here.

drivers/net/phy/dp83869.c+6−6

This diff is large: its 25 lines aren’t shown here.

drivers/net/phy/fixed_phy.c+2−2

This diff is large: its 16 lines aren’t shown here.

drivers/net/phy/phy.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/phy/phy_device.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/phy/phylink.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/phy/sfp-bus.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/phy/sfp.c+6−6

This diff is large: its 54 lines aren’t shown here.

drivers/net/plip/plip.c+13−13

This diff is large: its 117 lines aren’t shown here.

drivers/net/tun.c+3−3

This diff is large: its 22 lines aren’t shown here.

drivers/net/usb/Kconfig+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/net/usb/aqc111.c+3−3

This diff is large: its 17 lines aren’t shown here.

drivers/net/usb/asix_common.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/usb/catc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/usb/cdc-phonet.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/usb/dm9601.c+4−0

This diff is large: its 11 lines aren’t shown here.

drivers/net/usb/lan78xx.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/usb/pegasus.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/net/usb/r8152.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/net/usb/rtl8150.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/usb/usbnet.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/net/veth.c+4−4

This diff is large: its 26 lines aren’t shown here.

drivers/net/virtio_net.c+3−3

This diff is large: its 22 lines aren’t shown here.

drivers/net/vmxnet3/vmxnet3_ethtool.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wan/hdlc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wan/hdlc_cisco.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/net/wan/lapbether.c+4−1

This diff is large: its 26 lines aren’t shown here.

drivers/net/wan/sdla.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wan/x25_asy.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wimax/i2400m/control.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wimax/i2400m/usb-fw.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wimax/i2400m/usb-tx.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/wimax/i2400m/usb.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/xen-netback/hash.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/xen-netback/xenbus.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/net/xen-netfront.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/nfc/pn533/pn533.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/nfc/st21nfca/dep.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/nfc/st95hf/core.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/nfc/trf7970a.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/ntb/ntb_transport.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/nvdimm/dimm_devs.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/nvme/host/core.c+104−48

This diff is large: its 296 lines aren’t shown here.

drivers/nvme/host/fabrics.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/nvme/host/fc.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/nvme/host/multipath.c+26−43

This diff is large: its 105 lines aren’t shown here.

drivers/nvme/host/nvme.h+28−5

This diff is large: its 62 lines aren’t shown here.

drivers/nvme/host/pci.c+12−11

This diff is large: its 91 lines aren’t shown here.

drivers/nvme/host/rdma.c+53−19

This diff is large: its 168 lines aren’t shown here.

drivers/nvme/host/tcp.c+59−26

This diff is large: its 196 lines aren’t shown here.

drivers/nvme/target/configfs.c+1−0

This diff is large: its 8 lines aren’t shown here.

drivers/nvme/target/core.c+7−1

This diff is large: its 29 lines aren’t shown here.

drivers/nvme/target/fc.c+2−2

This diff is large: its 12 lines aren’t shown here.

drivers/nvme/target/fcloop.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/nvme/target/io-cmd-bdev.c+0−1

This diff is large: its 8 lines aren’t shown here.

drivers/nvme/target/loop.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/nvme/target/passthru.c+17−8

This diff is large: its 84 lines aren’t shown here.

drivers/nvme/target/rdma.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/nvme/target/tcp.c+9−1

This diff is large: its 24 lines aren’t shown here.

drivers/opp/core.c+16−6

This diff is large: its 51 lines aren’t shown here.

drivers/opp/opp.h+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/parport/ieee1284.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/parport/parport_pc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/pci/controller/dwc/pci-imx6.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/pci/controller/pci-rcar-gen2.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/pci/hotplug/ibmphp_res.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/pci/hotplug/pciehp_ctrl.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/pci/hotplug/shpchp_ctrl.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/pci/pci.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/pci/proc.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/pci/quirks.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/pci/setup-bus.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/pci/xen-pcifront.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/pcmcia/db1xxx_ss.c+4−4

This diff is large: its 27 lines aren’t shown here.

drivers/perf/arm-ccn.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/perf/arm_spe_pmu.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/phy/qualcomm/phy-qcom-usb-hs.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/phy/rockchip/phy-rockchip-inno-usb2.c+4−4

This diff is large: its 32 lines aren’t shown here.

drivers/platform/olpc/olpc-xo175-ec.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/platform/x86/acer-wmi.c+4−4

This diff is large: its 36 lines aren’t shown here.

drivers/platform/x86/dell-laptop.c+2−2

This diff is large: its 13 lines aren’t shown here.

drivers/platform/x86/surfacepro3_button.c+4−4

This diff is large: its 33 lines aren’t shown here.

drivers/platform/x86/thinkpad_acpi.c+3−3

This diff is large: its 27 lines aren’t shown here.

drivers/platform/x86/toshiba_acpi.c+1−1

This diff is large: its 9 lines aren’t shown here.

drivers/power/supply/ab8500_charger.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/power/supply/ab8500_fg.c+2−2

This diff is large: its 18 lines aren’t shown here.

drivers/power/supply/abx500_chargalg.c+13−13

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drivers/power/supply/axp20x_usb_power.c+1−1

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drivers/power/supply/cros_usbpd-charger.c+1−1

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drivers/power/supply/max8925_power.c+1−1

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drivers/power/supply/wm831x_power.c+1−1

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drivers/power/supply/wm8350_power.c+1−1

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drivers/ps3/ps3av.c+1−1

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drivers/ps3/ps3av_cmd.c+2−2

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drivers/rapidio/devices/rio_mport_cdev.c+1−1

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drivers/regulator/axp20x-regulator.c+4−4

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drivers/regulator/core.c+1−1

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drivers/regulator/slg51000-regulator.c+1−1

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drivers/regulator/twl6030-regulator.c+1−1

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drivers/remoteproc/omap_remoteproc.c+0−1

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drivers/reset/reset-imx7.c+7−7

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drivers/rpmsg/qcom_glink_native.c+2−2

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drivers/rtc/rtc-m41t80.c+1−1

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drivers/rtc/rtc-pcf85063.c+1−1

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drivers/rtc/rtc-pcf8523.c+1−1

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drivers/rtc/rtc-stmp3xxx.c+1−1

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drivers/s390/net/ctcm_fsms.c+1−1

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drivers/s390/net/ctcm_mpc.c+3−3

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drivers/s390/net/qeth_core_main.c+2−2

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drivers/s390/net/qeth_ethtool.c+3−3

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drivers/s390/net/qeth_l2_main.c+1−1

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drivers/s390/net/qeth_l3_main.c+1−1

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drivers/scsi/53c700.c+1−1

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drivers/scsi/BusLogic.c+1−1

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drivers/scsi/FlashPoint.c+6−3

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drivers/scsi/NCR5380.c+1−1

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drivers/scsi/aacraid/aachba.c+4−4

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drivers/scsi/aacraid/commsup.c+1−1

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drivers/scsi/aacraid/linit.c+1−1

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drivers/scsi/aic7xxx/aic79xx_core.c+20−20

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drivers/scsi/aic7xxx/aic79xx_osm.c+1−1

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drivers/scsi/aic7xxx/aic7xxx_core.c+14−14

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drivers/scsi/aic94xx/aic94xx_scb.c+5−5

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drivers/scsi/aic94xx/aic94xx_tmf.c+1−1

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drivers/scsi/arcmsr/arcmsr_hba.c+1−1

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drivers/scsi/arm/fas216.c+6−6

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drivers/scsi/be2iscsi/be_iscsi.c+1−1

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drivers/scsi/be2iscsi/be_main.c+1−1

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drivers/scsi/bfa/bfa_fcpim.c+3−3

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drivers/scsi/bfa/bfa_fcs_lport.c+2−2

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drivers/scsi/bfa/bfa_fcs_rport.c+7−7

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drivers/scsi/bfa/bfa_ioc.c+3−3

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drivers/scsi/bfa/bfa_svc.c+1−1

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drivers/scsi/bnx2fc/bnx2fc_hwi.c+0−1

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drivers/scsi/csiostor/csio_hw.c+1−1

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drivers/scsi/csiostor/csio_lnode.c+0−1

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drivers/scsi/csiostor/csio_wr.c+1−1

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drivers/scsi/cxgbi/cxgb3i/cxgb3i.c+1−1

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drivers/scsi/cxgbi/cxgb4i/cxgb4i.c+1−1

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drivers/scsi/cxgbi/libcxgbi.c+1−1

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drivers/scsi/cxlflash/main.c+14−14

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drivers/scsi/cxlflash/superpipe.c+4−6

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drivers/scsi/device_handler/scsi_dh_hp_sw.c+2−2

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drivers/scsi/esas2r/esas2r_flash.c+1−1

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drivers/scsi/esas2r/esas2r_init.c+2−2

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drivers/scsi/esp_scsi.c+2−2

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drivers/scsi/fcoe/fcoe_ctlr.c+4−4

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drivers/scsi/g_NCR5380.c+1−1

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drivers/scsi/hisi_sas/hisi_sas_main.c+1−1

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drivers/scsi/hpsa.c+5−5

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drivers/scsi/ibmvscsi/ibmvfc.c+3−3

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drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c+3−3

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drivers/scsi/imm.c+7−7

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drivers/scsi/isci/phy.c+1−1

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drivers/scsi/isci/remote_device.c+2−2

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drivers/scsi/isci/remote_node_context.c+3−3

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drivers/scsi/isci/request.c+1−1

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drivers/scsi/libfc/fc_exch.c+2−2

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drivers/scsi/libfc/fc_fcp.c+4−4

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drivers/scsi/libfc/fc_lport.c+1−1

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drivers/scsi/libfc/fc_rport.c+1−1

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drivers/scsi/libiscsi.c+3−3

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drivers/scsi/libiscsi_tcp.c+1−1

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drivers/scsi/libsas/sas_ata.c+1−1

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drivers/scsi/libsas/sas_discover.c+1−1

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drivers/scsi/libsas/sas_expander.c+1−1

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drivers/scsi/libsas/sas_scsi_host.c+1−1

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drivers/scsi/lpfc/lpfc_ct.c+2−2

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drivers/scsi/lpfc/lpfc_els.c+1−1

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drivers/scsi/lpfc/lpfc_hbadisc.c+3−4

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drivers/scsi/lpfc/lpfc_nportdisc.c+1−1

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drivers/scsi/lpfc/lpfc_nvme.c+1−1

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drivers/scsi/lpfc/lpfc_scsi.c+4−4

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drivers/scsi/lpfc/lpfc_sli.c+14−14

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drivers/scsi/megaraid.c+6−6

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drivers/scsi/megaraid/megaraid_mbox.c+1−1

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drivers/scsi/megaraid/megaraid_sas_base.c+1−1

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drivers/scsi/megaraid/megaraid_sas_fusion.c+1−1

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drivers/scsi/mesh.c+1−1

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drivers/scsi/mpt3sas/mpt3sas_base.c+1−1

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drivers/scsi/mpt3sas/mpt3sas_ctl.c+1−1

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drivers/scsi/mpt3sas/mpt3sas_scsih.c+4−4

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drivers/scsi/myrb.c+4−4

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drivers/scsi/ncr53c8xx.c+7−7

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drivers/scsi/pcmcia/nsp_cs.c+1−1

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drivers/scsi/ppa.c+5−5

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drivers/scsi/qedf/qedf_main.c+1−1

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drivers/scsi/qla2xxx/qla_gs.c+1−1

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drivers/scsi/qla2xxx/qla_init.c+1−1

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drivers/scsi/qla2xxx/qla_iocb.c+1−1

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drivers/scsi/qla2xxx/qla_isr.c+5−5

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drivers/scsi/qla2xxx/qla_sup.c+3−3

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drivers/scsi/qla2xxx/qla_target.c+3−3

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drivers/scsi/qla4xxx/ql4_os.c+1−1

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drivers/scsi/qlogicpti.c+10−10

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drivers/scsi/scsi_debug.c+0−2

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drivers/scsi/scsi_error.c+14−14

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drivers/scsi/scsi_ioctl.c+2−2

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drivers/scsi/scsi_lib.c+1−1

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drivers/scsi/smartpqi/smartpqi_init.c+8−9

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drivers/scsi/sr.c+2−2

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drivers/scsi/st.c+4−4

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drivers/scsi/sun3_scsi.c+2−2

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drivers/scsi/sym53c8xx_2/sym_fw.c+1−1

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drivers/scsi/sym53c8xx_2/sym_hipd.c+2−2

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drivers/scsi/sym53c8xx_2/sym_nvram.c+1−1

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drivers/scsi/ufs/ufs_bsg.c+1−1

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drivers/scsi/ufs/ufshcd.c+4−4

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drivers/scsi/virtio_scsi.c+1−1

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drivers/scsi/vmw_pvscsi.c+1−1

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drivers/scsi/wd33c93.c+1−1

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drivers/scsi/xen-scsifront.c+1−1

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drivers/soc/qcom/socinfo.c+11−11

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drivers/soc/tegra/pmc.c+1−1

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drivers/spi/spi-bcm2835aux.c+2−2

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drivers/spi/spi-fsl-cpm.c+2−2

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drivers/spi/spi-sprd-adi.c+1−1

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drivers/ssb/driver_chipcommon.c+1−1

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drivers/ssb/driver_mipscore.c+1−1

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drivers/ssb/scan.c+1−1

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drivers/staging/media/atomisp/pci/atomisp_cmd.c+1−1

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drivers/staging/media/atomisp/pci/atomisp_compat_css20.c+4−4

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drivers/staging/media/atomisp/pci/atomisp_ioctl.c+0−1

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drivers/staging/media/atomisp/pci/atomisp_v4l2.c+1−1

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drivers/staging/media/atomisp/pci/hmm/hmm_bo.c+1−1

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drivers/staging/media/atomisp/pci/sh_css.c+1−1

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drivers/staging/media/hantro/hantro_g1_mpeg2_dec.c+1−1

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drivers/staging/media/hantro/rk3399_vpu_hw_mpeg2_dec.c+1−1

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drivers/staging/media/imx/imx-media-csi.c+1−1

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drivers/staging/media/sunxi/cedrus/cedrus.c+6−1

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drivers/staging/media/usbvision/usbvision-i2c.c+3−3

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drivers/target/iscsi/cxgbit/cxgbit_main.c+1−1

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drivers/target/iscsi/iscsi_target.c+1−1

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drivers/target/target_core_pr.c+2−2

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drivers/target/target_core_sbc.c+1−1

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drivers/target/target_core_transport.c+2−2

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drivers/target/tcm_fc/tfc_cmd.c+1−1

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drivers/thermal/qcom/qcom-spmi-temp-alarm.c+2−2

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drivers/thermal/qcom/tsens-v0_1.c+4−4

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drivers/thermal/qcom/tsens-v1.c+2−2

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drivers/thermal/thermal_core.c+3−2

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drivers/thermal/ti-soc-thermal/omap4-thermal-data.c+12−11

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drivers/thermal/ti-soc-thermal/omap4xxx-bandgap.h+7−3

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drivers/thunderbolt/ctl.c+1−1

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drivers/thunderbolt/switch.c+1−1

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drivers/thunderbolt/tunnel.c+2−2

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drivers/tty/hvc/hvc_xen.c+1−1

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drivers/tty/mips_ejtag_fdc.c+1−1

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drivers/tty/n_gsm.c+2−2

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drivers/tty/n_hdlc.c+1−1

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drivers/tty/n_r3964.c+0−1

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drivers/tty/serial/8250/8250_em.c+1−1

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drivers/tty/serial/8250/8250_exar.c+21−3

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drivers/tty/serial/8250/8250_fintek.c+1−1

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drivers/tty/serial/8250/8250_pci.c+1−1

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drivers/tty/serial/8250/8250_port.c+7−4

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drivers/tty/serial/8250/8250_uniphier.c+3−3

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drivers/tty/serial/Kconfig+1−0

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drivers/tty/serial/Makefile+1−0

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drivers/tty/serial/amba-pl011.c+9−7

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drivers/tty/serial/atmel_serial.c+1−1

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drivers/tty/serial/omap-serial.c+0−2

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drivers/tty/serial/qcom_geni_serial.c+8−3

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drivers/tty/serial/rda-uart.c+1−1

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drivers/tty/serial/samsung_tty.c+5−3

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drivers/tty/serial/serial-tegra.c+1−1

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drivers/tty/serial/serial_core.c+1−1

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drivers/tty/serial/stm32-usart.c+1−1

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drivers/tty/serial/sunsu.c+1−1

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drivers/tty/serial/sunzilog.c+1−1

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drivers/tty/serial/xilinx_uartps.c+1−1

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drivers/tty/tty_ioctl.c+1−1

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drivers/tty/vt/vt.c+6−5

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drivers/tty/vt/vt_ioctl.c+11−1

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drivers/usb/c67x00/c67x00-sched.c+2−1

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drivers/usb/class/cdc-acm.c+10−12

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drivers/usb/core/driver.c+38−2

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drivers/usb/core/generic.c+3−2

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drivers/usb/core/hcd-pci.c+4−1

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drivers/usb/core/hub.c+1−1

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drivers/usb/core/quirks.c+7−0

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drivers/usb/dwc3/core.c+2−3

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drivers/usb/dwc3/gadget.c+89−18

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drivers/usb/gadget/function/f_mass_storage.c+0−1

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drivers/usb/gadget/function/f_ncm.c+69−12

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drivers/usb/gadget/function/f_tcm.c+4−3

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drivers/usb/gadget/u_f.h+27−11

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drivers/usb/gadget/udc/atmel_usba_udc.c+1−1

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drivers/usb/gadget/udc/fsl_udc_core.c+1−1

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drivers/usb/gadget/udc/pxa25x_udc.c+2−2

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drivers/usb/host/isp116x-hcd.c+3−3

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drivers/usb/host/ohci-exynos.c+2−3

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drivers/usb/host/pci-quirks.c+2−1

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drivers/usb/host/xhci-dbgcap.c+1−1

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drivers/usb/host/xhci-debugfs.c+4−4

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drivers/usb/host/xhci-hub.c+11−10

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drivers/usb/host/xhci-mem.c+2−2

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drivers/usb/host/xhci-pci-renesas.c+1−18

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drivers/usb/host/xhci-ring.c+1−1

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drivers/usb/host/xhci-tegra.c+3−1

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drivers/usb/host/xhci.c+3−2

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drivers/usb/misc/lvstest.c+1−1

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drivers/usb/misc/yurex.c+1−1

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drivers/usb/musb/cppi_dma.c+1−1

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drivers/usb/musb/musb_core.c+6−7

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drivers/usb/musb/musb_dsps.c+3−3

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drivers/usb/musb/musb_gadget_ep0.c+2−2

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tools/testing/selftests/powerpc/mm/Makefile+3−1

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tools/testing/selftests/powerpc/mm/prot_sao.c+43−0

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tools/testing/selftests/x86/test_vsyscall.c+20−2

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tools/usb/Build+2−0

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tools/usb/Makefile+45−8

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@@ -123,7 +123,9 @@ Energy-Performance Bias (EPB) knob (otherwise), which means that the processor's · 122 unmodified lines
123	internal P-state selection logic is expected to focus entirely on performance.	123	internal P-state selection logic is expected to focus entirely on performance.
124		124
125	This will override the EPP/EPB setting coming from the ``sysfs`` interface	125	This will override the EPP/EPB setting coming from the ``sysfs`` interface
126	(see `Energy vs Performance Hints`_ below).	126	(see `Energy vs Performance Hints`_ below). Moreover, any attempts to change
		127	the EPP/EPB to a value different from 0 ("performance") via ``sysfs`` in this
		128	configuration will be rejected.
127		129
128	Also, in this configuration the range of P-states available to the processor's	130	Also, in this configuration the range of P-states available to the processor's
129	internal P-state selection logic is always restricted to the upper boundary	131	internal P-state selection logic is always restricted to the upper boundary
@@ -564,8 +566,8 @@ Energy-Performance Preference (EPP) knob (if supported) or its · 434 unmodified lines
564	Energy-Performance Bias (EPB) knob. It is also possible to write a positive	566	Energy-Performance Bias (EPB) knob. It is also possible to write a positive
565	integer value between 0 to 255, if the EPP feature is present. If the EPP	567	integer value between 0 to 255, if the EPP feature is present. If the EPP
566	feature is not present, writing integer value to this attribute is not	568	feature is not present, writing integer value to this attribute is not
567	supported. In this case, user can use	569	supported. In this case, user can use the
568	"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.	570	"/sys/devices/system/cpu/cpu*/power/energy_perf_bias" interface.
569		571
570	[Note that tasks may by migrated from one CPU to another by the scheduler's	572	[Note that tasks may by migrated from one CPU to another by the scheduler's
571	load-balancing algorithm and if different energy vs performance hints are	573	load-balancing algorithm and if different energy vs performance hints are

@@ -68,7 +68,7 @@ See below for all known bank addresses, numbers of sensors in that bank, · 67 unmodified lines
68	number of bytes data per sensor and contents/meaning of those bytes.	68	number of bytes data per sensor and contents/meaning of those bytes.
69		69
70	Although both this document and the kernel driver have kept the sensor	70	Although both this document and the kernel driver have kept the sensor
71	terminoligy for the addressing within a bank this is not 100% correct, in	71	terminology for the addressing within a bank this is not 100% correct, in
72	bank 0x24 for example the addressing within the bank selects a PWM output not	72	bank 0x24 for example the addressing within the bank selects a PWM output not
73	a sensor.	73	a sensor.
74		74
@@ -155,7 +155,7 @@ After wider testing of the Linux kernel driver some variants of the uGuru have · 80 unmodified lines
155	turned up which do not hold 0x08 at DATA within 250 reads after writing the	155	turned up which do not hold 0x08 at DATA within 250 reads after writing the
156	bank address. With these versions this happens quite frequent, using larger	156	bank address. With these versions this happens quite frequent, using larger
157	timeouts doesn't help, they just go offline for a second or 2, doing some	157	timeouts doesn't help, they just go offline for a second or 2, doing some
158	internal callibration or whatever. Your code should be prepared to handle	158	internal calibration or whatever. Your code should be prepared to handle
159	this and in case of no response in this specific case just goto sleep for a	159	this and in case of no response in this specific case just goto sleep for a
160	while and then retry.	160	while and then retry.
161		161
@@ -331,6 +331,6 @@ the voltage / clock programming out, I tried reading and only reading banks · 169 unmodified lines
331	0-0x30 with the reading code used for the sensor banks (0x20-0x28) and this	331	0-0x30 with the reading code used for the sensor banks (0x20-0x28) and this
332	resulted in a _permanent_ reprogramming of the voltages, luckily I had the	332	resulted in a _permanent_ reprogramming of the voltages, luckily I had the
333	sensors part configured so that it would shutdown my system on any out of spec	333	sensors part configured so that it would shutdown my system on any out of spec
334	voltages which proprably safed my computer (after a reboot I managed to	334	voltages which probably safed my computer (after a reboot I managed to
335	immediately enter the bios and reload the defaults). This probably means that	335	immediately enter the bios and reload the defaults). This probably means that
336	the read/write cycle for the non sensor part is different from the sensor part.	336	the read/write cycle for the non sensor part is different from the sensor part.

@@ -17,7 +17,7 @@ Supported chips: · 16 unmodified lines
17	Note:	17	Note:
18	The uGuru is a microcontroller with onboard firmware which programs	18	The uGuru is a microcontroller with onboard firmware which programs
19	it to behave as a hwmon IC. There are many different revisions of the	19	it to behave as a hwmon IC. There are many different revisions of the
20	firmware and thus effectivly many different revisions of the uGuru.	20	firmware and thus effectively many different revisions of the uGuru.
21	Below is an incomplete list with which revisions are used for which	21	Below is an incomplete list with which revisions are used for which
22	Motherboards:	22	Motherboards:
23		23
@@ -33,7 +33,7 @@ Supported chips: · 9 unmodified lines
33	sensortype (Volt or Temp) for bank1 sensors, for revision 1 uGuru's	33	sensortype (Volt or Temp) for bank1 sensors, for revision 1 uGuru's
34	this does not always work. For these uGuru's the autodetection can	34	this does not always work. For these uGuru's the autodetection can
35	be overridden with the bank1_types module param. For all 3 known	35	be overridden with the bank1_types module param. For all 3 known
36	revison 1 motherboards the correct use of this param is:	36	revision 1 motherboards the correct use of this param is:
37	bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1	37	bank1_types=1,1,0,0,0,0,0,2,0,0,0,0,2,0,0,1
38	You may also need to specify the fan_sensors option for these boards	38	You may also need to specify the fan_sensors option for these boards
39	fan_sensors=5	39	fan_sensors=5

@@ -196,7 +196,7 @@ static inline void cpu_feature_keys_init(void) { } · 195 unmodified lines
196	#define CPU_FTR_SPURR LONG_ASM_CONST(0x0000000001000000)	196	#define CPU_FTR_SPURR LONG_ASM_CONST(0x0000000001000000)
197	#define CPU_FTR_DSCR LONG_ASM_CONST(0x0000000002000000)	197	#define CPU_FTR_DSCR LONG_ASM_CONST(0x0000000002000000)
198	#define CPU_FTR_VSX LONG_ASM_CONST(0x0000000004000000)	198	#define CPU_FTR_VSX LONG_ASM_CONST(0x0000000004000000)
199	// Free LONG_ASM_CONST(0x0000000008000000)	199	#define CPU_FTR_SAO LONG_ASM_CONST(0x0000000008000000)
200	#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0000000010000000)	200	#define CPU_FTR_CP_USE_DCBTZ LONG_ASM_CONST(0x0000000010000000)
201	#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0000000020000000)	201	#define CPU_FTR_UNALIGNED_LD_STD LONG_ASM_CONST(0x0000000020000000)
202	#define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0000000040000000)	202	#define CPU_FTR_ASYM_SMT LONG_ASM_CONST(0x0000000040000000)
@@ -441,7 +441,7 @@ static inline void cpu_feature_keys_init(void) { } · 238 unmodified lines
441	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \	441	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
442	CPU_FTR_COHERENT_ICACHE \| \	442	CPU_FTR_COHERENT_ICACHE \| \
443	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \	443	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
444	CPU_FTR_DSCR \| CPU_FTR_ASYM_SMT \| \	444	CPU_FTR_DSCR \| CPU_FTR_SAO \| CPU_FTR_ASYM_SMT \| \
445	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \	445	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
446	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| \	446	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| \
447	CPU_FTR_VMX_COPY \| CPU_FTR_HAS_PPR \| CPU_FTR_DABRX )	447	CPU_FTR_VMX_COPY \| CPU_FTR_HAS_PPR \| CPU_FTR_DABRX )
@@ -450,7 +450,7 @@ static inline void cpu_feature_keys_init(void) { } · 2 unmodified lines
450	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \	450	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
451	CPU_FTR_COHERENT_ICACHE \| \	451	CPU_FTR_COHERENT_ICACHE \| \
452	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \	452	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
453	CPU_FTR_DSCR \| \	453	CPU_FTR_DSCR \| CPU_FTR_SAO \| \
454	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \	454	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
455	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \	455	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \
456	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_DAWR \| \	456	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_DAWR \| \
@@ -461,7 +461,7 @@ static inline void cpu_feature_keys_init(void) { } · 4 unmodified lines
461	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \	461	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
462	CPU_FTR_COHERENT_ICACHE \| \	462	CPU_FTR_COHERENT_ICACHE \| \
463	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \	463	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
464	CPU_FTR_DSCR \| \	464	CPU_FTR_DSCR \| CPU_FTR_SAO \| \
465	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \	465	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
466	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \	466	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \
467	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_ARCH_207S \| \	467	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_ARCH_207S \| \
@@ -479,7 +479,7 @@ static inline void cpu_feature_keys_init(void) { } · 11 unmodified lines
479	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \	479	CPU_FTR_MMCRA \| CPU_FTR_SMT \| \
480	CPU_FTR_COHERENT_ICACHE \| \	480	CPU_FTR_COHERENT_ICACHE \| \
481	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \	481	CPU_FTR_PURR \| CPU_FTR_SPURR \| CPU_FTR_REAL_LE \| \
482	CPU_FTR_DSCR \| \	482	CPU_FTR_DSCR \| CPU_FTR_SAO \| \
483	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \	483	CPU_FTR_STCX_CHECKS_ADDRESS \| CPU_FTR_POPCNTB \| CPU_FTR_POPCNTD \| \
484	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \	484	CPU_FTR_CFAR \| CPU_FTR_HVMODE \| CPU_FTR_VMX_COPY \| \
485	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_ARCH_207S \| \	485	CPU_FTR_DBELL \| CPU_FTR_HAS_PPR \| CPU_FTR_ARCH_207S \| \

@@ -2209,7 +2209,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) · 2208 unmodified lines
2209	ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */	2209	ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2210	ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */	2210	ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
2211	ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;	2211	ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
2212	/* fall-through */	2212	fallthrough;
2213	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:	2213	case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
2214	ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */	2214	ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
2215	ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */	2215	ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
@@ -2370,7 +2370,7 @@ void cx23885_card_setup(struct cx23885_dev *dev) · 154 unmodified lines
2370	/* Currently only enabled for the integrated IR controller */	2370	/* Currently only enabled for the integrated IR controller */
2371	if (!enable_885_ir)	2371	if (!enable_885_ir)
2372	break;	2372	break;
2373	/* fall-through */	2373	fallthrough;
2374	case CX23885_BOARD_HAUPPAUGE_HVR1250:	2374	case CX23885_BOARD_HAUPPAUGE_HVR1250:
2375	case CX23885_BOARD_HAUPPAUGE_HVR1800:	2375	case CX23885_BOARD_HAUPPAUGE_HVR1800:
2376	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:	2376	case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:

@@ -1538,7 +1538,7 @@ static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, · 1537 unmodified lines
1538	/* PTP v2, UDP, any kind of event packet */	1538	/* PTP v2, UDP, any kind of event packet */
1539	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:	1539	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1540	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);	1540	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1541	/* Fall through - to PTP v1, UDP, any kind of event packet */	1541	fallthrough; /* to PTP v1, UDP, any kind of event packet */
1542	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:	1542	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1543	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);	1543	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1544	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);	1544	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
@@ -1549,7 +1549,7 @@ static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, · 4 unmodified lines
1549	/* PTP v2, UDP, Sync packet */	1549	/* PTP v2, UDP, Sync packet */
1550	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:	1550	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1551	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);	1551	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1552	/* Fall through - to PTP v1, UDP, Sync packet */	1552	fallthrough; /* to PTP v1, UDP, Sync packet */
1553	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:	1553	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1554	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);	1554	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1555	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);	1555	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);
@@ -1560,7 +1560,7 @@ static int xgbe_set_hwtstamp_settings(struct xgbe_prv_data *pdata, · 4 unmodified lines
1560	/* PTP v2, UDP, Delay_req packet */	1560	/* PTP v2, UDP, Delay_req packet */
1561	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:	1561	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1562	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);	1562	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSVER2ENA, 1);
1563	/* Fall through - to PTP v1, UDP, Delay_req packet */	1563	fallthrough; /* to PTP v1, UDP, Delay_req packet */
1564	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:	1564	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1565	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);	1565	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV4ENA, 1);
1566	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);	1566	XGMAC_SET_BITS(mac_tscr, MAC_TSCR, TSIPV6ENA, 1);