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MIPS: microMIPS: Fix decoding of swsp16 instruction

When the immediate encoded in the instruction is accessed, it is sign extended due to being a signed value being assigned to a signed integer. The ISA specifies that this operation is an unsigned operation. The sign extension leads us to incorrectly decode: 801e9c8e: cbf1 sw ra,68(sp) As having an immediate of 1073741809. Since the instruction format does not specify signed/unsigned, and this is currently the only location to use this instuction format, change it to an unsigned immediate.

Matt Redfearn committed 9 years ago

Commit cea8cd41 parent a0ae2b02 files · +2 −2Browse files

Unified · Split

2 files
  1. arch/mips/include/uapi/asm/inst.h +1 −1
  2. arch/mips/kernel/process.c +1 −1
arch/mips/include/uapi/asm/inst.h+1−1
@@ -981,7 +981,7 @@ struct mm16_r3_format { /* Load from global pointer format */ · 980 unmodified lines
981struct mm16_r5_format { /* Load/store from stack pointer format */981struct mm16_r5_format { /* Load/store from stack pointer format */
982 __BITFIELD_FIELD(unsigned int opcode : 6,982 __BITFIELD_FIELD(unsigned int opcode : 6,
983 __BITFIELD_FIELD(unsigned int rt : 5,983 __BITFIELD_FIELD(unsigned int rt : 5,
984 __BITFIELD_FIELD(signed int simmediate : 5,984 __BITFIELD_FIELD(unsigned int imm : 5,
985 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */985 __BITFIELD_FIELD(unsigned int : 16, /* Ignored */
986 ;))))986 ;))))
987};987};
arch/mips/kernel/process.c+1−1
@@ -214,7 +214,7 @@ static inline int is_ra_save_ins(union mips_instruction *ip, int *poff) · 213 unmodified lines
214 if (ip->mm16_r5_format.rt != 31)214 if (ip->mm16_r5_format.rt != 31)
215 return 0;215 return 0;
216 216
217 *poff = ip->mm16_r5_format.simmediate;217 *poff = ip->mm16_r5_format.imm;
218 *poff = (*poff << 2) / sizeof(ulong);218 *poff = (*poff << 2) / sizeof(ulong);
219 return 1;219 return 1;
220 220

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