Merge tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM driver updates from Arnd Bergmann: "These are the usual updates for SoC specific device drivers and related subsystems that don't have their own top-level maintainers: - ARM SCMI/SCPI updates to allow pluggable transport layers - TEE subsystem cleanups - A new driver for the Amlogic secure power domain controller - Various driver updates for the NXP Layerscape DPAA2, NXP i.MX SCU and TI OMAP2+ sysc drivers. - Qualcomm SoC driver updates, including a new library module for "protection domain" notifications - Lots of smaller bugfixes and cleanups in other drivers" * tag 'arm-drivers-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (70 commits) soc: fsl: qe: fix sparse warnings for ucc_slow.c soc: fsl: qe: ucc_slow: remove 0 assignment for kzalloc'ed structure soc: fsl: qe: fix sparse warnings for ucc_fast.c soc: fsl: qe: fix sparse warnings for qe_ic.c soc: fsl: qe: fix sparse warnings for ucc.c soc: fsl: qe: fix sparse warning for qe_common.c soc: fsl: qe: fix sparse warnings for qe.c soc: qcom: Fix QCOM_APR dependencies soc: qcom: pdr: Avoid uninitialized use of found in pdr_indication_cb soc: imx: drop COMPILE_TEST for IMX_SCU_SOC firmware: imx: add COMPILE_TEST for IMX_SCU driver soc: imx: gpc: fix power up sequencing soc: imx: increase build coverage for imx8m soc driver soc: qcom: apr: Add avs/audio tracking functionality dt-bindings: soc: qcom: apr: Add protection domain bindings soc: qcom: Introduce Protection Domain Restart helpers devicetree: bindings: firmware: add ipq806x to qcom_scm memory: tegra: Correct debugfs clk rate-range on Tegra124 memory: tegra: Correct debugfs clk rate-range on Tegra30 memory: tegra: Correct debugfs clk rate-range on Tegra20 ...

Linus Torvalds committed 6 years ago

Commit d18292d2 parents 0e8fb69 cedb41468 files · +3692 −633Browse files

Showing the changes to include/linux (7 of 68 files). Show all

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7 files

include/linux/firmware/imx/ipc.h +0 −1
include/linux/firmware/meson/meson_sm.h +2 −0
include/linux/platform_data/ti-sysc.h +5 −0
include/linux/soc/qcom/apr.h +1 −0
include/linux/soc/qcom/pdr.h +29 −0
include/linux/soc/qcom/qmi.h +1 −0
include/linux/tee_drv.h +1 −18

include/linux/firmware/imx/ipc.h+0−1

@@ -25,7 +25,6 @@ enum imx_sc_rpc_svc { · 24 unmodified lines
25	25	IMX_SC_RPC_SVC_PAD = 6,
26	26	IMX_SC_RPC_SVC_MISC = 7,
27	27	IMX_SC_RPC_SVC_IRQ = 8,
28		− IMX_SC_RPC_SVC_ABORT = 9
29	28	};
30	29
31	30	struct imx_sc_rpc_msg {

include/linux/firmware/meson/meson_sm.h+2−0

@@ -12,6 +12,8 @@ enum { · 11 unmodified lines
12	12	SM_EFUSE_WRITE,
13	13	SM_EFUSE_USER_MAX,
14	14	SM_GET_CHIP_ID,
	15	+ SM_A1_PWRC_SET,
	16	+ SM_A1_PWRC_GET,
15	17	};
16	18
17	19	struct meson_sm_firmware;

include/linux/platform_data/ti-sysc.h+5−0

@@ -17,6 +17,7 @@ enum ti_sysc_module_type { · 16 unmodified lines
17	17	TI_SYSC_OMAP4_MCASP,
18	18	TI_SYSC_OMAP4_USB_HOST_FS,
19	19	TI_SYSC_DRA7_MCAN,
	20	+ TI_SYSC_PRUSS,
20	21	};
21	22
22	23	struct ti_sysc_cookie {
@@ -49,6 +50,9 @@ struct sysc_regbits { · 26 unmodified lines
49	50	s8 emufree_shift;
50	51	};
51	52
	53	+#define SYSC_MODULE_QUIRK_PRUSS BIT(24)
	54	+#define SYSC_MODULE_QUIRK_DSS_RESET BIT(23)
	55	+#define SYSC_MODULE_QUIRK_RTC_UNLOCK BIT(22)
52	56	#define SYSC_QUIRK_CLKDM_NOAUTO BIT(21)
53	57	#define SYSC_QUIRK_FORCE_MSTANDBY BIT(20)
54	58	#define SYSC_MODULE_QUIRK_AESS BIT(19)
@@ -141,6 +145,7 @@ struct clk; · 86 unmodified lines
141	145
142	146	struct ti_sysc_platform_data {
143	147	struct of_dev_auxdata *auxdata;
	148	+ bool (*soc_type_gp)(void);
144	149	int (init_clockdomain)(struct device dev, struct clk *fck,
145	150	struct clk ick, struct ti_sysc_cookie cookie);
146	151	void (clkdm_deny_idle)(struct device dev,

include/linux/soc/qcom/apr.h+1−0

@@ -85,6 +85,7 @@ struct apr_device { · 84 unmodified lines
85	85	uint16_t domain_id;
86	86	uint32_t version;
87	87	char name[APR_NAME_SIZE];
	88	+ const char *service_path;
88	89	spinlock_t lock;
89	90	struct list_head node;
90	91	};

include/linux/soc/qcom/pdr.h+29−0

@@ -0,0 +1,29 @@
	1	+/* SPDX-License-Identifier: GPL-2.0 */
	2	+#ifndef __QCOM_PDR_HELPER__
	3	+#define __QCOM_PDR_HELPER__
	4	+
	5	+#include <linux/soc/qcom/qmi.h>
	6	+
	7	+#define SERVREG_NAME_LENGTH 64
	8	+
	9	+struct pdr_service;
	10	+struct pdr_handle;
	11	+
	12	+enum servreg_service_state {
	13	+ SERVREG_LOCATOR_ERR = 0x1,
	14	+ SERVREG_SERVICE_STATE_DOWN = 0x0FFFFFFF,
	15	+ SERVREG_SERVICE_STATE_UP = 0x1FFFFFFF,
	16	+ SERVREG_SERVICE_STATE_EARLY_DOWN = 0x2FFFFFFF,
	17	+ SERVREG_SERVICE_STATE_UNINIT = 0x7FFFFFFF,
	18	+};
	19	+
	20	+struct pdr_handle pdr_handle_alloc(void (status)(int state,
	21	+ char *service_path,
	22	+ void priv), void priv);
	23	+struct pdr_service pdr_add_lookup(struct pdr_handle pdr,
	24	+ const char *service_name,
	25	+ const char *service_path);
	26	+int pdr_restart_pd(struct pdr_handle pdr, struct pdr_service pds);
	27	+void pdr_handle_release(struct pdr_handle *pdr);
	28	+
	29	+#endif

include/linux/soc/qcom/qmi.h+1−0

@@ -88,6 +88,7 @@ struct qmi_elem_info { · 87 unmodified lines
88	88	#define QMI_ERR_CLIENT_IDS_EXHAUSTED_V01 5
89	89	#define QMI_ERR_INVALID_ID_V01 41
90	90	#define QMI_ERR_ENCODING_V01 58
	91	+#define QMI_ERR_DISABLED_V01 69
91	92	#define QMI_ERR_INCOMPATIBLE_STATE_V01 90
92	93	#define QMI_ERR_NOT_SUPPORTED_V01 94
93	94

include/linux/tee_drv.h+1−18

@@ -49,7 +49,6 @@ struct tee_shm_pool; · 48 unmodified lines
49	49	*/
50	50	struct tee_context {
51	51	struct tee_device *teedev;
52		− struct list_head list_shm;
53	52	void *data;
54	53	struct kref refcount;
55	54	bool releasing;
@@ -168,9 +167,7 @@ void tee_device_unregister(struct tee_device *teedev); · 112 unmodified lines
168	167
169	168	/**
170	169	* struct tee_shm - shared memory object
171		− * @teedev: device used to allocate the object
172		− * @ctx: context using the object, if NULL the context is gone
173		− * @link link element
	170	+ * @ctx: context using the object
174	171	* @paddr: physical address of the shared memory
175	172	* @kaddr: virtual address of the shared memory
176	173	* @size: size of shared memory
@@ -185,9 +182,7 @@ void tee_device_unregister(struct tee_device *teedev); · 8 unmodified lines
185	182	* subsystem and from drivers that implements their own shm pool manager.
186	183	*/
187	184	struct tee_shm {
188		− struct tee_device *teedev;
189	185	struct tee_context *ctx;
190		− struct list_head link;
191	186	phys_addr_t paddr;
192	187	void *kaddr;
193	188	size_t size;
@@ -318,18 +313,6 @@ void tee_get_drvdata(struct tee_device teedev); · 124 unmodified lines
318	313	*/
319	314	struct tee_shm tee_shm_alloc(struct tee_context ctx, size_t size, u32 flags);
320	315
321		−/**
322		− * tee_shm_priv_alloc() - Allocate shared memory privately
323		− * @dev: Device that allocates the shared memory
324		− * @size: Requested size of shared memory
325		− *
326		− * Allocates shared memory buffer that is not associated with any client
327		− * context. Such buffers are owned by TEE driver and used for internal calls.
328		− *
329		− * @returns a pointer to 'struct tee_shm'
330		− */
331		−struct tee_shm tee_shm_priv_alloc(struct tee_device teedev, size_t size);
332		−
333	316	/**
334	317	* tee_shm_register() - Register shared memory buffer
335	318	* @ctx: Context that registers the shared memory