The compute shader dispatch interface is pretty simple -- just pass in the regs that userspace has passed us, with no CLs to run. However, with no CL to run it means that we need to do manual cache flushing of the L2 after the HW execution completes (for SSBO, atomic, and image_load_store writes that are the output of compute shaders). This doesn't yet expose the L2 cache's ability to have a region of the address space not write back to memory (which could be used for shared_var storage). So far, the Mesa side has been tested on V3D v4.2 simpenrose (passing the ES31 tests), and on the kernel side on 7278 (failing atomic compswap tests in a way that doesn't reproduce on simpenrose). v2: Fix excessive allocation for the clean_job (reported by Dan Carpenter). Keep refs on jobs until clean_job is finished, to avoid spurious MMU errors if the output BOs are freed by userspace before L2 cleaning is finished.
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| @@ -37,6 +37,7 @@ extern "C" { · 36 unmodified lines | |||
| 37 | #define DRM_V3D_GET_PARAM 0x04 | 37 | #define DRM_V3D_GET_PARAM 0x04 |
| 38 | #define DRM_V3D_GET_BO_OFFSET 0x05 | 38 | #define DRM_V3D_GET_BO_OFFSET 0x05 |
| 39 | #define DRM_V3D_SUBMIT_TFU 0x06 | 39 | #define DRM_V3D_SUBMIT_TFU 0x06 |
| 40 | #define DRM_V3D_SUBMIT_CSD 0x07 | ||
| 40 | 41 | ||
| 41 | #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl) | 42 | #define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl) |
| 42 | #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo) | 43 | #define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo) |
| @@ -45,6 +46,7 @@ extern "C" { · 2 unmodified lines | |||
| 45 | #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param) | 46 | #define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param) |
| 46 | #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset) | 47 | #define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset) |
| 47 | #define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu) | 48 | #define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu) |
| 49 | #define DRM_IOCTL_V3D_SUBMIT_CSD DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd) | ||
| 48 | 50 | ||
| 49 | /** | 51 | /** |
| 50 | * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D | 52 | * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D |
| @@ -190,6 +192,7 @@ enum drm_v3d_param { · 139 unmodified lines | |||
| 190 | DRM_V3D_PARAM_V3D_CORE0_IDENT1, | 192 | DRM_V3D_PARAM_V3D_CORE0_IDENT1, |
| 191 | DRM_V3D_PARAM_V3D_CORE0_IDENT2, | 193 | DRM_V3D_PARAM_V3D_CORE0_IDENT2, |
| 192 | DRM_V3D_PARAM_SUPPORTS_TFU, | 194 | DRM_V3D_PARAM_SUPPORTS_TFU, |
| 195 | DRM_V3D_PARAM_SUPPORTS_CSD, | ||
| 193 | }; | 196 | }; |
| 194 | 197 | ||
| 195 | struct drm_v3d_get_param { | 198 | struct drm_v3d_get_param { |
| @@ -230,6 +233,31 @@ struct drm_v3d_submit_tfu { · 34 unmodified lines | |||
| 230 | __u32 out_sync; | 233 | __u32 out_sync; |
| 231 | }; | 234 | }; |
| 232 | 235 | ||
| 236 | /* Submits a compute shader for dispatch. This job will block on any | ||
| 237 | * previous compute shaders submitted on this fd, and any other | ||
| 238 | * synchronization must be performed with in_sync/out_sync. | ||
| 239 | */ | ||
| 240 | struct drm_v3d_submit_csd { | ||
| 241 | __u32 cfg[7]; | ||
| 242 | __u32 coef[4]; | ||
| 243 | |||
| 244 | /* Pointer to a u32 array of the BOs that are referenced by the job. | ||
| 245 | */ | ||
| 246 | __u64 bo_handles; | ||
| 247 | |||
| 248 | /* Number of BO handles passed in (size is that times 4). */ | ||
| 249 | __u32 bo_handle_count; | ||
| 250 | |||
| 251 | /* sync object to block on before running the CSD job. Each | ||
| 252 | * CSD job will execute in the order submitted to its FD. | ||
| 253 | * Synchronization against rendering/TFU jobs or CSD from | ||
| 254 | * other fds requires using sync objects. | ||
| 255 | */ | ||
| 256 | __u32 in_sync; | ||
| 257 | /* Sync object to signal when the CSD job is done. */ | ||
| 258 | __u32 out_sync; | ||
| 259 | }; | ||
| 260 | |||
| 233 | #if defined(__cplusplus) | 261 | #if defined(__cplusplus) |
| 234 | } | 262 | } |
| 235 | #endif | 263 | #endif |