History

Merge tag 'v6.11-rc6' into docs-mw

This is done primarily to get a docs build fix merged via another tree so that "make htmldocs" stops failing.

Jonathan Corbet committed 2 years ago

Commit d2243382 parents eb5ed2f 431c1641361 files · +16839 −8618Browse files

Unified · Split

1361 files
  1. .mailmap +4 −0
  2. Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu +3 −3
  3. Documentation/ABI/testing/sysfs-devices-system-cpu +2 −1
  4. Documentation/admin-guide/cifs/usage.rst +1 −1
  5. Documentation/admin-guide/kernel-parameters.txt +1 −3
  6. Documentation/arch/arm64/silicon-errata.rst +18 −0
  7. Documentation/arch/riscv/hwprobe.rst +22 −14
  8. Documentation/core-api/workqueue.rst +1 −1
  9. Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml +3 −0
  10. Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml +1 −1
  11. Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml +1 −1
  12. Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml +1 −1
  13. Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml +1 −1
  14. Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml +1 −1
  15. Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml +1 −1
  16. Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml +1 −1
  17. Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml +1 −1
  18. Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml +1 −1
  19. Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml +1 −1
  20. Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml +1 −1
  21. Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml +1 −1
  22. Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml +1 −1
  23. Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml +1 −1
  24. Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml +5 −2
  25. Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml +1 −1
  26. Documentation/devicetree/bindings/eeprom/at25.yaml +1 −0
  27. Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml +1 −0
  28. Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml +1 −1
  29. Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml +1 −1
  30. Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml +1 −1
  31. Documentation/devicetree/bindings/iommu/qcom,iommu.yaml +1 −1
  32. Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml +4 −0
  33. Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml +1 −1
  34. Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml +1 −1
  35. Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml +1 −1
  36. Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml +1 −1
  37. Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml +1 −1
  38. Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml +2 −1
  39. Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml +1 −1
  40. Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml +2 −1
  41. Documentation/devicetree/bindings/sound/qcom,wcd939x.yaml +2 −2
  42. Documentation/devicetree/bindings/usb/microchip,usb2514.yaml +9 −1
  43. Documentation/driver-api/thermal/sysfs-api.rst +30 −35
  44. Documentation/filesystems/caching/fscache.rst +4 −4
  45. Documentation/filesystems/erofs.rst +1 −1
  46. Documentation/filesystems/smb/ksmbd.rst +13 −13
  47. Documentation/kbuild/llvm.rst +1 −1
  48. Documentation/netlink/specs/ethtool.yaml +1 −1
  49. Documentation/networking/ethtool-netlink.rst +1 −0
  50. Documentation/process/coding-style.rst +0 −12
  51. Documentation/process/embargoed-hardware-issues.rst +96 −57
  52. Documentation/process/maintainer-netdev.rst +0 −17
  53. Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst +2 −2
  54. Documentation/virt/kvm/api.rst +8 −2
  55. Documentation/wmi/devices/msi-wmi-platform.rst +3 −3
  56. MAINTAINERS +49 −21
  57. Makefile +3 −3
  58. arch/alpha/include/asm/io.h +2 −2
  59. arch/arm/Kconfig +3 −1
  60. arch/arm/boot/compressed/Makefile +1 −0
  61. arch/arm/boot/compressed/vmlinux.lds.S +1 −1
  62. arch/arm/boot/dts/arm/versatile-ab.dts +1 −1
  63. arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi +6 −6
  64. arch/arm/boot/dts/ti/omap/omap3-n900.dts +1 −1
  65. arch/arm/include/asm/stacktrace.h +7 −0
  66. arch/arm/include/asm/vmlinux.lds.h +1 −1
  67. arch/arm/kernel/entry-armv.S +3 −0
  68. arch/arm/kernel/entry-common.S +3 −0
  69. arch/arm/kernel/module.c +0 −5
  70. arch/arm/kernel/perf_callchain.c +1 −2
  71. arch/arm/kernel/vmlinux-xip.lds.S +2 −2
  72. arch/arm/kernel/vmlinux.lds.S +3 −3
  73. arch/arm/mach-alpine/alpine_cpu_pm.c +1 −1
  74. arch/arm/mach-pxa/gumstix.c +7 −4
  75. arch/arm/mach-rpc/ecard.c +1 −1
  76. arch/arm/mm/proc.c +10 −10
  77. arch/arm64/Kconfig +16 −6
  78. arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +1 −1
  79. arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +1 −1
  80. arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +1 −1
  81. arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +1 −1
  82. arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +4 −4
  83. arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +1 −1
  84. arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rs232.dtso +1 −1
  85. arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rs485.dtso +1 −1
  86. arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts +5 −7
  87. arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts +1 −1
  88. arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi +2 −1
  89. arch/arm64/boot/dts/freescale/imx93.dtsi +1 −1
  90. arch/arm64/boot/dts/freescale/imx95.dtsi +7 −7
  91. arch/arm64/boot/dts/qcom/ipq5332.dtsi +2 −2
  92. arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +39 −3
  93. arch/arm64/boot/dts/qcom/x1e80100-crd.dts +60 −10
  94. arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +46 −8
  95. arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +45 −8
  96. arch/arm64/boot/dts/qcom/x1e80100.dtsi +17 −4
  97. arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi +0 −22
  98. arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi +0 −6
  99. arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi +2 −0
  100. arch/arm64/boot/dts/ti/k3-am62p-main.dtsi +2 −1
  101. arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +2 −1
  102. arch/arm64/boot/dts/ti/k3-j784s4-evm.dts +8 −17
  103. arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +2 −2
  104. arch/arm64/configs/defconfig +1 −0
  105. arch/arm64/include/asm/cputype.h +4 −0
  106. arch/arm64/include/asm/jump_label.h +1 −0
  107. arch/arm64/include/asm/kvm_ptrauth.h +1 −1
  108. arch/arm64/include/asm/uaccess.h +1 −1
  109. arch/arm64/kernel/Makefile.syscalls +1 −1
  110. arch/arm64/kernel/acpi_numa.c +1 −1
  111. arch/arm64/kernel/cpu_errata.c +10 −1
  112. arch/arm64/kernel/jump_label.c +9 −2
  113. arch/arm64/kernel/setup.c +0 −3
  114. arch/arm64/kernel/smp.c +2 −0
  115. arch/arm64/kvm/Kconfig +1 −0
  116. arch/arm64/kvm/Makefile +3 −0
  117. arch/arm64/kvm/arm.c +5 −10
  118. arch/arm64/kvm/hyp/include/hyp/switch.h +0 −1
  119. arch/arm64/kvm/hyp/nvhe/Makefile +2 −0
  120. arch/arm64/kvm/hyp/nvhe/switch.c +2 −3
  121. arch/arm64/kvm/hyp/vhe/Makefile +2 −0
  122. arch/arm64/kvm/mmu.c +8 −1
  123. arch/arm64/kvm/nested.c +1 −1
  124. arch/arm64/kvm/sys_regs.c +6 −0
  125. arch/arm64/kvm/vgic/vgic-debug.c +4 −3
  126. arch/arm64/kvm/vgic/vgic-init.c +7 −5
  127. arch/arm64/kvm/vgic/vgic-irqfd.c +4 −3
  128. arch/arm64/kvm/vgic/vgic-its.c +11 −7
  129. arch/arm64/kvm/vgic/vgic-v3.c +1 −1
  130. arch/arm64/kvm/vgic/vgic.c +6 −1
  131. arch/arm64/kvm/vgic/vgic.h +8 −1
  132. arch/loongarch/include/asm/dma-direct.h +0 −11
  133. arch/loongarch/include/asm/hugetlb.h +2 −2
  134. arch/loongarch/include/asm/hw_irq.h +2 −0
  135. arch/loongarch/include/asm/kfence.h +3 −3
  136. arch/loongarch/include/asm/kvm_host.h +0 −2
  137. arch/loongarch/include/asm/kvm_para.h +2 −2
  138. arch/loongarch/include/asm/kvm_vcpu.h +0 −1
  139. arch/loongarch/include/asm/pgtable.h +29 −19
  140. arch/loongarch/kernel/Makefile.syscalls +2 −1
  141. arch/loongarch/kernel/efi.c +6 −0
  142. arch/loongarch/kernel/fpu.S +4 −0
  143. arch/loongarch/kernel/irq.c +0 −3
  144. arch/loongarch/kvm/mmu.c +4 −4
  145. arch/loongarch/kvm/switch.S +4 −0
  146. arch/loongarch/kvm/timer.c +0 −7
  147. arch/loongarch/kvm/vcpu.c +1 −1
  148. arch/loongarch/mm/hugetlbpage.c +3 −3
  149. arch/loongarch/mm/init.c +5 −5
  150. arch/loongarch/mm/kasan_init.c +5 −5
  151. arch/loongarch/mm/pgtable.c +1 −1
  152. arch/microblaze/mm/init.c +0 −5
  153. arch/mips/kernel/cevt-r4k.c +7 −8
  154. arch/mips/kernel/cpu-probe.c +4 −0
  155. arch/mips/kernel/csrc-r4k.c +1 −3
  156. arch/mips/sgi-ip22/ip22-gio.c +1 −1
  157. arch/parisc/Kconfig +1 −0
  158. arch/parisc/include/asm/cache.h +10 −1
  159. arch/parisc/net/bpf_jit_core.c +1 −1
  160. arch/powerpc/include/asm/topology.h +13 −0
  161. arch/powerpc/kernel/setup-common.c +1 −0
  162. arch/powerpc/mm/init-common.c +2 −2
  163. arch/powerpc/mm/mem.c +0 −2
  164. arch/riscv/include/asm/hwprobe.h +1 −1
  165. arch/riscv/include/uapi/asm/hwprobe.h +6 −0
  166. arch/riscv/kernel/Makefile.syscalls +1 −1
  167. arch/riscv/kernel/acpi_numa.c +1 −1
  168. arch/riscv/kernel/cpufeature.c +6 −8
  169. arch/riscv/kernel/patch.c +4 −0
  170. arch/riscv/kernel/sbi-ipi.c +1 −1
  171. arch/riscv/kernel/sys_hwprobe.c +6 −5
  172. arch/riscv/kernel/traps.c +2 −2
  173. arch/riscv/kernel/traps_misaligned.c +3 −3
  174. arch/riscv/kernel/unaligned_access_speed.c +6 −6
  175. arch/riscv/kernel/vendor_extensions.c +1 −1
  176. arch/riscv/mm/fault.c +9 −8
  177. arch/riscv/mm/init.c +13 −6
  178. arch/riscv/purgatory/entry.S +2 −0
  179. arch/s390/Kconfig +13 −0
  180. arch/s390/boot/startup.c +32 −26
  181. arch/s390/boot/vmem.c +12 −2
  182. arch/s390/boot/vmlinux.lds.S +6 −1
  183. arch/s390/include/asm/page.h +2 −1
  184. arch/s390/include/asm/uv.h +4 −1
  185. arch/s390/kernel/alternative.h +0 −0
  186. arch/s390/kernel/fpu.c +1 −1
  187. arch/s390/kernel/setup.c +18 −1
  188. arch/s390/kernel/vmlinux.lds.S +10 −9
  189. arch/s390/kvm/kvm-s390.h +6 −1
  190. arch/s390/mm/dump_pagetables.c +79 −61
  191. arch/s390/mm/init.c +2 −7
  192. arch/s390/mm/vmem.c +2 −11
  193. arch/s390/tools/relocs.c +1 −1
  194. arch/um/drivers/mconsole_user.c +2 −0
  195. arch/x86/coco/sev/core.c +1 −1
  196. arch/x86/entry/syscalls/syscall_64.tbl +1 −1
  197. arch/x86/events/core.c +12 −10
  198. arch/x86/events/intel/cstate.c +3 −2
  199. arch/x86/include/asm/cmdline.h +4 −0
  200. arch/x86/include/asm/kvm_host.h +3 −0
  201. arch/x86/include/asm/qspinlock.h +7 −5
  202. arch/x86/kernel/acpi/madt_wakeup.c +1 −1
  203. arch/x86/kernel/cpu/amd.c +1 −1
  204. arch/x86/kernel/cpu/aperfmperf.c +4 −2
  205. arch/x86/kernel/cpu/mtrr/mtrr.c +1 −1
  206. arch/x86/kernel/paravirt.c +3 −4
  207. arch/x86/kernel/setup.c +1 −1
  208. arch/x86/kvm/Kconfig +2 −2
  209. arch/x86/kvm/hyperv.h +0 −1
  210. arch/x86/kvm/lapic.c +16 −8
  211. arch/x86/kvm/mmu/mmu.c +5 −2
  212. arch/x86/kvm/svm/sev.c +13 −11
  213. arch/x86/kvm/svm/svm.c +1 −0
  214. arch/x86/kvm/x86.c +7 −11
  215. arch/x86/lib/cmdline.c +18 −7
  216. arch/x86/lib/getuser.S +3 −1
  217. arch/x86/mm/pti.c +32 −19
  218. block/blk-lib.c +17 −6
  219. block/blk-mq-tag.c +3 −2
  220. block/blk-throttle.c +0 −11
  221. drivers/accessibility/speakup/genmap.c +0 −1
  222. drivers/accessibility/speakup/makemapdata.c +0 −1
  223. drivers/acpi/acpica/acevents.h +1 −5
  224. drivers/acpi/acpica/evregion.c +9 −3
  225. drivers/acpi/acpica/evxfregn.c +7 −57
  226. drivers/acpi/ec.c +9 −5
  227. drivers/acpi/internal.h +1 −0
  228. drivers/acpi/scan.c +2 −0
  229. drivers/acpi/video_detect.c +22 −0
  230. drivers/android/binder.c +6 −9
  231. drivers/android/binder_alloc.c +1 −1
  232. drivers/android/dbitmap.h +7 −15
  233. drivers/ata/libata-scsi.c +13 −2
  234. drivers/ata/pata_macio.c +20 −10
  235. drivers/atm/idt77252.c +5 −4
  236. drivers/base/core.c +8 −5
  237. drivers/base/module.c +4 −0
  238. drivers/bluetooth/Kconfig +2 −0
  239. drivers/bluetooth/btintel.c +127 −10
  240. drivers/bluetooth/btintel_pcie.c +0 −3
  241. drivers/bluetooth/btmtk.c +4 −1
  242. drivers/bluetooth/btmtksdio.c +0 −3
  243. drivers/bluetooth/btnxpuart.c +18 −2
  244. drivers/bluetooth/btrtl.c +0 −1
  245. drivers/bluetooth/btusb.c +2 −2
  246. drivers/bluetooth/hci_qca.c +11 −12
  247. drivers/bluetooth/hci_vhci.c +0 −2
  248. drivers/cache/Kconfig +1 −0
  249. drivers/char/ds1620.c +1 −0
  250. drivers/char/nwbutton.c +1 −0
  251. drivers/char/nwflash.c +1 −0
  252. drivers/char/tpm/tpm_ibmvtpm.c +4 −0
  253. drivers/char/xillybus/xillyusb.c +34 −8
  254. drivers/clk/thead/clk-th1520-ap.c +1 −1
  255. drivers/cpufreq/amd-pstate-ut.c +8 −5
  256. drivers/cpufreq/amd-pstate.c +2 −2
  257. drivers/cpufreq/intel_pstate.c +1 −0
  258. drivers/cxl/core/pci.c +6 −4
  259. drivers/dma/dw-edma/dw-hdma-v0-core.c +8 −18
  260. drivers/dma/dw/core.c +109 −22
  261. drivers/dma/dw/dw.c +24 −16
  262. drivers/dma/dw/idma32.c +11 −8
  263. drivers/dma/dw/platform.c +10 −10
  264. drivers/dma/dw/regs.h +0 −1
  265. drivers/dma/stm32/stm32-dma3.c +1 −1
  266. drivers/dma/ti/omap-dma.c +3 −3
  267. drivers/edac/skx_common.h +0 −1
  268. drivers/firmware/efi/libstub/Makefile +6 −1
  269. drivers/firmware/microchip/mpfs-auto-update.c +1 −1
  270. drivers/firmware/qcom/qcom_scm-smc.c +1 −1
  271. drivers/firmware/qcom/qcom_tzmem.c +22 −11
  272. drivers/firmware/sysfb.c +13 −6
  273. drivers/fsi/fsi-core.c +1 −0
  274. drivers/fsi/fsi-master-aspeed.c +1 −0
  275. drivers/fsi/fsi-master-ast-cf.c +2 −1
  276. drivers/fsi/fsi-master-gpio.c +1 −0
  277. drivers/fsi/fsi-master-hub.c +1 −0
  278. drivers/fsi/fsi-scom.c +1 −0
  279. drivers/gpio/gpio-mlxbf3.c +14 −0
  280. drivers/gpu/drm/Kconfig +1 −0
  281. drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c +11 −8
  282. drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c +8 −0
  283. drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c +12 −1
  284. drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c +24 −2
  285. drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h +6 −0
  286. drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c +3 −2
  287. drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h +6 −0
  288. drivers/gpu/drm/amd/amdgpu/amdgpu_job.c +1 −2
  289. drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c +54 −35
  290. drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h +11 −11
  291. drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c +3 −0
  292. drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c +2 −0
  293. drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h +4 −1
  294. drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c +1 −1
  295. drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c +34 −2
  296. drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c +3 −2
  297. drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c +29 −27
  298. drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c +1 −1
  299. drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c +19 −1
  300. drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c +2 −2
  301. drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c +61 −2
  302. drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.h +6 −1
  303. drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c +1 −0
  304. drivers/gpu/drm/amd/amdgpu/mes_v11_0.c +35 −26
  305. drivers/gpu/drm/amd/amdgpu/mes_v12_0.c +167 −137
  306. drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c +2 −1
  307. drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c +10 −8
  308. drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c +4 −3
  309. drivers/gpu/drm/amd/amdgpu/soc15d.h +6 −0
  310. drivers/gpu/drm/amd/amdgpu/soc24.c +2 −0
  311. drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c +1 −0
  312. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +3 −0
  313. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +27 −9
  314. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h +3 −0
  315. drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c +7 −2
  316. drivers/gpu/drm/amd/display/dc/core/dc_stream.c +2 −0
  317. drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c +1 −2
  318. drivers/gpu/drm/amd/display/dc/dml/Makefile +2 −0
  319. drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c +4 −2
  320. drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c +2 −0
  321. drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c +3 −0
  322. drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c +1 −0
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  1128. net/bluetooth/mgmt.c +4 −0
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  1148. net/ipv4/tcp_ipv4.c +14 −0
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  1176. net/mptcp/sockopt.c +2 −2
  1177. net/mptcp/subflow.c +51 −29
  1178. net/netfilter/nf_flow_table_inet.c +3 −0
  1179. net/netfilter/nf_flow_table_ip.c +3 −0
  1180. net/netfilter/nf_flow_table_offload.c +1 −1
  1181. net/netfilter/nf_tables_api.c +102 −45
  1182. net/netfilter/nfnetlink.c +4 −1
  1183. net/netfilter/nfnetlink_queue.c +33 −2
  1184. net/netfilter/nft_counter.c +7 −2
  1185. net/openvswitch/datapath.c +1 −1
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  1187. net/sched/sch_fq.c +3 −1
  1188. net/sched/sch_netem.c +29 −18
  1189. net/sctp/input.c +11 −8
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  1193. net/sunrpc/svc.c +1 −1
  1194. net/sunrpc/xprtrdma/ib_client.c +4 −2
  1195. net/vmw_vsock/af_vsock.c +29 −21
  1196. net/vmw_vsock/vsock_bpf.c +2 −2
  1197. net/wireless/scan.c +8 −3
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  1202. rust/macros/lib.rs +1 −1
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  1208. scripts/Makefile.vmlinux_o +1 −1
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  1210. scripts/gcc-plugins/randomize_layout_plugin.c +0 −4
  1211. scripts/generate_rust_analyzer.py +5 −1
  1212. scripts/generate_rust_target.rs +2 −2
  1213. scripts/kallsyms.c +2 −29
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  1215. scripts/link-vmlinux.sh +2 −5
  1216. scripts/syscall.tbl +3 −3
  1217. security/apparmor/policy_unpack_test.c +3 −3
  1218. security/keys/trusted-keys/trusted_dcp.c +22 −13
  1219. security/selinux/avc.c +6 −2
  1220. security/selinux/hooks.c +13 −3
  1221. security/smack/smack_lsm.c +2 −2
  1222. sound/core/seq/seq_clientmgr.c +3 −0
  1223. sound/core/seq/seq_ports.h +2 −12
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  1227. sound/firewire/amdtp-stream.c +24 −14
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  1243. sound/soc/amd/yc/acp6x-mach.c +21 −0
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  1247. sound/soc/codecs/cs35l45.c +2 −9
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  1254. sound/soc/codecs/cs530x.c +4 −4
  1255. sound/soc/codecs/es8326.c +2 −0
  1256. sound/soc/codecs/lpass-macro-common.h +6 −0
  1257. sound/soc/codecs/lpass-va-macro.c +6 −0
  1258. sound/soc/codecs/nau8822.c +1 −1
  1259. sound/soc/codecs/wcd937x-sdw.c +2 −2
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  1262. sound/soc/codecs/wcd939x-sdw.c +2 −2
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  1264. sound/soc/codecs/wm_adsp.h +3 −0
  1265. sound/soc/codecs/wsa881x.c +1 −1
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  1267. sound/soc/codecs/wsa884x.c +1 −1
  1268. sound/soc/fsl/fsl_micfil.c +15 −5
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  1271. sound/soc/meson/axg-fifo.c +10 −16
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  1273. sound/soc/sof/amd/acp-dsp-offset.h +4 −2
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  1281. sound/soc/sti/uniperif.h +1 −0
  1282. sound/soc/sti/uniperif_player.c +1 −0
  1283. sound/soc/sti/uniperif_reader.c +1 −0
  1284. sound/usb/line6/driver.c +5 −0
  1285. sound/usb/quirks-table.h +5 −0
  1286. sound/usb/quirks.c +2 −0
  1287. sound/usb/stream.c +2 −2
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  1289. tools/arch/powerpc/include/uapi/asm/kvm.h +3 −0
  1290. tools/arch/x86/include/asm/cpufeatures.h +403 −400
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  1292. tools/arch/x86/include/uapi/asm/kvm.h +49 −0
  1293. tools/arch/x86/include/uapi/asm/svm.h +1 −0
  1294. tools/build/feature/Makefile +43 −10
  1295. tools/include/uapi/README +73 −0
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  1297. tools/include/uapi/drm/i915_drm.h +27 −0
  1298. tools/include/uapi/linux/in.h +2 −0
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  1328. tools/testing/selftests/drivers/net/mlxsw/ethtool_lanes.sh +2 −1
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  1358. virt/kvm/Kconfig +2 −2
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  1360. virt/kvm/guest_memfd.c +136 −91
  1361. virt/kvm/kvm_main.c +26 −28
.mailmap+4−0
@@ -166,6 +166,7 @@ Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com> · 165 unmodified lines
166166 Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
167167 David Brownell <david-b@pacbell.net>
168168 David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
169+David Heidelberg <david@ixit.cz> <d.okias@gmail.com>
169170 David Rheinsberg <david@readahead.eu> <dh.herrmann@gmail.com>
170171 David Rheinsberg <david@readahead.eu> <dh.herrmann@googlemail.com>
171172 David Rheinsberg <david@readahead.eu> <david.rheinsberg@gmail.com>
@@ -353,6 +354,8 @@ Kenneth Westfield <quic_kwestfie@quicinc.com> <kwestfie@codeaurora.org> · 181 unmodified lines
353354 Kiran Gunda <quic_kgunda@quicinc.com> <kgunda@codeaurora.org>
354355 Kirill Tkhai <tkhai@ya.ru> <ktkhai@virtuozzo.com>
355356 Kishon Vijay Abraham I <kishon@kernel.org> <kishon@ti.com>
357+Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@linaro.org>
358+Konrad Dybcio <konradybcio@kernel.org> <konrad.dybcio@somainline.org>
356359 Konstantin Khlebnikov <koct9i@gmail.com> <khlebnikov@yandex-team.ru>
357360 Konstantin Khlebnikov <koct9i@gmail.com> <k.khlebnikov@samsung.com>
358361 Koushik <raghavendra.koushik@neterion.com>
@@ -613,6 +616,7 @@ Simon Kelley <simon@thekelleys.org.uk> · 254 unmodified lines
613616 Sricharan Ramabadhran <quic_srichara@quicinc.com> <sricharan@codeaurora.org>
614617 Srinivas Ramana <quic_sramana@quicinc.com> <sramana@codeaurora.org>
615618 Sriram R <quic_srirrama@quicinc.com> <srirrama@codeaurora.org>
619+Sriram Yagnaraman <sriram.yagnaraman@ericsson.com> <sriram.yagnaraman@est.tech>
616620 Stanislav Fomichev <sdf@fomichev.me> <sdf@google.com>
617621 Stefan Wahren <wahrenst@gmx.net> <stefan.wahren@i2se.com>
618622 Stéphane Witzmann <stephane.witzmann@ubpmes.univ-bpclermont.fr>
Documentation/ABI/testing/sysfs-bus-i2c-devices-turris-omnia-mcu+3−3
@@ -32,9 +32,9 @@ Description: (RW) The front button on the Turris Omnia router can be · 31 unmodified lines
3232 interrupt.
3333
3434 This file switches between these two modes:
35− - "mcu" makes the button press event be handled by the MCU to
36− change the LEDs panel intensity.
37− - "cpu" makes the button press event be handled by the CPU.
35+ - ``mcu`` makes the button press event be handled by the MCU to
36+ change the LEDs panel intensity.
37+ - ``cpu`` makes the button press event be handled by the CPU.
3838
3939 Format: %s.
4040
Documentation/ABI/testing/sysfs-devices-system-cpu+2−1
@@ -562,7 +562,8 @@ Description: Control Symmetric Multi Threading (SMT) · 561 unmodified lines
562562 ================ =========================================
563563
564564 If control status is "forceoff" or "notsupported" writes
565− are rejected.
565+ are rejected. Note that enabling SMT on PowerPC skips
566+ offline cores.
566567
567568 What: /sys/devices/system/cpu/cpuX/power/energy_perf_bias
568569 Date: March 2019
Documentation/admin-guide/cifs/usage.rst+1−1
@@ -742,7 +742,7 @@ SecurityFlags Flags which control security negotiation and · 741 unmodified lines
742742 may use NTLMSSP 0x00080
743743 must use NTLMSSP 0x80080
744744 seal (packet encryption) 0x00040
745− must seal (not implemented yet) 0x40040
745+ must seal 0x40040
746746
747747 cifsFYI If set to non-zero value, additional debug information
748748 will be logged to the system error log. This field
Documentation/admin-guide/kernel-parameters.txt+1−3
@@ -4798,11 +4798,9 @@ · 4797 unmodified lines
47984798
47994799 profile= [KNL] Enable kernel profiling via /proc/profile
48004800 Format: [<profiletype>,]<number>
4801− Param: <profiletype>: "schedule", "sleep", or "kvm"
4801+ Param: <profiletype>: "schedule" or "kvm"
48024802 [defaults to kernel profiling]
48034803 Param: "schedule" - profile schedule points.
4804− Param: "sleep" - profile D-state sleeping (millisecs).
4805− Requires CONFIG_SCHEDSTATS
48064804 Param: "kvm" - profile VM exits.
48074805 Param: <number> - step/bucket size as a power of 2 for
48084806 statistical time based profiling.
Documentation/arch/arm64/silicon-errata.rst+18−0
@@ -122,10 +122,18 @@ stable kernels. · 121 unmodified lines
122122 +----------------+-----------------+-----------------+-----------------------------+
123123 | ARM | Cortex-A76 | #1490853 | N/A |
124124 +----------------+-----------------+-----------------+-----------------------------+
125+| ARM | Cortex-A76 | #3324349 | ARM64_ERRATUM_3194386 |
126++----------------+-----------------+-----------------+-----------------------------+
125127 | ARM | Cortex-A77 | #1491015 | N/A |
126128 +----------------+-----------------+-----------------+-----------------------------+
127129 | ARM | Cortex-A77 | #1508412 | ARM64_ERRATUM_1508412 |
128130 +----------------+-----------------+-----------------+-----------------------------+
131+| ARM | Cortex-A77 | #3324348 | ARM64_ERRATUM_3194386 |
132++----------------+-----------------+-----------------+-----------------------------+
133+| ARM | Cortex-A78 | #3324344 | ARM64_ERRATUM_3194386 |
134++----------------+-----------------+-----------------+-----------------------------+
135+| ARM | Cortex-A78C | #3324346,3324347| ARM64_ERRATUM_3194386 |
136++----------------+-----------------+-----------------+-----------------------------+
129137 | ARM | Cortex-A710 | #2119858 | ARM64_ERRATUM_2119858 |
130138 +----------------+-----------------+-----------------+-----------------------------+
131139 | ARM | Cortex-A710 | #2054223 | ARM64_ERRATUM_2054223 |
@@ -138,8 +146,14 @@ stable kernels. · 6 unmodified lines
138146 +----------------+-----------------+-----------------+-----------------------------+
139147 | ARM | Cortex-A720 | #3456091 | ARM64_ERRATUM_3194386 |
140148 +----------------+-----------------+-----------------+-----------------------------+
149+| ARM | Cortex-A725 | #3456106 | ARM64_ERRATUM_3194386 |
150++----------------+-----------------+-----------------+-----------------------------+
141151 | ARM | Cortex-X1 | #1502854 | N/A |
142152 +----------------+-----------------+-----------------+-----------------------------+
153+| ARM | Cortex-X1 | #3324344 | ARM64_ERRATUM_3194386 |
154++----------------+-----------------+-----------------+-----------------------------+
155+| ARM | Cortex-X1C | #3324346 | ARM64_ERRATUM_3194386 |
156++----------------+-----------------+-----------------+-----------------------------+
143157 | ARM | Cortex-X2 | #2119858 | ARM64_ERRATUM_2119858 |
144158 +----------------+-----------------+-----------------+-----------------------------+
145159 | ARM | Cortex-X2 | #2224489 | ARM64_ERRATUM_2224489 |
@@ -160,6 +174,8 @@ stable kernels. · 14 unmodified lines
160174 +----------------+-----------------+-----------------+-----------------------------+
161175 | ARM | Neoverse-N1 | #1542419 | ARM64_ERRATUM_1542419 |
162176 +----------------+-----------------+-----------------+-----------------------------+
177+| ARM | Neoverse-N1 | #3324349 | ARM64_ERRATUM_3194386 |
178++----------------+-----------------+-----------------+-----------------------------+
163179 | ARM | Neoverse-N2 | #2139208 | ARM64_ERRATUM_2139208 |
164180 +----------------+-----------------+-----------------+-----------------------------+
165181 | ARM | Neoverse-N2 | #2067961 | ARM64_ERRATUM_2067961 |
@@ -170,6 +186,8 @@ stable kernels. · 4 unmodified lines
170186 +----------------+-----------------+-----------------+-----------------------------+
171187 | ARM | Neoverse-V1 | #1619801 | N/A |
172188 +----------------+-----------------+-----------------+-----------------------------+
189+| ARM | Neoverse-V1 | #3324341 | ARM64_ERRATUM_3194386 |
190++----------------+-----------------+-----------------+-----------------------------+
173191 | ARM | Neoverse-V2 | #3324336 | ARM64_ERRATUM_3194386 |
174192 +----------------+-----------------+-----------------+-----------------------------+
175193 | ARM | Neoverse-V3 | #3312417 | ARM64_ERRATUM_3194386 |
Documentation/arch/riscv/hwprobe.rst+22−14
@@ -239,25 +239,33 @@ The following keys are defined: · 238 unmodified lines
239239 ratified in commit 98918c844281 ("Merge pull request #1217 from
240240 riscv/zawrs") of riscv-isa-manual.
241241
242−* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: A bitmask that contains performance
243− information about the selected set of processors.
242+* :c:macro:`RISCV_HWPROBE_KEY_CPUPERF_0`: Deprecated. Returns similar values to
243+ :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`, but the key was
244+ mistakenly classified as a bitmask rather than a value.
244245
245− * :c:macro:`RISCV_HWPROBE_MISALIGNED_UNKNOWN`: The performance of misaligned
246− accesses is unknown.
246+* :c:macro:`RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF`: An enum value describing
247+ the performance of misaligned scalar native word accesses on the selected set
248+ of processors.
247249
248− * :c:macro:`RISCV_HWPROBE_MISALIGNED_EMULATED`: Misaligned accesses are
249− emulated via software, either in or below the kernel. These accesses are
250− always extremely slow.
250+ * :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN`: The performance of
251+ misaligned scalar accesses is unknown.
251252
252− * :c:macro:`RISCV_HWPROBE_MISALIGNED_SLOW`: Misaligned accesses are slower
253− than equivalent byte accesses. Misaligned accesses may be supported
254− directly in hardware, or trapped and emulated by software.
253+ * :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED`: Misaligned scalar
254+ accesses are emulated via software, either in or below the kernel. These
255+ accesses are always extremely slow.
255256
256− * :c:macro:`RISCV_HWPROBE_MISALIGNED_FAST`: Misaligned accesses are faster
257− than equivalent byte accesses.
257+ * :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW`: Misaligned scalar native
258+ word sized accesses are slower than the equivalent quantity of byte
259+ accesses. Misaligned accesses may be supported directly in hardware, or
260+ trapped and emulated by software.
258261
259− * :c:macro:`RISCV_HWPROBE_MISALIGNED_UNSUPPORTED`: Misaligned accesses are
260− not supported at all and will generate a misaligned address fault.
262+ * :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_FAST`: Misaligned scalar native
263+ word sized accesses are faster than the equivalent quantity of byte
264+ accesses.
265+
266+ * :c:macro:`RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED`: Misaligned scalar
267+ accesses are not supported at all and will generate a misaligned address
268+ fault.
261269
262270 * :c:macro:`RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE`: An unsigned int which
263271 represents the size of the Zicboz block in bytes.
Documentation/core-api/workqueue.rst+1−1
@@ -260,7 +260,7 @@ Some users depend on strict execution ordering where only one work item · 259 unmodified lines
260260 is in flight at any given time and the work items are processed in
261261 queueing order. While the combination of ``@max_active`` of 1 and
262262 ``WQ_UNBOUND`` used to achieve this behavior, this is no longer the
263−case. Use ``alloc_ordered_queue()`` instead.
263+case. Use alloc_ordered_workqueue() instead.
264264
265265
266266 Example Execution Scenarios
Documentation/devicetree/bindings/ata/rockchip,dwc-ahci.yaml+3−0
@@ -35,6 +35,9 @@ properties: · 34 unmodified lines
3535 ports-implemented:
3636 const: 1
3737
38+ power-domains:
39+ maxItems: 1
40+
3841 sata-port@0:
3942 $ref: /schemas/ata/snps,dwc-ahci-common.yaml#/$defs/dwc-ahci-port
4043
Documentation/devicetree/bindings/clock/qcom,dispcc-sm6350.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Display Clock & Reset Controller on SM6350
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm display clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,gcc-msm8994.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Global Clock & Reset Controller on MSM8994
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm global clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,gcc-sm6125.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Global Clock & Reset Controller on SM6125
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm global clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,gcc-sm6350.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Global Clock & Reset Controller on SM6350
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm global clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm6115-gpucc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Graphics Clock & Reset Controller on SM6115
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm graphics clock control module provides clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm6125-gpucc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Graphics Clock & Reset Controller on SM6125
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm graphics clock control module provides clocks and power domains on
Documentation/devicetree/bindings/clock/qcom,sm6350-camcc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Camera Clock & Reset Controller on SM6350
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm camera clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm6375-dispcc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Display Clock & Reset Controller on SM6375
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm display clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm6375-gcc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Global Clock & Reset Controller on SM6375
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm global clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm6375-gpucc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Graphics Clock & Reset Controller on SM6375
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm graphics clock control module provides clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm SM8350 Video Clock & Reset Controller
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm video clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Graphics Clock & Reset Controller on SM8450
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm graphics clock control module provides the clocks, resets and power
Documentation/devicetree/bindings/display/msm/qcom,sm6375-mdss.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm SM6375 Display MDSS
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description:
1313 SM6375 MSM Mobile Display Subsystem (MDSS), which encapsulates sub-blocks
Documentation/devicetree/bindings/display/panel/asus,z00t-tm5p5-nt35596.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: ASUS Z00T TM5P5 NT35596 5.5" 1080×1920 LCD Panel
88
99 maintainers:
10− - Konrad Dybcio <konradybcio@gmail.com>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |+
1313 This panel seems to only be found in the Asus Z00T
Documentation/devicetree/bindings/display/panel/samsung,atna33xc20.yaml+5−2
@@ -17,9 +17,12 @@ properties: · 16 unmodified lines
1717 oneOf:
1818 # Samsung 13.3" FHD (1920x1080 pixels) eDP AMOLED panel
1919 - const: samsung,atna33xc20
20− # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
2120 - items:
22− - const: samsung,atna45af01
21+ - enum:
22+ # Samsung 14.5" WQXGA+ (2880x1800 pixels) eDP AMOLED panel
23+ - samsung,atna45af01
24+ # Samsung 14.5" 3K (2944x1840 pixels) eDP AMOLED panel
25+ - samsung,atna45dc02
2326 - const: samsung,atna33xc20
2427
2528 enable-gpios: true
Documentation/devicetree/bindings/display/panel/sony,td4353-jdi.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Sony TD4353 JDI 5 / 5.7" 2160x1080 MIPI-DSI Panel
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 The Sony TD4353 JDI is a 5 (XZ2c) / 5.7 (XZ2) inch 2160x1080
Documentation/devicetree/bindings/eeprom/at25.yaml+1−0
@@ -28,6 +28,7 @@ properties: · 27 unmodified lines
2828 - anvo,anv32e61w
2929 - atmel,at25256B
3030 - fujitsu,mb85rs1mt
31+ - fujitsu,mb85rs256
3132 - fujitsu,mb85rs64
3233 - microchip,at25160bn
3334 - microchip,25lc040
Documentation/devicetree/bindings/input/touchscreen/edt-ft5x06.yaml+1−0
@@ -42,6 +42,7 @@ properties: · 41 unmodified lines
4242 - focaltech,ft5426
4343 - focaltech,ft5452
4444 - focaltech,ft6236
45+ - focaltech,ft8201
4546 - focaltech,ft8719
4647
4748 reg:
Documentation/devicetree/bindings/interconnect/qcom,sc7280-rpmh.yaml+1−1
@@ -8,7 +8,7 @@ title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280 · 7 unmodified lines
88
99 maintainers:
1010 - Bjorn Andersson <andersson@kernel.org>
11− - Konrad Dybcio <konrad.dybcio@linaro.org>
11+ - Konrad Dybcio <konradybcio@kernel.org>
1212
1313 description: |
1414 RPMh interconnect providers support system bandwidth requirements through
Documentation/devicetree/bindings/interconnect/qcom,sc8280xp-rpmh.yaml+1−1
@@ -8,7 +8,7 @@ title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP · 7 unmodified lines
88
99 maintainers:
1010 - Bjorn Andersson <andersson@kernel.org>
11− - Konrad Dybcio <konrad.dybcio@linaro.org>
11+ - Konrad Dybcio <konradybcio@kernel.org>
1212
1313 description: |
1414 RPMh interconnect providers support system bandwidth requirements through
Documentation/devicetree/bindings/interconnect/qcom,sm8450-rpmh.yaml+1−1
@@ -8,7 +8,7 @@ title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450 · 7 unmodified lines
88
99 maintainers:
1010 - Bjorn Andersson <andersson@kernel.org>
11− - Konrad Dybcio <konrad.dybcio@linaro.org>
11+ - Konrad Dybcio <konradybcio@kernel.org>
1212
1313 description: |
1414 RPMh interconnect providers support system bandwidth requirements through
Documentation/devicetree/bindings/iommu/qcom,iommu.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Technologies legacy IOMMU implementations
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 Qualcomm "B" family devices which are not compatible with arm-smmu have
Documentation/devicetree/bindings/net/fsl,qoriq-mc-dpmac.yaml+4−0
@@ -38,6 +38,10 @@ properties: · 37 unmodified lines
3838
3939 managed: true
4040
41+ phys:
42+ description: A reference to the SerDes lane(s)
43+ maxItems: 1
44+
4145 required:
4246 - reg
4347
Documentation/devicetree/bindings/pinctrl/qcom,mdm9607-tlmm.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Technologies, Inc. MDM9607 TLMM block
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description:
1313 Top Level Mode Multiplexer pin controller in Qualcomm MDM9607 SoC.
Documentation/devicetree/bindings/pinctrl/qcom,sm6350-tlmm.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Technologies, Inc. SM6350 TLMM block
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description:
1313 Top Level Mode Multiplexer pin controller in Qualcomm SM6350 SoC.
Documentation/devicetree/bindings/pinctrl/qcom,sm6375-tlmm.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Technologies, Inc. SM6375 TLMM block
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@somainline.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description:
1313 Top Level Mode Multiplexer pin controller in Qualcomm SM6375 SoC.
Documentation/devicetree/bindings/remoteproc/qcom,rpm-proc.yaml+1−1
@@ -8,7 +8,7 @@ title: Qualcomm Resource Power Manager (RPM) Processor/Subsystem · 7 unmodified lines
88
99 maintainers:
1010 - Bjorn Andersson <andersson@kernel.org>
11− - Konrad Dybcio <konrad.dybcio@linaro.org>
11+ - Konrad Dybcio <konradybcio@kernel.org>
1212 - Stephan Gerhold <stephan@gerhold.net>
1313
1414 description: |
Documentation/devicetree/bindings/soc/qcom/qcom,rpm-master-stats.yaml+1−1
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# · 6 unmodified lines
77 title: Qualcomm Technologies, Inc. (QTI) RPM Master Stats
88
99 maintainers:
10− - Konrad Dybcio <konrad.dybcio@linaro.org>
10+ - Konrad Dybcio <konradybcio@kernel.org>
1111
1212 description: |
1313 The Qualcomm RPM (Resource Power Manager) architecture includes a concept
Documentation/devicetree/bindings/sound/qcom,wcd934x.yaml+2−1
@@ -199,10 +199,11 @@ additionalProperties: false · 198 unmodified lines
199199
200200 examples:
201201 - |
202+ #include <dt-bindings/gpio/gpio.h>
202203 codec@1,0{
203204 compatible = "slim217,250";
204205 reg = <1 0>;
205− reset-gpios = <&tlmm 64 0>;
206+ reset-gpios = <&tlmm 64 GPIO_ACTIVE_LOW>;
206207 slim-ifc-dev = <&wcd9340_ifd>;
207208 #sound-dai-cells = <1>;
208209 interrupt-parent = <&tlmm>;
Documentation/devicetree/bindings/sound/qcom,wcd937x.yaml+1−1
@@ -42,7 +42,7 @@ examples: · 41 unmodified lines
4242 pinctrl-names = "default", "sleep";
4343 pinctrl-0 = <&wcd_reset_n>;
4444 pinctrl-1 = <&wcd_reset_n_sleep>;
45− reset-gpios = <&tlmm 83 GPIO_ACTIVE_HIGH>;
45+ reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
4646 vdd-buck-supply = <&vreg_l17b_1p8>;
4747 vdd-rxtx-supply = <&vreg_l18b_1p8>;
4848 vdd-px-supply = <&vreg_l18b_1p8>;
Documentation/devicetree/bindings/sound/qcom,wcd938x.yaml+2−1
@@ -34,9 +34,10 @@ unevaluatedProperties: false · 33 unmodified lines
3434
3535 examples:
3636 - |
37+ #include <dt-bindings/gpio/gpio.h>
3738 codec {
3839 compatible = "qcom,wcd9380-codec";
39− reset-gpios = <&tlmm 32 0>;
40+ reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
4041 #sound-dai-cells = <1>;
4142 qcom,tx-device = <&wcd938x_tx>;
4243 qcom,rx-device = <&wcd938x_rx>;
Documentation/devicetree/bindings/sound/qcom,wcd939x.yaml+2−2
@@ -52,10 +52,10 @@ unevaluatedProperties: false · 51 unmodified lines
5252
5353 examples:
5454 - |
55− #include <dt-bindings/interrupt-controller/irq.h>
55+ #include <dt-bindings/gpio/gpio.h>
5656 codec {
5757 compatible = "qcom,wcd9390-codec";
58− reset-gpios = <&tlmm 32 IRQ_TYPE_NONE>;
58+ reset-gpios = <&tlmm 32 GPIO_ACTIVE_LOW>;
5959 #sound-dai-cells = <1>;
6060 qcom,tx-device = <&wcd939x_tx>;
6161 qcom,rx-device = <&wcd939x_rx>;
Documentation/devicetree/bindings/usb/microchip,usb2514.yaml+9−1
@@ -10,7 +10,7 @@ maintainers: · 9 unmodified lines
1010 - Fabio Estevam <festevam@gmail.com>
1111
1212 allOf:
13− - $ref: usb-hcd.yaml#
13+ - $ref: usb-device.yaml#
1414
1515 properties:
1616 compatible:
@@ -18,6 +18,7 @@ properties: · 1 unmodified line
1818 - usb424,2412
1919 - usb424,2417
2020 - usb424,2514
21+ - usb424,2517
2122
2223 reg: true
2324
@@ -35,6 +36,13 @@ required: · 11 unmodified lines
3536 - compatible
3637 - reg
3738
39+patternProperties:
40+ "^.*@[0-9a-f]{1,2}$":
41+ description: The hard wired USB devices
42+ type: object
43+ $ref: /schemas/usb/usb-device.yaml
44+ additionalProperties: true
45+
3846 unevaluatedProperties: false
3947
4048 examples:
Documentation/driver-api/thermal/sysfs-api.rst+30−35
@@ -4,8 +4,6 @@ Generic Thermal Sysfs driver How To · 3 unmodified lines
44
55 Written by Sujith Thomas <sujith.thomas@intel.com>, Zhang Rui <rui.zhang@intel.com>
66
7−Updated: 2 January 2008
8−
97 Copyright (c) 2008 Intel Corporation
108
119
@@ -38,23 +36,23 @@ temperature) and throttle appropriate devices. · 26 unmodified lines
3836
3937 ::
4038
41− struct thermal_zone_device
42− *thermal_zone_device_register(char *type,
43− int trips, int mask, void *devdata,
44− struct thermal_zone_device_ops *ops,
45− const struct thermal_zone_params *tzp,
46− int passive_delay, int polling_delay))
39+ struct thermal_zone_device *
40+ thermal_zone_device_register_with_trips(const char *type,
41+ const struct thermal_trip *trips,
42+ int num_trips, void *devdata,
43+ const struct thermal_zone_device_ops *ops,
44+ const struct thermal_zone_params *tzp,
45+ unsigned int passive_delay,
46+ unsigned int polling_delay)
4747
48− This interface function adds a new thermal zone device (sensor) to
48+ This interface function adds a new thermal zone device (sensor) to the
4949 /sys/class/thermal folder as `thermal_zone[0-*]`. It tries to bind all the
50− thermal cooling devices registered at the same time.
50+ thermal cooling devices registered to it at the same time.
5151
5252 type:
5353 the thermal zone type.
5454 trips:
55− the total number of trip points this thermal zone supports.
56− mask:
57− Bit string: If 'n'th bit is set, then trip point 'n' is writable.
55+ the table of trip points for this thermal zone.
5856 devdata:
5957 device private data
6058 ops:
@@ -67,32 +65,29 @@ temperature) and throttle appropriate devices. · 6 unmodified lines
6765 .get_temp:
6866 get the current temperature of the thermal zone.
6967 .set_trips:
70− set the trip points window. Whenever the current temperature
71− is updated, the trip points immediately below and above the
72− current temperature are found.
73− .get_mode:
74− get the current mode (enabled/disabled) of the thermal zone.
75−
76− - "enabled" means the kernel thermal management is
77− enabled.
78− - "disabled" will prevent kernel thermal driver action
79− upon trip points so that user applications can take
80− charge of thermal management.
81− .set_mode:
82− set the mode (enabled/disabled) of the thermal zone.
83− .get_trip_type:
84− get the type of certain trip point.
85− .get_trip_temp:
86− get the temperature above which the certain trip point
87− will be fired.
68+ set the trip points window. Whenever the current temperature
69+ is updated, the trip points immediately below and above the
70+ current temperature are found.
71+ .change_mode:
72+ change the mode (enabled/disabled) of the thermal zone.
73+ .set_trip_temp:
74+ set the temperature of a given trip point.
75+ .get_crit_temp:
76+ get the critical temperature for this thermal zone.
8877 .set_emul_temp:
89− set the emulation temperature which helps in debugging
90− different threshold temperature points.
78+ set the emulation temperature which helps in debugging
79+ different threshold temperature points.
80+ .get_trend:
81+ get the trend of most recent zone temperature changes.
82+ .hot:
83+ hot trip point crossing handler.
84+ .critical:
85+ critical trip point crossing handler.
9186 tzp:
9287 thermal zone platform parameters.
9388 passive_delay:
94− number of milliseconds to wait between polls when
95− performing passive cooling.
89+ number of milliseconds to wait between polls when performing passive
90+ cooling.
9691 polling_delay:
9792 number of milliseconds to wait between polls when checking
9893 whether trip points have been crossed (0 for interrupt driven systems).
Documentation/filesystems/caching/fscache.rst+4−4
@@ -318,10 +318,10 @@ where the columns are: · 317 unmodified lines
318318 Debugging
319319 =========
320320
321−If CONFIG_FSCACHE_DEBUG is enabled, the FS-Cache facility can have runtime
322−debugging enabled by adjusting the value in::
321+If CONFIG_NETFS_DEBUG is enabled, the FS-Cache facility and NETFS support can
322+have runtime debugging enabled by adjusting the value in::
323323
324− /sys/module/fscache/parameters/debug
324+ /sys/module/netfs/parameters/debug
325325
326326 This is a bitmask of debugging streams to enable:
327327
@@ -343,6 +343,6 @@ This is a bitmask of debugging streams to enable: · 15 unmodified lines
343343 The appropriate set of values should be OR'd together and the result written to
344344 the control file. For example::
345345
346− echo $((1|8|512)) >/sys/module/fscache/parameters/debug
346+ echo $((1|8|512)) >/sys/module/netfs/parameters/debug
347347
348348 will turn on all function entry debugging.
Documentation/filesystems/erofs.rst+1−1
@@ -75,7 +75,7 @@ Here are the main features of EROFS: · 74 unmodified lines
7575
7676 - Support merging tail-end data into a special inode as fragments.
7777
78− - Support large folios for uncompressed files.
78+ - Support large folios to make use of THPs (Transparent Hugepages);
7979
8080 - Support direct I/O on uncompressed files to avoid double caching for loop
8181 devices;
Documentation/filesystems/smb/ksmbd.rst+13−13
@@ -13,7 +13,7 @@ KSMBD architecture · 12 unmodified lines
1313 The subset of performance related operations belong in kernelspace and
1414 the other subset which belong to operations which are not really related with
1515 performance in userspace. So, DCE/RPC management that has historically resulted
16−into number of buffer overflow issues and dangerous security bugs and user
16+into a number of buffer overflow issues and dangerous security bugs and user
1717 account management are implemented in user space as ksmbd.mountd.
1818 File operations that are related with performance (open/read/write/close etc.)
1919 in kernel space (ksmbd). This also allows for easier integration with VFS
@@ -24,8 +24,8 @@ ksmbd (kernel daemon) · 4 unmodified lines
2424
2525 When the server daemon is started, It starts up a forker thread
2626 (ksmbd/interface name) at initialization time and open a dedicated port 445
27−for listening to SMB requests. Whenever new clients make request, Forker
28−thread will accept the client connection and fork a new thread for dedicated
27+for listening to SMB requests. Whenever new clients make a request, the Forker
28+thread will accept the client connection and fork a new thread for a dedicated
2929 communication channel between the client and the server. It allows for parallel
3030 processing of SMB requests(commands) from clients as well as allowing for new
3131 clients to make new connections. Each instance is named ksmbd/1~n(port number)
@@ -34,12 +34,12 @@ thread can decide to pass through the commands to the user space (ksmbd.mountd), · 2 unmodified lines
3434 currently DCE/RPC commands are identified to be handled through the user space.
3535 To further utilize the linux kernel, it has been chosen to process the commands
3636 as workitems and to be executed in the handlers of the ksmbd-io kworker threads.
37−It allows for multiplexing of the handlers as the kernel take care of initiating
37+It allows for multiplexing of the handlers as the kernel takes care of initiating
3838 extra worker threads if the load is increased and vice versa, if the load is
39−decreased it destroys the extra worker threads. So, after connection is
40−established with client. Dedicated ksmbd/1..n(port number) takes complete
39+decreased it destroys the extra worker threads. So, after the connection is
40+established with the client. Dedicated ksmbd/1..n(port number) takes complete
4141 ownership of receiving/parsing of SMB commands. Each received command is worked
42−in parallel i.e., There can be multiple clients commands which are worked in
42+in parallel i.e., there can be multiple client commands which are worked in
4343 parallel. After receiving each command a separated kernel workitem is prepared
4444 for each command which is further queued to be handled by ksmbd-io kworkers.
4545 So, each SMB workitem is queued to the kworkers. This allows the benefit of load
@@ -49,9 +49,9 @@ performance by handling client commands in parallel. · 3 unmodified lines
4949 ksmbd.mountd (user space daemon)
5050 --------------------------------
5151
52−ksmbd.mountd is userspace process to, transfer user account and password that
52+ksmbd.mountd is a userspace process to, transfer the user account and password that
5353 are registered using ksmbd.adduser (part of utils for user space). Further it
54−allows sharing information parameters that parsed from smb.conf to ksmbd in
54+allows sharing information parameters that are parsed from smb.conf to ksmbd in
5555 kernel. For the execution part it has a daemon which is continuously running
5656 and connected to the kernel interface using netlink socket, it waits for the
5757 requests (dcerpc and share/user info). It handles RPC calls (at a minimum few
@@ -124,7 +124,7 @@ How to run · 66 unmodified lines
124124 1. Download ksmbd-tools(https://github.com/cifsd-team/ksmbd-tools/releases) and
125125 compile them.
126126
127− - Refer README(https://github.com/cifsd-team/ksmbd-tools/blob/master/README.md)
127+ - Refer to README(https://github.com/cifsd-team/ksmbd-tools/blob/master/README.md)
128128 to know how to use ksmbd.mountd/adduser/addshare/control utils
129129
130130 $ ./autogen.sh
@@ -133,7 +133,7 @@ How to run · 2 unmodified lines
133133
134134 2. Create /usr/local/etc/ksmbd/ksmbd.conf file, add SMB share in ksmbd.conf file.
135135
136− - Refer ksmbd.conf.example in ksmbd-utils, See ksmbd.conf manpage
136+ - Refer to ksmbd.conf.example in ksmbd-utils, See ksmbd.conf manpage
137137 for details to configure shares.
138138
139139 $ man ksmbd.conf
@@ -145,7 +145,7 @@ How to run · 5 unmodified lines
145145 $ man ksmbd.adduser
146146 $ sudo ksmbd.adduser -a <Enter USERNAME for SMB share access>
147147
148−4. Insert ksmbd.ko module after build your kernel. No need to load module
148+4. Insert the ksmbd.ko module after you build your kernel. No need to load the module
149149 if ksmbd is built into the kernel.
150150
151151 - Set ksmbd in menuconfig(e.g. $ make menuconfig)
@@ -175,7 +175,7 @@ Each layer · 23 unmodified lines
175175 1. Enable all component prints
176176 # sudo ksmbd.control -d "all"
177177
178−2. Enable one of components (smb, auth, vfs, oplock, ipc, conn, rdma)
178+2. Enable one of the components (smb, auth, vfs, oplock, ipc, conn, rdma)
179179 # sudo ksmbd.control -d "smb"
180180
181181 3. Show what prints are enabled.
Documentation/kbuild/llvm.rst+1−1
@@ -126,7 +126,7 @@ Ccache · 125 unmodified lines
126126
127127 ``ccache`` can be used with ``clang`` to improve subsequent builds, (though
128128 KBUILD_BUILD_TIMESTAMP_ should be set to a deterministic value between builds
129−in order to avoid 100% cache misses, see Reproducible_builds_ for more info):
129+in order to avoid 100% cache misses, see Reproducible_builds_ for more info)::
130130
131131 KBUILD_BUILD_TIMESTAMP='' make LLVM=1 CC="ccache clang"
132132
Documentation/netlink/specs/ethtool.yaml+1−1
@@ -1753,6 +1753,7 @@ operations: · 1752 unmodified lines
17531753 request:
17541754 attributes:
17551755 - header
1756+ - context
17561757 reply:
17571758 attributes:
17581759 - header
@@ -1761,7 +1762,6 @@ operations: · 2 unmodified lines
17611762 - indir
17621763 - hkey
17631764 - input_xfrm
1764− dump: *rss-get-op
17651765 -
17661766 name: plca-get-cfg
17671767 doc: Get PLCA params.
Documentation/networking/ethtool-netlink.rst+1−0
@@ -1875,6 +1875,7 @@ Kernel response contents: · 1874 unmodified lines
18751875
18761876 ===================================== ====== ==========================
18771877 ``ETHTOOL_A_RSS_HEADER`` nested reply header
1878+ ``ETHTOOL_A_RSS_CONTEXT`` u32 context number
18781879 ``ETHTOOL_A_RSS_HFUNC`` u32 RSS hash func
18791880 ``ETHTOOL_A_RSS_INDIR`` binary Indir table bytes
18801881 ``ETHTOOL_A_RSS_HKEY`` binary Hash key bytes
Documentation/process/coding-style.rst+0−12
@@ -629,18 +629,6 @@ The preferred style for long (multi-line) comments is: · 628 unmodified lines
629629 * with beginning and ending almost-blank lines.
630630 */
631631
632−For files in net/ and drivers/net/ the preferred style for long (multi-line)
633−comments is a little different.
634−
635−.. code-block:: c
636−
637− /* The preferred comment style for files in net/ and drivers/net
638− * looks like this.
639− *
640− * It is nearly the same as the generally preferred comment style,
641− * but there is no initial almost-blank line.
642− */
643−
644632 It's also important to comment data, whether they are basic types or derived
645633 types. To this end, use just one data declaration per line (no commas for
646634 multiple data declarations). This leaves you room for a small comment on each
Documentation/process/embargoed-hardware-issues.rst+96−57
@@ -13,9 +13,9 @@ kernel. · 12 unmodified lines
1313 Hardware issues like Meltdown, Spectre, L1TF etc. must be treated
1414 differently because they usually affect all Operating Systems ("OS") and
1515 therefore need coordination across different OS vendors, distributions,
16−hardware vendors and other parties. For some of the issues, software
17−mitigations can depend on microcode or firmware updates, which need further
18−coordination.
16+silicon vendors, hardware integrators, and other parties. For some of the
17+issues, software mitigations can depend on microcode or firmware updates,
18+which need further coordination.
1919
2020 .. _Contact:
2121
@@ -32,8 +32,8 @@ Linux kernel security team (:ref:`Documentation/admin-guide/ · 10 unmodified lines
3232 <securitybugs>`) instead.
3333
3434 The team can be contacted by email at <hardware-security@kernel.org>. This
35−is a private list of security officers who will help you to coordinate a
36−fix according to our documented process.
35+is a private list of security officers who will help you coordinate a fix
36+according to our documented process.
3737
3838 The list is encrypted and email to the list can be sent by either PGP or
3939 S/MIME encrypted and must be signed with the reporter's PGP key or S/MIME
@@ -43,7 +43,7 @@ the following URLs: · 3 unmodified lines
4343 - PGP: https://www.kernel.org/static/files/hardware-security.asc
4444 - S/MIME: https://www.kernel.org/static/files/hardware-security.crt
4545
46−While hardware security issues are often handled by the affected hardware
46+While hardware security issues are often handled by the affected silicon
4747 vendor, we welcome contact from researchers or individuals who have
4848 identified a potential hardware flaw.
4949
@@ -65,7 +65,7 @@ of Linux Foundation's IT operations personnel technically have the · 15 unmodified lines
6565 ability to access the embargoed information, but are obliged to
6666 confidentiality by their employment contract. Linux Foundation IT
6767 personnel are also responsible for operating and managing the rest of
68−kernel.org infrastructure.
68+kernel.org's infrastructure.
6969
7070 The Linux Foundation's current director of IT Project infrastructure is
7171 Konstantin Ryabitsev.
@@ -85,7 +85,7 @@ Memorandum of Understanding · 13 unmodified lines
8585
8686 The Linux kernel community has a deep understanding of the requirement to
8787 keep hardware security issues under embargo for coordination between
88−different OS vendors, distributors, hardware vendors and other parties.
88+different OS vendors, distributors, silicon vendors, and other parties.
8989
9090 The Linux kernel community has successfully handled hardware security
9191 issues in the past and has the necessary mechanisms in place to allow
@@ -103,11 +103,11 @@ the issue in the best technical way. · 11 unmodified lines
103103 All involved developers pledge to adhere to the embargo rules and to keep
104104 the received information confidential. Violation of the pledge will lead to
105105 immediate exclusion from the current issue and removal from all related
106−mailing-lists. In addition, the hardware security team will also exclude
106+mailing lists. In addition, the hardware security team will also exclude
107107 the offender from future issues. The impact of this consequence is a highly
108108 effective deterrent in our community. In case a violation happens the
109109 hardware security team will inform the involved parties immediately. If you
110−or anyone becomes aware of a potential violation, please report it
110+or anyone else becomes aware of a potential violation, please report it
111111 immediately to the Hardware security officers.
112112
113113
@@ -124,14 +124,16 @@ method for these types of issues. · 10 unmodified lines
124124 Start of Disclosure
125125 """""""""""""""""""
126126
127−Disclosure starts by contacting the Linux kernel hardware security team by
128−email. This initial contact should contain a description of the problem and
129−a list of any known affected hardware. If your organization builds or
130−distributes the affected hardware, we encourage you to also consider what
131−other hardware could be affected.
127+Disclosure starts by emailing the Linux kernel hardware security team per
128+the Contact section above. This initial contact should contain a
129+description of the problem and a list of any known affected silicon. If
130+your organization builds or distributes the affected hardware, we encourage
131+you to also consider what other hardware could be affected. The disclosing
132+party is responsible for contacting the affected silicon vendors in a
133+timely manner.
132134
133135 The hardware security team will provide an incident-specific encrypted
134−mailing-list which will be used for initial discussion with the reporter,
136+mailing list which will be used for initial discussion with the reporter,
135137 further disclosure, and coordination of fixes.
136138
137139 The hardware security team will provide the disclosing party a list of
@@ -158,8 +160,8 @@ This serves several purposes: · 20 unmodified lines
158160 - The disclosed entities can be contacted to name experts who should
159161 participate in the mitigation development.
160162
161− - If an expert which is required to handle an issue is employed by an
162− listed entity or member of an listed entity, then the response teams can
163+ - If an expert who is required to handle an issue is employed by a listed
164+ entity or member of an listed entity, then the response teams can
163165 request the disclosure of that expert from that entity. This ensures
164166 that the expert is also part of the entity's response team.
165167
@@ -169,8 +171,8 @@ Disclosure · 3 unmodified lines
169171 The disclosing party provides detailed information to the initial response
170172 team via the specific encrypted mailing-list.
171173
172−From our experience the technical documentation of these issues is usually
173−a sufficient starting point and further technical clarification is best
174+From our experience, the technical documentation of these issues is usually
175+a sufficient starting point, and further technical clarification is best
174176 done via email.
175177
176178 Mitigation development
@@ -179,57 +181,93 @@ Mitigation development · 2 unmodified lines
179181 The initial response team sets up an encrypted mailing-list or repurposes
180182 an existing one if appropriate.
181183
182−Using a mailing-list is close to the normal Linux development process and
183−has been successfully used in developing mitigations for various hardware
184+Using a mailing list is close to the normal Linux development process and
185+has been successfully used to develop mitigations for various hardware
184186 security issues in the past.
185187
186−The mailing-list operates in the same way as normal Linux development.
187−Patches are posted, discussed and reviewed and if agreed on applied to a
188−non-public git repository which is only accessible to the participating
188+The mailing list operates in the same way as normal Linux development.
189+Patches are posted, discussed, and reviewed and if agreed upon, applied to
190+a non-public git repository which is only accessible to the participating
189191 developers via a secure connection. The repository contains the main
190192 development branch against the mainline kernel and backport branches for
191193 stable kernel versions as necessary.
192194
193195 The initial response team will identify further experts from the Linux
194−kernel developer community as needed. Bringing in experts can happen at any
195−time of the development process and needs to be handled in a timely manner.
196+kernel developer community as needed. Any involved party can suggest
197+further experts to be included, each of which will be subject to the same
198+requirements outlined above.
196199
197−If an expert is employed by or member of an entity on the disclosure list
200+Bringing in experts can happen at any time in the development process and
201+needs to be handled in a timely manner.
202+
203+If an expert is employed by or a member of an entity on the disclosure list
198204 provided by the disclosing party, then participation will be requested from
199205 the relevant entity.
200206
201−If not, then the disclosing party will be informed about the experts
207+If not, then the disclosing party will be informed about the experts'
202208 participation. The experts are covered by the Memorandum of Understanding
203−and the disclosing party is requested to acknowledge the participation. In
204−case that the disclosing party has a compelling reason to object, then this
205−objection has to be raised within five work days and resolved with the
206−incident team immediately. If the disclosing party does not react within
207−five work days this is taken as silent acknowledgement.
209+and the disclosing party is requested to acknowledge their participation.
210+In the case where the disclosing party has a compelling reason to object,
211+any objection must to be raised within five working days and resolved with
212+the incident team immediately. If the disclosing party does not react
213+within five working days this is taken as silent acknowledgment.
208214
209−After acknowledgement or resolution of an objection the expert is disclosed
210−by the incident team and brought into the development process.
215+After the incident team acknowledges or resolves an objection, the expert
216+is disclosed and brought into the development process.
211217
212218 List participants may not communicate about the issue outside of the
213219 private mailing list. List participants may not use any shared resources
214220 (e.g. employer build farms, CI systems, etc) when working on patches.
215221
222+Early access
223+""""""""""""
224+
225+The patches discussed and developed on the list can neither be distributed
226+to any individual who is not a member of the response team nor to any other
227+organization.
228+
229+To allow the affected silicon vendors to work with their internal teams and
230+industry partners on testing, validation, and logistics, the following
231+exception is provided:
232+
233+ Designated representatives of the affected silicon vendors are
234+ allowed to hand over the patches at any time to the silicon
235+ vendor’s response team. The representative must notify the kernel
236+ response team about the handover. The affected silicon vendor must
237+ have and maintain their own documented security process for any
238+ patches shared with their response team that is consistent with
239+ this policy.
240+
241+ The silicon vendor’s response team can distribute these patches to
242+ their industry partners and to their internal teams under the
243+ silicon vendor’s documented security process. Feedback from the
244+ industry partners goes back to the silicon vendor and is
245+ communicated by the silicon vendor to the kernel response team.
246+
247+ The handover to the silicon vendor’s response team removes any
248+ responsibility or liability from the kernel response team regarding
249+ premature disclosure, which happens due to the involvement of the
250+ silicon vendor’s internal teams or industry partners. The silicon
251+ vendor guarantees this release of liability by agreeing to this
252+ process.
216253
217254 Coordinated release
218255 """""""""""""""""""
219256
220−The involved parties will negotiate the date and time where the embargo
221−ends. At that point the prepared mitigations are integrated into the
222−relevant kernel trees and published. There is no pre-notification process:
223−fixes are published in public and available to everyone at the same time.
257+The involved parties will negotiate the date and time when the embargo
258+ends. At that point, the prepared mitigations are published into the
259+relevant kernel trees. There is no pre-notification process: the
260+mitigations are published in public and available to everyone at the same
261+time.
224262
225263 While we understand that hardware security issues need coordinated embargo
226−time, the embargo time should be constrained to the minimum time which is
227−required for all involved parties to develop, test and prepare the
264+time, the embargo time should be constrained to the minimum time that is
265+required for all involved parties to develop, test, and prepare their
228266 mitigations. Extending embargo time artificially to meet conference talk
229−dates or other non-technical reasons is creating more work and burden for
230−the involved developers and response teams as the patches need to be kept
231−up to date in order to follow the ongoing upstream kernel development,
232−which might create conflicting changes.
267+dates or other non-technical reasons creates more work and burden for the
268+involved developers and response teams as the patches need to be kept up to
269+date in order to follow the ongoing upstream kernel development, which
270+might create conflicting changes.
233271
234272 CVE assignment
235273 """"""""""""""
@@ -275,34 +313,35 @@ an involved disclosed party. The current ambassadors list: · 39 unmodified lines
275313
276314 If you want your organization to be added to the ambassadors list, please
277315 contact the hardware security team. The nominated ambassador has to
278−understand and support our process fully and is ideally well connected in
316+understand and support our process fully and is ideally well-connected in
279317 the Linux kernel community.
280318
281319 Encrypted mailing-lists
282320 -----------------------
283321
284−We use encrypted mailing-lists for communication. The operating principle
322+We use encrypted mailing lists for communication. The operating principle
285323 of these lists is that email sent to the list is encrypted either with the
286−list's PGP key or with the list's S/MIME certificate. The mailing-list
324+list's PGP key or with the list's S/MIME certificate. The mailing list
287325 software decrypts the email and re-encrypts it individually for each
288326 subscriber with the subscriber's PGP key or S/MIME certificate. Details
289−about the mailing-list software and the setup which is used to ensure the
327+about the mailing list software and the setup that is used to ensure the
290328 security of the lists and protection of the data can be found here:
291329 https://korg.wiki.kernel.org/userdoc/remail.
292330
293331 List keys
294332 ^^^^^^^^^
295333
296−For initial contact see :ref:`Contact`. For incident specific mailing-lists
297−the key and S/MIME certificate are conveyed to the subscribers by email
298−sent from the specific list.
334+For initial contact see the :ref:`Contact` section above. For incident
335+specific mailing lists, the key and S/MIME certificate are conveyed to the
336+subscribers by email sent from the specific list.
299337
300−Subscription to incident specific lists
338+Subscription to incident-specific lists
301339 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
302340
303−Subscription is handled by the response teams. Disclosed parties who want
304−to participate in the communication send a list of potential subscribers to
305−the response team so the response team can validate subscription requests.
341+Subscription to incident-specific lists is handled by the response teams.
342+Disclosed parties who want to participate in the communication send a list
343+of potential experts to the response team so the response team can validate
344+subscription requests.
306345
307346 Each subscriber needs to send a subscription request to the response team
308347 by email. The email must be signed with the subscriber's PGP key or S/MIME
Documentation/process/maintainer-netdev.rst+0−17
@@ -355,23 +355,6 @@ just do it. As a result, a sequence of smaller series gets merged quicker and · 354 unmodified lines
355355 with better review coverage. Re-posting large series also increases the mailing
356356 list traffic.
357357
358−Multi-line comments
359−~~~~~~~~~~~~~~~~~~~
360−
361−Comment style convention is slightly different for networking and most of
362−the tree. Instead of this::
363−
364− /*
365− * foobar blah blah blah
366− * another line of text
367− */
368−
369−it is requested that you make it look like this::
370−
371− /* foobar blah blah blah
372− * another line of text
373− */
374−
375358 Local variable ordering ("reverse xmas tree", "RCS")
376359 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
377360
Documentation/userspace-api/media/v4l/pixfmt-yuv-luma.rst+2−2
@@ -21,9 +21,9 @@ are often referred to as greyscale formats. · 20 unmodified lines
2121
2222 .. raw:: latex
2323
24− \scriptsize
24+ \tiny
2525
26−.. tabularcolumns:: |p{3.6cm}|p{3.0cm}|p{1.3cm}|p{2.6cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|
26+.. tabularcolumns:: |p{3.6cm}|p{2.4cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|p{1.3cm}|
2727
2828 .. flat-table:: Luma-Only Image Formats
2929 :header-rows: 1
Documentation/virt/kvm/api.rst+8−2
@@ -2592,7 +2592,7 @@ Specifically: · 2591 unmodified lines
25922592 0x6030 0000 0010 004a SPSR_ABT 64 spsr[KVM_SPSR_ABT]
25932593 0x6030 0000 0010 004c SPSR_UND 64 spsr[KVM_SPSR_UND]
25942594 0x6030 0000 0010 004e SPSR_IRQ 64 spsr[KVM_SPSR_IRQ]
2595− 0x6060 0000 0010 0050 SPSR_FIQ 64 spsr[KVM_SPSR_FIQ]
2595+ 0x6030 0000 0010 0050 SPSR_FIQ 64 spsr[KVM_SPSR_FIQ]
25962596 0x6040 0000 0010 0054 V0 128 fp_regs.vregs[0] [1]_
25972597 0x6040 0000 0010 0058 V1 128 fp_regs.vregs[1] [1]_
25982598 ...
@@ -6368,7 +6368,7 @@ a single guest_memfd file, but the bound ranges must not overlap). · 3769 unmodified lines
63686368 See KVM_SET_USER_MEMORY_REGION2 for additional details.
63696369
63706370 4.143 KVM_PRE_FAULT_MEMORY
6371−------------------------
6371+---------------------------
63726372
63736373 :Capability: KVM_CAP_PRE_FAULT_MEMORY
63746374 :Architectures: none
@@ -6405,6 +6405,12 @@ for the current vCPU state. KVM maps memory as if the vCPU generated a · 30 unmodified lines
64056405 stage-2 read page fault, e.g. faults in memory as needed, but doesn't break
64066406 CoW. However, KVM does not mark any newly created stage-2 PTE as Accessed.
64076407
6408+In the case of confidential VM types where there is an initial set up of
6409+private guest memory before the guest is 'finalized'/measured, this ioctl
6410+should only be issued after completing all the necessary setup to put the
6411+guest into a 'finalized' state so that the above semantics can be reliably
6412+ensured.
6413+
64086414 In some cases, multiple vCPUs might share the page tables. In this
64096415 case, the ioctl can be called in parallel.
64106416
Documentation/wmi/devices/msi-wmi-platform.rst+3−3
@@ -130,12 +130,12 @@ data using the `bmfdec <https://github.com/pali/bmfdec>`_ utility: · 129 unmodified lines
130130
131131 Due to a peculiarity in how Windows handles the ``CreateByteField()`` ACPI operator (errors only
132132 happen when a invalid byte field is ultimately accessed), all methods require a 32 byte input
133−buffer, even if the Binay MOF says otherwise.
133+buffer, even if the Binary MOF says otherwise.
134134
135135 The input buffer contains a single byte to select the subfeature to be accessed and 31 bytes of
136136 input data, the meaning of which depends on the subfeature being accessed.
137137
138−The output buffer contains a singe byte which signals success or failure (``0x00`` on failure)
138+The output buffer contains a single byte which signals success or failure (``0x00`` on failure)
139139 and 31 bytes of output data, the meaning if which depends on the subfeature being accessed.
140140
141141 WMI method Get_EC()
@@ -147,7 +147,7 @@ data contains a flag byte and a 28 byte controller firmware version string. · 5 unmodified lines
147147 The first 4 bits of the flag byte contain the minor version of the embedded controller interface,
148148 with the next 2 bits containing the major version of the embedded controller interface.
149149
150−The 7th bit signals if the embedded controller page chaged (exact meaning is unknown), and the
150+The 7th bit signals if the embedded controller page changed (exact meaning is unknown), and the
151151 last bit signals if the platform is a Tigerlake platform.
152152
153153 The MSI software seems to only use this interface when the last bit is set.
MAINTAINERS+49−21
@@ -1880,6 +1880,10 @@ F: Documentation/devicetree/bindings/iommu/arm,smmu* · 1879 unmodified lines
18801880 F: drivers/iommu/arm/
18811881 F: drivers/iommu/io-pgtable-arm*
18821882
1883+ARM SMMU SVA SUPPORT
1884+R: Jean-Philippe Brucker <jean-philippe@linaro.org>
1885+F: drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c
1886+
18831887 ARM SUB-ARCHITECTURES
18841888 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
18851889 S: Maintained
@@ -2535,8 +2539,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) · 649 unmodified lines
25352539 S: Supported
25362540 W: http://www.linux4sam.org
25372541 T: git git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git
2538−F: arch/arm/boot/dts/microchip/at91*
2539−F: arch/arm/boot/dts/microchip/sama*
2542+F: arch/arm/boot/dts/microchip/
25402543 F: arch/arm/include/debug/at91.S
25412544 F: arch/arm/mach-at91/
25422545 F: drivers/memory/atmel*
@@ -2745,7 +2748,7 @@ F: include/linux/soc/qcom/ · 202 unmodified lines
27452748
27462749 ARM/QUALCOMM SUPPORT
27472750 M: Bjorn Andersson <andersson@kernel.org>
2748−M: Konrad Dybcio <konrad.dybcio@linaro.org>
2751+M: Konrad Dybcio <konradybcio@kernel.org>
27492752 L: linux-arm-msm@vger.kernel.org
27502753 S: Maintained
27512754 T: git git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
@@ -3504,7 +3507,9 @@ S: Maintained · 752 unmodified lines
35043507 W: http://linux-atm.sourceforge.net
35053508 F: drivers/atm/
35063509 F: include/linux/atm*
3510+F: include/linux/sonet.h
35073511 F: include/uapi/linux/atm*
3512+F: include/uapi/linux/sonet.h
35083513
35093514 ATMEL MACB ETHERNET DRIVER
35103515 M: Nicolas Ferre <nicolas.ferre@microchip.com>
@@ -5306,7 +5311,7 @@ F: drivers/media/cec/i2c/ch7322.c · 1795 unmodified lines
53065311 CIRRUS LOGIC AUDIO CODEC DRIVERS
53075312 M: David Rhodes <david.rhodes@cirrus.com>
53085313 M: Richard Fitzgerald <rf@opensource.cirrus.com>
5309−L: alsa-devel@alsa-project.org (moderated for non-subscribers)
5314+L: linux-sound@vger.kernel.org
53105315 L: patches@opensource.cirrus.com
53115316 S: Maintained
53125317 F: Documentation/devicetree/bindings/sound/cirrus,cs*
@@ -5375,7 +5380,7 @@ F: sound/soc/codecs/lochnagar-sc.c · 62 unmodified lines
53755380 CIRRUS LOGIC MADERA CODEC DRIVERS
53765381 M: Charles Keepax <ckeepax@opensource.cirrus.com>
53775382 M: Richard Fitzgerald <rf@opensource.cirrus.com>
5378−L: alsa-devel@alsa-project.org (moderated for non-subscribers)
5383+L: linux-sound@vger.kernel.org
53795384 L: patches@opensource.cirrus.com
53805385 S: Supported
53815386 W: https://github.com/CirrusLogic/linux-drivers/wiki
@@ -7108,7 +7113,7 @@ F: drivers/gpu/drm/tiny/panel-mipi-dbi.c · 1726 unmodified lines
71087113 DRM DRIVER for Qualcomm Adreno GPUs
71097114 M: Rob Clark <robdclark@gmail.com>
71107115 R: Sean Paul <sean@poorly.run>
7111−R: Konrad Dybcio <konrad.dybcio@linaro.org>
7116+R: Konrad Dybcio <konradybcio@kernel.org>
71127117 L: linux-arm-msm@vger.kernel.org
71137118 L: dri-devel@lists.freedesktop.org
71147119 L: freedreno@lists.freedesktop.org
@@ -10175,7 +10180,7 @@ F: Documentation/devicetree/bindings/infiniband/hisilicon-hns-roce.txt · 3060 unmodified lines
1017510180 F: drivers/infiniband/hw/hns/
1017610181
1017710182 HISILICON SAS Controller
10178−M: Xiang Chen <chenxiang66@hisilicon.com>
10183+M: Yihang Li <liyihang9@huawei.com>
1017910184 S: Supported
1018010185 W: http://www.hisilicon.com
1018110186 F: Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
@@ -11995,7 +12000,7 @@ F: fs/jfs/ · 1813 unmodified lines
1199512000 JME NETWORK DRIVER
1199612001 M: Guo-Fu Tseng <cooldavid@cooldavid.org>
1199712002 L: netdev@vger.kernel.org
11998−S: Maintained
12003+S: Odd Fixes
1199912004 F: drivers/net/ethernet/jme.*
1200012005
1200112006 JOURNALLING FLASH FILE SYSTEM V2 (JFFS2)
@@ -12167,7 +12172,7 @@ KERNEL NFSD, SUNRPC, AND LOCKD SERVERS · 165 unmodified lines
1216712172 M: Chuck Lever <chuck.lever@oracle.com>
1216812173 M: Jeff Layton <jlayton@kernel.org>
1216912174 R: Neil Brown <neilb@suse.de>
12170−R: Olga Kornievskaia <kolga@netapp.com>
12175+R: Olga Kornievskaia <okorniev@redhat.com>
1217112176 R: Dai Ngo <Dai.Ngo@oracle.com>
1217212177 R: Tom Talpey <tom@talpey.com>
1217312178 L: linux-nfs@vger.kernel.org
@@ -13326,14 +13331,16 @@ F: Documentation/devicetree/bindings/i2c/i2c-mux-ltc4306.txt · 1152 unmodified lines
1332613331 F: drivers/i2c/muxes/i2c-mux-ltc4306.c
1332713332
1332813333 LTP (Linux Test Project)
13334+M: Andrea Cervesato <andrea.cervesato@suse.com>
1332913335 M: Cyril Hrubis <chrubis@suse.cz>
1333013336 M: Jan Stancek <jstancek@redhat.com>
1333113337 M: Petr Vorel <pvorel@suse.cz>
1333213338 M: Li Wang <liwang@redhat.com>
1333313339 M: Yang Xu <xuyang2018.jy@fujitsu.com>
13340+M: Xiao Yang <yangx.jy@fujitsu.com>
1333413341 L: ltp@lists.linux.it (subscribers-only)
1333513342 S: Maintained
13336−W: http://linux-test-project.github.io/
13343+W: https://linux-test-project.readthedocs.io/
1333713344 T: git https://github.com/linux-test-project/ltp.git
1333813345
1333913346 LTR390 AMBIENT/UV LIGHT SENSOR DRIVER
@@ -13541,7 +13548,7 @@ MARVELL GIGABIT ETHERNET DRIVERS (skge/sky2) · 201 unmodified lines
1354113548 M: Mirko Lindner <mlindner@marvell.com>
1354213549 M: Stephen Hemminger <stephen@networkplumber.org>
1354313550 L: netdev@vger.kernel.org
13544−S: Maintained
13551+S: Odd fixes
1354513552 F: drivers/net/ethernet/marvell/sk*
1354613553
1354713554 MARVELL LIBERTAS WIRELESS DRIVER
@@ -15877,15 +15884,19 @@ F: drivers/net/ · 2329 unmodified lines
1587715884 F: include/dt-bindings/net/
1587815885 F: include/linux/cn_proc.h
1587915886 F: include/linux/etherdevice.h
15887+F: include/linux/ethtool_netlink.h
1588015888 F: include/linux/fcdevice.h
1588115889 F: include/linux/fddidevice.h
1588215890 F: include/linux/hippidevice.h
1588315891 F: include/linux/if_*
1588415892 F: include/linux/inetdevice.h
15885−F: include/linux/netdevice.h
15893+F: include/linux/netdev*
15894+F: include/linux/platform_data/wiznet.h
1588615895 F: include/uapi/linux/cn_proc.h
15896+F: include/uapi/linux/ethtool_netlink.h
1588715897 F: include/uapi/linux/if_*
15888−F: include/uapi/linux/netdevice.h
15898+F: include/uapi/linux/netdev*
15899+F: tools/testing/selftests/drivers/net/
1588915900 X: drivers/net/wireless/
1589015901
1589115902 NETWORKING DRIVERS (WIRELESS)
@@ -15936,13 +15947,28 @@ F: include/linux/framer/framer-provider.h · 44 unmodified lines
1593615947 F: include/linux/framer/framer.h
1593715948 F: include/linux/in.h
1593815949 F: include/linux/indirect_call_wrapper.h
15950+F: include/linux/inet.h
15951+F: include/linux/inet_diag.h
1593915952 F: include/linux/net.h
15940−F: include/linux/netdevice.h
15953+F: include/linux/netdev*
15954+F: include/linux/netlink.h
15955+F: include/linux/netpoll.h
15956+F: include/linux/rtnetlink.h
15957+F: include/linux/seq_file_net.h
15958+F: include/linux/skbuff*
1594115959 F: include/net/
15960+F: include/uapi/linux/genetlink.h
15961+F: include/uapi/linux/hsr_netlink.h
1594215962 F: include/uapi/linux/in.h
15963+F: include/uapi/linux/inet_diag.h
15964+F: include/uapi/linux/nbd-netlink.h
1594315965 F: include/uapi/linux/net.h
1594415966 F: include/uapi/linux/net_namespace.h
15945−F: include/uapi/linux/netdevice.h
15967+F: include/uapi/linux/netconf.h
15968+F: include/uapi/linux/netdev*
15969+F: include/uapi/linux/netlink.h
15970+F: include/uapi/linux/netlink_diag.h
15971+F: include/uapi/linux/rtnetlink.h
1594615972 F: lib/net_utils.c
1594715973 F: lib/random32.c
1594815974 F: net/
@@ -17414,6 +17440,7 @@ M: Roy Zang <roy.zang@nxp.com> · 1465 unmodified lines
1741417440 L: linuxppc-dev@lists.ozlabs.org
1741517441 L: linux-pci@vger.kernel.org
1741617442 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
17443+L: imx@lists.linux.dev
1741717444 S: Maintained
1741817445 F: drivers/pci/controller/dwc/*layerscape*
1741917446
@@ -17440,6 +17467,7 @@ M: Richard Zhu <hongxing.zhu@nxp.com> · 20 unmodified lines
1744017467 M: Lucas Stach <l.stach@pengutronix.de>
1744117468 L: linux-pci@vger.kernel.org
1744217469 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
17470+L: imx@lists.linux.dev
1744317471 S: Maintained
1744417472 F: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-common.yaml
1744517473 F: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
@@ -17618,6 +17646,7 @@ F: drivers/pci/controller/pci-xgene-msi.c · 172 unmodified lines
1761817646 PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
1761917647 M: Lorenzo Pieralisi <lpieralisi@kernel.org>
1762017648 M: Krzysztof Wilczyński <kw@linux.com>
17649+R: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
1762117650 R: Rob Herring <robh@kernel.org>
1762217651 L: linux-pci@vger.kernel.org
1762317652 S: Supported
@@ -18524,7 +18553,6 @@ F: drivers/crypto/intel/qat/ · 900 unmodified lines
1852418553
1852518554 QCOM AUDIO (ASoC) DRIVERS
1852618555 M: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
18527−M: Banajit Goswami <bgoswami@quicinc.com>
1852818556 L: alsa-devel@alsa-project.org (moderated for non-subscribers)
1852918557 L: linux-arm-msm@vger.kernel.org
1853018558 S: Supported
@@ -18558,7 +18586,7 @@ F: drivers/usb/misc/qcom_eud.c · 27 unmodified lines
1855818586 QCOM IPA DRIVER
1855918587 M: Alex Elder <elder@kernel.org>
1856018588 L: netdev@vger.kernel.org
18561−S: Supported
18589+S: Maintained
1856218590 F: drivers/net/ipa/
1856318591
1856418592 QEMU MACHINE EMULATOR AND VIRTUALIZER SUPPORT
@@ -18773,7 +18801,7 @@ F: include/uapi/drm/qaic_accel.h · 208 unmodified lines
1877318801
1877418802 QUALCOMM CORE POWER REDUCTION (CPR) AVS DRIVER
1877518803 M: Bjorn Andersson <andersson@kernel.org>
18776−M: Konrad Dybcio <konrad.dybcio@linaro.org>
18804+M: Konrad Dybcio <konradybcio@kernel.org>
1877718805 L: linux-pm@vger.kernel.org
1877818806 L: linux-arm-msm@vger.kernel.org
1877918807 S: Maintained
@@ -20353,6 +20381,7 @@ F: Documentation/devicetree/bindings/scsi/ · 1573 unmodified lines
2035320381 F: drivers/scsi/
2035420382 F: drivers/ufs/
2035520383 F: include/scsi/
20384+F: include/uapi/scsi/
2035620385
2035720386 SCSI TAPE DRIVER
2035820387 M: Kai Mäkisara <Kai.Makisara@kolumbus.fi>
@@ -21053,6 +21082,7 @@ SOCKET TIMESTAMPING · 694 unmodified lines
2105321082 M: Willem de Bruijn <willemdebruijn.kernel@gmail.com>
2105421083 S: Maintained
2105521084 F: Documentation/networking/timestamping.rst
21085+F: include/linux/net_tstamp.h
2105621086 F: include/uapi/linux/net_tstamp.h
2105721087 F: tools/testing/selftests/net/so_txtime.c
2105821088
@@ -23820,10 +23850,8 @@ F: drivers/media/usb/uvc/ · 2761 unmodified lines
2382023850 F: include/uapi/linux/uvcvideo.h
2382123851
2382223852 USB WEBCAM GADGET
23823−M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
23824−M: Daniel Scally <dan.scally@ideasonboard.com>
2382523853 L: linux-usb@vger.kernel.org
23826−S: Maintained
23854+S: Orphan
2382723855 F: drivers/usb/gadget/function/*uvc*
2382823856 F: drivers/usb/gadget/legacy/webcam.c
2382923857 F: include/uapi/linux/usb/g_uvc.h
Makefile+3−3
@@ -2,7 +2,7 @@ · 1 unmodified line
22 VERSION = 6
33 PATCHLEVEL = 11
44 SUBLEVEL = 0
5−EXTRAVERSION = -rc1
5+EXTRAVERSION = -rc6
66 NAME = Baby Opossum Posse
77
88 # *DOCUMENTATION*
@@ -1963,7 +1963,7 @@ tags TAGS cscope gtags: FORCE · 1954 unmodified lines
19631963 # Protocol).
19641964 PHONY += rust-analyzer
19651965 rust-analyzer:
1966− $(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh
1966+ +$(Q)$(CONFIG_SHELL) $(srctree)/scripts/rust_is_available.sh
19671967 $(Q)$(MAKE) $(build)=rust $@
19681968
19691969 # Script to generate missing namespace dependencies
@@ -1980,7 +1980,7 @@ nsdeps: modules · 10 unmodified lines
19801980 quiet_cmd_gen_compile_commands = GEN $@
19811981 cmd_gen_compile_commands = $(PYTHON3) $< -a $(AR) -o $@ $(filter-out $<, $(real-prereqs))
19821982
1983−$(extmod_prefix)compile_commands.json: scripts/clang-tools/gen_compile_commands.py \
1983+$(extmod_prefix)compile_commands.json: $(srctree)/scripts/clang-tools/gen_compile_commands.py \
19841984 $(if $(KBUILD_EXTMOD),, vmlinux.a $(KBUILD_VMLINUX_LIBS)) \
19851985 $(if $(CONFIG_MODULES), $(MODORDER)) FORCE
19861986 $(call if_changed,gen_compile_commands)
arch/alpha/include/asm/io.h+2−2
@@ -534,8 +534,10 @@ extern inline void writeq(u64 b, volatile void __iomem *addr) · 533 unmodified lines
534534
535535 #define ioread16be(p) swab16(ioread16(p))
536536 #define ioread32be(p) swab32(ioread32(p))
537+#define ioread64be(p) swab64(ioread64(p))
537538 #define iowrite16be(v,p) iowrite16(swab16(v), (p))
538539 #define iowrite32be(v,p) iowrite32(swab32(v), (p))
540+#define iowrite64be(v,p) iowrite64(swab64(v), (p))
539541
540542 #define inb_p inb
541543 #define inw_p inw
@@ -634,8 +636,6 @@ extern void outsl (unsigned long port, const void *src, unsigned long count); · 92 unmodified lines
634636 */
635637 #define ioread64 ioread64
636638 #define iowrite64 iowrite64
637−#define ioread64be ioread64be
638−#define iowrite64be iowrite64be
639639 #define ioread8_rep ioread8_rep
640640 #define ioread16_rep ioread16_rep
641641 #define ioread32_rep ioread32_rep
arch/arm/Kconfig+3−1
@@ -87,6 +87,7 @@ config ARM · 86 unmodified lines
8787 select HAVE_ARCH_PFN_VALID
8888 select HAVE_ARCH_SECCOMP
8989 select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
90+ select HAVE_ARCH_STACKLEAK
9091 select HAVE_ARCH_THREAD_STRUCT_WHITELIST
9192 select HAVE_ARCH_TRACEHOOK
9293 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE
@@ -116,6 +117,7 @@ config ARM · 23 unmodified lines
116117 select HAVE_KERNEL_XZ
117118 select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
118119 select HAVE_KRETPROBES if HAVE_KPROBES
120+ select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
119121 select HAVE_MOD_ARCH_SPECIFIC
120122 select HAVE_NMI
121123 select HAVE_OPTPROBES if !THUMB2_KERNEL
@@ -736,7 +738,7 @@ config ARM_ERRATA_764319 · 614 unmodified lines
736738 bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
737739 depends on CPU_V7
738740 help
739− This option enables the workaround for the 764319 Cortex A-9 erratum.
741+ This option enables the workaround for the 764319 Cortex-A9 erratum.
740742 CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an
741743 unexpected Undefined Instruction exception when the DBGSWENABLE
742744 external pin is set to 0, even when the CP14 accesses are performed
arch/arm/boot/compressed/Makefile+1−0
@@ -9,6 +9,7 @@ OBJS = · 8 unmodified lines
99
1010 HEAD = head.o
1111 OBJS += misc.o decompress.o
12+CFLAGS_decompress.o += $(DISABLE_STACKLEAK_PLUGIN)
1213 ifeq ($(CONFIG_DEBUG_UNCOMPRESS),y)
1314 OBJS += debug.o
1415 AFLAGS_head.o += -DDEBUG
arch/arm/boot/compressed/vmlinux.lds.S+1−1
@@ -125,7 +125,7 @@ SECTIONS · 124 unmodified lines
125125
126126 . = BSS_START;
127127 __bss_start = .;
128− .bss : { *(.bss) }
128+ .bss : { *(.bss .bss.*) }
129129 _end = .;
130130
131131 . = ALIGN(8); /* the stack must be 64-bit aligned */
arch/arm/boot/dts/arm/versatile-ab.dts+1−1
@@ -157,7 +157,7 @@ · 156 unmodified lines
157157 clocks = <&xtal24mhz>;
158158 };
159159
160− pclk: clock-24000000 {
160+ pclk: clock-pclk {
161161 #clock-cells = <0>;
162162 compatible = "fixed-factor-clock";
163163 clock-div = <1>;
arch/arm/boot/dts/nxp/imx/imx6dl-yapp43-common.dtsi+6−6
@@ -274,24 +274,24 @@ · 273 unmodified lines
274274
275275 led@0 {
276276 chan-name = "R";
277− led-cur = /bits/ 8 <0x20>;
278− max-cur = /bits/ 8 <0x60>;
277+ led-cur = /bits/ 8 <0x6e>;
278+ max-cur = /bits/ 8 <0xc8>;
279279 reg = <0>;
280280 color = <LED_COLOR_ID_RED>;
281281 };
282282
283283 led@1 {
284284 chan-name = "G";
285− led-cur = /bits/ 8 <0x20>;
286− max-cur = /bits/ 8 <0x60>;
285+ led-cur = /bits/ 8 <0xbe>;
286+ max-cur = /bits/ 8 <0xc8>;
287287 reg = <1>;
288288 color = <LED_COLOR_ID_GREEN>;
289289 };
290290
291291 led@2 {
292292 chan-name = "B";
293− led-cur = /bits/ 8 <0x20>;
294− max-cur = /bits/ 8 <0x60>;
293+ led-cur = /bits/ 8 <0xbe>;
294+ max-cur = /bits/ 8 <0xc8>;
295295 reg = <2>;
296296 color = <LED_COLOR_ID_BLUE>;
297297 };
arch/arm/boot/dts/ti/omap/omap3-n900.dts+1−1
@@ -781,7 +781,7 @@ · 780 unmodified lines
781781
782782 mount-matrix = "-1", "0", "0",
783783 "0", "1", "0",
784− "0", "0", "1";
784+ "0", "0", "-1";
785785 };
786786
787787 cam1: camera@3e {
arch/arm/include/asm/stacktrace.h+7−0
@@ -26,6 +26,13 @@ struct stackframe { · 25 unmodified lines
2626 #endif
2727 };
2828
29+static inline bool on_thread_stack(void)
30+{
31+ unsigned long delta = current_stack_pointer ^ (unsigned long)current->stack;
32+
33+ return delta < THREAD_SIZE;
34+}
35+
2936 static __always_inline
3037 void arm_get_current_stackframe(struct pt_regs *regs, struct stackframe *frame)
3138 {
arch/arm/include/asm/vmlinux.lds.h+1−1
@@ -42,7 +42,7 @@ · 41 unmodified lines
4242 #define PROC_INFO \
4343 . = ALIGN(4); \
4444 __proc_info_begin = .; \
45− *(.proc.info.init) \
45+ KEEP(*(.proc.info.init)) \
4646 __proc_info_end = .;
4747
4848 #define IDMAP_TEXT \
arch/arm/kernel/entry-armv.S+3−0
@@ -1065,6 +1065,7 @@ vector_addrexcptn: · 1064 unmodified lines
10651065 .globl vector_fiq
10661066
10671067 .section .vectors, "ax", %progbits
1068+ .reloc .text, R_ARM_NONE, .
10681069 W(b) vector_rst
10691070 W(b) vector_und
10701071 ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi )
@@ -1078,6 +1079,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_swi ) · 7 unmodified lines
10781079
10791080 #ifdef CONFIG_HARDEN_BRANCH_HISTORY
10801081 .section .vectors.bhb.loop8, "ax", %progbits
1082+ .reloc .text, R_ARM_NONE, .
10811083 W(b) vector_rst
10821084 W(b) vector_bhb_loop8_und
10831085 ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi )
@@ -1090,6 +1092,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_loop8_swi ) · 6 unmodified lines
10901092 W(b) vector_bhb_loop8_fiq
10911093
10921094 .section .vectors.bhb.bpiall, "ax", %progbits
1095+ .reloc .text, R_ARM_NONE, .
10931096 W(b) vector_rst
10941097 W(b) vector_bhb_bpiall_und
10951098 ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi )
arch/arm/kernel/entry-common.S+3−0
@@ -119,6 +119,9 @@ no_work_pending: · 118 unmodified lines
119119
120120 ct_user_enter save = 0
121121
122+#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
123+ bl stackleak_erase_on_task_stack
124+#endif
122125 restore_user_regs fast = 0, offset = 0
123126 ENDPROC(ret_to_user_from_irq)
124127 ENDPROC(ret_to_user)
arch/arm/kernel/module.c+0−5
@@ -395,11 +395,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, · 394 unmodified lines
395395 return 0;
396396 }
397397
398−struct mod_unwind_map {
399− const Elf_Shdr *unw_sec;
400− const Elf_Shdr *txt_sec;
401−};
402−
403398 static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
404399 const Elf_Shdr *sechdrs, const char *name)
405400 {
arch/arm/kernel/perf_callchain.c+1−2
@@ -85,8 +85,7 @@ static bool · 84 unmodified lines
8585 callchain_trace(void *data, unsigned long pc)
8686 {
8787 struct perf_callchain_entry_ctx *entry = data;
88− perf_callchain_store(entry, pc);
89− return true;
88+ return perf_callchain_store(entry, pc) == 0;
9089 }
9190
9291 void
arch/arm/kernel/vmlinux-xip.lds.S+2−2
@@ -63,7 +63,7 @@ SECTIONS · 62 unmodified lines
6363 . = ALIGN(4);
6464 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
6565 __start___ex_table = .;
66− ARM_MMU_KEEP(*(__ex_table))
66+ ARM_MMU_KEEP(KEEP(*(__ex_table)))
6767 __stop___ex_table = .;
6868 }
6969
@@ -83,7 +83,7 @@ SECTIONS · 13 unmodified lines
8383 }
8484 .init.arch.info : {
8585 __arch_info_begin = .;
86− *(.arch.info.init)
86+ KEEP(*(.arch.info.init))
8787 __arch_info_end = .;
8888 }
8989 .init.tagtable : {
arch/arm/kernel/vmlinux.lds.S+3−3
@@ -74,7 +74,7 @@ SECTIONS · 73 unmodified lines
7474 . = ALIGN(4);
7575 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
7676 __start___ex_table = .;
77− ARM_MMU_KEEP(*(__ex_table))
77+ ARM_MMU_KEEP(KEEP(*(__ex_table)))
7878 __stop___ex_table = .;
7979 }
8080
@@ -99,7 +99,7 @@ SECTIONS · 18 unmodified lines
9999 }
100100 .init.arch.info : {
101101 __arch_info_begin = .;
102− *(.arch.info.init)
102+ KEEP(*(.arch.info.init))
103103 __arch_info_end = .;
104104 }
105105 .init.tagtable : {
@@ -116,7 +116,7 @@ SECTIONS · 10 unmodified lines
116116 #endif
117117 .init.pv_table : {
118118 __pv_table_begin = .;
119− *(.pv_table)
119+ KEEP(*(.pv_table))
120120 __pv_table_end = .;
121121 }
122122
arch/arm/mach-alpine/alpine_cpu_pm.c+1−1
@@ -29,7 +29,7 @@ int alpine_cpu_wakeup(unsigned int phys_cpu, uint32_t phys_resume_addr) · 28 unmodified lines
2929 /*
3030 * Set CPU resume address -
3131 * secure firmware running on boot will jump to this address
32− * after setting proper CPU mode, and initialiing e.g. secure
32+ * after setting proper CPU mode, and initializing e.g. secure
3333 * regs (the same mode all CPUs are booted to - usually HYP)
3434 */
3535 writel(phys_resume_addr,
arch/arm/mach-pxa/gumstix.c+7−4
@@ -21,6 +21,7 @@ · 20 unmodified lines
2121 #include <linux/mtd/mtd.h>
2222 #include <linux/mtd/partitions.h>
2323 #include <linux/gpio/machine.h>
24+#include <linux/gpio/property.h>
2425 #include <linux/gpio.h>
2526 #include <linux/err.h>
2627 #include <linux/clk.h>
@@ -40,6 +41,7 @@ · 13 unmodified lines
4041 #include <linux/platform_data/mmc-pxamci.h>
4142 #include "udc.h"
4243 #include "gumstix.h"
44+#include "devices.h"
4345
4446 #include "generic.h"
4547
@@ -99,8 +101,8 @@ static void __init gumstix_mmc_init(void) · 53 unmodified lines
99101 }
100102 #endif
101103
102−#ifdef CONFIG_USB_PXA25X
103−static const struct property_entry spitz_mci_props[] __initconst = {
104+#if IS_ENABLED(CONFIG_USB_PXA25X)
105+static const struct property_entry gumstix_vbus_props[] __initconst = {
104106 PROPERTY_ENTRY_GPIO("vbus-gpios", &pxa2xx_gpiochip_node,
105107 GPIO_GUMSTIX_USB_GPIOn, GPIO_ACTIVE_HIGH),
106108 PROPERTY_ENTRY_GPIO("pullup-gpios", &pxa2xx_gpiochip_node,
@@ -109,8 +111,9 @@ static const struct property_entry spitz_mci_props[] __initconst = { · 2 unmodified lines
109111 };
110112
111113 static const struct platform_device_info gumstix_gpio_vbus_info __initconst = {
112− .name = "gpio-vbus",
113− .id = PLATFORM_DEVID_NONE,
114+ .name = "gpio-vbus",
115+ .id = PLATFORM_DEVID_NONE,
116+ .properties = gumstix_vbus_props,
114117 };
115118
116119 static void __init gumstix_udc_init(void)
arch/arm/mach-rpc/ecard.c+1−1
@@ -1109,7 +1109,7 @@ void ecard_remove_driver(struct ecard_driver *drv) · 1108 unmodified lines
11091109 driver_unregister(&drv->drv);
11101110 }
11111111
1112−static int ecard_match(struct device *_dev, struct device_driver *_drv)
1112+static int ecard_match(struct device *_dev, const struct device_driver *_drv)
11131113 {
11141114 struct expansion_card *ec = ECARD_DEV(_dev);
11151115 struct ecard_driver *drv = ECARD_DRV(_drv);
arch/arm/mm/proc.c+10−10
@@ -17,7 +17,7 @@ void cpu_arm7tdmi_proc_init(void); · 16 unmodified lines
1717 __ADDRESSABLE(cpu_arm7tdmi_proc_init);
1818 void cpu_arm7tdmi_proc_fin(void);
1919 __ADDRESSABLE(cpu_arm7tdmi_proc_fin);
20−void cpu_arm7tdmi_reset(void);
20+void cpu_arm7tdmi_reset(unsigned long addr, bool hvc);
2121 __ADDRESSABLE(cpu_arm7tdmi_reset);
2222 int cpu_arm7tdmi_do_idle(void);
2323 __ADDRESSABLE(cpu_arm7tdmi_do_idle);
@@ -32,7 +32,7 @@ void cpu_arm720_proc_init(void); · 8 unmodified lines
3232 __ADDRESSABLE(cpu_arm720_proc_init);
3333 void cpu_arm720_proc_fin(void);
3434 __ADDRESSABLE(cpu_arm720_proc_fin);
35−void cpu_arm720_reset(void);
35+void cpu_arm720_reset(unsigned long addr, bool hvc);
3636 __ADDRESSABLE(cpu_arm720_reset);
3737 int cpu_arm720_do_idle(void);
3838 __ADDRESSABLE(cpu_arm720_do_idle);
@@ -49,7 +49,7 @@ void cpu_arm740_proc_init(void); · 10 unmodified lines
4949 __ADDRESSABLE(cpu_arm740_proc_init);
5050 void cpu_arm740_proc_fin(void);
5151 __ADDRESSABLE(cpu_arm740_proc_fin);
52−void cpu_arm740_reset(void);
52+void cpu_arm740_reset(unsigned long addr, bool hvc);
5353 __ADDRESSABLE(cpu_arm740_reset);
5454 int cpu_arm740_do_idle(void);
5555 __ADDRESSABLE(cpu_arm740_do_idle);
@@ -64,7 +64,7 @@ void cpu_arm9tdmi_proc_init(void); · 8 unmodified lines
6464 __ADDRESSABLE(cpu_arm9tdmi_proc_init);
6565 void cpu_arm9tdmi_proc_fin(void);
6666 __ADDRESSABLE(cpu_arm9tdmi_proc_fin);
67−void cpu_arm9tdmi_reset(void);
67+void cpu_arm9tdmi_reset(unsigned long addr, bool hvc);
6868 __ADDRESSABLE(cpu_arm9tdmi_reset);
6969 int cpu_arm9tdmi_do_idle(void);
7070 __ADDRESSABLE(cpu_arm9tdmi_do_idle);
@@ -79,7 +79,7 @@ void cpu_arm920_proc_init(void); · 8 unmodified lines
7979 __ADDRESSABLE(cpu_arm920_proc_init);
8080 void cpu_arm920_proc_fin(void);
8181 __ADDRESSABLE(cpu_arm920_proc_fin);
82−void cpu_arm920_reset(void);
82+void cpu_arm920_reset(unsigned long addr, bool hvc);
8383 __ADDRESSABLE(cpu_arm920_reset);
8484 int cpu_arm920_do_idle(void);
8585 __ADDRESSABLE(cpu_arm920_do_idle);
@@ -102,7 +102,7 @@ void cpu_arm922_proc_init(void); · 16 unmodified lines
102102 __ADDRESSABLE(cpu_arm922_proc_init);
103103 void cpu_arm922_proc_fin(void);
104104 __ADDRESSABLE(cpu_arm922_proc_fin);
105−void cpu_arm922_reset(void);
105+void cpu_arm922_reset(unsigned long addr, bool hvc);
106106 __ADDRESSABLE(cpu_arm922_reset);
107107 int cpu_arm922_do_idle(void);
108108 __ADDRESSABLE(cpu_arm922_do_idle);
@@ -119,7 +119,7 @@ void cpu_arm925_proc_init(void); · 10 unmodified lines
119119 __ADDRESSABLE(cpu_arm925_proc_init);
120120 void cpu_arm925_proc_fin(void);
121121 __ADDRESSABLE(cpu_arm925_proc_fin);
122−void cpu_arm925_reset(void);
122+void cpu_arm925_reset(unsigned long addr, bool hvc);
123123 __ADDRESSABLE(cpu_arm925_reset);
124124 int cpu_arm925_do_idle(void);
125125 __ADDRESSABLE(cpu_arm925_do_idle);
@@ -159,7 +159,7 @@ void cpu_arm940_proc_init(void); · 33 unmodified lines
159159 __ADDRESSABLE(cpu_arm940_proc_init);
160160 void cpu_arm940_proc_fin(void);
161161 __ADDRESSABLE(cpu_arm940_proc_fin);
162−void cpu_arm940_reset(void);
162+void cpu_arm940_reset(unsigned long addr, bool hvc);
163163 __ADDRESSABLE(cpu_arm940_reset);
164164 int cpu_arm940_do_idle(void);
165165 __ADDRESSABLE(cpu_arm940_do_idle);
@@ -174,7 +174,7 @@ void cpu_arm946_proc_init(void); · 8 unmodified lines
174174 __ADDRESSABLE(cpu_arm946_proc_init);
175175 void cpu_arm946_proc_fin(void);
176176 __ADDRESSABLE(cpu_arm946_proc_fin);
177−void cpu_arm946_reset(void);
177+void cpu_arm946_reset(unsigned long addr, bool hvc);
178178 __ADDRESSABLE(cpu_arm946_reset);
179179 int cpu_arm946_do_idle(void);
180180 __ADDRESSABLE(cpu_arm946_do_idle);
@@ -429,7 +429,7 @@ void cpu_v7_proc_init(void); · 248 unmodified lines
429429 __ADDRESSABLE(cpu_v7_proc_init);
430430 void cpu_v7_proc_fin(void);
431431 __ADDRESSABLE(cpu_v7_proc_fin);
432−void cpu_v7_reset(void);
432+void cpu_v7_reset(unsigned long addr, bool hvc);
433433 __ADDRESSABLE(cpu_v7_reset);
434434 int cpu_v7_do_idle(void);
435435 __ADDRESSABLE(cpu_v7_do_idle);
arch/arm64/Kconfig+16−6
@@ -1069,18 +1069,28 @@ config ARM64_ERRATUM_3117295 · 1068 unmodified lines
10691069 If unsure, say Y.
10701070
10711071 config ARM64_ERRATUM_3194386
1072− bool "Cortex-{A720,X4,X925}/Neoverse-V3: workaround for MSR SSBS not self-synchronizing"
1072+ bool "Cortex-*/Neoverse-*: workaround for MSR SSBS not self-synchronizing"
10731073 default y
10741074 help
10751075 This option adds the workaround for the following errata:
10761076
1077+ * ARM Cortex-A76 erratum 3324349
1078+ * ARM Cortex-A77 erratum 3324348
1079+ * ARM Cortex-A78 erratum 3324344
1080+ * ARM Cortex-A78C erratum 3324346
1081+ * ARM Cortex-A78C erratum 3324347
10771082 * ARM Cortex-A710 erratam 3324338
10781083 * ARM Cortex-A720 erratum 3456091
1084+ * ARM Cortex-A725 erratum 3456106
1085+ * ARM Cortex-X1 erratum 3324344
1086+ * ARM Cortex-X1C erratum 3324346
10791087 * ARM Cortex-X2 erratum 3324338
10801088 * ARM Cortex-X3 erratum 3324335
10811089 * ARM Cortex-X4 erratum 3194386
10821090 * ARM Cortex-X925 erratum 3324334
1091+ * ARM Neoverse-N1 erratum 3324349
10831092 * ARM Neoverse N2 erratum 3324339
1093+ * ARM Neoverse-V1 erratum 3324341
10841094 * ARM Neoverse V2 erratum 3324336
10851095 * ARM Neoverse-V3 erratum 3312417
10861096
@@ -1088,11 +1098,11 @@ config ARM64_ERRATUM_3194386 · 1 unmodified line
10881098 subsequent speculative instructions, which may permit unexepected
10891099 speculative store bypassing.
10901100
1091− Work around this problem by placing a speculation barrier after
1092− kernel changes to SSBS. The presence of the SSBS special-purpose
1093− register is hidden from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such
1094− that userspace will use the PR_SPEC_STORE_BYPASS prctl to change
1095− SSBS.
1101+ Work around this problem by placing a Speculation Barrier (SB) or
1102+ Instruction Synchronization Barrier (ISB) after kernel changes to
1103+ SSBS. The presence of the SSBS special-purpose register is hidden
1104+ from hwcaps and EL0 reads of ID_AA64PFR1_EL1, such that userspace
1105+ will use the PR_SPEC_STORE_BYPASS prctl to change SSBS.
10961106
10971107 If unsure, say Y.
10981108
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi+1−1
@@ -175,7 +175,7 @@ · 174 unmodified lines
175175 };
176176 };
177177
178− core-cluster-thermal {
178+ cluster-thermal {
179179 polling-delay-passive = <1000>;
180180 polling-delay = <5000>;
181181 thermal-sensors = <&tmu 1>;
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi+1−1
@@ -214,7 +214,7 @@ · 213 unmodified lines
214214 };
215215 };
216216
217− core-cluster-thermal {
217+ cluster-thermal {
218218 polling-delay-passive = <1000>;
219219 polling-delay = <5000>;
220220 thermal-sensors = <&tmu 3>;
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi+1−1
@@ -182,7 +182,7 @@ · 181 unmodified lines
182182 };
183183 };
184184
185− core-cluster-thermal {
185+ cluster-thermal {
186186 polling-delay-passive = <1000>;
187187 polling-delay = <5000>;
188188 thermal-sensors = <&tmu 3>;
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi+1−1
@@ -131,7 +131,7 @@ · 130 unmodified lines
131131 };
132132
133133 thermal-zones {
134− core-cluster-thermal {
134+ cluster-thermal {
135135 polling-delay-passive = <1000>;
136136 polling-delay = <5000>;
137137 thermal-sensors = <&tmu 0>;
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi+4−4
@@ -122,7 +122,7 @@ · 121 unmodified lines
122122 };
123123 };
124124
125− core-cluster1-thermal {
125+ cluster1-thermal {
126126 polling-delay-passive = <1000>;
127127 polling-delay = <5000>;
128128 thermal-sensors = <&tmu 4>;
@@ -151,7 +151,7 @@ · 22 unmodified lines
151151 };
152152 };
153153
154− core-cluster2-thermal {
154+ cluster2-thermal {
155155 polling-delay-passive = <1000>;
156156 polling-delay = <5000>;
157157 thermal-sensors = <&tmu 5>;
@@ -180,7 +180,7 @@ · 22 unmodified lines
180180 };
181181 };
182182
183− core-cluster3-thermal {
183+ cluster3-thermal {
184184 polling-delay-passive = <1000>;
185185 polling-delay = <5000>;
186186 thermal-sensors = <&tmu 6>;
@@ -209,7 +209,7 @@ · 22 unmodified lines
209209 };
210210 };
211211
212− core-cluster4-thermal {
212+ cluster4-thermal {
213213 polling-delay-passive = <1000>;
214214 polling-delay = <5000>;
215215 thermal-sensors = <&tmu 7>;
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi+1−1
@@ -492,7 +492,7 @@ · 491 unmodified lines
492492 };
493493 };
494494
495− ddr-cluster5-thermal {
495+ ddr-ctrl5-thermal {
496496 polling-delay-passive = <1000>;
497497 polling-delay = <5000>;
498498 thermal-sensors = <&tmu 1>;
arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rs232.dtso+1−1
@@ -21,7 +21,7 @@ · 20 unmodified lines
2121
2222 &gpio3 {
2323 pinctrl-names = "default";
24− pinctrcl-0 = <&pinctrl_gpio3_hog>;
24+ pinctrl-0 = <&pinctrl_gpio3_hog>;
2525
2626 uart4_rs485_en {
2727 gpio-hog;
arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l-rs232-rs485.dtso+1−1
@@ -22,7 +22,7 @@ · 21 unmodified lines
2222
2323 &gpio3 {
2424 pinctrl-names = "default";
25− pinctrcl-0 = <&pinctrl_gpio3_hog>;
25+ pinctrl-0 = <&pinctrl_gpio3_hog>;
2626
2727 uart4_rs485_en {
2828 gpio-hog;
arch/arm64/boot/dts/freescale/imx8mp-beacon-kit.dts+5−7
@@ -211,13 +211,12 @@ · 210 unmodified lines
211211
212212 simple-audio-card,cpu {
213213 sound-dai = <&sai3>;
214+ frame-master;
215+ bitclock-master;
214216 };
215217
216218 simple-audio-card,codec {
217219 sound-dai = <&wm8962>;
218− clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
219− frame-master;
220− bitclock-master;
221220 };
222221 };
223222 };
@@ -507,10 +506,9 @@ · 283 unmodified lines
507506 &sai3 {
508507 pinctrl-names = "default";
509508 pinctrl-0 = <&pinctrl_sai3>;
510− assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
511− <&clk IMX8MP_AUDIO_PLL2> ;
512− assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
513− assigned-clock-rates = <12288000>, <361267200>;
509+ assigned-clocks = <&clk IMX8MP_CLK_SAI3>;
510+ assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
511+ assigned-clock-rates = <12288000>;
514512 fsl,sai-mclk-direction-output;
515513 status = "okay";
516514 };
arch/arm64/boot/dts/freescale/imx93-tqma9352-mba93xxla.dts+1−1
@@ -499,7 +499,7 @@ · 498 unmodified lines
499499 pinctrl-0 = <&pinctrl_usdhc2_hs>, <&pinctrl_usdhc2_gpio>;
500500 pinctrl-1 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>;
501501 pinctrl-2 = <&pinctrl_usdhc2_uhs>, <&pinctrl_usdhc2_gpio>;
502− cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
502+ cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
503503 vmmc-supply = <&reg_usdhc2_vmmc>;
504504 bus-width = <4>;
505505 no-sdio;
arch/arm64/boot/dts/freescale/imx93-tqma9352.dtsi+2−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
1919 linux,cma {
2020 compatible = "shared-dma-pool";
2121 reusable;
22− alloc-ranges = <0 0x60000000 0 0x40000000>;
22+ alloc-ranges = <0 0x80000000 0 0x40000000>;
2323 size = <0 0x10000000>;
2424 linux,cma-default;
2525 };
@@ -156,6 +156,7 @@ · 130 unmodified lines
156156 &wdog3 {
157157 pinctrl-names = "default";
158158 pinctrl-0 = <&pinctrl_wdog>;
159+ fsl,ext-reset-output;
159160 status = "okay";
160161 };
161162
arch/arm64/boot/dts/freescale/imx93.dtsi+1−1
@@ -1105,7 +1105,7 @@ · 1104 unmodified lines
11051105 <&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>;
11061106 assigned-clock-rates = <100000000>, <250000000>;
11071107 intf_mode = <&wakeupmix_gpr 0x28>;
1108− snps,clk-csr = <0>;
1108+ snps,clk-csr = <6>;
11091109 nvmem-cells = <&eth_mac2>;
11101110 nvmem-cell-names = "mac-address";
11111111 status = "disabled";
arch/arm64/boot/dts/freescale/imx95.dtsi+7−7
@@ -27,7 +27,7 @@ · 26 unmodified lines
2727 reg = <0x0>;
2828 enable-method = "psci";
2929 #cooling-cells = <2>;
30− power-domains = <&scmi_devpd IMX95_PERF_A55>;
30+ power-domains = <&scmi_perf IMX95_PERF_A55>;
3131 power-domain-names = "perf";
3232 i-cache-size = <32768>;
3333 i-cache-line-size = <64>;
@@ -44,7 +44,7 @@ · 10 unmodified lines
4444 reg = <0x100>;
4545 enable-method = "psci";
4646 #cooling-cells = <2>;
47− power-domains = <&scmi_devpd IMX95_PERF_A55>;
47+ power-domains = <&scmi_perf IMX95_PERF_A55>;
4848 power-domain-names = "perf";
4949 i-cache-size = <32768>;
5050 i-cache-line-size = <64>;
@@ -61,7 +61,7 @@ · 10 unmodified lines
6161 reg = <0x200>;
6262 enable-method = "psci";
6363 #cooling-cells = <2>;
64− power-domains = <&scmi_devpd IMX95_PERF_A55>;
64+ power-domains = <&scmi_perf IMX95_PERF_A55>;
6565 power-domain-names = "perf";
6666 i-cache-size = <32768>;
6767 i-cache-line-size = <64>;
@@ -78,7 +78,7 @@ · 10 unmodified lines
7878 reg = <0x300>;
7979 enable-method = "psci";
8080 #cooling-cells = <2>;
81− power-domains = <&scmi_devpd IMX95_PERF_A55>;
81+ power-domains = <&scmi_perf IMX95_PERF_A55>;
8282 power-domain-names = "perf";
8383 i-cache-size = <32768>;
8484 i-cache-line-size = <64>;
@@ -93,7 +93,7 @@ · 8 unmodified lines
9393 device_type = "cpu";
9494 compatible = "arm,cortex-a55";
9595 reg = <0x400>;
96− power-domains = <&scmi_devpd IMX95_PERF_A55>;
96+ power-domains = <&scmi_perf IMX95_PERF_A55>;
9797 power-domain-names = "perf";
9898 enable-method = "psci";
9999 #cooling-cells = <2>;
@@ -110,7 +110,7 @@ · 10 unmodified lines
110110 device_type = "cpu";
111111 compatible = "arm,cortex-a55";
112112 reg = <0x500>;
113− power-domains = <&scmi_devpd IMX95_PERF_A55>;
113+ power-domains = <&scmi_perf IMX95_PERF_A55>;
114114 power-domain-names = "perf";
115115 enable-method = "psci";
116116 #cooling-cells = <2>;
@@ -187,7 +187,7 @@ · 70 unmodified lines
187187 compatible = "cache";
188188 cache-size = <524288>;
189189 cache-line-size = <64>;
190− cache-sets = <1024>;
190+ cache-sets = <512>;
191191 cache-level = <3>;
192192 cache-unified;
193193 };
arch/arm64/boot/dts/qcom/ipq5332.dtsi+2−2
@@ -320,8 +320,8 @@ · 319 unmodified lines
320320 reg = <0x08af8800 0x400>;
321321
322322 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
323− <GIC_SPI 53 IRQ_TYPE_EDGE_BOTH>,
324− <GIC_SPI 52 IRQ_TYPE_EDGE_BOTH>;
323+ <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
324+ <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
325325 interrupt-names = "pwr_event",
326326 "dp_hs_phy_irq",
327327 "dm_hs_phy_irq";
arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts+39−3
@@ -278,6 +278,13 @@ · 277 unmodified lines
278278 vdd-l3-supply = <&vreg_s1f_0p7>;
279279 vdd-s1-supply = <&vph_pwr>;
280280 vdd-s2-supply = <&vph_pwr>;
281+
282+ vreg_l3i_0p8: ldo3 {
283+ regulator-name = "vreg_l3i_0p8";
284+ regulator-min-microvolt = <880000>;
285+ regulator-max-microvolt = <920000>;
286+ regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
287+ };
281288 };
282289
283290 regulators-7 {
@@ -423,11 +430,17 @@ · 139 unmodified lines
423430 };
424431
425432 &pcie4 {
433+ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
434+ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
435+
436+ pinctrl-0 = <&pcie4_default>;
437+ pinctrl-names = "default";
438+
426439 status = "okay";
427440 };
428441
429442 &pcie4_phy {
430− vdda-phy-supply = <&vreg_l3j_0p8>;
443+ vdda-phy-supply = <&vreg_l3i_0p8>;
431444 vdda-pll-supply = <&vreg_l3e_1p2>;
432445
433446 status = "okay";
@@ -517,7 +530,30 @@ · 83 unmodified lines
517530 bias-disable;
518531 };
519532
520− pcie6a_default: pcie2a-default-state {
533+ pcie4_default: pcie4-default-state {
534+ clkreq-n-pins {
535+ pins = "gpio147";
536+ function = "pcie4_clk";
537+ drive-strength = <2>;
538+ bias-pull-up;
539+ };
540+
541+ perst-n-pins {
542+ pins = "gpio146";
543+ function = "gpio";
544+ drive-strength = <2>;
545+ bias-disable;
546+ };
547+
548+ wake-n-pins {
549+ pins = "gpio148";
550+ function = "gpio";
551+ drive-strength = <2>;
552+ bias-pull-up;
553+ };
554+ };
555+
556+ pcie6a_default: pcie6a-default-state {
521557 clkreq-n-pins {
522558 pins = "gpio153";
523559 function = "pcie6a_clk";
@@ -529,7 +565,7 @@ · 5 unmodified lines
529565 pins = "gpio152";
530566 function = "gpio";
531567 drive-strength = <2>;
532− bias-pull-down;
568+ bias-disable;
533569 };
534570
535571 wake-n-pins {
arch/arm64/boot/dts/qcom/x1e80100-crd.dts+60−10
@@ -268,7 +268,6 @@ · 267 unmodified lines
268268 pinctrl-0 = <&edp_reg_en>;
269269 pinctrl-names = "default";
270270
271− regulator-always-on;
272271 regulator-boot-on;
273272 };
274273
@@ -637,6 +636,14 @@ · 362 unmodified lines
637636 };
638637 };
639638
639+&gpu {
640+ status = "okay";
641+
642+ zap-shader {
643+ firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
644+ };
645+};
646+
640647 &i2c0 {
641648 clock-frequency = <400000>;
642649
@@ -724,9 +731,13 @@ · 81 unmodified lines
724731
725732 aux-bus {
726733 panel {
727− compatible = "edp-panel";
734+ compatible = "samsung,atna45af01", "samsung,atna33xc20";
735+ enable-gpios = <&pmc8380_3_gpios 4 GPIO_ACTIVE_HIGH>;
728736 power-supply = <&vreg_edp_3p3>;
729737
738+ pinctrl-0 = <&edp_bl_en>;
739+ pinctrl-names = "default";
740+
730741 port {
731742 edp_panel_in: endpoint {
732743 remote-endpoint = <&mdss_dp3_out>;
@@ -756,11 +767,17 @@ · 23 unmodified lines
756767 };
757768
758769 &pcie4 {
770+ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
771+ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
772+
773+ pinctrl-0 = <&pcie4_default>;
774+ pinctrl-names = "default";
775+
759776 status = "okay";
760777 };
761778
762779 &pcie4_phy {
763− vdda-phy-supply = <&vreg_l3j_0p8>;
780+ vdda-phy-supply = <&vreg_l3i_0p8>;
764781 vdda-pll-supply = <&vreg_l3e_1p2>;
765782
766783 status = "okay";
@@ -785,6 +802,16 @@ · 18 unmodified lines
785802 status = "okay";
786803 };
787804
805+&pmc8380_3_gpios {
806+ edp_bl_en: edp-bl-en-state {
807+ pins = "gpio4";
808+ function = "normal";
809+ power-source = <1>; /* 1.8V */
810+ input-disable;
811+ output-enable;
812+ };
813+};
814+
788815 &qupv3_0 {
789816 status = "okay";
790817 };
@@ -931,7 +958,30 @@ · 140 unmodified lines
931958 bias-disable;
932959 };
933960
934− pcie6a_default: pcie2a-default-state {
961+ pcie4_default: pcie4-default-state {
962+ clkreq-n-pins {
963+ pins = "gpio147";
964+ function = "pcie4_clk";
965+ drive-strength = <2>;
966+ bias-pull-up;
967+ };
968+
969+ perst-n-pins {
970+ pins = "gpio146";
971+ function = "gpio";
972+ drive-strength = <2>;
973+ bias-disable;
974+ };
975+
976+ wake-n-pins {
977+ pins = "gpio148";
978+ function = "gpio";
979+ drive-strength = <2>;
980+ bias-pull-up;
981+ };
982+ };
983+
984+ pcie6a_default: pcie6a-default-state {
935985 clkreq-n-pins {
936986 pins = "gpio153";
937987 function = "pcie6a_clk";
@@ -943,15 +993,15 @@ · 5 unmodified lines
943993 pins = "gpio152";
944994 function = "gpio";
945995 drive-strength = <2>;
946− bias-pull-down;
996+ bias-disable;
947997 };
948998
949999 wake-n-pins {
950− pins = "gpio154";
951− function = "gpio";
952− drive-strength = <2>;
953− bias-pull-up;
954− };
1000+ pins = "gpio154";
1001+ function = "gpio";
1002+ drive-strength = <2>;
1003+ bias-pull-up;
1004+ };
9551005 };
9561006
9571007 tpad_default: tpad-default-state {
arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts+46−8
@@ -625,16 +625,31 @@ · 624 unmodified lines
625625 };
626626
627627 &pcie4 {
628+ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
629+ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
630+
631+ pinctrl-0 = <&pcie4_default>;
632+ pinctrl-names = "default";
633+
628634 status = "okay";
629635 };
630636
631637 &pcie4_phy {
632− vdda-phy-supply = <&vreg_l3j_0p8>;
638+ vdda-phy-supply = <&vreg_l3i_0p8>;
633639 vdda-pll-supply = <&vreg_l3e_1p2>;
634640
635641 status = "okay";
636642 };
637643
644+&pcie4_port0 {
645+ wifi@0 {
646+ compatible = "pci17cb,1107";
647+ reg = <0x10000 0x0 0x0 0x0 0x0>;
648+
649+ qcom,ath12k-calibration-variant = "LES790";
650+ };
651+};
652+
638653 &pcie6a {
639654 perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>;
640655 wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>;
@@ -782,7 +797,30 @@ · 141 unmodified lines
782797 bias-disable;
783798 };
784799
785− pcie6a_default: pcie2a-default-state {
800+ pcie4_default: pcie4-default-state {
801+ clkreq-n-pins {
802+ pins = "gpio147";
803+ function = "pcie4_clk";
804+ drive-strength = <2>;
805+ bias-pull-up;
806+ };
807+
808+ perst-n-pins {
809+ pins = "gpio146";
810+ function = "gpio";
811+ drive-strength = <2>;
812+ bias-disable;
813+ };
814+
815+ wake-n-pins {
816+ pins = "gpio148";
817+ function = "gpio";
818+ drive-strength = <2>;
819+ bias-pull-up;
820+ };
821+ };
822+
823+ pcie6a_default: pcie6a-default-state {
786824 clkreq-n-pins {
787825 pins = "gpio153";
788826 function = "pcie6a_clk";
@@ -794,15 +832,15 @@ · 5 unmodified lines
794832 pins = "gpio152";
795833 function = "gpio";
796834 drive-strength = <2>;
797− bias-pull-down;
835+ bias-disable;
798836 };
799837
800838 wake-n-pins {
801− pins = "gpio154";
802− function = "gpio";
803− drive-strength = <2>;
804− bias-pull-up;
805− };
839+ pins = "gpio154";
840+ function = "gpio";
841+ drive-strength = <2>;
842+ bias-pull-up;
843+ };
806844 };
807845
808846 tpad_default: tpad-default-state {
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts+45−8
@@ -606,6 +606,14 @@ · 605 unmodified lines
606606 };
607607 };
608608
609+&gpu {
610+ status = "okay";
611+
612+ zap-shader {
613+ firmware-name = "qcom/x1e80100/gen70500_zap.mbn";
614+ };
615+};
616+
609617 &lpass_tlmm {
610618 spkr_01_sd_n_active: spkr-01-sd-n-active-state {
611619 pins = "gpio12";
@@ -660,11 +668,17 @@ · 48 unmodified lines
660668 };
661669
662670 &pcie4 {
671+ perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>;
672+ wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>;
673+
674+ pinctrl-0 = <&pcie4_default>;
675+ pinctrl-names = "default";
676+
663677 status = "okay";
664678 };
665679
666680 &pcie4_phy {
667− vdda-phy-supply = <&vreg_l3j_0p8>;
681+ vdda-phy-supply = <&vreg_l3i_0p8>;
668682 vdda-pll-supply = <&vreg_l3e_1p2>;
669683
670684 status = "okay";
@@ -804,7 +818,30 @@ · 133 unmodified lines
804818 bias-disable;
805819 };
806820
807− pcie6a_default: pcie2a-default-state {
821+ pcie4_default: pcie4-default-state {
822+ clkreq-n-pins {
823+ pins = "gpio147";
824+ function = "pcie4_clk";
825+ drive-strength = <2>;
826+ bias-pull-up;
827+ };
828+
829+ perst-n-pins {
830+ pins = "gpio146";
831+ function = "gpio";
832+ drive-strength = <2>;
833+ bias-disable;
834+ };
835+
836+ wake-n-pins {
837+ pins = "gpio148";
838+ function = "gpio";
839+ drive-strength = <2>;
840+ bias-pull-up;
841+ };
842+ };
843+
844+ pcie6a_default: pcie6a-default-state {
808845 clkreq-n-pins {
809846 pins = "gpio153";
810847 function = "pcie6a_clk";
@@ -816,15 +853,15 @@ · 5 unmodified lines
816853 pins = "gpio152";
817854 function = "gpio";
818855 drive-strength = <2>;
819− bias-pull-down;
856+ bias-disable;
820857 };
821858
822859 wake-n-pins {
823− pins = "gpio154";
824− function = "gpio";
825− drive-strength = <2>;
826− bias-pull-up;
827− };
860+ pins = "gpio154";
861+ function = "gpio";
862+ drive-strength = <2>;
863+ bias-pull-up;
864+ };
828865 };
829866
830867 wcd_default: wcd-reset-n-active-state {
arch/arm64/boot/dts/qcom/x1e80100.dtsi+17−4
@@ -2901,7 +2901,7 @@ · 2900 unmodified lines
29012901
29022902 dma-coherent;
29032903
2904− linux,pci-domain = <7>;
2904+ linux,pci-domain = <6>;
29052905 num-lanes = <2>;
29062906
29072907 interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
@@ -2959,6 +2959,7 @@ · 51 unmodified lines
29592959 "link_down";
29602960
29612961 power-domains = <&gcc GCC_PCIE_6A_GDSC>;
2962+ required-opps = <&rpmhpd_opp_nom>;
29622963
29632964 phys = <&pcie6a_phy>;
29642965 phy-names = "pciephy";
@@ -3022,7 +3023,7 @@ · 57 unmodified lines
30223023
30233024 dma-coherent;
30243025
3025− linux,pci-domain = <5>;
3026+ linux,pci-domain = <4>;
30263027 num-lanes = <2>;
30273028
30283029 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
@@ -3080,11 +3081,22 @@ · 51 unmodified lines
30803081 "link_down";
30813082
30823083 power-domains = <&gcc GCC_PCIE_4_GDSC>;
3084+ required-opps = <&rpmhpd_opp_nom>;
30833085
30843086 phys = <&pcie4_phy>;
30853087 phy-names = "pciephy";
30863088
30873089 status = "disabled";
3090+
3091+ pcie4_port0: pcie@0 {
3092+ device_type = "pci";
3093+ reg = <0x0 0x0 0x0 0x0 0x0>;
3094+ bus-range = <0x01 0xff>;
3095+
3096+ #address-cells = <3>;
3097+ #size-cells = <2>;
3098+ ranges;
3099+ };
30883100 };
30893101
30903102 pcie4_phy: phy@1c0e000 {
@@ -3155,9 +3167,10 @@ · 64 unmodified lines
31553167 interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt SLAVE_EBI1 0>;
31563168 interconnect-names = "gfx-mem";
31573169
3170+ status = "disabled";
3171+
31583172 zap-shader {
31593173 memory-region = <&gpu_microcode_mem>;
3160− firmware-name = "qcom/gen70500_zap.mbn";
31613174 };
31623175
31633176 gpu_opp_table: opp-table {
@@ -3288,7 +3301,7 @@ · 124 unmodified lines
32883301 reg = <0x0 0x03da0000 0x0 0x40000>;
32893302 #iommu-cells = <2>;
32903303 #global-interrupts = <1>;
3291− interrupts = <GIC_SPI 673 IRQ_TYPE_LEVEL_HIGH>,
3304+ interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
32923305 <GIC_SPI 678 IRQ_TYPE_LEVEL_HIGH>,
32933306 <GIC_SPI 679 IRQ_TYPE_LEVEL_HIGH>,
32943307 <GIC_SPI 680 IRQ_TYPE_LEVEL_HIGH>,
arch/arm64/boot/dts/ti/k3-am62-verdin-dahlia.dtsi+0−22
@@ -43,15 +43,6 @@ · 42 unmodified lines
4343 sound-dai = <&mcasp0>;
4444 };
4545 };
46−
47− reg_usb_hub: regulator-usb-hub {
48− compatible = "regulator-fixed";
49− enable-active-high;
50− /* Verdin CTRL_SLEEP_MOCI# (SODIMM 256) */
51− gpio = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
52− regulator-boot-on;
53− regulator-name = "HUB_PWR_EN";
54− };
5546 };
5647
5748 /* Verdin ETHs */
@@ -193,11 +184,6 @@ · 135 unmodified lines
193184 status = "okay";
194185 };
195186
196−/* Do not force CTRL_SLEEP_MOCI# always enabled */
197−&reg_force_sleep_moci {
198− status = "disabled";
199−};
200−
201187 /* Verdin SD_1 */
202188 &sdhci1 {
203189 status = "okay";
@@ -218,15 +204,7 @@ · 14 unmodified lines
218204 };
219205
220206 &usb1 {
221− #address-cells = <1>;
222− #size-cells = <0>;
223207 status = "okay";
224−
225− usb-hub@1 {
226− compatible = "usb424,2744";
227− reg = <1>;
228− vdd-supply = <&reg_usb_hub>;
229− };
230208 };
231209
232210 /* Verdin CTRL_WAKE1_MICO# */
arch/arm64/boot/dts/ti/k3-am62-verdin.dtsi+0−6
@@ -138,12 +138,6 @@ · 137 unmodified lines
138138 vin-supply = <&reg_1v8>;
139139 };
140140
141− /*
142− * By default we enable CTRL_SLEEP_MOCI#, this is required to have
143− * peripherals on the carrier board powered.
144− * If more granularity or power saving is required this can be disabled
145− * in the carrier board device tree files.
146− */
147141 reg_force_sleep_moci: regulator-force-sleep-moci {
148142 compatible = "regulator-fixed";
149143 enable-active-high;
arch/arm64/boot/dts/ti/k3-am62p-j722s-common-mcu.dtsi+2−0
@@ -146,6 +146,8 @@ · 145 unmodified lines
146146 power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
147147 clocks = <&k3_clks 79 0>;
148148 clock-names = "gpio";
149+ gpio-ranges = <&mcu_pmx0 0 0 21>, <&mcu_pmx0 21 23 1>,
150+ <&mcu_pmx0 22 32 2>;
149151 };
150152
151153 mcu_rti0: watchdog@4880000 {
arch/arm64/boot/dts/ti/k3-am62p-main.dtsi+2−1
@@ -45,7 +45,8 @@ · 44 unmodified lines
4545 &main_pmx0 {
4646 pinctrl-single,gpio-range =
4747 <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>,
48− <&main_pmx0_range 33 92 PIN_GPIO_RANGE_IOPAD>,
48+ <&main_pmx0_range 33 38 PIN_GPIO_RANGE_IOPAD>,
49+ <&main_pmx0_range 72 22 PIN_GPIO_RANGE_IOPAD>,
4950 <&main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD>,
5051 <&main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD>,
5152 <&main_pmx0_range 149 2 PIN_GPIO_RANGE_IOPAD>;
arch/arm64/boot/dts/ti/k3-j722s-main.dtsi+2−1
@@ -193,7 +193,8 @@ · 192 unmodified lines
193193 &main_pmx0 {
194194 pinctrl-single,gpio-range =
195195 <&main_pmx0_range 0 32 PIN_GPIO_RANGE_IOPAD>,
196− <&main_pmx0_range 33 55 PIN_GPIO_RANGE_IOPAD>,
196+ <&main_pmx0_range 33 38 PIN_GPIO_RANGE_IOPAD>,
197+ <&main_pmx0_range 72 17 PIN_GPIO_RANGE_IOPAD>,
197198 <&main_pmx0_range 101 25 PIN_GPIO_RANGE_IOPAD>,
198199 <&main_pmx0_range 137 5 PIN_GPIO_RANGE_IOPAD>,
199200 <&main_pmx0_range 143 3 PIN_GPIO_RANGE_IOPAD>,
arch/arm64/boot/dts/ti/k3-j784s4-evm.dts+8−17
@@ -1262,6 +1262,14 @@ · 1261 unmodified lines
12621262 &serdes0 {
12631263 status = "okay";
12641264
1265+ serdes0_pcie1_link: phy@0 {
1266+ reg = <0>;
1267+ cdns,num-lanes = <2>;
1268+ #phy-cells = <0>;
1269+ cdns,phy-type = <PHY_TYPE_PCIE>;
1270+ resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>;
1271+ };
1272+
12651273 serdes0_usb_link: phy@3 {
12661274 reg = <3>;
12671275 cdns,num-lanes = <1>;
@@ -1386,23 +1394,6 @@ · 118 unmodified lines
13861394 phys = <&transceiver3>;
13871395 };
13881396
1389−&serdes0 {
1390− status = "okay";
1391−
1392− serdes0_pcie1_link: phy@0 {
1393− reg = <0>;
1394− cdns,num-lanes = <4>;
1395− #phy-cells = <0>;
1396− cdns,phy-type = <PHY_TYPE_PCIE>;
1397− resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>,
1398− <&serdes_wiz0 3>, <&serdes_wiz0 4>;
1399− };
1400−};
1401−
1402−&serdes_wiz0 {
1403− status = "okay";
1404−};
1405−
14061397 &pcie1_rc {
14071398 status = "okay";
14081399 num-lanes = <2>;
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi+2−2
@@ -2755,7 +2755,7 @@ · 2754 unmodified lines
27552755 interrupts = <GIC_SPI 550 IRQ_TYPE_LEVEL_HIGH>,
27562756 <GIC_SPI 551 IRQ_TYPE_LEVEL_HIGH>;
27572757 interrupt-names = "tx", "rx";
2758− dmas = <&main_udmap 0xc500>, <&main_udmap 0x4500>;
2758+ dmas = <&main_udmap 0xc403>, <&main_udmap 0x4403>;
27592759 dma-names = "tx", "rx";
27602760 clocks = <&k3_clks 268 0>;
27612761 clock-names = "fck";
@@ -2773,7 +2773,7 @@ · 11 unmodified lines
27732773 interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>,
27742774 <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
27752775 interrupt-names = "tx", "rx";
2776− dmas = <&main_udmap 0xc501>, <&main_udmap 0x4501>;
2776+ dmas = <&main_udmap 0xc404>, <&main_udmap 0x4404>;
27772777 dma-names = "tx", "rx";
27782778 clocks = <&k3_clks 269 0>;
27792779 clock-names = "fck";
arch/arm64/configs/defconfig+1−0
@@ -887,6 +887,7 @@ CONFIG_DRM_PANEL_KHADAS_TS050=m · 886 unmodified lines
887887 CONFIG_DRM_PANEL_MANTIX_MLAF057WE51=m
888888 CONFIG_DRM_PANEL_NOVATEK_NT36672E=m
889889 CONFIG_DRM_PANEL_RAYDIUM_RM67191=m
890+CONFIG_DRM_PANEL_SAMSUNG_ATNA33XC20=m
890891 CONFIG_DRM_PANEL_SITRONIX_ST7703=m
891892 CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA=m
892893 CONFIG_DRM_PANEL_VISIONOX_VTDR6130=m
arch/arm64/include/asm/cputype.h+4−0
@@ -86,12 +86,14 @@ · 85 unmodified lines
8686 #define ARM_CPU_PART_CORTEX_X2 0xD48
8787 #define ARM_CPU_PART_NEOVERSE_N2 0xD49
8888 #define ARM_CPU_PART_CORTEX_A78C 0xD4B
89+#define ARM_CPU_PART_CORTEX_X1C 0xD4C
8990 #define ARM_CPU_PART_CORTEX_X3 0xD4E
9091 #define ARM_CPU_PART_NEOVERSE_V2 0xD4F
9192 #define ARM_CPU_PART_CORTEX_A720 0xD81
9293 #define ARM_CPU_PART_CORTEX_X4 0xD82
9394 #define ARM_CPU_PART_NEOVERSE_V3 0xD84
9495 #define ARM_CPU_PART_CORTEX_X925 0xD85
96+#define ARM_CPU_PART_CORTEX_A725 0xD87
9597
9698 #define APM_CPU_PART_XGENE 0x000
9799 #define APM_CPU_VAR_POTENZA 0x00
@@ -165,12 +167,14 @@ · 67 unmodified lines
165167 #define MIDR_CORTEX_X2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X2)
166168 #define MIDR_NEOVERSE_N2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N2)
167169 #define MIDR_CORTEX_A78C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A78C)
170+#define MIDR_CORTEX_X1C MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X1C)
168171 #define MIDR_CORTEX_X3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X3)
169172 #define MIDR_NEOVERSE_V2 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V2)
170173 #define MIDR_CORTEX_A720 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A720)
171174 #define MIDR_CORTEX_X4 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X4)
172175 #define MIDR_NEOVERSE_V3 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_V3)
173176 #define MIDR_CORTEX_X925 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_X925)
177+#define MIDR_CORTEX_A725 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A725)
174178 #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX)
175179 #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
176180 #define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
arch/arm64/include/asm/jump_label.h+1−0
@@ -13,6 +13,7 @@ · 12 unmodified lines
1313 #include <linux/types.h>
1414 #include <asm/insn.h>
1515
16+#define HAVE_JUMP_LABEL_BATCH
1617 #define JUMP_LABEL_NOP_SIZE AARCH64_INSN_SIZE
1718
1819 #define JUMP_TABLE_ENTRY(key, label) \
arch/arm64/include/asm/kvm_ptrauth.h+1−1
@@ -104,7 +104,7 @@ alternative_else_nop_endif · 103 unmodified lines
104104
105105 #define __ptrauth_save_key(ctxt, key) \
106106 do { \
107− u64 __val; \
107+ u64 __val; \
108108 __val = read_sysreg_s(SYS_ ## key ## KEYLO_EL1); \
109109 ctxt_sys_reg(ctxt, key ## KEYLO_EL1) = __val; \
110110 __val = read_sysreg_s(SYS_ ## key ## KEYHI_EL1); \
arch/arm64/include/asm/uaccess.h+1−1
@@ -188,7 +188,7 @@ static inline void __user *__uaccess_mask_ptr(const void __user *ptr) · 187 unmodified lines
188188 #define __get_mem_asm(load, reg, x, addr, label, type) \
189189 asm_goto_output( \
190190 "1: " load " " reg "0, [%1]\n" \
191− _ASM_EXTABLE_##type##ACCESS_ERR(1b, %l2, %w0) \
191+ _ASM_EXTABLE_##type##ACCESS(1b, %l2) \
192192 : "=r" (x) \
193193 : "r" (addr) : : label)
194194 #else
arch/arm64/kernel/Makefile.syscalls+1−1
@@ -1,6 +1,6 @@
11 # SPDX-License-Identifier: GPL-2.0
22
33 syscall_abis_32 +=
4−syscall_abis_64 += renameat newstat rlimit memfd_secret
4+syscall_abis_64 += renameat rlimit memfd_secret
55
66 syscalltbl = arch/arm64/tools/syscall_%.tbl
arch/arm64/kernel/acpi_numa.c+1−1
@@ -27,7 +27,7 @@ · 26 unmodified lines
2727
2828 #include <asm/numa.h>
2929
30−static int acpi_early_node_map[NR_CPUS] __initdata = { NUMA_NO_NODE };
30+static int acpi_early_node_map[NR_CPUS] __initdata = { [0 ... NR_CPUS - 1] = NUMA_NO_NODE };
3131
3232 int __init acpi_numa_get_nid(unsigned int cpu)
3333 {
arch/arm64/kernel/cpu_errata.c+10−1
@@ -434,15 +434,24 @@ static const struct midr_range erratum_spec_unpriv_load_list[] = { · 433 unmodified lines
434434
435435 #ifdef CONFIG_ARM64_ERRATUM_3194386
436436 static const struct midr_range erratum_spec_ssbs_list[] = {
437+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
438+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
439+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
440+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A78C),
437441 MIDR_ALL_VERSIONS(MIDR_CORTEX_A710),
438442 MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
443+ MIDR_ALL_VERSIONS(MIDR_CORTEX_A725),
444+ MIDR_ALL_VERSIONS(MIDR_CORTEX_X1),
445+ MIDR_ALL_VERSIONS(MIDR_CORTEX_X1C),
439446 MIDR_ALL_VERSIONS(MIDR_CORTEX_X2),
440447 MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
441448 MIDR_ALL_VERSIONS(MIDR_CORTEX_X4),
442449 MIDR_ALL_VERSIONS(MIDR_CORTEX_X925),
450+ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
443451 MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N2),
444− MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
452+ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V1),
445453 MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
454+ MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V3),
446455 {}
447456 };
448457 #endif
arch/arm64/kernel/jump_label.c+9−2
@@ -7,11 +7,12 @@ · 6 unmodified lines
77 */
88 #include <linux/kernel.h>
99 #include <linux/jump_label.h>
10+#include <linux/smp.h>
1011 #include <asm/insn.h>
1112 #include <asm/patching.h>
1213
13−void arch_jump_label_transform(struct jump_entry *entry,
14− enum jump_label_type type)
14+bool arch_jump_label_transform_queue(struct jump_entry *entry,
15+ enum jump_label_type type)
1516 {
1617 void *addr = (void *)jump_entry_code(entry);
1718 u32 insn;
@@ -25,4 +26,10 @@ void arch_jump_label_transform(struct jump_entry *entry, · 7 unmodified lines
2526 }
2627
2728 aarch64_insn_patch_text_nosync(addr, insn);
29+ return true;
30+}
31+
32+void arch_jump_label_transform_apply(void)
33+{
34+ kick_all_cpus_sync();
2835 }
arch/arm64/kernel/setup.c+0−3
@@ -355,9 +355,6 @@ void __init __no_sanitize_address setup_arch(char **cmdline_p) · 354 unmodified lines
355355 smp_init_cpus();
356356 smp_build_mpidr_hash();
357357
358− /* Init percpu seeds for random tags after cpus are set up. */
359− kasan_init_sw_tags();
360−
361358 #ifdef CONFIG_ARM64_SW_TTBR0_PAN
362359 /*
363360 * Make sure init_thread_info.ttbr0 always generates translation
arch/arm64/kernel/smp.c+2−0
@@ -467,6 +467,8 @@ void __init smp_prepare_boot_cpu(void) · 466 unmodified lines
467467 init_gic_priority_masking();
468468
469469 kasan_init_hw_tags();
470+ /* Init percpu seeds for random tags after cpus are set up. */
471+ kasan_init_sw_tags();
470472 }
471473
472474 /*
arch/arm64/kvm/Kconfig+1−0
@@ -19,6 +19,7 @@ if VIRTUALIZATION · 18 unmodified lines
1919
2020 menuconfig KVM
2121 bool "Kernel-based Virtual Machine (KVM) support"
22+ depends on AS_HAS_ARMV8_4
2223 select KVM_COMMON
2324 select KVM_GENERIC_HARDWARE_ENABLING
2425 select KVM_GENERIC_MMU_NOTIFIER
arch/arm64/kvm/Makefile+3−0
@@ -10,6 +10,9 @@ include $(srctree)/virt/kvm/Makefile.kvm · 9 unmodified lines
1010 obj-$(CONFIG_KVM) += kvm.o
1111 obj-$(CONFIG_KVM) += hyp/
1212
13+CFLAGS_sys_regs.o += -Wno-override-init
14+CFLAGS_handle_exit.o += -Wno-override-init
15+
1316 kvm-y += arm.o mmu.o mmio.o psci.o hypercalls.o pvtime.o \
1417 inject_fault.o va_layout.o handle_exit.o \
1518 guest.o debug.o reset.o sys_regs.o stacktrace.o \
arch/arm64/kvm/arm.c+5−10
@@ -164,6 +164,7 @@ static int kvm_arm_default_max_vcpus(void) · 163 unmodified lines
164164 /**
165165 * kvm_arch_init_vm - initializes a VM data structure
166166 * @kvm: pointer to the KVM struct
167+ * @type: kvm device type
167168 */
168169 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
169170 {
@@ -521,10 +522,10 @@ void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) · 351 unmodified lines
521522
522523 static void vcpu_set_pauth_traps(struct kvm_vcpu *vcpu)
523524 {
524− if (vcpu_has_ptrauth(vcpu)) {
525+ if (vcpu_has_ptrauth(vcpu) && !is_protected_kvm_enabled()) {
525526 /*
526− * Either we're running running an L2 guest, and the API/APK
527− * bits come from L1's HCR_EL2, or API/APK are both set.
527+ * Either we're running an L2 guest, and the API/APK bits come
528+ * from L1's HCR_EL2, or API/APK are both set.
528529 */
529530 if (unlikely(vcpu_has_nv(vcpu) && !is_hyp_ctxt(vcpu))) {
530531 u64 val;
@@ -541,16 +542,10 @@ static void vcpu_set_pauth_traps(struct kvm_vcpu *vcpu) · 10 unmodified lines
541542 * Save the host keys if there is any chance for the guest
542543 * to use pauth, as the entry code will reload the guest
543544 * keys in that case.
544− * Protected mode is the exception to that rule, as the
545− * entry into the EL2 code eagerly switch back and forth
546− * between host and hyp keys (and kvm_hyp_ctxt is out of
547− * reach anyway).
548545 */
549− if (is_protected_kvm_enabled())
550− return;
551−
552546 if (vcpu->arch.hcr_el2 & (HCR_API | HCR_APK)) {
553547 struct kvm_cpu_context *ctxt;
548+
554549 ctxt = this_cpu_ptr_hyp_sym(kvm_hyp_ctxt);
555550 ptrauth_save_keys(ctxt);
556551 }
arch/arm64/kvm/hyp/include/hyp/switch.h+0−1
@@ -27,7 +27,6 @@ · 26 unmodified lines
2727 #include <asm/kvm_hyp.h>
2828 #include <asm/kvm_mmu.h>
2929 #include <asm/kvm_nested.h>
30−#include <asm/kvm_ptrauth.h>
3130 #include <asm/fpsimd.h>
3231 #include <asm/debug-monitors.h>
3332 #include <asm/processor.h>
arch/arm64/kvm/hyp/nvhe/Makefile+2−0
@@ -20,6 +20,8 @@ HOST_EXTRACFLAGS += -I$(objtree)/include · 19 unmodified lines
2020 lib-objs := clear_page.o copy_page.o memcpy.o memset.o
2121 lib-objs := $(addprefix ../../../lib/, $(lib-objs))
2222
23+CFLAGS_switch.nvhe.o += -Wno-override-init
24+
2325 hyp-obj-y := timer-sr.o sysreg-sr.o debug-sr.o switch.o tlb.o hyp-init.o host.o \
2426 hyp-main.o hyp-smp.o psci-relay.o early_alloc.o page_alloc.o \
2527 cache.o setup.o mm.o mem_protect.o sys_regs.o pkvm.o stacktrace.o ffa.o
arch/arm64/kvm/hyp/nvhe/switch.c+2−3
@@ -173,9 +173,8 @@ static void __pmu_switch_to_host(struct kvm_vcpu *vcpu) · 172 unmodified lines
173173 static bool kvm_handle_pvm_sys64(struct kvm_vcpu *vcpu, u64 *exit_code)
174174 {
175175 /*
176− * Make sure we handle the exit for workarounds and ptrauth
177− * before the pKVM handling, as the latter could decide to
178− * UNDEF.
176+ * Make sure we handle the exit for workarounds before the pKVM
177+ * handling, as the latter could decide to UNDEF.
179178 */
180179 return (kvm_hyp_handle_sysreg(vcpu, exit_code) ||
181180 kvm_handle_pvm_sysreg(vcpu, exit_code));
arch/arm64/kvm/hyp/vhe/Makefile+2−0
@@ -6,6 +6,8 @@ · 5 unmodified lines
66 asflags-y := -D__KVM_VHE_HYPERVISOR__
77 ccflags-y := -D__KVM_VHE_HYPERVISOR__
88
9+CFLAGS_switch.o += -Wno-override-init
10+
911 obj-y := timer-sr.o sysreg-sr.o debug-sr.o switch.o tlb.o
1012 obj-y += ../vgic-v3-sr.o ../aarch32.o ../vgic-v2-cpuif-proxy.o ../entry.o \
1113 ../fpsimd.o ../hyp-entry.o ../exception.o
arch/arm64/kvm/mmu.c+8−1
@@ -1540,8 +1540,15 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa, · 1539 unmodified lines
15401540 vma_pagesize = min(vma_pagesize, (long)max_map_size);
15411541 }
15421542
1543− if (vma_pagesize == PMD_SIZE || vma_pagesize == PUD_SIZE)
1543+ /*
1544+ * Both the canonical IPA and fault IPA must be hugepage-aligned to
1545+ * ensure we find the right PFN and lay down the mapping in the right
1546+ * place.
1547+ */
1548+ if (vma_pagesize == PMD_SIZE || vma_pagesize == PUD_SIZE) {
15441549 fault_ipa &= ~(vma_pagesize - 1);
1550+ ipa &= ~(vma_pagesize - 1);
1551+ }
15451552
15461553 gfn = ipa >> PAGE_SHIFT;
15471554 mte_allowed = kvm_vma_mte_allowed(vma);
arch/arm64/kvm/nested.c+1−1
@@ -786,7 +786,7 @@ void kvm_arch_flush_shadow_all(struct kvm *kvm) · 785 unmodified lines
786786 if (!WARN_ON(atomic_read(&mmu->refcnt)))
787787 kvm_free_stage2_pgd(mmu);
788788 }
789− kfree(kvm->arch.nested_mmus);
789+ kvfree(kvm->arch.nested_mmus);
790790 kvm->arch.nested_mmus = NULL;
791791 kvm->arch.nested_mmus_size = 0;
792792 kvm_uninit_stage2_mmu(kvm);
arch/arm64/kvm/sys_regs.c+6−0
@@ -33,6 +33,7 @@ · 32 unmodified lines
3333 #include <trace/events/kvm.h>
3434
3535 #include "sys_regs.h"
36+#include "vgic/vgic.h"
3637
3738 #include "trace.h"
3839
@@ -435,6 +436,11 @@ static bool access_gic_sgi(struct kvm_vcpu *vcpu, · 396 unmodified lines
435436 {
436437 bool g1;
437438
439+ if (!kvm_has_gicv3(vcpu->kvm)) {
440+ kvm_inject_undefined(vcpu);
441+ return false;
442+ }
443+
438444 if (!p->is_write)
439445 return read_from_write_only(vcpu, p, r);
440446
arch/arm64/kvm/vgic/vgic-debug.c+4−3
@@ -45,7 +45,8 @@ static void iter_next(struct kvm *kvm, struct vgic_state_iter *iter) · 44 unmodified lines
4545 * Let the xarray drive the iterator after the last SPI, as the iterator
4646 * has exhausted the sequentially-allocated INTID space.
4747 */
48− if (iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS - 1)) {
48+ if (iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS - 1) &&
49+ iter->nr_lpis) {
4950 if (iter->lpi_idx < iter->nr_lpis)
5051 xa_find_after(&dist->lpi_xa, &iter->intid,
5152 VGIC_LPI_MAX_INTID,
@@ -84,7 +85,7 @@ static void iter_unmark_lpis(struct kvm *kvm) · 32 unmodified lines
8485 struct vgic_irq *irq;
8586 unsigned long intid;
8687
87− xa_for_each(&dist->lpi_xa, intid, irq) {
88+ xa_for_each_marked(&dist->lpi_xa, intid, irq, LPI_XA_MARK_DEBUG_ITER) {
8889 xa_clear_mark(&dist->lpi_xa, intid, LPI_XA_MARK_DEBUG_ITER);
8990 vgic_put_irq(kvm, irq);
9091 }
@@ -112,7 +113,7 @@ static bool end_of_vgic(struct vgic_state_iter *iter) · 21 unmodified lines
112113 return iter->dist_id > 0 &&
113114 iter->vcpu_id == iter->nr_cpus &&
114115 iter->intid >= (iter->nr_spis + VGIC_NR_PRIVATE_IRQS) &&
115− iter->lpi_idx > iter->nr_lpis;
116+ (!iter->nr_lpis || iter->lpi_idx > iter->nr_lpis);
116117 }
117118
118119 static void *vgic_debug_start(struct seq_file *s, loff_t *pos)
arch/arm64/kvm/vgic/vgic-init.c+7−5
@@ -417,10 +417,8 @@ static void __kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu) · 416 unmodified lines
417417 kfree(vgic_cpu->private_irqs);
418418 vgic_cpu->private_irqs = NULL;
419419
420− if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
421− vgic_unregister_redist_iodev(vcpu);
420+ if (vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
422421 vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
423− }
424422 }
425423
426424 void kvm_vgic_vcpu_destroy(struct kvm_vcpu *vcpu)
@@ -438,17 +436,21 @@ void kvm_vgic_destroy(struct kvm *kvm) · 11 unmodified lines
438436 unsigned long i;
439437
440438 mutex_lock(&kvm->slots_lock);
439+ mutex_lock(&kvm->arch.config_lock);
441440
442441 vgic_debug_destroy(kvm);
443442
444443 kvm_for_each_vcpu(i, vcpu, kvm)
445444 __kvm_vgic_vcpu_destroy(vcpu);
446445
447− mutex_lock(&kvm->arch.config_lock);
448−
449446 kvm_vgic_dist_destroy(kvm);
450447
451448 mutex_unlock(&kvm->arch.config_lock);
449+
450+ if (kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3)
451+ kvm_for_each_vcpu(i, vcpu, kvm)
452+ vgic_unregister_redist_iodev(vcpu);
453+
452454 mutex_unlock(&kvm->slots_lock);
453455 }
454456
arch/arm64/kvm/vgic/vgic-irqfd.c+4−3
@@ -9,7 +9,7 @@ · 8 unmodified lines
99 #include <kvm/arm_vgic.h>
1010 #include "vgic.h"
1111
12−/**
12+/*
1313 * vgic_irqfd_set_irq: inject the IRQ corresponding to the
1414 * irqchip routing entry
1515 *
@@ -75,7 +75,8 @@ static void kvm_populate_msi(struct kvm_kernel_irq_routing_entry *e, · 59 unmodified lines
7575 msi->flags = e->msi.flags;
7676 msi->devid = e->msi.devid;
7777 }
78−/**
78+
79+/*
7980 * kvm_set_msi: inject the MSI corresponding to the
8081 * MSI routing entry
8182 *
@@ -98,7 +99,7 @@ int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e, · 16 unmodified lines
9899 return vgic_its_inject_msi(kvm, &msi);
99100 }
100101
101−/**
102+/*
102103 * kvm_arch_set_irq_inatomic: fast-path for irqfd injection
103104 */
104105 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
arch/arm64/kvm/vgic/vgic-its.c+11−7
@@ -2040,6 +2040,7 @@ typedef int (*entry_fn_t)(struct vgic_its *its, u32 id, void *entry, · 2039 unmodified lines
20402040 * @start_id: the ID of the first entry in the table
20412041 * (non zero for 2d level tables)
20422042 * @fn: function to apply on each entry
2043+ * @opaque: pointer to opaque data
20432044 *
20442045 * Return: < 0 on error, 0 if last element was identified, 1 otherwise
20452046 * (the last element may not be found on second level tables)
@@ -2079,7 +2080,7 @@ static int scan_its_table(struct vgic_its *its, gpa_t base, int size, u32 esz, · 33 unmodified lines
20792080 return 1;
20802081 }
20812082
2082−/**
2083+/*
20832084 * vgic_its_save_ite - Save an interrupt translation entry at @gpa
20842085 */
20852086 static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
@@ -2099,6 +2100,8 @@ static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev, · 13 unmodified lines
20992100
21002101 /**
21012102 * vgic_its_restore_ite - restore an interrupt translation entry
2103+ *
2104+ * @its: its handle
21022105 * @event_id: id used for indexing
21032106 * @ptr: pointer to the ITE entry
21042107 * @opaque: pointer to the its_device
@@ -2231,6 +2234,7 @@ static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev) · 126 unmodified lines
22312234 * @its: ITS handle
22322235 * @dev: ITS device
22332236 * @ptr: GPA
2237+ * @dte_esz: device table entry size
22342238 */
22352239 static int vgic_its_save_dte(struct vgic_its *its, struct its_device *dev,
22362240 gpa_t ptr, int dte_esz)
@@ -2313,7 +2317,7 @@ static int vgic_its_device_cmp(void *priv, const struct list_head *a, · 76 unmodified lines
23132317 return 1;
23142318 }
23152319
2316−/**
2320+/*
23172321 * vgic_its_save_device_tables - Save the device table and all ITT
23182322 * into guest RAM
23192323 *
@@ -2386,7 +2390,7 @@ static int handle_l1_dte(struct vgic_its *its, u32 id, void *addr, · 66 unmodified lines
23862390 return ret;
23872391 }
23882392
2389−/**
2393+/*
23902394 * vgic_its_restore_device_tables - Restore the device table and all ITT
23912395 * from guest RAM to internal data structs
23922396 */
@@ -2478,7 +2482,7 @@ static int vgic_its_restore_cte(struct vgic_its *its, gpa_t gpa, int esz) · 85 unmodified lines
24782482 return 1;
24792483 }
24802484
2481−/**
2485+/*
24822486 * vgic_its_save_collection_table - Save the collection table into
24832487 * guest RAM
24842488 */
@@ -2518,7 +2522,7 @@ static int vgic_its_save_collection_table(struct vgic_its *its) · 33 unmodified lines
25182522 return ret;
25192523 }
25202524
2521−/**
2525+/*
25222526 * vgic_its_restore_collection_table - reads the collection table
25232527 * in guest memory and restores the ITS internal state. Requires the
25242528 * BASER registers to be restored before.
@@ -2556,7 +2560,7 @@ static int vgic_its_restore_collection_table(struct vgic_its *its) · 31 unmodified lines
25562560 return ret;
25572561 }
25582562
2559−/**
2563+/*
25602564 * vgic_its_save_tables_v0 - Save the ITS tables into guest ARM
25612565 * according to v0 ABI
25622566 */
@@ -2571,7 +2575,7 @@ static int vgic_its_save_tables_v0(struct vgic_its *its) · 8 unmodified lines
25712575 return vgic_its_save_collection_table(its);
25722576 }
25732577
2574−/**
2578+/*
25752579 * vgic_its_restore_tables_v0 - Restore the ITS tables from guest RAM
25762580 * to internal data structs according to V0 ABI
25772581 *
arch/arm64/kvm/vgic/vgic-v3.c+1−1
@@ -370,7 +370,7 @@ static void map_all_vpes(struct kvm *kvm) · 369 unmodified lines
370370 dist->its_vm.vpes[i]->irq));
371371 }
372372
373−/**
373+/*
374374 * vgic_v3_save_pending_tables - Save the pending tables into guest RAM
375375 * kvm lock and all vcpu lock must be held
376376 */
arch/arm64/kvm/vgic/vgic.c+6−1
@@ -36,6 +36,11 @@ struct vgic_global kvm_vgic_global_state __ro_after_init = { · 35 unmodified lines
3636 * we have to disable IRQs before taking this lock and everything lower
3737 * than it.
3838 *
39+ * The config_lock has additional ordering requirements:
40+ * kvm->slots_lock
41+ * kvm->srcu
42+ * kvm->arch.config_lock
43+ *
3944 * If you need to take multiple locks, always take the upper lock first,
4045 * then the lower ones, e.g. first take the its_lock, then the irq_lock.
4146 * If you are already holding a lock and need to take a higher one, you
@@ -313,7 +318,7 @@ static bool vgic_validate_injection(struct vgic_irq *irq, bool level, void *owne · 271 unmodified lines
313318 * with all locks dropped.
314319 */
315320 bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq,
316− unsigned long flags)
321+ unsigned long flags) __releases(&irq->irq_lock)
317322 {
318323 struct kvm_vcpu *vcpu;
319324
arch/arm64/kvm/vgic/vgic.h+8−1
@@ -186,7 +186,7 @@ bool vgic_get_phys_line_level(struct vgic_irq *irq); · 185 unmodified lines
186186 void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending);
187187 void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active);
188188 bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq,
189− unsigned long flags);
189+ unsigned long flags) __releases(&irq->irq_lock);
190190 void vgic_kick_vcpus(struct kvm *kvm);
191191 void vgic_irq_handle_resampling(struct vgic_irq *irq,
192192 bool lr_deactivated, bool lr_pending);
@@ -346,4 +346,11 @@ void vgic_v4_configure_vsgis(struct kvm *kvm); · 153 unmodified lines
346346 void vgic_v4_get_vlpi_state(struct vgic_irq *irq, bool *val);
347347 int vgic_v4_request_vpe_irq(struct kvm_vcpu *vcpu, int irq);
348348
349+static inline bool kvm_has_gicv3(struct kvm *kvm)
350+{
351+ return (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) &&
352+ irqchip_in_kernel(kvm) &&
353+ kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3);
354+}
355+
349356 #endif
arch/loongarch/include/asm/dma-direct.h+0−11
@@ -1,11 +0,0 @@
1−/* SPDX-License-Identifier: GPL-2.0 */
2−/*
3− * Copyright (C) 2020-2022 Loongson Technology Corporation Limited
4− */
5−#ifndef _LOONGARCH_DMA_DIRECT_H
6−#define _LOONGARCH_DMA_DIRECT_H
7−
8−dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr);
9−phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr);
10−
11−#endif /* _LOONGARCH_DMA_DIRECT_H */
arch/loongarch/include/asm/hugetlb.h+2−2
@@ -34,7 +34,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, · 33 unmodified lines
3434 unsigned long addr, pte_t *ptep)
3535 {
3636 pte_t clear;
37− pte_t pte = *ptep;
37+ pte_t pte = ptep_get(ptep);
3838
3939 pte_val(clear) = (unsigned long)invalid_pte_table;
4040 set_pte_at(mm, addr, ptep, clear);
@@ -65,7 +65,7 @@ static inline int huge_ptep_set_access_flags(struct vm_area_struct *vma, · 24 unmodified lines
6565 pte_t *ptep, pte_t pte,
6666 int dirty)
6767 {
68− int changed = !pte_same(*ptep, pte);
68+ int changed = !pte_same(ptep_get(ptep), pte);
6969
7070 if (changed) {
7171 set_pte_at(vma->vm_mm, addr, ptep, pte);
arch/loongarch/include/asm/hw_irq.h+2−0
@@ -9,6 +9,8 @@ · 8 unmodified lines
99
1010 extern atomic_t irq_err_count;
1111
12+#define ARCH_IRQ_INIT_FLAGS IRQ_NOPROBE
13+
1214 /*
1315 * interrupt-retrigger: NOP for now. This may not be appropriate for all
1416 * machines, we'll see ...
arch/loongarch/include/asm/kfence.h+3−3
@@ -53,13 +53,13 @@ static inline bool kfence_protect_page(unsigned long addr, bool protect) · 52 unmodified lines
5353 {
5454 pte_t *pte = virt_to_kpte(addr);
5555
56− if (WARN_ON(!pte) || pte_none(*pte))
56+ if (WARN_ON(!pte) || pte_none(ptep_get(pte)))
5757 return false;
5858
5959 if (protect)
60− set_pte(pte, __pte(pte_val(*pte) & ~(_PAGE_VALID | _PAGE_PRESENT)));
60+ set_pte(pte, __pte(pte_val(ptep_get(pte)) & ~(_PAGE_VALID | _PAGE_PRESENT)));
6161 else
62− set_pte(pte, __pte(pte_val(*pte) | (_PAGE_VALID | _PAGE_PRESENT)));
62+ set_pte(pte, __pte(pte_val(ptep_get(pte)) | (_PAGE_VALID | _PAGE_PRESENT)));
6363
6464 preempt_disable();
6565 local_flush_tlb_one(addr);
arch/loongarch/include/asm/kvm_host.h+0−2
@@ -26,8 +26,6 @@ · 25 unmodified lines
2626
2727 #define KVM_MAX_VCPUS 256
2828 #define KVM_MAX_CPUCFG_REGS 21
29−/* memory slots that does not exposed to userspace */
30−#define KVM_PRIVATE_MEM_SLOTS 0
3129
3230 #define KVM_HALT_POLL_NS_DEFAULT 500000
3331 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0)
arch/loongarch/include/asm/kvm_para.h+2−2
@@ -39,9 +39,9 @@ struct kvm_steal_time { · 38 unmodified lines
3939 * Hypercall interface for KVM hypervisor
4040 *
4141 * a0: function identifier
42− * a1-a6: args
42+ * a1-a5: args
4343 * Return value will be placed in a0.
44− * Up to 6 arguments are passed in a1, a2, a3, a4, a5, a6.
44+ * Up to 5 arguments are passed in a1, a2, a3, a4, a5.
4545 */
4646 static __always_inline long kvm_hypercall0(u64 fid)
4747 {
arch/loongarch/include/asm/kvm_vcpu.h+0−1
@@ -76,7 +76,6 @@ static inline void kvm_restore_lasx(struct loongarch_fpu *fpu) { } · 75 unmodified lines
7676 #endif
7777
7878 void kvm_init_timer(struct kvm_vcpu *vcpu, unsigned long hz);
79−void kvm_reset_timer(struct kvm_vcpu *vcpu);
8079 void kvm_save_timer(struct kvm_vcpu *vcpu);
8180 void kvm_restore_timer(struct kvm_vcpu *vcpu);
8281
arch/loongarch/include/asm/pgtable.h+29−19
@@ -106,6 +106,9 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]; · 105 unmodified lines
106106 #define KFENCE_AREA_START (VMEMMAP_END + 1)
107107 #define KFENCE_AREA_END (KFENCE_AREA_START + KFENCE_AREA_SIZE - 1)
108108
109+#define ptep_get(ptep) READ_ONCE(*(ptep))
110+#define pmdp_get(pmdp) READ_ONCE(*(pmdp))
111+
109112 #define pte_ERROR(e) \
110113 pr_err("%s:%d: bad pte %016lx.\n", __FILE__, __LINE__, pte_val(e))
111114 #ifndef __PAGETABLE_PMD_FOLDED
@@ -147,11 +150,6 @@ static inline int p4d_present(p4d_t p4d) · 35 unmodified lines
147150 return p4d_val(p4d) != (unsigned long)invalid_pud_table;
148151 }
149152
150−static inline void p4d_clear(p4d_t *p4dp)
151−{
152− p4d_val(*p4dp) = (unsigned long)invalid_pud_table;
153−}
154−
155153 static inline pud_t *p4d_pgtable(p4d_t p4d)
156154 {
157155 return (pud_t *)p4d_val(p4d);
@@ -159,7 +157,12 @@ static inline pud_t *p4d_pgtable(p4d_t p4d) · 1 unmodified line
159157
160158 static inline void set_p4d(p4d_t *p4d, p4d_t p4dval)
161159 {
162− *p4d = p4dval;
160+ WRITE_ONCE(*p4d, p4dval);
161+}
162+
163+static inline void p4d_clear(p4d_t *p4dp)
164+{
165+ set_p4d(p4dp, __p4d((unsigned long)invalid_pud_table));
163166 }
164167
165168 #define p4d_phys(p4d) PHYSADDR(p4d_val(p4d))
@@ -193,17 +196,20 @@ static inline int pud_present(pud_t pud) · 27 unmodified lines
193196 return pud_val(pud) != (unsigned long)invalid_pmd_table;
194197 }
195198
196−static inline void pud_clear(pud_t *pudp)
199+static inline pmd_t *pud_pgtable(pud_t pud)
197200 {
198− pud_val(*pudp) = ((unsigned long)invalid_pmd_table);
201+ return (pmd_t *)pud_val(pud);
199202 }
200203
201−static inline pmd_t *pud_pgtable(pud_t pud)
204+static inline void set_pud(pud_t *pud, pud_t pudval)
202205 {
203− return (pmd_t *)pud_val(pud);
206+ WRITE_ONCE(*pud, pudval);
204207 }
205208
206−#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while (0)
209+static inline void pud_clear(pud_t *pudp)
210+{
211+ set_pud(pudp, __pud((unsigned long)invalid_pmd_table));
212+}
207213
208214 #define pud_phys(pud) PHYSADDR(pud_val(pud))
209215 #define pud_page(pud) (pfn_to_page(pud_phys(pud) >> PAGE_SHIFT))
@@ -231,12 +237,15 @@ static inline int pmd_present(pmd_t pmd) · 21 unmodified lines
231237 return pmd_val(pmd) != (unsigned long)invalid_pte_table;
232238 }
233239
234−static inline void pmd_clear(pmd_t *pmdp)
240+static inline void set_pmd(pmd_t *pmd, pmd_t pmdval)
235241 {
236− pmd_val(*pmdp) = ((unsigned long)invalid_pte_table);
242+ WRITE_ONCE(*pmd, pmdval);
237243 }
238244
239−#define set_pmd(pmdptr, pmdval) do { *(pmdptr) = (pmdval); } while (0)
245+static inline void pmd_clear(pmd_t *pmdp)
246+{
247+ set_pmd(pmdp, __pmd((unsigned long)invalid_pte_table));
248+}
240249
241250 #define pmd_phys(pmd) PHYSADDR(pmd_val(pmd))
242251
@@ -314,7 +323,8 @@ extern void paging_init(void); · 71 unmodified lines
314323
315324 static inline void set_pte(pte_t *ptep, pte_t pteval)
316325 {
317− *ptep = pteval;
326+ WRITE_ONCE(*ptep, pteval);
327+
318328 if (pte_val(pteval) & _PAGE_GLOBAL) {
319329 pte_t *buddy = ptep_buddy(ptep);
320330 /*
@@ -341,8 +351,8 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) · 20 unmodified lines
341351 : [buddy] "+m" (buddy->pte), [tmp] "=&r" (tmp)
342352 : [global] "r" (page_global));
343353 #else /* !CONFIG_SMP */
344− if (pte_none(*buddy))
345− pte_val(*buddy) = pte_val(*buddy) | _PAGE_GLOBAL;
354+ if (pte_none(ptep_get(buddy)))
355+ WRITE_ONCE(*buddy, __pte(pte_val(ptep_get(buddy)) | _PAGE_GLOBAL));
346356 #endif /* CONFIG_SMP */
347357 }
348358 }
@@ -350,7 +360,7 @@ static inline void set_pte(pte_t *ptep, pte_t pteval) · 1 unmodified line
350360 static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
351361 {
352362 /* Preserve global status for the pair */
353− if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
363+ if (pte_val(ptep_get(ptep_buddy(ptep))) & _PAGE_GLOBAL)
354364 set_pte(ptep, __pte(_PAGE_GLOBAL));
355365 else
356366 set_pte(ptep, __pte(0));
@@ -603,7 +613,7 @@ static inline pmd_t pmd_mkinvalid(pmd_t pmd) · 246 unmodified lines
603613 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm,
604614 unsigned long address, pmd_t *pmdp)
605615 {
606− pmd_t old = *pmdp;
616+ pmd_t old = pmdp_get(pmdp);
607617
608618 pmd_clear(pmdp);
609619
arch/loongarch/kernel/Makefile.syscalls+2−1
@@ -1,3 +1,4 @@
11 # SPDX-License-Identifier: GPL-2.0
22
3−syscall_abis_64 += newstat
3+# No special ABIs on loongarch so far
4+syscall_abis_64 +=
arch/loongarch/kernel/efi.c+6−0
@@ -66,6 +66,12 @@ void __init efi_runtime_init(void) · 65 unmodified lines
6666 set_bit(EFI_RUNTIME_SERVICES, &efi.flags);
6767 }
6868
69+bool efi_poweroff_required(void)
70+{
71+ return efi_enabled(EFI_RUNTIME_SERVICES) &&
72+ (acpi_gbl_reduced_hardware || acpi_no_s5);
73+}
74+
6975 unsigned long __initdata screen_info_table = EFI_INVALID_TABLE_ADDR;
7076
7177 #if defined(CONFIG_SYSFB) || defined(CONFIG_EFI_EARLYCON)
arch/loongarch/kernel/fpu.S+4−0
@@ -530,6 +530,10 @@ SYM_FUNC_END(_restore_lasx_context) · 529 unmodified lines
530530
531531 #ifdef CONFIG_CPU_HAS_LBT
532532 STACK_FRAME_NON_STANDARD _restore_fp
533+#ifdef CONFIG_CPU_HAS_LSX
533534 STACK_FRAME_NON_STANDARD _restore_lsx
535+#endif
536+#ifdef CONFIG_CPU_HAS_LASX
534537 STACK_FRAME_NON_STANDARD _restore_lasx
535538 #endif
539+#endif
arch/loongarch/kernel/irq.c+0−3
@@ -102,9 +102,6 @@ void __init init_IRQ(void) · 101 unmodified lines
102102 mp_ops.init_ipi();
103103 #endif
104104
105− for (i = 0; i < NR_IRQS; i++)
106− irq_set_noprobe(i);
107−
108105 for_each_possible_cpu(i) {
109106 page = alloc_pages_node(cpu_to_node(i), GFP_KERNEL, order);
110107
arch/loongarch/kvm/mmu.c+4−4
@@ -714,19 +714,19 @@ static int host_pfn_mapping_level(struct kvm *kvm, gfn_t gfn, · 713 unmodified lines
714714 * value) and then p*d_offset() walks into the target huge page instead
715715 * of the old page table (sees the new value).
716716 */
717− pgd = READ_ONCE(*pgd_offset(kvm->mm, hva));
717+ pgd = pgdp_get(pgd_offset(kvm->mm, hva));
718718 if (pgd_none(pgd))
719719 goto out;
720720
721− p4d = READ_ONCE(*p4d_offset(&pgd, hva));
721+ p4d = p4dp_get(p4d_offset(&pgd, hva));
722722 if (p4d_none(p4d) || !p4d_present(p4d))
723723 goto out;
724724
725− pud = READ_ONCE(*pud_offset(&p4d, hva));
725+ pud = pudp_get(pud_offset(&p4d, hva));
726726 if (pud_none(pud) || !pud_present(pud))
727727 goto out;
728728
729− pmd = READ_ONCE(*pmd_offset(&pud, hva));
729+ pmd = pmdp_get(pmd_offset(&pud, hva));
730730 if (pmd_none(pmd) || !pmd_present(pmd))
731731 goto out;
732732
arch/loongarch/kvm/switch.S+4−0
@@ -277,6 +277,10 @@ SYM_DATA(kvm_enter_guest_size, .quad kvm_enter_guest_end - kvm_enter_guest) · 276 unmodified lines
277277
278278 #ifdef CONFIG_CPU_HAS_LBT
279279 STACK_FRAME_NON_STANDARD kvm_restore_fpu
280+#ifdef CONFIG_CPU_HAS_LSX
280281 STACK_FRAME_NON_STANDARD kvm_restore_lsx
282+#endif
283+#ifdef CONFIG_CPU_HAS_LASX
281284 STACK_FRAME_NON_STANDARD kvm_restore_lasx
282285 #endif
286+#endif
arch/loongarch/kvm/timer.c+0−7
@@ -188,10 +188,3 @@ void kvm_save_timer(struct kvm_vcpu *vcpu) · 187 unmodified lines
188188 kvm_save_hw_gcsr(csr, LOONGARCH_CSR_ESTAT);
189189 preempt_enable();
190190 }
191−
192−void kvm_reset_timer(struct kvm_vcpu *vcpu)
193−{
194− write_gcsr_timercfg(0);
195− kvm_write_sw_gcsr(vcpu->arch.csr, LOONGARCH_CSR_TCFG, 0);
196− hrtimer_cancel(&vcpu->arch.swtimer);
197−}
arch/loongarch/kvm/vcpu.c+1−1
@@ -647,7 +647,7 @@ static int kvm_set_one_reg(struct kvm_vcpu *vcpu, · 646 unmodified lines
647647 vcpu->kvm->arch.time_offset = (signed long)(v - drdtime());
648648 break;
649649 case KVM_REG_LOONGARCH_VCPU_RESET:
650− kvm_reset_timer(vcpu);
650+ vcpu->arch.st.guest_addr = 0;
651651 memset(&vcpu->arch.irq_pending, 0, sizeof(vcpu->arch.irq_pending));
652652 memset(&vcpu->arch.irq_clear, 0, sizeof(vcpu->arch.irq_clear));
653653 break;
arch/loongarch/mm/hugetlbpage.c+3−3
@@ -39,11 +39,11 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr, · 38 unmodified lines
3939 pmd_t *pmd = NULL;
4040
4141 pgd = pgd_offset(mm, addr);
42− if (pgd_present(*pgd)) {
42+ if (pgd_present(pgdp_get(pgd))) {
4343 p4d = p4d_offset(pgd, addr);
44− if (p4d_present(*p4d)) {
44+ if (p4d_present(p4dp_get(p4d))) {
4545 pud = pud_offset(p4d, addr);
46− if (pud_present(*pud))
46+ if (pud_present(pudp_get(pud)))
4747 pmd = pmd_offset(pud, addr);
4848 }
4949 }
arch/loongarch/mm/init.c+5−5
@@ -141,7 +141,7 @@ void __meminit vmemmap_set_pmd(pmd_t *pmd, void *p, int node, · 140 unmodified lines
141141 int __meminit vmemmap_check_pmd(pmd_t *pmd, int node,
142142 unsigned long addr, unsigned long next)
143143 {
144− int huge = pmd_val(*pmd) & _PAGE_HUGE;
144+ int huge = pmd_val(pmdp_get(pmd)) & _PAGE_HUGE;
145145
146146 if (huge)
147147 vmemmap_verify((pte_t *)pmd, node, addr, next);
@@ -173,7 +173,7 @@ pte_t * __init populate_kernel_pte(unsigned long addr) · 25 unmodified lines
173173 pud_t *pud;
174174 pmd_t *pmd;
175175
176− if (p4d_none(*p4d)) {
176+ if (p4d_none(p4dp_get(p4d))) {
177177 pud = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
178178 if (!pud)
179179 panic("%s: Failed to allocate memory\n", __func__);
@@ -184,7 +184,7 @@ pte_t * __init populate_kernel_pte(unsigned long addr) · 4 unmodified lines
184184 }
185185
186186 pud = pud_offset(p4d, addr);
187− if (pud_none(*pud)) {
187+ if (pud_none(pudp_get(pud))) {
188188 pmd = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
189189 if (!pmd)
190190 panic("%s: Failed to allocate memory\n", __func__);
@@ -195,7 +195,7 @@ pte_t * __init populate_kernel_pte(unsigned long addr) · 4 unmodified lines
195195 }
196196
197197 pmd = pmd_offset(pud, addr);
198− if (!pmd_present(*pmd)) {
198+ if (!pmd_present(pmdp_get(pmd))) {
199199 pte_t *pte;
200200
201201 pte = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
@@ -216,7 +216,7 @@ void __init __set_fixmap(enum fixed_addresses idx, · 14 unmodified lines
216216 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
217217
218218 ptep = populate_kernel_pte(addr);
219− if (!pte_none(*ptep)) {
219+ if (!pte_none(ptep_get(ptep))) {
220220 pte_ERROR(*ptep);
221221 return;
222222 }
arch/loongarch/mm/kasan_init.c+5−5
@@ -105,7 +105,7 @@ static phys_addr_t __init kasan_alloc_zeroed_page(int node) · 104 unmodified lines
105105
106106 static pte_t *__init kasan_pte_offset(pmd_t *pmdp, unsigned long addr, int node, bool early)
107107 {
108− if (__pmd_none(early, READ_ONCE(*pmdp))) {
108+ if (__pmd_none(early, pmdp_get(pmdp))) {
109109 phys_addr_t pte_phys = early ?
110110 __pa_symbol(kasan_early_shadow_pte) : kasan_alloc_zeroed_page(node);
111111 if (!early)
@@ -118,7 +118,7 @@ static pte_t *__init kasan_pte_offset(pmd_t *pmdp, unsigned long addr, int node, · 6 unmodified lines
118118
119119 static pmd_t *__init kasan_pmd_offset(pud_t *pudp, unsigned long addr, int node, bool early)
120120 {
121− if (__pud_none(early, READ_ONCE(*pudp))) {
121+ if (__pud_none(early, pudp_get(pudp))) {
122122 phys_addr_t pmd_phys = early ?
123123 __pa_symbol(kasan_early_shadow_pmd) : kasan_alloc_zeroed_page(node);
124124 if (!early)
@@ -131,7 +131,7 @@ static pmd_t *__init kasan_pmd_offset(pud_t *pudp, unsigned long addr, int node, · 6 unmodified lines
131131
132132 static pud_t *__init kasan_pud_offset(p4d_t *p4dp, unsigned long addr, int node, bool early)
133133 {
134− if (__p4d_none(early, READ_ONCE(*p4dp))) {
134+ if (__p4d_none(early, p4dp_get(p4dp))) {
135135 phys_addr_t pud_phys = early ?
136136 __pa_symbol(kasan_early_shadow_pud) : kasan_alloc_zeroed_page(node);
137137 if (!early)
@@ -154,7 +154,7 @@ static void __init kasan_pte_populate(pmd_t *pmdp, unsigned long addr, · 16 unmodified lines
154154 : kasan_alloc_zeroed_page(node);
155155 next = addr + PAGE_SIZE;
156156 set_pte(ptep, pfn_pte(__phys_to_pfn(page_phys), PAGE_KERNEL));
157− } while (ptep++, addr = next, addr != end && __pte_none(early, READ_ONCE(*ptep)));
157+ } while (ptep++, addr = next, addr != end && __pte_none(early, ptep_get(ptep)));
158158 }
159159
160160 static void __init kasan_pmd_populate(pud_t *pudp, unsigned long addr,
@@ -166,7 +166,7 @@ static void __init kasan_pmd_populate(pud_t *pudp, unsigned long addr, · 5 unmodified lines
166166 do {
167167 next = pmd_addr_end(addr, end);
168168 kasan_pte_populate(pmdp, addr, next, node, early);
169− } while (pmdp++, addr = next, addr != end && __pmd_none(early, READ_ONCE(*pmdp)));
169+ } while (pmdp++, addr = next, addr != end && __pmd_none(early, pmdp_get(pmdp)));
170170 }
171171
172172 static void __init kasan_pud_populate(p4d_t *p4dp, unsigned long addr,
arch/loongarch/mm/pgtable.c+1−1
@@ -128,7 +128,7 @@ pmd_t mk_pmd(struct page *page, pgprot_t prot) · 127 unmodified lines
128128 void set_pmd_at(struct mm_struct *mm, unsigned long addr,
129129 pmd_t *pmdp, pmd_t pmd)
130130 {
131− *pmdp = pmd;
131+ WRITE_ONCE(*pmdp, pmd);
132132 flush_tlb_all();
133133 }
134134
arch/microblaze/mm/init.c+0−5
@@ -193,11 +193,6 @@ asmlinkage void __init mmu_init(void) · 192 unmodified lines
193193 {
194194 unsigned int kstart, ksize;
195195
196− if (!memblock.reserved.cnt) {
197− pr_emerg("Error memory count\n");
198− machine_restart(NULL);
199− }
200−
201196 if ((u32) memblock.memory.regions[0].size < 0x400000) {
202197 pr_emerg("Memory must be greater than 4MB\n");
203198 machine_restart(NULL);
arch/mips/kernel/cevt-r4k.c+7−8
@@ -303,13 +303,6 @@ int r4k_clockevent_init(void) · 302 unmodified lines
303303 if (!c0_compare_int_usable())
304304 return -ENXIO;
305305
306− /*
307− * With vectored interrupts things are getting platform specific.
308− * get_c0_compare_int is a hook to allow a platform to return the
309− * interrupt number of its liking.
310− */
311− irq = get_c0_compare_int();
312−
313306 cd = &per_cpu(mips_clockevent_device, cpu);
314307
315308 cd->name = "MIPS";
@@ -320,7 +313,6 @@ int r4k_clockevent_init(void) · 4 unmodified lines
320313 min_delta = calculate_min_delta();
321314
322315 cd->rating = 300;
323− cd->irq = irq;
324316 cd->cpumask = cpumask_of(cpu);
325317 cd->set_next_event = mips_next_event;
326318 cd->event_handler = mips_event_handler;
@@ -332,6 +324,13 @@ int r4k_clockevent_init(void) · 5 unmodified lines
332324
333325 cp0_timer_irq_installed = 1;
334326
327+ /*
328+ * With vectored interrupts things are getting platform specific.
329+ * get_c0_compare_int is a hook to allow a platform to return the
330+ * interrupt number of its liking.
331+ */
332+ irq = get_c0_compare_int();
333+
335334 if (request_irq(irq, c0_compare_interrupt, flags, "timer",
336335 c0_compare_interrupt))
337336 pr_err("Failed to request irq %d (timer)\n", irq);
arch/mips/kernel/cpu-probe.c+4−0
@@ -1724,12 +1724,16 @@ static inline void cpu_probe_loongson(struct cpuinfo_mips *c, unsigned int cpu) · 1723 unmodified lines
17241724 c->ases |= (MIPS_ASE_LOONGSON_MMI | MIPS_ASE_LOONGSON_CAM |
17251725 MIPS_ASE_LOONGSON_EXT | MIPS_ASE_LOONGSON_EXT2);
17261726 c->ases &= ~MIPS_ASE_VZ; /* VZ of Loongson-3A2000/3000 is incomplete */
1727+ change_c0_config6(LOONGSON_CONF6_EXTIMER | LOONGSON_CONF6_INTIMER,
1728+ LOONGSON_CONF6_INTIMER);
17271729 break;
17281730 case PRID_IMP_LOONGSON_64G:
17291731 __cpu_name[cpu] = "ICT Loongson-3";
17301732 set_elf_platform(cpu, "loongson3a");
17311733 set_isa(c, MIPS_CPU_ISA_M64R2);
17321734 decode_cpucfg(c);
1735+ change_c0_config6(LOONGSON_CONF6_EXTIMER | LOONGSON_CONF6_INTIMER,
1736+ LOONGSON_CONF6_INTIMER);
17331737 break;
17341738 default:
17351739 panic("Unknown Loongson Processor ID!");
arch/mips/kernel/csrc-r4k.c+1−3
@@ -21,9 +21,7 @@ static struct clocksource clocksource_mips = { · 20 unmodified lines
2121 .name = "MIPS",
2222 .read = c0_hpt_read,
2323 .mask = CLOCKSOURCE_MASK(32),
24− .flags = CLOCK_SOURCE_IS_CONTINUOUS |
25− CLOCK_SOURCE_MUST_VERIFY |
26− CLOCK_SOURCE_VERIFY_PERCPU,
24+ .flags = CLOCK_SOURCE_IS_CONTINUOUS,
2725 };
2826
2927 static u64 __maybe_unused notrace r4k_read_sched_clock(void)
arch/mips/sgi-ip22/ip22-gio.c+1−1
@@ -111,7 +111,7 @@ void gio_device_unregister(struct gio_device *giodev) · 110 unmodified lines
111111 }
112112 EXPORT_SYMBOL_GPL(gio_device_unregister);
113113
114−static int gio_bus_match(struct device *dev, struct device_driver *drv)
114+static int gio_bus_match(struct device *dev, const struct device_driver *drv)
115115 {
116116 struct gio_device *gio_dev = to_gio_device(dev);
117117 struct gio_driver *gio_drv = to_gio_driver(drv);
arch/parisc/Kconfig+1−0
@@ -20,6 +20,7 @@ config PARISC · 19 unmodified lines
2020 select ARCH_SUPPORTS_HUGETLBFS if PA20
2121 select ARCH_SUPPORTS_MEMORY_FAILURE
2222 select ARCH_STACKWALK
23+ select ARCH_HAS_CACHE_LINE_SIZE
2324 select ARCH_HAS_DEBUG_VM_PGTABLE
2425 select HAVE_RELIABLE_STACKTRACE
2526 select DMA_OPS
arch/parisc/include/asm/cache.h+10−1
@@ -20,7 +20,16 @@ · 19 unmodified lines
2020
2121 #define SMP_CACHE_BYTES L1_CACHE_BYTES
2222
23−#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
23+#ifdef CONFIG_PA20
24+#define ARCH_DMA_MINALIGN 128
25+#else
26+#define ARCH_DMA_MINALIGN 32
27+#endif
28+#define ARCH_KMALLOC_MINALIGN 16 /* ldcw requires 16-byte alignment */
29+
30+#define arch_slab_minalign() ((unsigned)dcache_stride)
31+#define cache_line_size() dcache_stride
32+#define dma_get_cache_alignment cache_line_size
2433
2534 #define __read_mostly __section(".data..read_mostly")
2635
arch/parisc/net/bpf_jit_core.c+1−1
@@ -114,7 +114,7 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog) · 113 unmodified lines
114114 jit_data->header =
115115 bpf_jit_binary_alloc(prog_size + extable_size,
116116 &jit_data->image,
117− sizeof(u32),
117+ sizeof(long),
118118 bpf_fill_ill_insns);
119119 if (!jit_data->header) {
120120 prog = orig_prog;
arch/powerpc/include/asm/topology.h+13−0
@@ -145,6 +145,7 @@ static inline int cpu_to_coregroup_id(int cpu) · 144 unmodified lines
145145
146146 #ifdef CONFIG_HOTPLUG_SMT
147147 #include <linux/cpu_smt.h>
148+#include <linux/cpumask.h>
148149 #include <asm/cputhreads.h>
149150
150151 static inline bool topology_is_primary_thread(unsigned int cpu)
@@ -156,6 +157,18 @@ static inline bool topology_smt_thread_allowed(unsigned int cpu) · 5 unmodified lines
156157 {
157158 return cpu_thread_in_core(cpu) < cpu_smt_num_threads;
158159 }
160+
161+#define topology_is_core_online topology_is_core_online
162+static inline bool topology_is_core_online(unsigned int cpu)
163+{
164+ int i, first_cpu = cpu_first_thread_sibling(cpu);
165+
166+ for (i = first_cpu; i < first_cpu + threads_per_core; ++i) {
167+ if (cpu_online(i))
168+ return true;
169+ }
170+ return false;
171+}
159172 #endif
160173
161174 #endif /* __KERNEL__ */
arch/powerpc/kernel/setup-common.c+1−0
@@ -959,6 +959,7 @@ void __init setup_arch(char **cmdline_p) · 958 unmodified lines
959959 mem_topology_setup();
960960 /* Set max_mapnr before paging_init() */
961961 set_max_mapnr(max_pfn);
962+ high_memory = (void *)__va(max_low_pfn * PAGE_SIZE);
962963
963964 /*
964965 * Release secondary cpus out of their spinloops at 0x60 now that
arch/powerpc/mm/init-common.c+2−2
@@ -73,7 +73,7 @@ void setup_kup(void) · 72 unmodified lines
7373
7474 #define CTOR(shift) static void ctor_##shift(void *addr) \
7575 { \
76− memset(addr, 0, sizeof(void *) << (shift)); \
76+ memset(addr, 0, sizeof(pgd_t) << (shift)); \
7777 }
7878
7979 CTOR(0); CTOR(1); CTOR(2); CTOR(3); CTOR(4); CTOR(5); CTOR(6); CTOR(7);
@@ -117,7 +117,7 @@ EXPORT_SYMBOL_GPL(pgtable_cache); /* used by kvm_hv module */ · 37 unmodified lines
117117 void pgtable_cache_add(unsigned int shift)
118118 {
119119 char *name;
120− unsigned long table_size = sizeof(void *) << shift;
120+ unsigned long table_size = sizeof(pgd_t) << shift;
121121 unsigned long align = table_size;
122122
123123 /* When batching pgtable pointers for RCU freeing, we store
arch/powerpc/mm/mem.c+0−2
@@ -290,8 +290,6 @@ void __init mem_init(void) · 289 unmodified lines
290290 swiotlb_init(ppc_swiotlb_enable, ppc_swiotlb_flags);
291291 #endif
292292
293− high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
294−
295293 kasan_late_init();
296294
297295 memblock_free_all();
arch/riscv/include/asm/hwprobe.h+1−1
@@ -8,7 +8,7 @@ · 7 unmodified lines
88
99 #include <uapi/asm/hwprobe.h>
1010
11−#define RISCV_HWPROBE_MAX_KEY 8
11+#define RISCV_HWPROBE_MAX_KEY 9
1212
1313 static inline bool riscv_hwprobe_key_is_valid(__s64 key)
1414 {
arch/riscv/include/uapi/asm/hwprobe.h+6−0
@@ -82,6 +82,12 @@ struct riscv_hwprobe { · 81 unmodified lines
8282 #define RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE 6
8383 #define RISCV_HWPROBE_KEY_HIGHEST_VIRT_ADDRESS 7
8484 #define RISCV_HWPROBE_KEY_TIME_CSR_FREQ 8
85+#define RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF 9
86+#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN 0
87+#define RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED 1
88+#define RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW 2
89+#define RISCV_HWPROBE_MISALIGNED_SCALAR_FAST 3
90+#define RISCV_HWPROBE_MISALIGNED_SCALAR_UNSUPPORTED 4
8591 /* Increase RISCV_HWPROBE_MAX_KEY when adding items. */
8692
8793 /* Flags */
arch/riscv/kernel/Makefile.syscalls+1−1
@@ -1,4 +1,4 @@
11 # SPDX-License-Identifier: GPL-2.0
22
33 syscall_abis_32 += riscv memfd_secret
4−syscall_abis_64 += riscv newstat rlimit memfd_secret
4+syscall_abis_64 += riscv rlimit memfd_secret
arch/riscv/kernel/acpi_numa.c+1−1
@@ -28,7 +28,7 @@ · 27 unmodified lines
2828
2929 #include <asm/numa.h>
3030
31−static int acpi_early_node_map[NR_CPUS] __initdata = { NUMA_NO_NODE };
31+static int acpi_early_node_map[NR_CPUS] __initdata = { [0 ... NR_CPUS - 1] = NUMA_NO_NODE };
3232
3333 int __init acpi_numa_get_nid(unsigned int cpu)
3434 {
arch/riscv/kernel/cpufeature.c+6−8
@@ -432,28 +432,26 @@ static void __init riscv_resolve_isa(unsigned long *source_isa, · 431 unmodified lines
432432 bitmap_copy(prev_resolved_isa, resolved_isa, RISCV_ISA_EXT_MAX);
433433 for_each_set_bit(bit, source_isa, RISCV_ISA_EXT_MAX) {
434434 ext = riscv_get_isa_ext_data(bit);
435− if (!ext)
436− continue;
437435
438− if (ext->validate) {
436+ if (ext && ext->validate) {
439437 ret = ext->validate(ext, resolved_isa);
440438 if (ret == -EPROBE_DEFER) {
441439 loop = true;
442440 continue;
443441 } else if (ret) {
444442 /* Disable the extension entirely */
445− clear_bit(ext->id, source_isa);
443+ clear_bit(bit, source_isa);
446444 continue;
447445 }
448446 }
449447
450− set_bit(ext->id, resolved_isa);
448+ set_bit(bit, resolved_isa);
451449 /* No need to keep it in source isa now that it is enabled */
452− clear_bit(ext->id, source_isa);
450+ clear_bit(bit, source_isa);
453451
454452 /* Single letter extensions get set in hwcap */
455− if (ext->id < RISCV_ISA_EXT_BASE)
456− *this_hwcap |= isa2hwcap[ext->id];
453+ if (bit < RISCV_ISA_EXT_BASE)
454+ *this_hwcap |= isa2hwcap[bit];
457455 }
458456 } while (loop && memcmp(prev_resolved_isa, resolved_isa, sizeof(prev_resolved_isa)));
459457 }
arch/riscv/kernel/patch.c+4−0
@@ -205,6 +205,8 @@ int patch_text_set_nosync(void *addr, u8 c, size_t len) · 204 unmodified lines
205205 int ret;
206206
207207 ret = patch_insn_set(addr, c, len);
208+ if (!ret)
209+ flush_icache_range((uintptr_t)addr, (uintptr_t)addr + len);
208210
209211 return ret;
210212 }
@@ -239,6 +241,8 @@ int patch_text_nosync(void *addr, const void *insns, size_t len) · 28 unmodified lines
239241 int ret;
240242
241243 ret = patch_insn_write(addr, insns, len);
244+ if (!ret)
245+ flush_icache_range((uintptr_t)addr, (uintptr_t)addr + len);
242246
243247 return ret;
244248 }
arch/riscv/kernel/sbi-ipi.c+1−1
@@ -71,7 +71,7 @@ void __init sbi_ipi_init(void) · 70 unmodified lines
7171 * the masking/unmasking of virtual IPIs is done
7272 * via generic IPI-Mux
7373 */
74− cpuhp_setup_state(CPUHP_AP_ONLINE_DYN,
74+ cpuhp_setup_state(CPUHP_AP_IRQ_RISCV_SBI_IPI_STARTING,
7575 "irqchip/sbi-ipi:starting",
7676 sbi_ipi_starting_cpu, NULL);
7777
arch/riscv/kernel/sys_hwprobe.c+6−5
@@ -178,13 +178,13 @@ static u64 hwprobe_misaligned(const struct cpumask *cpus) · 177 unmodified lines
178178 perf = this_perf;
179179
180180 if (perf != this_perf) {
181− perf = RISCV_HWPROBE_MISALIGNED_UNKNOWN;
181+ perf = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN;
182182 break;
183183 }
184184 }
185185
186186 if (perf == -1ULL)
187− return RISCV_HWPROBE_MISALIGNED_UNKNOWN;
187+ return RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN;
188188
189189 return perf;
190190 }
@@ -192,12 +192,12 @@ static u64 hwprobe_misaligned(const struct cpumask *cpus) · 1 unmodified line
192192 static u64 hwprobe_misaligned(const struct cpumask *cpus)
193193 {
194194 if (IS_ENABLED(CONFIG_RISCV_EFFICIENT_UNALIGNED_ACCESS))
195− return RISCV_HWPROBE_MISALIGNED_FAST;
195+ return RISCV_HWPROBE_MISALIGNED_SCALAR_FAST;
196196
197197 if (IS_ENABLED(CONFIG_RISCV_EMULATED_UNALIGNED_ACCESS) && unaligned_ctl_available())
198− return RISCV_HWPROBE_MISALIGNED_EMULATED;
198+ return RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED;
199199
200− return RISCV_HWPROBE_MISALIGNED_SLOW;
200+ return RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW;
201201 }
202202 #endif
203203
@@ -225,6 +225,7 @@ static void hwprobe_one_pair(struct riscv_hwprobe *pair, · 21 unmodified lines
225225 break;
226226
227227 case RISCV_HWPROBE_KEY_CPUPERF_0:
228+ case RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF:
228229 pair->value = hwprobe_misaligned(cpus);
229230 break;
230231
arch/riscv/kernel/traps.c+2−2
@@ -319,6 +319,7 @@ void do_trap_ecall_u(struct pt_regs *regs) · 318 unmodified lines
319319
320320 regs->epc += 4;
321321 regs->orig_a0 = regs->a0;
322+ regs->a0 = -ENOSYS;
322323
323324 riscv_v_vstate_discard(regs);
324325
@@ -328,8 +329,7 @@ void do_trap_ecall_u(struct pt_regs *regs) · 3 unmodified lines
328329
329330 if (syscall >= 0 && syscall < NR_syscalls)
330331 syscall_handler(regs, syscall);
331− else if (syscall != -1)
332− regs->a0 = -ENOSYS;
332+
333333 /*
334334 * Ultimately, this value will get limited by KSTACK_OFFSET_MAX(),
335335 * so the maximum stack offset is 1k bytes (10 bits).
arch/riscv/kernel/traps_misaligned.c+3−3
@@ -338,7 +338,7 @@ int handle_misaligned_load(struct pt_regs *regs) · 337 unmodified lines
338338 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
339339
340340 #ifdef CONFIG_RISCV_PROBE_UNALIGNED_ACCESS
341− *this_cpu_ptr(&misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_EMULATED;
341+ *this_cpu_ptr(&misaligned_access_speed) = RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED;
342342 #endif
343343
344344 if (!unaligned_enabled)
@@ -532,13 +532,13 @@ static bool check_unaligned_access_emulated(int cpu) · 187 unmodified lines
532532 unsigned long tmp_var, tmp_val;
533533 bool misaligned_emu_detected;
534534
535− *mas_ptr = RISCV_HWPROBE_MISALIGNED_UNKNOWN;
535+ *mas_ptr = RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN;
536536
537537 __asm__ __volatile__ (
538538 " "REG_L" %[tmp], 1(%[ptr])\n"
539539 : [tmp] "=r" (tmp_val) : [ptr] "r" (&tmp_var) : "memory");
540540
541− misaligned_emu_detected = (*mas_ptr == RISCV_HWPROBE_MISALIGNED_EMULATED);
541+ misaligned_emu_detected = (*mas_ptr == RISCV_HWPROBE_MISALIGNED_SCALAR_EMULATED);
542542 /*
543543 * If unaligned_ctl is already set, this means that we detected that all
544544 * CPUS uses emulated misaligned access at boot time. If that changed
arch/riscv/kernel/unaligned_access_speed.c+6−6
@@ -34,9 +34,9 @@ static int check_unaligned_access(void *param) · 33 unmodified lines
3434 struct page *page = param;
3535 void *dst;
3636 void *src;
37− long speed = RISCV_HWPROBE_MISALIGNED_SLOW;
37+ long speed = RISCV_HWPROBE_MISALIGNED_SCALAR_SLOW;
3838
39− if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_UNKNOWN)
39+ if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN)
4040 return 0;
4141
4242 /* Make an unaligned destination buffer. */
@@ -95,14 +95,14 @@ static int check_unaligned_access(void *param) · 52 unmodified lines
9595 }
9696
9797 if (word_cycles < byte_cycles)
98− speed = RISCV_HWPROBE_MISALIGNED_FAST;
98+ speed = RISCV_HWPROBE_MISALIGNED_SCALAR_FAST;
9999
100100 ratio = div_u64((byte_cycles * 100), word_cycles);
101101 pr_info("cpu%d: Ratio of byte access time to unaligned word access is %d.%02d, unaligned accesses are %s\n",
102102 cpu,
103103 ratio / 100,
104104 ratio % 100,
105− (speed == RISCV_HWPROBE_MISALIGNED_FAST) ? "fast" : "slow");
105+ (speed == RISCV_HWPROBE_MISALIGNED_SCALAR_FAST) ? "fast" : "slow");
106106
107107 per_cpu(misaligned_access_speed, cpu) = speed;
108108
@@ -110,7 +110,7 @@ static int check_unaligned_access(void *param) · 1 unmodified line
110110 * Set the value of fast_misaligned_access of a CPU. These operations
111111 * are atomic to avoid race conditions.
112112 */
113− if (speed == RISCV_HWPROBE_MISALIGNED_FAST)
113+ if (speed == RISCV_HWPROBE_MISALIGNED_SCALAR_FAST)
114114 cpumask_set_cpu(cpu, &fast_misaligned_access);
115115 else
116116 cpumask_clear_cpu(cpu, &fast_misaligned_access);
@@ -188,7 +188,7 @@ static int riscv_online_cpu(unsigned int cpu) · 71 unmodified lines
188188 static struct page *buf;
189189
190190 /* We are already set since the last check */
191− if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_UNKNOWN)
191+ if (per_cpu(misaligned_access_speed, cpu) != RISCV_HWPROBE_MISALIGNED_SCALAR_UNKNOWN)
192192 goto exit;
193193
194194 buf = alloc_pages(GFP_KERNEL, MISALIGNED_BUFFER_ORDER);
arch/riscv/kernel/vendor_extensions.c+1−1
@@ -38,7 +38,7 @@ bool __riscv_isa_vendor_extension_available(int cpu, unsigned long vendor, unsig · 37 unmodified lines
3838 #ifdef CONFIG_RISCV_ISA_VENDOR_EXT_ANDES
3939 case ANDES_VENDOR_ID:
4040 bmap = &riscv_isa_vendor_ext_list_andes.all_harts_isa_bitmap;
41− cpu_bmap = &riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap[cpu];
41+ cpu_bmap = riscv_isa_vendor_ext_list_andes.per_hart_isa_bitmap;
4242 break;
4343 #endif
4444 default:
arch/riscv/mm/fault.c+9−8
@@ -61,26 +61,27 @@ static inline void no_context(struct pt_regs *regs, unsigned long addr) · 60 unmodified lines
6161
6262 static inline void mm_fault_error(struct pt_regs *regs, unsigned long addr, vm_fault_t fault)
6363 {
64+ if (!user_mode(regs)) {
65+ no_context(regs, addr);
66+ return;
67+ }
68+
6469 if (fault & VM_FAULT_OOM) {
6570 /*
6671 * We ran out of memory, call the OOM killer, and return the userspace
6772 * (which will retry the fault, or kill us if we got oom-killed).
6873 */
69− if (!user_mode(regs)) {
70− no_context(regs, addr);
71− return;
72− }
7374 pagefault_out_of_memory();
7475 return;
7576 } else if (fault & (VM_FAULT_SIGBUS | VM_FAULT_HWPOISON | VM_FAULT_HWPOISON_LARGE)) {
7677 /* Kernel mode? Handle exceptions or die */
77− if (!user_mode(regs)) {
78− no_context(regs, addr);
79− return;
80− }
8178 do_trap(regs, SIGBUS, BUS_ADRERR, addr);
8279 return;
80+ } else if (fault & VM_FAULT_SIGSEGV) {
81+ do_trap(regs, SIGSEGV, SEGV_MAPERR, addr);
82+ return;
8383 }
84+
8485 BUG();
8586 }
8687
arch/riscv/mm/init.c+13−6
@@ -234,8 +234,6 @@ static void __init setup_bootmem(void) · 233 unmodified lines
234234 */
235235 memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
236236
237− phys_ram_end = memblock_end_of_DRAM();
238−
239237 /*
240238 * Make sure we align the start of the memory on a PMD boundary so that
241239 * at worst, we map the linear mapping with PMD mappings.
@@ -250,6 +248,16 @@ static void __init setup_bootmem(void) · 8 unmodified lines
250248 if (IS_ENABLED(CONFIG_64BIT) && IS_ENABLED(CONFIG_MMU))
251249 kernel_map.va_pa_offset = PAGE_OFFSET - phys_ram_base;
252250
251+ /*
252+ * The size of the linear page mapping may restrict the amount of
253+ * usable RAM.
254+ */
255+ if (IS_ENABLED(CONFIG_64BIT)) {
256+ max_mapped_addr = __pa(PAGE_OFFSET) + KERN_VIRT_SIZE;
257+ memblock_cap_memory_range(phys_ram_base,
258+ max_mapped_addr - phys_ram_base);
259+ }
260+
253261 /*
254262 * Reserve physical address space that would be mapped to virtual
255263 * addresses greater than (void *)(-PAGE_SIZE) because:
@@ -266,6 +274,7 @@ static void __init setup_bootmem(void) · 10 unmodified lines
266274 memblock_reserve(max_mapped_addr, (phys_addr_t)-max_mapped_addr);
267275 }
268276
277+ phys_ram_end = memblock_end_of_DRAM();
269278 min_low_pfn = PFN_UP(phys_ram_base);
270279 max_low_pfn = max_pfn = PFN_DOWN(phys_ram_end);
271280 high_memory = (void *)(__va(PFN_PHYS(max_low_pfn)));
@@ -918,7 +927,7 @@ static void __init create_kernel_page_table(pgd_t *pgdir, · 646 unmodified lines
918927 PMD_SIZE, PAGE_KERNEL_EXEC);
919928
920929 /* Map the data in RAM */
921− end_va = kernel_map.virt_addr + XIP_OFFSET + kernel_map.size;
930+ end_va = kernel_map.virt_addr + kernel_map.size;
922931 for (va = kernel_map.virt_addr + XIP_OFFSET; va < end_va; va += PMD_SIZE)
923932 create_pgd_mapping(pgdir, va,
924933 kernel_map.phys_addr + (va - (kernel_map.virt_addr + XIP_OFFSET)),
@@ -1087,7 +1096,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa) · 162 unmodified lines
10871096
10881097 phys_ram_base = CONFIG_PHYS_RAM_BASE;
10891098 kernel_map.phys_addr = (uintptr_t)CONFIG_PHYS_RAM_BASE;
1090− kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_sdata);
1099+ kernel_map.size = (uintptr_t)(&_end) - (uintptr_t)(&_start);
10911100
10921101 kernel_map.va_kernel_xip_pa_offset = kernel_map.virt_addr - kernel_map.xiprom;
10931102 #else
@@ -1284,8 +1293,6 @@ static void __init create_linear_mapping_page_table(void) · 190 unmodified lines
12841293 if (start <= __pa(PAGE_OFFSET) &&
12851294 __pa(PAGE_OFFSET) < end)
12861295 start = __pa(PAGE_OFFSET);
1287− if (end >= __pa(PAGE_OFFSET) + memory_limit)
1288− end = __pa(PAGE_OFFSET) + memory_limit;
12891296
12901297 create_linear_mapping_range(start, end, 0, NULL);
12911298 }
arch/riscv/purgatory/entry.S+2−0
@@ -7,6 +7,7 @@ · 6 unmodified lines
77 * Author: Li Zhengyu (lizhengyu3@huawei.com)
88 *
99 */
10+#include <asm/asm.h>
1011 #include <linux/linkage.h>
1112
1213 .text
@@ -34,6 +35,7 @@ SYM_CODE_END(purgatory_start) · 21 unmodified lines
3435
3536 .data
3637
38+.align LGREG
3739 SYM_DATA(riscv_kernel_entry, .quad 0)
3840
3941 .end
arch/s390/Kconfig+13−0
@@ -604,6 +604,19 @@ config RANDOMIZE_BASE · 603 unmodified lines
604604 as a security feature that deters exploit attempts relying on
605605 knowledge of the location of kernel internals.
606606
607+config RANDOMIZE_IDENTITY_BASE
608+ bool "Randomize the address of the identity mapping base"
609+ depends on RANDOMIZE_BASE
610+ default DEBUG_VM
611+ help
612+ The identity mapping base address is pinned to zero by default.
613+ Allow randomization of that base to expose otherwise missed
614+ notion of physical and virtual addresses of data structures.
615+ That does not have any impact on the base address at which the
616+ kernel image is loaded.
617+
618+ If unsure, say N
619+
607620 config KERNEL_IMAGE_BASE
608621 hex "Kernel image base address"
609622 range 0x100000 0x1FFFFFE0000000 if !KASAN
arch/s390/boot/startup.c+32−26
@@ -162,7 +162,7 @@ static void kaslr_adjust_relocs(unsigned long min_addr, unsigned long max_addr, · 161 unmodified lines
162162 loc = (long)*reloc + phys_offset;
163163 if (loc < min_addr || loc > max_addr)
164164 error("64-bit relocation outside of kernel!\n");
165− *(u64 *)loc += offset - __START_KERNEL;
165+ *(u64 *)loc += offset;
166166 }
167167 }
168168
@@ -177,7 +177,7 @@ static void kaslr_adjust_got(unsigned long offset) · 8 unmodified lines
177177 */
178178 for (entry = (u64 *)vmlinux.got_start; entry < (u64 *)vmlinux.got_end; entry++) {
179179 if (*entry)
180− *entry += offset - __START_KERNEL;
180+ *entry += offset;
181181 }
182182 }
183183
@@ -252,7 +252,7 @@ static unsigned long setup_kernel_memory_layout(unsigned long kernel_size) · 68 unmodified lines
252252 vmemmap_size = SECTION_ALIGN_UP(pages) * sizeof(struct page);
253253
254254 /* choose kernel address space layout: 4 or 3 levels. */
255− BUILD_BUG_ON(!IS_ALIGNED(__START_KERNEL, THREAD_SIZE));
255+ BUILD_BUG_ON(!IS_ALIGNED(TEXT_OFFSET, THREAD_SIZE));
256256 BUILD_BUG_ON(!IS_ALIGNED(__NO_KASLR_START_KERNEL, THREAD_SIZE));
257257 BUILD_BUG_ON(__NO_KASLR_END_KERNEL > _REGION1_SIZE);
258258 vsize = get_vmem_size(ident_map_size, vmemmap_size, vmalloc_size, _REGION3_SIZE);
@@ -341,7 +341,8 @@ static unsigned long setup_kernel_memory_layout(unsigned long kernel_size) · 82 unmodified lines
341341 BUILD_BUG_ON(MAX_DCSS_ADDR > (1UL << MAX_PHYSMEM_BITS));
342342 max_mappable = max(ident_map_size, MAX_DCSS_ADDR);
343343 max_mappable = min(max_mappable, vmemmap_start);
344− __identity_base = round_down(vmemmap_start - max_mappable, rte_size);
344+ if (IS_ENABLED(CONFIG_RANDOMIZE_IDENTITY_BASE))
345+ __identity_base = round_down(vmemmap_start - max_mappable, rte_size);
345346
346347 return asce_limit;
347348 }
@@ -388,31 +389,25 @@ static void kaslr_adjust_vmlinux_info(long offset) · 40 unmodified lines
388389 #endif
389390 }
390391
391−static void fixup_vmlinux_info(void)
392−{
393− vmlinux.entry -= __START_KERNEL;
394− kaslr_adjust_vmlinux_info(-__START_KERNEL);
395−}
396−
397392 void startup_kernel(void)
398393 {
399− unsigned long kernel_size = vmlinux.image_size + vmlinux.bss_size;
400− unsigned long nokaslr_offset_phys, kaslr_large_page_offset;
401− unsigned long amode31_lma = 0;
394+ unsigned long vmlinux_size = vmlinux.image_size + vmlinux.bss_size;
395+ unsigned long nokaslr_text_lma, text_lma = 0, amode31_lma = 0;
396+ unsigned long kernel_size = TEXT_OFFSET + vmlinux_size;
397+ unsigned long kaslr_large_page_offset;
402398 unsigned long max_physmem_end;
403399 unsigned long asce_limit;
404400 unsigned long safe_addr;
405401 psw_t psw;
406402
407− fixup_vmlinux_info();
408403 setup_lpp();
409404
410405 /*
411406 * Non-randomized kernel physical start address must be _SEGMENT_SIZE
412407 * aligned (see blow).
413408 */
414− nokaslr_offset_phys = ALIGN(mem_safe_offset(), _SEGMENT_SIZE);
415− safe_addr = PAGE_ALIGN(nokaslr_offset_phys + kernel_size);
409+ nokaslr_text_lma = ALIGN(mem_safe_offset(), _SEGMENT_SIZE);
410+ safe_addr = PAGE_ALIGN(nokaslr_text_lma + vmlinux_size);
416411
417412 /*
418413 * Reserve decompressor memory together with decompression heap,
@@ -456,16 +451,27 @@ void startup_kernel(void) · 37 unmodified lines
456451 */
457452 kaslr_large_page_offset = __kaslr_offset & ~_SEGMENT_MASK;
458453 if (kaslr_enabled()) {
459− unsigned long end = ident_map_size - kaslr_large_page_offset;
454+ unsigned long size = vmlinux_size + kaslr_large_page_offset;
460455
461− __kaslr_offset_phys = randomize_within_range(kernel_size, _SEGMENT_SIZE, 0, end);
456+ text_lma = randomize_within_range(size, _SEGMENT_SIZE, TEXT_OFFSET, ident_map_size);
462457 }
463− if (!__kaslr_offset_phys)
464− __kaslr_offset_phys = nokaslr_offset_phys;
465− __kaslr_offset_phys |= kaslr_large_page_offset;
458+ if (!text_lma)
459+ text_lma = nokaslr_text_lma;
460+ text_lma |= kaslr_large_page_offset;
461+
462+ /*
463+ * [__kaslr_offset_phys..__kaslr_offset_phys + TEXT_OFFSET] region is
464+ * never accessed via the kernel image mapping as per the linker script:
465+ *
466+ * . = TEXT_OFFSET;
467+ *
468+ * Therefore, this region could be used for something else and does
469+ * not need to be reserved. See how it is skipped in setup_vmem().
470+ */
471+ __kaslr_offset_phys = text_lma - TEXT_OFFSET;
466472 kaslr_adjust_vmlinux_info(__kaslr_offset_phys);
467− physmem_reserve(RR_VMLINUX, __kaslr_offset_phys, kernel_size);
468− deploy_kernel((void *)__kaslr_offset_phys);
473+ physmem_reserve(RR_VMLINUX, text_lma, vmlinux_size);
474+ deploy_kernel((void *)text_lma);
469475
470476 /* vmlinux decompression is done, shrink reserved low memory */
471477 physmem_reserve(RR_DECOMPRESSOR, 0, (unsigned long)_decompressor_end);
@@ -488,7 +494,7 @@ void startup_kernel(void) · 16 unmodified lines
488494 amode31_lma = randomize_within_range(vmlinux.amode31_size, PAGE_SIZE, amode31_min, SZ_2G);
489495 }
490496 if (!amode31_lma)
491− amode31_lma = __kaslr_offset_phys - vmlinux.amode31_size;
497+ amode31_lma = text_lma - vmlinux.amode31_size;
492498 physmem_reserve(RR_AMODE31, amode31_lma, vmlinux.amode31_size);
493499
494500 /*
@@ -504,8 +510,8 @@ void startup_kernel(void) · 9 unmodified lines
504510 * - copy_bootdata() must follow setup_vmem() to propagate changes
505511 * to bootdata made by setup_vmem()
506512 */
507− clear_bss_section(__kaslr_offset_phys);
508− kaslr_adjust_relocs(__kaslr_offset_phys, __kaslr_offset_phys + vmlinux.image_size,
513+ clear_bss_section(text_lma);
514+ kaslr_adjust_relocs(text_lma, text_lma + vmlinux.image_size,
509515 __kaslr_offset, __kaslr_offset_phys);
510516 kaslr_adjust_got(__kaslr_offset);
511517 setup_vmem(__kaslr_offset, __kaslr_offset + kernel_size, asce_limit);
arch/s390/boot/vmem.c+12−2
@@ -90,7 +90,7 @@ static void kasan_populate_shadow(unsigned long kernel_start, unsigned long kern · 89 unmodified lines
9090 }
9191 memgap_start = end;
9292 }
93− kasan_populate(kernel_start, kernel_end, POPULATE_KASAN_MAP_SHADOW);
93+ kasan_populate(kernel_start + TEXT_OFFSET, kernel_end, POPULATE_KASAN_MAP_SHADOW);
9494 kasan_populate(0, (unsigned long)__identity_va(0), POPULATE_KASAN_ZERO_SHADOW);
9595 kasan_populate(AMODE31_START, AMODE31_END, POPULATE_KASAN_ZERO_SHADOW);
9696 if (IS_ENABLED(CONFIG_KASAN_VMALLOC)) {
@@ -475,7 +475,17 @@ void setup_vmem(unsigned long kernel_start, unsigned long kernel_end, unsigned l · 378 unmodified lines
475475 (unsigned long)__identity_va(end),
476476 POPULATE_IDENTITY);
477477 }
478− pgtable_populate(kernel_start, kernel_end, POPULATE_KERNEL);
478+
479+ /*
480+ * [kernel_start..kernel_start + TEXT_OFFSET] region is never
481+ * accessed as per the linker script:
482+ *
483+ * . = TEXT_OFFSET;
484+ *
485+ * Therefore, skip mapping TEXT_OFFSET bytes to prevent access to
486+ * [__kaslr_offset_phys..__kaslr_offset_phys + TEXT_OFFSET] region.
487+ */
488+ pgtable_populate(kernel_start + TEXT_OFFSET, kernel_end, POPULATE_KERNEL);
479489 pgtable_populate(AMODE31_START, AMODE31_END, POPULATE_DIRECT);
480490 pgtable_populate(__abs_lowcore, __abs_lowcore + sizeof(struct lowcore),
481491 POPULATE_ABS_LOWCORE);
arch/s390/boot/vmlinux.lds.S+6−1
@@ -109,7 +109,12 @@ SECTIONS · 108 unmodified lines
109109 #ifdef CONFIG_KERNEL_UNCOMPRESSED
110110 . = ALIGN(PAGE_SIZE);
111111 . += AMODE31_SIZE; /* .amode31 section */
112− . = ALIGN(1 << 20); /* _SEGMENT_SIZE */
112+
113+ /*
114+ * Make sure the location counter is not less than TEXT_OFFSET.
115+ * _SEGMENT_SIZE is not available, use ALIGN(1 << 20) instead.
116+ */
117+ . = MAX(TEXT_OFFSET, ALIGN(1 << 20));
113118 #else
114119 . = ALIGN(8);
115120 #endif
arch/s390/include/asm/page.h+2−1
@@ -279,8 +279,9 @@ static inline unsigned long virt_to_pfn(const void *kaddr) · 278 unmodified lines
279279 #define AMODE31_SIZE (3 * PAGE_SIZE)
280280
281281 #define KERNEL_IMAGE_SIZE (512 * 1024 * 1024)
282−#define __START_KERNEL 0x100000
283282 #define __NO_KASLR_START_KERNEL CONFIG_KERNEL_IMAGE_BASE
284283 #define __NO_KASLR_END_KERNEL (__NO_KASLR_START_KERNEL + KERNEL_IMAGE_SIZE)
285284
285+#define TEXT_OFFSET 0x100000
286+
286287 #endif /* _S390_PAGE_H */
arch/s390/include/asm/uv.h+4−1
@@ -441,7 +441,10 @@ static inline int share(unsigned long addr, u16 cmd) · 440 unmodified lines
441441
442442 if (!uv_call(0, (u64)&uvcb))
443443 return 0;
444− return -EINVAL;
444+ pr_err("%s UVC failed (rc: 0x%x, rrc: 0x%x), possible hypervisor bug.\n",
445+ uvcb.header.cmd == UVC_CMD_SET_SHARED_ACCESS ? "Share" : "Unshare",
446+ uvcb.header.rc, uvcb.header.rrc);
447+ panic("System security cannot be guaranteed unless the system panics now.\n");
445448 }
446449
447450 /*
arch/s390/kernel/alternative.h+0−0

Empty file deleted.

arch/s390/kernel/fpu.c+1−1
@@ -113,7 +113,7 @@ void load_fpu_state(struct fpu *state, int flags) · 112 unmodified lines
113113 int mask;
114114
115115 if (flags & KERNEL_FPC)
116− fpu_lfpc(&state->fpc);
116+ fpu_lfpc_safe(&state->fpc);
117117 if (!cpu_has_vx()) {
118118 if (flags & KERNEL_VXR_V0V7)
119119 load_fp_regs_vx(state->vxrs);
arch/s390/kernel/setup.c+18−1
@@ -734,7 +734,23 @@ static void __init memblock_add_physmem_info(void) · 733 unmodified lines
734734 }
735735
736736 /*
737− * Reserve memory used for lowcore/command line/kernel image.
737+ * Reserve memory used for lowcore.
738+ */
739+static void __init reserve_lowcore(void)
740+{
741+ void *lowcore_start = get_lowcore();
742+ void *lowcore_end = lowcore_start + sizeof(struct lowcore);
743+ void *start, *end;
744+
745+ if ((void *)__identity_base < lowcore_end) {
746+ start = max(lowcore_start, (void *)__identity_base);
747+ end = min(lowcore_end, (void *)(__identity_base + ident_map_size));
748+ memblock_reserve(__pa(start), __pa(end));
749+ }
750+}
751+
752+/*
753+ * Reserve memory used for absolute lowcore/command line/kernel image.
738754 */
739755 static void __init reserve_kernel(void)
740756 {
@@ -918,6 +934,7 @@ void __init setup_arch(char **cmdline_p) · 177 unmodified lines
918934
919935 /* Do some memory reservations *before* memory is added to memblock */
920936 reserve_pgtables();
937+ reserve_lowcore();
921938 reserve_kernel();
922939 reserve_initrd();
923940 reserve_certificate_list();
arch/s390/kernel/vmlinux.lds.S+10−9
@@ -39,7 +39,7 @@ PHDRS { · 38 unmodified lines
3939
4040 SECTIONS
4141 {
42− . = __START_KERNEL;
42+ . = TEXT_OFFSET;
4343 .text : {
4444 _stext = .; /* Start of text section */
4545 _text = .; /* Text and read-only data */
@@ -59,14 +59,6 @@ SECTIONS · 13 unmodified lines
5959 } :text = 0x0700
6060
6161 RO_DATA(PAGE_SIZE)
62− .data.rel.ro : {
63− *(.data.rel.ro .data.rel.ro.*)
64− }
65− .got : {
66− __got_start = .;
67− *(.got)
68− __got_end = .;
69− }
7062
7163 . = ALIGN(PAGE_SIZE);
7264 _sdata = .; /* Start of data section */
@@ -80,6 +72,15 @@ SECTIONS · 7 unmodified lines
8072 . = ALIGN(PAGE_SIZE);
8173 __end_ro_after_init = .;
8274
75+ .data.rel.ro : {
76+ *(.data.rel.ro .data.rel.ro.*)
77+ }
78+ .got : {
79+ __got_start = .;
80+ *(.got)
81+ __got_end = .;
82+ }
83+
8384 RW_DATA(0x100, PAGE_SIZE, THREAD_SIZE)
8485 .data.rel : {
8586 *(.data.rel*)
arch/s390/kvm/kvm-s390.h+6−1
@@ -267,7 +267,12 @@ static inline unsigned long kvm_s390_get_gfn_end(struct kvm_memslots *slots) · 266 unmodified lines
267267
268268 static inline u32 kvm_s390_get_gisa_desc(struct kvm *kvm)
269269 {
270− u32 gd = virt_to_phys(kvm->arch.gisa_int.origin);
270+ u32 gd;
271+
272+ if (!kvm->arch.gisa_int.origin)
273+ return 0;
274+
275+ gd = virt_to_phys(kvm->arch.gisa_int.origin);
271276
272277 if (gd && sclp.has_gisaf)
273278 gd |= GISA_FORMAT1;
arch/s390/mm/dump_pagetables.c+79−61
@@ -3,6 +3,7 @@ · 2 unmodified lines
33 #include <linux/ptdump.h>
44 #include <linux/seq_file.h>
55 #include <linux/debugfs.h>
6+#include <linux/sort.h>
67 #include <linux/mm.h>
78 #include <linux/kfence.h>
89 #include <linux/kasan.h>
@@ -15,13 +16,15 @@ · 6 unmodified lines
1516 static unsigned long max_addr;
1617
1718 struct addr_marker {
19+ int is_start;
1820 unsigned long start_address;
1921 const char *name;
2022 };
2123
2224 enum address_markers_idx {
23− IDENTITY_BEFORE_NR = 0,
24− IDENTITY_BEFORE_END_NR,
25+ KVA_NR = 0,
26+ LOWCORE_START_NR,
27+ LOWCORE_END_NR,
2528 AMODE31_START_NR,
2629 AMODE31_END_NR,
2730 KERNEL_START_NR,
@@ -30,8 +33,8 @@ enum address_markers_idx { · 2 unmodified lines
3033 KFENCE_START_NR,
3134 KFENCE_END_NR,
3235 #endif
33− IDENTITY_AFTER_NR,
34− IDENTITY_AFTER_END_NR,
36+ IDENTITY_START_NR,
37+ IDENTITY_END_NR,
3538 VMEMMAP_NR,
3639 VMEMMAP_END_NR,
3740 VMALLOC_NR,
@@ -59,43 +62,44 @@ enum address_markers_idx { · 21 unmodified lines
5962 };
6063
6164 static struct addr_marker address_markers[] = {
62− [IDENTITY_BEFORE_NR] = {0, "Identity Mapping Start"},
63− [IDENTITY_BEFORE_END_NR] = {(unsigned long)_stext, "Identity Mapping End"},
64− [AMODE31_START_NR] = {0, "Amode31 Area Start"},
65− [AMODE31_END_NR] = {0, "Amode31 Area End"},
66− [KERNEL_START_NR] = {(unsigned long)_stext, "Kernel Image Start"},
67− [KERNEL_END_NR] = {(unsigned long)_end, "Kernel Image End"},
65+ [KVA_NR] = {0, 0, "Kernel Virtual Address Space"},
66+ [LOWCORE_START_NR] = {1, 0, "Lowcore Start"},
67+ [LOWCORE_END_NR] = {0, 0, "Lowcore End"},
68+ [IDENTITY_START_NR] = {1, 0, "Identity Mapping Start"},
69+ [IDENTITY_END_NR] = {0, 0, "Identity Mapping End"},
70+ [AMODE31_START_NR] = {1, 0, "Amode31 Area Start"},
71+ [AMODE31_END_NR] = {0, 0, "Amode31 Area End"},
72+ [KERNEL_START_NR] = {1, (unsigned long)_stext, "Kernel Image Start"},
73+ [KERNEL_END_NR] = {0, (unsigned long)_end, "Kernel Image End"},
6874 #ifdef CONFIG_KFENCE
69− [KFENCE_START_NR] = {0, "KFence Pool Start"},
70− [KFENCE_END_NR] = {0, "KFence Pool End"},
75+ [KFENCE_START_NR] = {1, 0, "KFence Pool Start"},
76+ [KFENCE_END_NR] = {0, 0, "KFence Pool End"},
7177 #endif
72− [IDENTITY_AFTER_NR] = {(unsigned long)_end, "Identity Mapping Start"},
73− [IDENTITY_AFTER_END_NR] = {0, "Identity Mapping End"},
74− [VMEMMAP_NR] = {0, "vmemmap Area Start"},
75− [VMEMMAP_END_NR] = {0, "vmemmap Area End"},
76− [VMALLOC_NR] = {0, "vmalloc Area Start"},
77− [VMALLOC_END_NR] = {0, "vmalloc Area End"},
78+ [VMEMMAP_NR] = {1, 0, "vmemmap Area Start"},
79+ [VMEMMAP_END_NR] = {0, 0, "vmemmap Area End"},
80+ [VMALLOC_NR] = {1, 0, "vmalloc Area Start"},
81+ [VMALLOC_END_NR] = {0, 0, "vmalloc Area End"},
7882 #ifdef CONFIG_KMSAN
79− [KMSAN_VMALLOC_SHADOW_START_NR] = {0, "Kmsan vmalloc Shadow Start"},
80− [KMSAN_VMALLOC_SHADOW_END_NR] = {0, "Kmsan vmalloc Shadow End"},
81− [KMSAN_VMALLOC_ORIGIN_START_NR] = {0, "Kmsan vmalloc Origins Start"},
82− [KMSAN_VMALLOC_ORIGIN_END_NR] = {0, "Kmsan vmalloc Origins End"},
83− [KMSAN_MODULES_SHADOW_START_NR] = {0, "Kmsan Modules Shadow Start"},
84− [KMSAN_MODULES_SHADOW_END_NR] = {0, "Kmsan Modules Shadow End"},
85− [KMSAN_MODULES_ORIGIN_START_NR] = {0, "Kmsan Modules Origins Start"},
86− [KMSAN_MODULES_ORIGIN_END_NR] = {0, "Kmsan Modules Origins End"},
83+ [KMSAN_VMALLOC_SHADOW_START_NR] = {1, 0, "Kmsan vmalloc Shadow Start"},
84+ [KMSAN_VMALLOC_SHADOW_END_NR] = {0, 0, "Kmsan vmalloc Shadow End"},
85+ [KMSAN_VMALLOC_ORIGIN_START_NR] = {1, 0, "Kmsan vmalloc Origins Start"},
86+ [KMSAN_VMALLOC_ORIGIN_END_NR] = {0, 0, "Kmsan vmalloc Origins End"},
87+ [KMSAN_MODULES_SHADOW_START_NR] = {1, 0, "Kmsan Modules Shadow Start"},
88+ [KMSAN_MODULES_SHADOW_END_NR] = {0, 0, "Kmsan Modules Shadow End"},
89+ [KMSAN_MODULES_ORIGIN_START_NR] = {1, 0, "Kmsan Modules Origins Start"},
90+ [KMSAN_MODULES_ORIGIN_END_NR] = {0, 0, "Kmsan Modules Origins End"},
8791 #endif
88− [MODULES_NR] = {0, "Modules Area Start"},
89− [MODULES_END_NR] = {0, "Modules Area End"},
90− [ABS_LOWCORE_NR] = {0, "Lowcore Area Start"},
91− [ABS_LOWCORE_END_NR] = {0, "Lowcore Area End"},
92− [MEMCPY_REAL_NR] = {0, "Real Memory Copy Area Start"},
93− [MEMCPY_REAL_END_NR] = {0, "Real Memory Copy Area End"},
92+ [MODULES_NR] = {1, 0, "Modules Area Start"},
93+ [MODULES_END_NR] = {0, 0, "Modules Area End"},
94+ [ABS_LOWCORE_NR] = {1, 0, "Lowcore Area Start"},
95+ [ABS_LOWCORE_END_NR] = {0, 0, "Lowcore Area End"},
96+ [MEMCPY_REAL_NR] = {1, 0, "Real Memory Copy Area Start"},
97+ [MEMCPY_REAL_END_NR] = {0, 0, "Real Memory Copy Area End"},
9498 #ifdef CONFIG_KASAN
95− [KASAN_SHADOW_START_NR] = {KASAN_SHADOW_START, "Kasan Shadow Start"},
96− [KASAN_SHADOW_END_NR] = {KASAN_SHADOW_END, "Kasan Shadow End"},
99+ [KASAN_SHADOW_START_NR] = {1, KASAN_SHADOW_START, "Kasan Shadow Start"},
100+ [KASAN_SHADOW_END_NR] = {0, KASAN_SHADOW_END, "Kasan Shadow End"},
97101 #endif
98− { -1, NULL }
102+ {1, -1UL, NULL}
99103 };
100104
101105 struct pg_state {
@@ -163,6 +167,19 @@ static void note_prot_wx(struct pg_state *st, unsigned long addr) · 61 unmodified lines
163167 st->wx_pages += (addr - st->start_address) / PAGE_SIZE;
164168 }
165169
170+static void note_page_update_state(struct pg_state *st, unsigned long addr, unsigned int prot, int level)
171+{
172+ struct seq_file *m = st->seq;
173+
174+ while (addr >= st->marker[1].start_address) {
175+ st->marker++;
176+ pt_dump_seq_printf(m, "---[ %s ]---\n", st->marker->name);
177+ }
178+ st->start_address = addr;
179+ st->current_prot = prot;
180+ st->level = level;
181+}
182+
166183 static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, u64 val)
167184 {
168185 int width = sizeof(unsigned long) * 2;
@@ -186,9 +203,7 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, · 17 unmodified lines
186203 addr = max_addr;
187204 if (st->level == -1) {
188205 pt_dump_seq_printf(m, "---[ %s ]---\n", st->marker->name);
189− st->start_address = addr;
190− st->current_prot = prot;
191− st->level = level;
206+ note_page_update_state(st, addr, prot, level);
192207 } else if (prot != st->current_prot || level != st->level ||
193208 addr >= st->marker[1].start_address) {
194209 note_prot_wx(st, addr);
@@ -202,13 +217,7 @@ static void note_page(struct ptdump_state *pt_st, unsigned long addr, int level, · 7 unmodified lines
202217 }
203218 pt_dump_seq_printf(m, "%9lu%c ", delta, *unit);
204219 print_prot(m, st->current_prot, st->level);
205− while (addr >= st->marker[1].start_address) {
206− st->marker++;
207− pt_dump_seq_printf(m, "---[ %s ]---\n", st->marker->name);
208− }
209− st->start_address = addr;
210− st->current_prot = prot;
211− st->level = level;
220+ note_page_update_state(st, addr, prot, level);
212221 }
213222 }
214223
@@ -280,22 +289,25 @@ static int ptdump_show(struct seq_file *m, void *v) · 65 unmodified lines
280289 DEFINE_SHOW_ATTRIBUTE(ptdump);
281290 #endif /* CONFIG_PTDUMP_DEBUGFS */
282291
283−/*
284− * Heapsort from lib/sort.c is not a stable sorting algorithm, do a simple
285− * insertion sort to preserve the original order of markers with the same
286− * start address.
287− */
288−static void sort_address_markers(void)
292+static int ptdump_cmp(const void *a, const void *b)
289293 {
290− struct addr_marker tmp;
291− int i, j;
294+ const struct addr_marker *ama = a;
295+ const struct addr_marker *amb = b;
292296
293− for (i = 1; i < ARRAY_SIZE(address_markers) - 1; i++) {
294− tmp = address_markers[i];
295− for (j = i - 1; j >= 0 && address_markers[j].start_address > tmp.start_address; j--)
296− address_markers[j + 1] = address_markers[j];
297− address_markers[j + 1] = tmp;
298− }
297+ if (ama->start_address > amb->start_address)
298+ return 1;
299+ if (ama->start_address < amb->start_address)
300+ return -1;
301+ /*
302+ * If the start addresses of two markers are identical consider the
303+ * marker which defines the start of an area higher than the one which
304+ * defines the end of an area. This keeps pairs of markers sorted.
305+ */
306+ if (ama->is_start)
307+ return 1;
308+ if (amb->is_start)
309+ return -1;
310+ return 0;
299311 }
300312
301313 static int pt_dump_init(void)
@@ -303,6 +315,8 @@ static int pt_dump_init(void) · 1 unmodified line
303315 #ifdef CONFIG_KFENCE
304316 unsigned long kfence_start = (unsigned long)__kfence_pool;
305317 #endif
318+ unsigned long lowcore = (unsigned long)get_lowcore();
319+
306320 /*
307321 * Figure out the maximum virtual address being accessible with the
308322 * kernel ASCE. We need this to keep the page table walker functions
@@ -310,7 +324,10 @@ static int pt_dump_init(void) · 1 unmodified line
310324 */
311325 max_addr = (get_lowcore()->kernel_asce.val & _REGION_ENTRY_TYPE_MASK) >> 2;
312326 max_addr = 1UL << (max_addr * 11 + 31);
313− address_markers[IDENTITY_AFTER_END_NR].start_address = ident_map_size;
327+ address_markers[LOWCORE_START_NR].start_address = lowcore;
328+ address_markers[LOWCORE_END_NR].start_address = lowcore + sizeof(struct lowcore);
329+ address_markers[IDENTITY_START_NR].start_address = __identity_base;
330+ address_markers[IDENTITY_END_NR].start_address = __identity_base + ident_map_size;
314331 address_markers[AMODE31_START_NR].start_address = (unsigned long)__samode31;
315332 address_markers[AMODE31_END_NR].start_address = (unsigned long)__eamode31;
316333 address_markers[MODULES_NR].start_address = MODULES_VADDR;
@@ -337,7 +354,8 @@ static int pt_dump_init(void) · 20 unmodified lines
337354 address_markers[KMSAN_MODULES_ORIGIN_START_NR].start_address = KMSAN_MODULES_ORIGIN_START;
338355 address_markers[KMSAN_MODULES_ORIGIN_END_NR].start_address = KMSAN_MODULES_ORIGIN_END;
339356 #endif
340− sort_address_markers();
357+ sort(address_markers, ARRAY_SIZE(address_markers) - 1,
358+ sizeof(address_markers[0]), ptdump_cmp, NULL);
341359 #ifdef CONFIG_PTDUMP_DEBUGFS
342360 debugfs_create_file("kernel_page_tables", 0400, NULL, NULL, &ptdump_fops);
343361 #endif /* CONFIG_PTDUMP_DEBUGFS */
arch/s390/mm/init.c+2−7
@@ -108,6 +108,8 @@ void mark_rodata_ro(void) · 107 unmodified lines
108108 {
109109 unsigned long size = __end_ro_after_init - __start_ro_after_init;
110110
111+ if (MACHINE_HAS_NX)
112+ system_ctl_set_bit(0, CR0_INSTRUCTION_EXEC_PROTECTION_BIT);
111113 __set_memory_ro(__start_ro_after_init, __end_ro_after_init);
112114 pr_info("Write protected read-only-after-init data: %luk\n", size >> 10);
113115 }
@@ -170,13 +172,6 @@ void __init mem_init(void) · 56 unmodified lines
170172 setup_zero_pages(); /* Setup zeroed pages. */
171173 }
172174
173−void free_initmem(void)
174−{
175− set_memory_rwnx((unsigned long)_sinittext,
176− (unsigned long)(_einittext - _sinittext) >> PAGE_SHIFT);
177− free_initmem_default(POISON_FREE_INITMEM);
178−}
179−
180175 unsigned long memory_block_size_bytes(void)
181176 {
182177 /*
arch/s390/mm/vmem.c+2−11
@@ -661,7 +661,6 @@ void __init vmem_map_init(void) · 660 unmodified lines
661661 {
662662 __set_memory_rox(_stext, _etext);
663663 __set_memory_ro(_etext, __end_rodata);
664− __set_memory_rox(_sinittext, _einittext);
665664 __set_memory_rox(__stext_amode31, __etext_amode31);
666665 /*
667666 * If the BEAR-enhancement facility is not installed the first
@@ -670,16 +669,8 @@ void __init vmem_map_init(void) · 2 unmodified lines
670669 */
671670 if (!static_key_enabled(&cpu_has_bear))
672671 set_memory_x(0, 1);
673− if (debug_pagealloc_enabled()) {
674− /*
675− * Use RELOC_HIDE() as long as __va(0) translates to NULL,
676− * since performing pointer arithmetic on a NULL pointer
677− * has undefined behavior and generates compiler warnings.
678− */
679− __set_memory_4k(__va(0), RELOC_HIDE(__va(0), ident_map_size));
680− }
681− if (MACHINE_HAS_NX)
682− system_ctl_set_bit(0, CR0_INSTRUCTION_EXEC_PROTECTION_BIT);
672+ if (debug_pagealloc_enabled())
673+ __set_memory_4k(__va(0), __va(0) + ident_map_size);
683674 pr_info("Write protected kernel read-only data: %luk\n",
684675 (unsigned long)(__end_rodata - _stext) >> 10);
685676 }
arch/s390/tools/relocs.c+1−1
@@ -280,7 +280,7 @@ static int do_reloc(struct section *sec, Elf_Rel *rel) · 279 unmodified lines
280280 case R_390_GOTOFF64:
281281 break;
282282 case R_390_64:
283− add_reloc(&relocs64, offset - ehdr.e_entry);
283+ add_reloc(&relocs64, offset);
284284 break;
285285 default:
286286 die("Unsupported relocation type: %d\n", r_type);
arch/um/drivers/mconsole_user.c+2−0
@@ -71,7 +71,9 @@ static struct mconsole_command *mconsole_parse(struct mc_request *req) · 70 unmodified lines
7171 return NULL;
7272 }
7373
74+#ifndef MIN
7475 #define MIN(a,b) ((a)<(b) ? (a):(b))
76+#endif
7577
7678 #define STRINGX(x) #x
7779 #define STRING(x) STRINGX(x)
arch/x86/coco/sev/core.c+1−1
@@ -163,7 +163,7 @@ struct sev_config { · 162 unmodified lines
163163 */
164164 use_cas : 1,
165165
166− __reserved : 62;
166+ __reserved : 61;
167167 };
168168
169169 static struct sev_config sev_cfg __read_mostly;
arch/x86/entry/syscalls/syscall_64.tbl+1−1
@@ -344,6 +344,7 @@ · 343 unmodified lines
344344 332 common statx sys_statx
345345 333 common io_pgetevents sys_io_pgetevents
346346 334 common rseq sys_rseq
347+335 common uretprobe sys_uretprobe
347348 # don't use numbers 387 through 423, add new calls after the last
348349 # 'common' entry
349350 424 common pidfd_send_signal sys_pidfd_send_signal
@@ -385,7 +386,6 @@ · 35 unmodified lines
385386 460 common lsm_set_self_attr sys_lsm_set_self_attr
386387 461 common lsm_list_modules sys_lsm_list_modules
387388 462 common mseal sys_mseal
388−467 common uretprobe sys_uretprobe
389389
390390 #
391391 # Due to a historical design error, certain syscalls are numbered differently
arch/x86/events/core.c+12−10
@@ -1520,20 +1520,23 @@ static void x86_pmu_start(struct perf_event *event, int flags) · 1519 unmodified lines
15201520 void perf_event_print_debug(void)
15211521 {
15221522 u64 ctrl, status, overflow, pmc_ctrl, pmc_count, prev_left, fixed;
1523+ unsigned long *cntr_mask, *fixed_cntr_mask;
1524+ struct event_constraint *pebs_constraints;
1525+ struct cpu_hw_events *cpuc;
15231526 u64 pebs, debugctl;
1524− int cpu = smp_processor_id();
1525− struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
1526− unsigned long *cntr_mask = hybrid(cpuc->pmu, cntr_mask);
1527− unsigned long *fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask);
1528− struct event_constraint *pebs_constraints = hybrid(cpuc->pmu, pebs_constraints);
1529− unsigned long flags;
1530− int idx;
1527+ int cpu, idx;
1528+
1529+ guard(irqsave)();
1530+
1531+ cpu = smp_processor_id();
1532+ cpuc = &per_cpu(cpu_hw_events, cpu);
1533+ cntr_mask = hybrid(cpuc->pmu, cntr_mask);
1534+ fixed_cntr_mask = hybrid(cpuc->pmu, fixed_cntr_mask);
1535+ pebs_constraints = hybrid(cpuc->pmu, pebs_constraints);
15311536
15321537 if (!*(u64 *)cntr_mask)
15331538 return;
15341539
1535− local_irq_save(flags);
1536−
15371540 if (x86_pmu.version >= 2) {
15381541 rdmsrl(MSR_CORE_PERF_GLOBAL_CTRL, ctrl);
15391542 rdmsrl(MSR_CORE_PERF_GLOBAL_STATUS, status);
@@ -1577,7 +1580,6 @@ void perf_event_print_debug(void) · 37 unmodified lines
15771580 pr_info("CPU#%d: fixed-PMC%d count: %016llx\n",
15781581 cpu, idx, pmc_count);
15791582 }
1580− local_irq_restore(flags);
15811583 }
15821584
15831585 void x86_pmu_stop(struct perf_event *event, int flags)
arch/x86/events/intel/cstate.c+3−2
@@ -64,7 +64,7 @@ · 63 unmodified lines
6464 * perf code: 0x00
6565 * Available model: SNB,IVB,HSW,BDW,SKL,KNL,GLM,CNL,
6666 * KBL,CML,ICL,ICX,TGL,TNT,RKL,ADL,
67− * RPL,SPR,MTL,ARL,LNL
67+ * RPL,SPR,MTL,ARL,LNL,SRF
6868 * Scope: Package (physical package)
6969 * MSR_PKG_C3_RESIDENCY: Package C3 Residency Counter.
7070 * perf code: 0x01
@@ -693,7 +693,8 @@ static const struct cstate_model srf_cstates __initconst = { · 622 unmodified lines
693693 .core_events = BIT(PERF_CSTATE_CORE_C1_RES) |
694694 BIT(PERF_CSTATE_CORE_C6_RES),
695695
696− .pkg_events = BIT(PERF_CSTATE_PKG_C6_RES),
696+ .pkg_events = BIT(PERF_CSTATE_PKG_C2_RES) |
697+ BIT(PERF_CSTATE_PKG_C6_RES),
697698
698699 .module_events = BIT(PERF_CSTATE_MODULE_C6_RES),
699700 };
arch/x86/include/asm/cmdline.h+4−0
@@ -2,6 +2,10 @@ · 1 unmodified line
22 #ifndef _ASM_X86_CMDLINE_H
33 #define _ASM_X86_CMDLINE_H
44
5+#include <asm/setup.h>
6+
7+extern char builtin_cmdline[COMMAND_LINE_SIZE];
8+
59 int cmdline_find_option_bool(const char *cmdline_ptr, const char *option);
610 int cmdline_find_option(const char *cmdline_ptr, const char *option,
711 char *buffer, int bufsize);
arch/x86/include/asm/kvm_host.h+3−0
@@ -1305,6 +1305,7 @@ struct kvm_arch { · 1304 unmodified lines
13051305 u8 vm_type;
13061306 bool has_private_mem;
13071307 bool has_protected_state;
1308+ bool pre_fault_allowed;
13081309 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
13091310 struct list_head active_mmu_pages;
13101311 struct list_head zapped_obsolete_pages;
@@ -2191,6 +2192,8 @@ void kvm_configure_mmu(bool enable_tdp, int tdp_forced_root_level, · 880 unmodified lines
21912192 #define kvm_arch_has_private_mem(kvm) false
21922193 #endif
21932194
2195+#define kvm_arch_has_readonly_mem(kvm) (!(kvm)->arch.has_protected_state)
2196+
21942197 static inline u16 kvm_read_ldt(void)
21952198 {
21962199 u16 ldt;
arch/x86/include/asm/qspinlock.h+7−5
@@ -66,13 +66,15 @@ static inline bool vcpu_is_preempted(long cpu) · 65 unmodified lines
6666
6767 #ifdef CONFIG_PARAVIRT
6868 /*
69− * virt_spin_lock_key - enables (by default) the virt_spin_lock() hijack.
69+ * virt_spin_lock_key - disables by default the virt_spin_lock() hijack.
7070 *
71− * Native (and PV wanting native due to vCPU pinning) should disable this key.
72− * It is done in this backwards fashion to only have a single direction change,
73− * which removes ordering between native_pv_spin_init() and HV setup.
71+ * Native (and PV wanting native due to vCPU pinning) should keep this key
72+ * disabled. Native does not touch the key.
73+ *
74+ * When in a guest then native_pv_lock_init() enables the key first and
75+ * KVM/XEN might conditionally disable it later in the boot process again.
7476 */
75−DECLARE_STATIC_KEY_TRUE(virt_spin_lock_key);
77+DECLARE_STATIC_KEY_FALSE(virt_spin_lock_key);
7678
7779 /*
7880 * Shortcut for the queued_spin_lock_slowpath() function that allows
arch/x86/kernel/acpi/madt_wakeup.c+1−1
@@ -19,7 +19,7 @@ · 18 unmodified lines
1919 static u64 acpi_mp_wake_mailbox_paddr __ro_after_init;
2020
2121 /* Virtual address of the Multiprocessor Wakeup Structure mailbox */
22−static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox __ro_after_init;
22+static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox;
2323
2424 static u64 acpi_mp_pgd __ro_after_init;
2525 static u64 acpi_mp_reset_vector_paddr __ro_after_init;
arch/x86/kernel/cpu/amd.c+1−1
@@ -462,7 +462,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c) · 461 unmodified lines
462462 switch (c->x86_model) {
463463 case 0x00 ... 0x2f:
464464 case 0x40 ... 0x4f:
465− case 0x70 ... 0x7f:
465+ case 0x60 ... 0x7f:
466466 setup_force_cpu_cap(X86_FEATURE_ZEN5);
467467 break;
468468 default:
arch/x86/kernel/cpu/aperfmperf.c+4−2
@@ -306,7 +306,7 @@ static void freq_invariance_enable(void) · 305 unmodified lines
306306 WARN_ON_ONCE(1);
307307 return;
308308 }
309− static_branch_enable(&arch_scale_freq_key);
309+ static_branch_enable_cpuslocked(&arch_scale_freq_key);
310310 register_freq_invariance_syscore_ops();
311311 pr_info("Estimated ratio of average max frequency by base frequency (times 1024): %llu\n", arch_max_freq_ratio);
312312 }
@@ -323,8 +323,10 @@ static void __init bp_init_freq_invariance(void) · 10 unmodified lines
323323 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
324324 return;
325325
326− if (intel_set_max_freq_ratio())
326+ if (intel_set_max_freq_ratio()) {
327+ guard(cpus_read_lock)();
327328 freq_invariance_enable();
329+ }
328330 }
329331
330332 static void disable_freq_invariance_workfn(struct work_struct *work)
arch/x86/kernel/cpu/mtrr/mtrr.c+1−1
@@ -609,7 +609,7 @@ void mtrr_save_state(void) · 608 unmodified lines
609609 {
610610 int first_cpu;
611611
612− if (!mtrr_enabled())
612+ if (!mtrr_enabled() || !mtrr_state.have_fixed)
613613 return;
614614
615615 first_cpu = cpumask_first(cpu_online_mask);
arch/x86/kernel/paravirt.c+3−4
@@ -51,13 +51,12 @@ DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text); · 50 unmodified lines
5151 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
5252 #endif
5353
54−DEFINE_STATIC_KEY_TRUE(virt_spin_lock_key);
54+DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key);
5555
5656 void __init native_pv_lock_init(void)
5757 {
58− if (IS_ENABLED(CONFIG_PARAVIRT_SPINLOCKS) &&
59− !boot_cpu_has(X86_FEATURE_HYPERVISOR))
60− static_branch_disable(&virt_spin_lock_key);
58+ if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
59+ static_branch_enable(&virt_spin_lock_key);
6160 }
6261
6362 static void native_tlb_remove_table(struct mmu_gather *tlb, void *table)
arch/x86/kernel/setup.c+1−1
@@ -164,7 +164,7 @@ unsigned long saved_video_mode; · 163 unmodified lines
164164
165165 static char __initdata command_line[COMMAND_LINE_SIZE];
166166 #ifdef CONFIG_CMDLINE_BOOL
167−static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
167+char builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE;
168168 bool builtin_cmdline_added __ro_after_init;
169169 #endif
170170
arch/x86/kvm/Kconfig+2−2
@@ -141,8 +141,8 @@ config KVM_AMD_SEV · 140 unmodified lines
141141 depends on CRYPTO_DEV_SP_PSP && !(KVM_AMD=y && CRYPTO_DEV_CCP_DD=m)
142142 select ARCH_HAS_CC_PLATFORM
143143 select KVM_GENERIC_PRIVATE_MEM
144− select HAVE_KVM_GMEM_PREPARE
145− select HAVE_KVM_GMEM_INVALIDATE
144+ select HAVE_KVM_ARCH_GMEM_PREPARE
145+ select HAVE_KVM_ARCH_GMEM_INVALIDATE
146146 help
147147 Provides support for launching Encrypted VMs (SEV) and Encrypted VMs
148148 with Encrypted State (SEV-ES) on AMD processors.
arch/x86/kvm/hyperv.h+0−1
@@ -286,7 +286,6 @@ static inline int kvm_hv_hypercall(struct kvm_vcpu *vcpu) · 285 unmodified lines
286286 return HV_STATUS_ACCESS_DENIED;
287287 }
288288 static inline void kvm_hv_vcpu_purge_flush_tlb(struct kvm_vcpu *vcpu) {}
289−static inline void kvm_hv_free_pa_page(struct kvm *kvm) {}
290289 static inline bool kvm_hv_synic_has_vector(struct kvm_vcpu *vcpu, int vector)
291290 {
292291 return false;
arch/x86/kvm/lapic.c+16−8
@@ -351,10 +351,8 @@ static void kvm_recalculate_logical_map(struct kvm_apic_map *new, · 350 unmodified lines
351351 * reversing the LDR calculation to get cluster of APICs, i.e. no
352352 * additional work is required.
353353 */
354− if (apic_x2apic_mode(apic)) {
355− WARN_ON_ONCE(ldr != kvm_apic_calc_x2apic_ldr(kvm_x2apic_id(apic)));
354+ if (apic_x2apic_mode(apic))
356355 return;
357− }
358356
359357 if (WARN_ON_ONCE(!kvm_apic_map_get_logical_dest(new, ldr,
360358 &cluster, &mask))) {
@@ -1743,7 +1741,7 @@ static void limit_periodic_timer_frequency(struct kvm_lapic *apic) · 1382 unmodified lines
17431741 s64 min_period = min_timer_period_us * 1000LL;
17441742
17451743 if (apic->lapic_timer.period < min_period) {
1746− pr_info_ratelimited(
1744+ pr_info_once(
17471745 "vcpu %i: requested %lld ns "
17481746 "lapic timer period limited to %lld ns\n",
17491747 apic->vcpu->vcpu_id,
@@ -2966,18 +2964,28 @@ static int kvm_apic_state_fixup(struct kvm_vcpu *vcpu, · 1216 unmodified lines
29662964 struct kvm_lapic_state *s, bool set)
29672965 {
29682966 if (apic_x2apic_mode(vcpu->arch.apic)) {
2967+ u32 x2apic_id = kvm_x2apic_id(vcpu->arch.apic);
29692968 u32 *id = (u32 *)(s->regs + APIC_ID);
29702969 u32 *ldr = (u32 *)(s->regs + APIC_LDR);
29712970 u64 icr;
29722971
29732972 if (vcpu->kvm->arch.x2apic_format) {
2974− if (*id != vcpu->vcpu_id)
2973+ if (*id != x2apic_id)
29752974 return -EINVAL;
29762975 } else {
2976+ /*
2977+ * Ignore the userspace value when setting APIC state.
2978+ * KVM's model is that the x2APIC ID is readonly, e.g.
2979+ * KVM only supports delivering interrupts to KVM's
2980+ * version of the x2APIC ID. However, for backwards
2981+ * compatibility, don't reject attempts to set a
2982+ * mismatched ID for userspace that hasn't opted into
2983+ * x2apic_format.
2984+ */
29772985 if (set)
2978− *id >>= 24;
2986+ *id = x2apic_id;
29792987 else
2980− *id <<= 24;
2988+ *id = x2apic_id << 24;
29812989 }
29822990
29832991 /*
@@ -2986,7 +2994,7 @@ static int kvm_apic_state_fixup(struct kvm_vcpu *vcpu, · 2 unmodified lines
29862994 * split to ICR+ICR2 in userspace for backwards compatibility.
29872995 */
29882996 if (set) {
2989− *ldr = kvm_apic_calc_x2apic_ldr(*id);
2997+ *ldr = kvm_apic_calc_x2apic_ldr(x2apic_id);
29902998
29912999 icr = __kvm_lapic_get_reg(s->regs, APIC_ICR) |
29923000 (u64)__kvm_lapic_get_reg(s->regs, APIC_ICR2) << 32;
arch/x86/kvm/mmu/mmu.c+5−2
@@ -4335,7 +4335,7 @@ static u8 kvm_max_private_mapping_level(struct kvm *kvm, kvm_pfn_t pfn, · 4334 unmodified lines
43354335 if (req_max_level)
43364336 max_level = min(max_level, req_max_level);
43374337
4338− return req_max_level;
4338+ return max_level;
43394339 }
43404340
43414341 static int kvm_faultin_pfn_private(struct kvm_vcpu *vcpu,
@@ -4743,6 +4743,9 @@ long kvm_arch_vcpu_pre_fault_memory(struct kvm_vcpu *vcpu, · 401 unmodified lines
47434743 u64 end;
47444744 int r;
47454745
4746+ if (!vcpu->kvm->arch.pre_fault_allowed)
4747+ return -EOPNOTSUPP;
4748+
47464749 /*
47474750 * reload is efficient when called repeatedly, so we can do it on
47484751 * every iteration.
@@ -7510,7 +7513,7 @@ static bool hugepage_has_attrs(struct kvm *kvm, struct kvm_memory_slot *slot, · 2761 unmodified lines
75107513 const unsigned long end = start + KVM_PAGES_PER_HPAGE(level);
75117514
75127515 if (level == PG_LEVEL_2M)
7513− return kvm_range_has_memory_attributes(kvm, start, end, attrs);
7516+ return kvm_range_has_memory_attributes(kvm, start, end, ~0, attrs);
75147517
75157518 for (gfn = start; gfn < end; gfn += KVM_PAGES_PER_HPAGE(level - 1)) {
75167519 if (hugepage_test_mixed(slot, gfn, level - 1) ||
arch/x86/kvm/svm/sev.c+13−11
@@ -2276,30 +2276,24 @@ static int sev_gmem_post_populate(struct kvm *kvm, gfn_t gfn_start, kvm_pfn_t pf · 2275 unmodified lines
22762276
22772277 for (gfn = gfn_start, i = 0; gfn < gfn_start + npages; gfn++, i++) {
22782278 struct sev_data_snp_launch_update fw_args = {0};
2279− bool assigned;
2279+ bool assigned = false;
22802280 int level;
22812281
2282− if (!kvm_mem_is_private(kvm, gfn)) {
2283− pr_debug("%s: Failed to ensure GFN 0x%llx has private memory attribute set\n",
2284− __func__, gfn);
2285− ret = -EINVAL;
2286− goto err;
2287− }
2288−
22892282 ret = snp_lookup_rmpentry((u64)pfn + i, &assigned, &level);
22902283 if (ret || assigned) {
22912284 pr_debug("%s: Failed to ensure GFN 0x%llx RMP entry is initial shared state, ret: %d assigned: %d\n",
22922285 __func__, gfn, ret, assigned);
2293− ret = -EINVAL;
2286+ ret = ret ? -EINVAL : -EEXIST;
22942287 goto err;
22952288 }
22962289
22972290 if (src) {
22982291 void *vaddr = kmap_local_pfn(pfn + i);
22992292
2300− ret = copy_from_user(vaddr, src + i * PAGE_SIZE, PAGE_SIZE);
2301− if (ret)
2293+ if (copy_from_user(vaddr, src + i * PAGE_SIZE, PAGE_SIZE)) {
2294+ ret = -EFAULT;
23022295 goto err;
2296+ }
23032297 kunmap_local(vaddr);
23042298 }
23052299
@@ -2549,6 +2543,14 @@ static int snp_launch_finish(struct kvm *kvm, struct kvm_sev_cmd *argp) · 243 unmodified lines
25492543 data->gctx_paddr = __psp_pa(sev->snp_context);
25502544 ret = sev_issue_cmd(kvm, SEV_CMD_SNP_LAUNCH_FINISH, data, &argp->error);
25512545
2546+ /*
2547+ * Now that there will be no more SNP_LAUNCH_UPDATE ioctls, private pages
2548+ * can be given to the guest simply by marking the RMP entry as private.
2549+ * This can happen on first access and also with KVM_PRE_FAULT_MEMORY.
2550+ */
2551+ if (!ret)
2552+ kvm->arch.pre_fault_allowed = true;
2553+
25522554 kfree(id_auth);
25532555
25542556 e_free_id_block:
arch/x86/kvm/svm/svm.c+1−0
@@ -4949,6 +4949,7 @@ static int svm_vm_init(struct kvm *kvm) · 4948 unmodified lines
49494949 to_kvm_sev_info(kvm)->need_init = true;
49504950
49514951 kvm->arch.has_private_mem = (type == KVM_X86_SNP_VM);
4952+ kvm->arch.pre_fault_allowed = !kvm->arch.has_private_mem;
49524953 }
49534954
49544955 if (!pause_filter_count || !pause_filter_thresh)
arch/x86/kvm/x86.c+7−11
@@ -427,8 +427,7 @@ static void kvm_user_return_msr_cpu_online(void) · 426 unmodified lines
427427
428428 int kvm_set_user_return_msr(unsigned slot, u64 value, u64 mask)
429429 {
430− unsigned int cpu = smp_processor_id();
431− struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
430+ struct kvm_user_return_msrs *msrs = this_cpu_ptr(user_return_msrs);
432431 int err;
433432
434433 value = (value & mask) | (msrs->values[slot].host & ~mask);
@@ -450,8 +449,7 @@ EXPORT_SYMBOL_GPL(kvm_set_user_return_msr); · 15 unmodified lines
450449
451450 static void drop_user_return_notifiers(void)
452451 {
453− unsigned int cpu = smp_processor_id();
454− struct kvm_user_return_msrs *msrs = per_cpu_ptr(user_return_msrs, cpu);
452+ struct kvm_user_return_msrs *msrs = this_cpu_ptr(user_return_msrs);
455453
456454 if (msrs->registered)
457455 kvm_on_user_return(&msrs->urn);
@@ -12646,6 +12644,9 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) · 12188 unmodified lines
1264612644 kvm->arch.vm_type = type;
1264712645 kvm->arch.has_private_mem =
1264812646 (type == KVM_X86_SW_PROTECTED_VM);
12647+ /* Decided by the vendor code for other VM types. */
12648+ kvm->arch.pre_fault_allowed =
12649+ type == KVM_X86_DEFAULT_VM || type == KVM_X86_SW_PROTECTED_VM;
1264912650
1265012651 ret = kvm_page_track_init(kvm);
1265112652 if (ret)
@@ -13641,19 +13642,14 @@ bool kvm_arch_no_poll(struct kvm_vcpu *vcpu) · 989 unmodified lines
1364113642 }
1364213643 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
1364313644
13644−#ifdef CONFIG_HAVE_KVM_GMEM_PREPARE
13645−bool kvm_arch_gmem_prepare_needed(struct kvm *kvm)
13646−{
13647− return kvm->arch.vm_type == KVM_X86_SNP_VM;
13648−}
13649−
13645+#ifdef CONFIG_HAVE_KVM_ARCH_GMEM_PREPARE
1365013646 int kvm_arch_gmem_prepare(struct kvm *kvm, gfn_t gfn, kvm_pfn_t pfn, int max_order)
1365113647 {
1365213648 return kvm_x86_call(gmem_prepare)(kvm, pfn, gfn, max_order);
1365313649 }
1365413650 #endif
1365513651
13656−#ifdef CONFIG_HAVE_KVM_GMEM_INVALIDATE
13652+#ifdef CONFIG_HAVE_KVM_ARCH_GMEM_INVALIDATE
1365713653 void kvm_arch_gmem_invalidate(kvm_pfn_t start, kvm_pfn_t end)
1365813654 {
1365913655 kvm_x86_call(gmem_invalidate)(start, end);
arch/x86/lib/cmdline.c+18−7
@@ -207,18 +207,29 @@ __cmdline_find_option(const char *cmdline, int max_cmdline_size, · 206 unmodified lines
207207
208208 int cmdline_find_option_bool(const char *cmdline, const char *option)
209209 {
210− if (IS_ENABLED(CONFIG_CMDLINE_BOOL))
211− WARN_ON_ONCE(!builtin_cmdline_added);
210+ int ret;
212211
213− return __cmdline_find_option_bool(cmdline, COMMAND_LINE_SIZE, option);
212+ ret = __cmdline_find_option_bool(cmdline, COMMAND_LINE_SIZE, option);
213+ if (ret > 0)
214+ return ret;
215+
216+ if (IS_ENABLED(CONFIG_CMDLINE_BOOL) && !builtin_cmdline_added)
217+ return __cmdline_find_option_bool(builtin_cmdline, COMMAND_LINE_SIZE, option);
218+
219+ return ret;
214220 }
215221
216222 int cmdline_find_option(const char *cmdline, const char *option, char *buffer,
217223 int bufsize)
218224 {
219− if (IS_ENABLED(CONFIG_CMDLINE_BOOL))
220− WARN_ON_ONCE(!builtin_cmdline_added);
225+ int ret;
226+
227+ ret = __cmdline_find_option(cmdline, COMMAND_LINE_SIZE, option, buffer, bufsize);
228+ if (ret > 0)
229+ return ret;
230+
231+ if (IS_ENABLED(CONFIG_CMDLINE_BOOL) && !builtin_cmdline_added)
232+ return __cmdline_find_option(builtin_cmdline, COMMAND_LINE_SIZE, option, buffer, bufsize);
221233
222− return __cmdline_find_option(cmdline, COMMAND_LINE_SIZE, option,
223− buffer, bufsize);
234+ return ret;
224235 }
arch/x86/lib/getuser.S+3−1
@@ -88,12 +88,14 @@ SYM_FUNC_END(__get_user_4) · 87 unmodified lines
8888 EXPORT_SYMBOL(__get_user_4)
8989
9090 SYM_FUNC_START(__get_user_8)
91+#ifndef CONFIG_X86_64
92+ xor %ecx,%ecx
93+#endif
9194 check_range size=8
9295 ASM_STAC
9396 #ifdef CONFIG_X86_64
9497 UACCESS movq (%_ASM_AX),%rdx
9598 #else
96− xor %ecx,%ecx
9799 UACCESS movl (%_ASM_AX),%edx
98100 UACCESS movl 4(%_ASM_AX),%ecx
99101 #endif
arch/x86/mm/pti.c+32−19
@@ -241,7 +241,7 @@ static pmd_t *pti_user_pagetable_walk_pmd(unsigned long address) · 240 unmodified lines
241241 *
242242 * Returns a pointer to a PTE on success, or NULL on failure.
243243 */
244−static pte_t *pti_user_pagetable_walk_pte(unsigned long address)
244+static pte_t *pti_user_pagetable_walk_pte(unsigned long address, bool late_text)
245245 {
246246 gfp_t gfp = (GFP_KERNEL | __GFP_NOTRACK | __GFP_ZERO);
247247 pmd_t *pmd;
@@ -251,10 +251,15 @@ static pte_t *pti_user_pagetable_walk_pte(unsigned long address) · 3 unmodified lines
251251 if (!pmd)
252252 return NULL;
253253
254− /* We can't do anything sensible if we hit a large mapping. */
254+ /* Large PMD mapping found */
255255 if (pmd_leaf(*pmd)) {
256− WARN_ON(1);
257− return NULL;
256+ /* Clear the PMD if we hit a large mapping from the first round */
257+ if (late_text) {
258+ set_pmd(pmd, __pmd(0));
259+ } else {
260+ WARN_ON_ONCE(1);
261+ return NULL;
262+ }
258263 }
259264
260265 if (pmd_none(*pmd)) {
@@ -283,7 +288,7 @@ static void __init pti_setup_vsyscall(void) · 22 unmodified lines
283288 if (!pte || WARN_ON(level != PG_LEVEL_4K) || pte_none(*pte))
284289 return;
285290
286− target_pte = pti_user_pagetable_walk_pte(VSYSCALL_ADDR);
291+ target_pte = pti_user_pagetable_walk_pte(VSYSCALL_ADDR, false);
287292 if (WARN_ON(!target_pte))
288293 return;
289294
@@ -301,7 +306,7 @@ enum pti_clone_level { · 11 unmodified lines
301306
302307 static void
303308 pti_clone_pgtable(unsigned long start, unsigned long end,
304− enum pti_clone_level level)
309+ enum pti_clone_level level, bool late_text)
305310 {
306311 unsigned long addr;
307312
@@ -374,14 +379,14 @@ pti_clone_pgtable(unsigned long start, unsigned long end, · 66 unmodified lines
374379 */
375380 *target_pmd = *pmd;
376381
377− addr += PMD_SIZE;
382+ addr = round_up(addr + 1, PMD_SIZE);
378383
379384 } else if (level == PTI_CLONE_PTE) {
380385
381386 /* Walk the page-table down to the pte level */
382387 pte = pte_offset_kernel(pmd, addr);
383388 if (pte_none(*pte)) {
384− addr += PAGE_SIZE;
389+ addr = round_up(addr + 1, PAGE_SIZE);
385390 continue;
386391 }
387392
@@ -390,7 +395,7 @@ pti_clone_pgtable(unsigned long start, unsigned long end, · 2 unmodified lines
390395 return;
391396
392397 /* Allocate PTE in the user page-table */
393− target_pte = pti_user_pagetable_walk_pte(addr);
398+ target_pte = pti_user_pagetable_walk_pte(addr, late_text);
394399 if (WARN_ON(!target_pte))
395400 return;
396401
@@ -401,7 +406,7 @@ pti_clone_pgtable(unsigned long start, unsigned long end, · 4 unmodified lines
401406 /* Clone the PTE */
402407 *target_pte = *pte;
403408
404− addr += PAGE_SIZE;
409+ addr = round_up(addr + 1, PAGE_SIZE);
405410
406411 } else {
407412 BUG();
@@ -452,7 +457,7 @@ static void __init pti_clone_user_shared(void) · 44 unmodified lines
452457 phys_addr_t pa = per_cpu_ptr_to_phys((void *)va);
453458 pte_t *target_pte;
454459
455− target_pte = pti_user_pagetable_walk_pte(va);
460+ target_pte = pti_user_pagetable_walk_pte(va, false);
456461 if (WARN_ON(!target_pte))
457462 return;
458463
@@ -475,7 +480,7 @@ static void __init pti_clone_user_shared(void) · 16 unmodified lines
475480 start = CPU_ENTRY_AREA_BASE;
476481 end = start + (PAGE_SIZE * CPU_ENTRY_AREA_PAGES);
477482
478− pti_clone_pgtable(start, end, PTI_CLONE_PMD);
483+ pti_clone_pgtable(start, end, PTI_CLONE_PMD, false);
479484 }
480485 #endif /* CONFIG_X86_64 */
481486
@@ -492,11 +497,11 @@ static void __init pti_setup_espfix64(void) · 10 unmodified lines
492497 /*
493498 * Clone the populated PMDs of the entry text and force it RO.
494499 */
495−static void pti_clone_entry_text(void)
500+static void pti_clone_entry_text(bool late)
496501 {
497502 pti_clone_pgtable((unsigned long) __entry_text_start,
498503 (unsigned long) __entry_text_end,
499− PTI_CLONE_PMD);
504+ PTI_LEVEL_KERNEL_IMAGE, late);
500505 }
501506
502507 /*
@@ -571,7 +576,7 @@ static void pti_clone_kernel_text(void) · 68 unmodified lines
571576 * pti_set_kernel_image_nonglobal() did to clear the
572577 * global bit.
573578 */
574− pti_clone_pgtable(start, end_clone, PTI_LEVEL_KERNEL_IMAGE);
579+ pti_clone_pgtable(start, end_clone, PTI_LEVEL_KERNEL_IMAGE, false);
575580
576581 /*
577582 * pti_clone_pgtable() will set the global bit in any PMDs
@@ -638,8 +643,15 @@ void __init pti_init(void) · 60 unmodified lines
638643
639644 /* Undo all global bits from the init pagetables in head_64.S: */
640645 pti_set_kernel_image_nonglobal();
646+
641647 /* Replace some of the global bits just for shared entry text: */
642− pti_clone_entry_text();
648+ /*
649+ * This is very early in boot. Device and Late initcalls can do
650+ * modprobe before free_initmem() and mark_readonly(). This
651+ * pti_clone_entry_text() allows those user-mode-helpers to function,
652+ * but notably the text is still RW.
653+ */
654+ pti_clone_entry_text(false);
643655 pti_setup_espfix64();
644656 pti_setup_vsyscall();
645657 }
@@ -656,10 +668,11 @@ void pti_finalize(void) · 10 unmodified lines
656668 if (!boot_cpu_has(X86_FEATURE_PTI))
657669 return;
658670 /*
659− * We need to clone everything (again) that maps parts of the
660− * kernel image.
671+ * This is after free_initmem() (all initcalls are done) and we've done
672+ * mark_readonly(). Text is now NX which might've split some PMDs
673+ * relative to the early clone.
661674 */
662− pti_clone_entry_text();
675+ pti_clone_entry_text(true);
663676 pti_clone_kernel_text();
664677
665678 debug_checkwx_user();
block/blk-lib.c+17−6
@@ -111,13 +111,20 @@ static sector_t bio_write_zeroes_limit(struct block_device *bdev) · 110 unmodified lines
111111 (UINT_MAX >> SECTOR_SHIFT) & ~bs_mask);
112112 }
113113
114+/*
115+ * There is no reliable way for the SCSI subsystem to determine whether a
116+ * device supports a WRITE SAME operation without actually performing a write
117+ * to media. As a result, write_zeroes is enabled by default and will be
118+ * disabled if a zeroing operation subsequently fails. This means that this
119+ * queue limit is likely to change at runtime.
120+ */
114121 static void __blkdev_issue_write_zeroes(struct block_device *bdev,
115122 sector_t sector, sector_t nr_sects, gfp_t gfp_mask,
116− struct bio **biop, unsigned flags)
123+ struct bio **biop, unsigned flags, sector_t limit)
117124 {
125+
118126 while (nr_sects) {
119− unsigned int len = min_t(sector_t, nr_sects,
120− bio_write_zeroes_limit(bdev));
127+ unsigned int len = min(nr_sects, limit);
121128 struct bio *bio;
122129
123130 if ((flags & BLKDEV_ZERO_KILLABLE) &&
@@ -141,12 +148,14 @@ static void __blkdev_issue_write_zeroes(struct block_device *bdev, · 17 unmodified lines
141148 static int blkdev_issue_write_zeroes(struct block_device *bdev, sector_t sector,
142149 sector_t nr_sects, gfp_t gfp, unsigned flags)
143150 {
151+ sector_t limit = bio_write_zeroes_limit(bdev);
144152 struct bio *bio = NULL;
145153 struct blk_plug plug;
146154 int ret = 0;
147155
148156 blk_start_plug(&plug);
149− __blkdev_issue_write_zeroes(bdev, sector, nr_sects, gfp, &bio, flags);
157+ __blkdev_issue_write_zeroes(bdev, sector, nr_sects, gfp, &bio,
158+ flags, limit);
150159 if (bio) {
151160 if ((flags & BLKDEV_ZERO_KILLABLE) &&
152161 fatal_signal_pending(current)) {
@@ -265,12 +274,14 @@ int __blkdev_issue_zeroout(struct block_device *bdev, sector_t sector, · 112 unmodified lines
265274 sector_t nr_sects, gfp_t gfp_mask, struct bio **biop,
266275 unsigned flags)
267276 {
277+ sector_t limit = bio_write_zeroes_limit(bdev);
278+
268279 if (bdev_read_only(bdev))
269280 return -EPERM;
270281
271− if (bdev_write_zeroes_sectors(bdev)) {
282+ if (limit) {
272283 __blkdev_issue_write_zeroes(bdev, sector, nr_sects,
273− gfp_mask, biop, flags);
284+ gfp_mask, biop, flags, limit);
274285 } else {
275286 if (flags & BLKDEV_ZERO_NOFALLBACK)
276287 return -EOPNOTSUPP;
block/blk-mq-tag.c+3−2
@@ -38,6 +38,7 @@ static void blk_mq_update_wake_batch(struct blk_mq_tags *tags, · 37 unmodified lines
3838 void __blk_mq_tag_busy(struct blk_mq_hw_ctx *hctx)
3939 {
4040 unsigned int users;
41+ unsigned long flags;
4142 struct blk_mq_tags *tags = hctx->tags;
4243
4344 /*
@@ -56,11 +57,11 @@ void __blk_mq_tag_busy(struct blk_mq_hw_ctx *hctx) · 12 unmodified lines
5657 return;
5758 }
5859
59− spin_lock_irq(&tags->lock);
60+ spin_lock_irqsave(&tags->lock, flags);
6061 users = tags->active_queues + 1;
6162 WRITE_ONCE(tags->active_queues, users);
6263 blk_mq_update_wake_batch(tags, users);
63− spin_unlock_irq(&tags->lock);
64+ spin_unlock_irqrestore(&tags->lock, flags);
6465 }
6566
6667 /*
block/blk-throttle.c+0−11
@@ -31,14 +31,6 @@ static struct workqueue_struct *kthrotld_workqueue; · 30 unmodified lines
3131
3232 #define rb_entry_tg(node) rb_entry((node), struct throtl_grp, rb_node)
3333
34−/* We measure latency for request size from <= 4k to >= 1M */
35−#define LATENCY_BUCKET_SIZE 9
36−
37−struct latency_bucket {
38− unsigned long total_latency; /* ns / 1024 */
39− int samples;
40−};
41−
4234 struct throtl_data
4335 {
4436 /* service tree for active throtl groups */
@@ -116,9 +108,6 @@ static unsigned int tg_iops_limit(struct throtl_grp *tg, int rw) · 71 unmodified lines
116108 return tg->iops[rw];
117109 }
118110
119−#define request_bucket_index(sectors) \
120− clamp_t(int, order_base_2(sectors) - 3, 0, LATENCY_BUCKET_SIZE - 1)
121−
122111 /**
123112 * throtl_log - log debug message via blktrace
124113 * @sq: the service_queue being reported
drivers/accessibility/speakup/genmap.c+0−1
@@ -10,7 +10,6 @@ · 9 unmodified lines
1010 #include <stdio.h>
1111 #include <libgen.h>
1212 #include <string.h>
13−#include <linux/version.h>
1413 #include <ctype.h>
1514 #include "utils.h"
1615
drivers/accessibility/speakup/makemapdata.c+0−1
@@ -10,7 +10,6 @@ · 9 unmodified lines
1010 #include <stdio.h>
1111 #include <libgen.h>
1212 #include <string.h>
13−#include <linux/version.h>
1413 #include <ctype.h>
1514 #include "utils.h"
1615
drivers/acpi/acpica/acevents.h+1−5
@@ -188,13 +188,9 @@ acpi_ev_detach_region(union acpi_operand_object *region_obj, · 187 unmodified lines
188188 u8 acpi_ns_is_locked);
189189
190190 void
191−acpi_ev_execute_reg_methods(struct acpi_namespace_node *node,
191+acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, u32 max_depth,
192192 acpi_adr_space_type space_id, u32 function);
193193
194−void
195−acpi_ev_execute_orphan_reg_method(struct acpi_namespace_node *node,
196− acpi_adr_space_type space_id);
197−
198194 acpi_status
199195 acpi_ev_execute_reg_method(union acpi_operand_object *region_obj, u32 function);
200196
drivers/acpi/acpica/evregion.c+9−3
@@ -20,6 +20,10 @@ extern u8 acpi_gbl_default_address_spaces[]; · 19 unmodified lines
2020
2121 /* Local prototypes */
2222
23+static void
24+acpi_ev_execute_orphan_reg_method(struct acpi_namespace_node *device_node,
25+ acpi_adr_space_type space_id);
26+
2327 static acpi_status
2428 acpi_ev_reg_run(acpi_handle obj_handle,
2529 u32 level, void *context, void **return_value);
@@ -61,6 +65,7 @@ acpi_status acpi_ev_initialize_op_regions(void) · 35 unmodified lines
6165 acpi_gbl_default_address_spaces
6266 [i])) {
6367 acpi_ev_execute_reg_methods(acpi_gbl_root_node,
68+ ACPI_UINT32_MAX,
6469 acpi_gbl_default_address_spaces
6570 [i], ACPI_REG_CONNECT);
6671 }
@@ -668,6 +673,7 @@ cleanup1: · 601 unmodified lines
668673 * FUNCTION: acpi_ev_execute_reg_methods
669674 *
670675 * PARAMETERS: node - Namespace node for the device
676+ * max_depth - Depth to which search for _REG
671677 * space_id - The address space ID
672678 * function - Passed to _REG: On (1) or Off (0)
673679 *
@@ -679,7 +685,7 @@ cleanup1: · 5 unmodified lines
679685 ******************************************************************************/
680686
681687 void
682−acpi_ev_execute_reg_methods(struct acpi_namespace_node *node,
688+acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, u32 max_depth,
683689 acpi_adr_space_type space_id, u32 function)
684690 {
685691 struct acpi_reg_walk_info info;
@@ -713,7 +719,7 @@ acpi_ev_execute_reg_methods(struct acpi_namespace_node *node, · 27 unmodified lines
713719 * regions and _REG methods. (i.e. handlers must be installed for all
714720 * regions of this Space ID before we can run any _REG methods)
715721 */
716− (void)acpi_ns_walk_namespace(ACPI_TYPE_ANY, node, ACPI_UINT32_MAX,
722+ (void)acpi_ns_walk_namespace(ACPI_TYPE_ANY, node, max_depth,
717723 ACPI_NS_WALK_UNLOCK, acpi_ev_reg_run, NULL,
718724 &info, NULL);
719725
@@ -814,7 +820,7 @@ acpi_ev_reg_run(acpi_handle obj_handle, · 94 unmodified lines
814820 *
815821 ******************************************************************************/
816822
817−void
823+static void
818824 acpi_ev_execute_orphan_reg_method(struct acpi_namespace_node *device_node,
819825 acpi_adr_space_type space_id)
820826 {
drivers/acpi/acpica/evxfregn.c+7−57
@@ -85,7 +85,8 @@ acpi_install_address_space_handler_internal(acpi_handle device, · 84 unmodified lines
8585 /* Run all _REG methods for this address space */
8686
8787 if (run_reg) {
88− acpi_ev_execute_reg_methods(node, space_id, ACPI_REG_CONNECT);
88+ acpi_ev_execute_reg_methods(node, ACPI_UINT32_MAX, space_id,
89+ ACPI_REG_CONNECT);
8990 }
9091
9192 unlock_and_exit:
@@ -263,6 +264,7 @@ ACPI_EXPORT_SYMBOL(acpi_remove_address_space_handler) · 171 unmodified lines
263264 * FUNCTION: acpi_execute_reg_methods
264265 *
265266 * PARAMETERS: device - Handle for the device
267+ * max_depth - Depth to which search for _REG
266268 * space_id - The address space ID
267269 *
268270 * RETURN: Status
@@ -271,7 +273,8 @@ ACPI_EXPORT_SYMBOL(acpi_remove_address_space_handler) · 2 unmodified lines
271273 *
272274 ******************************************************************************/
273275 acpi_status
274−acpi_execute_reg_methods(acpi_handle device, acpi_adr_space_type space_id)
276+acpi_execute_reg_methods(acpi_handle device, u32 max_depth,
277+ acpi_adr_space_type space_id)
275278 {
276279 struct acpi_namespace_node *node;
277280 acpi_status status;
@@ -296,7 +299,8 @@ acpi_execute_reg_methods(acpi_handle device, acpi_adr_space_type space_id) · 18 unmodified lines
296299
297300 /* Run all _REG methods for this address space */
298301
299− acpi_ev_execute_reg_methods(node, space_id, ACPI_REG_CONNECT);
302+ acpi_ev_execute_reg_methods(node, max_depth, space_id,
303+ ACPI_REG_CONNECT);
300304 } else {
301305 status = AE_BAD_PARAMETER;
302306 }
@@ -306,57 +310,3 @@ acpi_execute_reg_methods(acpi_handle device, acpi_adr_space_type space_id) · 3 unmodified lines
306310 }
307311
308312 ACPI_EXPORT_SYMBOL(acpi_execute_reg_methods)
309−
310−/*******************************************************************************
311− *
312− * FUNCTION: acpi_execute_orphan_reg_method
313− *
314− * PARAMETERS: device - Handle for the device
315− * space_id - The address space ID
316− *
317− * RETURN: Status
318− *
319− * DESCRIPTION: Execute an "orphan" _REG method that appears under an ACPI
320− * device. This is a _REG method that has no corresponding region
321− * within the device's scope.
322− *
323− ******************************************************************************/
324−acpi_status
325−acpi_execute_orphan_reg_method(acpi_handle device, acpi_adr_space_type space_id)
326−{
327− struct acpi_namespace_node *node;
328− acpi_status status;
329−
330− ACPI_FUNCTION_TRACE(acpi_execute_orphan_reg_method);
331−
332− /* Parameter validation */
333−
334− if (!device) {
335− return_ACPI_STATUS(AE_BAD_PARAMETER);
336− }
337−
338− status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
339− if (ACPI_FAILURE(status)) {
340− return_ACPI_STATUS(status);
341− }
342−
343− /* Convert and validate the device handle */
344−
345− node = acpi_ns_validate_handle(device);
346− if (node) {
347−
348− /*
349− * If an "orphan" _REG method is present in the device's scope
350− * for the given address space ID, run it.
351− */
352−
353− acpi_ev_execute_orphan_reg_method(node, space_id);
354− } else {
355− status = AE_BAD_PARAMETER;
356− }
357−
358− (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
359− return_ACPI_STATUS(status);
360−}
361−
362−ACPI_EXPORT_SYMBOL(acpi_execute_orphan_reg_method)
drivers/acpi/ec.c+9−5
@@ -1487,12 +1487,13 @@ static bool install_gpio_irq_event_handler(struct acpi_ec *ec) · 1486 unmodified lines
14871487 static int ec_install_handlers(struct acpi_ec *ec, struct acpi_device *device,
14881488 bool call_reg)
14891489 {
1490− acpi_handle scope_handle = ec == first_ec ? ACPI_ROOT_OBJECT : ec->handle;
14911490 acpi_status status;
14921491
14931492 acpi_ec_start(ec, false);
14941493
14951494 if (!test_bit(EC_FLAGS_EC_HANDLER_INSTALLED, &ec->flags)) {
1495+ acpi_handle scope_handle = ec == first_ec ? ACPI_ROOT_OBJECT : ec->handle;
1496+
14961497 acpi_ec_enter_noirq(ec);
14971498 status = acpi_install_address_space_handler_no_reg(scope_handle,
14981499 ACPI_ADR_SPACE_EC,
@@ -1506,10 +1507,7 @@ static int ec_install_handlers(struct acpi_ec *ec, struct acpi_device *device, · 7 unmodified lines
15061507 }
15071508
15081509 if (call_reg && !test_bit(EC_FLAGS_EC_REG_CALLED, &ec->flags)) {
1509− acpi_execute_reg_methods(scope_handle, ACPI_ADR_SPACE_EC);
1510− if (scope_handle != ec->handle)
1511− acpi_execute_orphan_reg_method(ec->handle, ACPI_ADR_SPACE_EC);
1512−
1510+ acpi_execute_reg_methods(ec->handle, ACPI_UINT32_MAX, ACPI_ADR_SPACE_EC);
15131511 set_bit(EC_FLAGS_EC_REG_CALLED, &ec->flags);
15141512 }
15151513
@@ -1724,6 +1722,12 @@ static void acpi_ec_remove(struct acpi_device *device) · 208 unmodified lines
17241722 }
17251723 }
17261724
1725+void acpi_ec_register_opregions(struct acpi_device *adev)
1726+{
1727+ if (first_ec && first_ec->handle != adev->handle)
1728+ acpi_execute_reg_methods(adev->handle, 1, ACPI_ADR_SPACE_EC);
1729+}
1730+
17271731 static acpi_status
17281732 ec_parse_io_ports(struct acpi_resource *resource, void *context)
17291733 {
drivers/acpi/internal.h+1−0
@@ -223,6 +223,7 @@ int acpi_ec_add_query_handler(struct acpi_ec *ec, u8 query_bit, · 222 unmodified lines
223223 acpi_handle handle, acpi_ec_query_func func,
224224 void *data);
225225 void acpi_ec_remove_query_handler(struct acpi_ec *ec, u8 query_bit);
226+void acpi_ec_register_opregions(struct acpi_device *adev);
226227
227228 #ifdef CONFIG_PM_SLEEP
228229 void acpi_ec_flush_work(void);
drivers/acpi/scan.c+2−0
@@ -2273,6 +2273,8 @@ static int acpi_bus_attach(struct acpi_device *device, void *first_pass) · 2272 unmodified lines
22732273 if (device->handler)
22742274 goto ok;
22752275
2276+ acpi_ec_register_opregions(device);
2277+
22762278 if (!device->flags.initialized) {
22772279 device->flags.power_manageable =
22782280 device->power.states[ACPI_STATE_D0].flags.valid;
drivers/acpi/video_detect.c+22−0
@@ -54,6 +54,8 @@ static void acpi_video_parse_cmdline(void) · 53 unmodified lines
5454 acpi_backlight_cmdline = acpi_backlight_nvidia_wmi_ec;
5555 if (!strcmp("apple_gmux", acpi_video_backlight_string))
5656 acpi_backlight_cmdline = acpi_backlight_apple_gmux;
57+ if (!strcmp("dell_uart", acpi_video_backlight_string))
58+ acpi_backlight_cmdline = acpi_backlight_dell_uart;
5759 if (!strcmp("none", acpi_video_backlight_string))
5860 acpi_backlight_cmdline = acpi_backlight_none;
5961 }
@@ -821,6 +823,21 @@ static const struct dmi_system_id video_detect_dmi_table[] = { · 761 unmodified lines
821823 },
822824 },
823825
826+ /*
827+ * Dell AIO (All in Ones) which advertise an UART attached backlight
828+ * controller board in their ACPI tables (and may even have one), but
829+ * which need native backlight control nevertheless.
830+ */
831+ {
832+ /* https://bugzilla.redhat.com/show_bug.cgi?id=2303936 */
833+ .callback = video_detect_force_native,
834+ /* Dell OptiPlex 7760 AIO */
835+ .matches = {
836+ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
837+ DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 7760 AIO"),
838+ },
839+ },
840+
824841 /*
825842 * Models which have nvidia-ec-wmi support, but should not use it.
826843 * Note this indicates a likely firmware bug on these models and should
@@ -918,6 +935,7 @@ enum acpi_backlight_type __acpi_video_get_backlight_type(bool native, bool *auto · 91 unmodified lines
918935 static DEFINE_MUTEX(init_mutex);
919936 static bool nvidia_wmi_ec_present;
920937 static bool apple_gmux_present;
938+ static bool dell_uart_present;
921939 static bool native_available;
922940 static bool init_done;
923941 static long video_caps;
@@ -932,6 +950,7 @@ enum acpi_backlight_type __acpi_video_get_backlight_type(bool native, bool *auto · 8 unmodified lines
932950 &video_caps, NULL);
933951 nvidia_wmi_ec_present = nvidia_wmi_ec_supported();
934952 apple_gmux_present = apple_gmux_detect(NULL, NULL);
953+ dell_uart_present = acpi_dev_present("DELL0501", NULL, -1);
935954 init_done = true;
936955 }
937956 if (native)
@@ -962,6 +981,9 @@ enum acpi_backlight_type __acpi_video_get_backlight_type(bool native, bool *auto · 24 unmodified lines
962981 if (apple_gmux_present)
963982 return acpi_backlight_apple_gmux;
964983
984+ if (dell_uart_present)
985+ return acpi_backlight_dell_uart;
986+
965987 /* Use ACPI video if available, except when native should be preferred. */
966988 if ((video_caps & ACPI_VIDEO_BACKLIGHT) &&
967989 !(native_available && prefer_native_over_acpi_video()))
drivers/android/binder.c+6−9
@@ -1044,13 +1044,13 @@ static struct binder_ref *binder_get_ref_olocked(struct binder_proc *proc, · 1043 unmodified lines
10441044 }
10451045
10461046 /* Find the smallest unused descriptor the "slow way" */
1047−static u32 slow_desc_lookup_olocked(struct binder_proc *proc)
1047+static u32 slow_desc_lookup_olocked(struct binder_proc *proc, u32 offset)
10481048 {
10491049 struct binder_ref *ref;
10501050 struct rb_node *n;
10511051 u32 desc;
10521052
1053− desc = 1;
1053+ desc = offset;
10541054 for (n = rb_first(&proc->refs_by_desc); n; n = rb_next(n)) {
10551055 ref = rb_entry(n, struct binder_ref, rb_node_desc);
10561056 if (ref->data.desc > desc)
@@ -1071,21 +1071,18 @@ static int get_ref_desc_olocked(struct binder_proc *proc, · 14 unmodified lines
10711071 u32 *desc)
10721072 {
10731073 struct dbitmap *dmap = &proc->dmap;
1074+ unsigned int nbits, offset;
10741075 unsigned long *new, bit;
1075− unsigned int nbits;
10761076
10771077 /* 0 is reserved for the context manager */
1078− if (node == proc->context->binder_context_mgr_node) {
1079− *desc = 0;
1080− return 0;
1081− }
1078+ offset = (node == proc->context->binder_context_mgr_node) ? 0 : 1;
10821079
10831080 if (!dbitmap_enabled(dmap)) {
1084− *desc = slow_desc_lookup_olocked(proc);
1081+ *desc = slow_desc_lookup_olocked(proc, offset);
10851082 return 0;
10861083 }
10871084
1088− if (dbitmap_acquire_first_zero_bit(dmap, &bit) == 0) {
1085+ if (dbitmap_acquire_next_zero_bit(dmap, offset, &bit) == 0) {
10891086 *desc = bit;
10901087 return 0;
10911088 }
drivers/android/binder_alloc.c+1−1
@@ -939,9 +939,9 @@ void binder_alloc_deferred_release(struct binder_alloc *alloc) · 938 unmodified lines
939939 __free_page(alloc->pages[i].page_ptr);
940940 page_count++;
941941 }
942− kvfree(alloc->pages);
943942 }
944943 spin_unlock(&alloc->lock);
944+ kvfree(alloc->pages);
945945 if (alloc->mm)
946946 mmdrop(alloc->mm);
947947
drivers/android/dbitmap.h+7−15
@@ -6,8 +6,7 @@ · 5 unmodified lines
66 *
77 * Used by the binder driver to optimize the allocation of the smallest
88 * available descriptor ID. Each bit in the bitmap represents the state
9− * of an ID, with the exception of BIT(0) which is used exclusively to
10− * reference binder's context manager.
9+ * of an ID.
1110 *
1211 * A dbitmap can grow or shrink as needed. This part has been designed
1312 * considering that users might need to briefly release their locks in
@@ -58,11 +57,7 @@ static inline unsigned int dbitmap_shrink_nbits(struct dbitmap *dmap) · 44 unmodified lines
5857 if (bit < (dmap->nbits >> 2))
5958 return dmap->nbits >> 1;
6059
61− /*
62− * Note that find_last_bit() returns dmap->nbits when no bits
63− * are set. While this is technically not possible here since
64− * BIT(0) is always set, this check is left for extra safety.
65− */
60+ /* find_last_bit() returns dmap->nbits when no bits are set. */
6661 if (bit == dmap->nbits)
6762 return NBITS_MIN;
6863
@@ -132,16 +127,17 @@ dbitmap_grow(struct dbitmap *dmap, unsigned long *new, unsigned int nbits) · 63 unmodified lines
132127 }
133128
134129 /*
135− * Finds and sets the first zero bit in the bitmap. Upon success @bit
130+ * Finds and sets the next zero bit in the bitmap. Upon success @bit
136131 * is populated with the index and 0 is returned. Otherwise, -ENOSPC
137132 * is returned to indicate that a dbitmap_grow() is needed.
138133 */
139134 static inline int
140−dbitmap_acquire_first_zero_bit(struct dbitmap *dmap, unsigned long *bit)
135+dbitmap_acquire_next_zero_bit(struct dbitmap *dmap, unsigned long offset,
136+ unsigned long *bit)
141137 {
142138 unsigned long n;
143139
144− n = find_first_zero_bit(dmap->map, dmap->nbits);
140+ n = find_next_zero_bit(dmap->map, dmap->nbits, offset);
145141 if (n == dmap->nbits)
146142 return -ENOSPC;
147143
@@ -154,9 +150,7 @@ dbitmap_acquire_first_zero_bit(struct dbitmap *dmap, unsigned long *bit) · 6 unmodified lines
154150 static inline void
155151 dbitmap_clear_bit(struct dbitmap *dmap, unsigned long bit)
156152 {
157− /* BIT(0) should always set for the context manager */
158− if (bit)
159− clear_bit(bit, dmap->map);
153+ clear_bit(bit, dmap->map);
160154 }
161155
162156 static inline int dbitmap_init(struct dbitmap *dmap)
@@ -168,8 +162,6 @@ static inline int dbitmap_init(struct dbitmap *dmap) · 5 unmodified lines
168162 }
169163
170164 dmap->nbits = NBITS_MIN;
171− /* BIT(0) is reserved for the context manager */
172− set_bit(0, dmap->map);
173165
174166 return 0;
175167 }
drivers/ata/libata-scsi.c+13−2
@@ -951,8 +951,19 @@ static void ata_gen_passthru_sense(struct ata_queued_cmd *qc) · 950 unmodified lines
951951 &sense_key, &asc, &ascq);
952952 ata_scsi_set_sense(qc->dev, cmd, sense_key, asc, ascq);
953953 } else {
954− /* ATA PASS-THROUGH INFORMATION AVAILABLE */
955− ata_scsi_set_sense(qc->dev, cmd, RECOVERED_ERROR, 0, 0x1D);
954+ /*
955+ * ATA PASS-THROUGH INFORMATION AVAILABLE
956+ *
957+ * Note: we are supposed to call ata_scsi_set_sense(), which
958+ * respects the D_SENSE bit, instead of unconditionally
959+ * generating the sense data in descriptor format. However,
960+ * because hdparm, hddtemp, and udisks incorrectly assume sense
961+ * data in descriptor format, without even looking at the
962+ * RESPONSE CODE field in the returned sense data (to see which
963+ * format the returned sense data is in), we are stuck with
964+ * being bug compatible with older kernels.
965+ */
966+ scsi_build_sense(cmd, 1, RECOVERED_ERROR, 0, 0x1D);
956967 }
957968 }
958969
drivers/ata/pata_macio.c+20−10
@@ -208,6 +208,19 @@ static const char* macio_ata_names[] = { · 207 unmodified lines
208208 /* Don't let a DMA segment go all the way to 64K */
209209 #define MAX_DBDMA_SEG 0xff00
210210
211+#ifdef CONFIG_PAGE_SIZE_64KB
212+/*
213+ * The SCSI core requires the segment size to cover at least a page, so
214+ * for 64K page size kernels it must be at least 64K. However the
215+ * hardware can't handle 64K, so pata_macio_qc_prep() will split large
216+ * requests. To handle the split requests the tablesize must be halved.
217+ */
218+#define PATA_MACIO_MAX_SEGMENT_SIZE SZ_64K
219+#define PATA_MACIO_SG_TABLESIZE (MAX_DCMDS / 2)
220+#else
221+#define PATA_MACIO_MAX_SEGMENT_SIZE MAX_DBDMA_SEG
222+#define PATA_MACIO_SG_TABLESIZE MAX_DCMDS
223+#endif
211224
212225 /*
213226 * Wait 1s for disk to answer on IDE bus after a hard reset
@@ -541,7 +554,8 @@ static enum ata_completion_errors pata_macio_qc_prep(struct ata_queued_cmd *qc) · 327 unmodified lines
541554
542555 while (sg_len) {
543556 /* table overflow should never happen */
544− BUG_ON (pi++ >= MAX_DCMDS);
557+ if (WARN_ON_ONCE(pi >= MAX_DCMDS))
558+ return AC_ERR_SYSTEM;
545559
546560 len = (sg_len < MAX_DBDMA_SEG) ? sg_len : MAX_DBDMA_SEG;
547561 table->command = cpu_to_le16(write ? OUTPUT_MORE: INPUT_MORE);
@@ -553,11 +567,13 @@ static enum ata_completion_errors pata_macio_qc_prep(struct ata_queued_cmd *qc) · 5 unmodified lines
553567 addr += len;
554568 sg_len -= len;
555569 ++table;
570+ ++pi;
556571 }
557572 }
558573
559574 /* Should never happen according to Tejun */
560− BUG_ON(!pi);
575+ if (WARN_ON_ONCE(!pi))
576+ return AC_ERR_SYSTEM;
561577
562578 /* Convert the last command to an input/output */
563579 table--;
@@ -912,16 +928,10 @@ static int pata_macio_do_resume(struct pata_macio_priv *priv) · 348 unmodified lines
912928
913929 static const struct scsi_host_template pata_macio_sht = {
914930 __ATA_BASE_SHT(DRV_NAME),
915− .sg_tablesize = MAX_DCMDS,
931+ .sg_tablesize = PATA_MACIO_SG_TABLESIZE,
916932 /* We may not need that strict one */
917933 .dma_boundary = ATA_DMA_BOUNDARY,
918− /*
919− * The SCSI core requires the segment size to cover at least a page, so
920− * for 64K page size kernels this must be at least 64K. However the
921− * hardware can't handle 64K, so pata_macio_qc_prep() will split large
922− * requests.
923− */
924− .max_segment_size = SZ_64K,
934+ .max_segment_size = PATA_MACIO_MAX_SEGMENT_SIZE,
925935 .device_configure = pata_macio_device_configure,
926936 .sdev_groups = ata_common_sdev_groups,
927937 .can_queue = ATA_DEF_QUEUE,
drivers/atm/idt77252.c+5−4
@@ -1118,8 +1118,8 @@ dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe) · 1117 unmodified lines
11181118 rpp->len += skb->len;
11191119
11201120 if (stat & SAR_RSQE_EPDU) {
1121+ unsigned int len, truesize;
11211122 unsigned char *l1l2;
1122− unsigned int len;
11231123
11241124 l1l2 = (unsigned char *) ((unsigned long) skb->data + skb->len - 6);
11251125
@@ -1189,14 +1189,15 @@ dequeue_rx(struct idt77252_dev *card, struct rsq_entry *rsqe) · 63 unmodified lines
11891189 ATM_SKB(skb)->vcc = vcc;
11901190 __net_timestamp(skb);
11911191
1192+ truesize = skb->truesize;
11921193 vcc->push(vcc, skb);
11931194 atomic_inc(&vcc->stats->rx);
11941195
1195− if (skb->truesize > SAR_FB_SIZE_3)
1196+ if (truesize > SAR_FB_SIZE_3)
11961197 add_rx_skb(card, 3, SAR_FB_SIZE_3, 1);
1197− else if (skb->truesize > SAR_FB_SIZE_2)
1198+ else if (truesize > SAR_FB_SIZE_2)
11981199 add_rx_skb(card, 2, SAR_FB_SIZE_2, 1);
1199− else if (skb->truesize > SAR_FB_SIZE_1)
1200+ else if (truesize > SAR_FB_SIZE_1)
12001201 add_rx_skb(card, 1, SAR_FB_SIZE_1, 1);
12011202 else
12021203 add_rx_skb(card, 0, SAR_FB_SIZE_0, 1);
drivers/base/core.c+8−5
@@ -25,6 +25,7 @@ · 24 unmodified lines
2525 #include <linux/mutex.h>
2626 #include <linux/pm_runtime.h>
2727 #include <linux/netdevice.h>
28+#include <linux/rcupdate.h>
2829 #include <linux/sched/signal.h>
2930 #include <linux/sched/mm.h>
3031 #include <linux/string_helpers.h>
@@ -2640,6 +2641,7 @@ static const char *dev_uevent_name(const struct kobject *kobj) · 2609 unmodified lines
26402641 static int dev_uevent(const struct kobject *kobj, struct kobj_uevent_env *env)
26412642 {
26422643 const struct device *dev = kobj_to_dev(kobj);
2644+ struct device_driver *driver;
26432645 int retval = 0;
26442646
26452647 /* add device node properties if present */
@@ -2668,8 +2670,12 @@ static int dev_uevent(const struct kobject *kobj, struct kobj_uevent_env *env) · 22 unmodified lines
26682670 if (dev->type && dev->type->name)
26692671 add_uevent_var(env, "DEVTYPE=%s", dev->type->name);
26702672
2671− if (dev->driver)
2672− add_uevent_var(env, "DRIVER=%s", dev->driver->name);
2673+ /* Synchronize with module_remove_driver() */
2674+ rcu_read_lock();
2675+ driver = READ_ONCE(dev->driver);
2676+ if (driver)
2677+ add_uevent_var(env, "DRIVER=%s", driver->name);
2678+ rcu_read_unlock();
26732679
26742680 /* Add common DT information about the device */
26752681 of_device_uevent(dev, env);
@@ -2739,11 +2745,8 @@ static ssize_t uevent_show(struct device *dev, struct device_attribute *attr, · 63 unmodified lines
27392745 if (!env)
27402746 return -ENOMEM;
27412747
2742− /* Synchronize with really_probe() */
2743− device_lock(dev);
27442748 /* let the kset specific function add its keys */
27452749 retval = kset->uevent_ops->uevent(&dev->kobj, env);
2746− device_unlock(dev);
27472750 if (retval)
27482751 goto out;
27492752
drivers/base/module.c+4−0
@@ -7,6 +7,7 @@ · 6 unmodified lines
77 #include <linux/errno.h>
88 #include <linux/slab.h>
99 #include <linux/string.h>
10+#include <linux/rcupdate.h>
1011 #include "base.h"
1112
1213 static char *make_driver_name(const struct device_driver *drv)
@@ -97,6 +98,9 @@ void module_remove_driver(const struct device_driver *drv) · 84 unmodified lines
9798 if (!drv)
9899 return;
99100
101+ /* Synchronize with dev_uevent() */
102+ synchronize_rcu();
103+
100104 sysfs_remove_link(&drv->p->kobj, "module");
101105
102106 if (drv->owner)
drivers/bluetooth/Kconfig+2−0
@@ -413,6 +413,7 @@ config BT_ATH3K · 412 unmodified lines
413413 config BT_MTKSDIO
414414 tristate "MediaTek HCI SDIO driver"
415415 depends on MMC
416+ depends on USB || !BT_HCIBTUSB_MTK
416417 select BT_MTK
417418 help
418419 MediaTek Bluetooth HCI SDIO driver.
@@ -425,6 +426,7 @@ config BT_MTKSDIO · 6 unmodified lines
425426 config BT_MTKUART
426427 tristate "MediaTek HCI UART driver"
427428 depends on SERIAL_DEV_BUS
429+ depends on USB || !BT_HCIBTUSB_MTK
428430 select BT_MTK
429431 help
430432 MediaTek Bluetooth HCI UART driver.
drivers/bluetooth/btintel.c+127−10
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 #include <linux/acpi.h>
1313 #include <acpi/acpi_bus.h>
1414 #include <asm/unaligned.h>
15+#include <linux/efi.h>
1516
1617 #include <net/bluetooth/bluetooth.h>
1718 #include <net/bluetooth/hci_core.h>
@@ -26,6 +27,8 @@ · 8 unmodified lines
2627 #define ECDSA_OFFSET 644
2728 #define ECDSA_HEADER_LEN 320
2829
30+#define BTINTEL_EFI_DSBR L"UefiCnvCommonDSBR"
31+
2932 enum {
3033 DSM_SET_WDISABLE2_DELAY = 1,
3134 DSM_SET_RESET_METHOD = 3,
@@ -2616,6 +2619,120 @@ static u8 btintel_classify_pkt_type(struct hci_dev *hdev, struct sk_buff *skb) · 2584 unmodified lines
26162619 return hci_skb_pkt_type(skb);
26172620 }
26182621
2622+/*
2623+ * UefiCnvCommonDSBR UEFI variable provides information from the OEM platforms
2624+ * if they have replaced the BRI (Bluetooth Radio Interface) resistor to
2625+ * overcome the potential STEP errors on their designs. Based on the
2626+ * configauration, bluetooth firmware shall adjust the BRI response line drive
2627+ * strength. The below structure represents DSBR data.
2628+ * struct {
2629+ * u8 header;
2630+ * u32 dsbr;
2631+ * } __packed;
2632+ *
2633+ * header - defines revision number of the structure
2634+ * dsbr - defines drive strength BRI response
2635+ * bit0
2636+ * 0 - instructs bluetooth firmware to use default values
2637+ * 1 - instructs bluetooth firmware to override default values
2638+ * bit3:1
2639+ * Reserved
2640+ * bit7:4
2641+ * DSBR override values (only if bit0 is set. Default value is 0xF
2642+ * bit31:7
2643+ * Reserved
2644+ * Expected values for dsbr field:
2645+ * 1. 0xF1 - indicates that the resistor on board is 33 Ohm
2646+ * 2. 0x00 or 0xB1 - indicates that the resistor on board is 10 Ohm
2647+ * 3. Non existing UEFI variable or invalid (none of the above) - indicates
2648+ * that the resistor on board is 10 Ohm
2649+ * Even if uefi variable is not present, driver shall send 0xfc0a command to
2650+ * firmware to use default values.
2651+ *
2652+ */
2653+static int btintel_uefi_get_dsbr(u32 *dsbr_var)
2654+{
2655+ struct btintel_dsbr {
2656+ u8 header;
2657+ u32 dsbr;
2658+ } __packed data;
2659+
2660+ efi_status_t status;
2661+ unsigned long data_size = 0;
2662+ efi_guid_t guid = EFI_GUID(0xe65d8884, 0xd4af, 0x4b20, 0x8d, 0x03,
2663+ 0x77, 0x2e, 0xcc, 0x3d, 0xa5, 0x31);
2664+
2665+ if (!IS_ENABLED(CONFIG_EFI))
2666+ return -EOPNOTSUPP;
2667+
2668+ if (!efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE))
2669+ return -EOPNOTSUPP;
2670+
2671+ status = efi.get_variable(BTINTEL_EFI_DSBR, &guid, NULL, &data_size,
2672+ NULL);
2673+
2674+ if (status != EFI_BUFFER_TOO_SMALL || !data_size)
2675+ return -EIO;
2676+
2677+ status = efi.get_variable(BTINTEL_EFI_DSBR, &guid, NULL, &data_size,
2678+ &data);
2679+
2680+ if (status != EFI_SUCCESS)
2681+ return -ENXIO;
2682+
2683+ *dsbr_var = data.dsbr;
2684+ return 0;
2685+}
2686+
2687+static int btintel_set_dsbr(struct hci_dev *hdev, struct intel_version_tlv *ver)
2688+{
2689+ struct btintel_dsbr_cmd {
2690+ u8 enable;
2691+ u8 dsbr;
2692+ } __packed;
2693+
2694+ struct btintel_dsbr_cmd cmd;
2695+ struct sk_buff *skb;
2696+ u8 status;
2697+ u32 dsbr;
2698+ bool apply_dsbr;
2699+ int err;
2700+
2701+ /* DSBR command needs to be sent for BlazarI + B0 step product after
2702+ * downloading IML image.
2703+ */
2704+ apply_dsbr = (ver->img_type == BTINTEL_IMG_IML &&
2705+ ((ver->cnvi_top & 0xfff) == BTINTEL_CNVI_BLAZARI) &&
2706+ INTEL_CNVX_TOP_STEP(ver->cnvi_top) == 0x01);
2707+
2708+ if (!apply_dsbr)
2709+ return 0;
2710+
2711+ dsbr = 0;
2712+ err = btintel_uefi_get_dsbr(&dsbr);
2713+ if (err < 0)
2714+ bt_dev_dbg(hdev, "Error reading efi: %ls (%d)",
2715+ BTINTEL_EFI_DSBR, err);
2716+
2717+ cmd.enable = dsbr & BIT(0);
2718+ cmd.dsbr = dsbr >> 4 & 0xF;
2719+
2720+ bt_dev_info(hdev, "dsbr: enable: 0x%2.2x value: 0x%2.2x", cmd.enable,
2721+ cmd.dsbr);
2722+
2723+ skb = __hci_cmd_sync(hdev, 0xfc0a, sizeof(cmd), &cmd, HCI_CMD_TIMEOUT);
2724+ if (IS_ERR(skb))
2725+ return -bt_to_errno(PTR_ERR(skb));
2726+
2727+ status = skb->data[0];
2728+ kfree_skb(skb);
2729+
2730+ if (status)
2731+ return -bt_to_errno(status);
2732+
2733+ return 0;
2734+}
2735+
26192736 int btintel_bootloader_setup_tlv(struct hci_dev *hdev,
26202737 struct intel_version_tlv *ver)
26212738 {
@@ -2650,6 +2767,13 @@ int btintel_bootloader_setup_tlv(struct hci_dev *hdev, · 28 unmodified lines
26502767 if (err)
26512768 return err;
26522769
2770+ /* set drive strength of BRI response */
2771+ err = btintel_set_dsbr(hdev, ver);
2772+ if (err) {
2773+ bt_dev_err(hdev, "Failed to send dsbr command (%d)", err);
2774+ return err;
2775+ }
2776+
26532777 /* If image type returned is BTINTEL_IMG_IML, then controller supports
26542778 * intermediate loader image
26552779 */
@@ -2945,9 +3069,6 @@ static int btintel_setup_combined(struct hci_dev *hdev) · 289 unmodified lines
29453069 INTEL_ROM_LEGACY_NO_WBS_SUPPORT))
29463070 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
29473071 &hdev->quirks);
2948− if (ver.hw_variant == 0x08 && ver.fw_variant == 0x22)
2949− set_bit(HCI_QUIRK_VALID_LE_STATES,
2950− &hdev->quirks);
29513072
29523073 err = btintel_legacy_rom_setup(hdev, &ver);
29533074 break;
@@ -2956,7 +3077,6 @@ static int btintel_setup_combined(struct hci_dev *hdev) · 2 unmodified lines
29563077 case 0x12: /* ThP */
29573078 case 0x13: /* HrP */
29583079 case 0x14: /* CcP */
2959− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
29603080 fallthrough;
29613081 case 0x0c: /* WsP */
29623082 /* Apply the device specific HCI quirks
@@ -3048,9 +3168,6 @@ static int btintel_setup_combined(struct hci_dev *hdev) · 85 unmodified lines
30483168 /* These variants don't seem to support LE Coded PHY */
30493169 set_bit(HCI_QUIRK_BROKEN_LE_CODED, &hdev->quirks);
30503170
3051− /* Set Valid LE States quirk */
3052− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
3053−
30543171 /* Setup MSFT Extension support */
30553172 btintel_set_msft_opcode(hdev, ver.hw_variant);
30563173
@@ -3076,15 +3193,15 @@ static int btintel_setup_combined(struct hci_dev *hdev) · 19 unmodified lines
30763193 */
30773194 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks);
30783195
3079− /* Apply LE States quirk from solar onwards */
3080− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
3081−
30823196 /* Setup MSFT Extension support */
30833197 btintel_set_msft_opcode(hdev,
30843198 INTEL_HW_VARIANT(ver_tlv.cnvi_bt));
30853199 btintel_set_dsm_reset_method(hdev, &ver_tlv);
30863200
30873201 err = btintel_bootloader_setup_tlv(hdev, &ver_tlv);
3202+ if (err)
3203+ goto exit_error;
3204+
30883205 btintel_register_devcoredump_support(hdev);
30893206 btintel_print_fseq_info(hdev);
30903207 break;
drivers/bluetooth/btintel_pcie.c+0−3
@@ -1180,9 +1180,6 @@ static int btintel_pcie_setup(struct hci_dev *hdev) · 1179 unmodified lines
11801180 */
11811181 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks);
11821182
1183− /* Apply LE States quirk from solar onwards */
1184− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
1185−
11861183 /* Setup MSFT Extension support */
11871184 btintel_set_msft_opcode(hdev,
11881185 INTEL_HW_VARIANT(ver_tlv.cnvi_bt));
drivers/bluetooth/btmtk.c+4−1
@@ -437,6 +437,7 @@ int btmtk_process_coredump(struct hci_dev *hdev, struct sk_buff *skb) · 436 unmodified lines
437437 }
438438 EXPORT_SYMBOL_GPL(btmtk_process_coredump);
439439
440+#if IS_ENABLED(CONFIG_BT_HCIBTUSB_MTK)
440441 static void btmtk_usb_wmt_recv(struct urb *urb)
441442 {
442443 struct hci_dev *hdev = urb->context;
@@ -1262,7 +1263,8 @@ int btmtk_usb_suspend(struct hci_dev *hdev) · 819 unmodified lines
12621263 struct btmtk_data *btmtk_data = hci_get_priv(hdev);
12631264
12641265 /* Stop urb anchor for iso data transmission */
1265− usb_kill_anchored_urbs(&btmtk_data->isopkt_anchor);
1266+ if (test_bit(BTMTK_ISOPKT_RUNNING, &btmtk_data->flags))
1267+ usb_kill_anchored_urbs(&btmtk_data->isopkt_anchor);
12661268
12671269 return 0;
12681270 }
@@ -1487,6 +1489,7 @@ int btmtk_usb_shutdown(struct hci_dev *hdev) · 218 unmodified lines
14871489 return 0;
14881490 }
14891491 EXPORT_SYMBOL_GPL(btmtk_usb_shutdown);
1492+#endif
14901493
14911494 MODULE_AUTHOR("Sean Wang <sean.wang@mediatek.com>");
14921495 MODULE_AUTHOR("Mark Chen <mark-yw.chen@mediatek.com>");
drivers/bluetooth/btmtksdio.c+0−3
@@ -1148,9 +1148,6 @@ static int btmtksdio_setup(struct hci_dev *hdev) · 1147 unmodified lines
11481148 }
11491149 }
11501150
1151− /* Valid LE States quirk for MediaTek 7921 */
1152− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
1153−
11541151 break;
11551152 case 0x7663:
11561153 case 0x7668:
drivers/bluetooth/btnxpuart.c+18−2
@@ -449,6 +449,23 @@ static bool ps_wakeup(struct btnxpuart_dev *nxpdev) · 448 unmodified lines
449449 return false;
450450 }
451451
452+static void ps_cleanup(struct btnxpuart_dev *nxpdev)
453+{
454+ struct ps_data *psdata = &nxpdev->psdata;
455+ u8 ps_state;
456+
457+ mutex_lock(&psdata->ps_lock);
458+ ps_state = psdata->ps_state;
459+ mutex_unlock(&psdata->ps_lock);
460+
461+ if (ps_state != PS_STATE_AWAKE)
462+ ps_control(psdata->hdev, PS_STATE_AWAKE);
463+
464+ ps_cancel_timer(nxpdev);
465+ cancel_work_sync(&psdata->work);
466+ mutex_destroy(&psdata->ps_lock);
467+}
468+
452469 static int send_ps_cmd(struct hci_dev *hdev, void *data)
453470 {
454471 struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev);
@@ -1363,7 +1380,6 @@ static int btnxpuart_close(struct hci_dev *hdev) · 908 unmodified lines
13631380 {
13641381 struct btnxpuart_dev *nxpdev = hci_get_drvdata(hdev);
13651382
1366− ps_wakeup(nxpdev);
13671383 serdev_device_close(nxpdev->serdev);
13681384 skb_queue_purge(&nxpdev->txq);
13691385 if (!IS_ERR_OR_NULL(nxpdev->rx_skb)) {
@@ -1516,8 +1532,8 @@ static void nxp_serdev_remove(struct serdev_device *serdev) · 146 unmodified lines
15161532 nxpdev->new_baudrate = nxpdev->fw_init_baudrate;
15171533 nxp_set_baudrate_cmd(hdev, NULL);
15181534 }
1519− ps_cancel_timer(nxpdev);
15201535 }
1536+ ps_cleanup(nxpdev);
15211537 hci_unregister_dev(hdev);
15221538 hci_free_dev(hdev);
15231539 }
drivers/bluetooth/btrtl.c+0−1
@@ -1287,7 +1287,6 @@ void btrtl_set_quirks(struct hci_dev *hdev, struct btrtl_device_info *btrtl_dev) · 1286 unmodified lines
12871287 case CHIP_ID_8852C:
12881288 case CHIP_ID_8851B:
12891289 case CHIP_ID_8852BT:
1290− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
12911290 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks);
12921291
12931292 /* RTL8852C needs to transmit mSBC data continuously without
drivers/bluetooth/btusb.c+2−2
@@ -3956,8 +3956,8 @@ static int btusb_probe(struct usb_interface *intf, · 3955 unmodified lines
39563956 if (id->driver_info & BTUSB_WIDEBAND_SPEECH)
39573957 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED, &hdev->quirks);
39583958
3959− if (id->driver_info & BTUSB_VALID_LE_STATES)
3960− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
3959+ if (!(id->driver_info & BTUSB_VALID_LE_STATES))
3960+ set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks);
39613961
39623962 if (id->driver_info & BTUSB_DIGIANSWER) {
39633963 data->cmdreq_type = USB_TYPE_VENDOR;
drivers/bluetooth/hci_qca.c+11−12
@@ -2160,7 +2160,7 @@ static void qca_power_shutdown(struct hci_uart *hu) · 2159 unmodified lines
21602160 qcadev = serdev_device_get_drvdata(hu->serdev);
21612161 power = qcadev->bt_power;
21622162
2163− if (power->pwrseq) {
2163+ if (power && power->pwrseq) {
21642164 pwrseq_power_off(power->pwrseq);
21652165 set_bit(QCA_BT_OFF, &qca->flags);
21662166 return;
@@ -2187,10 +2187,6 @@ static void qca_power_shutdown(struct hci_uart *hu) · 20 unmodified lines
21872187 }
21882188 break;
21892189
2190− case QCA_QCA6390:
2191− pwrseq_power_off(qcadev->bt_power->pwrseq);
2192− break;
2193−
21942190 default:
21952191 gpiod_set_value_cansleep(qcadev->bt_en, 0);
21962192 }
@@ -2416,11 +2412,14 @@ static int qca_serdev_probe(struct serdev_device *serdev) · 219 unmodified lines
24162412 break;
24172413
24182414 case QCA_QCA6390:
2419− qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev,
2420− "bluetooth");
2421− if (IS_ERR(qcadev->bt_power->pwrseq))
2422− return PTR_ERR(qcadev->bt_power->pwrseq);
2423− break;
2415+ if (dev_of_node(&serdev->dev)) {
2416+ qcadev->bt_power->pwrseq = devm_pwrseq_get(&serdev->dev,
2417+ "bluetooth");
2418+ if (IS_ERR(qcadev->bt_power->pwrseq))
2419+ return PTR_ERR(qcadev->bt_power->pwrseq);
2420+ break;
2421+ }
2422+ fallthrough;
24242423
24252424 default:
24262425 qcadev->bt_en = devm_gpiod_get_optional(&serdev->dev, "enable",
@@ -2475,8 +2474,8 @@ static int qca_serdev_probe(struct serdev_device *serdev) · 48 unmodified lines
24752474 set_bit(HCI_QUIRK_WIDEBAND_SPEECH_SUPPORTED,
24762475 &hdev->quirks);
24772476
2478− if (data->capabilities & QCA_CAP_VALID_LE_STATES)
2479− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
2477+ if (!(data->capabilities & QCA_CAP_VALID_LE_STATES))
2478+ set_bit(HCI_QUIRK_BROKEN_LE_STATES, &hdev->quirks);
24802479 }
24812480
24822481 return 0;
drivers/bluetooth/hci_vhci.c+0−2
@@ -425,8 +425,6 @@ static int __vhci_create_device(struct vhci_data *data, __u8 opcode) · 424 unmodified lines
425425 if (opcode & 0x80)
426426 set_bit(HCI_QUIRK_RAW_DEVICE, &hdev->quirks);
427427
428− set_bit(HCI_QUIRK_VALID_LE_STATES, &hdev->quirks);
429−
430428 if (hci_register_dev(hdev) < 0) {
431429 BT_ERR("Can't register HCI device");
432430 hci_free_dev(hdev);
drivers/cache/Kconfig+1−0
@@ -18,6 +18,7 @@ config STARFIVE_STARLINK_CACHE · 17 unmodified lines
1818 bool "StarFive StarLink Cache controller"
1919 depends on RISCV
2020 depends on ARCH_STARFIVE
21+ depends on 64BIT
2122 select RISCV_DMA_NONCOHERENT
2223 select RISCV_NONSTANDARD_CACHE_OPS
2324 help
drivers/char/ds1620.c+1−0
@@ -421,4 +421,5 @@ static void __exit ds1620_exit(void) · 420 unmodified lines
421421 module_init(ds1620_init);
422422 module_exit(ds1620_exit);
423423
424+MODULE_DESCRIPTION("Dallas Semiconductor DS1620 thermometer driver");
424425 MODULE_LICENSE("GPL");
drivers/char/nwbutton.c+1−0
@@ -241,6 +241,7 @@ static void __exit nwbutton_exit (void) · 240 unmodified lines
241241
242242
243243 MODULE_AUTHOR("Alex Holden");
244+MODULE_DESCRIPTION("NetWinder button driver");
244245 MODULE_LICENSE("GPL");
245246
246247 module_init(nwbutton_init);
drivers/char/nwflash.c+1−0
@@ -618,6 +618,7 @@ static void __exit nwflash_exit(void) · 617 unmodified lines
618618 iounmap((void *)FLASH_BASE);
619619 }
620620
621+MODULE_DESCRIPTION("NetWinder flash memory driver");
621622 MODULE_LICENSE("GPL");
622623
623624 module_param(flashdebug, bool, 0644);
drivers/char/tpm/tpm_ibmvtpm.c+4−0
@@ -698,6 +698,10 @@ static int tpm_ibmvtpm_probe(struct vio_dev *vio_dev, · 697 unmodified lines
698698 rc = tpm2_get_cc_attrs_tbl(chip);
699699 if (rc)
700700 goto init_irq_cleanup;
701+
702+ rc = tpm2_sessions_init(chip);
703+ if (rc)
704+ goto init_irq_cleanup;
701705 }
702706
703707 return tpm_chip_register(chip);
drivers/char/xillybus/xillyusb.c+34−8
@@ -50,6 +50,7 @@ MODULE_LICENSE("GPL v2"); · 49 unmodified lines
5050 static const char xillyname[] = "xillyusb";
5151
5252 static unsigned int fifo_buf_order;
53+static struct workqueue_struct *wakeup_wq;
5354
5455 #define USB_VENDOR_ID_XILINX 0x03fd
5556 #define USB_VENDOR_ID_ALTERA 0x09fb
@@ -569,10 +570,6 @@ static void cleanup_dev(struct kref *kref) · 513 unmodified lines
569570 * errors if executed. The mechanism relies on that xdev->error is assigned
570571 * a non-zero value by report_io_error() prior to queueing wakeup_all(),
571572 * which prevents bulk_in_work() from calling process_bulk_in().
572− *
573− * The fact that wakeup_all() and bulk_in_work() are queued on the same
574− * workqueue makes their concurrent execution very unlikely, however the
575− * kernel's API doesn't seem to ensure this strictly.
576573 */
577574
578575 static void wakeup_all(struct work_struct *work)
@@ -627,7 +624,7 @@ static void report_io_error(struct xillyusb_dev *xdev, · 48 unmodified lines
627624
628625 if (do_once) {
629626 kref_get(&xdev->kref); /* xdev is used by work item */
630− queue_work(xdev->workq, &xdev->wakeup_workitem);
627+ queue_work(wakeup_wq, &xdev->wakeup_workitem);
631628 }
632629 }
633630
@@ -1906,6 +1903,13 @@ static const struct file_operations xillyusb_fops = { · 1272 unmodified lines
19061903
19071904 static int xillyusb_setup_base_eps(struct xillyusb_dev *xdev)
19081905 {
1906+ struct usb_device *udev = xdev->udev;
1907+
1908+ /* Verify that device has the two fundamental bulk in/out endpoints */
1909+ if (usb_pipe_type_check(udev, usb_sndbulkpipe(udev, MSG_EP_NUM)) ||
1910+ usb_pipe_type_check(udev, usb_rcvbulkpipe(udev, IN_EP_NUM)))
1911+ return -ENODEV;
1912+
19091913 xdev->msg_ep = endpoint_alloc(xdev, MSG_EP_NUM | USB_DIR_OUT,
19101914 bulk_out_work, 1, 2);
19111915 if (!xdev->msg_ep)
@@ -1935,14 +1939,15 @@ static int setup_channels(struct xillyusb_dev *xdev, · 23 unmodified lines
19351939 __le16 *chandesc,
19361940 int num_channels)
19371941 {
1938− struct xillyusb_channel *chan;
1942+ struct usb_device *udev = xdev->udev;
1943+ struct xillyusb_channel *chan, *new_channels;
19391944 int i;
19401945
19411946 chan = kcalloc(num_channels, sizeof(*chan), GFP_KERNEL);
19421947 if (!chan)
19431948 return -ENOMEM;
19441949
1945− xdev->channels = chan;
1950+ new_channels = chan;
19461951
19471952 for (i = 0; i < num_channels; i++, chan++) {
19481953 unsigned int in_desc = le16_to_cpu(*chandesc++);
@@ -1971,6 +1976,15 @@ static int setup_channels(struct xillyusb_dev *xdev, · 22 unmodified lines
19711976 */
19721977
19731978 if ((out_desc & 0x80) && i < 14) { /* Entry is valid */
1979+ if (usb_pipe_type_check(udev,
1980+ usb_sndbulkpipe(udev, i + 2))) {
1981+ dev_err(xdev->dev,
1982+ "Missing BULK OUT endpoint %d\n",
1983+ i + 2);
1984+ kfree(new_channels);
1985+ return -ENODEV;
1986+ }
1987+
19741988 chan->writable = 1;
19751989 chan->out_synchronous = !!(out_desc & 0x40);
19761990 chan->out_seekable = !!(out_desc & 0x20);
@@ -1980,6 +1994,7 @@ static int setup_channels(struct xillyusb_dev *xdev, · 3 unmodified lines
19801994 }
19811995 }
19821996
1997+ xdev->channels = new_channels;
19831998 return 0;
19841999 }
19852000
@@ -2096,9 +2111,11 @@ static int xillyusb_discovery(struct usb_interface *interface) · 110 unmodified lines
20962111 * just after responding with the IDT, there is no reason for any
20972112 * work item to be running now. To be sure that xdev->channels
20982113 * is updated on anything that might run in parallel, flush the
2099− * workqueue, which rarely does anything.
2114+ * device's workqueue and the wakeup work item. This rarely
2115+ * does anything.
21002116 */
21012117 flush_workqueue(xdev->workq);
2118+ flush_work(&xdev->wakeup_workitem);
21022119
21032120 xdev->num_channels = num_channels;
21042121
@@ -2258,6 +2275,10 @@ static int __init xillyusb_init(void) · 153 unmodified lines
22582275 {
22592276 int rc = 0;
22602277
2278+ wakeup_wq = alloc_workqueue(xillyname, 0, 0);
2279+ if (!wakeup_wq)
2280+ return -ENOMEM;
2281+
22612282 if (LOG2_INITIAL_FIFO_BUF_SIZE > PAGE_SHIFT)
22622283 fifo_buf_order = LOG2_INITIAL_FIFO_BUF_SIZE - PAGE_SHIFT;
22632284 else
@@ -2265,12 +2286,17 @@ static int __init xillyusb_init(void) · 1 unmodified line
22652286
22662287 rc = usb_register(&xillyusb_driver);
22672288
2289+ if (rc)
2290+ destroy_workqueue(wakeup_wq);
2291+
22682292 return rc;
22692293 }
22702294
22712295 static void __exit xillyusb_exit(void)
22722296 {
22732297 usb_deregister(&xillyusb_driver);
2298+
2299+ destroy_workqueue(wakeup_wq);
22742300 }
22752301
22762302 module_init(xillyusb_init);
drivers/clk/thead/clk-th1520-ap.c+1−1
@@ -738,7 +738,7 @@ static struct ccu_div vp_axi_clk = { · 737 unmodified lines
738738 .hw.init = CLK_HW_INIT_PARENTS_HW("vp-axi",
739739 video_pll_clk_parent,
740740 &ccu_div_ops,
741− 0),
741+ CLK_IGNORE_UNUSED),
742742 },
743743 };
744744
drivers/cpufreq/amd-pstate-ut.c+8−5
@@ -160,14 +160,17 @@ static void amd_pstate_ut_check_perf(u32 index) · 159 unmodified lines
160160 lowest_perf = AMD_CPPC_LOWEST_PERF(cap1);
161161 }
162162
163− if ((highest_perf != READ_ONCE(cpudata->highest_perf)) ||
164− (nominal_perf != READ_ONCE(cpudata->nominal_perf)) ||
163+ if (highest_perf != READ_ONCE(cpudata->highest_perf) && !cpudata->hw_prefcore) {
164+ pr_err("%s cpu%d highest=%d %d highest perf doesn't match\n",
165+ __func__, cpu, highest_perf, cpudata->highest_perf);
166+ goto skip_test;
167+ }
168+ if ((nominal_perf != READ_ONCE(cpudata->nominal_perf)) ||
165169 (lowest_nonlinear_perf != READ_ONCE(cpudata->lowest_nonlinear_perf)) ||
166170 (lowest_perf != READ_ONCE(cpudata->lowest_perf))) {
167171 amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL;
168− pr_err("%s cpu%d highest=%d %d nominal=%d %d lowest_nonlinear=%d %d lowest=%d %d, they should be equal!\n",
169− __func__, cpu, highest_perf, cpudata->highest_perf,
170− nominal_perf, cpudata->nominal_perf,
172+ pr_err("%s cpu%d nominal=%d %d lowest_nonlinear=%d %d lowest=%d %d, they should be equal!\n",
173+ __func__, cpu, nominal_perf, cpudata->nominal_perf,
171174 lowest_nonlinear_perf, cpudata->lowest_nonlinear_perf,
172175 lowest_perf, cpudata->lowest_perf);
173176 goto skip_test;
drivers/cpufreq/amd-pstate.c+2−2
@@ -321,7 +321,7 @@ static inline int pstate_enable(bool enable) · 320 unmodified lines
321321 return 0;
322322
323323 for_each_present_cpu(cpu) {
324− unsigned long logical_id = topology_logical_die_id(cpu);
324+ unsigned long logical_id = topology_logical_package_id(cpu);
325325
326326 if (test_bit(logical_id, &logical_proc_id_mask))
327327 continue;
@@ -692,7 +692,7 @@ static int amd_pstate_cpu_boost_update(struct cpufreq_policy *policy, bool on) · 364 unmodified lines
692692 struct amd_cpudata *cpudata = policy->driver_data;
693693 struct cppc_perf_ctrls perf_ctrls;
694694 u32 highest_perf, nominal_perf, nominal_freq, max_freq;
695− int ret;
695+ int ret = 0;
696696
697697 highest_perf = READ_ONCE(cpudata->highest_perf);
698698 nominal_perf = READ_ONCE(cpudata->nominal_perf);
drivers/cpufreq/intel_pstate.c+1−0
@@ -3405,6 +3405,7 @@ static const struct x86_cpu_id intel_epp_default[] = { · 3404 unmodified lines
34053405 */
34063406 X86_MATCH_VFM(INTEL_ALDERLAKE_L, HWP_SET_DEF_BALANCE_PERF_EPP(102)),
34073407 X86_MATCH_VFM(INTEL_SAPPHIRERAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
3408+ X86_MATCH_VFM(INTEL_EMERALDRAPIDS_X, HWP_SET_DEF_BALANCE_PERF_EPP(32)),
34083409 X86_MATCH_VFM(INTEL_METEORLAKE_L, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
34093410 179, 64, 16)),
34103411 X86_MATCH_VFM(INTEL_ARROWLAKE, HWP_SET_EPP_VALUES(HWP_EPP_POWERSAVE,
drivers/cxl/core/pci.c+6−4
@@ -834,11 +834,13 @@ static void cxl_disable_rch_root_ints(struct cxl_dport *dport) · 833 unmodified lines
834834 void cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
835835 {
836836 struct device *dport_dev = dport->dport_dev;
837− struct pci_host_bridge *host_bridge;
838837
839− host_bridge = to_pci_host_bridge(dport_dev);
840− if (host_bridge->native_aer)
841− dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
838+ if (dport->rch) {
839+ struct pci_host_bridge *host_bridge = to_pci_host_bridge(dport_dev);
840+
841+ if (host_bridge->native_aer)
842+ dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
843+ }
842844
843845 dport->reg_map.host = host;
844846 cxl_dport_map_regs(dport);
drivers/dma/dw-edma/dw-hdma-v0-core.c+8−18
@@ -17,8 +17,8 @@ enum dw_hdma_control { · 16 unmodified lines
1717 DW_HDMA_V0_CB = BIT(0),
1818 DW_HDMA_V0_TCB = BIT(1),
1919 DW_HDMA_V0_LLP = BIT(2),
20− DW_HDMA_V0_LIE = BIT(3),
21− DW_HDMA_V0_RIE = BIT(4),
20+ DW_HDMA_V0_LWIE = BIT(3),
21+ DW_HDMA_V0_RWIE = BIT(4),
2222 DW_HDMA_V0_CCS = BIT(8),
2323 DW_HDMA_V0_LLE = BIT(9),
2424 };
@@ -195,25 +195,14 @@ static void dw_hdma_v0_write_ll_link(struct dw_edma_chunk *chunk, · 170 unmodified lines
195195 static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
196196 {
197197 struct dw_edma_burst *child;
198− struct dw_edma_chan *chan = chunk->chan;
199198 u32 control = 0, i = 0;
200− int j;
201199
202200 if (chunk->cb)
203201 control = DW_HDMA_V0_CB;
204202
205− j = chunk->bursts_alloc;
206− list_for_each_entry(child, &chunk->burst->list, list) {
207− j--;
208− if (!j) {
209− control |= DW_HDMA_V0_LIE;
210− if (!(chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL))
211− control |= DW_HDMA_V0_RIE;
212− }
213−
203+ list_for_each_entry(child, &chunk->burst->list, list)
214204 dw_hdma_v0_write_ll_data(chunk, i++, control, child->sz,
215205 child->sar, child->dar);
216− }
217206
218207 control = DW_HDMA_V0_LLP | DW_HDMA_V0_TCB;
219208 if (!chunk->cb)
@@ -247,10 +236,11 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) · 27 unmodified lines
247236 if (first) {
248237 /* Enable engine */
249238 SET_CH_32(dw, chan->dir, chan->id, ch_en, BIT(0));
250− /* Interrupt enable&unmask - done, abort */
251− tmp = GET_CH_32(dw, chan->dir, chan->id, int_setup) |
252− HDMA_V0_STOP_INT_MASK | HDMA_V0_ABORT_INT_MASK |
253− HDMA_V0_LOCAL_STOP_INT_EN | HDMA_V0_LOCAL_ABORT_INT_EN;
239+ /* Interrupt unmask - stop, abort */
240+ tmp = GET_CH_32(dw, chan->dir, chan->id, int_setup);
241+ tmp &= ~(HDMA_V0_STOP_INT_MASK | HDMA_V0_ABORT_INT_MASK);
242+ /* Interrupt enable - stop, abort */
243+ tmp |= HDMA_V0_LOCAL_STOP_INT_EN | HDMA_V0_LOCAL_ABORT_INT_EN;
254244 if (!(dw->chip->flags & DW_EDMA_CHIP_LOCAL))
255245 tmp |= HDMA_V0_REMOTE_STOP_INT_EN | HDMA_V0_REMOTE_ABORT_INT_EN;
256246 SET_CH_32(dw, chan->dir, chan->id, int_setup, tmp);
drivers/dma/dw/core.c+109−22
@@ -16,6 +16,7 @@ · 15 unmodified lines
1616 #include <linux/init.h>
1717 #include <linux/interrupt.h>
1818 #include <linux/io.h>
19+#include <linux/log2.h>
1920 #include <linux/mm.h>
2021 #include <linux/module.h>
2122 #include <linux/slab.h>
@@ -621,12 +622,10 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, · 599 unmodified lines
621622 struct dw_desc *prev;
622623 struct dw_desc *first;
623624 u32 ctllo, ctlhi;
624− u8 m_master = dwc->dws.m_master;
625− u8 lms = DWC_LLP_LMS(m_master);
625+ u8 lms = DWC_LLP_LMS(dwc->dws.m_master);
626626 dma_addr_t reg;
627627 unsigned int reg_width;
628628 unsigned int mem_width;
629− unsigned int data_width = dw->pdata->data_width[m_master];
630629 unsigned int i;
631630 struct scatterlist *sg;
632631 size_t total_len = 0;
@@ -660,7 +659,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, · 27 unmodified lines
660659 mem = sg_dma_address(sg);
661660 len = sg_dma_len(sg);
662661
663− mem_width = __ffs(data_width | mem | len);
662+ mem_width = __ffs(sconfig->src_addr_width | mem | len);
664663
665664 slave_sg_todev_fill_desc:
666665 desc = dwc_desc_get(dwc);
@@ -720,7 +719,7 @@ slave_sg_fromdev_fill_desc: · 53 unmodified lines
720719 lli_write(desc, sar, reg);
721720 lli_write(desc, dar, mem);
722721 lli_write(desc, ctlhi, ctlhi);
723− mem_width = __ffs(data_width | mem);
722+ mem_width = __ffs(sconfig->dst_addr_width | mem);
724723 lli_write(desc, ctllo, ctllo | DWC_CTLL_DST_WIDTH(mem_width));
725724 desc->len = dlen;
726725
@@ -780,20 +779,108 @@ bool dw_dma_filter(struct dma_chan *chan, void *param) · 53 unmodified lines
780779 }
781780 EXPORT_SYMBOL_GPL(dw_dma_filter);
782781
783−static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
782+static int dwc_verify_maxburst(struct dma_chan *chan)
784783 {
785784 struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
786− struct dw_dma *dw = to_dw_dma(chan->device);
787785
788− memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
786+ dwc->dma_sconfig.src_maxburst =
787+ clamp(dwc->dma_sconfig.src_maxburst, 1U, dwc->max_burst);
788+ dwc->dma_sconfig.dst_maxburst =
789+ clamp(dwc->dma_sconfig.dst_maxburst, 1U, dwc->max_burst);
789790
790791 dwc->dma_sconfig.src_maxburst =
791− clamp(dwc->dma_sconfig.src_maxburst, 0U, dwc->max_burst);
792+ rounddown_pow_of_two(dwc->dma_sconfig.src_maxburst);
792793 dwc->dma_sconfig.dst_maxburst =
793− clamp(dwc->dma_sconfig.dst_maxburst, 0U, dwc->max_burst);
794+ rounddown_pow_of_two(dwc->dma_sconfig.dst_maxburst);
794795
795− dw->encode_maxburst(dwc, &dwc->dma_sconfig.src_maxburst);
796− dw->encode_maxburst(dwc, &dwc->dma_sconfig.dst_maxburst);
796+ return 0;
797+}
798+
799+static int dwc_verify_p_buswidth(struct dma_chan *chan)
800+{
801+ struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
802+ struct dw_dma *dw = to_dw_dma(chan->device);
803+ u32 reg_width, max_width;
804+
805+ if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV)
806+ reg_width = dwc->dma_sconfig.dst_addr_width;
807+ else if (dwc->dma_sconfig.direction == DMA_DEV_TO_MEM)
808+ reg_width = dwc->dma_sconfig.src_addr_width;
809+ else /* DMA_MEM_TO_MEM */
810+ return 0;
811+
812+ max_width = dw->pdata->data_width[dwc->dws.p_master];
813+
814+ /* Fall-back to 1-byte transfer width if undefined */
815+ if (reg_width == DMA_SLAVE_BUSWIDTH_UNDEFINED)
816+ reg_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
817+ else if (!is_power_of_2(reg_width) || reg_width > max_width)
818+ return -EINVAL;
819+ else /* bus width is valid */
820+ return 0;
821+
822+ /* Update undefined addr width value */
823+ if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV)
824+ dwc->dma_sconfig.dst_addr_width = reg_width;
825+ else /* DMA_DEV_TO_MEM */
826+ dwc->dma_sconfig.src_addr_width = reg_width;
827+
828+ return 0;
829+}
830+
831+static int dwc_verify_m_buswidth(struct dma_chan *chan)
832+{
833+ struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
834+ struct dw_dma *dw = to_dw_dma(chan->device);
835+ u32 reg_width, reg_burst, mem_width;
836+
837+ mem_width = dw->pdata->data_width[dwc->dws.m_master];
838+
839+ /*
840+ * It's possible to have a data portion locked in the DMA FIFO in case
841+ * of the channel suspension. Subsequent channel disabling will cause
842+ * that data silent loss. In order to prevent that maintain the src and
843+ * dst transfer widths coherency by means of the relation:
844+ * (CTLx.SRC_TR_WIDTH * CTLx.SRC_MSIZE >= CTLx.DST_TR_WIDTH)
845+ * Look for the details in the commit message that brings this change.
846+ *
847+ * Note the DMA configs utilized in the calculations below must have
848+ * been verified to have correct values by this method call.
849+ */
850+ if (dwc->dma_sconfig.direction == DMA_MEM_TO_DEV) {
851+ reg_width = dwc->dma_sconfig.dst_addr_width;
852+ if (mem_width < reg_width)
853+ return -EINVAL;
854+
855+ dwc->dma_sconfig.src_addr_width = mem_width;
856+ } else if (dwc->dma_sconfig.direction == DMA_DEV_TO_MEM) {
857+ reg_width = dwc->dma_sconfig.src_addr_width;
858+ reg_burst = dwc->dma_sconfig.src_maxburst;
859+
860+ dwc->dma_sconfig.dst_addr_width = min(mem_width, reg_width * reg_burst);
861+ }
862+
863+ return 0;
864+}
865+
866+static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig)
867+{
868+ struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
869+ int ret;
870+
871+ memcpy(&dwc->dma_sconfig, sconfig, sizeof(*sconfig));
872+
873+ ret = dwc_verify_maxburst(chan);
874+ if (ret)
875+ return ret;
876+
877+ ret = dwc_verify_p_buswidth(chan);
878+ if (ret)
879+ return ret;
880+
881+ ret = dwc_verify_m_buswidth(chan);
882+ if (ret)
883+ return ret;
797884
798885 return 0;
799886 }
@@ -1068,7 +1155,7 @@ int do_dma_probe(struct dw_dma_chip *chip) · 268 unmodified lines
10681155 bool autocfg = false;
10691156 unsigned int dw_params;
10701157 unsigned int i;
1071− int err;
1158+ int ret;
10721159
10731160 dw->pdata = devm_kzalloc(chip->dev, sizeof(*dw->pdata), GFP_KERNEL);
10741161 if (!dw->pdata)
@@ -1084,7 +1171,7 @@ int do_dma_probe(struct dw_dma_chip *chip) · 9 unmodified lines
10841171
10851172 autocfg = dw_params >> DW_PARAMS_EN & 1;
10861173 if (!autocfg) {
1087− err = -EINVAL;
1174+ ret = -EINVAL;
10881175 goto err_pdata;
10891176 }
10901177
@@ -1104,7 +1191,7 @@ int do_dma_probe(struct dw_dma_chip *chip) · 13 unmodified lines
11041191 pdata->chan_allocation_order = CHAN_ALLOCATION_ASCENDING;
11051192 pdata->chan_priority = CHAN_PRIORITY_ASCENDING;
11061193 } else if (chip->pdata->nr_channels > DW_DMA_MAX_NR_CHANNELS) {
1107− err = -EINVAL;
1194+ ret = -EINVAL;
11081195 goto err_pdata;
11091196 } else {
11101197 memcpy(dw->pdata, chip->pdata, sizeof(*dw->pdata));
@@ -1116,7 +1203,7 @@ int do_dma_probe(struct dw_dma_chip *chip) · 5 unmodified lines
11161203 dw->chan = devm_kcalloc(chip->dev, pdata->nr_channels, sizeof(*dw->chan),
11171204 GFP_KERNEL);
11181205 if (!dw->chan) {
1119− err = -ENOMEM;
1206+ ret = -ENOMEM;
11201207 goto err_pdata;
11211208 }
11221209
@@ -1134,15 +1221,15 @@ int do_dma_probe(struct dw_dma_chip *chip) · 11 unmodified lines
11341221 sizeof(struct dw_desc), 4, 0);
11351222 if (!dw->desc_pool) {
11361223 dev_err(chip->dev, "No memory for descriptors dma pool\n");
1137− err = -ENOMEM;
1224+ ret = -ENOMEM;
11381225 goto err_pdata;
11391226 }
11401227
11411228 tasklet_setup(&dw->tasklet, dw_dma_tasklet);
11421229
1143− err = request_irq(chip->irq, dw_dma_interrupt, IRQF_SHARED,
1230+ ret = request_irq(chip->irq, dw_dma_interrupt, IRQF_SHARED,
11441231 dw->name, dw);
1145− if (err)
1232+ if (ret)
11461233 goto err_pdata;
11471234
11481235 INIT_LIST_HEAD(&dw->dma.channels);
@@ -1254,8 +1341,8 @@ int do_dma_probe(struct dw_dma_chip *chip) · 105 unmodified lines
12541341 */
12551342 dma_set_max_seg_size(dw->dma.dev, dw->chan[0].block_size);
12561343
1257− err = dma_async_device_register(&dw->dma);
1258− if (err)
1344+ ret = dma_async_device_register(&dw->dma);
1345+ if (ret)
12591346 goto err_dma_register;
12601347
12611348 dev_info(chip->dev, "DesignWare DMA Controller, %d channels\n",
@@ -1269,7 +1356,7 @@ err_dma_register: · 7 unmodified lines
12691356 free_irq(chip->irq, dw);
12701357 err_pdata:
12711358 pm_runtime_put_sync_suspend(chip->dev);
1272− return err;
1359+ return ret;
12731360 }
12741361
12751362 int do_dma_remove(struct dw_dma_chip *chip)
drivers/dma/dw/dw.c+24−16
@@ -64,30 +64,39 @@ static size_t dw_dma_block2bytes(struct dw_dma_chan *dwc, u32 block, u32 width) · 63 unmodified lines
6464 return DWC_CTLH_BLOCK_TS(block) << width;
6565 }
6666
67+static inline u8 dw_dma_encode_maxburst(u32 maxburst)
68+{
69+ /*
70+ * Fix burst size according to dw_dmac. We need to convert them as:
71+ * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3.
72+ */
73+ return maxburst > 1 ? fls(maxburst) - 2 : 0;
74+}
75+
6776 static u32 dw_dma_prepare_ctllo(struct dw_dma_chan *dwc)
6877 {
6978 struct dma_slave_config *sconfig = &dwc->dma_sconfig;
70− u8 smsize = (dwc->direction == DMA_DEV_TO_MEM) ? sconfig->src_maxburst : 0;
71− u8 dmsize = (dwc->direction == DMA_MEM_TO_DEV) ? sconfig->dst_maxburst : 0;
72− u8 p_master = dwc->dws.p_master;
73− u8 m_master = dwc->dws.m_master;
74− u8 dms = (dwc->direction == DMA_MEM_TO_DEV) ? p_master : m_master;
75− u8 sms = (dwc->direction == DMA_DEV_TO_MEM) ? p_master : m_master;
79+ u8 smsize = 0, dmsize = 0;
80+ u8 sms, dms;
81+
82+ if (dwc->direction == DMA_MEM_TO_DEV) {
83+ sms = dwc->dws.m_master;
84+ dms = dwc->dws.p_master;
85+ dmsize = dw_dma_encode_maxburst(sconfig->dst_maxburst);
86+ } else if (dwc->direction == DMA_DEV_TO_MEM) {
87+ sms = dwc->dws.p_master;
88+ dms = dwc->dws.m_master;
89+ smsize = dw_dma_encode_maxburst(sconfig->src_maxburst);
90+ } else /* DMA_MEM_TO_MEM */ {
91+ sms = dwc->dws.m_master;
92+ dms = dwc->dws.m_master;
93+ }
7694
7795 return DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN |
7896 DWC_CTLL_DST_MSIZE(dmsize) | DWC_CTLL_SRC_MSIZE(smsize) |
7997 DWC_CTLL_DMS(dms) | DWC_CTLL_SMS(sms);
8098 }
8199
82−static void dw_dma_encode_maxburst(struct dw_dma_chan *dwc, u32 *maxburst)
83−{
84− /*
85− * Fix burst size according to dw_dmac. We need to convert them as:
86− * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3.
87− */
88− *maxburst = *maxburst > 1 ? fls(*maxburst) - 2 : 0;
89−}
90−
91100 static void dw_dma_set_device_name(struct dw_dma *dw, int id)
92101 {
93102 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id);
@@ -116,7 +125,6 @@ int dw_dma_probe(struct dw_dma_chip *chip) · 22 unmodified lines
116125 dw->suspend_chan = dw_dma_suspend_chan;
117126 dw->resume_chan = dw_dma_resume_chan;
118127 dw->prepare_ctllo = dw_dma_prepare_ctllo;
119− dw->encode_maxburst = dw_dma_encode_maxburst;
120128 dw->bytes2block = dw_dma_bytes2block;
121129 dw->block2bytes = dw_dma_block2bytes;
122130
drivers/dma/dw/idma32.c+11−8
@@ -199,21 +199,25 @@ static size_t idma32_block2bytes(struct dw_dma_chan *dwc, u32 block, u32 width) · 198 unmodified lines
199199 return IDMA32C_CTLH_BLOCK_TS(block);
200200 }
201201
202+static inline u8 idma32_encode_maxburst(u32 maxburst)
203+{
204+ return maxburst > 1 ? fls(maxburst) - 1 : 0;
205+}
206+
202207 static u32 idma32_prepare_ctllo(struct dw_dma_chan *dwc)
203208 {
204209 struct dma_slave_config *sconfig = &dwc->dma_sconfig;
205− u8 smsize = (dwc->direction == DMA_DEV_TO_MEM) ? sconfig->src_maxburst : 0;
206− u8 dmsize = (dwc->direction == DMA_MEM_TO_DEV) ? sconfig->dst_maxburst : 0;
210+ u8 smsize = 0, dmsize = 0;
211+
212+ if (dwc->direction == DMA_MEM_TO_DEV)
213+ dmsize = idma32_encode_maxburst(sconfig->dst_maxburst);
214+ else if (dwc->direction == DMA_DEV_TO_MEM)
215+ smsize = idma32_encode_maxburst(sconfig->src_maxburst);
207216
208217 return DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN |
209218 DWC_CTLL_DST_MSIZE(dmsize) | DWC_CTLL_SRC_MSIZE(smsize);
210219 }
211220
212−static void idma32_encode_maxburst(struct dw_dma_chan *dwc, u32 *maxburst)
213−{
214− *maxburst = *maxburst > 1 ? fls(*maxburst) - 1 : 0;
215−}
216−
217221 static void idma32_set_device_name(struct dw_dma *dw, int id)
218222 {
219223 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id);
@@ -270,7 +274,6 @@ int idma32_dma_probe(struct dw_dma_chip *chip) · 50 unmodified lines
270274 dw->suspend_chan = idma32_suspend_chan;
271275 dw->resume_chan = idma32_resume_chan;
272276 dw->prepare_ctllo = idma32_prepare_ctllo;
273− dw->encode_maxburst = idma32_encode_maxburst;
274277 dw->bytes2block = idma32_bytes2block;
275278 dw->block2bytes = idma32_block2bytes;
276279
drivers/dma/dw/platform.c+10−10
@@ -29,7 +29,7 @@ static int dw_probe(struct platform_device *pdev) · 28 unmodified lines
2929 struct dw_dma_chip_pdata *data;
3030 struct dw_dma_chip *chip;
3131 struct device *dev = &pdev->dev;
32− int err;
32+ int ret;
3333
3434 match = device_get_match_data(dev);
3535 if (!match)
@@ -51,9 +51,9 @@ static int dw_probe(struct platform_device *pdev) · 15 unmodified lines
5151 if (IS_ERR(chip->regs))
5252 return PTR_ERR(chip->regs);
5353
54− err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
55− if (err)
56− return err;
54+ ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
55+ if (ret)
56+ return ret;
5757
5858 if (!data->pdata)
5959 data->pdata = dev_get_platdata(dev);
@@ -69,14 +69,14 @@ static int dw_probe(struct platform_device *pdev) · 9 unmodified lines
6969 chip->clk = devm_clk_get_optional(chip->dev, "hclk");
7070 if (IS_ERR(chip->clk))
7171 return PTR_ERR(chip->clk);
72− err = clk_prepare_enable(chip->clk);
73− if (err)
74− return err;
72+ ret = clk_prepare_enable(chip->clk);
73+ if (ret)
74+ return ret;
7575
7676 pm_runtime_enable(&pdev->dev);
7777
78− err = data->probe(chip);
79− if (err)
78+ ret = data->probe(chip);
79+ if (ret)
8080 goto err_dw_dma_probe;
8181
8282 platform_set_drvdata(pdev, data);
@@ -90,7 +90,7 @@ static int dw_probe(struct platform_device *pdev) · 7 unmodified lines
9090 err_dw_dma_probe:
9191 pm_runtime_disable(&pdev->dev);
9292 clk_disable_unprepare(chip->clk);
93− return err;
93+ return ret;
9494 }
9595
9696 static void dw_remove(struct platform_device *pdev)
drivers/dma/dw/regs.h+0−1
@@ -327,7 +327,6 @@ struct dw_dma { · 326 unmodified lines
327327 void (*suspend_chan)(struct dw_dma_chan *dwc, bool drain);
328328 void (*resume_chan)(struct dw_dma_chan *dwc, bool drain);
329329 u32 (*prepare_ctllo)(struct dw_dma_chan *dwc);
330− void (*encode_maxburst)(struct dw_dma_chan *dwc, u32 *maxburst);
331330 u32 (*bytes2block)(struct dw_dma_chan *dwc, size_t bytes,
332331 unsigned int width, size_t *len);
333332 size_t (*block2bytes)(struct dw_dma_chan *dwc, u32 block, u32 width);
drivers/dma/stm32/stm32-dma3.c+1−1
@@ -403,6 +403,7 @@ static struct stm32_dma3_swdesc *stm32_dma3_chan_desc_alloc(struct stm32_dma3_ch · 402 unmodified lines
403403 swdesc = kzalloc(struct_size(swdesc, lli, count), GFP_NOWAIT);
404404 if (!swdesc)
405405 return NULL;
406+ swdesc->lli_size = count;
406407
407408 for (i = 0; i < count; i++) {
408409 swdesc->lli[i].hwdesc = dma_pool_zalloc(chan->lli_pool, GFP_NOWAIT,
@@ -410,7 +411,6 @@ static struct stm32_dma3_swdesc *stm32_dma3_chan_desc_alloc(struct stm32_dma3_ch · 1 unmodified line
410411 if (!swdesc->lli[i].hwdesc)
411412 goto err_pool_free;
412413 }
413− swdesc->lli_size = count;
414414 swdesc->ccr = 0;
415415
416416 /* Set LL base address */
drivers/dma/ti/omap-dma.c+3−3
@@ -1186,10 +1186,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_cyclic( · 1185 unmodified lines
11861186 d->dev_addr = dev_addr;
11871187 d->fi = burst;
11881188 d->es = es;
1189+ d->sglen = 1;
11891190 d->sg[0].addr = buf_addr;
11901191 d->sg[0].en = period_len / es_bytes[es];
11911192 d->sg[0].fn = buf_len / period_len;
1192− d->sglen = 1;
11931193
11941194 d->ccr = c->ccr;
11951195 if (dir == DMA_DEV_TO_MEM)
@@ -1258,10 +1258,10 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_memcpy( · 62 unmodified lines
12581258 d->dev_addr = src;
12591259 d->fi = 0;
12601260 d->es = data_type;
1261+ d->sglen = 1;
12611262 d->sg[0].en = len / BIT(data_type);
12621263 d->sg[0].fn = 1;
12631264 d->sg[0].addr = dest;
1264− d->sglen = 1;
12651265 d->ccr = c->ccr;
12661266 d->ccr |= CCR_DST_AMODE_POSTINC | CCR_SRC_AMODE_POSTINC;
12671267
@@ -1309,6 +1309,7 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_interleaved( · 41 unmodified lines
13091309 if (data_type > CSDP_DATA_TYPE_32)
13101310 data_type = CSDP_DATA_TYPE_32;
13111311
1312+ d->sglen = 1;
13121313 sg = &d->sg[0];
13131314 d->dir = DMA_MEM_TO_MEM;
13141315 d->dev_addr = xt->src_start;
@@ -1316,7 +1317,6 @@ static struct dma_async_tx_descriptor *omap_dma_prep_dma_interleaved( · 1 unmodified line
13161317 sg->en = xt->sgl[0].size / BIT(data_type);
13171318 sg->fn = xt->numf;
13181319 sg->addr = xt->dst_start;
1319− d->sglen = 1;
13201320 d->ccr = c->ccr;
13211321
13221322 src_icg = dmaengine_get_src_icg(xt, &xt->sgl[0]);
drivers/edac/skx_common.h+0−1
@@ -45,7 +45,6 @@ · 44 unmodified lines
4545 #define I10NM_NUM_CHANNELS MAX(I10NM_NUM_DDR_CHANNELS, I10NM_NUM_HBM_CHANNELS)
4646 #define I10NM_NUM_DIMMS MAX(I10NM_NUM_DDR_DIMMS, I10NM_NUM_HBM_DIMMS)
4747
48−#define MAX(a, b) ((a) > (b) ? (a) : (b))
4948 #define NUM_IMC MAX(SKX_NUM_IMC, I10NM_NUM_IMC)
5049 #define NUM_CHANNELS MAX(SKX_NUM_CHANNELS, I10NM_NUM_CHANNELS)
5150 #define NUM_DIMMS MAX(SKX_NUM_DIMMS, I10NM_NUM_DIMMS)
drivers/firmware/efi/libstub/Makefile+6−1
@@ -27,7 +27,8 @@ cflags-$(CONFIG_ARM64) += -fpie $(DISABLE_STACKLEAK_PLUGIN) \ · 26 unmodified lines
2727 cflags-$(CONFIG_ARM) += -DEFI_HAVE_STRLEN -DEFI_HAVE_STRNLEN \
2828 -DEFI_HAVE_MEMCHR -DEFI_HAVE_STRRCHR \
2929 -DEFI_HAVE_STRCMP -fno-builtin -fpic \
30− $(call cc-option,-mno-single-pic-base)
30+ $(call cc-option,-mno-single-pic-base) \
31+ $(DISABLE_STACKLEAK_PLUGIN)
3132 cflags-$(CONFIG_RISCV) += -fpic -DNO_ALTERNATIVE -mno-relax \
3233 $(DISABLE_STACKLEAK_PLUGIN)
3334 cflags-$(CONFIG_LOONGARCH) += -fpie
@@ -57,6 +58,10 @@ KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_CFI), $(KBUILD_CFLAGS)) · 23 unmodified lines
5758 # disable LTO
5859 KBUILD_CFLAGS := $(filter-out $(CC_FLAGS_LTO), $(KBUILD_CFLAGS))
5960
61+# The .data section would be renamed to .data.efistub, therefore, remove
62+# `-fdata-sections` flag from KBUILD_CFLAGS_KERNEL
63+KBUILD_CFLAGS_KERNEL := $(filter-out -fdata-sections, $(KBUILD_CFLAGS_KERNEL))
64+
6065 lib-y := efi-stub-helper.o gop.o secureboot.o tpm.o \
6166 file.o mem.o random.o randomalloc.o pci.o \
6267 skip_spaces.o lib-cmdline.o lib-ctype.o \
drivers/firmware/microchip/mpfs-auto-update.c+1−1
@@ -166,7 +166,7 @@ static enum fw_upload_err mpfs_auto_update_poll_complete(struct fw_upload *fw_up · 165 unmodified lines
166166 */
167167 ret = wait_for_completion_timeout(&priv->programming_complete,
168168 msecs_to_jiffies(AUTO_UPDATE_TIMEOUT_MS));
169− if (ret)
169+ if (!ret)
170170 return FW_UPLOAD_ERR_TIMEOUT;
171171
172172 return FW_UPLOAD_ERR_NONE;
drivers/firmware/qcom/qcom_scm-smc.c+1−1
@@ -73,7 +73,7 @@ int scm_get_wq_ctx(u32 *wq_ctx, u32 *flags, u32 *more_pending) · 72 unmodified lines
7373 struct arm_smccc_res get_wq_res;
7474 struct arm_smccc_args get_wq_ctx = {0};
7575
76− get_wq_ctx.args[0] = ARM_SMCCC_CALL_VAL(ARM_SMCCC_STD_CALL,
76+ get_wq_ctx.args[0] = ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL,
7777 ARM_SMCCC_SMC_64, ARM_SMCCC_OWNER_SIP,
7878 SCM_SMC_FNID(QCOM_SCM_SVC_WAITQ, QCOM_SCM_WAITQ_GET_WQ_CTX));
7979
drivers/firmware/qcom/qcom_tzmem.c+22−11
@@ -40,7 +40,6 @@ struct qcom_tzmem_pool { · 39 unmodified lines
4040 };
4141
4242 struct qcom_tzmem_chunk {
43− phys_addr_t paddr;
4443 size_t size;
4544 struct qcom_tzmem_pool *owner;
4645 };
@@ -78,6 +77,7 @@ static bool qcom_tzmem_using_shm_bridge; · 31 unmodified lines
7877 /* List of machines that are known to not support SHM bridge correctly. */
7978 static const char *const qcom_tzmem_blacklist[] = {
8079 "qcom,sc8180x",
80+ "qcom,sdm670", /* failure in GPU firmware loading */
8181 "qcom,sdm845", /* reset in rmtfs memory assignment */
8282 "qcom,sm8150", /* reset in rmtfs memory assignment */
8383 NULL
@@ -385,7 +385,6 @@ again: · 301 unmodified lines
385385 return NULL;
386386 }
387387
388− chunk->paddr = gen_pool_virt_to_phys(pool->genpool, vaddr);
389388 chunk->size = size;
390389 chunk->owner = pool;
391390
@@ -431,25 +430,37 @@ void qcom_tzmem_free(void *vaddr) · 39 unmodified lines
431430 EXPORT_SYMBOL_GPL(qcom_tzmem_free);
432431
433432 /**
434− * qcom_tzmem_to_phys() - Map the virtual address of a TZ buffer to physical.
435− * @vaddr: Virtual address of the buffer allocated from a TZ memory pool.
433+ * qcom_tzmem_to_phys() - Map the virtual address of TZ memory to physical.
434+ * @vaddr: Virtual address of memory allocated from a TZ memory pool.
436435 *
437− * Can be used in any context. The address must have been returned by a call
438− * to qcom_tzmem_alloc().
436+ * Can be used in any context. The address must point to memory allocated
437+ * using qcom_tzmem_alloc().
439438 *
440− * Returns: Physical address of the buffer.
439+ * Returns:
440+ * Physical address mapped from the virtual or 0 if the mapping failed.
441441 */
442442 phys_addr_t qcom_tzmem_to_phys(void *vaddr)
443443 {
444444 struct qcom_tzmem_chunk *chunk;
445+ struct radix_tree_iter iter;
446+ void __rcu **slot;
447+ phys_addr_t ret;
445448
446449 guard(spinlock_irqsave)(&qcom_tzmem_chunks_lock);
447450
448− chunk = radix_tree_lookup(&qcom_tzmem_chunks, (unsigned long)vaddr);
449− if (!chunk)
450− return 0;
451+ radix_tree_for_each_slot(slot, &qcom_tzmem_chunks, &iter, 0) {
452+ chunk = radix_tree_deref_slot_protected(slot,
453+ &qcom_tzmem_chunks_lock);
451454
452− return chunk->paddr;
455+ ret = gen_pool_virt_to_phys(chunk->owner->genpool,
456+ (unsigned long)vaddr);
457+ if (ret == -1)
458+ continue;
459+
460+ return ret;
461+ }
462+
463+ return 0;
453464 }
454465 EXPORT_SYMBOL_GPL(qcom_tzmem_to_phys);
455466
drivers/firmware/sysfb.c+13−6
@@ -39,6 +39,8 @@ static struct platform_device *pd; · 38 unmodified lines
3939 static DEFINE_MUTEX(disable_lock);
4040 static bool disabled;
4141
42+static struct device *sysfb_parent_dev(const struct screen_info *si);
43+
4244 static bool sysfb_unregister(void)
4345 {
4446 if (IS_ERR_OR_NULL(pd))
@@ -52,6 +54,7 @@ static bool sysfb_unregister(void) · 7 unmodified lines
5254
5355 /**
5456 * sysfb_disable() - disable the Generic System Framebuffers support
57+ * @dev: the device to check if non-NULL
5558 *
5659 * This disables the registration of system framebuffer devices that match the
5760 * generic drivers that make use of the system framebuffer set up by firmware.
@@ -61,17 +64,21 @@ static bool sysfb_unregister(void) · 3 unmodified lines
6164 * Context: The function can sleep. A @disable_lock mutex is acquired to serialize
6265 * against sysfb_init(), that registers a system framebuffer device.
6366 */
64−void sysfb_disable(void)
67+void sysfb_disable(struct device *dev)
6568 {
69+ struct screen_info *si = &screen_info;
70+
6671 mutex_lock(&disable_lock);
67− sysfb_unregister();
68− disabled = true;
72+ if (!dev || dev == sysfb_parent_dev(si)) {
73+ sysfb_unregister();
74+ disabled = true;
75+ }
6976 mutex_unlock(&disable_lock);
7077 }
7178 EXPORT_SYMBOL_GPL(sysfb_disable);
7279
7380 #if defined(CONFIG_PCI)
74−static __init bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev)
81+static bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev)
7582 {
7683 /*
7784 * TODO: Try to integrate this code into the PCI subsystem
@@ -87,13 +94,13 @@ static __init bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev) · 9 unmodified lines
8794 return true;
8895 }
8996 #else
90−static __init bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev)
97+static bool sysfb_pci_dev_is_enabled(struct pci_dev *pdev)
9198 {
9299 return false;
93100 }
94101 #endif
95102
96−static __init struct device *sysfb_parent_dev(const struct screen_info *si)
103+static struct device *sysfb_parent_dev(const struct screen_info *si)
97104 {
98105 struct pci_dev *pdev;
99106
drivers/fsi/fsi-core.c+1−0
@@ -1444,5 +1444,6 @@ static void fsi_exit(void) · 1443 unmodified lines
14441444 }
14451445 module_exit(fsi_exit);
14461446 module_param(discard_errors, int, 0664);
1447+MODULE_DESCRIPTION("FSI core driver");
14471448 MODULE_LICENSE("GPL");
14481449 MODULE_PARM_DESC(discard_errors, "Don't invoke error handling on bus accesses");
drivers/fsi/fsi-master-aspeed.c+1−0
@@ -670,4 +670,5 @@ static struct platform_driver fsi_master_aspeed_driver = { · 669 unmodified lines
670670 };
671671
672672 module_platform_driver(fsi_master_aspeed_driver);
673+MODULE_DESCRIPTION("FSI master driver for AST2600");
673674 MODULE_LICENSE("GPL");
drivers/fsi/fsi-master-ast-cf.c+2−1
@@ -1,7 +1,7 @@
11 // SPDX-License-Identifier: GPL-2.0+
22 // Copyright 2018 IBM Corp
33 /*
4− * A FSI master controller, using a simple GPIO bit-banging interface
4+ * A FSI master based on Aspeed ColdFire coprocessor
55 */
66
77 #include <linux/crc4.h>
@@ -1438,5 +1438,6 @@ static struct platform_driver fsi_master_acf = { · 1430 unmodified lines
14381438 };
14391439
14401440 module_platform_driver(fsi_master_acf);
1441+MODULE_DESCRIPTION("A FSI master based on Aspeed ColdFire coprocessor");
14411442 MODULE_LICENSE("GPL");
14421443 MODULE_FIRMWARE(FW_FILE_NAME);
drivers/fsi/fsi-master-gpio.c+1−0
@@ -892,4 +892,5 @@ static struct platform_driver fsi_master_gpio_driver = { · 891 unmodified lines
892892 };
893893
894894 module_platform_driver(fsi_master_gpio_driver);
895+MODULE_DESCRIPTION("A FSI master controller, using a simple GPIO bit-banging interface");
895896 MODULE_LICENSE("GPL");
drivers/fsi/fsi-master-hub.c+1−0
@@ -295,4 +295,5 @@ static struct fsi_driver hub_master_driver = { · 294 unmodified lines
295295 };
296296
297297 module_fsi_driver(hub_master_driver);
298+MODULE_DESCRIPTION("FSI hub master driver");
298299 MODULE_LICENSE("GPL");
drivers/fsi/fsi-scom.c+1−0
@@ -625,4 +625,5 @@ static void scom_exit(void) · 624 unmodified lines
625625
626626 module_init(scom_init);
627627 module_exit(scom_exit);
628+MODULE_DESCRIPTION("SCOM FSI Client device driver");
628629 MODULE_LICENSE("GPL");
drivers/gpio/gpio-mlxbf3.c+14−0
@@ -39,6 +39,8 @@ · 38 unmodified lines
3939 #define MLXBF_GPIO_CAUSE_OR_EVTEN0 0x14
4040 #define MLXBF_GPIO_CAUSE_OR_CLRCAUSE 0x18
4141
42+#define MLXBF_GPIO_CLR_ALL_INTS GENMASK(31, 0)
43+
4244 struct mlxbf3_gpio_context {
4345 struct gpio_chip gc;
4446
@@ -82,6 +84,8 @@ static void mlxbf3_gpio_irq_disable(struct irq_data *irqd) · 37 unmodified lines
8284 val = readl(gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0);
8385 val &= ~BIT(offset);
8486 writel(val, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0);
87+
88+ writel(BIT(offset), gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CLRCAUSE);
8589 raw_spin_unlock_irqrestore(&gs->gc.bgpio_lock, flags);
8690
8791 gpiochip_disable_irq(gc, offset);
@@ -253,6 +257,15 @@ static int mlxbf3_gpio_probe(struct platform_device *pdev) · 165 unmodified lines
253257 return 0;
254258 }
255259
260+static void mlxbf3_gpio_shutdown(struct platform_device *pdev)
261+{
262+ struct mlxbf3_gpio_context *gs = platform_get_drvdata(pdev);
263+
264+ /* Disable and clear all interrupts */
265+ writel(0, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_EVTEN0);
266+ writel(MLXBF_GPIO_CLR_ALL_INTS, gs->gpio_cause_io + MLXBF_GPIO_CAUSE_OR_CLRCAUSE);
267+}
268+
256269 static const struct acpi_device_id mlxbf3_gpio_acpi_match[] = {
257270 { "MLNXBF33", 0 },
258271 {}
@@ -265,6 +278,7 @@ static struct platform_driver mlxbf3_gpio_driver = { · 6 unmodified lines
265278 .acpi_match_table = mlxbf3_gpio_acpi_match,
266279 },
267280 .probe = mlxbf3_gpio_probe,
281+ .shutdown = mlxbf3_gpio_shutdown,
268282 };
269283 module_platform_driver(mlxbf3_gpio_driver);
270284
drivers/gpu/drm/Kconfig+1−0
@@ -268,6 +268,7 @@ config DRM_EXEC · 267 unmodified lines
268268 config DRM_GPUVM
269269 tristate
270270 depends on DRM
271+ select DRM_EXEC
271272 help
272273 GPU-VM representation providing helpers to manage a GPUs virtual
273274 address space
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c+11−8
@@ -1057,6 +1057,9 @@ static int amdgpu_cs_patch_ibs(struct amdgpu_cs_parser *p, · 1056 unmodified lines
10571057 r = amdgpu_ring_parse_cs(ring, p, job, ib);
10581058 if (r)
10591059 return r;
1060+
1061+ if (ib->sa_bo)
1062+ ib->gpu_addr = amdgpu_sa_bo_gpu_addr(ib->sa_bo);
10601063 } else {
10611064 ib->ptr = (uint32_t *)kptr;
10621065 r = amdgpu_ring_patch_cs_in_place(ring, p, job, ib);
@@ -1778,7 +1781,7 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser, · 715 unmodified lines
17781781 struct ttm_operation_ctx ctx = { false, false };
17791782 struct amdgpu_vm *vm = &fpriv->vm;
17801783 struct amdgpu_bo_va_mapping *mapping;
1781− int r;
1784+ int i, r;
17821785
17831786 addr /= AMDGPU_GPU_PAGE_SIZE;
17841787
@@ -1793,13 +1796,13 @@ int amdgpu_cs_find_mapping(struct amdgpu_cs_parser *parser, · 8 unmodified lines
17931796 if (dma_resv_locking_ctx((*bo)->tbo.base.resv) != &parser->exec.ticket)
17941797 return -EINVAL;
17951798
1796− if (!((*bo)->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)) {
1797− (*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1798− amdgpu_bo_placement_from_domain(*bo, (*bo)->allowed_domains);
1799− r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx);
1800− if (r)
1801− return r;
1802− }
1799+ (*bo)->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
1800+ amdgpu_bo_placement_from_domain(*bo, (*bo)->allowed_domains);
1801+ for (i = 0; i < (*bo)->placement.num_placement; i++)
1802+ (*bo)->placements[i].flags |= TTM_PL_FLAG_CONTIGUOUS;
1803+ r = ttm_bo_validate(&(*bo)->tbo, &(*bo)->placement, &ctx);
1804+ if (r)
1805+ return r;
18031806
18041807 return amdgpu_ttm_alloc_gart(&(*bo)->tbo);
18051808 }
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c+8−0
@@ -685,16 +685,24 @@ int amdgpu_ctx_ioctl(struct drm_device *dev, void *data, · 684 unmodified lines
685685
686686 switch (args->in.op) {
687687 case AMDGPU_CTX_OP_ALLOC_CTX:
688+ if (args->in.flags)
689+ return -EINVAL;
688690 r = amdgpu_ctx_alloc(adev, fpriv, filp, priority, &id);
689691 args->out.alloc.ctx_id = id;
690692 break;
691693 case AMDGPU_CTX_OP_FREE_CTX:
694+ if (args->in.flags)
695+ return -EINVAL;
692696 r = amdgpu_ctx_free(fpriv, id);
693697 break;
694698 case AMDGPU_CTX_OP_QUERY_STATE:
699+ if (args->in.flags)
700+ return -EINVAL;
695701 r = amdgpu_ctx_query(adev, fpriv, id, &args->out);
696702 break;
697703 case AMDGPU_CTX_OP_QUERY_STATE2:
704+ if (args->in.flags)
705+ return -EINVAL;
698706 r = amdgpu_ctx_query2(adev, fpriv, id, &args->out);
699707 break;
700708 case AMDGPU_CTX_OP_GET_STABLE_PSTATE:
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c+12−1
@@ -278,7 +278,7 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev, · 277 unmodified lines
278278 msg = RREG32(mmMP0_SMN_C2PMSG_33);
279279 if (msg & 0x80000000)
280280 break;
281− usleep_range(1000, 1100);
281+ msleep(1);
282282 }
283283 }
284284
@@ -1500,6 +1500,7 @@ union gc_info { · 1215 unmodified lines
15001500 struct gc_info_v1_0 v1;
15011501 struct gc_info_v1_1 v1_1;
15021502 struct gc_info_v1_2 v1_2;
1503+ struct gc_info_v1_3 v1_3;
15031504 struct gc_info_v2_0 v2;
15041505 struct gc_info_v2_1 v2_1;
15051506 };
@@ -1558,6 +1559,16 @@ static int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev) · 52 unmodified lines
15581559 adev->gfx.config.gc_gl1c_size_per_instance = le32_to_cpu(gc_info->v1_2.gc_gl1c_size_per_instance);
15591560 adev->gfx.config.gc_gl2c_per_gpu = le32_to_cpu(gc_info->v1_2.gc_gl2c_per_gpu);
15601561 }
1562+ if (le16_to_cpu(gc_info->v1.header.version_minor) >= 3) {
1563+ adev->gfx.config.gc_tcp_size_per_cu = le32_to_cpu(gc_info->v1_3.gc_tcp_size_per_cu);
1564+ adev->gfx.config.gc_tcp_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcp_cache_line_size);
1565+ adev->gfx.config.gc_instruction_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_size_per_sqc);
1566+ adev->gfx.config.gc_instruction_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_instruction_cache_line_size);
1567+ adev->gfx.config.gc_scalar_data_cache_size_per_sqc = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_size_per_sqc);
1568+ adev->gfx.config.gc_scalar_data_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_scalar_data_cache_line_size);
1569+ adev->gfx.config.gc_tcc_size = le32_to_cpu(gc_info->v1_3.gc_tcc_size);
1570+ adev->gfx.config.gc_tcc_cache_line_size = le32_to_cpu(gc_info->v1_3.gc_tcc_cache_line_size);
1571+ }
15611572 break;
15621573 case 2:
15631574 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v2.gc_num_se);
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c+24−2
@@ -509,6 +509,16 @@ int amdgpu_gfx_disable_kcq(struct amdgpu_device *adev, int xcc_id) · 508 unmodified lines
509509 int i, r = 0;
510510 int j;
511511
512+ if (adev->enable_mes) {
513+ for (i = 0; i < adev->gfx.num_compute_rings; i++) {
514+ j = i + xcc_id * adev->gfx.num_compute_rings;
515+ amdgpu_mes_unmap_legacy_queue(adev,
516+ &adev->gfx.compute_ring[j],
517+ RESET_QUEUES, 0, 0);
518+ }
519+ return 0;
520+ }
521+
512522 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
513523 return -EINVAL;
514524
@@ -551,6 +561,18 @@ int amdgpu_gfx_disable_kgq(struct amdgpu_device *adev, int xcc_id) · 36 unmodified lines
551561 int i, r = 0;
552562 int j;
553563
564+ if (adev->enable_mes) {
565+ if (amdgpu_gfx_is_master_xcc(adev, xcc_id)) {
566+ for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
567+ j = i + xcc_id * adev->gfx.num_gfx_rings;
568+ amdgpu_mes_unmap_legacy_queue(adev,
569+ &adev->gfx.gfx_ring[j],
570+ PREEMPT_QUEUES, 0, 0);
571+ }
572+ }
573+ return 0;
574+ }
575+
554576 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
555577 return -EINVAL;
556578
@@ -995,7 +1017,7 @@ uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg, uint32_t xcc_ · 438 unmodified lines
9951017 if (amdgpu_device_skip_hw_access(adev))
9961018 return 0;
9971019
998− if (adev->mes.ring.sched.ready)
1020+ if (adev->mes.ring[0].sched.ready)
9991021 return amdgpu_mes_rreg(adev, reg);
10001022
10011023 BUG_ON(!ring->funcs->emit_rreg);
@@ -1065,7 +1087,7 @@ void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v, uint3 · 63 unmodified lines
10651087 if (amdgpu_device_skip_hw_access(adev))
10661088 return;
10671089
1068− if (adev->mes.ring.sched.ready) {
1090+ if (adev->mes.ring[0].sched.ready) {
10691091 amdgpu_mes_wreg(adev, reg, v);
10701092 return;
10711093 }
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h+6−0
@@ -240,6 +240,12 @@ struct amdgpu_gfx_config { · 239 unmodified lines
240240 uint32_t gc_tcp_size_per_cu;
241241 uint32_t gc_num_cu_per_sqc;
242242 uint32_t gc_tcc_size;
243+ uint32_t gc_tcp_cache_line_size;
244+ uint32_t gc_instruction_cache_size_per_sqc;
245+ uint32_t gc_instruction_cache_line_size;
246+ uint32_t gc_scalar_data_cache_size_per_sqc;
247+ uint32_t gc_scalar_data_cache_line_size;
248+ uint32_t gc_tcc_cache_line_size;
243249 };
244250
245251 struct amdgpu_cu_info {
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c+3−2
@@ -589,7 +589,8 @@ int amdgpu_gmc_allocate_vm_inv_eng(struct amdgpu_device *adev) · 588 unmodified lines
589589 ring = adev->rings[i];
590590 vmhub = ring->vm_hub;
591591
592− if (ring == &adev->mes.ring ||
592+ if (ring == &adev->mes.ring[0] ||
593+ ring == &adev->mes.ring[1] ||
593594 ring == &adev->umsch_mm.ring)
594595 continue;
595596
@@ -761,7 +762,7 @@ void amdgpu_gmc_fw_reg_write_reg_wait(struct amdgpu_device *adev, · 165 unmodified lines
761762 unsigned long flags;
762763 uint32_t seq;
763764
764− if (adev->mes.ring.sched.ready) {
765+ if (adev->mes.ring[0].sched.ready) {
765766 amdgpu_mes_reg_write_reg_wait(adev, reg0, reg1,
766767 ref, mask);
767768 return;
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h+6−0
@@ -156,6 +156,8 @@ struct amdgpu_gmc_funcs { · 155 unmodified lines
156156 uint64_t addr, uint64_t *flags);
157157 /* get the amount of memory used by the vbios for pre-OS console */
158158 unsigned int (*get_vbios_fb_size)(struct amdgpu_device *adev);
159+ /* get the DCC buffer alignment */
160+ unsigned int (*get_dcc_alignment)(struct amdgpu_device *adev);
159161
160162 enum amdgpu_memory_partition (*query_mem_partition_mode)(
161163 struct amdgpu_device *adev);
@@ -363,6 +365,10 @@ struct amdgpu_gmc { · 201 unmodified lines
363365 (adev)->gmc.gmc_funcs->override_vm_pte_flags \
364366 ((adev), (vm), (addr), (pte_flags))
365367 #define amdgpu_gmc_get_vbios_fb_size(adev) (adev)->gmc.gmc_funcs->get_vbios_fb_size((adev))
368+#define amdgpu_gmc_get_dcc_alignment(adev) ({ \
369+ typeof(adev) _adev = (adev); \
370+ _adev->gmc.gmc_funcs->get_dcc_alignment(_adev); \
371+})
366372
367373 /**
368374 * amdgpu_gmc_vram_full_visible - Check if full VRAM is visible through the BAR
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c+1−2
@@ -264,9 +264,8 @@ amdgpu_job_prepare_job(struct drm_sched_job *sched_job, · 263 unmodified lines
264264 struct dma_fence *fence = NULL;
265265 int r;
266266
267− /* Ignore soft recovered fences here */
268267 r = drm_sched_entity_error(s_entity);
269− if (r && r != -ENODATA)
268+ if (r)
270269 goto error;
271270
272271 if (!fence && job->gang_submit)
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c+54−35
@@ -103,7 +103,7 @@ static int amdgpu_mes_event_log_init(struct amdgpu_device *adev) · 102 unmodified lines
103103 if (!amdgpu_mes_log_enable)
104104 return 0;
105105
106− r = amdgpu_bo_create_kernel(adev, AMDGPU_MES_LOG_BUFFER_SIZE, PAGE_SIZE,
106+ r = amdgpu_bo_create_kernel(adev, adev->mes.event_log_size, PAGE_SIZE,
107107 AMDGPU_GEM_DOMAIN_GTT,
108108 &adev->mes.event_log_gpu_obj,
109109 &adev->mes.event_log_gpu_addr,
@@ -113,7 +113,7 @@ static int amdgpu_mes_event_log_init(struct amdgpu_device *adev) · 3 unmodified lines
113113 return r;
114114 }
115115
116− memset(adev->mes.event_log_cpu_addr, 0, PAGE_SIZE);
116+ memset(adev->mes.event_log_cpu_addr, 0, adev->mes.event_log_size);
117117
118118 return 0;
119119
@@ -135,9 +135,11 @@ int amdgpu_mes_init(struct amdgpu_device *adev) · 15 unmodified lines
135135 idr_init(&adev->mes.queue_id_idr);
136136 ida_init(&adev->mes.doorbell_ida);
137137 spin_lock_init(&adev->mes.queue_id_lock);
138− spin_lock_init(&adev->mes.ring_lock);
139138 mutex_init(&adev->mes.mutex_hidden);
140139
140+ for (i = 0; i < AMDGPU_MAX_MES_PIPES; i++)
141+ spin_lock_init(&adev->mes.ring_lock[i]);
142+
141143 adev->mes.total_max_queue = AMDGPU_FENCE_MES_QUEUE_ID_MASK;
142144 adev->mes.vmid_mask_mmhub = 0xffffff00;
143145 adev->mes.vmid_mask_gfxhub = 0xffffff00;
@@ -163,36 +165,38 @@ int amdgpu_mes_init(struct amdgpu_device *adev) · 19 unmodified lines
163165 adev->mes.sdma_hqd_mask[i] = 0xfc;
164166 }
165167
166− r = amdgpu_device_wb_get(adev, &adev->mes.sch_ctx_offs);
167− if (r) {
168− dev_err(adev->dev,
169− "(%d) ring trail_fence_offs wb alloc failed\n", r);
170− goto error_ids;
171− }
172− adev->mes.sch_ctx_gpu_addr =
173− adev->wb.gpu_addr + (adev->mes.sch_ctx_offs * 4);
174− adev->mes.sch_ctx_ptr =
175− (uint64_t *)&adev->wb.wb[adev->mes.sch_ctx_offs];
168+ for (i = 0; i < AMDGPU_MAX_MES_PIPES; i++) {
169+ r = amdgpu_device_wb_get(adev, &adev->mes.sch_ctx_offs[i]);
170+ if (r) {
171+ dev_err(adev->dev,
172+ "(%d) ring trail_fence_offs wb alloc failed\n",
173+ r);
174+ goto error;
175+ }
176+ adev->mes.sch_ctx_gpu_addr[i] =
177+ adev->wb.gpu_addr + (adev->mes.sch_ctx_offs[i] * 4);
178+ adev->mes.sch_ctx_ptr[i] =
179+ (uint64_t *)&adev->wb.wb[adev->mes.sch_ctx_offs[i]];
176180
177− r = amdgpu_device_wb_get(adev, &adev->mes.query_status_fence_offs);
178− if (r) {
179− amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
180− dev_err(adev->dev,
181− "(%d) query_status_fence_offs wb alloc failed\n", r);
182− goto error_ids;
181+ r = amdgpu_device_wb_get(adev,
182+ &adev->mes.query_status_fence_offs[i]);
183+ if (r) {
184+ dev_err(adev->dev,
185+ "(%d) query_status_fence_offs wb alloc failed\n",
186+ r);
187+ goto error;
188+ }
189+ adev->mes.query_status_fence_gpu_addr[i] = adev->wb.gpu_addr +
190+ (adev->mes.query_status_fence_offs[i] * 4);
191+ adev->mes.query_status_fence_ptr[i] =
192+ (uint64_t *)&adev->wb.wb[adev->mes.query_status_fence_offs[i]];
183193 }
184− adev->mes.query_status_fence_gpu_addr =
185− adev->wb.gpu_addr + (adev->mes.query_status_fence_offs * 4);
186− adev->mes.query_status_fence_ptr =
187− (uint64_t *)&adev->wb.wb[adev->mes.query_status_fence_offs];
188194
189195 r = amdgpu_device_wb_get(adev, &adev->mes.read_val_offs);
190196 if (r) {
191− amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
192− amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
193197 dev_err(adev->dev,
194198 "(%d) read_val_offs alloc failed\n", r);
195− goto error_ids;
199+ goto error;
196200 }
197201 adev->mes.read_val_gpu_addr =
198202 adev->wb.gpu_addr + (adev->mes.read_val_offs * 4);
@@ -212,10 +216,16 @@ int amdgpu_mes_init(struct amdgpu_device *adev) · 13 unmodified lines
212216 error_doorbell:
213217 amdgpu_mes_doorbell_free(adev);
214218 error:
215− amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
216− amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
217− amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
218−error_ids:
219+ for (i = 0; i < AMDGPU_MAX_MES_PIPES; i++) {
220+ if (adev->mes.sch_ctx_ptr[i])
221+ amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs[i]);
222+ if (adev->mes.query_status_fence_ptr[i])
223+ amdgpu_device_wb_free(adev,
224+ adev->mes.query_status_fence_offs[i]);
225+ }
226+ if (adev->mes.read_val_ptr)
227+ amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
228+
219229 idr_destroy(&adev->mes.pasid_idr);
220230 idr_destroy(&adev->mes.gang_id_idr);
221231 idr_destroy(&adev->mes.queue_id_idr);
@@ -226,13 +236,22 @@ error_ids: · 4 unmodified lines
226236
227237 void amdgpu_mes_fini(struct amdgpu_device *adev)
228238 {
239+ int i;
240+
229241 amdgpu_bo_free_kernel(&adev->mes.event_log_gpu_obj,
230242 &adev->mes.event_log_gpu_addr,
231243 &adev->mes.event_log_cpu_addr);
232244
233− amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
234− amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
235− amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
245+ for (i = 0; i < AMDGPU_MAX_MES_PIPES; i++) {
246+ if (adev->mes.sch_ctx_ptr[i])
247+ amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs[i]);
248+ if (adev->mes.query_status_fence_ptr[i])
249+ amdgpu_device_wb_free(adev,
250+ adev->mes.query_status_fence_offs[i]);
251+ }
252+ if (adev->mes.read_val_ptr)
253+ amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
254+
236255 amdgpu_mes_doorbell_free(adev);
237256
238257 idr_destroy(&adev->mes.pasid_idr);
@@ -1499,7 +1518,7 @@ int amdgpu_mes_init_microcode(struct amdgpu_device *adev, int pipe) · 1260 unmodified lines
14991518
15001519 amdgpu_ucode_ip_version_decode(adev, GC_HWIP, ucode_prefix,
15011520 sizeof(ucode_prefix));
1502− if (adev->enable_uni_mes && pipe == AMDGPU_MES_SCHED_PIPE) {
1521+ if (adev->enable_uni_mes) {
15031522 snprintf(fw_name, sizeof(fw_name),
15041523 "amdgpu/%s_uni_mes.bin", ucode_prefix);
15051524 } else if (amdgpu_ip_version(adev, GC_HWIP, 0) >= IP_VERSION(11, 0, 0) &&
@@ -1573,7 +1592,7 @@ static int amdgpu_debugfs_mes_event_log_show(struct seq_file *m, void *unused) · 67 unmodified lines
15731592 uint32_t *mem = (uint32_t *)(adev->mes.event_log_cpu_addr);
15741593
15751594 seq_hex_dump(m, "", DUMP_PREFIX_OFFSET, 32, 4,
1576− mem, AMDGPU_MES_LOG_BUFFER_SIZE, false);
1595+ mem, adev->mes.event_log_size, false);
15771596
15781597 return 0;
15791598 }
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h+11−11
@@ -52,7 +52,6 @@ enum amdgpu_mes_priority_level { · 51 unmodified lines
5252
5353 #define AMDGPU_MES_PROC_CTX_SIZE 0x1000 /* one page area */
5454 #define AMDGPU_MES_GANG_CTX_SIZE 0x1000 /* one page area */
55−#define AMDGPU_MES_LOG_BUFFER_SIZE 0x4000 /* Maximu log buffer size for MES */
5655
5756 struct amdgpu_mes_funcs;
5857
@@ -83,8 +82,8 @@ struct amdgpu_mes { · 24 unmodified lines
8382 uint64_t default_process_quantum;
8483 uint64_t default_gang_quantum;
8584
86− struct amdgpu_ring ring;
87− spinlock_t ring_lock;
85+ struct amdgpu_ring ring[AMDGPU_MAX_MES_PIPES];
86+ spinlock_t ring_lock[AMDGPU_MAX_MES_PIPES];
8887
8988 const struct firmware *fw[AMDGPU_MAX_MES_PIPES];
9089
@@ -113,12 +112,12 @@ struct amdgpu_mes { · 22 unmodified lines
113112 uint32_t gfx_hqd_mask[AMDGPU_MES_MAX_GFX_PIPES];
114113 uint32_t sdma_hqd_mask[AMDGPU_MES_MAX_SDMA_PIPES];
115114 uint32_t aggregated_doorbells[AMDGPU_MES_PRIORITY_NUM_LEVELS];
116− uint32_t sch_ctx_offs;
117− uint64_t sch_ctx_gpu_addr;
118− uint64_t *sch_ctx_ptr;
119− uint32_t query_status_fence_offs;
120− uint64_t query_status_fence_gpu_addr;
121− uint64_t *query_status_fence_ptr;
115+ uint32_t sch_ctx_offs[AMDGPU_MAX_MES_PIPES];
116+ uint64_t sch_ctx_gpu_addr[AMDGPU_MAX_MES_PIPES];
117+ uint64_t *sch_ctx_ptr[AMDGPU_MAX_MES_PIPES];
118+ uint32_t query_status_fence_offs[AMDGPU_MAX_MES_PIPES];
119+ uint64_t query_status_fence_gpu_addr[AMDGPU_MAX_MES_PIPES];
120+ uint64_t *query_status_fence_ptr[AMDGPU_MAX_MES_PIPES];
122121 uint32_t read_val_offs;
123122 uint64_t read_val_gpu_addr;
124123 uint32_t *read_val_ptr;
@@ -135,8 +134,9 @@ struct amdgpu_mes { · 10 unmodified lines
135134 unsigned long *doorbell_bitmap;
136135
137136 /* MES event log buffer */
138− struct amdgpu_bo *event_log_gpu_obj;
139− uint64_t event_log_gpu_addr;
137+ uint32_t event_log_size;
138+ struct amdgpu_bo *event_log_gpu_obj;
139+ uint64_t event_log_gpu_addr;
140140 void *event_log_cpu_addr;
141141
142142 /* ip specific functions */
drivers/gpu/drm/amd/amdgpu/amdgpu_psp_ta.c+3−0
@@ -166,6 +166,9 @@ static ssize_t ta_if_load_debugfs_write(struct file *fp, const char *buf, size_t · 165 unmodified lines
166166 if (ret)
167167 return -EFAULT;
168168
169+ if (ta_bin_len > PSP_1_MEG)
170+ return -EINVAL;
171+
169172 copy_pos += sizeof(uint32_t);
170173
171174 ta_bin = kzalloc(ta_bin_len, GFP_KERNEL);
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c+2−0
@@ -212,6 +212,8 @@ int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring, · 211 unmodified lines
212212 */
213213 if (ring->funcs->type == AMDGPU_RING_TYPE_KIQ)
214214 sched_hw_submission = max(sched_hw_submission, 256);
215+ if (ring->funcs->type == AMDGPU_RING_TYPE_MES)
216+ sched_hw_submission = 8;
215217 else if (ring == &adev->sdma.instance[0].page)
216218 sched_hw_submission = 256;
217219
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h+4−1
@@ -461,8 +461,11 @@ struct amdgpu_vcn5_fw_shared { · 460 unmodified lines
461461 struct amdgpu_fw_shared_unified_queue_struct sq;
462462 uint8_t pad1[8];
463463 struct amdgpu_fw_shared_fw_logging fw_log;
464+ uint8_t pad2[20];
464465 struct amdgpu_fw_shared_rb_setup rb_setup;
465− uint8_t pad2[4];
466+ struct amdgpu_fw_shared_smu_interface_info smu_dpm_interface;
467+ struct amdgpu_fw_shared_drm_key_wa drm_key_wa;
468+ uint8_t pad3[9];
466469 };
467470
468471 #define VCN_BLOCK_ENCODE_DISABLE_MASK 0x80
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c+1−1
@@ -858,7 +858,7 @@ void amdgpu_virt_post_reset(struct amdgpu_device *adev) · 857 unmodified lines
858858 adev->gfx.is_poweron = false;
859859 }
860860
861− adev->mes.ring.sched.ready = false;
861+ adev->mes.ring[0].sched.ready = false;
862862 }
863863
864864 bool amdgpu_virt_fw_load_skip_check(struct amdgpu_device *adev, uint32_t ucode_id)
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c+34−2
@@ -456,6 +456,7 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, · 455 unmodified lines
456456 u64 vis_usage = 0, max_bytes, min_block_size;
457457 struct amdgpu_vram_mgr_resource *vres;
458458 u64 size, remaining_size, lpfn, fpfn;
459+ unsigned int adjust_dcc_size = 0;
459460 struct drm_buddy *mm = &mgr->mm;
460461 struct drm_buddy_block *block;
461462 unsigned long pages_per_block;
@@ -511,7 +512,19 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, · 49 unmodified lines
511512 /* Allocate blocks in desired range */
512513 vres->flags |= DRM_BUDDY_RANGE_ALLOCATION;
513514
515+ if (bo->flags & AMDGPU_GEM_CREATE_GFX12_DCC &&
516+ adev->gmc.gmc_funcs->get_dcc_alignment)
517+ adjust_dcc_size = amdgpu_gmc_get_dcc_alignment(adev);
518+
514519 remaining_size = (u64)vres->base.size;
520+ if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size) {
521+ unsigned int dcc_size;
522+
523+ dcc_size = roundup_pow_of_two(vres->base.size + adjust_dcc_size);
524+ remaining_size = (u64)dcc_size;
525+
526+ vres->flags |= DRM_BUDDY_TRIM_DISABLE;
527+ }
515528
516529 mutex_lock(&mgr->lock);
517530 while (remaining_size) {
@@ -521,8 +534,11 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, · 3 unmodified lines
521534 min_block_size = mgr->default_page_size;
522535
523536 size = remaining_size;
524− if ((size >= (u64)pages_per_block << PAGE_SHIFT) &&
525− !(size & (((u64)pages_per_block << PAGE_SHIFT) - 1)))
537+
538+ if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size)
539+ min_block_size = size;
540+ else if ((size >= (u64)pages_per_block << PAGE_SHIFT) &&
541+ !(size & (((u64)pages_per_block << PAGE_SHIFT) - 1)))
526542 min_block_size = (u64)pages_per_block << PAGE_SHIFT;
527543
528544 BUG_ON(min_block_size < mm->chunk_size);
@@ -553,6 +569,22 @@ static int amdgpu_vram_mgr_new(struct ttm_resource_manager *man, · 24 unmodified lines
553569 }
554570 mutex_unlock(&mgr->lock);
555571
572+ if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && adjust_dcc_size) {
573+ struct drm_buddy_block *dcc_block;
574+ unsigned long dcc_start;
575+ u64 trim_start;
576+
577+ dcc_block = amdgpu_vram_mgr_first_block(&vres->blocks);
578+ /* Adjust the start address for DCC buffers only */
579+ dcc_start =
580+ roundup((unsigned long)amdgpu_vram_mgr_block_start(dcc_block),
581+ adjust_dcc_size);
582+ trim_start = (u64)dcc_start;
583+ drm_buddy_block_trim(mm, &trim_start,
584+ (u64)vres->base.size,
585+ &vres->blocks);
586+ }
587+
556588 vres->base.start = 0;
557589 size = max_t(u64, amdgpu_vram_mgr_blocks_size(&vres->blocks),
558590 vres->base.size);
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c+3−2
@@ -4116,6 +4116,7 @@ static void gfx_v10_0_check_gfxoff_flag(struct amdgpu_device *adev) · 4115 unmodified lines
41164116
41174117 static int gfx_v10_0_init_microcode(struct amdgpu_device *adev)
41184118 {
4119+ char fw_name[53];
41194120 char ucode_prefix[30];
41204121 const char *wks = "";
41214122 int err;
@@ -4149,8 +4150,8 @@ static int gfx_v10_0_init_microcode(struct amdgpu_device *adev) · 27 unmodified lines
41494150 amdgpu_gfx_cp_init_microcode(adev, AMDGPU_UCODE_ID_CP_CE);
41504151
41514152 if (!amdgpu_sriov_vf(adev)) {
4152− err = amdgpu_ucode_request(adev, &adev->gfx.rlc_fw,
4153− "amdgpu/%s_rlc.bin", ucode_prefix);
4153+ snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_rlc.bin", ucode_prefix);
4154+ err = request_firmware(&adev->gfx.rlc_fw, fw_name, adev->dev);
41544155 if (err)
41554156 goto out;
41564157
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c+29−27
@@ -202,6 +202,12 @@ static const struct amdgpu_hwip_reg_entry gc_gfx_queue_reg_list_12[] = { · 201 unmodified lines
202202 SOC15_REG_ENTRY_STR(GC, 0, regCP_IB1_BUFSZ)
203203 };
204204
205+static const struct soc15_reg_golden golden_settings_gc_12_0[] = {
206+ SOC15_REG_GOLDEN_VALUE(GC, 0, regDB_MEM_CONFIG, 0x0000000f, 0x0000000f),
207+ SOC15_REG_GOLDEN_VALUE(GC, 0, regCB_HW_CONTROL_1, 0x03000000, 0x03000000),
208+ SOC15_REG_GOLDEN_VALUE(GC, 0, regGL2C_CTRL5, 0x00000070, 0x00000020)
209+};
210+
205211 #define DEFAULT_SH_MEM_CONFIG \
206212 ((SH_MEM_ADDRESS_MODE_64 << SH_MEM_CONFIG__ADDRESS_MODE__SHIFT) | \
207213 (SH_MEM_ALIGNMENT_MODE_UNALIGNED << SH_MEM_CONFIG__ALIGNMENT_MODE__SHIFT) | \
@@ -2999,7 +3005,7 @@ static int gfx_v12_0_compute_mqd_init(struct amdgpu_device *adev, void *m, · 2791 unmodified lines
29993005 (order_base_2(prop->queue_size / 4) - 1));
30003006 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, RPTR_BLOCK_SIZE,
30013007 (order_base_2(AMDGPU_GPU_PAGE_SIZE / 4) - 1));
3002− tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 0);
3008+ tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, UNORD_DISPATCH, 1);
30033009 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, TUNNEL_DISPATCH, 0);
30043010 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, PRIV_STATE, 1);
30053011 tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_CONTROL, KMD_QUEUE, 1);
@@ -3432,6 +3438,24 @@ static void gfx_v12_0_disable_gpa_mode(struct amdgpu_device *adev) · 426 unmodified lines
34323438 WREG32_SOC15(GC, 0, regCPG_PSP_DEBUG, data);
34333439 }
34343440
3441+static void gfx_v12_0_init_golden_registers(struct amdgpu_device *adev)
3442+{
3443+ if (amdgpu_sriov_vf(adev))
3444+ return;
3445+
3446+ switch (amdgpu_ip_version(adev, GC_HWIP, 0)) {
3447+ case IP_VERSION(12, 0, 0):
3448+ case IP_VERSION(12, 0, 1):
3449+ if (adev->rev_id == 0)
3450+ soc15_program_register_sequence(adev,
3451+ golden_settings_gc_12_0,
3452+ (const u32)ARRAY_SIZE(golden_settings_gc_12_0));
3453+ break;
3454+ default:
3455+ break;
3456+ }
3457+}
3458+
34353459 static int gfx_v12_0_hw_init(void *handle)
34363460 {
34373461 int r;
@@ -3472,6 +3496,9 @@ static int gfx_v12_0_hw_init(void *handle) · 34 unmodified lines
34723496 }
34733497 }
34743498
3499+ if (!amdgpu_emu_mode)
3500+ gfx_v12_0_init_golden_registers(adev);
3501+
34753502 adev->gfx.is_poweron = true;
34763503
34773504 if (get_gb_addr_config(adev))
@@ -3519,33 +3546,9 @@ static int gfx_v12_0_hw_init(void *handle) · 41 unmodified lines
35193546 return r;
35203547 }
35213548
3522−static int gfx_v12_0_kiq_disable_kgq(struct amdgpu_device *adev)
3523−{
3524− struct amdgpu_kiq *kiq = &adev->gfx.kiq[0];
3525− struct amdgpu_ring *kiq_ring = &kiq->ring;
3526− int i, r = 0;
3527−
3528− if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues)
3529− return -EINVAL;
3530−
3531− if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size *
3532− adev->gfx.num_gfx_rings))
3533− return -ENOMEM;
3534−
3535− for (i = 0; i < adev->gfx.num_gfx_rings; i++)
3536− kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.gfx_ring[i],
3537− PREEMPT_QUEUES, 0, 0);
3538−
3539− if (adev->gfx.kiq[0].ring.sched.ready)
3540− r = amdgpu_ring_test_helper(kiq_ring);
3541−
3542− return r;
3543−}
3544−
35453549 static int gfx_v12_0_hw_fini(void *handle)
35463550 {
35473551 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
3548− int r;
35493552 uint32_t tmp;
35503553
35513554 amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
@@ -3553,8 +3556,7 @@ static int gfx_v12_0_hw_fini(void *handle) · 1 unmodified line
35533556
35543557 if (!adev->no_hw_access) {
35553558 if (amdgpu_async_gfx_ring) {
3556− r = gfx_v12_0_kiq_disable_kgq(adev);
3557− if (r)
3559+ if (amdgpu_gfx_disable_kgq(adev, 0))
35583560 DRM_ERROR("KGQ disable failed\n");
35593561 }
35603562
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c+1−1
@@ -231,7 +231,7 @@ static void gmc_v11_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, · 230 unmodified lines
231231 /* This is necessary for SRIOV as well as for GFXOFF to function
232232 * properly under bare metal
233233 */
234− if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring.sched.ready) &&
234+ if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) &&
235235 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
236236 amdgpu_gmc_fw_reg_write_reg_wait(adev, req, ack, inv_req,
237237 1 << vmid, GET_INST(GC, 0));
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c+19−1
@@ -299,7 +299,7 @@ static void gmc_v12_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, · 298 unmodified lines
299299 /* This is necessary for SRIOV as well as for GFXOFF to function
300300 * properly under bare metal
301301 */
302− if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring.sched.ready) &&
302+ if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) &&
303303 (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev))) {
304304 struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];
305305 const unsigned eng = 17;
@@ -542,6 +542,23 @@ static unsigned gmc_v12_0_get_vbios_fb_size(struct amdgpu_device *adev) · 236 unmodified lines
542542 return 0;
543543 }
544544
545+static unsigned int gmc_v12_0_get_dcc_alignment(struct amdgpu_device *adev)
546+{
547+ unsigned int max_tex_channel_caches, alignment;
548+
549+ if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(12, 0, 0) &&
550+ amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(12, 0, 1))
551+ return 0;
552+
553+ max_tex_channel_caches = adev->gfx.config.max_texture_channel_caches;
554+ if (is_power_of_2(max_tex_channel_caches))
555+ alignment = (unsigned int)(max_tex_channel_caches / SZ_4);
556+ else
557+ alignment = roundup_pow_of_two(max_tex_channel_caches);
558+
559+ return (unsigned int)(alignment * max_tex_channel_caches * SZ_1K);
560+}
561+
545562 static const struct amdgpu_gmc_funcs gmc_v12_0_gmc_funcs = {
546563 .flush_gpu_tlb = gmc_v12_0_flush_gpu_tlb,
547564 .flush_gpu_tlb_pasid = gmc_v12_0_flush_gpu_tlb_pasid,
@@ -551,6 +568,7 @@ static const struct amdgpu_gmc_funcs gmc_v12_0_gmc_funcs = { · 3 unmodified lines
551568 .get_vm_pde = gmc_v12_0_get_vm_pde,
552569 .get_vm_pte = gmc_v12_0_get_vm_pte,
553570 .get_vbios_fb_size = gmc_v12_0_get_vbios_fb_size,
571+ .get_dcc_alignment = gmc_v12_0_get_dcc_alignment,
554572 };
555573
556574 static void gmc_v12_0_set_gmc_funcs(struct amdgpu_device *adev)
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c+2−2
@@ -538,11 +538,11 @@ void jpeg_v2_0_dec_ring_emit_ib(struct amdgpu_ring *ring, · 537 unmodified lines
538538
539539 amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
540540 0, 0, PACKETJ_TYPE0));
541− amdgpu_ring_write(ring, (vmid | (vmid << 4)));
541+ amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
542542
543543 amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
544544 0, 0, PACKETJ_TYPE0));
545− amdgpu_ring_write(ring, (vmid | (vmid << 4)));
545+ amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
546546
547547 amdgpu_ring_write(ring, PACKETJ(mmUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,
548548 0, 0, PACKETJ_TYPE0));
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.c+61−2
@@ -23,6 +23,7 @@ · 22 unmodified lines
2323
2424 #include "amdgpu.h"
2525 #include "amdgpu_jpeg.h"
26+#include "amdgpu_cs.h"
2627 #include "soc15.h"
2728 #include "soc15d.h"
2829 #include "jpeg_v4_0_3.h"
@@ -782,11 +783,15 @@ void jpeg_v4_0_3_dec_ring_emit_ib(struct amdgpu_ring *ring, · 753 unmodified lines
782783
783784 amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET,
784785 0, 0, PACKETJ_TYPE0));
785− amdgpu_ring_write(ring, (vmid | (vmid << 4)));
786+
787+ if (ring->funcs->parse_cs)
788+ amdgpu_ring_write(ring, 0);
789+ else
790+ amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
786791
787792 amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET,
788793 0, 0, PACKETJ_TYPE0));
789− amdgpu_ring_write(ring, (vmid | (vmid << 4)));
794+ amdgpu_ring_write(ring, (vmid | (vmid << 4) | (vmid << 8)));
790795
791796 amdgpu_ring_write(ring, PACKETJ(regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET,
792797 0, 0, PACKETJ_TYPE0));
@@ -1084,6 +1089,7 @@ static const struct amdgpu_ring_funcs jpeg_v4_0_3_dec_ring_vm_funcs = { · 291 unmodified lines
10841089 .get_rptr = jpeg_v4_0_3_dec_ring_get_rptr,
10851090 .get_wptr = jpeg_v4_0_3_dec_ring_get_wptr,
10861091 .set_wptr = jpeg_v4_0_3_dec_ring_set_wptr,
1092+ .parse_cs = jpeg_v4_0_3_dec_ring_parse_cs,
10871093 .emit_frame_size =
10881094 SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
10891095 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
@@ -1248,3 +1254,56 @@ static void jpeg_v4_0_3_set_ras_funcs(struct amdgpu_device *adev) · 158 unmodified lines
12481254 {
12491255 adev->jpeg.ras = &jpeg_v4_0_3_ras;
12501256 }
1257+
1258+/**
1259+ * jpeg_v4_0_3_dec_ring_parse_cs - command submission parser
1260+ *
1261+ * @parser: Command submission parser context
1262+ * @job: the job to parse
1263+ * @ib: the IB to parse
1264+ *
1265+ * Parse the command stream, return -EINVAL for invalid packet,
1266+ * 0 otherwise
1267+ */
1268+int jpeg_v4_0_3_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,
1269+ struct amdgpu_job *job,
1270+ struct amdgpu_ib *ib)
1271+{
1272+ uint32_t i, reg, res, cond, type;
1273+ struct amdgpu_device *adev = parser->adev;
1274+
1275+ for (i = 0; i < ib->length_dw ; i += 2) {
1276+ reg = CP_PACKETJ_GET_REG(ib->ptr[i]);
1277+ res = CP_PACKETJ_GET_RES(ib->ptr[i]);
1278+ cond = CP_PACKETJ_GET_COND(ib->ptr[i]);
1279+ type = CP_PACKETJ_GET_TYPE(ib->ptr[i]);
1280+
1281+ if (res) /* only support 0 at the moment */
1282+ return -EINVAL;
1283+
1284+ switch (type) {
1285+ case PACKETJ_TYPE0:
1286+ if (cond != PACKETJ_CONDITION_CHECK0 || reg < JPEG_REG_RANGE_START || reg > JPEG_REG_RANGE_END) {
1287+ dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);
1288+ return -EINVAL;
1289+ }
1290+ break;
1291+ case PACKETJ_TYPE3:
1292+ if (cond != PACKETJ_CONDITION_CHECK3 || reg < JPEG_REG_RANGE_START || reg > JPEG_REG_RANGE_END) {
1293+ dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);
1294+ return -EINVAL;
1295+ }
1296+ break;
1297+ case PACKETJ_TYPE6:
1298+ if (ib->ptr[i] == CP_PACKETJ_NOP)
1299+ continue;
1300+ dev_err(adev->dev, "Invalid packet [0x%08x]!\n", ib->ptr[i]);
1301+ return -EINVAL;
1302+ default:
1303+ dev_err(adev->dev, "Unknown packet type %d !\n", type);
1304+ return -EINVAL;
1305+ }
1306+ }
1307+
1308+ return 0;
1309+}
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0_3.h+6−1
@@ -46,6 +46,9 @@ · 45 unmodified lines
4646
4747 #define JRBC_DEC_EXTERNAL_REG_WRITE_ADDR 0x18000
4848
49+#define JPEG_REG_RANGE_START 0x4000
50+#define JPEG_REG_RANGE_END 0x41c2
51+
4952 extern const struct amdgpu_ip_block_version jpeg_v4_0_3_ip_block;
5053
5154 void jpeg_v4_0_3_dec_ring_emit_ib(struct amdgpu_ring *ring,
@@ -62,5 +65,7 @@ void jpeg_v4_0_3_dec_ring_insert_end(struct amdgpu_ring *ring); · 10 unmodified lines
6265 void jpeg_v4_0_3_dec_ring_emit_wreg(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
6366 void jpeg_v4_0_3_dec_ring_emit_reg_wait(struct amdgpu_ring *ring, uint32_t reg,
6467 uint32_t val, uint32_t mask);
65−
68+int jpeg_v4_0_3_dec_ring_parse_cs(struct amdgpu_cs_parser *parser,
69+ struct amdgpu_job *job,
70+ struct amdgpu_ib *ib);
6671 #endif /* __JPEG_V4_0_3_H__ */
drivers/gpu/drm/amd/amdgpu/jpeg_v5_0_0.c+1−0
@@ -646,6 +646,7 @@ static const struct amdgpu_ring_funcs jpeg_v5_0_0_dec_ring_vm_funcs = { · 645 unmodified lines
646646 .get_rptr = jpeg_v5_0_0_dec_ring_get_rptr,
647647 .get_wptr = jpeg_v5_0_0_dec_ring_get_wptr,
648648 .set_wptr = jpeg_v5_0_0_dec_ring_set_wptr,
649+ .parse_cs = jpeg_v4_0_3_dec_ring_parse_cs,
649650 .emit_frame_size =
650651 SOC15_FLUSH_GPU_TLB_NUM_WREG * 6 +
651652 SOC15_FLUSH_GPU_TLB_NUM_REG_WAIT * 8 +
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c+35−26
@@ -162,13 +162,13 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 161 unmodified lines
162162 union MESAPI__QUERY_MES_STATUS mes_status_pkt;
163163 signed long timeout = 3000000; /* 3000 ms */
164164 struct amdgpu_device *adev = mes->adev;
165− struct amdgpu_ring *ring = &mes->ring;
165+ struct amdgpu_ring *ring = &mes->ring[0];
166166 struct MES_API_STATUS *api_status;
167167 union MESAPI__MISC *x_pkt = pkt;
168168 const char *op_str, *misc_op_str;
169169 unsigned long flags;
170170 u64 status_gpu_addr;
171− u32 status_offset;
171+ u32 seq, status_offset;
172172 u64 *status_ptr;
173173 signed long r;
174174 int ret;
@@ -191,11 +191,18 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 16 unmodified lines
191191 status_ptr = (u64 *)&adev->wb.wb[status_offset];
192192 *status_ptr = 0;
193193
194− spin_lock_irqsave(&mes->ring_lock, flags);
194+ spin_lock_irqsave(&mes->ring_lock[0], flags);
195195 r = amdgpu_ring_alloc(ring, (size + sizeof(mes_status_pkt)) / 4);
196196 if (r)
197197 goto error_unlock_free;
198198
199+ seq = ++ring->fence_drv.sync_seq;
200+ r = amdgpu_fence_wait_polling(ring,
201+ seq - ring->fence_drv.num_fences_mask,
202+ timeout);
203+ if (r < 1)
204+ goto error_undo;
205+
199206 api_status = (struct MES_API_STATUS *)((char *)pkt + api_status_off);
200207 api_status->api_completion_fence_addr = status_gpu_addr;
201208 api_status->api_completion_fence_value = 1;
@@ -208,14 +215,13 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 6 unmodified lines
208215 mes_status_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
209216 mes_status_pkt.api_status.api_completion_fence_addr =
210217 ring->fence_drv.gpu_addr;
211− mes_status_pkt.api_status.api_completion_fence_value =
212− ++ring->fence_drv.sync_seq;
218+ mes_status_pkt.api_status.api_completion_fence_value = seq;
213219
214220 amdgpu_ring_write_multiple(ring, &mes_status_pkt,
215221 sizeof(mes_status_pkt) / 4);
216222
217223 amdgpu_ring_commit(ring);
218− spin_unlock_irqrestore(&mes->ring_lock, flags);
224+ spin_unlock_irqrestore(&mes->ring_lock[0], flags);
219225
220226 op_str = mes_v11_0_get_op_string(x_pkt);
221227 misc_op_str = mes_v11_0_get_misc_op_string(x_pkt);
@@ -229,7 +235,7 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 7 unmodified lines
229235 dev_dbg(adev->dev, "MES msg=%d was emitted\n",
230236 x_pkt->header.opcode);
231237
232− r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq, timeout);
238+ r = amdgpu_fence_wait_polling(ring, seq, timeout);
233239 if (r < 1 || !*status_ptr) {
234240
235241 if (misc_op_str)
@@ -252,8 +258,12 @@ static int mes_v11_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 16 unmodified lines
252258 amdgpu_device_wb_free(adev, status_offset);
253259 return 0;
254260
261+error_undo:
262+ dev_err(adev->dev, "MES ring buffer is full.\n");
263+ amdgpu_ring_undo(ring);
264+
255265 error_unlock_free:
256− spin_unlock_irqrestore(&mes->ring_lock, flags);
266+ spin_unlock_irqrestore(&mes->ring_lock[0], flags);
257267
258268 error_wb_free:
259269 amdgpu_device_wb_free(adev, status_offset);
@@ -512,9 +522,9 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes) · 252 unmodified lines
512522 mes_set_hw_res_pkt.vmid_mask_gfxhub = mes->vmid_mask_gfxhub;
513523 mes_set_hw_res_pkt.gds_size = adev->gds.gds_size;
514524 mes_set_hw_res_pkt.paging_vmid = 0;
515− mes_set_hw_res_pkt.g_sch_ctx_gpu_mc_ptr = mes->sch_ctx_gpu_addr;
525+ mes_set_hw_res_pkt.g_sch_ctx_gpu_mc_ptr = mes->sch_ctx_gpu_addr[0];
516526 mes_set_hw_res_pkt.query_status_fence_gpu_mc_ptr =
517− mes->query_status_fence_gpu_addr;
527+ mes->query_status_fence_gpu_addr[0];
518528
519529 for (i = 0; i < MAX_COMPUTE_PIPES; i++)
520530 mes_set_hw_res_pkt.compute_hqd_mask[i] =
@@ -1015,7 +1025,7 @@ static int mes_v11_0_kiq_enable_queue(struct amdgpu_device *adev) · 494 unmodified lines
10151025 return r;
10161026 }
10171027
1018− kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring);
1028+ kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring[0]);
10191029
10201030 return amdgpu_ring_test_helper(kiq_ring);
10211031 }
@@ -1029,7 +1039,7 @@ static int mes_v11_0_queue_init(struct amdgpu_device *adev, · 7 unmodified lines
10291039 if (pipe == AMDGPU_MES_KIQ_PIPE)
10301040 ring = &adev->gfx.kiq[0].ring;
10311041 else if (pipe == AMDGPU_MES_SCHED_PIPE)
1032− ring = &adev->mes.ring;
1042+ ring = &adev->mes.ring[0];
10331043 else
10341044 BUG();
10351045
@@ -1071,7 +1081,7 @@ static int mes_v11_0_ring_init(struct amdgpu_device *adev) · 35 unmodified lines
10711081 {
10721082 struct amdgpu_ring *ring;
10731083
1074− ring = &adev->mes.ring;
1084+ ring = &adev->mes.ring[0];
10751085
10761086 ring->funcs = &mes_v11_0_ring_funcs;
10771087
@@ -1124,7 +1134,7 @@ static int mes_v11_0_mqd_sw_init(struct amdgpu_device *adev, · 46 unmodified lines
11241134 if (pipe == AMDGPU_MES_KIQ_PIPE)
11251135 ring = &adev->gfx.kiq[0].ring;
11261136 else if (pipe == AMDGPU_MES_SCHED_PIPE)
1127− ring = &adev->mes.ring;
1137+ ring = &adev->mes.ring[0];
11281138 else
11291139 BUG();
11301140
@@ -1163,6 +1173,8 @@ static int mes_v11_0_sw_init(void *handle) · 32 unmodified lines
11631173 adev->mes.kiq_hw_init = &mes_v11_0_kiq_hw_init;
11641174 adev->mes.kiq_hw_fini = &mes_v11_0_kiq_hw_fini;
11651175
1176+ adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;
1177+
11661178 r = amdgpu_mes_init(adev);
11671179 if (r)
11681180 return r;
@@ -1198,9 +1210,6 @@ static int mes_v11_0_sw_fini(void *handle) · 29 unmodified lines
11981210 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
11991211 int pipe;
12001212
1201− amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
1202− amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
1203−
12041213 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
12051214 kfree(adev->mes.mqd_backup[pipe]);
12061215
@@ -1214,12 +1223,12 @@ static int mes_v11_0_sw_fini(void *handle) · 7 unmodified lines
12141223 &adev->gfx.kiq[0].ring.mqd_gpu_addr,
12151224 &adev->gfx.kiq[0].ring.mqd_ptr);
12161225
1217− amdgpu_bo_free_kernel(&adev->mes.ring.mqd_obj,
1218− &adev->mes.ring.mqd_gpu_addr,
1219− &adev->mes.ring.mqd_ptr);
1226+ amdgpu_bo_free_kernel(&adev->mes.ring[0].mqd_obj,
1227+ &adev->mes.ring[0].mqd_gpu_addr,
1228+ &adev->mes.ring[0].mqd_ptr);
12201229
12211230 amdgpu_ring_fini(&adev->gfx.kiq[0].ring);
1222− amdgpu_ring_fini(&adev->mes.ring);
1231+ amdgpu_ring_fini(&adev->mes.ring[0]);
12231232
12241233 if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
12251234 mes_v11_0_free_ucode_buffers(adev, AMDGPU_MES_KIQ_PIPE);
@@ -1330,9 +1339,9 @@ failure: · 104 unmodified lines
13301339
13311340 static int mes_v11_0_kiq_hw_fini(struct amdgpu_device *adev)
13321341 {
1333− if (adev->mes.ring.sched.ready) {
1334− mes_v11_0_kiq_dequeue(&adev->mes.ring);
1335− adev->mes.ring.sched.ready = false;
1342+ if (adev->mes.ring[0].sched.ready) {
1343+ mes_v11_0_kiq_dequeue(&adev->mes.ring[0]);
1344+ adev->mes.ring[0].sched.ready = false;
13361345 }
13371346
13381347 if (amdgpu_sriov_vf(adev)) {
@@ -1350,7 +1359,7 @@ static int mes_v11_0_hw_init(void *handle) · 11 unmodified lines
13501359 int r;
13511360 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
13521361
1353− if (adev->mes.ring.sched.ready)
1362+ if (adev->mes.ring[0].sched.ready)
13541363 goto out;
13551364
13561365 if (!adev->enable_mes_kiq) {
@@ -1395,7 +1404,7 @@ out: · 38 unmodified lines
13951404 * with MES enabled.
13961405 */
13971406 adev->gfx.kiq[0].ring.sched.ready = false;
1398− adev->mes.ring.sched.ready = true;
1407+ adev->mes.ring[0].sched.ready = true;
13991408
14001409 return 0;
14011410
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c+167−137
@@ -142,19 +142,20 @@ static const char *mes_v12_0_get_misc_op_string(union MESAPI__MISC *x_pkt) · 141 unmodified lines
142142 }
143143
144144 static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes,
145− void *pkt, int size,
146− int api_status_off)
145+ int pipe, void *pkt, int size,
146+ int api_status_off)
147147 {
148148 union MESAPI__QUERY_MES_STATUS mes_status_pkt;
149149 signed long timeout = 3000000; /* 3000 ms */
150150 struct amdgpu_device *adev = mes->adev;
151− struct amdgpu_ring *ring = &mes->ring;
151+ struct amdgpu_ring *ring = &mes->ring[pipe];
152+ spinlock_t *ring_lock = &mes->ring_lock[pipe];
152153 struct MES_API_STATUS *api_status;
153154 union MESAPI__MISC *x_pkt = pkt;
154155 const char *op_str, *misc_op_str;
155156 unsigned long flags;
156157 u64 status_gpu_addr;
157− u32 status_offset;
158+ u32 seq, status_offset;
158159 u64 *status_ptr;
159160 signed long r;
160161 int ret;
@@ -177,11 +178,18 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 16 unmodified lines
177178 status_ptr = (u64 *)&adev->wb.wb[status_offset];
178179 *status_ptr = 0;
179180
180− spin_lock_irqsave(&mes->ring_lock, flags);
181+ spin_lock_irqsave(ring_lock, flags);
181182 r = amdgpu_ring_alloc(ring, (size + sizeof(mes_status_pkt)) / 4);
182183 if (r)
183184 goto error_unlock_free;
184185
186+ seq = ++ring->fence_drv.sync_seq;
187+ r = amdgpu_fence_wait_polling(ring,
188+ seq - ring->fence_drv.num_fences_mask,
189+ timeout);
190+ if (r < 1)
191+ goto error_undo;
192+
185193 api_status = (struct MES_API_STATUS *)((char *)pkt + api_status_off);
186194 api_status->api_completion_fence_addr = status_gpu_addr;
187195 api_status->api_completion_fence_value = 1;
@@ -194,39 +202,39 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 6 unmodified lines
194202 mes_status_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
195203 mes_status_pkt.api_status.api_completion_fence_addr =
196204 ring->fence_drv.gpu_addr;
197− mes_status_pkt.api_status.api_completion_fence_value =
198− ++ring->fence_drv.sync_seq;
205+ mes_status_pkt.api_status.api_completion_fence_value = seq;
199206
200207 amdgpu_ring_write_multiple(ring, &mes_status_pkt,
201208 sizeof(mes_status_pkt) / 4);
202209
203210 amdgpu_ring_commit(ring);
204− spin_unlock_irqrestore(&mes->ring_lock, flags);
211+ spin_unlock_irqrestore(ring_lock, flags);
205212
206213 op_str = mes_v12_0_get_op_string(x_pkt);
207214 misc_op_str = mes_v12_0_get_misc_op_string(x_pkt);
208215
209216 if (misc_op_str)
210− dev_dbg(adev->dev, "MES msg=%s (%s) was emitted\n", op_str,
211− misc_op_str);
217+ dev_dbg(adev->dev, "MES(%d) msg=%s (%s) was emitted\n",
218+ pipe, op_str, misc_op_str);
212219 else if (op_str)
213− dev_dbg(adev->dev, "MES msg=%s was emitted\n", op_str);
220+ dev_dbg(adev->dev, "MES(%d) msg=%s was emitted\n",
221+ pipe, op_str);
214222 else
215− dev_dbg(adev->dev, "MES msg=%d was emitted\n",
216− x_pkt->header.opcode);
223+ dev_dbg(adev->dev, "MES(%d) msg=%d was emitted\n",
224+ pipe, x_pkt->header.opcode);
217225
218− r = amdgpu_fence_wait_polling(ring, ring->fence_drv.sync_seq, timeout);
226+ r = amdgpu_fence_wait_polling(ring, seq, timeout);
219227 if (r < 1 || !*status_ptr) {
220228
221229 if (misc_op_str)
222− dev_err(adev->dev, "MES failed to respond to msg=%s (%s)\n",
223− op_str, misc_op_str);
230+ dev_err(adev->dev, "MES(%d) failed to respond to msg=%s (%s)\n",
231+ pipe, op_str, misc_op_str);
224232 else if (op_str)
225− dev_err(adev->dev, "MES failed to respond to msg=%s\n",
226− op_str);
233+ dev_err(adev->dev, "MES(%d) failed to respond to msg=%s\n",
234+ pipe, op_str);
227235 else
228− dev_err(adev->dev, "MES failed to respond to msg=%d\n",
229− x_pkt->header.opcode);
236+ dev_err(adev->dev, "MES(%d) failed to respond to msg=%d\n",
237+ pipe, x_pkt->header.opcode);
230238
231239 while (halt_if_hws_hang)
232240 schedule();
@@ -238,8 +246,12 @@ static int mes_v12_0_submit_pkt_and_poll_completion(struct amdgpu_mes *mes, · 5 unmodified lines
238246 amdgpu_device_wb_free(adev, status_offset);
239247 return 0;
240248
249+error_undo:
250+ dev_err(adev->dev, "MES ring buffer is full.\n");
251+ amdgpu_ring_undo(ring);
252+
241253 error_unlock_free:
242− spin_unlock_irqrestore(&mes->ring_lock, flags);
254+ spin_unlock_irqrestore(ring_lock, flags);
243255
244256 error_wb_free:
245257 amdgpu_device_wb_free(adev, status_offset);
@@ -254,6 +266,8 @@ static int convert_to_mes_queue_type(int queue_type) · 8 unmodified lines
254266 return MES_QUEUE_TYPE_COMPUTE;
255267 else if (queue_type == AMDGPU_RING_TYPE_SDMA)
256268 return MES_QUEUE_TYPE_SDMA;
269+ else if (queue_type == AMDGPU_RING_TYPE_MES)
270+ return MES_QUEUE_TYPE_SCHQ;
257271 else
258272 BUG();
259273 return -1;
@@ -311,6 +325,7 @@ static int mes_v12_0_add_hw_queue(struct amdgpu_mes *mes, · 51 unmodified lines
311325 mes_add_queue_pkt.gds_size = input->queue_size;
312326
313327 return mes_v12_0_submit_pkt_and_poll_completion(mes,
328+ AMDGPU_MES_SCHED_PIPE,
314329 &mes_add_queue_pkt, sizeof(mes_add_queue_pkt),
315330 offsetof(union MESAPI__ADD_QUEUE, api_status));
316331 }
@@ -330,6 +345,7 @@ static int mes_v12_0_remove_hw_queue(struct amdgpu_mes *mes, · 13 unmodified lines
330345 mes_remove_queue_pkt.gang_context_addr = input->gang_context_addr;
331346
332347 return mes_v12_0_submit_pkt_and_poll_completion(mes,
348+ AMDGPU_MES_SCHED_PIPE,
333349 &mes_remove_queue_pkt, sizeof(mes_remove_queue_pkt),
334350 offsetof(union MESAPI__REMOVE_QUEUE, api_status));
335351 }
@@ -338,6 +354,7 @@ static int mes_v12_0_map_legacy_queue(struct amdgpu_mes *mes, · 2 unmodified lines
338354 struct mes_map_legacy_queue_input *input)
339355 {
340356 union MESAPI__ADD_QUEUE mes_add_queue_pkt;
357+ int pipe;
341358
342359 memset(&mes_add_queue_pkt, 0, sizeof(mes_add_queue_pkt));
343360
@@ -354,7 +371,12 @@ static int mes_v12_0_map_legacy_queue(struct amdgpu_mes *mes, · 10 unmodified lines
354371 convert_to_mes_queue_type(input->queue_type);
355372 mes_add_queue_pkt.map_legacy_kq = 1;
356373
357− return mes_v12_0_submit_pkt_and_poll_completion(mes,
374+ if (mes->adev->enable_uni_mes)
375+ pipe = AMDGPU_MES_KIQ_PIPE;
376+ else
377+ pipe = AMDGPU_MES_SCHED_PIPE;
378+
379+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
358380 &mes_add_queue_pkt, sizeof(mes_add_queue_pkt),
359381 offsetof(union MESAPI__ADD_QUEUE, api_status));
360382 }
@@ -363,6 +385,7 @@ static int mes_v12_0_unmap_legacy_queue(struct amdgpu_mes *mes, · 2 unmodified lines
363385 struct mes_unmap_legacy_queue_input *input)
364386 {
365387 union MESAPI__REMOVE_QUEUE mes_remove_queue_pkt;
388+ int pipe;
366389
367390 memset(&mes_remove_queue_pkt, 0, sizeof(mes_remove_queue_pkt));
368391
@@ -387,7 +410,12 @@ static int mes_v12_0_unmap_legacy_queue(struct amdgpu_mes *mes, · 18 unmodified lines
387410 convert_to_mes_queue_type(input->queue_type);
388411 }
389412
390− return mes_v12_0_submit_pkt_and_poll_completion(mes,
413+ if (mes->adev->enable_uni_mes)
414+ pipe = AMDGPU_MES_KIQ_PIPE;
415+ else
416+ pipe = AMDGPU_MES_SCHED_PIPE;
417+
418+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
391419 &mes_remove_queue_pkt, sizeof(mes_remove_queue_pkt),
392420 offsetof(union MESAPI__REMOVE_QUEUE, api_status));
393421 }
@@ -404,7 +432,7 @@ static int mes_v12_0_resume_gang(struct amdgpu_mes *mes, · 10 unmodified lines
404432 return 0;
405433 }
406434
407−static int mes_v12_0_query_sched_status(struct amdgpu_mes *mes)
435+static int mes_v12_0_query_sched_status(struct amdgpu_mes *mes, int pipe)
408436 {
409437 union MESAPI__QUERY_MES_STATUS mes_status_pkt;
410438
@@ -414,7 +442,7 @@ static int mes_v12_0_query_sched_status(struct amdgpu_mes *mes) · 3 unmodified lines
414442 mes_status_pkt.header.opcode = MES_SCH_API_QUERY_SCHEDULER_STATUS;
415443 mes_status_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
416444
417− return mes_v12_0_submit_pkt_and_poll_completion(mes,
445+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
418446 &mes_status_pkt, sizeof(mes_status_pkt),
419447 offsetof(union MESAPI__QUERY_MES_STATUS, api_status));
420448 }
@@ -423,6 +451,7 @@ static int mes_v12_0_misc_op(struct amdgpu_mes *mes, · 2 unmodified lines
423451 struct mes_misc_op_input *input)
424452 {
425453 union MESAPI__MISC misc_pkt;
454+ int pipe;
426455
427456 memset(&misc_pkt, 0, sizeof(misc_pkt));
428457
@@ -475,12 +504,17 @@ static int mes_v12_0_misc_op(struct amdgpu_mes *mes, · 46 unmodified lines
475504 return -EINVAL;
476505 }
477506
478− return mes_v12_0_submit_pkt_and_poll_completion(mes,
507+ if (mes->adev->enable_uni_mes)
508+ pipe = AMDGPU_MES_KIQ_PIPE;
509+ else
510+ pipe = AMDGPU_MES_SCHED_PIPE;
511+
512+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
479513 &misc_pkt, sizeof(misc_pkt),
480514 offsetof(union MESAPI__MISC, api_status));
481515 }
482516
483−static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes)
517+static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes, int pipe)
484518 {
485519 union MESAPI_SET_HW_RESOURCES_1 mes_set_hw_res_1_pkt;
486520
@@ -491,12 +525,12 @@ static int mes_v12_0_set_hw_resources_1(struct amdgpu_mes *mes) · 4 unmodified lines
491525 mes_set_hw_res_1_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
492526 mes_set_hw_res_1_pkt.mes_kiq_unmap_timeout = 100;
493527
494− return mes_v12_0_submit_pkt_and_poll_completion(mes,
528+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
495529 &mes_set_hw_res_1_pkt, sizeof(mes_set_hw_res_1_pkt),
496530 offsetof(union MESAPI_SET_HW_RESOURCES_1, api_status));
497531 }
498532
499−static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes)
533+static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes, int pipe)
500534 {
501535 int i;
502536 struct amdgpu_device *adev = mes->adev;
@@ -508,27 +542,33 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes) · 5 unmodified lines
508542 mes_set_hw_res_pkt.header.opcode = MES_SCH_API_SET_HW_RSRC;
509543 mes_set_hw_res_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS;
510544
511− mes_set_hw_res_pkt.vmid_mask_mmhub = mes->vmid_mask_mmhub;
512− mes_set_hw_res_pkt.vmid_mask_gfxhub = mes->vmid_mask_gfxhub;
513− mes_set_hw_res_pkt.gds_size = adev->gds.gds_size;
514− mes_set_hw_res_pkt.paging_vmid = 0;
515− mes_set_hw_res_pkt.g_sch_ctx_gpu_mc_ptr = mes->sch_ctx_gpu_addr;
516− mes_set_hw_res_pkt.query_status_fence_gpu_mc_ptr =
517− mes->query_status_fence_gpu_addr;
518−
519− for (i = 0; i < MAX_COMPUTE_PIPES; i++)
520− mes_set_hw_res_pkt.compute_hqd_mask[i] =
521− mes->compute_hqd_mask[i];
522−
523− for (i = 0; i < MAX_GFX_PIPES; i++)
524− mes_set_hw_res_pkt.gfx_hqd_mask[i] = mes->gfx_hqd_mask[i];
525−
526− for (i = 0; i < MAX_SDMA_PIPES; i++)
527− mes_set_hw_res_pkt.sdma_hqd_mask[i] = mes->sdma_hqd_mask[i];
545+ if (pipe == AMDGPU_MES_SCHED_PIPE) {
546+ mes_set_hw_res_pkt.vmid_mask_mmhub = mes->vmid_mask_mmhub;
547+ mes_set_hw_res_pkt.vmid_mask_gfxhub = mes->vmid_mask_gfxhub;
548+ mes_set_hw_res_pkt.gds_size = adev->gds.gds_size;
549+ mes_set_hw_res_pkt.paging_vmid = 0;
550+
551+ for (i = 0; i < MAX_COMPUTE_PIPES; i++)
552+ mes_set_hw_res_pkt.compute_hqd_mask[i] =
553+ mes->compute_hqd_mask[i];
554+
555+ for (i = 0; i < MAX_GFX_PIPES; i++)
556+ mes_set_hw_res_pkt.gfx_hqd_mask[i] =
557+ mes->gfx_hqd_mask[i];
558+
559+ for (i = 0; i < MAX_SDMA_PIPES; i++)
560+ mes_set_hw_res_pkt.sdma_hqd_mask[i] =
561+ mes->sdma_hqd_mask[i];
562+
563+ for (i = 0; i < AMD_PRIORITY_NUM_LEVELS; i++)
564+ mes_set_hw_res_pkt.aggregated_doorbells[i] =
565+ mes->aggregated_doorbells[i];
566+ }
528567
529− for (i = 0; i < AMD_PRIORITY_NUM_LEVELS; i++)
530− mes_set_hw_res_pkt.aggregated_doorbells[i] =
531− mes->aggregated_doorbells[i];
568+ mes_set_hw_res_pkt.g_sch_ctx_gpu_mc_ptr =
569+ mes->sch_ctx_gpu_addr[pipe];
570+ mes_set_hw_res_pkt.query_status_fence_gpu_mc_ptr =
571+ mes->query_status_fence_gpu_addr[pipe];
532572
533573 for (i = 0; i < 5; i++) {
534574 mes_set_hw_res_pkt.gc_base[i] = adev->reg_offset[GC_HWIP][0][i];
@@ -551,10 +591,12 @@ static int mes_v12_0_set_hw_resources(struct amdgpu_mes *mes) · 16 unmodified lines
551591 mes_set_hw_res_pkt.oversubscription_timer = 50;
552592 mes_set_hw_res_pkt.unmapped_doorbell_handling = 1;
553593
554− mes_set_hw_res_pkt.enable_mes_event_int_logging = 0;
555− mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr = mes->event_log_gpu_addr;
594+ if (amdgpu_mes_log_enable) {
595+ mes_set_hw_res_pkt.enable_mes_event_int_logging = 1;
596+ mes_set_hw_res_pkt.event_intr_history_gpu_mc_ptr = mes->event_log_gpu_addr;
597+ }
556598
557− return mes_v12_0_submit_pkt_and_poll_completion(mes,
599+ return mes_v12_0_submit_pkt_and_poll_completion(mes, pipe,
558600 &mes_set_hw_res_pkt, sizeof(mes_set_hw_res_pkt),
559601 offsetof(union MESAPI_SET_HW_RESOURCES, api_status));
560602 }
@@ -732,16 +774,11 @@ static void mes_v12_0_enable(struct amdgpu_device *adev, bool enable) · 171 unmodified lines
732774 if (enable) {
733775 data = RREG32_SOC15(GC, 0, regCP_MES_CNTL);
734776 data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_RESET, 1);
735− data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET,
736− (!adev->enable_uni_mes && adev->enable_mes_kiq) ? 1 : 0);
777+ data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET, 1);
737778 WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);
738779
739780 mutex_lock(&adev->srbm_mutex);
740781 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
741− if ((!adev->enable_mes_kiq || adev->enable_uni_mes) &&
742− pipe == AMDGPU_MES_KIQ_PIPE)
743− continue;
744−
745782 soc21_grbm_select(adev, 3, pipe, 0, 0);
746783
747784 ucode_addr = adev->mes.uc_start_addr[pipe] >> 2;
@@ -755,8 +792,7 @@ static void mes_v12_0_enable(struct amdgpu_device *adev, bool enable) · 7 unmodified lines
755792
756793 /* unhalt MES and activate pipe0 */
757794 data = REG_SET_FIELD(0, CP_MES_CNTL, MES_PIPE0_ACTIVE, 1);
758− data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_ACTIVE,
759− (!adev->enable_uni_mes && adev->enable_mes_kiq) ? 1 : 0);
795+ data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_ACTIVE, 1);
760796 WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);
761797
762798 if (amdgpu_emu_mode)
@@ -772,8 +808,7 @@ static void mes_v12_0_enable(struct amdgpu_device *adev, bool enable) · 9 unmodified lines
772808 data = REG_SET_FIELD(data, CP_MES_CNTL,
773809 MES_INVALIDATE_ICACHE, 1);
774810 data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE0_RESET, 1);
775− data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET,
776− (!adev->enable_uni_mes && adev->enable_mes_kiq) ? 1 : 0);
811+ data = REG_SET_FIELD(data, CP_MES_CNTL, MES_PIPE1_RESET, 1);
777812 data = REG_SET_FIELD(data, CP_MES_CNTL, MES_HALT, 1);
778813 WREG32_SOC15(GC, 0, regCP_MES_CNTL, data);
779814 }
@@ -788,10 +823,6 @@ static void mes_v12_0_set_ucode_start_addr(struct amdgpu_device *adev) · 8 unmodified lines
788823
789824 mutex_lock(&adev->srbm_mutex);
790825 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
791− if ((!adev->enable_mes_kiq || adev->enable_uni_mes) &&
792− pipe == AMDGPU_MES_KIQ_PIPE)
793− continue;
794−
795826 /* me=3, queue=0 */
796827 soc21_grbm_select(adev, 3, pipe, 0, 0);
797828
@@ -1083,7 +1114,7 @@ static int mes_v12_0_kiq_enable_queue(struct amdgpu_device *adev) · 285 unmodified lines
10831114 return r;
10841115 }
10851116
1086− kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring);
1117+ kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring[0]);
10871118
10881119 r = amdgpu_ring_test_ring(kiq_ring);
10891120 if (r) {
@@ -1099,14 +1130,12 @@ static int mes_v12_0_queue_init(struct amdgpu_device *adev, · 9 unmodified lines
10991130 struct amdgpu_ring *ring;
11001131 int r;
11011132
1102− if (pipe == AMDGPU_MES_KIQ_PIPE)
1133+ if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)
11031134 ring = &adev->gfx.kiq[0].ring;
1104− else if (pipe == AMDGPU_MES_SCHED_PIPE)
1105− ring = &adev->mes.ring;
11061135 else
1107− BUG();
1136+ ring = &adev->mes.ring[pipe];
11081137
1109− if ((pipe == AMDGPU_MES_SCHED_PIPE) &&
1138+ if ((adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) &&
11101139 (amdgpu_in_reset(adev) || adev->in_suspend)) {
11111140 *(ring->wptr_cpu_addr) = 0;
11121141 *(ring->rptr_cpu_addr) = 0;
@@ -1118,13 +1147,12 @@ static int mes_v12_0_queue_init(struct amdgpu_device *adev, · 5 unmodified lines
11181147 return r;
11191148
11201149 if (pipe == AMDGPU_MES_SCHED_PIPE) {
1121− if (adev->enable_uni_mes) {
1122− mes_v12_0_queue_init_register(ring);
1123− } else {
1150+ if (adev->enable_uni_mes)
1151+ r = amdgpu_mes_map_legacy_queue(adev, ring);
1152+ else
11241153 r = mes_v12_0_kiq_enable_queue(adev);
1125− if (r)
1126− return r;
1127− }
1154+ if (r)
1155+ return r;
11281156 } else {
11291157 mes_v12_0_queue_init_register(ring);
11301158 }
@@ -1144,25 +1172,29 @@ static int mes_v12_0_queue_init(struct amdgpu_device *adev, · 13 unmodified lines
11441172 return 0;
11451173 }
11461174
1147−static int mes_v12_0_ring_init(struct amdgpu_device *adev)
1175+static int mes_v12_0_ring_init(struct amdgpu_device *adev, int pipe)
11481176 {
11491177 struct amdgpu_ring *ring;
11501178
1151− ring = &adev->mes.ring;
1179+ ring = &adev->mes.ring[pipe];
11521180
11531181 ring->funcs = &mes_v12_0_ring_funcs;
11541182
11551183 ring->me = 3;
1156− ring->pipe = 0;
1184+ ring->pipe = pipe;
11571185 ring->queue = 0;
11581186
11591187 ring->ring_obj = NULL;
11601188 ring->use_doorbell = true;
1161− ring->doorbell_index = adev->doorbell_index.mes_ring0 << 1;
1162− ring->eop_gpu_addr = adev->mes.eop_gpu_addr[AMDGPU_MES_SCHED_PIPE];
1189+ ring->eop_gpu_addr = adev->mes.eop_gpu_addr[pipe];
11631190 ring->no_scheduler = true;
11641191 sprintf(ring->name, "mes_%d.%d.%d", ring->me, ring->pipe, ring->queue);
11651192
1193+ if (pipe == AMDGPU_MES_SCHED_PIPE)
1194+ ring->doorbell_index = adev->doorbell_index.mes_ring0 << 1;
1195+ else
1196+ ring->doorbell_index = adev->doorbell_index.mes_ring1 << 1;
1197+
11661198 return amdgpu_ring_init(adev, ring, 1024, NULL, 0,
11671199 AMDGPU_RING_PRIO_DEFAULT, NULL);
11681200 }
@@ -1176,7 +1208,7 @@ static int mes_v12_0_kiq_ring_init(struct amdgpu_device *adev) · 7 unmodified lines
11761208 ring = &adev->gfx.kiq[0].ring;
11771209
11781210 ring->me = 3;
1179− ring->pipe = adev->enable_uni_mes ? 0 : 1;
1211+ ring->pipe = 1;
11801212 ring->queue = 0;
11811213
11821214 ring->adev = NULL;
@@ -1198,12 +1230,10 @@ static int mes_v12_0_mqd_sw_init(struct amdgpu_device *adev, · 15 unmodified lines
11981230 int r, mqd_size = sizeof(struct v12_compute_mqd);
11991231 struct amdgpu_ring *ring;
12001232
1201− if (pipe == AMDGPU_MES_KIQ_PIPE)
1233+ if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)
12021234 ring = &adev->gfx.kiq[0].ring;
1203− else if (pipe == AMDGPU_MES_SCHED_PIPE)
1204− ring = &adev->mes.ring;
12051235 else
1206− BUG();
1236+ ring = &adev->mes.ring[pipe];
12071237
12081238 if (ring->mqd_obj)
12091239 return 0;
@@ -1237,14 +1267,13 @@ static int mes_v12_0_sw_init(void *handle) · 27 unmodified lines
12371267 adev->mes.kiq_hw_init = &mes_v12_0_kiq_hw_init;
12381268 adev->mes.kiq_hw_fini = &mes_v12_0_kiq_hw_fini;
12391269
1270+ adev->mes.event_log_size = AMDGPU_MES_LOG_BUFFER_SIZE;
1271+
12401272 r = amdgpu_mes_init(adev);
12411273 if (r)
12421274 return r;
12431275
12441276 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
1245− if (!adev->enable_mes_kiq && pipe == AMDGPU_MES_KIQ_PIPE)
1246− continue;
1247−
12481277 r = mes_v12_0_allocate_eop_buf(adev, pipe);
12491278 if (r)
12501279 return r;
@@ -1252,18 +1281,15 @@ static int mes_v12_0_sw_init(void *handle) · 1 unmodified line
12521281 r = mes_v12_0_mqd_sw_init(adev, pipe);
12531282 if (r)
12541283 return r;
1255− }
12561284
1257− if (adev->enable_mes_kiq) {
1258− r = mes_v12_0_kiq_ring_init(adev);
1285+ if (!adev->enable_uni_mes && pipe == AMDGPU_MES_KIQ_PIPE)
1286+ r = mes_v12_0_kiq_ring_init(adev);
1287+ else
1288+ r = mes_v12_0_ring_init(adev, pipe);
12591289 if (r)
12601290 return r;
12611291 }
12621292
1263− r = mes_v12_0_ring_init(adev);
1264− if (r)
1265− return r;
1266−
12671293 return 0;
12681294 }
12691295
@@ -1272,9 +1298,6 @@ static int mes_v12_0_sw_fini(void *handle) · 2 unmodified lines
12721298 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
12731299 int pipe;
12741300
1275− amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
1276− amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
1277−
12781301 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
12791302 kfree(adev->mes.mqd_backup[pipe]);
12801303
@@ -1282,18 +1305,21 @@ static int mes_v12_0_sw_fini(void *handle) · 1 unmodified line
12821305 &adev->mes.eop_gpu_addr[pipe],
12831306 NULL);
12841307 amdgpu_ucode_release(&adev->mes.fw[pipe]);
1285− }
12861308
1287− amdgpu_bo_free_kernel(&adev->gfx.kiq[0].ring.mqd_obj,
1288− &adev->gfx.kiq[0].ring.mqd_gpu_addr,
1289− &adev->gfx.kiq[0].ring.mqd_ptr);
1290−
1291− amdgpu_bo_free_kernel(&adev->mes.ring.mqd_obj,
1292− &adev->mes.ring.mqd_gpu_addr,
1293− &adev->mes.ring.mqd_ptr);
1309+ if (adev->enable_uni_mes || pipe == AMDGPU_MES_SCHED_PIPE) {
1310+ amdgpu_bo_free_kernel(&adev->mes.ring[pipe].mqd_obj,
1311+ &adev->mes.ring[pipe].mqd_gpu_addr,
1312+ &adev->mes.ring[pipe].mqd_ptr);
1313+ amdgpu_ring_fini(&adev->mes.ring[pipe]);
1314+ }
1315+ }
12941316
1295− amdgpu_ring_fini(&adev->gfx.kiq[0].ring);
1296− amdgpu_ring_fini(&adev->mes.ring);
1317+ if (!adev->enable_uni_mes) {
1318+ amdgpu_bo_free_kernel(&adev->gfx.kiq[0].ring.mqd_obj,
1319+ &adev->gfx.kiq[0].ring.mqd_gpu_addr,
1320+ &adev->gfx.kiq[0].ring.mqd_ptr);
1321+ amdgpu_ring_fini(&adev->gfx.kiq[0].ring);
1322+ }
12971323
12981324 if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
12991325 mes_v12_0_free_ucode_buffers(adev, AMDGPU_MES_KIQ_PIPE);
@@ -1337,7 +1363,7 @@ static void mes_v12_0_kiq_dequeue_sched(struct amdgpu_device *adev) · 37 unmodified lines
13371363 soc21_grbm_select(adev, 0, 0, 0, 0);
13381364 mutex_unlock(&adev->srbm_mutex);
13391365
1340− adev->mes.ring.sched.ready = false;
1366+ adev->mes.ring[0].sched.ready = false;
13411367 }
13421368
13431369 static void mes_v12_0_kiq_setting(struct amdgpu_ring *ring)
@@ -1358,10 +1384,10 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev) · 14 unmodified lines
13581384 {
13591385 int r = 0;
13601386
1361− mes_v12_0_kiq_setting(&adev->gfx.kiq[0].ring);
1362−
13631387 if (adev->enable_uni_mes)
1364− return mes_v12_0_hw_init(adev);
1388+ mes_v12_0_kiq_setting(&adev->mes.ring[AMDGPU_MES_KIQ_PIPE]);
1389+ else
1390+ mes_v12_0_kiq_setting(&adev->gfx.kiq[0].ring);
13651391
13661392 if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
13671393
@@ -1388,6 +1414,14 @@ static int mes_v12_0_kiq_hw_init(struct amdgpu_device *adev) · 20 unmodified lines
13881414 if (r)
13891415 goto failure;
13901416
1417+ if (adev->enable_uni_mes) {
1418+ r = mes_v12_0_set_hw_resources(&adev->mes, AMDGPU_MES_KIQ_PIPE);
1419+ if (r)
1420+ goto failure;
1421+
1422+ mes_v12_0_set_hw_resources_1(&adev->mes, AMDGPU_MES_KIQ_PIPE);
1423+ }
1424+
13911425 r = mes_v12_0_hw_init(adev);
13921426 if (r)
13931427 goto failure;
@@ -1401,9 +1435,15 @@ failure: · 7 unmodified lines
14011435
14021436 static int mes_v12_0_kiq_hw_fini(struct amdgpu_device *adev)
14031437 {
1404− if (adev->mes.ring.sched.ready) {
1405− mes_v12_0_kiq_dequeue_sched(adev);
1406− adev->mes.ring.sched.ready = false;
1438+ if (adev->mes.ring[0].sched.ready) {
1439+ if (adev->enable_uni_mes)
1440+ amdgpu_mes_unmap_legacy_queue(adev,
1441+ &adev->mes.ring[AMDGPU_MES_SCHED_PIPE],
1442+ RESET_QUEUES, 0, 0);
1443+ else
1444+ mes_v12_0_kiq_dequeue_sched(adev);
1445+
1446+ adev->mes.ring[0].sched.ready = false;
14071447 }
14081448
14091449 mes_v12_0_enable(adev, false);
@@ -1416,10 +1456,10 @@ static int mes_v12_0_hw_init(void *handle) · 6 unmodified lines
14161456 int r;
14171457 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
14181458
1419− if (adev->mes.ring.sched.ready)
1459+ if (adev->mes.ring[0].sched.ready)
14201460 goto out;
14211461
1422− if (!adev->enable_mes_kiq || adev->enable_uni_mes) {
1462+ if (!adev->enable_mes_kiq) {
14231463 if (adev->firmware.load_type == AMDGPU_FW_LOAD_DIRECT) {
14241464 r = mes_v12_0_load_microcode(adev,
14251465 AMDGPU_MES_SCHED_PIPE, true);
@@ -1439,23 +1479,23 @@ static int mes_v12_0_hw_init(void *handle) · 13 unmodified lines
14391479 mes_v12_0_enable(adev, true);
14401480 }
14411481
1482+ /* Enable the MES to handle doorbell ring on unmapped queue */
1483+ mes_v12_0_enable_unmapped_doorbell_handling(&adev->mes, true);
1484+
14421485 r = mes_v12_0_queue_init(adev, AMDGPU_MES_SCHED_PIPE);
14431486 if (r)
14441487 goto failure;
14451488
1446− r = mes_v12_0_set_hw_resources(&adev->mes);
1489+ r = mes_v12_0_set_hw_resources(&adev->mes, AMDGPU_MES_SCHED_PIPE);
14471490 if (r)
14481491 goto failure;
14491492
14501493 if (adev->enable_uni_mes)
1451− mes_v12_0_set_hw_resources_1(&adev->mes);
1494+ mes_v12_0_set_hw_resources_1(&adev->mes, AMDGPU_MES_SCHED_PIPE);
14521495
14531496 mes_v12_0_init_aggregated_doorbell(&adev->mes);
14541497
1455− /* Enable the MES to handle doorbell ring on unmapped queue */
1456− mes_v12_0_enable_unmapped_doorbell_handling(&adev->mes, true);
1457−
1458− r = mes_v12_0_query_sched_status(&adev->mes);
1498+ r = mes_v12_0_query_sched_status(&adev->mes, AMDGPU_MES_SCHED_PIPE);
14591499 if (r) {
14601500 DRM_ERROR("MES is busy\n");
14611501 goto failure;
@@ -1468,7 +1508,7 @@ out: · 6 unmodified lines
14681508 * with MES enabled.
14691509 */
14701510 adev->gfx.kiq[0].ring.sched.ready = false;
1471− adev->mes.ring.sched.ready = true;
1511+ adev->mes.ring[0].sched.ready = true;
14721512
14731513 return 0;
14741514
@@ -1511,17 +1551,7 @@ static int mes_v12_0_early_init(void *handle) · 36 unmodified lines
15111551 struct amdgpu_device *adev = (struct amdgpu_device *)handle;
15121552 int pipe, r;
15131553
1514− if (adev->enable_uni_mes) {
1515− r = amdgpu_mes_init_microcode(adev, AMDGPU_MES_SCHED_PIPE);
1516− if (!r)
1517− return 0;
1518−
1519− adev->enable_uni_mes = false;
1520− }
1521−
15221554 for (pipe = 0; pipe < AMDGPU_MAX_MES_PIPES; pipe++) {
1523− if (!adev->enable_mes_kiq && pipe == AMDGPU_MES_KIQ_PIPE)
1524− continue;
15251555 r = amdgpu_mes_init_microcode(adev, pipe);
15261556 if (r)
15271557 return r;
drivers/gpu/drm/amd/amdgpu/mmhub_v4_1_0.c+2−1
@@ -80,7 +80,8 @@ static uint32_t mmhub_v4_1_0_get_invalidate_req(unsigned int vmid, · 79 unmodified lines
8080 /* invalidate using legacy mode on vmid*/
8181 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ,
8282 PER_VMID_INVALIDATE_REQ, 1 << vmid);
83− req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, flush_type);
83+ /* Only use legacy inv on mmhub side */
84+ req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, FLUSH_TYPE, 0);
8485 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PTES, 1);
8586 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE0, 1);
8687 req = REG_SET_FIELD(req, MMVM_INVALIDATE_ENG0_REQ, INVALIDATE_L2_PDE1, 1);
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c+10−8
@@ -176,14 +176,16 @@ static void sdma_v5_2_ring_set_wptr(struct amdgpu_ring *ring) · 175 unmodified lines
176176 DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
177177 ring->doorbell_index, ring->wptr << 2);
178178 WDOORBELL64(ring->doorbell_index, ring->wptr << 2);
179− /* SDMA seems to miss doorbells sometimes when powergating kicks in.
180− * Updating the wptr directly will wake it. This is only safe because
181− * we disallow gfxoff in begin_use() and then allow it again in end_use().
182− */
183− WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR),
184− lower_32_bits(ring->wptr << 2));
185− WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI),
186− upper_32_bits(ring->wptr << 2));
179+ if (amdgpu_ip_version(adev, SDMA0_HWIP, 0) == IP_VERSION(5, 2, 1)) {
180+ /* SDMA seems to miss doorbells sometimes when powergating kicks in.
181+ * Updating the wptr directly will wake it. This is only safe because
182+ * we disallow gfxoff in begin_use() and then allow it again in end_use().
183+ */
184+ WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR),
185+ lower_32_bits(ring->wptr << 2));
186+ WREG32(sdma_v5_2_get_reg_offset(adev, ring->me, mmSDMA0_GFX_RB_WPTR_HI),
187+ upper_32_bits(ring->wptr << 2));
188+ }
187189 } else {
188190 DRM_DEBUG("Not using doorbell -- "
189191 "mmSDMA%i_GFX_RB_WPTR == 0x%08x "
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c+4−3
@@ -1575,8 +1575,7 @@ static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib, · 1574 unmodified lines
15751575 ib->ptr[ib->length_dw++] = SDMA_PKT_COPY_LINEAR_HEADER_OP(SDMA_OP_COPY) |
15761576 SDMA_PKT_COPY_LINEAR_HEADER_SUB_OP(SDMA_SUBOP_COPY_LINEAR) |
15771577 SDMA_PKT_COPY_LINEAR_HEADER_TMZ((copy_flags & AMDGPU_COPY_FLAGS_TMZ) ? 1 : 0) |
1578− SDMA_PKT_COPY_LINEAR_HEADER_CPV((copy_flags &
1579− (AMDGPU_COPY_FLAGS_READ_DECOMPRESSED | AMDGPU_COPY_FLAGS_WRITE_COMPRESSED)) ? 1 : 0);
1578+ SDMA_PKT_COPY_LINEAR_HEADER_CPV(1);
15801579
15811580 ib->ptr[ib->length_dw++] = byte_count - 1;
15821581 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */
@@ -1590,6 +1589,8 @@ static void sdma_v7_0_emit_copy_buffer(struct amdgpu_ib *ib, · 7 unmodified lines
15901589 ((copy_flags & AMDGPU_COPY_FLAGS_READ_DECOMPRESSED) ? SDMA_DCC_READ_CM(2) : 0) |
15911590 ((copy_flags & AMDGPU_COPY_FLAGS_WRITE_COMPRESSED) ? SDMA_DCC_WRITE_CM(1) : 0) |
15921591 SDMA_DCC_MAX_COM(max_com) | SDMA_DCC_MAX_UCOM(1);
1592+ else
1593+ ib->ptr[ib->length_dw++] = 0;
15931594 }
15941595
15951596 /**
@@ -1616,7 +1617,7 @@ static void sdma_v7_0_emit_fill_buffer(struct amdgpu_ib *ib, · 20 unmodified lines
16161617
16171618 static const struct amdgpu_buffer_funcs sdma_v7_0_buffer_funcs = {
16181619 .copy_max_bytes = 0x400000,
1619− .copy_num_dw = 7,
1620+ .copy_num_dw = 8,
16201621 .emit_copy_buffer = sdma_v7_0_emit_copy_buffer,
16211622 .fill_max_bytes = 0x400000,
16221623 .fill_num_dw = 5,
drivers/gpu/drm/amd/amdgpu/soc15d.h+6−0
@@ -76,6 +76,12 @@ · 75 unmodified lines
7676 ((cond & 0xF) << 24) | \
7777 ((type & 0xF) << 28))
7878
79+#define CP_PACKETJ_NOP 0x60000000
80+#define CP_PACKETJ_GET_REG(x) ((x) & 0x3FFFF)
81+#define CP_PACKETJ_GET_RES(x) (((x) >> 18) & 0x3F)
82+#define CP_PACKETJ_GET_COND(x) (((x) >> 24) & 0xF)
83+#define CP_PACKETJ_GET_TYPE(x) (((x) >> 28) & 0xF)
84+
7985 /* Packet 3 types */
8086 #define PACKET3_NOP 0x10
8187 #define PACKET3_SET_BASE 0x11
drivers/gpu/drm/amd/amdgpu/soc24.c+2−0
@@ -406,6 +406,7 @@ static int soc24_common_early_init(void *handle) · 405 unmodified lines
406406 AMD_CG_SUPPORT_ATHUB_MGCG |
407407 AMD_CG_SUPPORT_ATHUB_LS |
408408 AMD_CG_SUPPORT_MC_MGCG |
409+ AMD_CG_SUPPORT_HDP_SD |
409410 AMD_CG_SUPPORT_MC_LS;
410411 adev->pg_flags = AMD_PG_SUPPORT_VCN |
411412 AMD_PG_SUPPORT_JPEG |
@@ -424,6 +425,7 @@ static int soc24_common_early_init(void *handle) · 12 unmodified lines
424425 AMD_CG_SUPPORT_ATHUB_MGCG |
425426 AMD_CG_SUPPORT_ATHUB_LS |
426427 AMD_CG_SUPPORT_MC_MGCG |
428+ AMD_CG_SUPPORT_HDP_SD |
427429 AMD_CG_SUPPORT_MC_LS;
428430
429431 adev->pg_flags = AMD_PG_SUPPORT_VCN |
drivers/gpu/drm/amd/amdkfd/kfd_mqd_manager_v12.c+1−0
@@ -187,6 +187,7 @@ static void update_mqd(struct mqd_manager *mm, void *mqd, · 186 unmodified lines
187187 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;
188188 m->cp_hqd_pq_control |=
189189 ffs(q->queue_size / sizeof(unsigned int)) - 1 - 1;
190+ m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__UNORD_DISPATCH_MASK;
190191 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);
191192
192193 m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c+3−0
@@ -2893,6 +2893,9 @@ static int dm_suspend(void *handle) · 2892 unmodified lines
28932893
28942894 hpd_rx_irq_work_suspend(dm);
28952895
2896+ if (adev->dm.dc->caps.ips_support)
2897+ dc_allow_idle_optimizations(adev->dm.dc, true);
2898+
28962899 dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3);
28972900 dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, DC_ACPI_CM_POWER_STATE_D3);
28982901
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c+27−9
@@ -804,12 +804,25 @@ struct dsc_mst_fairness_params { · 803 unmodified lines
804804 };
805805
806806 #if defined(CONFIG_DRM_AMD_DC_FP)
807−static int kbps_to_peak_pbn(int kbps)
807+static uint16_t get_fec_overhead_multiplier(struct dc_link *dc_link)
808+{
809+ u8 link_coding_cap;
810+ uint16_t fec_overhead_multiplier_x1000 = PBN_FEC_OVERHEAD_MULTIPLIER_8B_10B;
811+
812+ link_coding_cap = dc_link_dp_mst_decide_link_encoding_format(dc_link);
813+ if (link_coding_cap == DP_128b_132b_ENCODING)
814+ fec_overhead_multiplier_x1000 = PBN_FEC_OVERHEAD_MULTIPLIER_128B_132B;
815+
816+ return fec_overhead_multiplier_x1000;
817+}
818+
819+static int kbps_to_peak_pbn(int kbps, uint16_t fec_overhead_multiplier_x1000)
808820 {
809821 u64 peak_kbps = kbps;
810822
811823 peak_kbps *= 1006;
812− peak_kbps = div_u64(peak_kbps, 1000);
824+ peak_kbps *= fec_overhead_multiplier_x1000;
825+ peak_kbps = div_u64(peak_kbps, 1000 * 1000);
813826 return (int) DIV64_U64_ROUND_UP(peak_kbps * 64, (54 * 8 * 1000));
814827 }
815828
@@ -910,11 +923,12 @@ static int increase_dsc_bpp(struct drm_atomic_state *state, · 94 unmodified lines
910923 int link_timeslots_used;
911924 int fair_pbn_alloc;
912925 int ret = 0;
926+ uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);
913927
914928 for (i = 0; i < count; i++) {
915929 if (vars[i + k].dsc_enabled) {
916930 initial_slack[i] =
917− kbps_to_peak_pbn(params[i].bw_range.max_kbps) - vars[i + k].pbn;
931+ kbps_to_peak_pbn(params[i].bw_range.max_kbps, fec_overhead_multiplier_x1000) - vars[i + k].pbn;
918932 bpp_increased[i] = false;
919933 remaining_to_increase += 1;
920934 } else {
@@ -1010,6 +1024,7 @@ static int try_disable_dsc(struct drm_atomic_state *state, · 89 unmodified lines
10101024 int next_index;
10111025 int remaining_to_try = 0;
10121026 int ret;
1027+ uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);
10131028
10141029 for (i = 0; i < count; i++) {
10151030 if (vars[i + k].dsc_enabled
@@ -1039,7 +1054,7 @@ static int try_disable_dsc(struct drm_atomic_state *state, · 23 unmodified lines
10391054 if (next_index == -1)
10401055 break;
10411056
1042− vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps);
1057+ vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
10431058 ret = drm_dp_atomic_find_time_slots(state,
10441059 params[next_index].port->mgr,
10451060 params[next_index].port,
@@ -1052,8 +1067,7 @@ static int try_disable_dsc(struct drm_atomic_state *state, · 6 unmodified lines
10521067 vars[next_index].dsc_enabled = false;
10531068 vars[next_index].bpp_x16 = 0;
10541069 } else {
1055− vars[next_index].pbn = kbps_to_peak_pbn(
1056− params[next_index].bw_range.max_kbps);
1070+ vars[next_index].pbn = kbps_to_peak_pbn(params[next_index].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
10571071 ret = drm_dp_atomic_find_time_slots(state,
10581072 params[next_index].port->mgr,
10591073 params[next_index].port,
@@ -1082,6 +1096,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, · 22 unmodified lines
10821096 int count = 0;
10831097 int i, k, ret;
10841098 bool debugfs_overwrite = false;
1099+ uint16_t fec_overhead_multiplier_x1000 = get_fec_overhead_multiplier(dc_link);
10851100
10861101 memset(params, 0, sizeof(params));
10871102
@@ -1146,7 +1161,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, · 58 unmodified lines
11461161 /* Try no compression */
11471162 for (i = 0; i < count; i++) {
11481163 vars[i + k].aconnector = params[i].aconnector;
1149− vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);
1164+ vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
11501165 vars[i + k].dsc_enabled = false;
11511166 vars[i + k].bpp_x16 = 0;
11521167 ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr, params[i].port,
@@ -1165,7 +1180,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, · 12 unmodified lines
11651180 /* Try max compression */
11661181 for (i = 0; i < count; i++) {
11671182 if (params[i].compression_possible && params[i].clock_force_enable != DSC_CLK_FORCE_DISABLE) {
1168− vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps);
1183+ vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.min_kbps, fec_overhead_multiplier_x1000);
11691184 vars[i + k].dsc_enabled = true;
11701185 vars[i + k].bpp_x16 = params[i].bw_range.min_target_bpp_x16;
11711186 ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
@@ -1173,7 +1188,7 @@ static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, · 1 unmodified line
11731188 if (ret < 0)
11741189 return ret;
11751190 } else {
1176− vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps);
1191+ vars[i + k].pbn = kbps_to_peak_pbn(params[i].bw_range.stream_kbps, fec_overhead_multiplier_x1000);
11771192 vars[i + k].dsc_enabled = false;
11781193 vars[i + k].bpp_x16 = 0;
11791194 ret = drm_dp_atomic_find_time_slots(state, params[i].port->mgr,
@@ -1270,6 +1285,9 @@ static bool is_dsc_need_re_compute( · 90 unmodified lines
12701285 }
12711286 }
12721287
1288+ if (new_stream_on_link_num == 0)
1289+ return false;
1290+
12731291 /* check current_state if there stream on link but it is not in
12741292 * new request state
12751293 */
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.h+3−0
@@ -46,6 +46,9 @@ · 45 unmodified lines
4646 #define SYNAPTICS_CASCADED_HUB_ID 0x5A
4747 #define IS_SYNAPTICS_CASCADED_PANAMERA(devName, data) ((IS_SYNAPTICS_PANAMERA(devName) && ((int)data[2] == SYNAPTICS_CASCADED_HUB_ID)) ? 1 : 0)
4848
49+#define PBN_FEC_OVERHEAD_MULTIPLIER_8B_10B 1031
50+#define PBN_FEC_OVERHEAD_MULTIPLIER_128B_132B 1000
51+
4952 enum mst_msg_ready_type {
5053 NONE_MSG_RDY_EVENT = 0,
5154 DOWN_REP_MSG_RDY_EVENT = 1,
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c+7−2
@@ -28,6 +28,7 @@ · 27 unmodified lines
2828 #include <drm/drm_blend.h>
2929 #include <drm/drm_gem_atomic_helper.h>
3030 #include <drm/drm_plane_helper.h>
31+#include <drm/drm_gem_framebuffer_helper.h>
3132 #include <drm/drm_fourcc.h>
3233
3334 #include "amdgpu.h"
@@ -935,10 +936,14 @@ static int amdgpu_dm_plane_helper_prepare_fb(struct drm_plane *plane, · 901 unmodified lines
935936 }
936937
937938 afb = to_amdgpu_framebuffer(new_state->fb);
938− obj = new_state->fb->obj[0];
939+ obj = drm_gem_fb_get_obj(new_state->fb, 0);
940+ if (!obj) {
941+ DRM_ERROR("Failed to get obj from framebuffer\n");
942+ return -EINVAL;
943+ }
944+
939945 rbo = gem_to_amdgpu_bo(obj);
940946 adev = amdgpu_ttm_adev(rbo->tbo.bdev);
941−
942947 r = amdgpu_bo_reserve(rbo, true);
943948 if (r) {
944949 dev_err(adev->dev, "fail to reserve bo (%d)\n", r);
drivers/gpu/drm/amd/display/dc/core/dc_stream.c+2−0
@@ -35,8 +35,10 @@ · 34 unmodified lines
3535 #include "dc_stream_priv.h"
3636
3737 #define DC_LOGGER dc->ctx->logger
38+#ifndef MIN
3839 #define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
3940 #define MAX(x, y) ((x > y) ? x : y)
41+#endif
4042
4143 /*******************************************************************************
4244 * Private functions
drivers/gpu/drm/amd/display/dc/dce/dmub_replay.c+1−2
@@ -185,8 +185,7 @@ static bool dmub_replay_copy_settings(struct dmub_replay *dmub, · 184 unmodified lines
185185 else
186186 copy_settings_data->flags.bitfields.force_wakeup_by_tps3 = 0;
187187
188−
189− dm_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
188+ dc_wake_and_execute_dmub_cmd(dc, &cmd, DM_DMUB_WAIT_TYPE_WAIT);
190189
191190 return true;
192191 }
drivers/gpu/drm/amd/display/dc/dml/Makefile+2−0
@@ -83,6 +83,8 @@ CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn31/display_rq_dlg_calc_31.o := $(dml_rcfla · 82 unmodified lines
8383 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn32/display_mode_vba_32.o := $(dml_rcflags)
8484 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn32/display_rq_dlg_calc_32.o := $(dml_rcflags)
8585 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn32/display_mode_vba_util_32.o := $(dml_rcflags)
86+CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn314/display_mode_vba_314.o := $(dml_rcflags)
87+CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn314/display_rq_dlg_calc_314.o := $(dml_rcflags)
8688 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dcn301/dcn301_fpu.o := $(dml_rcflags)
8789 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/display_mode_lib.o := $(dml_rcflags)
8890 CFLAGS_REMOVE_$(AMDDALPATH)/dc/dml/dsc/rc_calc_fpu.o := $(dml_rcflags)
drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.c+4−2
@@ -1402,6 +1402,8 @@ void dcn10_init_pipes(struct dc *dc, struct dc_state *context) · 1401 unmodified lines
14021402 if (hubbub && hubp) {
14031403 if (hubbub->funcs->program_det_size)
14041404 hubbub->funcs->program_det_size(hubbub, hubp->inst, 0);
1405+ if (hubbub->funcs->program_det_segments)
1406+ hubbub->funcs->program_det_segments(hubbub, hubp->inst, 0);
14051407 }
14061408 }
14071409
@@ -3587,7 +3589,7 @@ void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx) · 2179 unmodified lines
35873589 (int)hubp->curs_attr.width || pos_cpy.x
35883590 <= (int)hubp->curs_attr.width +
35893591 pipe_ctx->plane_state->src_rect.x) {
3590− pos_cpy.x = temp_x + viewport_width;
3592+ pos_cpy.x = 2 * viewport_width - temp_x;
35913593 }
35923594 }
35933595 } else {
@@ -3680,7 +3682,7 @@ void dcn10_set_cursor_position(struct pipe_ctx *pipe_ctx) · 86 unmodified lines
36803682 (int)hubp->curs_attr.width || pos_cpy.x
36813683 <= (int)hubp->curs_attr.width +
36823684 pipe_ctx->plane_state->src_rect.x) {
3683− pos_cpy.x = 2 * viewport_width - temp_x;
3685+ pos_cpy.x = temp_x + viewport_width;
36843686 }
36853687 }
36863688 } else {
drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_hwseq.c+2−0
@@ -771,6 +771,8 @@ void dcn35_init_pipes(struct dc *dc, struct dc_state *context) · 770 unmodified lines
771771 if (hubbub && hubp) {
772772 if (hubbub->funcs->program_det_size)
773773 hubbub->funcs->program_det_size(hubbub, hubp->inst, 0);
774+ if (hubbub->funcs->program_det_segments)
775+ hubbub->funcs->program_det_segments(hubbub, hubp->inst, 0);
774776 }
775777 }
776778
drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c+3−0
@@ -1778,6 +1778,9 @@ static bool dcn321_resource_construct( · 1777 unmodified lines
17781778 dc->caps.color.mpc.ogam_rom_caps.hlg = 0;
17791779 dc->caps.color.mpc.ocsc = 1;
17801780
1781+ /* Use pipe context based otg sync logic */
1782+ dc->config.use_pipe_ctx_sync_logic = true;
1783+
17811784 dc->config.dc_mode_clk_limit_support = true;
17821785 dc->config.enable_windowed_mpo_odm = true;
17831786 /* read VBIOS LTTPR caps */
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c+1−0
@@ -723,6 +723,7 @@ static const struct dc_debug_options debug_defaults_drv = { · 722 unmodified lines
723723 .min_prefetch_in_strobe_ns = 60000, // 60us
724724 .disable_unbounded_requesting = false,
725725 .enable_legacy_fast_update = false,
726+ .dcc_meta_propagation_delay_us = 10,
726727 .fams2_config = {
727728 .bits = {
728729 .enable = true,
drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.h+3−1
@@ -138,7 +138,9 @@ void dcn401_prepare_mcache_programming(struct dc *dc, struct dc_state *context); · 137 unmodified lines
138138 SRI_ARR(DCHUBP_MALL_CONFIG, HUBP, id), \
139139 SRI_ARR(DCHUBP_VMPG_CONFIG, HUBP, id), \
140140 SRI_ARR(UCLK_PSTATE_FORCE, HUBPREQ, id), \
141− HUBP_3DLUT_FL_REG_LIST_DCN401(id)
141+ HUBP_3DLUT_FL_REG_LIST_DCN401(id), \
142+ SRI_ARR(DCSURF_VIEWPORT_MCACHE_SPLIT_COORDINATE, HUBP, id), \
143+ SRI_ARR(DCHUBP_MCACHEID_CONFIG, HUBP, id)
142144
143145 /* ABM */
144146 #define ABM_DCN401_REG_LIST_RI(id) \
drivers/gpu/drm/amd/display/modules/hdcp/hdcp_ddc.c+2−0
@@ -25,7 +25,9 @@ · 24 unmodified lines
2525
2626 #include "hdcp.h"
2727
28+#ifndef MIN
2829 #define MIN(a, b) ((a) < (b) ? (a) : (b))
30+#endif
2931 #define HDCP_I2C_ADDR 0x3a /* 0x74 >> 1*/
3032 #define KSV_READ_SIZE 0xf /* 0x6803b - 0x6802c */
3133 #define HDCP_MAX_AUX_TRANSACTION_SIZE 16
drivers/gpu/drm/amd/include/discovery.h+42−0
@@ -258,6 +258,48 @@ struct gc_info_v1_2 { · 257 unmodified lines
258258 uint32_t gc_gl2c_per_gpu;
259259 };
260260
261+struct gc_info_v1_3 {
262+ struct gpu_info_header header;
263+ uint32_t gc_num_se;
264+ uint32_t gc_num_wgp0_per_sa;
265+ uint32_t gc_num_wgp1_per_sa;
266+ uint32_t gc_num_rb_per_se;
267+ uint32_t gc_num_gl2c;
268+ uint32_t gc_num_gprs;
269+ uint32_t gc_num_max_gs_thds;
270+ uint32_t gc_gs_table_depth;
271+ uint32_t gc_gsprim_buff_depth;
272+ uint32_t gc_parameter_cache_depth;
273+ uint32_t gc_double_offchip_lds_buffer;
274+ uint32_t gc_wave_size;
275+ uint32_t gc_max_waves_per_simd;
276+ uint32_t gc_max_scratch_slots_per_cu;
277+ uint32_t gc_lds_size;
278+ uint32_t gc_num_sc_per_se;
279+ uint32_t gc_num_sa_per_se;
280+ uint32_t gc_num_packer_per_sc;
281+ uint32_t gc_num_gl2a;
282+ uint32_t gc_num_tcp_per_sa;
283+ uint32_t gc_num_sdp_interface;
284+ uint32_t gc_num_tcps;
285+ uint32_t gc_num_tcp_per_wpg;
286+ uint32_t gc_tcp_l1_size;
287+ uint32_t gc_num_sqc_per_wgp;
288+ uint32_t gc_l1_instruction_cache_size_per_sqc;
289+ uint32_t gc_l1_data_cache_size_per_sqc;
290+ uint32_t gc_gl1c_per_sa;
291+ uint32_t gc_gl1c_size_per_instance;
292+ uint32_t gc_gl2c_per_gpu;
293+ uint32_t gc_tcp_size_per_cu;
294+ uint32_t gc_tcp_cache_line_size;
295+ uint32_t gc_instruction_cache_size_per_sqc;
296+ uint32_t gc_instruction_cache_line_size;
297+ uint32_t gc_scalar_data_cache_size_per_sqc;
298+ uint32_t gc_scalar_data_cache_line_size;
299+ uint32_t gc_tcc_size;
300+ uint32_t gc_tcc_cache_line_size;
301+};
302+
261303 struct gc_info_v2_0 {
262304 struct gpu_info_header header;
263305
drivers/gpu/drm/amd/include/mes_v11_api_def.h+3−0
@@ -28,6 +28,9 @@ · 27 unmodified lines
2828
2929 #define MES_API_VERSION 1
3030
31+/* Maximum log buffer size for MES. Needs to be updated if MES expands MES_EVT_INTR_HIST_LOG */
32+#define AMDGPU_MES_LOG_BUFFER_SIZE 0x4000
33+
3134 /* Driver submits one API(cmd) as a single Frame and this command size is same
3235 * for all API to ease the debugging and parsing of ring buffer.
3336 */
drivers/gpu/drm/amd/include/mes_v12_api_def.h+9−1
@@ -28,6 +28,9 @@ · 27 unmodified lines
2828
2929 #define MES_API_VERSION 0x14
3030
31+/* Maximum log buffer size for MES. Needs to be updated if MES expands MES_EVT_INTR_HIST_LOG_12 */
32+#define AMDGPU_MES_LOG_BUFFER_SIZE 0xC000
33+
3134 /* Driver submits one API(cmd) as a single Frame and this command size is same for all API
3235 * to ease the debugging and parsing of ring buffer.
3336 */
@@ -94,6 +97,7 @@ enum MES_QUEUE_TYPE { · 60 unmodified lines
9497 MES_QUEUE_TYPE_SDMA,
9598
9699 MES_QUEUE_TYPE_MAX,
100+ MES_QUEUE_TYPE_SCHQ = MES_QUEUE_TYPE_MAX,
97101 };
98102
99103 struct MES_API_STATUS {
@@ -239,8 +243,12 @@ union MESAPI_SET_HW_RESOURCES { · 139 unmodified lines
239243 uint32_t send_write_data : 1;
240244 uint32_t os_tdr_timeout_override : 1;
241245 uint32_t use_rs64mem_for_proc_gang_ctx : 1;
246+ uint32_t halt_on_misaligned_access : 1;
247+ uint32_t use_add_queue_unmap_flag_addr : 1;
248+ uint32_t enable_mes_sch_stb_log : 1;
249+ uint32_t limit_single_process : 1;
242250 uint32_t unmapped_doorbell_handling: 2;
243− uint32_t reserved : 15;
251+ uint32_t reserved : 11;
244252 };
245253 uint32_t uint32_all;
246254 };
drivers/gpu/drm/amd/pm/amdgpu_dpm.c+2−1
@@ -618,7 +618,8 @@ int amdgpu_pm_load_smu_firmware(struct amdgpu_device *adev, uint32_t *smu_versio · 617 unmodified lines
618618 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
619619 int r = 0;
620620
621− if (!pp_funcs || !pp_funcs->load_firmware || adev->flags & AMD_IS_APU)
621+ if (!pp_funcs || !pp_funcs->load_firmware ||
622+ (is_support_sw_smu(adev) && (adev->flags & AMD_IS_APU)))
622623 return 0;
623624
624625 mutex_lock(&adev->pm.mutex);
drivers/gpu/drm/amd/pm/powerplay/hwmgr/ppevvmath.h+10−4
@@ -22,12 +22,18 @@ · 21 unmodified lines
2222 */
2323 #include <asm/div64.h>
2424
25−#define SHIFT_AMOUNT 16 /* We multiply all original integers with 2^SHIFT_AMOUNT to get the fInt representation */
25+enum ppevvmath_constants {
26+ /* We multiply all original integers with 2^SHIFT_AMOUNT to get the fInt representation */
27+ SHIFT_AMOUNT = 16,
2628
27−#define PRECISION 5 /* Change this value to change the number of decimal places in the final output - 5 is a good default */
29+ /* Change this value to change the number of decimal places in the final output - 5 is a good default */
30+ PRECISION = 5,
2831
29−#define SHIFTED_2 (2 << SHIFT_AMOUNT)
30−#define MAX (1 << (SHIFT_AMOUNT - 1)) - 1 /* 32767 - Might change in the future */
32+ SHIFTED_2 = (2 << SHIFT_AMOUNT),
33+
34+ /* 32767 - Might change in the future */
35+ MAX = (1 << (SHIFT_AMOUNT - 1)) - 1,
36+};
3137
3238 /* -------------------------------------------------------------------------------
3339 * NEW TYPE - fINT
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c+11−10
@@ -2224,8 +2224,9 @@ static int smu_bump_power_profile_mode(struct smu_context *smu, · 2223 unmodified lines
22242224 }
22252225
22262226 static int smu_adjust_power_state_dynamic(struct smu_context *smu,
2227− enum amd_dpm_forced_level level,
2228− bool skip_display_settings)
2227+ enum amd_dpm_forced_level level,
2228+ bool skip_display_settings,
2229+ bool force_update)
22292230 {
22302231 int ret = 0;
22312232 int index = 0;
@@ -2254,7 +2255,7 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu, · 22 unmodified lines
22542255 }
22552256 }
22562257
2257− if (smu_dpm_ctx->dpm_level != level) {
2258+ if (force_update || smu_dpm_ctx->dpm_level != level) {
22582259 ret = smu_asic_set_performance_level(smu, level);
22592260 if (ret) {
22602261 dev_err(smu->adev->dev, "Failed to set performance level!");
@@ -2265,13 +2266,12 @@ static int smu_adjust_power_state_dynamic(struct smu_context *smu, · 4 unmodified lines
22652266 smu_dpm_ctx->dpm_level = level;
22662267 }
22672268
2268− if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
2269− smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) {
2269+ if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM) {
22702270 index = fls(smu->workload_mask);
22712271 index = index > 0 && index <= WORKLOAD_POLICY_MAX ? index - 1 : 0;
22722272 workload[0] = smu->workload_setting[index];
22732273
2274− if (smu->power_profile_mode != workload[0])
2274+ if (force_update || smu->power_profile_mode != workload[0])
22752275 smu_bump_power_profile_mode(smu, workload, 0);
22762276 }
22772277
@@ -2292,11 +2292,13 @@ static int smu_handle_task(struct smu_context *smu, · 14 unmodified lines
22922292 ret = smu_pre_display_config_changed(smu);
22932293 if (ret)
22942294 return ret;
2295− ret = smu_adjust_power_state_dynamic(smu, level, false);
2295+ ret = smu_adjust_power_state_dynamic(smu, level, false, false);
22962296 break;
22972297 case AMD_PP_TASK_COMPLETE_INIT:
2298+ ret = smu_adjust_power_state_dynamic(smu, level, true, true);
2299+ break;
22982300 case AMD_PP_TASK_READJUST_POWER_STATE:
2299− ret = smu_adjust_power_state_dynamic(smu, level, true);
2301+ ret = smu_adjust_power_state_dynamic(smu, level, true, false);
23002302 break;
23012303 default:
23022304 break;
@@ -2343,8 +2345,7 @@ static int smu_switch_power_profile(void *handle, · 40 unmodified lines
23432345 workload[0] = smu->workload_setting[index];
23442346 }
23452347
2346− if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL &&
2347− smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)
2348+ if (smu_dpm_ctx->dpm_level != AMD_DPM_FORCED_LEVEL_PERF_DETERMINISM)
23482349 smu_bump_power_profile_mode(smu, workload, 0);
23492350
23502351 return 0;
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v14_0_2_ppsmc.h+14−4
@@ -92,7 +92,6 @@ · 91 unmodified lines
9292
9393 //Resets
9494 #define PPSMC_MSG_PrepareMp1ForUnload 0x2E
95−#define PPSMC_MSG_Mode1Reset 0x2F
9695
9796 //Set SystemVirtual DramAddrHigh
9897 #define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x30
@@ -119,11 +118,12 @@ · 20 unmodified lines
119118
120119 //STB to dram log
121120 #define PPSMC_MSG_DumpSTBtoDram 0x3D
122−#define PPSMC_MSG_STBtoDramLogSetDramAddrHigh 0x3E
123−#define PPSMC_MSG_STBtoDramLogSetDramAddrLow 0x3F
121+#define PPSMC_MSG_STBtoDramLogSetDramAddress 0x3E
122+#define PPSMC_MSG_DummyUndefined 0x3F
124123 #define PPSMC_MSG_STBtoDramLogSetDramSize 0x40
125124 #define PPSMC_MSG_SetOBMTraceBufferLogging 0x41
126125
126+#define PPSMC_MSG_UseProfilingMode 0x42
127127 #define PPSMC_MSG_AllowGfxDcs 0x43
128128 #define PPSMC_MSG_DisallowGfxDcs 0x44
129129 #define PPSMC_MSG_EnableAudioStutterWA 0x45
@@ -135,6 +135,16 @@ · 5 unmodified lines
135135 #define PPSMC_MSG_SetBadMemoryPagesRetiredFlagsPerChannel 0x4B
136136 #define PPSMC_MSG_SetPriorityDeltaGain 0x4C
137137 #define PPSMC_MSG_AllowIHHostInterrupt 0x4D
138+#define PPSMC_MSG_EnableShadowDpm 0x4E
138139 #define PPSMC_MSG_Mode3Reset 0x4F
139−#define PPSMC_Message_Count 0x50
140+#define PPSMC_MSG_SetDriverDramAddr 0x50
141+#define PPSMC_MSG_SetToolsDramAddr 0x51
142+#define PPSMC_MSG_TransferTableSmu2DramWithAddr 0x52
143+#define PPSMC_MSG_TransferTableDram2SmuWithAddr 0x53
144+#define PPSMC_MSG_GetAllRunningSmuFeatures 0x54
145+#define PPSMC_MSG_GetSvi3Voltage 0x55
146+#define PPSMC_MSG_UpdatePolicy 0x56
147+#define PPSMC_MSG_ExtPwrConnSupport 0x57
148+#define PPSMC_MSG_PreloadSwPstateForUclkOverDrive 0x58
149+#define PPSMC_Message_Count 0x59
140150 #endif
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v14_0_2_pptable.h+46−6
@@ -27,7 +27,8 @@ · 26 unmodified lines
2727
2828 #pragma pack(push, 1)
2929
30−#define SMU_14_0_2_TABLE_FORMAT_REVISION 3
30+#define SMU_14_0_2_TABLE_FORMAT_REVISION 23
31+#define SMU_14_0_2_CUSTOM_TABLE_FORMAT_REVISION 1
3132
3233 // POWERPLAYTABLE::ulPlatformCaps
3334 #define SMU_14_0_2_PP_PLATFORM_CAP_POWERPLAY 0x1 // This cap indicates whether CCC need to show Powerplay page.
@@ -43,6 +44,7 @@ · 9 unmodified lines
4344 #define SMU_14_0_2_PP_THERMALCONTROLLER_NONE 0
4445
4546 #define SMU_14_0_2_PP_OVERDRIVE_VERSION 0x1 // TODO: FIX OverDrive Version TBD
47+#define SMU_14_0_2_PP_CUSTOM_OVERDRIVE_VERSION 0x1
4648 #define SMU_14_0_2_PP_POWERSAVINGCLOCK_VERSION 0x01 // Power Saving Clock Table Version 1.00
4749
4850 enum SMU_14_0_2_OD_SW_FEATURE_CAP
@@ -107,6 +109,7 @@ enum SMU_14_0_2_PWRMODE_SETTING · 58 unmodified lines
107109 SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_BALANCE,
108110 SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_TURBO,
109111 SMU_14_0_2_PMSETTING_ACOUSTIC_LIMIT_RPM_RAGE,
112+ SMU_14_0_2_PMSETTING_COUNT
110113 };
111114 #define SMU_14_0_2_MAX_PMSETTING 32 // Maximum Number of PowerMode Settings
112115
@@ -127,17 +130,24 @@ struct smu_14_0_2_overdrive_table · 14 unmodified lines
127130 int16_t pm_setting[SMU_14_0_2_MAX_PMSETTING]; // Optimized power mode feature settings
128131 };
129132
133+enum smu_14_0_3_pptable_source {
134+ PPTABLE_SOURCE_IFWI = 0,
135+ PPTABLE_SOURCE_DRIVER_HARDCODED = 1,
136+ PPTABLE_SOURCE_PPGEN_REGISTRY = 2,
137+ PPTABLE_SOURCE_MAX = PPTABLE_SOURCE_PPGEN_REGISTRY,
138+};
139+
130140 struct smu_14_0_2_powerplay_table
131141 {
132142 struct atom_common_table_header header; // header.format_revision = 3 (HAS TO MATCH SMU_14_0_2_TABLE_FORMAT_REVISION), header.content_revision = ? structuresize is calculated by PPGen.
133143 uint8_t table_revision; // PPGen use only: table_revision = 3
134− uint8_t padding; // Padding 1 byte to align table_size offset to 6 bytes (pmfw_start_offset, for PMFW to know the starting offset of PPTable_t).
144+ uint8_t pptable_source; // PPGen UI dropdown box
135145 uint16_t pmfw_pptable_start_offset; // The start offset of the pmfw portion. i.e. start of PPTable_t (start of SkuTable_t)
136146 uint16_t pmfw_pptable_size; // The total size of pmfw_pptable, i.e PPTable_t.
137− uint16_t pmfw_pfe_table_start_offset; // The start offset of the PFE_Settings_t within pmfw_pptable.
138− uint16_t pmfw_pfe_table_size; // The size of PFE_Settings_t.
139− uint16_t pmfw_board_table_start_offset; // The start offset of the BoardTable_t within pmfw_pptable.
140− uint16_t pmfw_board_table_size; // The size of BoardTable_t.
147+ uint16_t pmfw_sku_table_start_offset; // DO NOT CHANGE ORDER; The absolute start offset of the SkuTable_t (within smu_14_0_3_powerplay_table).
148+ uint16_t pmfw_sku_table_size; // DO NOT CHANGE ORDER; The size of SkuTable_t.
149+ uint16_t pmfw_board_table_start_offset; // The start offset of the BoardTable_t
150+ uint16_t pmfw_board_table_size; // The size of BoardTable_t.
141151 uint16_t pmfw_custom_sku_table_start_offset; // The start offset of the CustomSkuTable_t within pmfw_pptable.
142152 uint16_t pmfw_custom_sku_table_size; // The size of the CustomSkuTable_t.
143153 uint32_t golden_pp_id; // PPGen use only: PP Table ID on the Golden Data Base
@@ -159,6 +169,36 @@ struct smu_14_0_2_powerplay_table · 15 unmodified lines
159169 PPTable_t smc_pptable; // PPTable_t in driver_if.h -- as requested by PMFW, this offset should start at a 32-byte boundary, and the table_size above should remain at offset=6 bytes
160170 };
161171
172+enum SMU_14_0_2_CUSTOM_OD_SW_FEATURE_CAP {
173+ SMU_14_0_2_CUSTOM_ODCAP_POWER_MODE = 0,
174+ SMU_14_0_2_CUSTOM_ODCAP_COUNT
175+};
176+
177+enum SMU_14_0_2_CUSTOM_OD_FEATURE_SETTING_ID {
178+ SMU_14_0_2_CUSTOM_ODSETTING_POWER_MODE = 0,
179+ SMU_14_0_2_CUSTOM_ODSETTING_COUNT,
180+};
181+
182+struct smu_14_0_2_custom_overdrive_table {
183+ uint8_t revision;
184+ uint8_t reserve[3];
185+ uint8_t cap[SMU_14_0_2_CUSTOM_ODCAP_COUNT];
186+ int32_t max[SMU_14_0_2_CUSTOM_ODSETTING_COUNT];
187+ int32_t min[SMU_14_0_2_CUSTOM_ODSETTING_COUNT];
188+ int16_t pm_setting[SMU_14_0_2_PMSETTING_COUNT];
189+};
190+
191+struct smu_14_0_3_custom_powerplay_table {
192+ uint8_t custom_table_revision;
193+ uint16_t custom_table_size;
194+ uint16_t custom_sku_table_offset;
195+ uint32_t custom_platform_caps;
196+ uint16_t software_shutdown_temp;
197+ struct smu_14_0_2_custom_overdrive_table custom_overdrive_table;
198+ uint32_t reserve[8];
199+ CustomSkuTable_t custom_sku_table_pmfw;
200+};
201+
162202 #pragma pack(pop)
163203
164204 #endif
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c+6−1
@@ -121,6 +121,7 @@ struct mca_ras_info { · 120 unmodified lines
121121
122122 #define P2S_TABLE_ID_A 0x50325341
123123 #define P2S_TABLE_ID_X 0x50325358
124+#define P2S_TABLE_ID_3 0x50325303
124125
125126 // clang-format off
126127 static const struct cmn2asic_msg_mapping smu_v13_0_6_message_map[SMU_MSG_MAX_COUNT] = {
@@ -271,14 +272,18 @@ static int smu_v13_0_6_init_microcode(struct smu_context *smu) · 144 unmodified lines
271272 struct amdgpu_device *adev = smu->adev;
272273 uint32_t p2s_table_id = P2S_TABLE_ID_A;
273274 int ret = 0, i, p2stable_count;
275+ int var = (adev->pdev->device & 0xF);
274276 char ucode_prefix[15];
275277
276278 /* No need to load P2S tables in IOV mode */
277279 if (amdgpu_sriov_vf(adev))
278280 return 0;
279281
280− if (!(adev->flags & AMD_IS_APU))
282+ if (!(adev->flags & AMD_IS_APU)) {
281283 p2s_table_id = P2S_TABLE_ID_X;
284+ if (var == 0x5)
285+ p2s_table_id = P2S_TABLE_ID_3;
286+ }
282287
283288 amdgpu_ucode_ip_version_decode(adev, MP1_HWIP, ucode_prefix,
284289 sizeof(ucode_prefix));
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c+2−2
@@ -2378,7 +2378,7 @@ static int smu_v13_0_7_get_power_profile_mode(struct smu_context *smu, char *buf · 2377 unmodified lines
23782378
23792379 size += sysfs_emit_at(buf, size, " ");
23802380 for (i = 0; i <= PP_SMC_POWER_PROFILE_WINDOW3D; i++)
2381− size += sysfs_emit_at(buf, size, "%-14s%s", amdgpu_pp_profile_name[i],
2381+ size += sysfs_emit_at(buf, size, "%d %-14s%s", i, amdgpu_pp_profile_name[i],
23822382 (i == smu->power_profile_mode) ? "* " : " ");
23832383
23842384 size += sysfs_emit_at(buf, size, "\n");
@@ -2408,7 +2408,7 @@ static int smu_v13_0_7_get_power_profile_mode(struct smu_context *smu, char *buf · 23 unmodified lines
24082408 do { \
24092409 size += sysfs_emit_at(buf, size, "%-30s", #field); \
24102410 for (j = 0; j <= PP_SMC_POWER_PROFILE_WINDOW3D; j++) \
2411− size += sysfs_emit_at(buf, size, "%-16d", activity_monitor_external[j].DpmActivityMonitorCoeffInt.field); \
2411+ size += sysfs_emit_at(buf, size, "%-18d", activity_monitor_external[j].DpmActivityMonitorCoeffInt.field); \
24122412 size += sysfs_emit_at(buf, size, "\n"); \
24132413 } while (0)
24142414
drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c+71−37
@@ -66,6 +66,7 @@ · 65 unmodified lines
6666
6767 #define MP0_MP1_DATA_REGION_SIZE_COMBOPPTABLE 0x4000
6868 #define DEBUGSMC_MSG_Mode1Reset 2
69+#define LINK_SPEED_MAX 3
6970
7071 static struct cmn2asic_msg_mapping smu_v14_0_2_message_map[SMU_MSG_MAX_COUNT] = {
7172 MSG_MAP(TestMessage, PPSMC_MSG_TestMessage, 1),
@@ -114,7 +115,6 @@ static struct cmn2asic_msg_mapping smu_v14_0_2_message_map[SMU_MSG_MAX_COUNT] = · 42 unmodified lines
114115 MSG_MAP(SetMGpuFanBoostLimitRpm, PPSMC_MSG_SetMGpuFanBoostLimitRpm, 0),
115116 MSG_MAP(GetPptLimit, PPSMC_MSG_GetPptLimit, 0),
116117 MSG_MAP(NotifyPowerSource, PPSMC_MSG_NotifyPowerSource, 0),
117− MSG_MAP(Mode1Reset, PPSMC_MSG_Mode1Reset, 0),
118118 MSG_MAP(PrepareMp1ForUnload, PPSMC_MSG_PrepareMp1ForUnload, 0),
119119 MSG_MAP(DFCstateControl, PPSMC_MSG_SetExternalClientDfCstateAllow, 0),
120120 MSG_MAP(ArmD3, PPSMC_MSG_ArmD3, 0),
@@ -221,7 +221,6 @@ static struct cmn2asic_mapping smu_v14_0_2_workload_map[PP_SMC_POWER_PROFILE_COU · 100 unmodified lines
221221 WORKLOAD_MAP(PP_SMC_POWER_PROFILE_WINDOW3D, WORKLOAD_PPLIB_WINDOW_3D_BIT),
222222 };
223223
224−#if 0
225224 static const uint8_t smu_v14_0_2_throttler_map[] = {
226225 [THROTTLER_PPT0_BIT] = (SMU_THROTTLER_PPT0_BIT),
227226 [THROTTLER_PPT1_BIT] = (SMU_THROTTLER_PPT1_BIT),
@@ -241,7 +240,6 @@ static const uint8_t smu_v14_0_2_throttler_map[] = { · 13 unmodified lines
241240 [THROTTLER_GFX_APCC_PLUS_BIT] = (SMU_THROTTLER_APCC_BIT),
242241 [THROTTLER_FIT_BIT] = (SMU_THROTTLER_FIT_BIT),
243242 };
244−#endif
245243
246244 static int
247245 smu_v14_0_2_get_allowed_feature_mask(struct smu_context *smu,
@@ -1825,48 +1823,86 @@ static void smu_v14_0_2_set_smu_mailbox_registers(struct smu_context *smu) · 1577 unmodified lines
18251823 smu->debug_resp_reg = SOC15_REG_OFFSET(MP1, 0, regMP1_SMN_C2PMSG_54);
18261824 }
18271825
1828−static int smu_v14_0_2_smu_send_bad_mem_page_num(struct smu_context *smu,
1829− uint32_t size)
1826+static ssize_t smu_v14_0_2_get_gpu_metrics(struct smu_context *smu,
1827+ void **table)
18301828 {
1829+ struct smu_table_context *smu_table = &smu->smu_table;
1830+ struct gpu_metrics_v1_3 *gpu_metrics =
1831+ (struct gpu_metrics_v1_3 *)smu_table->gpu_metrics_table;
1832+ SmuMetricsExternal_t metrics_ext;
1833+ SmuMetrics_t *metrics = &metrics_ext.SmuMetrics;
18311834 int ret = 0;
18321835
1833− /* message SMU to update the bad page number on SMUBUS */
1834− ret = smu_cmn_send_smc_msg_with_param(smu,
1835− SMU_MSG_SetNumBadMemoryPagesRetired,
1836− size, NULL);
1836+ ret = smu_cmn_get_metrics_table(smu,
1837+ &metrics_ext,
1838+ true);
18371839 if (ret)
1838− dev_err(smu->adev->dev,
1839− "[%s] failed to message SMU to update bad memory pages number\n",
1840− __func__);
1840+ return ret;
18411841
1842− return ret;
1843−}
1842+ smu_cmn_init_soft_gpu_metrics(gpu_metrics, 1, 3);
18441843
1845−static int smu_v14_0_2_send_bad_mem_channel_flag(struct smu_context *smu,
1846− uint32_t size)
1847−{
1848− int ret = 0;
1844+ gpu_metrics->temperature_edge = metrics->AvgTemperature[TEMP_EDGE];
1845+ gpu_metrics->temperature_hotspot = metrics->AvgTemperature[TEMP_HOTSPOT];
1846+ gpu_metrics->temperature_mem = metrics->AvgTemperature[TEMP_MEM];
1847+ gpu_metrics->temperature_vrgfx = metrics->AvgTemperature[TEMP_VR_GFX];
1848+ gpu_metrics->temperature_vrsoc = metrics->AvgTemperature[TEMP_VR_SOC];
1849+ gpu_metrics->temperature_vrmem = max(metrics->AvgTemperature[TEMP_VR_MEM0],
1850+ metrics->AvgTemperature[TEMP_VR_MEM1]);
18491851
1850− /* message SMU to update the bad channel info on SMUBUS */
1851− ret = smu_cmn_send_smc_msg_with_param(smu,
1852− SMU_MSG_SetBadMemoryPagesRetiredFlagsPerChannel,
1853− size, NULL);
1854− if (ret)
1855− dev_err(smu->adev->dev,
1856− "[%s] failed to message SMU to update bad memory pages channel info\n",
1857− __func__);
1852+ gpu_metrics->average_gfx_activity = metrics->AverageGfxActivity;
1853+ gpu_metrics->average_umc_activity = metrics->AverageUclkActivity;
1854+ gpu_metrics->average_mm_activity = max(metrics->Vcn0ActivityPercentage,
1855+ metrics->Vcn1ActivityPercentage);
18581856
1859− return ret;
1860−}
1857+ gpu_metrics->average_socket_power = metrics->AverageSocketPower;
1858+ gpu_metrics->energy_accumulator = metrics->EnergyAccumulator;
18611859
1862−static ssize_t smu_v14_0_2_get_ecc_info(struct smu_context *smu,
1863− void *table)
1864−{
1865− int ret = 0;
1860+ if (metrics->AverageGfxActivity <= SMU_14_0_2_BUSY_THRESHOLD)
1861+ gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPostDs;
1862+ else
1863+ gpu_metrics->average_gfxclk_frequency = metrics->AverageGfxclkFrequencyPreDs;
18661864
1867− // TODO
1865+ if (metrics->AverageUclkActivity <= SMU_14_0_2_BUSY_THRESHOLD)
1866+ gpu_metrics->average_uclk_frequency = metrics->AverageMemclkFrequencyPostDs;
1867+ else
1868+ gpu_metrics->average_uclk_frequency = metrics->AverageMemclkFrequencyPreDs;
1869+
1870+ gpu_metrics->average_vclk0_frequency = metrics->AverageVclk0Frequency;
1871+ gpu_metrics->average_dclk0_frequency = metrics->AverageDclk0Frequency;
1872+ gpu_metrics->average_vclk1_frequency = metrics->AverageVclk1Frequency;
1873+ gpu_metrics->average_dclk1_frequency = metrics->AverageDclk1Frequency;
1874+
1875+ gpu_metrics->current_gfxclk = gpu_metrics->average_gfxclk_frequency;
1876+ gpu_metrics->current_socclk = metrics->CurrClock[PPCLK_SOCCLK];
1877+ gpu_metrics->current_uclk = metrics->CurrClock[PPCLK_UCLK];
1878+ gpu_metrics->current_vclk0 = metrics->CurrClock[PPCLK_VCLK_0];
1879+ gpu_metrics->current_dclk0 = metrics->CurrClock[PPCLK_DCLK_0];
1880+ gpu_metrics->current_vclk1 = metrics->CurrClock[PPCLK_VCLK_0];
1881+ gpu_metrics->current_dclk1 = metrics->CurrClock[PPCLK_DCLK_0];
1882+
1883+ gpu_metrics->throttle_status =
1884+ smu_v14_0_2_get_throttler_status(metrics);
1885+ gpu_metrics->indep_throttle_status =
1886+ smu_cmn_get_indep_throttler_status(gpu_metrics->throttle_status,
1887+ smu_v14_0_2_throttler_map);
1888+
1889+ gpu_metrics->current_fan_speed = metrics->AvgFanRpm;
1890+
1891+ gpu_metrics->pcie_link_width = metrics->PcieWidth;
1892+ if ((metrics->PcieRate - 1) > LINK_SPEED_MAX)
1893+ gpu_metrics->pcie_link_speed = pcie_gen_to_speed(1);
1894+ else
1895+ gpu_metrics->pcie_link_speed = pcie_gen_to_speed(metrics->PcieRate);
18681896
1869− return ret;
1897+ gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
1898+
1899+ gpu_metrics->voltage_gfx = metrics->AvgVoltage[SVI_PLANE_VDD_GFX];
1900+ gpu_metrics->voltage_soc = metrics->AvgVoltage[SVI_PLANE_VDD_SOC];
1901+ gpu_metrics->voltage_mem = metrics->AvgVoltage[SVI_PLANE_VDDIO_MEM];
1902+
1903+ *table = (void *)gpu_metrics;
1904+
1905+ return sizeof(struct gpu_metrics_v1_3);
18701906 }
18711907
18721908 static const struct pptable_funcs smu_v14_0_2_ppt_funcs = {
@@ -1905,6 +1941,7 @@ static const struct pptable_funcs smu_v14_0_2_ppt_funcs = { · 32 unmodified lines
19051941 .enable_thermal_alert = smu_v14_0_enable_thermal_alert,
19061942 .disable_thermal_alert = smu_v14_0_disable_thermal_alert,
19071943 .notify_memory_pool_location = smu_v14_0_notify_memory_pool_location,
1944+ .get_gpu_metrics = smu_v14_0_2_get_gpu_metrics,
19081945 .set_soft_freq_limited_range = smu_v14_0_set_soft_freq_limited_range,
19091946 .init_pptable_microcode = smu_v14_0_init_pptable_microcode,
19101947 .populate_umd_state_clk = smu_v14_0_2_populate_umd_state_clk,
@@ -1933,12 +1970,9 @@ static const struct pptable_funcs smu_v14_0_2_ppt_funcs = { · 22 unmodified lines
19331970 .enable_gfx_features = smu_v14_0_2_enable_gfx_features,
19341971 .set_mp1_state = smu_v14_0_2_set_mp1_state,
19351972 .set_df_cstate = smu_v14_0_2_set_df_cstate,
1936− .send_hbm_bad_pages_num = smu_v14_0_2_smu_send_bad_mem_page_num,
1937− .send_hbm_bad_channel_flag = smu_v14_0_2_send_bad_mem_channel_flag,
19381973 #if 0
19391974 .gpo_control = smu_v14_0_gpo_control,
19401975 #endif
1941− .get_ecc_info = smu_v14_0_2_get_ecc_info,
19421976 };
19431977
19441978 void smu_v14_0_2_set_ppt_funcs(struct smu_context *smu)
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c+1−1
@@ -794,7 +794,7 @@ static const char *smu_get_feature_name(struct smu_context *smu, · 793 unmodified lines
794794 size_t smu_cmn_get_pp_feature_mask(struct smu_context *smu,
795795 char *buf)
796796 {
797− int8_t sort_feature[max(SMU_FEATURE_COUNT, SMU_FEATURE_MAX)];
797+ int8_t sort_feature[MAX(SMU_FEATURE_COUNT, SMU_FEATURE_MAX)];
798798 uint64_t feature_mask;
799799 int i, feature_index;
800800 uint32_t count = 0;
drivers/gpu/drm/ast/ast_dp.c+7−0
@@ -158,7 +158,14 @@ void ast_dp_launch(struct drm_device *dev) · 157 unmodified lines
158158 ASTDP_HOST_EDID_READ_DONE);
159159 }
160160
161+bool ast_dp_power_is_on(struct ast_device *ast)
162+{
163+ u8 vgacre3;
164+
165+ vgacre3 = ast_get_index_reg(ast, AST_IO_VGACRI, 0xe3);
161166
167+ return !(vgacre3 & AST_DP_PHY_SLEEP);
168+}
162169
163170 void ast_dp_power_on_off(struct drm_device *dev, bool on)
164171 {
drivers/gpu/drm/ast/ast_drv.c+5−0
@@ -391,6 +391,11 @@ static int ast_drm_freeze(struct drm_device *dev) · 390 unmodified lines
391391
392392 static int ast_drm_thaw(struct drm_device *dev)
393393 {
394+ struct ast_device *ast = to_ast_device(dev);
395+
396+ ast_enable_vga(ast->ioregs);
397+ ast_open_key(ast->ioregs);
398+ ast_enable_mmio(dev->dev, ast->ioregs);
394399 ast_post_gpu(dev);
395400
396401 return drm_mode_config_helper_resume(dev);
drivers/gpu/drm/ast/ast_drv.h+1−0
@@ -472,6 +472,7 @@ void ast_init_3rdtx(struct drm_device *dev); · 471 unmodified lines
472472 bool ast_astdp_is_connected(struct ast_device *ast);
473473 int ast_astdp_read_edid(struct drm_device *dev, u8 *ediddata);
474474 void ast_dp_launch(struct drm_device *dev);
475+bool ast_dp_power_is_on(struct ast_device *ast);
475476 void ast_dp_power_on_off(struct drm_device *dev, bool no);
476477 void ast_dp_set_on_off(struct drm_device *dev, bool no);
477478 void ast_dp_set_mode(struct drm_crtc *crtc, struct ast_vbios_mode_info *vbios_mode);
drivers/gpu/drm/ast/ast_mode.c+27−2
@@ -28,6 +28,7 @@ · 27 unmodified lines
2828 * Authors: Dave Airlie <airlied@redhat.com>
2929 */
3030
31+#include <linux/delay.h>
3132 #include <linux/export.h>
3233 #include <linux/pci.h>
3334
@@ -1687,11 +1688,35 @@ static int ast_astdp_connector_helper_detect_ctx(struct drm_connector *connector · 1653 unmodified lines
16871688 struct drm_modeset_acquire_ctx *ctx,
16881689 bool force)
16891690 {
1691+ struct drm_device *dev = connector->dev;
16901692 struct ast_device *ast = to_ast_device(connector->dev);
1693+ enum drm_connector_status status = connector_status_disconnected;
1694+ struct drm_connector_state *connector_state = connector->state;
1695+ bool is_active = false;
1696+
1697+ mutex_lock(&ast->modeset_lock);
1698+
1699+ if (connector_state && connector_state->crtc) {
1700+ struct drm_crtc_state *crtc_state = connector_state->crtc->state;
1701+
1702+ if (crtc_state && crtc_state->active)
1703+ is_active = true;
1704+ }
1705+
1706+ if (!is_active && !ast_dp_power_is_on(ast)) {
1707+ ast_dp_power_on_off(dev, true);
1708+ msleep(50);
1709+ }
16911710
16921711 if (ast_astdp_is_connected(ast))
1693− return connector_status_connected;
1694− return connector_status_disconnected;
1712+ status = connector_status_connected;
1713+
1714+ if (!is_active && status == connector_status_disconnected)
1715+ ast_dp_power_on_off(dev, false);
1716+
1717+ mutex_unlock(&ast->modeset_lock);
1718+
1719+ return status;
16951720 }
16961721
16971722 static const struct drm_connector_helper_funcs ast_astdp_connector_helper_funcs = {
drivers/gpu/drm/drm_atomic_uapi.c+5−9
@@ -1070,21 +1070,17 @@ int drm_atomic_set_property(struct drm_atomic_state *state, · 1069 unmodified lines
10701070 break;
10711071 }
10721072
1073− if (async_flip && prop != config->prop_fb_id) {
1073+ if (async_flip &&
1074+ (plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY ||
1075+ (prop != config->prop_fb_id &&
1076+ prop != config->prop_in_fence_fd &&
1077+ prop != config->prop_fb_damage_clips))) {
10741078 ret = drm_atomic_plane_get_property(plane, plane_state,
10751079 prop, &old_val);
10761080 ret = drm_atomic_check_prop_changes(ret, old_val, prop_value, prop);
10771081 break;
10781082 }
10791083
1080− if (async_flip && plane_state->plane->type != DRM_PLANE_TYPE_PRIMARY) {
1081− drm_dbg_atomic(prop->dev,
1082− "[OBJECT:%d] Only primary planes can be changed during async flip\n",
1083− obj->id);
1084− ret = -EINVAL;
1085− break;
1086− }
1087−
10881084 ret = drm_atomic_plane_set_property(plane,
10891085 plane_state, file_priv,
10901086 prop, prop_value);
drivers/gpu/drm/drm_bridge_connector.c+2−6
@@ -443,10 +443,8 @@ struct drm_connector *drm_bridge_connector_init(struct drm_device *drm, · 442 unmodified lines
443443 panel_bridge = bridge;
444444 }
445445
446− if (connector_type == DRM_MODE_CONNECTOR_Unknown) {
447− kfree(bridge_connector);
446+ if (connector_type == DRM_MODE_CONNECTOR_Unknown)
448447 return ERR_PTR(-EINVAL);
449− }
450448
451449 if (bridge_connector->bridge_hdmi)
452450 ret = drmm_connector_hdmi_init(drm, connector,
@@ -461,10 +459,8 @@ struct drm_connector *drm_bridge_connector_init(struct drm_device *drm, · 8 unmodified lines
461459 ret = drmm_connector_init(drm, connector,
462460 &drm_bridge_connector_funcs,
463461 connector_type, ddc);
464− if (ret) {
465− kfree(bridge_connector);
462+ if (ret)
466463 return ERR_PTR(ret);
467− }
468464
469465 drm_connector_helper_add(connector, &drm_bridge_connector_helper_funcs);
470466
drivers/gpu/drm/drm_buddy.c+23−2
@@ -851,6 +851,7 @@ static int __alloc_contig_try_harder(struct drm_buddy *mm, · 850 unmodified lines
851851 * drm_buddy_block_trim - free unused pages
852852 *
853853 * @mm: DRM buddy manager
854+ * @start: start address to begin the trimming.
854855 * @new_size: original size requested
855856 * @blocks: Input and output list of allocated blocks.
856857 * MUST contain single block as input to be trimmed.
@@ -866,11 +867,13 @@ static int __alloc_contig_try_harder(struct drm_buddy *mm, · 9 unmodified lines
866867 * 0 on success, error code on failure.
867868 */
868869 int drm_buddy_block_trim(struct drm_buddy *mm,
870+ u64 *start,
869871 u64 new_size,
870872 struct list_head *blocks)
871873 {
872874 struct drm_buddy_block *parent;
873875 struct drm_buddy_block *block;
876+ u64 block_start, block_end;
874877 LIST_HEAD(dfs);
875878 u64 new_start;
876879 int err;
@@ -882,6 +885,9 @@ int drm_buddy_block_trim(struct drm_buddy *mm, · 5 unmodified lines
882885 struct drm_buddy_block,
883886 link);
884887
888+ block_start = drm_buddy_block_offset(block);
889+ block_end = block_start + drm_buddy_block_size(mm, block);
890+
885891 if (WARN_ON(!drm_buddy_block_is_allocated(block)))
886892 return -EINVAL;
887893
@@ -894,6 +900,20 @@ int drm_buddy_block_trim(struct drm_buddy *mm, · 6 unmodified lines
894900 if (new_size == drm_buddy_block_size(mm, block))
895901 return 0;
896902
903+ new_start = block_start;
904+ if (start) {
905+ new_start = *start;
906+
907+ if (new_start < block_start)
908+ return -EINVAL;
909+
910+ if (!IS_ALIGNED(new_start, mm->chunk_size))
911+ return -EINVAL;
912+
913+ if (range_overflows(new_start, new_size, block_end))
914+ return -EINVAL;
915+ }
916+
897917 list_del(&block->link);
898918 mark_free(mm, block);
899919 mm->avail += drm_buddy_block_size(mm, block);
@@ -904,7 +924,6 @@ int drm_buddy_block_trim(struct drm_buddy *mm, · 4 unmodified lines
904924 parent = block->parent;
905925 block->parent = NULL;
906926
907− new_start = drm_buddy_block_offset(block);
908927 list_add(&block->tmp_link, &dfs);
909928 err = __alloc_range(mm, &dfs, new_start, new_size, blocks, NULL);
910929 if (err) {
@@ -1066,7 +1085,8 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm, · 155 unmodified lines
10661085 } while (1);
10671086
10681087 /* Trim the allocated block to the required size */
1069− if (original_size != size) {
1088+ if (!(flags & DRM_BUDDY_TRIM_DISABLE) &&
1089+ original_size != size) {
10701090 struct list_head *trim_list;
10711091 LIST_HEAD(temp);
10721092 u64 trim_size;
@@ -1083,6 +1103,7 @@ int drm_buddy_alloc_blocks(struct drm_buddy *mm, · 10 unmodified lines
10831103 }
10841104
10851105 drm_buddy_block_trim(mm,
1106+ NULL,
10861107 trim_size,
10871108 trim_list);
10881109
drivers/gpu/drm/drm_client.c+1−1
@@ -355,7 +355,7 @@ int drm_client_buffer_vmap_local(struct drm_client_buffer *buffer, · 354 unmodified lines
355355
356356 err_drm_gem_vmap_unlocked:
357357 drm_gem_unlock(gem);
358− return 0;
358+ return ret;
359359 }
360360 EXPORT_SYMBOL(drm_client_buffer_vmap_local);
361361
drivers/gpu/drm/drm_client_modeset.c+5−0
@@ -880,6 +880,11 @@ int drm_client_modeset_probe(struct drm_client_dev *client, unsigned int width, · 879 unmodified lines
880880
881881 kfree(modeset->mode);
882882 modeset->mode = drm_mode_duplicate(dev, mode);
883+ if (!modeset->mode) {
884+ ret = -ENOMEM;
885+ break;
886+ }
887+
883888 drm_connector_get(connector);
884889 modeset->connectors[modeset->num_connectors++] = connector;
885890 modeset->x = offset->x;
drivers/gpu/drm/drm_fb_helper.c+11−0
@@ -624,6 +624,17 @@ static void drm_fb_helper_add_damage_clip(struct drm_fb_helper *helper, u32 x, u · 623 unmodified lines
624624 static void drm_fb_helper_damage(struct drm_fb_helper *helper, u32 x, u32 y,
625625 u32 width, u32 height)
626626 {
627+ /*
628+ * This function may be invoked by panic() to flush the frame
629+ * buffer, where all CPUs except the panic CPU are stopped.
630+ * During the following schedule_work(), the panic CPU needs
631+ * the worker_pool lock, which might be held by a stopped CPU,
632+ * causing schedule_work() and panic() to block. Return early on
633+ * oops_in_progress to prevent this blocking.
634+ */
635+ if (oops_in_progress)
636+ return;
637+
627638 drm_fb_helper_add_damage_clip(helper, x, y, width, height);
628639
629640 schedule_work(&helper->damage_work);
drivers/gpu/drm/drm_panel_orientation_quirks.c+18−0
@@ -208,6 +208,18 @@ static const struct dmi_system_id orientation_data[] = { · 207 unmodified lines
208208 DMI_MATCH(DMI_BOARD_NAME, "KUN"),
209209 },
210210 .driver_data = (void *)&lcd1600x2560_rightside_up,
211+ }, { /* AYN Loki Max */
212+ .matches = {
213+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ayn"),
214+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Loki Max"),
215+ },
216+ .driver_data = (void *)&lcd1080x1920_leftside_up,
217+ }, { /* AYN Loki Zero */
218+ .matches = {
219+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "ayn"),
220+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "Loki Zero"),
221+ },
222+ .driver_data = (void *)&lcd1080x1920_leftside_up,
211223 }, { /* Chuwi HiBook (CWI514) */
212224 .matches = {
213225 DMI_MATCH(DMI_BOARD_VENDOR, "Hampoo"),
@@ -414,6 +426,12 @@ static const struct dmi_system_id orientation_data[] = { · 200 unmodified lines
414426 DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "ONE XPLAYER"),
415427 },
416428 .driver_data = (void *)&lcd1600x2560_leftside_up,
429+ }, { /* OrangePi Neo */
430+ .matches = {
431+ DMI_EXACT_MATCH(DMI_SYS_VENDOR, "OrangePi"),
432+ DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "NEO-01"),
433+ },
434+ .driver_data = (void *)&lcd1200x1920_rightside_up,
417435 }, { /* Samsung GalaxyBook 10.6 */
418436 .matches = {
419437 DMI_EXACT_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."),
drivers/gpu/drm/i915/display/intel_backlight.c+3−0
@@ -1449,6 +1449,9 @@ bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) · 1448 unmodified lines
14491449
14501450 static int cnp_num_backlight_controllers(struct drm_i915_private *i915)
14511451 {
1452+ if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
1453+ return 2;
1454+
14521455 if (INTEL_PCH_TYPE(i915) >= PCH_DG1)
14531456 return 1;
14541457
drivers/gpu/drm/i915/display/intel_dp.c+12−0
@@ -5935,6 +5935,18 @@ intel_dp_detect(struct drm_connector *connector, · 5934 unmodified lines
59355935 else
59365936 status = connector_status_disconnected;
59375937
5938+ if (status != connector_status_disconnected &&
5939+ !intel_dp_mst_verify_dpcd_state(intel_dp))
5940+ /*
5941+ * This requires retrying detection for instance to re-enable
5942+ * the MST mode that got reset via a long HPD pulse. The retry
5943+ * will happen either via the hotplug handler's retry logic,
5944+ * ensured by setting the connector here to SST/disconnected,
5945+ * or via a userspace connector probing in response to the
5946+ * hotplug uevent sent when removing the MST connectors.
5947+ */
5948+ status = connector_status_disconnected;
5949+
59385950 if (status == connector_status_disconnected) {
59395951 memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
59405952 memset(intel_connector->dp.dsc_dpcd, 0, sizeof(intel_connector->dp.dsc_dpcd));
drivers/gpu/drm/i915/display/intel_dp_hdcp.c+3−1
@@ -39,7 +39,9 @@ static u32 transcoder_to_stream_enc_status(enum transcoder cpu_transcoder) · 38 unmodified lines
3939 static void intel_dp_hdcp_wait_for_cp_irq(struct intel_connector *connector,
4040 int timeout)
4141 {
42− struct intel_hdcp *hdcp = &connector->hdcp;
42+ struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
43+ struct intel_dp *dp = &dig_port->dp;
44+ struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
4345 long ret;
4446
4547 #define C (hdcp->cp_irq_count_cached != atomic_read(&hdcp->cp_irq_count))
drivers/gpu/drm/i915/display/intel_dp_mst.c+40−0
@@ -1998,3 +1998,43 @@ bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state, · 1997 unmodified lines
19981998
19991999 return false;
20002000 }
2001+
2002+/*
2003+ * intel_dp_mst_verify_dpcd_state - verify the MST SW enabled state wrt. the DPCD
2004+ * @intel_dp: DP port object
2005+ *
2006+ * Verify if @intel_dp's MST enabled SW state matches the corresponding DPCD
2007+ * state. A long HPD pulse - not long enough to be detected as a disconnected
2008+ * state - could've reset the DPCD state, which requires tearing
2009+ * down/recreating the MST topology.
2010+ *
2011+ * Returns %true if the SW MST enabled and DPCD states match, %false
2012+ * otherwise.
2013+ */
2014+bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp)
2015+{
2016+ struct intel_display *display = to_intel_display(intel_dp);
2017+ struct intel_connector *connector = intel_dp->attached_connector;
2018+ struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
2019+ struct intel_encoder *encoder = &dig_port->base;
2020+ int ret;
2021+ u8 val;
2022+
2023+ if (!intel_dp->is_mst)
2024+ return true;
2025+
2026+ ret = drm_dp_dpcd_readb(intel_dp->mst_mgr.aux, DP_MSTM_CTRL, &val);
2027+
2028+ /* Adjust the expected register value for SST + SideBand. */
2029+ if (ret < 0 || val != (DP_MST_EN | DP_UP_REQ_EN | DP_UPSTREAM_IS_SRC)) {
2030+ drm_dbg_kms(display->drm,
2031+ "[CONNECTOR:%d:%s][ENCODER:%d:%s] MST mode got reset, removing topology (ret=%d, ctrl=0x%02x)\n",
2032+ connector->base.base.id, connector->base.name,
2033+ encoder->base.base.id, encoder->base.name,
2034+ ret, val);
2035+
2036+ return false;
2037+ }
2038+
2039+ return true;
2040+}
drivers/gpu/drm/i915/display/intel_dp_mst.h+1−0
@@ -27,5 +27,6 @@ int intel_dp_mst_atomic_check_link(struct intel_atomic_state *state, · 26 unmodified lines
2727 struct intel_link_bw_limits *limits);
2828 bool intel_dp_mst_crtc_needs_modeset(struct intel_atomic_state *state,
2929 struct intel_crtc *crtc);
30+bool intel_dp_mst_verify_dpcd_state(struct intel_dp *intel_dp);
3031
3132 #endif /* __INTEL_DP_MST_H__ */
drivers/gpu/drm/i915/display/intel_dpll_mgr.c+3−3
@@ -1658,7 +1658,7 @@ static void skl_wrpll_params_populate(struct skl_wrpll_params *params, · 1657 unmodified lines
16581658 }
16591659
16601660 static int
1661−skl_ddi_calculate_wrpll(int clock /* in Hz */,
1661+skl_ddi_calculate_wrpll(int clock,
16621662 int ref_clock,
16631663 struct skl_wrpll_params *wrpll_params)
16641664 {
@@ -1683,7 +1683,7 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */, · 18 unmodified lines
16831683 };
16841684 unsigned int dco, d, i;
16851685 unsigned int p0, p1, p2;
1686− u64 afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */
1686+ u64 afe_clock = (u64)clock * 1000 * 5; /* AFE Clock is 5x Pixel clock, in Hz */
16871687
16881688 for (d = 0; d < ARRAY_SIZE(dividers); d++) {
16891689 for (dco = 0; dco < ARRAY_SIZE(dco_central_freq); dco++) {
@@ -1808,7 +1808,7 @@ static int skl_ddi_hdmi_pll_dividers(struct intel_crtc_state *crtc_state) · 118 unmodified lines
18081808 struct skl_wrpll_params wrpll_params = {};
18091809 int ret;
18101810
1811− ret = skl_ddi_calculate_wrpll(crtc_state->port_clock * 1000,
1811+ ret = skl_ddi_calculate_wrpll(crtc_state->port_clock,
18121812 i915->display.dpll.ref_clks.nssc, &wrpll_params);
18131813 if (ret)
18141814 return ret;
drivers/gpu/drm/i915/display/intel_hdcp_regs.h+1−1
@@ -251,7 +251,7 @@ · 250 unmodified lines
251251 #define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
252252 (TRANS_HDCP(dev_priv) ? \
253253 TRANS_HDCP2_STREAM_STATUS(trans) : \
254− PIPE_HDCP2_STREAM_STATUS(pipe))
254+ PIPE_HDCP2_STREAM_STATUS(port))
255255
256256 #define _PORTA_HDCP2_AUTH_STREAM 0x66F00
257257 #define _PORTB_HDCP2_AUTH_STREAM 0x66F04
drivers/gpu/drm/i915/display/intel_pps.c+3−0
@@ -351,6 +351,9 @@ static int intel_num_pps(struct drm_i915_private *i915) · 350 unmodified lines
351351 if (IS_GEMINILAKE(i915) || IS_BROXTON(i915))
352352 return 2;
353353
354+ if (INTEL_PCH_TYPE(i915) >= PCH_MTL)
355+ return 2;
356+
354357 if (INTEL_PCH_TYPE(i915) >= PCH_DG1)
355358 return 1;
356359
drivers/gpu/drm/i915/display/vlv_dsi.c+0−1
@@ -1870,7 +1870,6 @@ static const struct dmi_system_id vlv_dsi_dmi_quirk_table[] = { · 1869 unmodified lines
18701870 /* Lenovo Yoga Tab 3 Pro YT3-X90F */
18711871 .matches = {
18721872 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
1873− DMI_MATCH(DMI_PRODUCT_NAME, "CHERRYVIEW D1 PLATFORM"),
18741873 DMI_MATCH(DMI_PRODUCT_VERSION, "Blade3-10A-001"),
18751874 },
18761875 .driver_data = (void *)vlv_dsi_lenovo_yoga_tab3_backlight_fixup,
drivers/gpu/drm/i915/gem/i915_gem_mman.c+49−6
@@ -290,6 +290,41 @@ out: · 289 unmodified lines
290290 return i915_error_to_vmf_fault(err);
291291 }
292292
293+static void set_address_limits(struct vm_area_struct *area,
294+ struct i915_vma *vma,
295+ unsigned long obj_offset,
296+ unsigned long *start_vaddr,
297+ unsigned long *end_vaddr)
298+{
299+ unsigned long vm_start, vm_end, vma_size; /* user's memory parameters */
300+ long start, end; /* memory boundaries */
301+
302+ /*
303+ * Let's move into the ">> PAGE_SHIFT"
304+ * domain to be sure not to lose bits
305+ */
306+ vm_start = area->vm_start >> PAGE_SHIFT;
307+ vm_end = area->vm_end >> PAGE_SHIFT;
308+ vma_size = vma->size >> PAGE_SHIFT;
309+
310+ /*
311+ * Calculate the memory boundaries by considering the offset
312+ * provided by the user during memory mapping and the offset
313+ * provided for the partial mapping.
314+ */
315+ start = vm_start;
316+ start -= obj_offset;
317+ start += vma->gtt_view.partial.offset;
318+ end = start + vma_size;
319+
320+ start = max_t(long, start, vm_start);
321+ end = min_t(long, end, vm_end);
322+
323+ /* Let's move back into the "<< PAGE_SHIFT" domain */
324+ *start_vaddr = (unsigned long)start << PAGE_SHIFT;
325+ *end_vaddr = (unsigned long)end << PAGE_SHIFT;
326+}
327+
293328 static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
294329 {
295330 #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT)
@@ -302,14 +337,18 @@ static vm_fault_t vm_fault_gtt(struct vm_fault *vmf) · 6 unmodified lines
302337 struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
303338 bool write = area->vm_flags & VM_WRITE;
304339 struct i915_gem_ww_ctx ww;
340+ unsigned long obj_offset;
341+ unsigned long start, end; /* memory boundaries */
305342 intel_wakeref_t wakeref;
306343 struct i915_vma *vma;
307344 pgoff_t page_offset;
345+ unsigned long pfn;
308346 int srcu;
309347 int ret;
310348
311− /* We don't use vmf->pgoff since that has the fake offset */
349+ obj_offset = area->vm_pgoff - drm_vma_node_start(&mmo->vma_node);
312350 page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT;
351+ page_offset += obj_offset;
313352
314353 trace_i915_gem_object_fault(obj, page_offset, true, write);
315354
@@ -402,12 +441,14 @@ retry: · 86 unmodified lines
402441 if (ret)
403442 goto err_unpin;
404443
444+ set_address_limits(area, vma, obj_offset, &start, &end);
445+
446+ pfn = (ggtt->gmadr.start + i915_ggtt_offset(vma)) >> PAGE_SHIFT;
447+ pfn += (start - area->vm_start) >> PAGE_SHIFT;
448+ pfn += obj_offset - vma->gtt_view.partial.offset;
449+
405450 /* Finally, remap it using the new GTT offset */
406− ret = remap_io_mapping(area,
407− area->vm_start + (vma->gtt_view.partial.offset << PAGE_SHIFT),
408− (ggtt->gmadr.start + i915_ggtt_offset(vma)) >> PAGE_SHIFT,
409− min_t(u64, vma->size, area->vm_end - area->vm_start),
410− &ggtt->iomap);
451+ ret = remap_io_mapping(area, start, pfn, end - start, &ggtt->iomap);
411452 if (ret)
412453 goto err_fence;
413454
@@ -1084,6 +1125,8 @@ int i915_gem_fb_mmap(struct drm_i915_gem_object *obj, struct vm_area_struct *vma · 670 unmodified lines
10841125 mmo = mmap_offset_attach(obj, mmap_type, NULL);
10851126 if (IS_ERR(mmo))
10861127 return PTR_ERR(mmo);
1128+
1129+ vma->vm_pgoff += drm_vma_node_start(&mmo->vma_node);
10871130 }
10881131
10891132 /*
drivers/gpu/drm/i915/gem/i915_gem_ttm.c+7−6
@@ -165,7 +165,6 @@ i915_ttm_placement_from_obj(const struct drm_i915_gem_object *obj, · 164 unmodified lines
165165 i915_ttm_place_from_region(num_allowed ? obj->mm.placements[0] :
166166 obj->mm.region, &places[0], obj->bo_offset,
167167 obj->base.size, flags);
168− places[0].flags |= TTM_PL_FLAG_DESIRED;
169168
170169 /* Cache this on object? */
171170 for (i = 0; i < num_allowed; ++i) {
@@ -779,13 +778,16 @@ static int __i915_ttm_get_pages(struct drm_i915_gem_object *obj, · 607 unmodified lines
779778 .interruptible = true,
780779 .no_wait_gpu = false,
781780 };
782− int real_num_busy;
781+ struct ttm_placement initial_placement;
782+ struct ttm_place initial_place;
783783 int ret;
784784
785785 /* First try only the requested placement. No eviction. */
786− real_num_busy = placement->num_placement;
787− placement->num_placement = 1;
788− ret = ttm_bo_validate(bo, placement, &ctx);
786+ initial_placement.num_placement = 1;
787+ memcpy(&initial_place, placement->placement, sizeof(struct ttm_place));
788+ initial_place.flags |= TTM_PL_FLAG_DESIRED;
789+ initial_placement.placement = &initial_place;
790+ ret = ttm_bo_validate(bo, &initial_placement, &ctx);
789791 if (ret) {
790792 ret = i915_ttm_err_to_gem(ret);
791793 /*
@@ -800,7 +802,6 @@ static int __i915_ttm_get_pages(struct drm_i915_gem_object *obj, · 8 unmodified lines
800802 * If the initial attempt fails, allow all accepted placements,
801803 * evicting if necessary.
802804 */
803− placement->num_placement = real_num_busy;
804805 ret = ttm_bo_validate(bo, placement, &ctx);
805806 if (ret)
806807 return i915_ttm_err_to_gem(ret);
drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.c+31−0
@@ -212,6 +212,37 @@ int intel_gsc_fw_get_binary_info(struct intel_uc_fw *gsc_fw, const void *data, s · 211 unmodified lines
212212 }
213213 }
214214
215+ if (IS_ARROWLAKE(gt->i915)) {
216+ bool too_old = false;
217+
218+ /*
219+ * ARL requires a newer firmware than MTL did (102.0.10.1878) but the
220+ * firmware is actually common. So, need to do an explicit version check
221+ * here rather than using a separate table entry. And if the older
222+ * MTL-only version is found, then just don't use GSC rather than aborting
223+ * the driver load.
224+ */
225+ if (gsc->release.major < 102) {
226+ too_old = true;
227+ } else if (gsc->release.major == 102) {
228+ if (gsc->release.minor == 0) {
229+ if (gsc->release.patch < 10) {
230+ too_old = true;
231+ } else if (gsc->release.patch == 10) {
232+ if (gsc->release.build < 1878)
233+ too_old = true;
234+ }
235+ }
236+ }
237+
238+ if (too_old) {
239+ gt_info(gt, "GSC firmware too old for ARL, got %d.%d.%d.%d but need at least 102.0.10.1878",
240+ gsc->release.major, gsc->release.minor,
241+ gsc->release.patch, gsc->release.build);
242+ return -EINVAL;
243+ }
244+ }
245+
215246 return 0;
216247 }
217248
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c+8−2
@@ -698,12 +698,18 @@ static int check_gsc_manifest(struct intel_gt *gt, · 697 unmodified lines
698698 const struct firmware *fw,
699699 struct intel_uc_fw *uc_fw)
700700 {
701+ int ret;
702+
701703 switch (uc_fw->type) {
702704 case INTEL_UC_FW_TYPE_HUC:
703− intel_huc_fw_get_binary_info(uc_fw, fw->data, fw->size);
705+ ret = intel_huc_fw_get_binary_info(uc_fw, fw->data, fw->size);
706+ if (ret)
707+ return ret;
704708 break;
705709 case INTEL_UC_FW_TYPE_GSC:
706− intel_gsc_fw_get_binary_info(uc_fw, fw->data, fw->size);
710+ ret = intel_gsc_fw_get_binary_info(uc_fw, fw->data, fw->size);
711+ if (ret)
712+ return ret;
707713 break;
708714 default:
709715 MISSING_CASE(uc_fw->type);
drivers/gpu/drm/i915/i915_drv.h+2−0
@@ -546,6 +546,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, · 545 unmodified lines
546546 #define IS_LUNARLAKE(i915) (0 && i915)
547547 #define IS_BATTLEMAGE(i915) (0 && i915)
548548
549+#define IS_ARROWLAKE(i915) \
550+ IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL)
549551 #define IS_DG2_G10(i915) \
550552 IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G10)
551553 #define IS_DG2_G11(i915) \
drivers/gpu/drm/i915/i915_perf.c+0−33
@@ -2748,26 +2748,6 @@ oa_configure_all_contexts(struct i915_perf_stream *stream, · 2747 unmodified lines
27482748 return 0;
27492749 }
27502750
2751−static int
2752−gen12_configure_all_contexts(struct i915_perf_stream *stream,
2753− const struct i915_oa_config *oa_config,
2754− struct i915_active *active)
2755−{
2756− struct flex regs[] = {
2757− {
2758− GEN8_R_PWR_CLK_STATE(RENDER_RING_BASE),
2759− CTX_R_PWR_CLK_STATE,
2760− },
2761− };
2762−
2763− if (stream->engine->class != RENDER_CLASS)
2764− return 0;
2765−
2766− return oa_configure_all_contexts(stream,
2767− regs, ARRAY_SIZE(regs),
2768− active);
2769−}
2770−
27712751 static int
27722752 lrc_configure_all_contexts(struct i915_perf_stream *stream,
27732753 const struct i915_oa_config *oa_config,
@@ -2874,7 +2854,6 @@ gen12_enable_metric_set(struct i915_perf_stream *stream, · 100 unmodified lines
28742854 {
28752855 struct drm_i915_private *i915 = stream->perf->i915;
28762856 struct intel_uncore *uncore = stream->uncore;
2877− struct i915_oa_config *oa_config = stream->oa_config;
28782857 bool periodic = stream->periodic;
28792858 u32 period_exponent = stream->period_exponent;
28802859 u32 sqcnt1;
@@ -2918,15 +2897,6 @@ gen12_enable_metric_set(struct i915_perf_stream *stream, · 37 unmodified lines
29182897
29192898 intel_uncore_rmw(uncore, GEN12_SQCNT1, 0, sqcnt1);
29202899
2921− /*
2922− * Update all contexts prior writing the mux configurations as we need
2923− * to make sure all slices/subslices are ON before writing to NOA
2924− * registers.
2925− */
2926− ret = gen12_configure_all_contexts(stream, oa_config, active);
2927− if (ret)
2928− return ret;
2929−
29302900 /*
29312901 * For Gen12, performance counters are context
29322902 * saved/restored. Only enable it for the context that
@@ -2980,9 +2950,6 @@ static void gen12_disable_metric_set(struct i915_perf_stream *stream) · 47 unmodified lines
29802950 _MASKED_BIT_DISABLE(GEN12_DISABLE_DOP_GATING));
29812951 }
29822952
2983− /* Reset all contexts' slices/subslices configurations. */
2984− gen12_configure_all_contexts(stream, NULL, NULL);
2985−
29862953 /* disable the context save/restore or OAR counters */
29872954 if (stream->ctx)
29882955 gen12_configure_oar_context(stream, NULL);
drivers/gpu/drm/i915/intel_device_info.c+7−0
@@ -203,6 +203,10 @@ static const u16 subplatform_g12_ids[] = { · 202 unmodified lines
203203 INTEL_DG2_G12_IDS(ID),
204204 };
205205
206+static const u16 subplatform_arl_ids[] = {
207+ INTEL_ARL_IDS(ID),
208+};
209+
206210 static bool find_devid(u16 id, const u16 *p, unsigned int num)
207211 {
208212 for (; num; num--, p++) {
@@ -260,6 +264,9 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915) · 51 unmodified lines
260264 } else if (find_devid(devid, subplatform_g12_ids,
261265 ARRAY_SIZE(subplatform_g12_ids))) {
262266 mask = BIT(INTEL_SUBPLATFORM_G12);
267+ } else if (find_devid(devid, subplatform_arl_ids,
268+ ARRAY_SIZE(subplatform_arl_ids))) {
269+ mask = BIT(INTEL_SUBPLATFORM_ARL);
263270 }
264271
265272 GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
drivers/gpu/drm/i915/intel_device_info.h+3−0
@@ -127,6 +127,9 @@ enum intel_platform { · 126 unmodified lines
127127 #define INTEL_SUBPLATFORM_N 1
128128 #define INTEL_SUBPLATFORM_RPLU 2
129129
130+/* MTL */
131+#define INTEL_SUBPLATFORM_ARL 0
132+
130133 enum intel_ppgtt_type {
131134 INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
132135 INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
drivers/gpu/drm/mediatek/mtk_drm_drv.c+2−2
@@ -539,8 +539,8 @@ static int mtk_drm_kms_init(struct drm_device *drm) · 538 unmodified lines
539539 }
540540
541541 /* IGT will check if the cursor size is configured */
542− drm->mode_config.cursor_width = drm->mode_config.max_width;
543− drm->mode_config.cursor_height = drm->mode_config.max_height;
542+ drm->mode_config.cursor_width = 512;
543+ drm->mode_config.cursor_height = 512;
544544
545545 /* Use OVL device for all DMA memory allocations */
546546 crtc = drm_crtc_from_index(drm, 0);
drivers/gpu/drm/msm/adreno/adreno_gpu.c+1−1
@@ -99,7 +99,7 @@ static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname, · 98 unmodified lines
9999 * was a bad idea, and is only provided for backwards
100100 * compatibility for older targets.
101101 */
102− return -ENODEV;
102+ return -ENOENT;
103103 }
104104
105105 if (IS_ERR(fw)) {
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c+2−2
@@ -1171,8 +1171,6 @@ static void dpu_encoder_virt_atomic_mode_set(struct drm_encoder *drm_enc, · 1170 unmodified lines
11711171
11721172 cstate->num_mixers = num_lm;
11731173
1174− dpu_enc->connector = conn_state->connector;
1175−
11761174 for (i = 0; i < dpu_enc->num_phys_encs; i++) {
11771175 struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i];
11781176
@@ -1270,6 +1268,8 @@ static void dpu_encoder_virt_atomic_enable(struct drm_encoder *drm_enc, · 91 unmodified lines
12701268
12711269 dpu_enc->commit_done_timedout = false;
12721270
1271+ dpu_enc->connector = drm_atomic_get_new_connector_for_encoder(state, drm_enc);
1272+
12731273 cur_mode = &dpu_enc->base.crtc->state->adjusted_mode;
12741274
12751275 dpu_enc->wide_bus_en = dpu_encoder_is_widebus_enabled(drm_enc);
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c+2−2
@@ -308,8 +308,8 @@ static const u32 wb2_formats_rgb_yuv[] = { · 307 unmodified lines
308308 { \
309309 .maxdwnscale = SSPP_UNITY_SCALE, \
310310 .maxupscale = SSPP_UNITY_SCALE, \
311− .format_list = plane_formats_yuv, \
312− .num_formats = ARRAY_SIZE(plane_formats_yuv), \
311+ .format_list = plane_formats, \
312+ .num_formats = ARRAY_SIZE(plane_formats), \
313313 .virt_format_list = plane_formats, \
314314 .virt_num_formats = ARRAY_SIZE(plane_formats), \
315315 }
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h+2−12
@@ -31,24 +31,14 @@ · 30 unmodified lines
3131 * @fmt: Pointer to format string
3232 */
3333 #define DPU_DEBUG(fmt, ...) \
34− do { \
35− if (drm_debug_enabled(DRM_UT_KMS)) \
36− DRM_DEBUG(fmt, ##__VA_ARGS__); \
37− else \
38− pr_debug(fmt, ##__VA_ARGS__); \
39− } while (0)
34+ DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__)
4035
4136 /**
4237 * DPU_DEBUG_DRIVER - macro for hardware driver logging
4338 * @fmt: Pointer to format string
4439 */
4540 #define DPU_DEBUG_DRIVER(fmt, ...) \
46− do { \
47− if (drm_debug_enabled(DRM_UT_DRIVER)) \
48− DRM_ERROR(fmt, ##__VA_ARGS__); \
49− else \
50− pr_debug(fmt, ##__VA_ARGS__); \
51− } while (0)
41+ DRM_DEBUG_DRIVER(fmt, ##__VA_ARGS__)
5242
5343 #define DPU_ERROR(fmt, ...) pr_err("[dpu error]" fmt, ##__VA_ARGS__)
5444 #define DPU_ERROR_RATELIMITED(fmt, ...) pr_err_ratelimited("[dpu error]" fmt, ##__VA_ARGS__)
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c+17−3
@@ -681,6 +681,9 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, · 680 unmodified lines
681681 new_state->fb, &layout);
682682 if (ret) {
683683 DPU_ERROR_PLANE(pdpu, "failed to get format layout, %d\n", ret);
684+ if (pstate->aspace)
685+ msm_framebuffer_cleanup(new_state->fb, pstate->aspace,
686+ pstate->needs_dirtyfb);
684687 return ret;
685688 }
686689
@@ -744,10 +747,9 @@ static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu, · 57 unmodified lines
744747 min_src_size = MSM_FORMAT_IS_YUV(fmt) ? 2 : 1;
745748
746749 if (MSM_FORMAT_IS_YUV(fmt) &&
747− (!pipe->sspp->cap->sblk->scaler_blk.len ||
748− !pipe->sspp->cap->sblk->csc_blk.len)) {
750+ !pipe->sspp->cap->sblk->csc_blk.len) {
749751 DPU_DEBUG_PLANE(pdpu,
750− "plane doesn't have scaler/csc for yuv\n");
752+ "plane doesn't have csc for yuv\n");
751753 return -EINVAL;
752754 }
753755
@@ -864,6 +866,10 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, · 110 unmodified lines
864866
865867 max_linewidth = pdpu->catalog->caps->max_linewidth;
866868
869+ drm_rect_rotate(&pipe_cfg->src_rect,
870+ new_plane_state->fb->width, new_plane_state->fb->height,
871+ new_plane_state->rotation);
872+
867873 if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) ||
868874 _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_clk_rate) {
869875 /*
@@ -913,6 +919,14 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, · 43 unmodified lines
913919 r_pipe_cfg->dst_rect.x1 = pipe_cfg->dst_rect.x2;
914920 }
915921
922+ drm_rect_rotate_inv(&pipe_cfg->src_rect,
923+ new_plane_state->fb->width, new_plane_state->fb->height,
924+ new_plane_state->rotation);
925+ if (r_pipe->sspp)
926+ drm_rect_rotate_inv(&r_pipe_cfg->src_rect,
927+ new_plane_state->fb->width, new_plane_state->fb->height,
928+ new_plane_state->rotation);
929+
916930 ret = dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, &crtc_state->adjusted_mode);
917931 if (ret)
918932 return ret;
drivers/gpu/drm/msm/dp/dp_ctrl.c+2−0
@@ -1286,6 +1286,8 @@ static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, · 1285 unmodified lines
12861286 link_info.rate = ctrl->link->link_params.rate;
12871287 link_info.capabilities = DP_LINK_CAP_ENHANCED_FRAMING;
12881288
1289+ dp_link_reset_phy_params_vx_px(ctrl->link);
1290+
12891291 dp_aux_link_configure(ctrl->aux, &link_info);
12901292
12911293 if (drm_dp_max_downspread(dpcd))
drivers/gpu/drm/msm/dp/dp_panel.c+10−9
@@ -90,22 +90,22 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel) · 89 unmodified lines
9090 static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
9191 u32 mode_edid_bpp, u32 mode_pclk_khz)
9292 {
93− struct dp_link_info *link_info;
93+ const struct dp_link_info *link_info;
9494 const u32 max_supported_bpp = 30, min_supported_bpp = 18;
95− u32 bpp = 0, data_rate_khz = 0;
95+ u32 bpp, data_rate_khz;
9696
97− bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
97+ bpp = min(mode_edid_bpp, max_supported_bpp);
9898
9999 link_info = &dp_panel->link_info;
100100 data_rate_khz = link_info->num_lanes * link_info->rate * 8;
101101
102− while (bpp > min_supported_bpp) {
102+ do {
103103 if (mode_pclk_khz * bpp <= data_rate_khz)
104− break;
104+ return bpp;
105105 bpp -= 6;
106− }
106+ } while (bpp > min_supported_bpp);
107107
108− return bpp;
108+ return min_supported_bpp;
109109 }
110110
111111 int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
@@ -423,8 +423,9 @@ int dp_panel_init_panel_info(struct dp_panel *dp_panel) · 311 unmodified lines
423423 drm_mode->clock);
424424 drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp);
425425
426− dp_panel->dp_mode.bpp = max_t(u32, 18,
427− min_t(u32, dp_panel->dp_mode.bpp, 30));
426+ dp_panel->dp_mode.bpp = dp_panel_get_mode_bpp(dp_panel, dp_panel->dp_mode.bpp,
427+ dp_panel->dp_mode.drm_mode.clock);
428+
428429 drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",
429430 dp_panel->dp_mode.bpp);
430431
drivers/gpu/drm/msm/msm_mdss.c+1−1
@@ -577,7 +577,7 @@ static const struct msm_mdss_data sc7180_data = { · 576 unmodified lines
577577 .ubwc_enc_version = UBWC_2_0,
578578 .ubwc_dec_version = UBWC_2_0,
579579 .ubwc_static = 0x1e,
580− .highest_bank_bit = 0x3,
580+ .highest_bank_bit = 0x1,
581581 .reg_bus_bw = 76800,
582582 };
583583
drivers/gpu/drm/nouveau/nouveau_bo.c+1−1
@@ -898,7 +898,7 @@ nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, · 897 unmodified lines
898898 * Without this the operation can timeout and we'll fallback to a
899899 * software copy, which might take several minutes to finish.
900900 */
901− nouveau_fence_wait(fence, false);
901+ nouveau_fence_wait(fence, false, false);
902902 ret = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, false,
903903 new_reg);
904904 nouveau_fence_unref(&fence);
drivers/gpu/drm/nouveau/nouveau_chan.c+1−1
@@ -72,7 +72,7 @@ nouveau_channel_idle(struct nouveau_channel *chan) · 71 unmodified lines
7272
7373 ret = nouveau_fence_new(&fence, chan);
7474 if (!ret) {
75− ret = nouveau_fence_wait(fence, false);
75+ ret = nouveau_fence_wait(fence, false, false);
7676 nouveau_fence_unref(&fence);
7777 }
7878
drivers/gpu/drm/nouveau/nouveau_dmem.c+1−1
@@ -128,7 +128,7 @@ static void nouveau_dmem_page_free(struct page *page) · 127 unmodified lines
128128 static void nouveau_dmem_fence_done(struct nouveau_fence **fence)
129129 {
130130 if (fence) {
131− nouveau_fence_wait(*fence, false);
131+ nouveau_fence_wait(*fence, true, false);
132132 nouveau_fence_unref(fence);
133133 } else {
134134 /*
drivers/gpu/drm/nouveau/nouveau_fence.c+29−1
@@ -311,11 +311,39 @@ nouveau_fence_wait_legacy(struct dma_fence *f, bool intr, long wait) · 310 unmodified lines
311311 return timeout - t;
312312 }
313313
314+static int
315+nouveau_fence_wait_busy(struct nouveau_fence *fence, bool intr)
316+{
317+ int ret = 0;
318+
319+ while (!nouveau_fence_done(fence)) {
320+ if (time_after_eq(jiffies, fence->timeout)) {
321+ ret = -EBUSY;
322+ break;
323+ }
324+
325+ __set_current_state(intr ?
326+ TASK_INTERRUPTIBLE :
327+ TASK_UNINTERRUPTIBLE);
328+
329+ if (intr && signal_pending(current)) {
330+ ret = -ERESTARTSYS;
331+ break;
332+ }
333+ }
334+
335+ __set_current_state(TASK_RUNNING);
336+ return ret;
337+}
338+
314339 int
315−nouveau_fence_wait(struct nouveau_fence *fence, bool intr)
340+nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr)
316341 {
317342 long ret;
318343
344+ if (!lazy)
345+ return nouveau_fence_wait_busy(fence, intr);
346+
319347 ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ);
320348 if (ret < 0)
321349 return ret;
drivers/gpu/drm/nouveau/nouveau_fence.h+1−1
@@ -23,7 +23,7 @@ void nouveau_fence_unref(struct nouveau_fence **); · 22 unmodified lines
2323
2424 int nouveau_fence_emit(struct nouveau_fence *);
2525 bool nouveau_fence_done(struct nouveau_fence *);
26−int nouveau_fence_wait(struct nouveau_fence *, bool intr);
26+int nouveau_fence_wait(struct nouveau_fence *, bool lazy, bool intr);
2727 int nouveau_fence_sync(struct nouveau_bo *, struct nouveau_channel *, bool exclusive, bool intr);
2828
2929 struct nouveau_fence_chan {
drivers/gpu/drm/nouveau/nouveau_gem.c+1−1
@@ -928,7 +928,7 @@ revalidate: · 927 unmodified lines
928928 }
929929
930930 if (sync) {
931− if (!(ret = nouveau_fence_wait(fence, false))) {
931+ if (!(ret = nouveau_fence_wait(fence, false, false))) {
932932 if ((ret = dma_fence_get_status(&fence->base)) == 1)
933933 ret = 0;
934934 }
drivers/gpu/drm/nouveau/nouveau_prime.c+2−1
@@ -64,7 +64,8 @@ struct drm_gem_object *nouveau_gem_prime_import_sg_table(struct drm_device *dev, · 63 unmodified lines
6464 * to the caller, instead of a normal nouveau_bo ttm reference. */
6565 ret = drm_gem_object_init(dev, &nvbo->bo.base, size);
6666 if (ret) {
67− nouveau_bo_ref(NULL, &nvbo);
67+ drm_gem_object_release(&nvbo->bo.base);
68+ kfree(nvbo);
6869 obj = ERR_PTR(-ENOMEM);
6970 goto unlock;
7071 }
drivers/gpu/drm/nouveau/nouveau_uvmm.c+1−0
@@ -1803,6 +1803,7 @@ nouveau_uvmm_bo_validate(struct drm_gpuvm_bo *vm_bo, struct drm_exec *exec) · 1802 unmodified lines
18031803 {
18041804 struct nouveau_bo *nvbo = nouveau_gem_object(vm_bo->obj);
18051805
1806+ nouveau_bo_placement_set(nvbo, nvbo->valid_domains, 0);
18061807 return nouveau_bo_validate(nvbo, true, false);
18071808 }
18081809
drivers/gpu/drm/nouveau/nvkm/core/firmware.c+6−3
@@ -205,7 +205,8 @@ nvkm_firmware_dtor(struct nvkm_firmware *fw) · 204 unmodified lines
205205 break;
206206 case NVKM_FIRMWARE_IMG_DMA:
207207 nvkm_memory_unref(&memory);
208− dma_free_coherent(fw->device->dev, sg_dma_len(&fw->mem.sgl), fw->img, fw->phys);
208+ dma_free_noncoherent(fw->device->dev, sg_dma_len(&fw->mem.sgl),
209+ fw->img, fw->phys, DMA_TO_DEVICE);
209210 break;
210211 case NVKM_FIRMWARE_IMG_SGT:
211212 nvkm_memory_unref(&memory);
@@ -236,10 +237,12 @@ nvkm_firmware_ctor(const struct nvkm_firmware_func *func, const char *name, · 24 unmodified lines
236237 break;
237238 case NVKM_FIRMWARE_IMG_DMA: {
238239 dma_addr_t addr;
239−
240240 len = ALIGN(fw->len, PAGE_SIZE);
241241
242− fw->img = dma_alloc_coherent(fw->device->dev, len, &addr, GFP_KERNEL);
242+ fw->img = dma_alloc_noncoherent(fw->device->dev,
243+ len, &addr,
244+ DMA_TO_DEVICE,
245+ GFP_KERNEL);
243246 if (fw->img) {
244247 memcpy(fw->img, src, fw->len);
245248 fw->phys = addr;
drivers/gpu/drm/nouveau/nvkm/falcon/fw.c+6−0
@@ -89,6 +89,12 @@ nvkm_falcon_fw_boot(struct nvkm_falcon_fw *fw, struct nvkm_subdev *user, · 88 unmodified lines
8989 nvkm_falcon_fw_dtor_sigs(fw);
9090 }
9191
92+ /* after last write to the img, sync dma mappings */
93+ dma_sync_single_for_device(fw->fw.device->dev,
94+ fw->fw.phys,
95+ sg_dma_len(&fw->fw.mem.sgl),
96+ DMA_TO_DEVICE);
97+
9298 FLCNFW_DBG(fw, "resetting");
9399 fw->func->reset(fw);
94100
drivers/gpu/drm/omapdrm/Kconfig+1−0
@@ -1,6 +1,7 @@
11 # SPDX-License-Identifier: GPL-2.0-only
22 config DRM_OMAP
33 tristate "OMAP DRM"
4+ depends on MMU
45 depends on DRM && OF
56 depends on ARCH_OMAP2PLUS || (COMPILE_TEST && PAGE_SIZE_LESS_THAN_64KB)
67 select DRM_KMS_HELPER
drivers/gpu/drm/radeon/evergreen_cs.c+2−0
@@ -33,8 +33,10 @@ · 32 unmodified lines
3333 #include "evergreen_reg_safe.h"
3434 #include "cayman_reg_safe.h"
3535
36+#ifndef MIN
3637 #define MAX(a, b) (((a) > (b)) ? (a) : (b))
3738 #define MIN(a, b) (((a) < (b)) ? (a) : (b))
39+#endif
3840
3941 #define REG_SAFE_BM_SIZE ARRAY_SIZE(evergreen_reg_safe_bm)
4042
drivers/gpu/drm/rockchip/inno_hdmi.c+1−3
@@ -279,7 +279,6 @@ static int inno_hdmi_upload_frame(struct drm_connector *connector, · 278 unmodified lines
279279 const u8 *buffer, size_t len)
280280 {
281281 struct inno_hdmi *hdmi = connector_to_inno_hdmi(connector);
282− u8 packed_frame[HDMI_MAXIMUM_INFO_FRAME_SIZE];
283282 ssize_t i;
284283
285284 if (type != HDMI_INFOFRAME_TYPE_AVI) {
@@ -291,8 +290,7 @@ static int inno_hdmi_upload_frame(struct drm_connector *connector, · 5 unmodified lines
291290 inno_hdmi_disable_frame(connector, type);
292291
293292 for (i = 0; i < len; i++)
294− hdmi_writeb(hdmi, HDMI_CONTROL_PACKET_ADDR + i,
295− packed_frame[i]);
293+ hdmi_writeb(hdmi, HDMI_CONTROL_PACKET_ADDR + i, buffer[i]);
296294
297295 return 0;
298296 }
drivers/gpu/drm/tests/drm_gem_shmem_test.c+11−0
@@ -102,6 +102,17 @@ static void drm_gem_shmem_test_obj_create_private(struct kunit *test) · 101 unmodified lines
102102
103103 sg_init_one(sgt->sgl, buf, TEST_SIZE);
104104
105+ /*
106+ * Set the DMA mask to 64-bits and map the sgtables
107+ * otherwise drm_gem_shmem_free will cause a warning
108+ * on debug kernels.
109+ */
110+ ret = dma_set_mask(drm_dev->dev, DMA_BIT_MASK(64));
111+ KUNIT_ASSERT_EQ(test, ret, 0);
112+
113+ ret = dma_map_sgtable(drm_dev->dev, sgt, DMA_BIDIRECTIONAL, 0);
114+ KUNIT_ASSERT_EQ(test, ret, 0);
115+
105116 /* Init a mock DMA-BUF */
106117 buf_mock.size = TEST_SIZE;
107118 attach_mock.dmabuf = &buf_mock;
drivers/gpu/drm/v3d/v3d_drv.h+4−0
@@ -565,6 +565,10 @@ void v3d_mmu_insert_ptes(struct v3d_bo *bo); · 564 unmodified lines
565565 void v3d_mmu_remove_ptes(struct v3d_bo *bo);
566566
567567 /* v3d_sched.c */
568+void v3d_timestamp_query_info_free(struct v3d_timestamp_query_info *query_info,
569+ unsigned int count);
570+void v3d_performance_query_info_free(struct v3d_performance_query_info *query_info,
571+ unsigned int count);
568572 void v3d_job_update_stats(struct v3d_job *job, enum v3d_queue queue);
569573 int v3d_sched_init(struct v3d_dev *v3d);
570574 void v3d_sched_fini(struct v3d_dev *v3d);
drivers/gpu/drm/v3d/v3d_sched.c+49−15
@@ -73,24 +73,44 @@ v3d_sched_job_free(struct drm_sched_job *sched_job) · 72 unmodified lines
7373 v3d_job_cleanup(job);
7474 }
7575
76+void
77+v3d_timestamp_query_info_free(struct v3d_timestamp_query_info *query_info,
78+ unsigned int count)
79+{
80+ if (query_info->queries) {
81+ unsigned int i;
82+
83+ for (i = 0; i < count; i++)
84+ drm_syncobj_put(query_info->queries[i].syncobj);
85+
86+ kvfree(query_info->queries);
87+ }
88+}
89+
90+void
91+v3d_performance_query_info_free(struct v3d_performance_query_info *query_info,
92+ unsigned int count)
93+{
94+ if (query_info->queries) {
95+ unsigned int i;
96+
97+ for (i = 0; i < count; i++)
98+ drm_syncobj_put(query_info->queries[i].syncobj);
99+
100+ kvfree(query_info->queries);
101+ }
102+}
103+
76104 static void
77105 v3d_cpu_job_free(struct drm_sched_job *sched_job)
78106 {
79107 struct v3d_cpu_job *job = to_cpu_job(sched_job);
80− struct v3d_timestamp_query_info *timestamp_query = &job->timestamp_query;
81− struct v3d_performance_query_info *performance_query = &job->performance_query;
82108
83− if (timestamp_query->queries) {
84− for (int i = 0; i < timestamp_query->count; i++)
85− drm_syncobj_put(timestamp_query->queries[i].syncobj);
86− kvfree(timestamp_query->queries);
87− }
109+ v3d_timestamp_query_info_free(&job->timestamp_query,
110+ job->timestamp_query.count);
88111
89− if (performance_query->queries) {
90− for (int i = 0; i < performance_query->count; i++)
91− drm_syncobj_put(performance_query->queries[i].syncobj);
92− kvfree(performance_query->queries);
93− }
112+ v3d_performance_query_info_free(&job->performance_query,
113+ job->performance_query.count);
94114
95115 v3d_job_cleanup(&job->base);
96116 }
@@ -114,6 +134,8 @@ v3d_job_start_stats(struct v3d_job *job, enum v3d_queue queue) · 17 unmodified lines
114134 struct v3d_stats *local_stats = &file->stats[queue];
115135 u64 now = local_clock();
116136
137+ preempt_disable();
138+
117139 write_seqcount_begin(&local_stats->lock);
118140 local_stats->start_ns = now;
119141 write_seqcount_end(&local_stats->lock);
@@ -121,6 +143,8 @@ v3d_job_start_stats(struct v3d_job *job, enum v3d_queue queue) · 1 unmodified line
121143 write_seqcount_begin(&global_stats->lock);
122144 global_stats->start_ns = now;
123145 write_seqcount_end(&global_stats->lock);
146+
147+ preempt_enable();
124148 }
125149
126150 static void
@@ -142,8 +166,10 @@ v3d_job_update_stats(struct v3d_job *job, enum v3d_queue queue) · 15 unmodified lines
142166 struct v3d_stats *local_stats = &file->stats[queue];
143167 u64 now = local_clock();
144168
169+ preempt_disable();
145170 v3d_stats_update(local_stats, now);
146171 v3d_stats_update(global_stats, now);
172+ preempt_enable();
147173 }
148174
149175 static struct dma_fence *v3d_bin_job_run(struct drm_sched_job *sched_job)
@@ -295,7 +321,7 @@ v3d_csd_job_run(struct drm_sched_job *sched_job) · 145 unmodified lines
295321 struct v3d_dev *v3d = job->base.v3d;
296322 struct drm_device *dev = &v3d->drm;
297323 struct dma_fence *fence;
298− int i, csd_cfg0_reg, csd_cfg_reg_count;
324+ int i, csd_cfg0_reg;
299325
300326 v3d->csd_job = job;
301327
@@ -315,9 +341,17 @@ v3d_csd_job_run(struct drm_sched_job *sched_job) · 13 unmodified lines
315341 v3d_switch_perfmon(v3d, &job->base);
316342
317343 csd_cfg0_reg = V3D_CSD_QUEUED_CFG0(v3d->ver);
318− csd_cfg_reg_count = v3d->ver < 71 ? 6 : 7;
319− for (i = 1; i <= csd_cfg_reg_count; i++)
344+ for (i = 1; i <= 6; i++)
320345 V3D_CORE_WRITE(0, csd_cfg0_reg + 4 * i, job->args.cfg[i]);
346+
347+ /* Although V3D 7.1 has an eighth configuration register, we are not
348+ * using it. Therefore, make sure it remains unused.
349+ *
350+ * XXX: Set the CFG7 register
351+ */
352+ if (v3d->ver >= 71)
353+ V3D_CORE_WRITE(0, V3D_V7_CSD_QUEUED_CFG7, 0);
354+
321355 /* CFG0 write kicks off the job. */
322356 V3D_CORE_WRITE(0, csd_cfg0_reg, job->args.cfg[0]);
323357
drivers/gpu/drm/v3d/v3d_submit.c+88−33
@@ -452,6 +452,8 @@ v3d_get_cpu_timestamp_query_params(struct drm_file *file_priv, · 451 unmodified lines
452452 {
453453 u32 __user *offsets, *syncs;
454454 struct drm_v3d_timestamp_query timestamp;
455+ unsigned int i;
456+ int err;
455457
456458 if (!job) {
457459 DRM_DEBUG("CPU job extension was attached to a GPU job.\n");
@@ -480,26 +482,34 @@ v3d_get_cpu_timestamp_query_params(struct drm_file *file_priv, · 22 unmodified lines
480482 offsets = u64_to_user_ptr(timestamp.offsets);
481483 syncs = u64_to_user_ptr(timestamp.syncs);
482484
483− for (int i = 0; i < timestamp.count; i++) {
485+ for (i = 0; i < timestamp.count; i++) {
484486 u32 offset, sync;
485487
486488 if (copy_from_user(&offset, offsets++, sizeof(offset))) {
487− kvfree(job->timestamp_query.queries);
488− return -EFAULT;
489+ err = -EFAULT;
490+ goto error;
489491 }
490492
491493 job->timestamp_query.queries[i].offset = offset;
492494
493495 if (copy_from_user(&sync, syncs++, sizeof(sync))) {
494− kvfree(job->timestamp_query.queries);
495− return -EFAULT;
496+ err = -EFAULT;
497+ goto error;
496498 }
497499
498500 job->timestamp_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
501+ if (!job->timestamp_query.queries[i].syncobj) {
502+ err = -ENOENT;
503+ goto error;
504+ }
499505 }
500506 job->timestamp_query.count = timestamp.count;
501507
502508 return 0;
509+
510+error:
511+ v3d_timestamp_query_info_free(&job->timestamp_query, i);
512+ return err;
503513 }
504514
505515 static int
@@ -509,6 +519,8 @@ v3d_get_cpu_reset_timestamp_params(struct drm_file *file_priv, · 3 unmodified lines
509519 {
510520 u32 __user *syncs;
511521 struct drm_v3d_reset_timestamp_query reset;
522+ unsigned int i;
523+ int err;
512524
513525 if (!job) {
514526 DRM_DEBUG("CPU job extension was attached to a GPU job.\n");
@@ -533,21 +545,29 @@ v3d_get_cpu_reset_timestamp_params(struct drm_file *file_priv, · 18 unmodified lines
533545
534546 syncs = u64_to_user_ptr(reset.syncs);
535547
536− for (int i = 0; i < reset.count; i++) {
548+ for (i = 0; i < reset.count; i++) {
537549 u32 sync;
538550
539551 job->timestamp_query.queries[i].offset = reset.offset + 8 * i;
540552
541553 if (copy_from_user(&sync, syncs++, sizeof(sync))) {
542− kvfree(job->timestamp_query.queries);
543− return -EFAULT;
554+ err = -EFAULT;
555+ goto error;
544556 }
545557
546558 job->timestamp_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
559+ if (!job->timestamp_query.queries[i].syncobj) {
560+ err = -ENOENT;
561+ goto error;
562+ }
547563 }
548564 job->timestamp_query.count = reset.count;
549565
550566 return 0;
567+
568+error:
569+ v3d_timestamp_query_info_free(&job->timestamp_query, i);
570+ return err;
551571 }
552572
553573 /* Get data for the copy timestamp query results job submission. */
@@ -558,7 +578,8 @@ v3d_get_cpu_copy_query_results_params(struct drm_file *file_priv, · 4 unmodified lines
558578 {
559579 u32 __user *offsets, *syncs;
560580 struct drm_v3d_copy_timestamp_query copy;
561− int i;
581+ unsigned int i;
582+ int err;
562583
563584 if (!job) {
564585 DRM_DEBUG("CPU job extension was attached to a GPU job.\n");
@@ -591,18 +612,22 @@ v3d_get_cpu_copy_query_results_params(struct drm_file *file_priv, · 26 unmodified lines
591612 u32 offset, sync;
592613
593614 if (copy_from_user(&offset, offsets++, sizeof(offset))) {
594− kvfree(job->timestamp_query.queries);
595− return -EFAULT;
615+ err = -EFAULT;
616+ goto error;
596617 }
597618
598619 job->timestamp_query.queries[i].offset = offset;
599620
600621 if (copy_from_user(&sync, syncs++, sizeof(sync))) {
601− kvfree(job->timestamp_query.queries);
602− return -EFAULT;
622+ err = -EFAULT;
623+ goto error;
603624 }
604625
605626 job->timestamp_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
627+ if (!job->timestamp_query.queries[i].syncobj) {
628+ err = -ENOENT;
629+ goto error;
630+ }
606631 }
607632 job->timestamp_query.count = copy.count;
608633
@@ -613,6 +638,10 @@ v3d_get_cpu_copy_query_results_params(struct drm_file *file_priv, · 4 unmodified lines
613638 job->copy.stride = copy.stride;
614639
615640 return 0;
641+
642+error:
643+ v3d_timestamp_query_info_free(&job->timestamp_query, i);
644+ return err;
616645 }
617646
618647 static int
@@ -623,6 +652,8 @@ v3d_get_cpu_reset_performance_params(struct drm_file *file_priv, · 4 unmodified lines
623652 u32 __user *syncs;
624653 u64 __user *kperfmon_ids;
625654 struct drm_v3d_reset_performance_query reset;
655+ unsigned int i, j;
656+ int err;
626657
627658 if (!job) {
628659 DRM_DEBUG("CPU job extension was attached to a GPU job.\n");
@@ -637,6 +668,9 @@ v3d_get_cpu_reset_performance_params(struct drm_file *file_priv, · 8 unmodified lines
637668 if (copy_from_user(&reset, ext, sizeof(reset)))
638669 return -EFAULT;
639670
671+ if (reset.nperfmons > V3D_MAX_PERFMONS)
672+ return -EINVAL;
673+
640674 job->job_type = V3D_CPU_JOB_TYPE_RESET_PERFORMANCE_QUERY;
641675
642676 job->performance_query.queries = kvmalloc_array(reset.count,
@@ -648,39 +682,47 @@ v3d_get_cpu_reset_performance_params(struct drm_file *file_priv, · 5 unmodified lines
648682 syncs = u64_to_user_ptr(reset.syncs);
649683 kperfmon_ids = u64_to_user_ptr(reset.kperfmon_ids);
650684
651− for (int i = 0; i < reset.count; i++) {
685+ for (i = 0; i < reset.count; i++) {
652686 u32 sync;
653687 u64 ids;
654688 u32 __user *ids_pointer;
655689 u32 id;
656690
657691 if (copy_from_user(&sync, syncs++, sizeof(sync))) {
658− kvfree(job->performance_query.queries);
659− return -EFAULT;
692+ err = -EFAULT;
693+ goto error;
660694 }
661695
662− job->performance_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
663−
664696 if (copy_from_user(&ids, kperfmon_ids++, sizeof(ids))) {
665− kvfree(job->performance_query.queries);
666− return -EFAULT;
697+ err = -EFAULT;
698+ goto error;
667699 }
668700
669701 ids_pointer = u64_to_user_ptr(ids);
670702
671− for (int j = 0; j < reset.nperfmons; j++) {
703+ for (j = 0; j < reset.nperfmons; j++) {
672704 if (copy_from_user(&id, ids_pointer++, sizeof(id))) {
673− kvfree(job->performance_query.queries);
674− return -EFAULT;
705+ err = -EFAULT;
706+ goto error;
675707 }
676708
677709 job->performance_query.queries[i].kperfmon_ids[j] = id;
678710 }
711+
712+ job->performance_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
713+ if (!job->performance_query.queries[i].syncobj) {
714+ err = -ENOENT;
715+ goto error;
716+ }
679717 }
680718 job->performance_query.count = reset.count;
681719 job->performance_query.nperfmons = reset.nperfmons;
682720
683721 return 0;
722+
723+error:
724+ v3d_performance_query_info_free(&job->performance_query, i);
725+ return err;
684726 }
685727
686728 static int
@@ -691,6 +733,8 @@ v3d_get_cpu_copy_performance_query_params(struct drm_file *file_priv, · 4 unmodified lines
691733 u32 __user *syncs;
692734 u64 __user *kperfmon_ids;
693735 struct drm_v3d_copy_performance_query copy;
736+ unsigned int i, j;
737+ int err;
694738
695739 if (!job) {
696740 DRM_DEBUG("CPU job extension was attached to a GPU job.\n");
@@ -708,6 +752,9 @@ v3d_get_cpu_copy_performance_query_params(struct drm_file *file_priv, · 11 unmodified lines
708752 if (copy.pad)
709753 return -EINVAL;
710754
755+ if (copy.nperfmons > V3D_MAX_PERFMONS)
756+ return -EINVAL;
757+
711758 job->job_type = V3D_CPU_JOB_TYPE_COPY_PERFORMANCE_QUERY;
712759
713760 job->performance_query.queries = kvmalloc_array(copy.count,
@@ -719,34 +766,38 @@ v3d_get_cpu_copy_performance_query_params(struct drm_file *file_priv, · 5 unmodified lines
719766 syncs = u64_to_user_ptr(copy.syncs);
720767 kperfmon_ids = u64_to_user_ptr(copy.kperfmon_ids);
721768
722− for (int i = 0; i < copy.count; i++) {
769+ for (i = 0; i < copy.count; i++) {
723770 u32 sync;
724771 u64 ids;
725772 u32 __user *ids_pointer;
726773 u32 id;
727774
728775 if (copy_from_user(&sync, syncs++, sizeof(sync))) {
729− kvfree(job->performance_query.queries);
730− return -EFAULT;
776+ err = -EFAULT;
777+ goto error;
731778 }
732779
733− job->performance_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
734−
735780 if (copy_from_user(&ids, kperfmon_ids++, sizeof(ids))) {
736− kvfree(job->performance_query.queries);
737− return -EFAULT;
781+ err = -EFAULT;
782+ goto error;
738783 }
739784
740785 ids_pointer = u64_to_user_ptr(ids);
741786
742− for (int j = 0; j < copy.nperfmons; j++) {
787+ for (j = 0; j < copy.nperfmons; j++) {
743788 if (copy_from_user(&id, ids_pointer++, sizeof(id))) {
744− kvfree(job->performance_query.queries);
745− return -EFAULT;
789+ err = -EFAULT;
790+ goto error;
746791 }
747792
748793 job->performance_query.queries[i].kperfmon_ids[j] = id;
749794 }
795+
796+ job->performance_query.queries[i].syncobj = drm_syncobj_find(file_priv, sync);
797+ if (!job->performance_query.queries[i].syncobj) {
798+ err = -ENOENT;
799+ goto error;
800+ }
750801 }
751802 job->performance_query.count = copy.count;
752803 job->performance_query.nperfmons = copy.nperfmons;
@@ -759,6 +810,10 @@ v3d_get_cpu_copy_performance_query_params(struct drm_file *file_priv, · 6 unmodified lines
759810 job->copy.stride = copy.stride;
760811
761812 return 0;
813+
814+error:
815+ v3d_performance_query_info_free(&job->performance_query, i);
816+ return err;
762817 }
763818
764819 /* Whenever userspace sets ioctl extensions, v3d_get_extensions parses data
drivers/gpu/drm/virtio/virtgpu_submit.c+1−1
@@ -48,7 +48,7 @@ struct virtio_gpu_submit { · 47 unmodified lines
4848 static int virtio_gpu_do_fence_wait(struct virtio_gpu_submit *submit,
4949 struct dma_fence *in_fence)
5050 {
51− u32 context = submit->fence_ctx + submit->ring_idx;
51+ u64 context = submit->fence_ctx + submit->ring_idx;
5252
5353 if (dma_fence_match_context(in_fence, context))
5454 return 0;
drivers/gpu/drm/vmwgfx/vmw_surface_cache.h+8−2
@@ -1,6 +1,8 @@
1+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
12 /**********************************************************
2− * Copyright 2021 VMware, Inc.
3− * SPDX-License-Identifier: GPL-2.0 OR MIT
3+ *
4+ * Copyright (c) 2021-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
46 *
57 * Permission is hereby granted, free of charge, to any person
68 * obtaining a copy of this software and associated documentation
@@ -31,6 +33,10 @@ · 24 unmodified lines
3133
3234 #include <drm/vmwgfx_drm.h>
3335
36+#define SVGA3D_FLAGS_UPPER_32(svga3d_flags) ((svga3d_flags) >> 32)
37+#define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
38+ ((svga3d_flags) & ((uint64_t)U32_MAX))
39+
3440 static inline u32 clamped_umul32(u32 a, u32 b)
3541 {
3642 uint64_t tmp = (uint64_t) a*b;
drivers/gpu/drm/vmwgfx/vmwgfx_blit.c+110−4
@@ -27,6 +27,8 @@ · 26 unmodified lines
2727 **************************************************************************/
2828
2929 #include "vmwgfx_drv.h"
30+
31+#include "vmwgfx_bo.h"
3032 #include <linux/highmem.h>
3133
3234 /*
@@ -420,13 +422,105 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d, · 387 unmodified lines
420422 return 0;
421423 }
422424
425+static void *map_external(struct vmw_bo *bo, struct iosys_map *map)
426+{
427+ struct vmw_private *vmw =
428+ container_of(bo->tbo.bdev, struct vmw_private, bdev);
429+ void *ptr = NULL;
430+ int ret;
431+
432+ if (bo->tbo.base.import_attach) {
433+ ret = dma_buf_vmap(bo->tbo.base.dma_buf, map);
434+ if (ret) {
435+ drm_dbg_driver(&vmw->drm,
436+ "Wasn't able to map external bo!\n");
437+ goto out;
438+ }
439+ ptr = map->vaddr;
440+ } else {
441+ ptr = vmw_bo_map_and_cache(bo);
442+ }
443+
444+out:
445+ return ptr;
446+}
447+
448+static void unmap_external(struct vmw_bo *bo, struct iosys_map *map)
449+{
450+ if (bo->tbo.base.import_attach)
451+ dma_buf_vunmap(bo->tbo.base.dma_buf, map);
452+ else
453+ vmw_bo_unmap(bo);
454+}
455+
456+static int vmw_external_bo_copy(struct vmw_bo *dst, u32 dst_offset,
457+ u32 dst_stride, struct vmw_bo *src,
458+ u32 src_offset, u32 src_stride,
459+ u32 width_in_bytes, u32 height,
460+ struct vmw_diff_cpy *diff)
461+{
462+ struct vmw_private *vmw =
463+ container_of(dst->tbo.bdev, struct vmw_private, bdev);
464+ size_t dst_size = dst->tbo.resource->size;
465+ size_t src_size = src->tbo.resource->size;
466+ struct iosys_map dst_map = {0};
467+ struct iosys_map src_map = {0};
468+ int ret, i;
469+ int x_in_bytes;
470+ u8 *vsrc;
471+ u8 *vdst;
472+
473+ vsrc = map_external(src, &src_map);
474+ if (!vsrc) {
475+ drm_dbg_driver(&vmw->drm, "Wasn't able to map src\n");
476+ ret = -ENOMEM;
477+ goto out;
478+ }
479+
480+ vdst = map_external(dst, &dst_map);
481+ if (!vdst) {
482+ drm_dbg_driver(&vmw->drm, "Wasn't able to map dst\n");
483+ ret = -ENOMEM;
484+ goto out;
485+ }
486+
487+ vsrc += src_offset;
488+ vdst += dst_offset;
489+ if (src_stride == dst_stride) {
490+ dst_size -= dst_offset;
491+ src_size -= src_offset;
492+ memcpy(vdst, vsrc,
493+ min(dst_stride * height, min(dst_size, src_size)));
494+ } else {
495+ WARN_ON(dst_stride < width_in_bytes);
496+ for (i = 0; i < height; ++i) {
497+ memcpy(vdst, vsrc, width_in_bytes);
498+ vsrc += src_stride;
499+ vdst += dst_stride;
500+ }
501+ }
502+
503+ x_in_bytes = (dst_offset % dst_stride);
504+ diff->rect.x1 = x_in_bytes / diff->cpp;
505+ diff->rect.y1 = ((dst_offset - x_in_bytes) / dst_stride);
506+ diff->rect.x2 = diff->rect.x1 + width_in_bytes / diff->cpp;
507+ diff->rect.y2 = diff->rect.y1 + height;
508+
509+ ret = 0;
510+out:
511+ unmap_external(src, &src_map);
512+ unmap_external(dst, &dst_map);
513+
514+ return ret;
515+}
516+
423517 /**
424518 * vmw_bo_cpu_blit - in-kernel cpu blit.
425519 *
426− * @dst: Destination buffer object.
520+ * @vmw_dst: Destination buffer object.
427521 * @dst_offset: Destination offset of blit start in bytes.
428522 * @dst_stride: Destination stride in bytes.
429− * @src: Source buffer object.
523+ * @vmw_src: Source buffer object.
430524 * @src_offset: Source offset of blit start in bytes.
431525 * @src_stride: Source stride in bytes.
432526 * @w: Width of blit.
@@ -444,13 +538,15 @@ static int vmw_bo_cpu_blit_line(struct vmw_bo_blit_line_data *d, · 11 unmodified lines
444538 * Neither of the buffer objects may be placed in PCI memory
445539 * (Fixed memory in TTM terminology) when using this function.
446540 */
447−int vmw_bo_cpu_blit(struct ttm_buffer_object *dst,
541+int vmw_bo_cpu_blit(struct vmw_bo *vmw_dst,
448542 u32 dst_offset, u32 dst_stride,
449− struct ttm_buffer_object *src,
543+ struct vmw_bo *vmw_src,
450544 u32 src_offset, u32 src_stride,
451545 u32 w, u32 h,
452546 struct vmw_diff_cpy *diff)
453547 {
548+ struct ttm_buffer_object *src = &vmw_src->tbo;
549+ struct ttm_buffer_object *dst = &vmw_dst->tbo;
454550 struct ttm_operation_ctx ctx = {
455551 .interruptible = false,
456552 .no_wait_gpu = false
@@ -460,6 +556,11 @@ int vmw_bo_cpu_blit(struct ttm_buffer_object *dst, · 3 unmodified lines
460556 int ret = 0;
461557 struct page **dst_pages = NULL;
462558 struct page **src_pages = NULL;
559+ bool src_external = (src->ttm->page_flags & TTM_TT_FLAG_EXTERNAL) != 0;
560+ bool dst_external = (dst->ttm->page_flags & TTM_TT_FLAG_EXTERNAL) != 0;
561+
562+ if (WARN_ON(dst == src))
563+ return -EINVAL;
463564
464565 /* Buffer objects need to be either pinned or reserved: */
465566 if (!(dst->pin_count))
@@ -479,6 +580,11 @@ int vmw_bo_cpu_blit(struct ttm_buffer_object *dst, · 13 unmodified lines
479580 return ret;
480581 }
481582
583+ if (src_external || dst_external)
584+ return vmw_external_bo_copy(vmw_dst, dst_offset, dst_stride,
585+ vmw_src, src_offset, src_stride,
586+ w, h, diff);
587+
482588 if (!src->ttm->pages && src->ttm->sg) {
483589 src_pages = kvmalloc_array(src->ttm->num_pages,
484590 sizeof(struct page *), GFP_KERNEL);
drivers/gpu/drm/vmwgfx/vmwgfx_bo.c+87−53
@@ -1,8 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright © 2011-2023 VMware, Inc., Palo Alto, CA., USA
5− * All Rights Reserved.
4+ * Copyright (c) 2011-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
66 *
77 * Permission is hereby granted, free of charge, to any person obtaining a
88 * copy of this software and associated documentation files (the
@@ -28,15 +28,39 @@ · 19 unmodified lines
2828
2929 #include "vmwgfx_bo.h"
3030 #include "vmwgfx_drv.h"
31−
31+#include "vmwgfx_resource_priv.h"
3232
3333 #include <drm/ttm/ttm_placement.h>
3434
3535 static void vmw_bo_release(struct vmw_bo *vbo)
3636 {
37+ struct vmw_resource *res;
38+
3739 WARN_ON(vbo->tbo.base.funcs &&
3840 kref_read(&vbo->tbo.base.refcount) != 0);
3941 vmw_bo_unmap(vbo);
42+
43+ xa_destroy(&vbo->detached_resources);
44+ WARN_ON(vbo->is_dumb && !vbo->dumb_surface);
45+ if (vbo->is_dumb && vbo->dumb_surface) {
46+ res = &vbo->dumb_surface->res;
47+ WARN_ON(vbo != res->guest_memory_bo);
48+ WARN_ON(!res->guest_memory_bo);
49+ if (res->guest_memory_bo) {
50+ /* Reserve and switch the backing mob. */
51+ mutex_lock(&res->dev_priv->cmdbuf_mutex);
52+ (void)vmw_resource_reserve(res, false, true);
53+ vmw_resource_mob_detach(res);
54+ if (res->coherent)
55+ vmw_bo_dirty_release(res->guest_memory_bo);
56+ res->guest_memory_bo = NULL;
57+ res->guest_memory_offset = 0;
58+ vmw_resource_unreserve(res, false, false, false, NULL,
59+ 0);
60+ mutex_unlock(&res->dev_priv->cmdbuf_mutex);
61+ }
62+ vmw_surface_unreference(&vbo->dumb_surface);
63+ }
4064 drm_gem_object_release(&vbo->tbo.base);
4165 }
4266
@@ -325,19 +349,27 @@ void vmw_bo_pin_reserved(struct vmw_bo *vbo, bool pin) · 282 unmodified lines
325349 *
326350 */
327351 void *vmw_bo_map_and_cache(struct vmw_bo *vbo)
352+{
353+ return vmw_bo_map_and_cache_size(vbo, vbo->tbo.base.size);
354+}
355+
356+void *vmw_bo_map_and_cache_size(struct vmw_bo *vbo, size_t size)
328357 {
329358 struct ttm_buffer_object *bo = &vbo->tbo;
330359 bool not_used;
331360 void *virtual;
332361 int ret;
333362
363+ atomic_inc(&vbo->map_count);
364+
334365 virtual = ttm_kmap_obj_virtual(&vbo->map, &not_used);
335366 if (virtual)
336367 return virtual;
337368
338− ret = ttm_bo_kmap(bo, 0, PFN_UP(bo->base.size), &vbo->map);
369+ ret = ttm_bo_kmap(bo, 0, PFN_UP(size), &vbo->map);
339370 if (ret)
340− DRM_ERROR("Buffer object map failed: %d.\n", ret);
371+ DRM_ERROR("Buffer object map failed: %d (size: bo = %zu, map = %zu).\n",
372+ ret, bo->base.size, size);
341373
342374 return ttm_kmap_obj_virtual(&vbo->map, &not_used);
343375 }
@@ -353,11 +385,17 @@ void *vmw_bo_map_and_cache(struct vmw_bo *vbo) · 9 unmodified lines
353385 */
354386 void vmw_bo_unmap(struct vmw_bo *vbo)
355387 {
388+ int map_count;
389+
356390 if (vbo->map.bo == NULL)
357391 return;
358392
359− ttm_bo_kunmap(&vbo->map);
360− vbo->map.bo = NULL;
393+ map_count = atomic_dec_return(&vbo->map_count);
394+
395+ if (!map_count) {
396+ ttm_bo_kunmap(&vbo->map);
397+ vbo->map.bo = NULL;
398+ }
361399 }
362400
363401
@@ -390,6 +428,8 @@ static int vmw_bo_init(struct vmw_private *dev_priv, · 26 unmodified lines
390428 BUILD_BUG_ON(TTM_MAX_BO_PRIORITY <= 3);
391429 vmw_bo->tbo.priority = 3;
392430 vmw_bo->res_tree = RB_ROOT;
431+ xa_init(&vmw_bo->detached_resources);
432+ atomic_set(&vmw_bo->map_count, 0);
393433
394434 params->size = ALIGN(params->size, PAGE_SIZE);
395435 drm_gem_private_object_init(vdev, &vmw_bo->tbo.base, params->size);
@@ -654,52 +694,6 @@ void vmw_bo_fence_single(struct ttm_buffer_object *bo, · 258 unmodified lines
654694 dma_fence_put(&fence->base);
655695 }
656696
657−
658−/**
659− * vmw_dumb_create - Create a dumb kms buffer
660− *
661− * @file_priv: Pointer to a struct drm_file identifying the caller.
662− * @dev: Pointer to the drm device.
663− * @args: Pointer to a struct drm_mode_create_dumb structure
664− * Return: Zero on success, negative error code on failure.
665− *
666− * This is a driver callback for the core drm create_dumb functionality.
667− * Note that this is very similar to the vmw_bo_alloc ioctl, except
668− * that the arguments have a different format.
669− */
670−int vmw_dumb_create(struct drm_file *file_priv,
671− struct drm_device *dev,
672− struct drm_mode_create_dumb *args)
673−{
674− struct vmw_private *dev_priv = vmw_priv(dev);
675− struct vmw_bo *vbo;
676− int cpp = DIV_ROUND_UP(args->bpp, 8);
677− int ret;
678−
679− switch (cpp) {
680− case 1: /* DRM_FORMAT_C8 */
681− case 2: /* DRM_FORMAT_RGB565 */
682− case 4: /* DRM_FORMAT_XRGB8888 */
683− break;
684− default:
685− /*
686− * Dumb buffers don't allow anything else.
687− * This is tested via IGT's dumb_buffers
688− */
689− return -EINVAL;
690− }
691−
692− args->pitch = args->width * cpp;
693− args->size = ALIGN(args->pitch * args->height, PAGE_SIZE);
694−
695− ret = vmw_gem_object_create_with_handle(dev_priv, file_priv,
696− args->size, &args->handle,
697− &vbo);
698− /* drop reference from allocate - handle holds it now */
699− drm_gem_object_put(&vbo->tbo.base);
700− return ret;
701−}
702−
703697 /**
704698 * vmw_bo_swap_notify - swapout notify callback.
705699 *
@@ -853,3 +847,43 @@ void vmw_bo_placement_set_default_accelerated(struct vmw_bo *bo) · 147 unmodified lines
853847
854848 vmw_bo_placement_set(bo, domain, domain);
855849 }
850+
851+void vmw_bo_add_detached_resource(struct vmw_bo *vbo, struct vmw_resource *res)
852+{
853+ xa_store(&vbo->detached_resources, (unsigned long)res, res, GFP_KERNEL);
854+}
855+
856+void vmw_bo_del_detached_resource(struct vmw_bo *vbo, struct vmw_resource *res)
857+{
858+ xa_erase(&vbo->detached_resources, (unsigned long)res);
859+}
860+
861+struct vmw_surface *vmw_bo_surface(struct vmw_bo *vbo)
862+{
863+ unsigned long index;
864+ struct vmw_resource *res = NULL;
865+ struct vmw_surface *surf = NULL;
866+ struct rb_node *rb_itr = vbo->res_tree.rb_node;
867+
868+ if (vbo->is_dumb && vbo->dumb_surface) {
869+ res = &vbo->dumb_surface->res;
870+ goto out;
871+ }
872+
873+ xa_for_each(&vbo->detached_resources, index, res) {
874+ if (res->func->res_type == vmw_res_surface)
875+ goto out;
876+ }
877+
878+ for (rb_itr = rb_first(&vbo->res_tree); rb_itr;
879+ rb_itr = rb_next(rb_itr)) {
880+ res = rb_entry(rb_itr, struct vmw_resource, mob_node);
881+ if (res->func->res_type == vmw_res_surface)
882+ goto out;
883+ }
884+
885+out:
886+ if (res)
887+ surf = vmw_res_to_srf(res);
888+ return surf;
889+}
drivers/gpu/drm/vmwgfx/vmwgfx_bo.h+17−1
@@ -1,7 +1,8 @@
11 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
22 /**************************************************************************
33 *
4− * Copyright 2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2023-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -35,11 +36,13 @@ · 27 unmodified lines
3536
3637 #include <linux/rbtree_types.h>
3738 #include <linux/types.h>
39+#include <linux/xarray.h>
3840
3941 struct vmw_bo_dirty;
4042 struct vmw_fence_obj;
4143 struct vmw_private;
4244 struct vmw_resource;
45+struct vmw_surface;
4346
4447 enum vmw_bo_domain {
4548 VMW_BO_DOMAIN_SYS = BIT(0),
@@ -68,6 +71,8 @@ struct vmw_bo_params { · 22 unmodified lines
6871 * @map: Kmap object for semi-persistent mappings
6972 * @res_tree: RB tree of resources using this buffer object as a backing MOB
7073 * @res_prios: Eviction priority counts for attached resources
74+ * @map_count: The number of currently active maps. Will differ from the
75+ * cpu_writers because it includes kernel maps.
7176 * @cpu_writers: Number of synccpu write grabs. Protected by reservation when
7277 * increased. May be decreased without reservation.
7378 * @dx_query_ctx: DX context if this buffer object is used as a DX query MOB
@@ -85,11 +90,16 @@ struct vmw_bo { · 11 unmodified lines
8590
8691 struct rb_root res_tree;
8792 u32 res_prios[TTM_MAX_BO_PRIORITY];
93+ struct xarray detached_resources;
8894
95+ atomic_t map_count;
8996 atomic_t cpu_writers;
9097 /* Not ref-counted. Protected by binding_mutex */
9198 struct vmw_resource *dx_query_ctx;
9299 struct vmw_bo_dirty *dirty;
100+
101+ bool is_dumb;
102+ struct vmw_surface *dumb_surface;
93103 };
94104
95105 void vmw_bo_placement_set(struct vmw_bo *bo, u32 domain, u32 busy_domain);
@@ -124,15 +134,21 @@ void vmw_bo_fence_single(struct ttm_buffer_object *bo, · 28 unmodified lines
124134 struct vmw_fence_obj *fence);
125135
126136 void *vmw_bo_map_and_cache(struct vmw_bo *vbo);
137+void *vmw_bo_map_and_cache_size(struct vmw_bo *vbo, size_t size);
127138 void vmw_bo_unmap(struct vmw_bo *vbo);
128139
129140 void vmw_bo_move_notify(struct ttm_buffer_object *bo,
130141 struct ttm_resource *mem);
131142 void vmw_bo_swap_notify(struct ttm_buffer_object *bo);
132143
144+void vmw_bo_add_detached_resource(struct vmw_bo *vbo, struct vmw_resource *res);
145+void vmw_bo_del_detached_resource(struct vmw_bo *vbo, struct vmw_resource *res);
146+struct vmw_surface *vmw_bo_surface(struct vmw_bo *vbo);
147+
133148 int vmw_user_bo_lookup(struct drm_file *filp,
134149 u32 handle,
135150 struct vmw_bo **out);
151+
136152 /**
137153 * vmw_bo_adjust_prio - Adjust the buffer object eviction priority
138154 * according to attached resources
drivers/gpu/drm/vmwgfx/vmwgfx_drv.h+33−11
@@ -1,7 +1,8 @@
11 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
22 /**************************************************************************
33 *
4− * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -762,6 +763,26 @@ extern int vmw_gmr_bind(struct vmw_private *dev_priv, · 754 unmodified lines
762763 int gmr_id);
763764 extern void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id);
764765
766+/**
767+ * User handles
768+ */
769+struct vmw_user_object {
770+ struct vmw_surface *surface;
771+ struct vmw_bo *buffer;
772+};
773+
774+int vmw_user_object_lookup(struct vmw_private *dev_priv, struct drm_file *filp,
775+ u32 handle, struct vmw_user_object *uo);
776+struct vmw_user_object *vmw_user_object_ref(struct vmw_user_object *uo);
777+void vmw_user_object_unref(struct vmw_user_object *uo);
778+bool vmw_user_object_is_null(struct vmw_user_object *uo);
779+struct vmw_surface *vmw_user_object_surface(struct vmw_user_object *uo);
780+struct vmw_bo *vmw_user_object_buffer(struct vmw_user_object *uo);
781+void *vmw_user_object_map(struct vmw_user_object *uo);
782+void *vmw_user_object_map_size(struct vmw_user_object *uo, size_t size);
783+void vmw_user_object_unmap(struct vmw_user_object *uo);
784+bool vmw_user_object_is_mapped(struct vmw_user_object *uo);
785+
765786 /**
766787 * Resource utilities - vmwgfx_resource.c
767788 */
@@ -776,11 +797,6 @@ extern int vmw_resource_validate(struct vmw_resource *res, bool intr, · 8 unmodified lines
776797 extern int vmw_resource_reserve(struct vmw_resource *res, bool interruptible,
777798 bool no_backup);
778799 extern bool vmw_resource_needs_backup(const struct vmw_resource *res);
779−extern int vmw_user_lookup_handle(struct vmw_private *dev_priv,
780− struct drm_file *filp,
781− uint32_t handle,
782− struct vmw_surface **out_surf,
783− struct vmw_bo **out_buf);
784800 extern int vmw_user_resource_lookup_handle(
785801 struct vmw_private *dev_priv,
786802 struct ttm_object_file *tfile,
@@ -1057,9 +1073,6 @@ int vmw_kms_suspend(struct drm_device *dev); · 270 unmodified lines
10571073 int vmw_kms_resume(struct drm_device *dev);
10581074 void vmw_kms_lost_device(struct drm_device *dev);
10591075
1060−int vmw_dumb_create(struct drm_file *file_priv,
1061− struct drm_device *dev,
1062− struct drm_mode_create_dumb *args);
10631076 extern int vmw_resource_pin(struct vmw_resource *res, bool interruptible);
10641077 extern void vmw_resource_unpin(struct vmw_resource *res);
10651078 extern enum vmw_res_type vmw_res_type(const struct vmw_resource *res);
@@ -1176,6 +1189,15 @@ extern int vmw_gb_surface_reference_ext_ioctl(struct drm_device *dev, · 110 unmodified lines
11761189 int vmw_gb_surface_define(struct vmw_private *dev_priv,
11771190 const struct vmw_surface_metadata *req,
11781191 struct vmw_surface **srf_out);
1192+struct vmw_surface *vmw_lookup_surface_for_buffer(struct vmw_private *vmw,
1193+ struct vmw_bo *bo,
1194+ u32 handle);
1195+u32 vmw_lookup_surface_handle_for_buffer(struct vmw_private *vmw,
1196+ struct vmw_bo *bo,
1197+ u32 handle);
1198+int vmw_dumb_create(struct drm_file *file_priv,
1199+ struct drm_device *dev,
1200+ struct drm_mode_create_dumb *args);
11791201
11801202 /*
11811203 * Shader management - vmwgfx_shader.c
@@ -1331,9 +1353,9 @@ void vmw_diff_memcpy(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src, · 149 unmodified lines
13311353
13321354 void vmw_memcpy(struct vmw_diff_cpy *diff, u8 *dest, const u8 *src, size_t n);
13331355
1334−int vmw_bo_cpu_blit(struct ttm_buffer_object *dst,
1356+int vmw_bo_cpu_blit(struct vmw_bo *dst,
13351357 u32 dst_offset, u32 dst_stride,
1336− struct ttm_buffer_object *src,
1358+ struct vmw_bo *src,
13371359 u32 src_offset, u32 src_stride,
13381360 u32 w, u32 h,
13391361 struct vmw_diff_cpy *diff);
drivers/gpu/drm/vmwgfx/vmwgfx_fence.c+7−10
@@ -32,7 +32,6 @@ · 31 unmodified lines
3232 #define VMW_FENCE_WRAP (1 << 31)
3333
3434 struct vmw_fence_manager {
35− int num_fence_objects;
3635 struct vmw_private *dev_priv;
3736 spinlock_t lock;
3837 struct list_head fence_list;
@@ -124,13 +123,13 @@ static void vmw_fence_obj_destroy(struct dma_fence *f) · 85 unmodified lines
124123 {
125124 struct vmw_fence_obj *fence =
126125 container_of(f, struct vmw_fence_obj, base);
127−
128126 struct vmw_fence_manager *fman = fman_from_fence(fence);
129127
130− spin_lock(&fman->lock);
131− list_del_init(&fence->head);
132− --fman->num_fence_objects;
133− spin_unlock(&fman->lock);
128+ if (!list_empty(&fence->head)) {
129+ spin_lock(&fman->lock);
130+ list_del_init(&fence->head);
131+ spin_unlock(&fman->lock);
132+ }
134133 fence->destroy(fence);
135134 }
136135
@@ -257,7 +256,6 @@ static const struct dma_fence_ops vmw_fence_ops = { · 120 unmodified lines
257256 .release = vmw_fence_obj_destroy,
258257 };
259258
260−
261259 /*
262260 * Execute signal actions on fences recently signaled.
263261 * This is done from a workqueue so we don't have to execute
@@ -355,7 +353,6 @@ static int vmw_fence_obj_init(struct vmw_fence_manager *fman, · 91 unmodified lines
355353 goto out_unlock;
356354 }
357355 list_add_tail(&fence->head, &fman->fence_list);
358− ++fman->num_fence_objects;
359356
360357 out_unlock:
361358 spin_unlock(&fman->lock);
@@ -403,7 +400,7 @@ static bool vmw_fence_goal_new_locked(struct vmw_fence_manager *fman, · 41 unmodified lines
403400 u32 passed_seqno)
404401 {
405402 u32 goal_seqno;
406− struct vmw_fence_obj *fence;
403+ struct vmw_fence_obj *fence, *next_fence;
407404
408405 if (likely(!fman->seqno_valid))
409406 return false;
@@ -413,7 +410,7 @@ static bool vmw_fence_goal_new_locked(struct vmw_fence_manager *fman, · 3 unmodified lines
413410 return false;
414411
415412 fman->seqno_valid = false;
416− list_for_each_entry(fence, &fman->fence_list, head) {
413+ list_for_each_entry_safe(fence, next_fence, &fman->fence_list, head) {
417414 if (!list_empty(&fence->seq_passed_actions)) {
418415 fman->seqno_valid = true;
419416 vmw_fence_goal_write(fman->dev_priv,
drivers/gpu/drm/vmwgfx/vmwgfx_gem.c+58−4
@@ -1,6 +1,7 @@
11 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
22 /*
3− * Copyright 2021-2023 VMware, Inc.
3+ * Copyright (c) 2021-2024 Broadcom. All Rights Reserved. The term
4+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
45 *
56 * Permission is hereby granted, free of charge, to any person
67 * obtaining a copy of this software and associated documentation
@@ -78,6 +79,59 @@ static struct sg_table *vmw_gem_object_get_sg_table(struct drm_gem_object *obj) · 71 unmodified lines
7879 return drm_prime_pages_to_sg(obj->dev, vmw_tt->dma_ttm.pages, vmw_tt->dma_ttm.num_pages);
7980 }
8081
82+static int vmw_gem_vmap(struct drm_gem_object *obj, struct iosys_map *map)
83+{
84+ struct ttm_buffer_object *bo = drm_gem_ttm_of_gem(obj);
85+ int ret;
86+
87+ if (obj->import_attach) {
88+ ret = dma_buf_vmap(obj->import_attach->dmabuf, map);
89+ if (!ret) {
90+ if (drm_WARN_ON(obj->dev, map->is_iomem)) {
91+ dma_buf_vunmap(obj->import_attach->dmabuf, map);
92+ return -EIO;
93+ }
94+ }
95+ } else {
96+ ret = ttm_bo_vmap(bo, map);
97+ }
98+
99+ return ret;
100+}
101+
102+static void vmw_gem_vunmap(struct drm_gem_object *obj, struct iosys_map *map)
103+{
104+ if (obj->import_attach)
105+ dma_buf_vunmap(obj->import_attach->dmabuf, map);
106+ else
107+ drm_gem_ttm_vunmap(obj, map);
108+}
109+
110+static int vmw_gem_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
111+{
112+ int ret;
113+
114+ if (obj->import_attach) {
115+ /*
116+ * Reset both vm_ops and vm_private_data, so we don't end up with
117+ * vm_ops pointing to our implementation if the dma-buf backend
118+ * doesn't set those fields.
119+ */
120+ vma->vm_private_data = NULL;
121+ vma->vm_ops = NULL;
122+
123+ ret = dma_buf_mmap(obj->dma_buf, vma, 0);
124+
125+ /* Drop the reference drm_gem_mmap_obj() acquired.*/
126+ if (!ret)
127+ drm_gem_object_put(obj);
128+
129+ return ret;
130+ }
131+
132+ return drm_gem_ttm_mmap(obj, vma);
133+}
134+
81135 static const struct vm_operations_struct vmw_vm_ops = {
82136 .pfn_mkwrite = vmw_bo_vm_mkwrite,
83137 .page_mkwrite = vmw_bo_vm_mkwrite,
@@ -94,9 +148,9 @@ static const struct drm_gem_object_funcs vmw_gem_object_funcs = { · 10 unmodified lines
94148 .pin = vmw_gem_object_pin,
95149 .unpin = vmw_gem_object_unpin,
96150 .get_sg_table = vmw_gem_object_get_sg_table,
97− .vmap = drm_gem_ttm_vmap,
98− .vunmap = drm_gem_ttm_vunmap,
99− .mmap = drm_gem_ttm_mmap,
151+ .vmap = vmw_gem_vmap,
152+ .vunmap = vmw_gem_vunmap,
153+ .mmap = vmw_gem_mmap,
100154 .vm_ops = &vmw_vm_ops,
101155 };
102156
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c+203−299
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -193,13 +194,16 @@ static u32 vmw_du_cursor_mob_size(u32 w, u32 h) · 185 unmodified lines
193194 */
194195 static u32 *vmw_du_cursor_plane_acquire_image(struct vmw_plane_state *vps)
195196 {
196− if (vps->surf) {
197− if (vps->surf_mapped)
198− return vmw_bo_map_and_cache(vps->surf->res.guest_memory_bo);
199− return vps->surf->snooper.image;
200− } else if (vps->bo)
201− return vmw_bo_map_and_cache(vps->bo);
202− return NULL;
197+ struct vmw_surface *surf;
198+
199+ if (vmw_user_object_is_null(&vps->uo))
200+ return NULL;
201+
202+ surf = vmw_user_object_surface(&vps->uo);
203+ if (surf && !vmw_user_object_is_mapped(&vps->uo))
204+ return surf->snooper.image;
205+
206+ return vmw_user_object_map(&vps->uo);
203207 }
204208
205209 static bool vmw_du_cursor_plane_has_changed(struct vmw_plane_state *old_vps,
@@ -536,22 +540,16 @@ void vmw_du_primary_plane_destroy(struct drm_plane *plane) · 330 unmodified lines
536540 * vmw_du_plane_unpin_surf - unpins resource associated with a framebuffer surface
537541 *
538542 * @vps: plane state associated with the display surface
539− * @unreference: true if we also want to unreference the display.
540543 */
541−void vmw_du_plane_unpin_surf(struct vmw_plane_state *vps,
542− bool unreference)
544+void vmw_du_plane_unpin_surf(struct vmw_plane_state *vps)
543545 {
544− if (vps->surf) {
546+ struct vmw_surface *surf = vmw_user_object_surface(&vps->uo);
547+
548+ if (surf) {
545549 if (vps->pinned) {
546− vmw_resource_unpin(&vps->surf->res);
550+ vmw_resource_unpin(&surf->res);
547551 vps->pinned--;
548552 }
549−
550− if (unreference) {
551− if (vps->pinned)
552− DRM_ERROR("Surface still pinned\n");
553− vmw_surface_unreference(&vps->surf);
554− }
555553 }
556554 }
557555
@@ -572,7 +570,7 @@ vmw_du_plane_cleanup_fb(struct drm_plane *plane, · 14 unmodified lines
572570 {
573571 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
574572
575− vmw_du_plane_unpin_surf(vps, false);
573+ vmw_du_plane_unpin_surf(vps);
576574 }
577575
578576
@@ -661,25 +659,14 @@ vmw_du_cursor_plane_cleanup_fb(struct drm_plane *plane, · 82 unmodified lines
661659 struct vmw_cursor_plane *vcp = vmw_plane_to_vcp(plane);
662660 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
663661
664− if (vps->surf_mapped) {
665− vmw_bo_unmap(vps->surf->res.guest_memory_bo);
666− vps->surf_mapped = false;
667− }
662+ if (!vmw_user_object_is_null(&vps->uo))
663+ vmw_user_object_unmap(&vps->uo);
668664
669665 vmw_du_cursor_plane_unmap_cm(vps);
670666 vmw_du_put_cursor_mob(vcp, vps);
671667
672− vmw_du_plane_unpin_surf(vps, false);
673−
674− if (vps->surf) {
675− vmw_surface_unreference(&vps->surf);
676− vps->surf = NULL;
677− }
678−
679− if (vps->bo) {
680− vmw_bo_unreference(&vps->bo);
681− vps->bo = NULL;
682− }
668+ vmw_du_plane_unpin_surf(vps);
669+ vmw_user_object_unref(&vps->uo);
683670 }
684671
685672
@@ -698,64 +685,48 @@ vmw_du_cursor_plane_prepare_fb(struct drm_plane *plane, · 12 unmodified lines
698685 struct drm_framebuffer *fb = new_state->fb;
699686 struct vmw_cursor_plane *vcp = vmw_plane_to_vcp(plane);
700687 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
688+ struct vmw_bo *bo = NULL;
701689 int ret = 0;
702690
703− if (vps->surf) {
704− if (vps->surf_mapped) {
705− vmw_bo_unmap(vps->surf->res.guest_memory_bo);
706− vps->surf_mapped = false;
707− }
708− vmw_surface_unreference(&vps->surf);
709− vps->surf = NULL;
710− }
711−
712− if (vps->bo) {
713− vmw_bo_unreference(&vps->bo);
714− vps->bo = NULL;
691+ if (!vmw_user_object_is_null(&vps->uo)) {
692+ vmw_user_object_unmap(&vps->uo);
693+ vmw_user_object_unref(&vps->uo);
715694 }
716695
717696 if (fb) {
718697 if (vmw_framebuffer_to_vfb(fb)->bo) {
719− vps->bo = vmw_framebuffer_to_vfbd(fb)->buffer;
720− vmw_bo_reference(vps->bo);
698+ vps->uo.buffer = vmw_framebuffer_to_vfbd(fb)->buffer;
699+ vps->uo.surface = NULL;
721700 } else {
722− vps->surf = vmw_framebuffer_to_vfbs(fb)->surface;
723− vmw_surface_reference(vps->surf);
701+ memcpy(&vps->uo, &vmw_framebuffer_to_vfbs(fb)->uo, sizeof(vps->uo));
724702 }
703+ vmw_user_object_ref(&vps->uo);
725704 }
726705
727− if (!vps->surf && vps->bo) {
728− const u32 size = new_state->crtc_w * new_state->crtc_h * sizeof(u32);
706+ bo = vmw_user_object_buffer(&vps->uo);
707+ if (bo) {
708+ struct ttm_operation_ctx ctx = {false, false};
729709
730− /*
731− * Not using vmw_bo_map_and_cache() helper here as we need to
732− * reserve the ttm_buffer_object first which
733− * vmw_bo_map_and_cache() omits.
734− */
735− ret = ttm_bo_reserve(&vps->bo->tbo, true, false, NULL);
736−
737− if (unlikely(ret != 0))
710+ ret = ttm_bo_reserve(&bo->tbo, true, false, NULL);
711+ if (ret != 0)
738712 return -ENOMEM;
739713
740− ret = ttm_bo_kmap(&vps->bo->tbo, 0, PFN_UP(size), &vps->bo->map);
741−
742− ttm_bo_unreserve(&vps->bo->tbo);
743−
744− if (unlikely(ret != 0))
714+ ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
715+ if (ret != 0)
745716 return -ENOMEM;
746− } else if (vps->surf && !vps->bo && vps->surf->res.guest_memory_bo) {
747717
748− WARN_ON(vps->surf->snooper.image);
749− ret = ttm_bo_reserve(&vps->surf->res.guest_memory_bo->tbo, true, false,
750− NULL);
751− if (unlikely(ret != 0))
752− return -ENOMEM;
753− vmw_bo_map_and_cache(vps->surf->res.guest_memory_bo);
754− ttm_bo_unreserve(&vps->surf->res.guest_memory_bo->tbo);
755− vps->surf_mapped = true;
718+ vmw_bo_pin_reserved(bo, true);
719+ if (vmw_framebuffer_to_vfb(fb)->bo) {
720+ const u32 size = new_state->crtc_w * new_state->crtc_h * sizeof(u32);
721+
722+ (void)vmw_bo_map_and_cache_size(bo, size);
723+ } else {
724+ vmw_bo_map_and_cache(bo);
725+ }
726+ ttm_bo_unreserve(&bo->tbo);
756727 }
757728
758− if (vps->surf || vps->bo) {
729+ if (!vmw_user_object_is_null(&vps->uo)) {
759730 vmw_du_get_cursor_mob(vcp, vps);
760731 vmw_du_cursor_plane_map_cm(vps);
761732 }
@@ -777,14 +748,17 @@ vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, · 15 unmodified lines
777748 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
778749 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
779750 struct vmw_plane_state *old_vps = vmw_plane_state_to_vps(old_state);
751+ struct vmw_bo *old_bo = NULL;
752+ struct vmw_bo *new_bo = NULL;
780753 s32 hotspot_x, hotspot_y;
754+ int ret;
781755
782756 hotspot_x = du->hotspot_x + new_state->hotspot_x;
783757 hotspot_y = du->hotspot_y + new_state->hotspot_y;
784758
785− du->cursor_surface = vps->surf;
759+ du->cursor_surface = vmw_user_object_surface(&vps->uo);
786760
787− if (!vps->surf && !vps->bo) {
761+ if (vmw_user_object_is_null(&vps->uo)) {
788762 vmw_cursor_update_position(dev_priv, false, 0, 0);
789763 return;
790764 }
@@ -792,10 +766,26 @@ vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, · 1 unmodified line
792766 vps->cursor.hotspot_x = hotspot_x;
793767 vps->cursor.hotspot_y = hotspot_y;
794768
795− if (vps->surf) {
769+ if (du->cursor_surface)
796770 du->cursor_age = du->cursor_surface->snooper.age;
771+
772+ if (!vmw_user_object_is_null(&old_vps->uo)) {
773+ old_bo = vmw_user_object_buffer(&old_vps->uo);
774+ ret = ttm_bo_reserve(&old_bo->tbo, false, false, NULL);
775+ if (ret != 0)
776+ return;
797777 }
798778
779+ if (!vmw_user_object_is_null(&vps->uo)) {
780+ new_bo = vmw_user_object_buffer(&vps->uo);
781+ if (old_bo != new_bo) {
782+ ret = ttm_bo_reserve(&new_bo->tbo, false, false, NULL);
783+ if (ret != 0)
784+ return;
785+ } else {
786+ new_bo = NULL;
787+ }
788+ }
799789 if (!vmw_du_cursor_plane_has_changed(old_vps, vps)) {
800790 /*
801791 * If it hasn't changed, avoid making the device do extra
@@ -813,6 +803,11 @@ vmw_du_cursor_plane_atomic_update(struct drm_plane *plane, · 11 unmodified lines
813803 hotspot_x, hotspot_y);
814804 }
815805
806+ if (old_bo)
807+ ttm_bo_unreserve(&old_bo->tbo);
808+ if (new_bo)
809+ ttm_bo_unreserve(&new_bo->tbo);
810+
816811 du->cursor_x = new_state->crtc_x + du->set_gui_x;
817812 du->cursor_y = new_state->crtc_y + du->set_gui_y;
818813
@@ -913,7 +908,7 @@ int vmw_du_cursor_plane_atomic_check(struct drm_plane *plane, · 94 unmodified lines
913908 }
914909
915910 if (!vmw_framebuffer_to_vfb(fb)->bo) {
916− surface = vmw_framebuffer_to_vfbs(fb)->surface;
911+ surface = vmw_user_object_surface(&vmw_framebuffer_to_vfbs(fb)->uo);
917912
918913 WARN_ON(!surface);
919914
@@ -1074,12 +1069,7 @@ vmw_du_plane_duplicate_state(struct drm_plane *plane) · 154 unmodified lines
10741069 memset(&vps->cursor, 0, sizeof(vps->cursor));
10751070
10761071 /* Each ref counted resource needs to be acquired again */
1077− if (vps->surf)
1078− (void) vmw_surface_reference(vps->surf);
1079−
1080− if (vps->bo)
1081− (void) vmw_bo_reference(vps->bo);
1082−
1072+ vmw_user_object_ref(&vps->uo);
10831073 state = &vps->base;
10841074
10851075 __drm_atomic_helper_plane_duplicate_state(plane, state);
@@ -1128,11 +1118,7 @@ vmw_du_plane_destroy_state(struct drm_plane *plane, · 42 unmodified lines
11281118 struct vmw_plane_state *vps = vmw_plane_state_to_vps(state);
11291119
11301120 /* Should have been freed by cleanup_fb */
1131− if (vps->surf)
1132− vmw_surface_unreference(&vps->surf);
1133−
1134− if (vps->bo)
1135− vmw_bo_unreference(&vps->bo);
1121+ vmw_user_object_unref(&vps->uo);
11361122
11371123 drm_atomic_helper_plane_destroy_state(plane, state);
11381124 }
@@ -1227,7 +1213,7 @@ static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer) · 88 unmodified lines
12271213 vmw_framebuffer_to_vfbs(framebuffer);
12281214
12291215 drm_framebuffer_cleanup(framebuffer);
1230− vmw_surface_unreference(&vfbs->surface);
1216+ vmw_user_object_unref(&vfbs->uo);
12311217
12321218 kfree(vfbs);
12331219 }
@@ -1272,29 +1258,41 @@ int vmw_kms_readback(struct vmw_private *dev_priv, · 38 unmodified lines
12721258 return -ENOSYS;
12731259 }
12741260
1261+static int vmw_framebuffer_surface_create_handle(struct drm_framebuffer *fb,
1262+ struct drm_file *file_priv,
1263+ unsigned int *handle)
1264+{
1265+ struct vmw_framebuffer_surface *vfbs = vmw_framebuffer_to_vfbs(fb);
1266+ struct vmw_bo *bo = vmw_user_object_buffer(&vfbs->uo);
1267+
1268+ return drm_gem_handle_create(file_priv, &bo->tbo.base, handle);
1269+}
12751270
12761271 static const struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
1272+ .create_handle = vmw_framebuffer_surface_create_handle,
12771273 .destroy = vmw_framebuffer_surface_destroy,
12781274 .dirty = drm_atomic_helper_dirtyfb,
12791275 };
12801276
12811277 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
1282− struct vmw_surface *surface,
1278+ struct vmw_user_object *uo,
12831279 struct vmw_framebuffer **out,
12841280 const struct drm_mode_fb_cmd2
1285− *mode_cmd,
1286− bool is_bo_proxy)
1281+ *mode_cmd)
12871282
12881283 {
12891284 struct drm_device *dev = &dev_priv->drm;
12901285 struct vmw_framebuffer_surface *vfbs;
12911286 enum SVGA3dSurfaceFormat format;
1287+ struct vmw_surface *surface;
12921288 int ret;
12931289
12941290 /* 3D is only supported on HWv8 and newer hosts */
12951291 if (dev_priv->active_display_unit == vmw_du_legacy)
12961292 return -ENOSYS;
12971293
1294+ surface = vmw_user_object_surface(uo);
1295+
12981296 /*
12991297 * Sanity checks.
13001298 */
@@ -1357,8 +1355,8 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, · 56 unmodified lines
13571355 }
13581356
13591357 drm_helper_mode_fill_fb_struct(dev, &vfbs->base.base, mode_cmd);
1360− vfbs->surface = vmw_surface_reference(surface);
1361− vfbs->is_bo_proxy = is_bo_proxy;
1358+ memcpy(&vfbs->uo, uo, sizeof(vfbs->uo));
1359+ vmw_user_object_ref(&vfbs->uo);
13621360
13631361 *out = &vfbs->base;
13641362
@@ -1370,7 +1368,7 @@ static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv, · 5 unmodified lines
13701368 return 0;
13711369
13721370 out_err2:
1373− vmw_surface_unreference(&surface);
1371+ vmw_user_object_unref(&vfbs->uo);
13741372 kfree(vfbs);
13751373 out_err1:
13761374 return ret;
@@ -1386,7 +1384,6 @@ static int vmw_framebuffer_bo_create_handle(struct drm_framebuffer *fb, · 9 unmodified lines
13861384 {
13871385 struct vmw_framebuffer_bo *vfbd =
13881386 vmw_framebuffer_to_vfbd(fb);
1389−
13901387 return drm_gem_handle_create(file_priv, &vfbd->buffer->tbo.base, handle);
13911388 }
13921389
@@ -1407,86 +1404,6 @@ static const struct drm_framebuffer_funcs vmw_framebuffer_bo_funcs = { · 14 unmodified lines
14071404 .dirty = drm_atomic_helper_dirtyfb,
14081405 };
14091406
1410−/**
1411− * vmw_create_bo_proxy - create a proxy surface for the buffer object
1412− *
1413− * @dev: DRM device
1414− * @mode_cmd: parameters for the new surface
1415− * @bo_mob: MOB backing the buffer object
1416− * @srf_out: newly created surface
1417− *
1418− * When the content FB is a buffer object, we create a surface as a proxy to the
1419− * same buffer. This way we can do a surface copy rather than a surface DMA.
1420− * This is a more efficient approach
1421− *
1422− * RETURNS:
1423− * 0 on success, error code otherwise
1424− */
1425−static int vmw_create_bo_proxy(struct drm_device *dev,
1426− const struct drm_mode_fb_cmd2 *mode_cmd,
1427− struct vmw_bo *bo_mob,
1428− struct vmw_surface **srf_out)
1429−{
1430− struct vmw_surface_metadata metadata = {0};
1431− uint32_t format;
1432− struct vmw_resource *res;
1433− unsigned int bytes_pp;
1434− int ret;
1435−
1436− switch (mode_cmd->pixel_format) {
1437− case DRM_FORMAT_ARGB8888:
1438− case DRM_FORMAT_XRGB8888:
1439− format = SVGA3D_X8R8G8B8;
1440− bytes_pp = 4;
1441− break;
1442−
1443− case DRM_FORMAT_RGB565:
1444− case DRM_FORMAT_XRGB1555:
1445− format = SVGA3D_R5G6B5;
1446− bytes_pp = 2;
1447− break;
1448−
1449− case 8:
1450− format = SVGA3D_P8;
1451− bytes_pp = 1;
1452− break;
1453−
1454− default:
1455− DRM_ERROR("Invalid framebuffer format %p4cc\n",
1456− &mode_cmd->pixel_format);
1457− return -EINVAL;
1458− }
1459−
1460− metadata.format = format;
1461− metadata.mip_levels[0] = 1;
1462− metadata.num_sizes = 1;
1463− metadata.base_size.width = mode_cmd->pitches[0] / bytes_pp;
1464− metadata.base_size.height = mode_cmd->height;
1465− metadata.base_size.depth = 1;
1466− metadata.scanout = true;
1467−
1468− ret = vmw_gb_surface_define(vmw_priv(dev), &metadata, srf_out);
1469− if (ret) {
1470− DRM_ERROR("Failed to allocate proxy content buffer\n");
1471− return ret;
1472− }
1473−
1474− res = &(*srf_out)->res;
1475−
1476− /* Reserve and switch the backing mob. */
1477− mutex_lock(&res->dev_priv->cmdbuf_mutex);
1478− (void) vmw_resource_reserve(res, false, true);
1479− vmw_user_bo_unref(&res->guest_memory_bo);
1480− res->guest_memory_bo = vmw_user_bo_ref(bo_mob);
1481− res->guest_memory_offset = 0;
1482− vmw_resource_unreserve(res, false, false, false, NULL, 0);
1483− mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1484−
1485− return 0;
1486−}
1487−
1488−
1489−
14901407 static int vmw_kms_new_framebuffer_bo(struct vmw_private *dev_priv,
14911408 struct vmw_bo *bo,
14921409 struct vmw_framebuffer **out,
@@ -1565,55 +1482,24 @@ vmw_kms_srf_ok(struct vmw_private *dev_priv, uint32_t width, uint32_t height) · 72 unmodified lines
15651482 * vmw_kms_new_framebuffer - Create a new framebuffer.
15661483 *
15671484 * @dev_priv: Pointer to device private struct.
1568− * @bo: Pointer to buffer object to wrap the kms framebuffer around.
1569− * Either @bo or @surface must be NULL.
1570− * @surface: Pointer to a surface to wrap the kms framebuffer around.
1571− * Either @bo or @surface must be NULL.
1572− * @only_2d: No presents will occur to this buffer object based framebuffer.
1573− * This helps the code to do some important optimizations.
1485+ * @uo: Pointer to user object to wrap the kms framebuffer around.
1486+ * Either the buffer or surface inside the user object must be NULL.
15741487 * @mode_cmd: Frame-buffer metadata.
15751488 */
15761489 struct vmw_framebuffer *
15771490 vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
1578− struct vmw_bo *bo,
1579− struct vmw_surface *surface,
1580− bool only_2d,
1491+ struct vmw_user_object *uo,
15811492 const struct drm_mode_fb_cmd2 *mode_cmd)
15821493 {
15831494 struct vmw_framebuffer *vfb = NULL;
1584− bool is_bo_proxy = false;
15851495 int ret;
15861496
1587− /*
1588− * We cannot use the SurfaceDMA command in an non-accelerated VM,
1589− * therefore, wrap the buffer object in a surface so we can use the
1590− * SurfaceCopy command.
1591− */
1592− if (vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height) &&
1593− bo && only_2d &&
1594− mode_cmd->width > 64 && /* Don't create a proxy for cursor */
1595− dev_priv->active_display_unit == vmw_du_screen_target) {
1596− ret = vmw_create_bo_proxy(&dev_priv->drm, mode_cmd,
1597− bo, &surface);
1598− if (ret)
1599− return ERR_PTR(ret);
1600−
1601− is_bo_proxy = true;
1602− }
1603−
16041497 /* Create the new framebuffer depending one what we have */
1605− if (surface) {
1606− ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
1607− mode_cmd,
1608− is_bo_proxy);
1609− /*
1610− * vmw_create_bo_proxy() adds a reference that is no longer
1611− * needed
1612− */
1613− if (is_bo_proxy)
1614− vmw_surface_unreference(&surface);
1615− } else if (bo) {
1616− ret = vmw_kms_new_framebuffer_bo(dev_priv, bo, &vfb,
1498+ if (vmw_user_object_surface(uo)) {
1499+ ret = vmw_kms_new_framebuffer_surface(dev_priv, uo, &vfb,
1500+ mode_cmd);
1501+ } else if (uo->buffer) {
1502+ ret = vmw_kms_new_framebuffer_bo(dev_priv, uo->buffer, &vfb,
16171503 mode_cmd);
16181504 } else {
16191505 BUG();
@@ -1635,14 +1521,12 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, · 15 unmodified lines
16351521 {
16361522 struct vmw_private *dev_priv = vmw_priv(dev);
16371523 struct vmw_framebuffer *vfb = NULL;
1638− struct vmw_surface *surface = NULL;
1639− struct vmw_bo *bo = NULL;
1524+ struct vmw_user_object uo = {0};
16401525 int ret;
16411526
16421527 /* returns either a bo or surface */
1643− ret = vmw_user_lookup_handle(dev_priv, file_priv,
1644− mode_cmd->handles[0],
1645− &surface, &bo);
1528+ ret = vmw_user_object_lookup(dev_priv, file_priv, mode_cmd->handles[0],
1529+ &uo);
16461530 if (ret) {
16471531 DRM_ERROR("Invalid buffer object handle %u (0x%x).\n",
16481532 mode_cmd->handles[0], mode_cmd->handles[0]);
@@ -1650,7 +1534,7 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, · 1 unmodified line
16501534 }
16511535
16521536
1653− if (!bo &&
1537+ if (vmw_user_object_surface(&uo) &&
16541538 !vmw_kms_srf_ok(dev_priv, mode_cmd->width, mode_cmd->height)) {
16551539 DRM_ERROR("Surface size cannot exceed %dx%d\n",
16561540 dev_priv->texture_max_width,
@@ -1659,20 +1543,15 @@ static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev, · 2 unmodified lines
16591543 }
16601544
16611545
1662− vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
1663− !(dev_priv->capabilities & SVGA_CAP_3D),
1664− mode_cmd);
1546+ vfb = vmw_kms_new_framebuffer(dev_priv, &uo, mode_cmd);
16651547 if (IS_ERR(vfb)) {
16661548 ret = PTR_ERR(vfb);
16671549 goto err_out;
16681550 }
16691551
16701552 err_out:
1671− /* vmw_user_lookup_handle takes one ref so does new_fb */
1672− if (bo)
1673− vmw_user_bo_unref(&bo);
1674− if (surface)
1675− vmw_surface_unreference(&surface);
1553+ /* vmw_user_object_lookup takes one ref so does new_fb */
1554+ vmw_user_object_unref(&uo);
16761555
16771556 if (ret) {
16781557 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
@@ -2584,72 +2463,6 @@ void vmw_kms_helper_validation_finish(struct vmw_private *dev_priv, · 905 unmodified lines
25842463 vmw_fence_obj_unreference(&fence);
25852464 }
25862465
2587−/**
2588− * vmw_kms_update_proxy - Helper function to update a proxy surface from
2589− * its backing MOB.
2590− *
2591− * @res: Pointer to the surface resource
2592− * @clips: Clip rects in framebuffer (surface) space.
2593− * @num_clips: Number of clips in @clips.
2594− * @increment: Integer with which to increment the clip counter when looping.
2595− * Used to skip a predetermined number of clip rects.
2596− *
2597− * This function makes sure the proxy surface is updated from its backing MOB
2598− * using the region given by @clips. The surface resource @res and its backing
2599− * MOB needs to be reserved and validated on call.
2600− */
2601−int vmw_kms_update_proxy(struct vmw_resource *res,
2602− const struct drm_clip_rect *clips,
2603− unsigned num_clips,
2604− int increment)
2605−{
2606− struct vmw_private *dev_priv = res->dev_priv;
2607− struct drm_vmw_size *size = &vmw_res_to_srf(res)->metadata.base_size;
2608− struct {
2609− SVGA3dCmdHeader header;
2610− SVGA3dCmdUpdateGBImage body;
2611− } *cmd;
2612− SVGA3dBox *box;
2613− size_t copy_size = 0;
2614− int i;
2615−
2616− if (!clips)
2617− return 0;
2618−
2619− cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd) * num_clips);
2620− if (!cmd)
2621− return -ENOMEM;
2622−
2623− for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
2624− box = &cmd->body.box;
2625−
2626− cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
2627− cmd->header.size = sizeof(cmd->body);
2628− cmd->body.image.sid = res->id;
2629− cmd->body.image.face = 0;
2630− cmd->body.image.mipmap = 0;
2631−
2632− if (clips->x1 > size->width || clips->x2 > size->width ||
2633− clips->y1 > size->height || clips->y2 > size->height) {
2634− DRM_ERROR("Invalid clips outsize of framebuffer.\n");
2635− return -EINVAL;
2636− }
2637−
2638− box->x = clips->x1;
2639− box->y = clips->y1;
2640− box->z = 0;
2641− box->w = clips->x2 - clips->x1;
2642− box->h = clips->y2 - clips->y1;
2643− box->d = 1;
2644−
2645− copy_size += sizeof(*cmd);
2646− }
2647−
2648− vmw_cmd_commit(dev_priv, copy_size);
2649−
2650− return 0;
2651−}
2652−
26532466 /**
26542467 * vmw_kms_create_implicit_placement_property - Set up the implicit placement
26552468 * property.
@@ -2784,8 +2597,9 @@ int vmw_du_helper_plane_update(struct vmw_du_update_plane *update) · 128 unmodified lines
27842597 } else {
27852598 struct vmw_framebuffer_surface *vfbs =
27862599 container_of(update->vfb, typeof(*vfbs), base);
2600+ struct vmw_surface *surf = vmw_user_object_surface(&vfbs->uo);
27872601
2788− ret = vmw_validation_add_resource(&val_ctx, &vfbs->surface->res,
2602+ ret = vmw_validation_add_resource(&val_ctx, &surf->res,
27892603 0, VMW_RES_DIRTY_NONE, NULL,
27902604 NULL);
27912605 }
@@ -2941,3 +2755,93 @@ int vmw_connector_get_modes(struct drm_connector *connector) · 149 unmodified lines
29412755
29422756 return num_modes;
29432757 }
2758+
2759+struct vmw_user_object *vmw_user_object_ref(struct vmw_user_object *uo)
2760+{
2761+ if (uo->buffer)
2762+ vmw_user_bo_ref(uo->buffer);
2763+ else if (uo->surface)
2764+ vmw_surface_reference(uo->surface);
2765+ return uo;
2766+}
2767+
2768+void vmw_user_object_unref(struct vmw_user_object *uo)
2769+{
2770+ if (uo->buffer)
2771+ vmw_user_bo_unref(&uo->buffer);
2772+ else if (uo->surface)
2773+ vmw_surface_unreference(&uo->surface);
2774+}
2775+
2776+struct vmw_bo *
2777+vmw_user_object_buffer(struct vmw_user_object *uo)
2778+{
2779+ if (uo->buffer)
2780+ return uo->buffer;
2781+ else if (uo->surface)
2782+ return uo->surface->res.guest_memory_bo;
2783+ return NULL;
2784+}
2785+
2786+struct vmw_surface *
2787+vmw_user_object_surface(struct vmw_user_object *uo)
2788+{
2789+ if (uo->buffer)
2790+ return uo->buffer->dumb_surface;
2791+ return uo->surface;
2792+}
2793+
2794+void *vmw_user_object_map(struct vmw_user_object *uo)
2795+{
2796+ struct vmw_bo *bo = vmw_user_object_buffer(uo);
2797+
2798+ WARN_ON(!bo);
2799+ return vmw_bo_map_and_cache(bo);
2800+}
2801+
2802+void *vmw_user_object_map_size(struct vmw_user_object *uo, size_t size)
2803+{
2804+ struct vmw_bo *bo = vmw_user_object_buffer(uo);
2805+
2806+ WARN_ON(!bo);
2807+ return vmw_bo_map_and_cache_size(bo, size);
2808+}
2809+
2810+void vmw_user_object_unmap(struct vmw_user_object *uo)
2811+{
2812+ struct vmw_bo *bo = vmw_user_object_buffer(uo);
2813+ int ret;
2814+
2815+ WARN_ON(!bo);
2816+
2817+ /* Fence the mob creation so we are guarateed to have the mob */
2818+ ret = ttm_bo_reserve(&bo->tbo, false, false, NULL);
2819+ if (ret != 0)
2820+ return;
2821+
2822+ vmw_bo_unmap(bo);
2823+ vmw_bo_pin_reserved(bo, false);
2824+
2825+ ttm_bo_unreserve(&bo->tbo);
2826+}
2827+
2828+bool vmw_user_object_is_mapped(struct vmw_user_object *uo)
2829+{
2830+ struct vmw_bo *bo;
2831+
2832+ if (!uo || vmw_user_object_is_null(uo))
2833+ return false;
2834+
2835+ bo = vmw_user_object_buffer(uo);
2836+
2837+ if (WARN_ON(!bo))
2838+ return false;
2839+
2840+ WARN_ON(bo->map.bo && !bo->map.virtual);
2841+ return bo->map.virtual;
2842+}
2843+
2844+bool vmw_user_object_is_null(struct vmw_user_object *uo)
2845+{
2846+ return !uo->buffer && !uo->surface;
2847+}
drivers/gpu/drm/vmwgfx/vmwgfx_kms.h+6−11
@@ -1,7 +1,8 @@
11 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
22 /**************************************************************************
33 *
4− * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -221,11 +222,9 @@ struct vmw_framebuffer { · 213 unmodified lines
221222
222223 struct vmw_framebuffer_surface {
223224 struct vmw_framebuffer base;
224− struct vmw_surface *surface;
225− bool is_bo_proxy; /* true if this is proxy surface for DMA buf */
225+ struct vmw_user_object uo;
226226 };
227227
228−
229228 struct vmw_framebuffer_bo {
230229 struct vmw_framebuffer base;
231230 struct vmw_bo *buffer;
@@ -277,8 +276,7 @@ struct vmw_cursor_plane_state { · 45 unmodified lines
277276 */
278277 struct vmw_plane_state {
279278 struct drm_plane_state base;
280− struct vmw_surface *surf;
281− struct vmw_bo *bo;
279+ struct vmw_user_object uo;
282280
283281 int content_fb_type;
284282 unsigned long bo_size;
@@ -457,9 +455,7 @@ int vmw_kms_readback(struct vmw_private *dev_priv, · 172 unmodified lines
457455 uint32_t num_clips);
458456 struct vmw_framebuffer *
459457 vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
460− struct vmw_bo *bo,
461− struct vmw_surface *surface,
462− bool only_2d,
458+ struct vmw_user_object *uo,
463459 const struct drm_mode_fb_cmd2 *mode_cmd);
464460 void vmw_guess_mode_timing(struct drm_display_mode *mode);
465461 void vmw_kms_update_implicit_fb(struct vmw_private *dev_priv);
@@ -486,8 +482,7 @@ void vmw_du_plane_reset(struct drm_plane *plane); · 20 unmodified lines
486482 struct drm_plane_state *vmw_du_plane_duplicate_state(struct drm_plane *plane);
487483 void vmw_du_plane_destroy_state(struct drm_plane *plane,
488484 struct drm_plane_state *state);
489−void vmw_du_plane_unpin_surf(struct vmw_plane_state *vps,
490− bool unreference);
485+void vmw_du_plane_unpin_surf(struct vmw_plane_state *vps);
491486
492487 int vmw_du_crtc_atomic_check(struct drm_crtc *crtc,
493488 struct drm_atomic_state *state);
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c+9−5
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -147,8 +148,9 @@ static int vmw_ldu_fb_pin(struct vmw_framebuffer *vfb) · 139 unmodified lines
147148 struct vmw_bo *buf;
148149 int ret;
149150
150− buf = vfb->bo ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
151− vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.guest_memory_bo;
151+ buf = vfb->bo ?
152+ vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
153+ vmw_user_object_buffer(&vmw_framebuffer_to_vfbs(&vfb->base)->uo);
152154
153155 if (!buf)
154156 return 0;
@@ -169,8 +171,10 @@ static int vmw_ldu_fb_unpin(struct vmw_framebuffer *vfb) · 14 unmodified lines
169171 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
170172 struct vmw_bo *buf;
171173
172− buf = vfb->bo ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
173− vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.guest_memory_bo;
174+ buf = vfb->bo ?
175+ vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
176+ vmw_user_object_buffer(&vmw_framebuffer_to_vfbs(&vfb->base)->uo);
177+
174178
175179 if (WARN_ON(!buf))
176180 return 0;
drivers/gpu/drm/vmwgfx/vmwgfx_overlay.c+1−1
@@ -92,7 +92,7 @@ static int vmw_overlay_send_put(struct vmw_private *dev_priv, · 91 unmodified lines
9292 {
9393 struct vmw_escape_video_flush *flush;
9494 size_t fifo_size;
95− bool have_so = (dev_priv->active_display_unit == vmw_du_screen_object);
95+ bool have_so = (dev_priv->active_display_unit != vmw_du_legacy);
9696 int i, num_items;
9797 SVGAGuestPtr ptr;
9898
drivers/gpu/drm/vmwgfx/vmwgfx_prime.c+28−4
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright 2013 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2013-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -31,6 +32,7 @@ · 23 unmodified lines
3132 */
3233
3334 #include "vmwgfx_drv.h"
35+#include "vmwgfx_bo.h"
3436 #include "ttm_object.h"
3537 #include <linux/dma-buf.h>
3638
@@ -88,13 +90,35 @@ int vmw_prime_handle_to_fd(struct drm_device *dev, · 51 unmodified lines
8890 uint32_t handle, uint32_t flags,
8991 int *prime_fd)
9092 {
93+ struct vmw_private *vmw = vmw_priv(dev);
9194 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
95+ struct vmw_bo *vbo;
9296 int ret;
97+ int surf_handle;
9398
94− if (handle > VMWGFX_NUM_MOB)
99+ if (handle > VMWGFX_NUM_MOB) {
95100 ret = ttm_prime_handle_to_fd(tfile, handle, flags, prime_fd);
96− else
97− ret = drm_gem_prime_handle_to_fd(dev, file_priv, handle, flags, prime_fd);
101+ } else {
102+ ret = vmw_user_bo_lookup(file_priv, handle, &vbo);
103+ if (ret)
104+ return ret;
105+ if (vbo && vbo->is_dumb) {
106+ ret = drm_gem_prime_handle_to_fd(dev, file_priv, handle,
107+ flags, prime_fd);
108+ } else {
109+ surf_handle = vmw_lookup_surface_handle_for_buffer(vmw,
110+ vbo,
111+ handle);
112+ if (surf_handle > 0)
113+ ret = ttm_prime_handle_to_fd(tfile, surf_handle,
114+ flags, prime_fd);
115+ else
116+ ret = drm_gem_prime_handle_to_fd(dev, file_priv,
117+ handle, flags,
118+ prime_fd);
119+ }
120+ vmw_user_bo_unref(&vbo);
121+ }
98122
99123 return ret;
100124 }
drivers/gpu/drm/vmwgfx/vmwgfx_resource.c+18−9
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -58,6 +59,7 @@ void vmw_resource_mob_attach(struct vmw_resource *res) · 50 unmodified lines
5859
5960 rb_link_node(&res->mob_node, parent, new);
6061 rb_insert_color(&res->mob_node, &gbo->res_tree);
62+ vmw_bo_del_detached_resource(gbo, res);
6163
6264 vmw_bo_prio_add(gbo, res->used_prio);
6365 }
@@ -287,28 +289,35 @@ out_bad_resource: · 223 unmodified lines
287289 *
288290 * The pointer this pointed at by out_surf and out_buf needs to be null.
289291 */
290−int vmw_user_lookup_handle(struct vmw_private *dev_priv,
292+int vmw_user_object_lookup(struct vmw_private *dev_priv,
291293 struct drm_file *filp,
292− uint32_t handle,
293− struct vmw_surface **out_surf,
294− struct vmw_bo **out_buf)
294+ u32 handle,
295+ struct vmw_user_object *uo)
295296 {
296297 struct ttm_object_file *tfile = vmw_fpriv(filp)->tfile;
297298 struct vmw_resource *res;
298299 int ret;
299300
300− BUG_ON(*out_surf || *out_buf);
301+ WARN_ON(uo->surface || uo->buffer);
301302
302303 ret = vmw_user_resource_lookup_handle(dev_priv, tfile, handle,
303304 user_surface_converter,
304305 &res);
305306 if (!ret) {
306− *out_surf = vmw_res_to_srf(res);
307+ uo->surface = vmw_res_to_srf(res);
307308 return 0;
308309 }
309310
310− *out_surf = NULL;
311− ret = vmw_user_bo_lookup(filp, handle, out_buf);
311+ uo->surface = NULL;
312+ ret = vmw_user_bo_lookup(filp, handle, &uo->buffer);
313+ if (!ret && !uo->buffer->is_dumb) {
314+ uo->surface = vmw_lookup_surface_for_buffer(dev_priv,
315+ uo->buffer,
316+ handle);
317+ if (uo->surface)
318+ vmw_user_bo_unref(&uo->buffer);
319+ }
320+
312321 return ret;
313322 }
314323
drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c+19−14
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright 2011-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2011-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -240,7 +241,7 @@ static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc) · 232 unmodified lines
240241 struct vmw_connector_state *vmw_conn_state;
241242 int x, y;
242243
243− sou->buffer = vps->bo;
244+ sou->buffer = vmw_user_object_buffer(&vps->uo);
244245
245246 conn_state = sou->base.connector.state;
246247 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
@@ -376,10 +377,11 @@ vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane, · 129 unmodified lines
376377 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
377378 struct drm_crtc *crtc = plane->state->crtc ?
378379 plane->state->crtc : old_state->crtc;
380+ struct vmw_bo *bo = vmw_user_object_buffer(&vps->uo);
379381
380− if (vps->bo)
381− vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false);
382− vmw_bo_unreference(&vps->bo);
382+ if (bo)
383+ vmw_bo_unpin(vmw_priv(crtc->dev), bo, false);
384+ vmw_user_object_unref(&vps->uo);
383385 vps->bo_size = 0;
384386
385387 vmw_du_plane_cleanup_fb(plane, old_state);
@@ -411,9 +413,10 @@ vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, · 25 unmodified lines
411413 .bo_type = ttm_bo_type_device,
412414 .pin = true
413415 };
416+ struct vmw_bo *bo = NULL;
414417
415418 if (!new_fb) {
416− vmw_bo_unreference(&vps->bo);
419+ vmw_user_object_unref(&vps->uo);
417420 vps->bo_size = 0;
418421
419422 return 0;
@@ -422,17 +425,17 @@ vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, · 2 unmodified lines
422425 bo_params.size = new_state->crtc_w * new_state->crtc_h * 4;
423426 dev_priv = vmw_priv(crtc->dev);
424427
425− if (vps->bo) {
428+ bo = vmw_user_object_buffer(&vps->uo);
429+ if (bo) {
426430 if (vps->bo_size == bo_params.size) {
427431 /*
428432 * Note that this might temporarily up the pin-count
429433 * to 2, until cleanup_fb() is called.
430434 */
431− return vmw_bo_pin_in_vram(dev_priv, vps->bo,
432− true);
435+ return vmw_bo_pin_in_vram(dev_priv, bo, true);
433436 }
434437
435− vmw_bo_unreference(&vps->bo);
438+ vmw_user_object_unref(&vps->uo);
436439 vps->bo_size = 0;
437440 }
438441
@@ -442,7 +445,7 @@ vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, · 3 unmodified lines
442445 * resume the overlays, this is preferred to failing to alloc.
443446 */
444447 vmw_overlay_pause_all(dev_priv);
445− ret = vmw_bo_create(dev_priv, &bo_params, &vps->bo);
448+ ret = vmw_gem_object_create(dev_priv, &bo_params, &vps->uo.buffer);
446449 vmw_overlay_resume_all(dev_priv);
447450 if (ret)
448451 return ret;
@@ -453,7 +456,7 @@ vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane, · 4 unmodified lines
453456 * TTM already thinks the buffer is pinned, but make sure the
454457 * pin_count is upped.
455458 */
456− return vmw_bo_pin_in_vram(dev_priv, vps->bo, true);
459+ return vmw_bo_pin_in_vram(dev_priv, vps->uo.buffer, true);
457460 }
458461
459462 static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update,
@@ -580,6 +583,7 @@ static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update, · 120 unmodified lines
580583 {
581584 struct vmw_kms_sou_dirty_cmd *blit = cmd;
582585 struct vmw_framebuffer_surface *vfbs;
586+ struct vmw_surface *surf = NULL;
583587
584588 vfbs = container_of(update->vfb, typeof(*vfbs), base);
585589
@@ -587,7 +591,8 @@ static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update, · 1 unmodified line
587591 blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) *
588592 num_hits;
589593
590− blit->body.srcImage.sid = vfbs->surface->res.id;
594+ surf = vmw_user_object_surface(&vfbs->uo);
595+ blit->body.srcImage.sid = surf->res.id;
591596 blit->body.destScreenId = update->du->unit;
592597
593598 /* Update the source and destination bounding box later in post_clip */
@@ -1104,7 +1109,7 @@ int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv, · 510 unmodified lines
11041109 int ret;
11051110
11061111 if (!srf)
1107− srf = &vfbs->surface->res;
1112+ srf = &vmw_user_object_surface(&vfbs->uo)->res;
11081113
11091114 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
11101115 NULL, NULL);
drivers/gpu/drm/vmwgfx/vmwgfx_stdu.c+91−95
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /******************************************************************************
33 *
4− * COPYRIGHT (C) 2014-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2014-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -29,6 +30,7 @@ · 21 unmodified lines
2930 #include "vmwgfx_kms.h"
3031 #include "vmwgfx_vkms.h"
3132 #include "vmw_surface_cache.h"
33+#include <linux/fsnotify.h>
3234
3335 #include <drm/drm_atomic.h>
3436 #include <drm/drm_atomic_helper.h>
@@ -500,7 +502,7 @@ static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty) · 465 unmodified lines
500502 container_of(dirty->unit, typeof(*stdu), base);
501503 s32 width, height;
502504 s32 src_pitch, dst_pitch;
503− struct ttm_buffer_object *src_bo, *dst_bo;
505+ struct vmw_bo *src_bo, *dst_bo;
504506 u32 src_offset, dst_offset;
505507 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(stdu->cpp);
506508
@@ -515,11 +517,11 @@ static void vmw_stdu_bo_cpu_commit(struct vmw_kms_dirty *dirty) · 8 unmodified lines
515517
516518 /* Assume we are blitting from Guest (bo) to Host (display_srf) */
517519 src_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
518− src_bo = &stdu->display_srf->res.guest_memory_bo->tbo;
520+ src_bo = stdu->display_srf->res.guest_memory_bo;
519521 src_offset = ddirty->top * src_pitch + ddirty->left * stdu->cpp;
520522
521523 dst_pitch = ddirty->pitch;
522− dst_bo = &ddirty->buf->tbo;
524+ dst_bo = ddirty->buf;
523525 dst_offset = ddirty->fb_top * dst_pitch + ddirty->fb_left * stdu->cpp;
524526
525527 (void) vmw_bo_cpu_blit(dst_bo, dst_offset, dst_pitch,
@@ -735,7 +737,7 @@ int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv, · 209 unmodified lines
735737 int ret;
736738
737739 if (!srf)
738− srf = &vfbs->surface->res;
740+ srf = &vmw_user_object_surface(&vfbs->uo)->res;
739741
740742 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
741743 NULL, NULL);
@@ -746,12 +748,6 @@ int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv, · 4 unmodified lines
746748 if (ret)
747749 goto out_unref;
748750
749− if (vfbs->is_bo_proxy) {
750− ret = vmw_kms_update_proxy(srf, clips, num_clips, inc);
751− if (ret)
752− goto out_finish;
753− }
754−
755751 sdirty.base.fifo_commit = vmw_kms_stdu_surface_fifo_commit;
756752 sdirty.base.clip = vmw_kms_stdu_surface_clip;
757753 sdirty.base.fifo_reserve_size = sizeof(struct vmw_stdu_surface_copy) +
@@ -765,7 +761,7 @@ int vmw_kms_stdu_surface_dirty(struct vmw_private *dev_priv, · 7 unmodified lines
765761 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
766762 dest_x, dest_y, num_clips, inc,
767763 &sdirty.base);
768−out_finish:
764+
769765 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
770766 NULL);
771767
@@ -877,6 +873,32 @@ vmw_stdu_connector_mode_valid(struct drm_connector *connector, · 105 unmodified lines
877873 return MODE_OK;
878874 }
879875
876+/*
877+ * Trigger a modeset if the X,Y position of the Screen Target changes.
878+ * This is needed when multi-mon is cycled. The original Screen Target will have
879+ * the same mode but its relative X,Y position in the topology will change.
880+ */
881+static int vmw_stdu_connector_atomic_check(struct drm_connector *conn,
882+ struct drm_atomic_state *state)
883+{
884+ struct drm_connector_state *conn_state;
885+ struct vmw_screen_target_display_unit *du;
886+ struct drm_crtc_state *new_crtc_state;
887+
888+ conn_state = drm_atomic_get_connector_state(state, conn);
889+ du = vmw_connector_to_stdu(conn);
890+
891+ if (!conn_state->crtc)
892+ return 0;
893+
894+ new_crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc);
895+ if (du->base.gui_x != du->base.set_gui_x ||
896+ du->base.gui_y != du->base.set_gui_y)
897+ new_crtc_state->mode_changed = true;
898+
899+ return 0;
900+}
901+
880902 static const struct drm_connector_funcs vmw_stdu_connector_funcs = {
881903 .dpms = vmw_du_connector_dpms,
882904 .detect = vmw_du_connector_detect,
@@ -891,7 +913,8 @@ static const struct drm_connector_funcs vmw_stdu_connector_funcs = { · 8 unmodified lines
891913 static const struct
892914 drm_connector_helper_funcs vmw_stdu_connector_helper_funcs = {
893915 .get_modes = vmw_connector_get_modes,
894− .mode_valid = vmw_stdu_connector_mode_valid
916+ .mode_valid = vmw_stdu_connector_mode_valid,
917+ .atomic_check = vmw_stdu_connector_atomic_check,
895918 };
896919
897920
@@ -918,9 +941,8 @@ vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane, · 20 unmodified lines
918941 {
919942 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
920943
921− if (vps->surf)
944+ if (vmw_user_object_surface(&vps->uo))
922945 WARN_ON(!vps->pinned);
923−
924946 vmw_du_plane_cleanup_fb(plane, old_state);
925947
926948 vps->content_fb_type = SAME_AS_DISPLAY;
@@ -928,7 +950,6 @@ vmw_stdu_primary_plane_cleanup_fb(struct drm_plane *plane, · 1 unmodified line
928950 }
929951
930952
931−
932953 /**
933954 * vmw_stdu_primary_plane_prepare_fb - Readies the display surface
934955 *
@@ -952,13 +973,15 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 17 unmodified lines
952973 enum stdu_content_type new_content_type;
953974 struct vmw_framebuffer_surface *new_vfbs;
954975 uint32_t hdisplay = new_state->crtc_w, vdisplay = new_state->crtc_h;
976+ struct drm_plane_state *old_state = plane->state;
977+ struct drm_rect rect;
955978 int ret;
956979
957980 /* No FB to prepare */
958981 if (!new_fb) {
959− if (vps->surf) {
982+ if (vmw_user_object_surface(&vps->uo)) {
960983 WARN_ON(vps->pinned != 0);
961− vmw_surface_unreference(&vps->surf);
984+ vmw_user_object_unref(&vps->uo);
962985 }
963986
964987 return 0;
@@ -968,8 +991,8 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 3 unmodified lines
968991 new_vfbs = (vfb->bo) ? NULL : vmw_framebuffer_to_vfbs(new_fb);
969992
970993 if (new_vfbs &&
971− new_vfbs->surface->metadata.base_size.width == hdisplay &&
972− new_vfbs->surface->metadata.base_size.height == vdisplay)
994+ vmw_user_object_surface(&new_vfbs->uo)->metadata.base_size.width == hdisplay &&
995+ vmw_user_object_surface(&new_vfbs->uo)->metadata.base_size.height == vdisplay)
973996 new_content_type = SAME_AS_DISPLAY;
974997 else if (vfb->bo)
975998 new_content_type = SEPARATE_BO;
@@ -1007,29 +1030,29 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 31 unmodified lines
10071030 metadata.num_sizes = 1;
10081031 metadata.scanout = true;
10091032 } else {
1010− metadata = new_vfbs->surface->metadata;
1033+ metadata = vmw_user_object_surface(&new_vfbs->uo)->metadata;
10111034 }
10121035
10131036 metadata.base_size.width = hdisplay;
10141037 metadata.base_size.height = vdisplay;
10151038 metadata.base_size.depth = 1;
10161039
1017− if (vps->surf) {
1040+ if (vmw_user_object_surface(&vps->uo)) {
10181041 struct drm_vmw_size cur_base_size =
1019− vps->surf->metadata.base_size;
1042+ vmw_user_object_surface(&vps->uo)->metadata.base_size;
10201043
10211044 if (cur_base_size.width != metadata.base_size.width ||
10221045 cur_base_size.height != metadata.base_size.height ||
1023− vps->surf->metadata.format != metadata.format) {
1046+ vmw_user_object_surface(&vps->uo)->metadata.format != metadata.format) {
10241047 WARN_ON(vps->pinned != 0);
1025− vmw_surface_unreference(&vps->surf);
1048+ vmw_user_object_unref(&vps->uo);
10261049 }
10271050
10281051 }
10291052
1030− if (!vps->surf) {
1053+ if (!vmw_user_object_surface(&vps->uo)) {
10311054 ret = vmw_gb_surface_define(dev_priv, &metadata,
1032− &vps->surf);
1055+ &vps->uo.surface);
10331056 if (ret != 0) {
10341057 DRM_ERROR("Couldn't allocate STDU surface.\n");
10351058 return ret;
@@ -1042,18 +1065,19 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 6 unmodified lines
10421065 * The only time we add a reference in prepare_fb is if the
10431066 * state object doesn't have a reference to begin with
10441067 */
1045− if (vps->surf) {
1068+ if (vmw_user_object_surface(&vps->uo)) {
10461069 WARN_ON(vps->pinned != 0);
1047− vmw_surface_unreference(&vps->surf);
1070+ vmw_user_object_unref(&vps->uo);
10481071 }
10491072
1050− vps->surf = vmw_surface_reference(new_vfbs->surface);
1073+ memcpy(&vps->uo, &new_vfbs->uo, sizeof(vps->uo));
1074+ vmw_user_object_ref(&vps->uo);
10511075 }
10521076
1053− if (vps->surf) {
1077+ if (vmw_user_object_surface(&vps->uo)) {
10541078
10551079 /* Pin new surface before flipping */
1056− ret = vmw_resource_pin(&vps->surf->res, false);
1080+ ret = vmw_resource_pin(&vmw_user_object_surface(&vps->uo)->res, false);
10571081 if (ret)
10581082 goto out_srf_unref;
10591083
@@ -1062,6 +1086,34 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 2 unmodified lines
10621086
10631087 vps->content_fb_type = new_content_type;
10641088
1089+ /*
1090+ * The drm fb code will do blit's via the vmap interface, which doesn't
1091+ * trigger vmw_bo page dirty tracking due to being kernel side (and thus
1092+ * doesn't require mmap'ing) so we have to update the surface's dirty
1093+ * regions by hand but we want to be careful to not overwrite the
1094+ * resource if it has been written to by the gpu (res_dirty).
1095+ */
1096+ if (vps->uo.buffer && vps->uo.buffer->is_dumb) {
1097+ struct vmw_surface *surf = vmw_user_object_surface(&vps->uo);
1098+ struct vmw_resource *res = &surf->res;
1099+
1100+ if (!res->res_dirty && drm_atomic_helper_damage_merged(old_state,
1101+ new_state,
1102+ &rect)) {
1103+ /*
1104+ * At some point it might be useful to actually translate
1105+ * (rect.x1, rect.y1) => start, and (rect.x2, rect.y2) => end,
1106+ * but currently the fb code will just report the entire fb
1107+ * dirty so in practice it doesn't matter.
1108+ */
1109+ pgoff_t start = res->guest_memory_offset >> PAGE_SHIFT;
1110+ pgoff_t end = __KERNEL_DIV_ROUND_UP(res->guest_memory_offset +
1111+ res->guest_memory_size,
1112+ PAGE_SIZE);
1113+ vmw_resource_dirty_update(res, start, end);
1114+ }
1115+ }
1116+
10651117 /*
10661118 * This should only happen if the buffer object is too large to create a
10671119 * proxy surface for.
@@ -1072,7 +1124,7 @@ vmw_stdu_primary_plane_prepare_fb(struct drm_plane *plane, · 4 unmodified lines
10721124 return 0;
10731125
10741126 out_srf_unref:
1075− vmw_surface_unreference(&vps->surf);
1127+ vmw_user_object_unref(&vps->uo);
10761128 return ret;
10771129 }
10781130
@@ -1118,7 +1170,7 @@ vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd, · 39 unmodified lines
11181170 struct vmw_diff_cpy diff = VMW_CPU_BLIT_DIFF_INITIALIZER(0);
11191171 struct vmw_stdu_update_gb_image *cmd_img = cmd;
11201172 struct vmw_stdu_update *cmd_update;
1121− struct ttm_buffer_object *src_bo, *dst_bo;
1173+ struct vmw_bo *src_bo, *dst_bo;
11221174 u32 src_offset, dst_offset;
11231175 s32 src_pitch, dst_pitch;
11241176 s32 width, height;
@@ -1132,11 +1184,11 @@ vmw_stdu_bo_populate_update_cpu(struct vmw_du_update_plane *update, void *cmd, · 7 unmodified lines
11321184
11331185 diff.cpp = stdu->cpp;
11341186
1135− dst_bo = &stdu->display_srf->res.guest_memory_bo->tbo;
1187+ dst_bo = stdu->display_srf->res.guest_memory_bo;
11361188 dst_pitch = stdu->display_srf->metadata.base_size.width * stdu->cpp;
11371189 dst_offset = bb->y1 * dst_pitch + bb->x1 * stdu->cpp;
11381190
1139− src_bo = &vfbbo->buffer->tbo;
1191+ src_bo = vfbbo->buffer;
11401192 src_pitch = update->vfb->base.pitches[0];
11411193 src_offset = bo_update->fb_top * src_pitch + bo_update->fb_left *
11421194 stdu->cpp;
@@ -1214,14 +1266,8 @@ static uint32_t · 71 unmodified lines
12141266 vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update,
12151267 uint32_t num_hits)
12161268 {
1217− struct vmw_framebuffer_surface *vfbs;
12181269 uint32_t size = 0;
12191270
1220− vfbs = container_of(update->vfb, typeof(*vfbs), base);
1221−
1222− if (vfbs->is_bo_proxy)
1223− size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1224−
12251271 size += sizeof(struct vmw_stdu_update);
12261272
12271273 return size;
@@ -1230,61 +1276,14 @@ vmw_stdu_surface_fifo_size_same_display(struct vmw_du_update_plane *update, · 2 unmodified lines
12301276 static uint32_t vmw_stdu_surface_fifo_size(struct vmw_du_update_plane *update,
12311277 uint32_t num_hits)
12321278 {
1233− struct vmw_framebuffer_surface *vfbs;
12341279 uint32_t size = 0;
12351280
1236− vfbs = container_of(update->vfb, typeof(*vfbs), base);
1237−
1238− if (vfbs->is_bo_proxy)
1239− size += sizeof(struct vmw_stdu_update_gb_image) * num_hits;
1240−
12411281 size += sizeof(struct vmw_stdu_surface_copy) + sizeof(SVGA3dCopyBox) *
12421282 num_hits + sizeof(struct vmw_stdu_update);
12431283
12441284 return size;
12451285 }
12461286
1247−static uint32_t
1248−vmw_stdu_surface_update_proxy(struct vmw_du_update_plane *update, void *cmd)
1249−{
1250− struct vmw_framebuffer_surface *vfbs;
1251− struct drm_plane_state *state = update->plane->state;
1252− struct drm_plane_state *old_state = update->old_state;
1253− struct vmw_stdu_update_gb_image *cmd_update = cmd;
1254− struct drm_atomic_helper_damage_iter iter;
1255− struct drm_rect clip;
1256− uint32_t copy_size = 0;
1257−
1258− vfbs = container_of(update->vfb, typeof(*vfbs), base);
1259−
1260− /*
1261− * proxy surface is special where a buffer object type fb is wrapped
1262− * in a surface and need an update gb image command to sync with device.
1263− */
1264− drm_atomic_helper_damage_iter_init(&iter, old_state, state);
1265− drm_atomic_for_each_plane_damage(&iter, &clip) {
1266− SVGA3dBox *box = &cmd_update->body.box;
1267−
1268− cmd_update->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1269− cmd_update->header.size = sizeof(cmd_update->body);
1270− cmd_update->body.image.sid = vfbs->surface->res.id;
1271− cmd_update->body.image.face = 0;
1272− cmd_update->body.image.mipmap = 0;
1273−
1274− box->x = clip.x1;
1275− box->y = clip.y1;
1276− box->z = 0;
1277− box->w = drm_rect_width(&clip);
1278− box->h = drm_rect_height(&clip);
1279− box->d = 1;
1280−
1281− copy_size += sizeof(*cmd_update);
1282− cmd_update++;
1283− }
1284−
1285− return copy_size;
1286−}
1287−
12881287 static uint32_t
12891288 vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd,
12901289 uint32_t num_hits)
@@ -1299,7 +1298,7 @@ vmw_stdu_surface_populate_copy(struct vmw_du_update_plane *update, void *cmd, · 8 unmodified lines
12991298 cmd_copy->header.id = SVGA_3D_CMD_SURFACE_COPY;
13001299 cmd_copy->header.size = sizeof(cmd_copy->body) + sizeof(SVGA3dCopyBox) *
13011300 num_hits;
1302− cmd_copy->body.src.sid = vfbs->surface->res.id;
1301+ cmd_copy->body.src.sid = vmw_user_object_surface(&vfbs->uo)->res.id;
13031302 cmd_copy->body.dest.sid = stdu->display_srf->res.id;
13041303
13051304 return sizeof(*cmd_copy);
@@ -1370,10 +1369,7 @@ static int vmw_stdu_plane_update_surface(struct vmw_private *dev_priv, · 64 unmodified lines
13701369 srf_update.mutex = &dev_priv->cmdbuf_mutex;
13711370 srf_update.intr = true;
13721371
1373− if (vfbs->is_bo_proxy)
1374− srf_update.post_prepare = vmw_stdu_surface_update_proxy;
1375−
1376− if (vfbs->surface->res.id != stdu->display_srf->res.id) {
1372+ if (vmw_user_object_surface(&vfbs->uo)->res.id != stdu->display_srf->res.id) {
13771373 srf_update.calc_fifo_size = vmw_stdu_surface_fifo_size;
13781374 srf_update.pre_clip = vmw_stdu_surface_populate_copy;
13791375 srf_update.clip = vmw_stdu_surface_populate_clip;
@@ -1417,7 +1413,7 @@ vmw_stdu_primary_plane_atomic_update(struct drm_plane *plane, · 37 unmodified lines
14171413 stdu = vmw_crtc_to_stdu(crtc);
14181414 dev_priv = vmw_priv(crtc->dev);
14191415
1420− stdu->display_srf = vps->surf;
1416+ stdu->display_srf = vmw_user_object_surface(&vps->uo);
14211417 stdu->content_fb_type = vps->content_fb_type;
14221418 stdu->cpp = vps->cpp;
14231419
drivers/gpu/drm/vmwgfx/vmwgfx_surface.c+273−9
@@ -1,7 +1,8 @@
11 // SPDX-License-Identifier: GPL-2.0 OR MIT
22 /**************************************************************************
33 *
4− * Copyright 2009-2023 VMware, Inc., Palo Alto, CA., USA
4+ * Copyright (c) 2009-2024 Broadcom. All Rights Reserved. The term
5+ * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
56 *
67 * Permission is hereby granted, free of charge, to any person obtaining a
78 * copy of this software and associated documentation files (the
@@ -36,9 +37,6 @@ · 28 unmodified lines
3637 #include <drm/ttm/ttm_placement.h>
3738
3839 #define SVGA3D_FLAGS_64(upper32, lower32) (((uint64_t)upper32 << 32) | lower32)
39−#define SVGA3D_FLAGS_UPPER_32(svga3d_flags) (svga3d_flags >> 32)
40−#define SVGA3D_FLAGS_LOWER_32(svga3d_flags) \
41− (svga3d_flags & ((uint64_t)U32_MAX))
4240
4341 /**
4442 * struct vmw_user_surface - User-space visible surface resource
@@ -686,6 +684,14 @@ static void vmw_user_surface_base_release(struct ttm_base_object **p_base) · 641 unmodified lines
686684 struct vmw_resource *res = &user_srf->srf.res;
687685
688686 *p_base = NULL;
687+
688+ /*
689+ * Dumb buffers own the resource and they'll unref the
690+ * resource themselves
691+ */
692+ if (res && res->guest_memory_bo && res->guest_memory_bo->is_dumb)
693+ return;
694+
689695 vmw_resource_unreference(&res);
690696 }
691697
@@ -812,7 +818,8 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, · 120 unmodified lines
812818 }
813819 }
814820 res->guest_memory_size = cur_bo_offset;
815− if (metadata->scanout &&
821+ if (!file_priv->atomic &&
822+ metadata->scanout &&
816823 metadata->num_sizes == 1 &&
817824 metadata->sizes[0].width == VMW_CURSOR_SNOOP_WIDTH &&
818825 metadata->sizes[0].height == VMW_CURSOR_SNOOP_HEIGHT &&
@@ -864,6 +871,7 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data, · 45 unmodified lines
864871 vmw_resource_unreference(&res);
865872 goto out_unlock;
866873 }
874+ vmw_bo_add_detached_resource(res->guest_memory_bo, res);
867875 }
868876
869877 tmp = vmw_resource_reference(&srf->res);
@@ -892,6 +900,113 @@ out_unlock: · 22 unmodified lines
892900 return ret;
893901 }
894902
903+static struct vmw_user_surface *
904+vmw_lookup_user_surface_for_buffer(struct vmw_private *vmw, struct vmw_bo *bo,
905+ u32 handle)
906+{
907+ struct vmw_user_surface *user_srf = NULL;
908+ struct vmw_surface *surf;
909+ struct ttm_base_object *base;
910+
911+ surf = vmw_bo_surface(bo);
912+ if (surf) {
913+ rcu_read_lock();
914+ user_srf = container_of(surf, struct vmw_user_surface, srf);
915+ base = &user_srf->prime.base;
916+ if (base && !kref_get_unless_zero(&base->refcount)) {
917+ drm_dbg_driver(&vmw->drm,
918+ "%s: referencing a stale surface handle %d\n",
919+ __func__, handle);
920+ base = NULL;
921+ user_srf = NULL;
922+ }
923+ rcu_read_unlock();
924+ }
925+
926+ return user_srf;
927+}
928+
929+struct vmw_surface *vmw_lookup_surface_for_buffer(struct vmw_private *vmw,
930+ struct vmw_bo *bo,
931+ u32 handle)
932+{
933+ struct vmw_user_surface *user_srf =
934+ vmw_lookup_user_surface_for_buffer(vmw, bo, handle);
935+ struct vmw_surface *surf = NULL;
936+ struct ttm_base_object *base;
937+
938+ if (user_srf) {
939+ surf = vmw_surface_reference(&user_srf->srf);
940+ base = &user_srf->prime.base;
941+ ttm_base_object_unref(&base);
942+ }
943+ return surf;
944+}
945+
946+u32 vmw_lookup_surface_handle_for_buffer(struct vmw_private *vmw,
947+ struct vmw_bo *bo,
948+ u32 handle)
949+{
950+ struct vmw_user_surface *user_srf =
951+ vmw_lookup_user_surface_for_buffer(vmw, bo, handle);
952+ int surf_handle = 0;
953+ struct ttm_base_object *base;
954+
955+ if (user_srf) {
956+ base = &user_srf->prime.base;
957+ surf_handle = (u32)base->handle;
958+ ttm_base_object_unref(&base);
959+ }
960+ return surf_handle;
961+}
962+
963+static int vmw_buffer_prime_to_surface_base(struct vmw_private *dev_priv,
964+ struct drm_file *file_priv,
965+ u32 fd, u32 *handle,
966+ struct ttm_base_object **base_p)
967+{
968+ struct ttm_base_object *base;
969+ struct vmw_bo *bo;
970+ struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
971+ struct vmw_user_surface *user_srf;
972+ int ret;
973+
974+ ret = drm_gem_prime_fd_to_handle(&dev_priv->drm, file_priv, fd, handle);
975+ if (ret) {
976+ drm_warn(&dev_priv->drm,
977+ "Wasn't able to find user buffer for fd = %u.\n", fd);
978+ return ret;
979+ }
980+
981+ ret = vmw_user_bo_lookup(file_priv, *handle, &bo);
982+ if (ret) {
983+ drm_warn(&dev_priv->drm,
984+ "Wasn't able to lookup user buffer for handle = %u.\n", *handle);
985+ return ret;
986+ }
987+
988+ user_srf = vmw_lookup_user_surface_for_buffer(dev_priv, bo, *handle);
989+ if (WARN_ON(!user_srf)) {
990+ drm_warn(&dev_priv->drm,
991+ "User surface fd %d (handle %d) is null.\n", fd, *handle);
992+ ret = -EINVAL;
993+ goto out;
994+ }
995+
996+ base = &user_srf->prime.base;
997+ ret = ttm_ref_object_add(tfile, base, NULL, false);
998+ if (ret) {
999+ drm_warn(&dev_priv->drm,
1000+ "Couldn't add an object ref for the buffer (%d).\n", *handle);
1001+ goto out;
1002+ }
1003+
1004+ *base_p = base;
1005+out:
1006+ vmw_user_bo_unref(&bo);
1007+
1008+ return ret;
1009+}
8951010
8961011 static int
8971012 vmw_surface_handle_reference(struct vmw_private *dev_priv,
@@ -901,15 +1016,19 @@ vmw_surface_handle_reference(struct vmw_private *dev_priv, · 3 unmodified lines
9011016 struct ttm_base_object **base_p)
9021017 {
9031018 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
904− struct vmw_user_surface *user_srf;
1019+ struct vmw_user_surface *user_srf = NULL;
9051020 uint32_t handle;
9061021 struct ttm_base_object *base;
9071022 int ret;
9081023
9091024 if (handle_type == DRM_VMW_HANDLE_PRIME) {
9101025 ret = ttm_prime_fd_to_handle(tfile, u_handle, &handle);
911− if (unlikely(ret != 0))
912− return ret;
1026+ if (ret)
1027+ return vmw_buffer_prime_to_surface_base(dev_priv,
1028+ file_priv,
1029+ u_handle,
1030+ &handle,
1031+ base_p);
9131032 } else {
9141033 handle = u_handle;
9151034 }
@@ -1503,7 +1622,12 @@ vmw_gb_surface_define_internal(struct drm_device *dev, · 587 unmodified lines
15031622 ret = vmw_user_bo_lookup(file_priv, req->base.buffer_handle,
15041623 &res->guest_memory_bo);
15051624 if (ret == 0) {
1506− if (res->guest_memory_bo->tbo.base.size < res->guest_memory_size) {
1625+ if (res->guest_memory_bo->is_dumb) {
1626+ VMW_DEBUG_USER("Can't backup surface with a dumb buffer.\n");
1627+ vmw_user_bo_unref(&res->guest_memory_bo);
1628+ ret = -EINVAL;
1629+ goto out_unlock;
1630+ } else if (res->guest_memory_bo->tbo.base.size < res->guest_memory_size) {
15071631 VMW_DEBUG_USER("Surface backup buffer too small.\n");
15081632 vmw_user_bo_unref(&res->guest_memory_bo);
15091633 ret = -EINVAL;
@@ -1560,6 +1684,7 @@ vmw_gb_surface_define_internal(struct drm_device *dev, · 50 unmodified lines
15601684 rep->handle = user_srf->prime.base.handle;
15611685 rep->backup_size = res->guest_memory_size;
15621686 if (res->guest_memory_bo) {
1687+ vmw_bo_add_detached_resource(res->guest_memory_bo, res);
15631688 rep->buffer_map_handle =
15641689 drm_vma_node_offset_addr(&res->guest_memory_bo->tbo.base.vma_node);
15651690 rep->buffer_size = res->guest_memory_bo->tbo.base.size;
@@ -2100,3 +2225,142 @@ int vmw_gb_surface_define(struct vmw_private *dev_priv, · 534 unmodified lines
21002225 out_unlock:
21012226 return ret;
21022227 }
2228+
2229+static SVGA3dSurfaceFormat vmw_format_bpp_to_svga(struct vmw_private *vmw,
2230+ int bpp)
2231+{
2232+ switch (bpp) {
2233+ case 8: /* DRM_FORMAT_C8 */
2234+ return SVGA3D_P8;
2235+ case 16: /* DRM_FORMAT_RGB565 */
2236+ return SVGA3D_R5G6B5;
2237+ case 32: /* DRM_FORMAT_XRGB8888 */
2238+ if (has_sm4_context(vmw))
2239+ return SVGA3D_B8G8R8X8_UNORM;
2240+ return SVGA3D_X8R8G8B8;
2241+ default:
2242+ drm_warn(&vmw->drm, "Unsupported format bpp: %d\n", bpp);
2243+ return SVGA3D_X8R8G8B8;
2244+ }
2245+}
2246+
2247+/**
2248+ * vmw_dumb_create - Create a dumb kms buffer
2249+ *
2250+ * @file_priv: Pointer to a struct drm_file identifying the caller.
2251+ * @dev: Pointer to the drm device.
2252+ * @args: Pointer to a struct drm_mode_create_dumb structure
2253+ * Return: Zero on success, negative error code on failure.
2254+ *
2255+ * This is a driver callback for the core drm create_dumb functionality.
2256+ * Note that this is very similar to the vmw_bo_alloc ioctl, except
2257+ * that the arguments have a different format.
2258+ */
2259+int vmw_dumb_create(struct drm_file *file_priv,
2260+ struct drm_device *dev,
2261+ struct drm_mode_create_dumb *args)
2262+{
2263+ struct vmw_private *dev_priv = vmw_priv(dev);
2264+ struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
2265+ struct vmw_bo *vbo = NULL;
2266+ struct vmw_resource *res = NULL;
2267+ union drm_vmw_gb_surface_create_ext_arg arg = { 0 };
2268+ struct drm_vmw_gb_surface_create_ext_req *req = &arg.req;
2269+ int ret;
2270+ struct drm_vmw_size drm_size = {
2271+ .width = args->width,
2272+ .height = args->height,
2273+ .depth = 1,
2274+ };
2275+ SVGA3dSurfaceFormat format = vmw_format_bpp_to_svga(dev_priv, args->bpp);
2276+ const struct SVGA3dSurfaceDesc *desc = vmw_surface_get_desc(format);
2277+ SVGA3dSurfaceAllFlags flags = SVGA3D_SURFACE_HINT_TEXTURE |
2278+ SVGA3D_SURFACE_HINT_RENDERTARGET |
2279+ SVGA3D_SURFACE_SCREENTARGET |
2280+ SVGA3D_SURFACE_BIND_SHADER_RESOURCE |
2281+ SVGA3D_SURFACE_BIND_RENDER_TARGET;
2282+
2283+ /*
2284+ * Without mob support we're just going to use raw memory buffer
2285+ * because we wouldn't be able to support full surface coherency
2286+ * without mobs. There also no reason to support surface coherency
2287+ * without 3d (i.e. gpu usage on the host) because then all the
2288+ * contents is going to be rendered guest side.
2289+ */
2290+ if (!dev_priv->has_mob || !vmw_supports_3d(dev_priv)) {
2291+ int cpp = DIV_ROUND_UP(args->bpp, 8);
2292+
2293+ switch (cpp) {
2294+ case 1: /* DRM_FORMAT_C8 */
2295+ case 2: /* DRM_FORMAT_RGB565 */
2296+ case 4: /* DRM_FORMAT_XRGB8888 */
2297+ break;
2298+ default:
2299+ /*
2300+ * Dumb buffers don't allow anything else.
2301+ * This is tested via IGT's dumb_buffers
2302+ */
2303+ return -EINVAL;
2304+ }
2305+
2306+ args->pitch = args->width * cpp;
2307+ args->size = ALIGN(args->pitch * args->height, PAGE_SIZE);
2308+
2309+ ret = vmw_gem_object_create_with_handle(dev_priv, file_priv,
2310+ args->size, &args->handle,
2311+ &vbo);
2312+ /* drop reference from allocate - handle holds it now */
2313+ drm_gem_object_put(&vbo->tbo.base);
2314+ return ret;
2315+ }
2316+
2317+ req->version = drm_vmw_gb_surface_v1;
2318+ req->multisample_pattern = SVGA3D_MS_PATTERN_NONE;
2319+ req->quality_level = SVGA3D_MS_QUALITY_NONE;
2320+ req->buffer_byte_stride = 0;
2321+ req->must_be_zero = 0;
2322+ req->base.svga3d_flags = SVGA3D_FLAGS_LOWER_32(flags);
2323+ req->svga3d_flags_upper_32_bits = SVGA3D_FLAGS_UPPER_32(flags);
2324+ req->base.format = (uint32_t)format;
2325+ req->base.drm_surface_flags = drm_vmw_surface_flag_scanout;
2326+ req->base.drm_surface_flags |= drm_vmw_surface_flag_shareable;
2327+ req->base.drm_surface_flags |= drm_vmw_surface_flag_create_buffer;
2328+ req->base.drm_surface_flags |= drm_vmw_surface_flag_coherent;
2329+ req->base.base_size.width = args->width;
2330+ req->base.base_size.height = args->height;
2331+ req->base.base_size.depth = 1;
2332+ req->base.array_size = 0;
2333+ req->base.mip_levels = 1;
2334+ req->base.multisample_count = 0;
2335+ req->base.buffer_handle = SVGA3D_INVALID_ID;
2336+ req->base.autogen_filter = SVGA3D_TEX_FILTER_NONE;
2337+ ret = vmw_gb_surface_define_ext_ioctl(dev, &arg, file_priv);
2338+ if (ret) {
2339+ drm_warn(dev, "Unable to create a dumb buffer\n");
2340+ return ret;
2341+ }
2342+
2343+ args->handle = arg.rep.buffer_handle;
2344+ args->size = arg.rep.buffer_size;
2345+ args->pitch = vmw_surface_calculate_pitch(desc, &drm_size);
2346+
2347+ ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg.rep.handle,
2348+ user_surface_converter,
2349+ &res);
2350+ if (ret) {
2351+ drm_err(dev, "Created resource handle doesn't exist!\n");
2352+ goto err;
2353+ }
2354+
2355+ vbo = res->guest_memory_bo;
2356+ vbo->is_dumb = true;
2357+ vbo->dumb_surface = vmw_res_to_srf(res);
2358+
2359+err:
2360+ if (res)
2361+ vmw_resource_unreference(&res);
2362+ if (ret)
2363+ ttm_ref_object_base_unref(tfile, arg.rep.handle);
2364+
2365+ return ret;
2366+}
drivers/gpu/drm/vmwgfx/vmwgfx_vkms.c+22−18
@@ -75,7 +75,7 @@ done: · 74 unmodified lines
7575 return ret;
7676 }
7777
78−static int
78+static void
7979 compute_crc(struct drm_crtc *crtc,
8080 struct vmw_surface *surf,
8181 u32 *crc)
@@ -101,8 +101,6 @@ compute_crc(struct drm_crtc *crtc, · 19 unmodified lines
101101 }
102102
103103 vmw_bo_unmap(bo);
104−
105− return 0;
106104 }
107105
108106 static void
@@ -116,7 +114,6 @@ crc_generate_worker(struct work_struct *work) · 7 unmodified lines
116114 u64 frame_start, frame_end;
117115 u32 crc32 = 0;
118116 struct vmw_surface *surf = 0;
119− int ret;
120117
121118 spin_lock_irq(&du->vkms.crc_state_lock);
122119 crc_pending = du->vkms.crc_pending;
@@ -130,22 +127,24 @@ crc_generate_worker(struct work_struct *work) · 7 unmodified lines
130127 return;
131128
132129 spin_lock_irq(&du->vkms.crc_state_lock);
133− surf = du->vkms.surface;
130+ surf = vmw_surface_reference(du->vkms.surface);
134131 spin_unlock_irq(&du->vkms.crc_state_lock);
135132
136− if (vmw_surface_sync(vmw, surf)) {
137− drm_warn(crtc->dev, "CRC worker wasn't able to sync the crc surface!\n");
138− return;
139− }
133+ if (surf) {
134+ if (vmw_surface_sync(vmw, surf)) {
135+ drm_warn(
136+ crtc->dev,
137+ "CRC worker wasn't able to sync the crc surface!\n");
138+ return;
139+ }
140140
141− ret = compute_crc(crtc, surf, &crc32);
142− if (ret)
143− return;
141+ compute_crc(crtc, surf, &crc32);
142+ vmw_surface_unreference(&surf);
143+ }
144144
145145 spin_lock_irq(&du->vkms.crc_state_lock);
146146 frame_start = du->vkms.frame_start;
147147 frame_end = du->vkms.frame_end;
148− crc_pending = du->vkms.crc_pending;
149148 du->vkms.frame_start = 0;
150149 du->vkms.frame_end = 0;
151150 du->vkms.crc_pending = false;
@@ -164,7 +163,7 @@ vmw_vkms_vblank_simulate(struct hrtimer *timer) · 12 unmodified lines
164163 struct vmw_display_unit *du = container_of(timer, struct vmw_display_unit, vkms.timer);
165164 struct drm_crtc *crtc = &du->crtc;
166165 struct vmw_private *vmw = vmw_priv(crtc->dev);
167− struct vmw_surface *surf = NULL;
166+ bool has_surface = false;
168167 u64 ret_overrun;
169168 bool locked, ret;
170169
@@ -179,10 +178,10 @@ vmw_vkms_vblank_simulate(struct hrtimer *timer) · 8 unmodified lines
179178 WARN_ON(!ret);
180179 if (!locked)
181180 return HRTIMER_RESTART;
182− surf = du->vkms.surface;
181+ has_surface = du->vkms.surface != NULL;
183182 vmw_vkms_unlock(crtc);
184183
185− if (du->vkms.crc_enabled && surf) {
184+ if (du->vkms.crc_enabled && has_surface) {
186185 u64 frame = drm_crtc_accurate_vblank_count(crtc);
187186
188187 spin_lock(&du->vkms.crc_state_lock);
@@ -336,6 +335,8 @@ vmw_vkms_crtc_cleanup(struct drm_crtc *crtc) · 147 unmodified lines
336335 {
337336 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
338337
338+ if (du->vkms.surface)
339+ vmw_surface_unreference(&du->vkms.surface);
339340 WARN_ON(work_pending(&du->vkms.crc_generator_work));
340341 hrtimer_cancel(&du->vkms.timer);
341342 }
@@ -497,9 +498,12 @@ vmw_vkms_set_crc_surface(struct drm_crtc *crtc, · 155 unmodified lines
497498 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
498499 struct vmw_private *vmw = vmw_priv(crtc->dev);
499500
500− if (vmw->vkms_enabled) {
501+ if (vmw->vkms_enabled && du->vkms.surface != surf) {
501502 WARN_ON(atomic_read(&du->vkms.atomic_lock) != VMW_VKMS_LOCK_MODESET);
502− du->vkms.surface = surf;
503+ if (du->vkms.surface)
504+ vmw_surface_unreference(&du->vkms.surface);
505+ if (surf)
506+ du->vkms.surface = vmw_surface_reference(surf);
503507 }
504508 }
505509
drivers/gpu/drm/xe/Makefile+2−0
@@ -25,12 +25,14 @@ $(obj)/generated/%_wa_oob.c $(obj)/generated/%_wa_oob.h: $(obj)/xe_gen_wa_oob \ · 24 unmodified lines
2525
2626 uses_generated_oob := \
2727 $(obj)/xe_ggtt.o \
28+ $(obj)/xe_device.o \
2829 $(obj)/xe_gsc.o \
2930 $(obj)/xe_gt.o \
3031 $(obj)/xe_guc.o \
3132 $(obj)/xe_guc_ads.o \
3233 $(obj)/xe_guc_pc.o \
3334 $(obj)/xe_migrate.o \
35+ $(obj)/xe_pat.o \
3436 $(obj)/xe_ring_ops.o \
3537 $(obj)/xe_vm.o \
3638 $(obj)/xe_wa.o \
drivers/gpu/drm/xe/display/xe_display.c+27−1
@@ -132,6 +132,7 @@ static void xe_display_fini_noirq(void *arg) · 131 unmodified lines
132132 return;
133133
134134 intel_display_driver_remove_noirq(xe);
135+ intel_opregion_cleanup(xe);
135136 }
136137
137138 int xe_display_init_noirq(struct xe_device *xe)
@@ -157,8 +158,10 @@ int xe_display_init_noirq(struct xe_device *xe) · 19 unmodified lines
157158 intel_display_device_info_runtime_init(xe);
158159
159160 err = intel_display_driver_probe_noirq(xe);
160− if (err)
161+ if (err) {
162+ intel_opregion_cleanup(xe);
161163 return err;
164+ }
162165
163166 return devm_add_action_or_reset(xe->drm.dev, xe_display_fini_noirq, xe);
164167 }
@@ -280,6 +283,27 @@ static bool suspend_to_idle(void) · 115 unmodified lines
280283 return false;
281284 }
282285
286+static void xe_display_flush_cleanup_work(struct xe_device *xe)
287+{
288+ struct intel_crtc *crtc;
289+
290+ for_each_intel_crtc(&xe->drm, crtc) {
291+ struct drm_crtc_commit *commit;
292+
293+ spin_lock(&crtc->base.commit_lock);
294+ commit = list_first_entry_or_null(&crtc->base.commit_list,
295+ struct drm_crtc_commit, commit_entry);
296+ if (commit)
297+ drm_crtc_commit_get(commit);
298+ spin_unlock(&crtc->base.commit_lock);
299+
300+ if (commit) {
301+ wait_for_completion(&commit->cleanup_done);
302+ drm_crtc_commit_put(commit);
303+ }
304+ }
305+}
306+
283307 void xe_display_pm_suspend(struct xe_device *xe, bool runtime)
284308 {
285309 bool s2idle = suspend_to_idle();
@@ -297,6 +321,8 @@ void xe_display_pm_suspend(struct xe_device *xe, bool runtime) · 11 unmodified lines
297321 if (!runtime)
298322 intel_display_driver_suspend(xe);
299323
324+ xe_display_flush_cleanup_work(xe);
325+
300326 intel_dp_mst_suspend(xe);
301327
302328 intel_hpd_cancel_work(xe);
drivers/gpu/drm/xe/display/xe_dsb_buffer.c+8−0
@@ -7,6 +7,8 @@ · 6 unmodified lines
77 #include "intel_display_types.h"
88 #include "intel_dsb_buffer.h"
99 #include "xe_bo.h"
10+#include "xe_device.h"
11+#include "xe_device_types.h"
1012 #include "xe_gt.h"
1113
1214 u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf)
@@ -16,7 +18,10 @@ u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf) · 3 unmodified lines
1618
1719 void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val)
1820 {
21+ struct xe_device *xe = dsb_buf->vma->bo->tile->xe;
22+
1923 iosys_map_wr(&dsb_buf->vma->bo->vmap, idx * 4, u32, val);
24+ xe_device_l2_flush(xe);
2025 }
2126
2227 u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx)
@@ -26,9 +31,12 @@ u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx) · 3 unmodified lines
2631
2732 void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val, size_t size)
2833 {
34+ struct xe_device *xe = dsb_buf->vma->bo->tile->xe;
35+
2936 WARN_ON(idx > (dsb_buf->buf_size - size) / sizeof(*dsb_buf->cmd_buf));
3037
3138 iosys_map_memset(&dsb_buf->vma->bo->vmap, idx * 4, val, size);
39+ xe_device_l2_flush(xe);
3240 }
3341
3442 bool intel_dsb_buffer_create(struct intel_crtc *crtc, struct intel_dsb_buffer *dsb_buf, size_t size)
drivers/gpu/drm/xe/display/xe_fb_pin.c+3−0
@@ -10,6 +10,7 @@ · 9 unmodified lines
1010 #include "intel_fb.h"
1111 #include "intel_fb_pin.h"
1212 #include "xe_bo.h"
13+#include "xe_device.h"
1314 #include "xe_ggtt.h"
1415 #include "xe_gt.h"
1516 #include "xe_pm.h"
@@ -304,6 +305,8 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb, · 288 unmodified lines
304305 if (ret)
305306 goto err_unpin;
306307
308+ /* Ensure DPT writes are flushed */
309+ xe_device_l2_flush(xe);
307310 return vma;
308311
309312 err_unpin:
drivers/gpu/drm/xe/regs/xe_gt_regs.h+9−0
@@ -80,6 +80,9 @@ · 79 unmodified lines
8080 #define LE_CACHEABILITY_MASK REG_GENMASK(1, 0)
8181 #define LE_CACHEABILITY(value) REG_FIELD_PREP(LE_CACHEABILITY_MASK, value)
8282
83+#define XE2_GAMREQSTRM_CTRL XE_REG(0x4194)
84+#define CG_DIS_CNTLBUS REG_BIT(6)
85+
8386 #define CCS_AUX_INV XE_REG(0x4208)
8487
8588 #define VD0_AUX_INV XE_REG(0x4218)
@@ -372,6 +375,11 @@ · 286 unmodified lines
372375
373376 #define XEHPC_L3CLOS_MASK(i) XE_REG_MCR(0xb194 + (i) * 8)
374377
378+#define XE2_GLOBAL_INVAL XE_REG(0xb404)
379+
380+#define SCRATCH1LPFC XE_REG(0xb474)
381+#define EN_L3_RW_CCS_CACHE_FLUSH REG_BIT(0)
382+
375383 #define XE2LPM_L3SQCREG5 XE_REG_MCR(0xb658)
376384
377385 #define XE2_TDF_CTRL XE_REG(0xb418)
@@ -429,6 +437,7 @@ · 51 unmodified lines
429437 #define DIS_FIX_EOT1_FLUSH REG_BIT(9)
430438
431439 #define TDL_TSL_CHICKEN XE_REG_MCR(0xe4c4, XE_REG_OPTION_MASKED)
440+#define STK_ID_RESTRICT REG_BIT(12)
432441 #define SLM_WMTP_RESTORE REG_BIT(11)
433442
434443 #define ROW_CHICKEN XE_REG_MCR(0xe4f0, XE_REG_OPTION_MASKED)
drivers/gpu/drm/xe/xe_bo.c+3−3
@@ -1575,7 +1575,7 @@ struct xe_bo *xe_bo_create_from_data(struct xe_device *xe, struct xe_tile *tile, · 1574 unmodified lines
15751575 return bo;
15761576 }
15771577
1578−static void __xe_bo_unpin_map_no_vm(struct drm_device *drm, void *arg)
1578+static void __xe_bo_unpin_map_no_vm(void *arg)
15791579 {
15801580 xe_bo_unpin_map_no_vm(arg);
15811581 }
@@ -1590,7 +1590,7 @@ struct xe_bo *xe_managed_bo_create_pin_map(struct xe_device *xe, struct xe_tile · 8 unmodified lines
15901590 if (IS_ERR(bo))
15911591 return bo;
15921592
1593− ret = drmm_add_action_or_reset(&xe->drm, __xe_bo_unpin_map_no_vm, bo);
1593+ ret = devm_add_action_or_reset(xe->drm.dev, __xe_bo_unpin_map_no_vm, bo);
15941594 if (ret)
15951595 return ERR_PTR(ret);
15961596
@@ -1638,7 +1638,7 @@ int xe_managed_bo_reinit_in_vram(struct xe_device *xe, struct xe_tile *tile, str · 41 unmodified lines
16381638 if (IS_ERR(bo))
16391639 return PTR_ERR(bo);
16401640
1641− drmm_release_action(&xe->drm, __xe_bo_unpin_map_no_vm, *src);
1641+ devm_release_action(xe->drm.dev, __xe_bo_unpin_map_no_vm, *src);
16421642 *src = bo;
16431643
16441644 return 0;
drivers/gpu/drm/xe/xe_device.c+82−9
@@ -54,6 +54,9 @@ · 53 unmodified lines
5454 #include "xe_vm.h"
5555 #include "xe_vram.h"
5656 #include "xe_wait_user_fence.h"
57+#include "xe_wa.h"
58+
59+#include <generated/xe_wa_oob.h>
5760
5861 static int xe_file_open(struct drm_device *dev, struct drm_file *file)
5962 {
@@ -87,9 +90,55 @@ static int xe_file_open(struct drm_device *dev, struct drm_file *file) · 27 unmodified lines
8790 spin_unlock(&xe->clients.lock);
8891
8992 file->driver_priv = xef;
93+ kref_init(&xef->refcount);
94+
9095 return 0;
9196 }
9297
98+static void xe_file_destroy(struct kref *ref)
99+{
100+ struct xe_file *xef = container_of(ref, struct xe_file, refcount);
101+ struct xe_device *xe = xef->xe;
102+
103+ xa_destroy(&xef->exec_queue.xa);
104+ mutex_destroy(&xef->exec_queue.lock);
105+ xa_destroy(&xef->vm.xa);
106+ mutex_destroy(&xef->vm.lock);
107+
108+ spin_lock(&xe->clients.lock);
109+ xe->clients.count--;
110+ spin_unlock(&xe->clients.lock);
111+
112+ xe_drm_client_put(xef->client);
113+ kfree(xef);
114+}
115+
116+/**
117+ * xe_file_get() - Take a reference to the xe file object
118+ * @xef: Pointer to the xe file
119+ *
120+ * Anyone with a pointer to xef must take a reference to the xe file
121+ * object using this call.
122+ *
123+ * Return: xe file pointer
124+ */
125+struct xe_file *xe_file_get(struct xe_file *xef)
126+{
127+ kref_get(&xef->refcount);
128+ return xef;
129+}
130+
131+/**
132+ * xe_file_put() - Drop a reference to the xe file object
133+ * @xef: Pointer to the xe file
134+ *
135+ * Used to drop reference to the xef object
136+ */
137+void xe_file_put(struct xe_file *xef)
138+{
139+ kref_put(&xef->refcount, xe_file_destroy);
140+}
141+
93142 static void xe_file_close(struct drm_device *dev, struct drm_file *file)
94143 {
95144 struct xe_device *xe = to_xe_device(dev);
@@ -98,6 +147,8 @@ static void xe_file_close(struct drm_device *dev, struct drm_file *file) · 2 unmodified lines
98147 struct xe_exec_queue *q;
99148 unsigned long idx;
100149
150+ xe_pm_runtime_get(xe);
151+
101152 /*
102153 * No need for exec_queue.lock here as there is no contention for it
103154 * when FD is closing as IOCTLs presumably can't be modifying the
@@ -108,21 +159,14 @@ static void xe_file_close(struct drm_device *dev, struct drm_file *file) · 4 unmodified lines
108159 xe_exec_queue_kill(q);
109160 xe_exec_queue_put(q);
110161 }
111− xa_destroy(&xef->exec_queue.xa);
112− mutex_destroy(&xef->exec_queue.lock);
113162 mutex_lock(&xef->vm.lock);
114163 xa_for_each(&xef->vm.xa, idx, vm)
115164 xe_vm_close_and_put(vm);
116165 mutex_unlock(&xef->vm.lock);
117− xa_destroy(&xef->vm.xa);
118− mutex_destroy(&xef->vm.lock);
119166
120− spin_lock(&xe->clients.lock);
121− xe->clients.count--;
122− spin_unlock(&xe->clients.lock);
167+ xe_file_put(xef);
123168
124− xe_drm_client_put(xef->client);
125− kfree(xef);
169+ xe_pm_runtime_put(xe);
126170 }
127171
128172 static const struct drm_ioctl_desc xe_ioctls[] = {
@@ -779,6 +823,11 @@ void xe_device_td_flush(struct xe_device *xe) · 650 unmodified lines
779823 if (!IS_DGFX(xe) || GRAPHICS_VER(xe) < 20)
780824 return;
781825
826+ if (XE_WA(xe_root_mmio_gt(xe), 16023588340)) {
827+ xe_device_l2_flush(xe);
828+ return;
829+ }
830+
782831 for_each_gt(gt, xe, id) {
783832 if (xe_gt_is_media_type(gt))
784833 continue;
@@ -802,6 +851,30 @@ void xe_device_td_flush(struct xe_device *xe) · 17 unmodified lines
802851 }
803852 }
804853
854+void xe_device_l2_flush(struct xe_device *xe)
855+{
856+ struct xe_gt *gt;
857+ int err;
858+
859+ gt = xe_root_mmio_gt(xe);
860+
861+ if (!XE_WA(gt, 16023588340))
862+ return;
863+
864+ err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
865+ if (err)
866+ return;
867+
868+ spin_lock(&gt->global_invl_lock);
869+ xe_mmio_write32(gt, XE2_GLOBAL_INVAL, 0x1);
870+
871+ if (xe_mmio_wait32(gt, XE2_GLOBAL_INVAL, 0x1, 0x0, 150, NULL, true))
872+ xe_gt_err_once(gt, "Global invalidation timeout\n");
873+ spin_unlock(&gt->global_invl_lock);
874+
875+ xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
876+}
877+
805878 u32 xe_device_ccs_bytes(struct xe_device *xe, u64 size)
806879 {
807880 return xe_device_has_flat_ccs(xe) ?
drivers/gpu/drm/xe/xe_device.h+4−0
@@ -162,6 +162,7 @@ u64 xe_device_canonicalize_addr(struct xe_device *xe, u64 address); · 161 unmodified lines
162162 u64 xe_device_uncanonicalize_addr(struct xe_device *xe, u64 address);
163163
164164 void xe_device_td_flush(struct xe_device *xe);
165+void xe_device_l2_flush(struct xe_device *xe);
165166
166167 static inline bool xe_device_wedged(struct xe_device *xe)
167168 {
@@ -170,4 +171,7 @@ static inline bool xe_device_wedged(struct xe_device *xe) · 2 unmodified lines
170171
171172 void xe_device_declare_wedged(struct xe_device *xe);
172173
174+struct xe_file *xe_file_get(struct xe_file *xef);
175+void xe_file_put(struct xe_file *xef);
176+
173177 #endif
drivers/gpu/drm/xe/xe_device_types.h+3−0
@@ -566,6 +566,9 @@ struct xe_file { · 565 unmodified lines
566566
567567 /** @client: drm client */
568568 struct xe_drm_client *client;
569+
570+ /** @refcount: ref count of this xe file */
571+ struct kref refcount;
569572 };
570573
571574 #endif
drivers/gpu/drm/xe/xe_drm_client.c+1−4
@@ -251,11 +251,8 @@ static void show_run_ticks(struct drm_printer *p, struct drm_file *file) · 250 unmodified lines
251251
252252 /* Accumulate all the exec queues from this client */
253253 mutex_lock(&xef->exec_queue.lock);
254− xa_for_each(&xef->exec_queue.xa, i, q) {
254+ xa_for_each(&xef->exec_queue.xa, i, q)
255255 xe_exec_queue_update_run_ticks(q);
256− xef->run_ticks[q->class] += q->run_ticks - q->old_run_ticks;
257− q->old_run_ticks = q->run_ticks;
258− }
259256 mutex_unlock(&xef->exec_queue.lock);
260257
261258 /* Get the total GPU cycles */
drivers/gpu/drm/xe/xe_exec_queue.c+23−11
@@ -37,6 +37,10 @@ static void __xe_exec_queue_free(struct xe_exec_queue *q) · 36 unmodified lines
3737 {
3838 if (q->vm)
3939 xe_vm_put(q->vm);
40+
41+ if (q->xef)
42+ xe_file_put(q->xef);
43+
4044 kfree(q);
4145 }
4246
@@ -101,22 +105,35 @@ static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe, · 58 unmodified lines
101105
102106 static int __xe_exec_queue_init(struct xe_exec_queue *q)
103107 {
108+ struct xe_vm *vm = q->vm;
104109 int i, err;
105110
111+ if (vm) {
112+ err = xe_vm_lock(vm, true);
113+ if (err)
114+ return err;
115+ }
116+
106117 for (i = 0; i < q->width; ++i) {
107118 q->lrc[i] = xe_lrc_create(q->hwe, q->vm, SZ_16K);
108119 if (IS_ERR(q->lrc[i])) {
109120 err = PTR_ERR(q->lrc[i]);
110− goto err_lrc;
121+ goto err_unlock;
111122 }
112123 }
113124
125+ if (vm)
126+ xe_vm_unlock(vm);
127+
114128 err = q->ops->init(q);
115129 if (err)
116130 goto err_lrc;
117131
118132 return 0;
119133
134+err_unlock:
135+ if (vm)
136+ xe_vm_unlock(vm);
120137 err_lrc:
121138 for (i = i - 1; i >= 0; --i)
122139 xe_lrc_put(q->lrc[i]);
@@ -136,15 +153,7 @@ struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *v · 13 unmodified lines
136153 if (IS_ERR(q))
137154 return q;
138155
139− if (vm) {
140− err = xe_vm_lock(vm, true);
141− if (err)
142− goto err_post_alloc;
143− }
144−
145156 err = __xe_exec_queue_init(q);
146− if (vm)
147− xe_vm_unlock(vm);
148157 if (err)
149158 goto err_post_alloc;
150159
@@ -634,7 +643,6 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data, · 483 unmodified lines
634643
635644 if (xe_vm_in_preempt_fence_mode(vm)) {
636645 q->lr.context = dma_fence_context_alloc(1);
637− spin_lock_init(&q->lr.lock);
638646
639647 err = xe_vm_add_compute_exec_queue(vm, q);
640648 if (XE_IOCTL_DBG(xe, err))
@@ -649,6 +657,7 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data, · 8 unmodified lines
649657 goto kill_exec_queue;
650658
651659 args->exec_queue_id = id;
660+ q->xef = xe_file_get(xef);
652661
653662 return 0;
654663
@@ -762,6 +771,7 @@ bool xe_exec_queue_is_idle(struct xe_exec_queue *q) · 107 unmodified lines
762771 */
763772 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
764773 {
774+ struct xe_file *xef;
765775 struct xe_lrc *lrc;
766776 u32 old_ts, new_ts;
767777
@@ -773,6 +783,8 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q) · 5 unmodified lines
773783 if (!q->vm || !q->vm->xef)
774784 return;
775785
786+ xef = q->vm->xef;
787+
776788 /*
777789 * Only sample the first LRC. For parallel submission, all of them are
778790 * scheduled together and we compensate that below by multiplying by
@@ -783,7 +795,7 @@ void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q) · 4 unmodified lines
783795 */
784796 lrc = q->lrc[0];
785797 new_ts = xe_lrc_update_timestamp(lrc, &old_ts);
786− q->run_ticks += (new_ts - old_ts) * q->width;
798+ xef->run_ticks[q->class] += (new_ts - old_ts) * q->width;
787799 }
788800
789801 void xe_exec_queue_kill(struct xe_exec_queue *q)
drivers/gpu/drm/xe/xe_exec_queue_types.h+3−6
@@ -38,6 +38,9 @@ enum xe_exec_queue_priority { · 37 unmodified lines
3838 * a kernel object.
3939 */
4040 struct xe_exec_queue {
41+ /** @xef: Back pointer to xe file if this is user created exec queue */
42+ struct xe_file *xef;
43+
4144 /** @gt: graphics tile this exec queue can submit to */
4245 struct xe_gt *gt;
4346 /**
@@ -123,8 +126,6 @@ struct xe_exec_queue { · 79 unmodified lines
123126 u32 seqno;
124127 /** @lr.link: link into VM's list of exec queues */
125128 struct list_head link;
126− /** @lr.lock: preemption fences lock */
127− spinlock_t lock;
128129 } lr;
129130
130131 /** @ops: submission backend exec queue operations */
@@ -139,10 +140,6 @@ struct xe_exec_queue { · 8 unmodified lines
139140 * Protected by @vm's resv. Unused if @vm == NULL.
140141 */
141142 u64 tlb_flush_seqno;
142− /** @old_run_ticks: prior hw engine class run time in ticks for this exec queue */
143− u64 old_run_ticks;
144− /** @run_ticks: hw engine class run time in ticks for this exec queue */
145− u64 run_ticks;
146143 /** @lrc: logical ring context for this exec queue */
147144 struct xe_lrc *lrc[];
148145 };
drivers/gpu/drm/xe/xe_gsc.c+4−4
@@ -260,7 +260,7 @@ static int gsc_upload_and_init(struct xe_gsc *gsc) · 259 unmodified lines
260260 struct xe_tile *tile = gt_to_tile(gt);
261261 int ret;
262262
263− if (XE_WA(gt, 14018094691)) {
263+ if (XE_WA(tile->primary_gt, 14018094691)) {
264264 ret = xe_force_wake_get(gt_to_fw(tile->primary_gt), XE_FORCEWAKE_ALL);
265265
266266 /*
@@ -278,7 +278,7 @@ static int gsc_upload_and_init(struct xe_gsc *gsc) · 11 unmodified lines
278278
279279 ret = gsc_upload(gsc);
280280
281− if (XE_WA(gt, 14018094691))
281+ if (XE_WA(tile->primary_gt, 14018094691))
282282 xe_force_wake_put(gt_to_fw(tile->primary_gt), XE_FORCEWAKE_ALL);
283283
284284 if (ret)
@@ -437,7 +437,7 @@ out: · 152 unmodified lines
437437 return ret;
438438 }
439439
440−static void free_resources(struct drm_device *drm, void *arg)
440+static void free_resources(void *arg)
441441 {
442442 struct xe_gsc *gsc = arg;
443443
@@ -501,7 +501,7 @@ int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc) · 57 unmodified lines
501501 gsc->q = q;
502502 gsc->wq = wq;
503503
504− err = drmm_add_action_or_reset(&xe->drm, free_resources, gsc);
504+ err = devm_add_action_or_reset(xe->drm.dev, free_resources, gsc);
505505 if (err)
506506 return err;
507507
drivers/gpu/drm/xe/xe_gt.c+55−0
@@ -11,6 +11,8 @@ · 10 unmodified lines
1111 #include <drm/xe_drm.h>
1212 #include <generated/xe_wa_oob.h>
1313
14+#include <generated/xe_wa_oob.h>
15+
1416 #include "instructions/xe_gfxpipe_commands.h"
1517 #include "instructions/xe_mi_commands.h"
1618 #include "regs/xe_gt_regs.h"
@@ -95,6 +97,51 @@ void xe_gt_sanitize(struct xe_gt *gt) · 78 unmodified lines
9597 gt->uc.guc.submission_state.enabled = false;
9698 }
9799
100+static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
101+{
102+ u32 reg;
103+ int err;
104+
105+ if (!XE_WA(gt, 16023588340))
106+ return;
107+
108+ err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
109+ if (WARN_ON(err))
110+ return;
111+
112+ if (!xe_gt_is_media_type(gt)) {
113+ xe_mmio_write32(gt, SCRATCH1LPFC, EN_L3_RW_CCS_CACHE_FLUSH);
114+ reg = xe_mmio_read32(gt, XE2_GAMREQSTRM_CTRL);
115+ reg |= CG_DIS_CNTLBUS;
116+ xe_mmio_write32(gt, XE2_GAMREQSTRM_CTRL, reg);
117+ }
118+
119+ xe_gt_mcr_multicast_write(gt, XEHPC_L3CLOS_MASK(3), 0x3);
120+ xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
121+}
122+
123+static void xe_gt_disable_host_l2_vram(struct xe_gt *gt)
124+{
125+ u32 reg;
126+ int err;
127+
128+ if (!XE_WA(gt, 16023588340))
129+ return;
130+
131+ if (xe_gt_is_media_type(gt))
132+ return;
133+
134+ err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
135+ if (WARN_ON(err))
136+ return;
137+
138+ reg = xe_mmio_read32(gt, XE2_GAMREQSTRM_CTRL);
139+ reg &= ~CG_DIS_CNTLBUS;
140+ xe_mmio_write32(gt, XE2_GAMREQSTRM_CTRL, reg);
141+
142+ xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
143+}
144+
98145 /**
99146 * xe_gt_remove() - Clean up the GT structures before driver removal
100147 * @gt: the GT object
@@ -111,6 +158,8 @@ void xe_gt_remove(struct xe_gt *gt) · 10 unmodified lines
111158
112159 for (i = 0; i < XE_ENGINE_CLASS_MAX; ++i)
113160 xe_hw_fence_irq_finish(&gt->fence_irq[i]);
161+
162+ xe_gt_disable_host_l2_vram(gt);
114163 }
115164
116165 static void gt_reset_worker(struct work_struct *w);
@@ -339,6 +388,7 @@ int xe_gt_init_early(struct xe_gt *gt) · 222 unmodified lines
339388
340389 xe_force_wake_init_gt(gt, gt_to_fw(gt));
341390 xe_pcode_init(gt);
391+ spin_lock_init(&gt->global_invl_lock);
342392
343393 return 0;
344394 }
@@ -508,6 +558,7 @@ int xe_gt_init_hwconfig(struct xe_gt *gt) · 163 unmodified lines
508558
509559 xe_gt_mcr_init_early(gt);
510560 xe_pat_init(gt);
561+ xe_gt_enable_host_l2_vram(gt);
511562
512563 err = xe_uc_init(&gt->uc);
513564 if (err)
@@ -643,6 +694,8 @@ static int do_gt_restart(struct xe_gt *gt) · 129 unmodified lines
643694
644695 xe_pat_init(gt);
645696
697+ xe_gt_enable_host_l2_vram(gt);
698+
646699 xe_gt_mcr_set_implicit_defaults(gt);
647700 xe_reg_sr_apply_mmio(&gt->reg_sr, gt);
648701
@@ -796,6 +849,8 @@ int xe_gt_suspend(struct xe_gt *gt) · 147 unmodified lines
796849
797850 xe_gt_idle_disable_pg(gt);
798851
852+ xe_gt_disable_host_l2_vram(gt);
853+
799854 XE_WARN_ON(xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL));
800855 xe_gt_dbg(gt, "suspended\n");
801856
drivers/gpu/drm/xe/xe_gt_pagefault.c+16−2
@@ -382,6 +382,18 @@ static void pf_queue_work_func(struct work_struct *w) · 381 unmodified lines
382382
383383 static void acc_queue_work_func(struct work_struct *w);
384384
385+static void pagefault_fini(void *arg)
386+{
387+ struct xe_gt *gt = arg;
388+ struct xe_device *xe = gt_to_xe(gt);
389+
390+ if (!xe->info.has_usm)
391+ return;
392+
393+ destroy_workqueue(gt->usm.acc_wq);
394+ destroy_workqueue(gt->usm.pf_wq);
395+}
396+
385397 int xe_gt_pagefault_init(struct xe_gt *gt)
386398 {
387399 struct xe_device *xe = gt_to_xe(gt);
@@ -409,10 +421,12 @@ int xe_gt_pagefault_init(struct xe_gt *gt) · 21 unmodified lines
409421 gt->usm.acc_wq = alloc_workqueue("xe_gt_access_counter_work_queue",
410422 WQ_UNBOUND | WQ_HIGHPRI,
411423 NUM_ACC_QUEUE);
412− if (!gt->usm.acc_wq)
424+ if (!gt->usm.acc_wq) {
425+ destroy_workqueue(gt->usm.pf_wq);
413426 return -ENOMEM;
427+ }
414428
415− return 0;
429+ return devm_add_action_or_reset(xe->drm.dev, pagefault_fini, gt);
416430 }
417431
418432 void xe_gt_pagefault_reset(struct xe_gt *gt)
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c+8−3
@@ -1927,6 +1927,7 @@ static int pf_validate_vf_config(struct xe_gt *gt, unsigned int vfid) · 1926 unmodified lines
19271927 {
19281928 struct xe_gt *primary_gt = gt_to_tile(gt)->primary_gt;
19291929 struct xe_device *xe = gt_to_xe(gt);
1930+ bool is_primary = !xe_gt_is_media_type(gt);
19301931 bool valid_ggtt, valid_ctxs, valid_dbs;
19311932 bool valid_any, valid_all;
19321933
@@ -1935,13 +1936,17 @@ static int pf_validate_vf_config(struct xe_gt *gt, unsigned int vfid) · 2 unmodified lines
19351936 valid_dbs = pf_get_vf_config_dbs(gt, vfid);
19361937
19371938 /* note that GuC doorbells are optional */
1938− valid_any = valid_ggtt || valid_ctxs || valid_dbs;
1939− valid_all = valid_ggtt && valid_ctxs;
1939+ valid_any = valid_ctxs || valid_dbs;
1940+ valid_all = valid_ctxs;
1941+
1942+ /* and GGTT/LMEM is configured on primary GT only */
1943+ valid_all = valid_all && valid_ggtt;
1944+ valid_any = valid_any || (valid_ggtt && is_primary);
19401945
19411946 if (IS_DGFX(xe)) {
19421947 bool valid_lmem = pf_get_vf_config_ggtt(primary_gt, vfid);
19431948
1944− valid_any = valid_any || valid_lmem;
1949+ valid_any = valid_any || (valid_lmem && is_primary);
19451950 valid_all = valid_all && valid_lmem;
19461951 }
19471952
drivers/gpu/drm/xe/xe_gt_sriov_vf.c+1−1
@@ -850,7 +850,7 @@ static struct vf_runtime_reg *vf_lookup_reg(struct xe_gt *gt, u32 addr) · 849 unmodified lines
850850
851851 xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
852852
853− return bsearch(&key, runtime->regs, runtime->regs_size, sizeof(key),
853+ return bsearch(&key, runtime->regs, runtime->num_regs, sizeof(key),
854854 vf_runtime_reg_cmp);
855855 }
856856
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.c+109−92
@@ -13,10 +13,13 @@ · 12 unmodified lines
1313 #include "xe_guc.h"
1414 #include "xe_guc_ct.h"
1515 #include "xe_mmio.h"
16+#include "xe_pm.h"
1617 #include "xe_sriov.h"
1718 #include "xe_trace.h"
1819 #include "regs/xe_guc_regs.h"
1920
21+#define FENCE_STACK_BIT DMA_FENCE_FLAG_USER_BITS
22+
2023 /*
2124 * TLB inval depends on pending commands in the CT queue and then the real
2225 * invalidation time. Double up the time to process full CT queue
@@ -33,6 +36,24 @@ static long tlb_timeout_jiffies(struct xe_gt *gt) · 10 unmodified lines
3336 return hw_tlb_timeout + 2 * delay;
3437 }
3538
39+static void
40+__invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
41+{
42+ bool stack = test_bit(FENCE_STACK_BIT, &fence->base.flags);
43+
44+ trace_xe_gt_tlb_invalidation_fence_signal(xe, fence);
45+ xe_gt_tlb_invalidation_fence_fini(fence);
46+ dma_fence_signal(&fence->base);
47+ if (!stack)
48+ dma_fence_put(&fence->base);
49+}
50+
51+static void
52+invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
53+{
54+ list_del(&fence->link);
55+ __invalidation_fence_signal(xe, fence);
56+}
3657
3758 static void xe_gt_tlb_fence_timeout(struct work_struct *work)
3859 {
@@ -54,10 +75,8 @@ static void xe_gt_tlb_fence_timeout(struct work_struct *work) · 15 unmodified lines
5475 xe_gt_err(gt, "TLB invalidation fence timeout, seqno=%d recv=%d",
5576 fence->seqno, gt->tlb_invalidation.seqno_recv);
5677
57− list_del(&fence->link);
5878 fence->base.error = -ETIME;
59− dma_fence_signal(&fence->base);
60− dma_fence_put(&fence->base);
79+ invalidation_fence_signal(xe, fence);
6180 }
6281 if (!list_empty(&gt->tlb_invalidation.pending_fences))
6382 queue_delayed_work(system_wq,
@@ -87,21 +106,6 @@ int xe_gt_tlb_invalidation_init(struct xe_gt *gt) · 23 unmodified lines
87106 return 0;
88107 }
89108
90−static void
91−__invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
92−{
93− trace_xe_gt_tlb_invalidation_fence_signal(xe, fence);
94− dma_fence_signal(&fence->base);
95− dma_fence_put(&fence->base);
96−}
97−
98−static void
99−invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fence *fence)
100−{
101− list_del(&fence->link);
102− __invalidation_fence_signal(xe, fence);
103−}
104−
105109 /**
106110 * xe_gt_tlb_invalidation_reset - Initialize GT TLB invalidation reset
107111 * @gt: graphics tile
@@ -111,7 +115,6 @@ invalidation_fence_signal(struct xe_device *xe, struct xe_gt_tlb_invalidation_fe · 3 unmodified lines
111115 void xe_gt_tlb_invalidation_reset(struct xe_gt *gt)
112116 {
113117 struct xe_gt_tlb_invalidation_fence *fence, *next;
114− struct xe_guc *guc = &gt->uc.guc;
115118 int pending_seqno;
116119
117120 /*
@@ -134,7 +137,6 @@ void xe_gt_tlb_invalidation_reset(struct xe_gt *gt) · 16 unmodified lines
134137 else
135138 pending_seqno = gt->tlb_invalidation.seqno - 1;
136139 WRITE_ONCE(gt->tlb_invalidation.seqno_recv, pending_seqno);
137− wake_up_all(&guc->ct.wq);
138140
139141 list_for_each_entry_safe(fence, next,
140142 &gt->tlb_invalidation.pending_fences, link)
@@ -165,6 +167,8 @@ static int send_tlb_invalidation(struct xe_guc *guc, · 24 unmodified lines
165167 int seqno;
166168 int ret;
167169
170+ xe_gt_assert(gt, fence);
171+
168172 /*
169173 * XXX: The seqno algorithm relies on TLB invalidation being processed
170174 * in order which they currently are, if that changes the algorithm will
@@ -173,10 +177,8 @@ static int send_tlb_invalidation(struct xe_guc *guc, · 2 unmodified lines
173177
174178 mutex_lock(&guc->ct.lock);
175179 seqno = gt->tlb_invalidation.seqno;
176− if (fence) {
177− fence->seqno = seqno;
178− trace_xe_gt_tlb_invalidation_fence_send(xe, fence);
179− }
180+ fence->seqno = seqno;
181+ trace_xe_gt_tlb_invalidation_fence_send(xe, fence);
180182 action[1] = seqno;
181183 ret = xe_guc_ct_send_locked(&guc->ct, action, len,
182184 G2H_LEN_DW_TLB_INVALIDATE, 1);
@@ -209,7 +211,6 @@ static int send_tlb_invalidation(struct xe_guc *guc, · 26 unmodified lines
209211 TLB_INVALIDATION_SEQNO_MAX;
210212 if (!gt->tlb_invalidation.seqno)
211213 gt->tlb_invalidation.seqno = 1;
212− ret = seqno;
213214 }
214215 mutex_unlock(&guc->ct.lock);
215216
@@ -223,14 +224,16 @@ static int send_tlb_invalidation(struct xe_guc *guc, · 7 unmodified lines
223224 /**
224225 * xe_gt_tlb_invalidation_guc - Issue a TLB invalidation on this GT for the GuC
225226 * @gt: graphics tile
227+ * @fence: invalidation fence which will be signal on TLB invalidation
228+ * completion
226229 *
227230 * Issue a TLB invalidation for the GuC. Completion of TLB is asynchronous and
228− * caller can use seqno + xe_gt_tlb_invalidation_wait to wait for completion.
231+ * caller can use the invalidation fence to wait for completion.
229232 *
230− * Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
231− * negative error code on error.
233+ * Return: 0 on success, negative error code on error
232234 */
233−static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt)
235+static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt,
236+ struct xe_gt_tlb_invalidation_fence *fence)
234237 {
235238 u32 action[] = {
236239 XE_GUC_ACTION_TLB_INVALIDATION,
@@ -238,7 +241,7 @@ static int xe_gt_tlb_invalidation_guc(struct xe_gt *gt) · 1 unmodified line
238241 MAKE_INVAL_OP(XE_GUC_TLB_INVAL_GUC),
239242 };
240243
241− return send_tlb_invalidation(&gt->uc.guc, NULL, action,
244+ return send_tlb_invalidation(&gt->uc.guc, fence, action,
242245 ARRAY_SIZE(action));
243246 }
244247
@@ -257,13 +260,17 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt) · 12 unmodified lines
257260
258261 if (xe_guc_ct_enabled(&gt->uc.guc.ct) &&
259262 gt->uc.guc.submission_state.enabled) {
260− int seqno;
261−
262− seqno = xe_gt_tlb_invalidation_guc(gt);
263− if (seqno <= 0)
264− return seqno;
263+ struct xe_gt_tlb_invalidation_fence fence;
264+ int ret;
265+
266+ xe_gt_tlb_invalidation_fence_init(gt, &fence, true);
267+ ret = xe_gt_tlb_invalidation_guc(gt, &fence);
268+ if (ret < 0) {
269+ xe_gt_tlb_invalidation_fence_fini(&fence);
270+ return ret;
271+ }
265272
266− xe_gt_tlb_invalidation_wait(gt, seqno);
273+ xe_gt_tlb_invalidation_fence_wait(&fence);
267274 } else if (xe_device_uc_enabled(xe) && !xe_device_wedged(xe)) {
268275 if (IS_SRIOV_VF(xe))
269276 return 0;
@@ -290,18 +297,16 @@ int xe_gt_tlb_invalidation_ggtt(struct xe_gt *gt) · 20 unmodified lines
290297 *
291298 * @gt: graphics tile
292299 * @fence: invalidation fence which will be signal on TLB invalidation
293− * completion, can be NULL
300+ * completion
294301 * @start: start address
295302 * @end: end address
296303 * @asid: address space id
297304 *
298305 * Issue a range based TLB invalidation if supported, if not fallback to a full
299− * TLB invalidation. Completion of TLB is asynchronous and caller can either use
300− * the invalidation fence or seqno + xe_gt_tlb_invalidation_wait to wait for
301− * completion.
306+ * TLB invalidation. Completion of TLB is asynchronous and caller can use
307+ * the invalidation fence to wait for completion.
302308 *
303− * Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
304− * negative error code on error.
309+ * Return: Negative error code on error, 0 on success
305310 */
306311 int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
307312 struct xe_gt_tlb_invalidation_fence *fence,
@@ -312,11 +317,11 @@ int xe_gt_tlb_invalidation_range(struct xe_gt *gt, · 4 unmodified lines
312317 u32 action[MAX_TLB_INVALIDATION_LEN];
313318 int len = 0;
314319
320+ xe_gt_assert(gt, fence);
321+
315322 /* Execlists not supported */
316323 if (gt_to_xe(gt)->info.force_execlist) {
317− if (fence)
318− __invalidation_fence_signal(xe, fence);
319−
324+ __invalidation_fence_signal(xe, fence);
320325 return 0;
321326 }
322327
@@ -382,12 +387,10 @@ int xe_gt_tlb_invalidation_range(struct xe_gt *gt, · 59 unmodified lines
382387 * @vma: VMA to invalidate
383388 *
384389 * Issue a range based TLB invalidation if supported, if not fallback to a full
385− * TLB invalidation. Completion of TLB is asynchronous and caller can either use
386− * the invalidation fence or seqno + xe_gt_tlb_invalidation_wait to wait for
387− * completion.
390+ * TLB invalidation. Completion of TLB is asynchronous and caller can use
391+ * the invalidation fence to wait for completion.
388392 *
389− * Return: Seqno which can be passed to xe_gt_tlb_invalidation_wait on success,
390− * negative error code on error.
393+ * Return: Negative error code on error, 0 on success
391394 */
392395 int xe_gt_tlb_invalidation_vma(struct xe_gt *gt,
393396 struct xe_gt_tlb_invalidation_fence *fence,
@@ -400,43 +403,6 @@ int xe_gt_tlb_invalidation_vma(struct xe_gt *gt, · 6 unmodified lines
400403 xe_vma_vm(vma)->usm.asid);
401404 }
402405
403−/**
404− * xe_gt_tlb_invalidation_wait - Wait for TLB to complete
405− * @gt: graphics tile
406− * @seqno: seqno to wait which was returned from xe_gt_tlb_invalidation
407− *
408− * Wait for tlb_timeout_jiffies() for a TLB invalidation to complete.
409− *
410− * Return: 0 on success, -ETIME on TLB invalidation timeout
411− */
412−int xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno)
413−{
414− struct xe_guc *guc = &gt->uc.guc;
415− int ret;
416−
417− /* Execlists not supported */
418− if (gt_to_xe(gt)->info.force_execlist)
419− return 0;
420−
421− /*
422− * XXX: See above, this algorithm only works if seqno are always in
423− * order
424− */
425− ret = wait_event_timeout(guc->ct.wq,
426− tlb_invalidation_seqno_past(gt, seqno),
427− tlb_timeout_jiffies(gt));
428− if (!ret) {
429− struct drm_printer p = xe_gt_err_printer(gt);
430−
431− xe_gt_err(gt, "TLB invalidation time'd out, seqno=%d, recv=%d\n",
432− seqno, gt->tlb_invalidation.seqno_recv);
433− xe_guc_ct_print(&guc->ct, &p, true);
434− return -ETIME;
435− }
436−
437− return 0;
438−}
439−
440406 /**
441407 * xe_guc_tlb_invalidation_done_handler - TLB invalidation done handler
442408 * @guc: guc
@@ -480,12 +446,7 @@ int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len) · 37 unmodified lines
480446 return 0;
481447 }
482448
483− /*
484− * wake_up_all() and wait_event_timeout() already have the correct
485− * barriers.
486− */
487449 WRITE_ONCE(gt->tlb_invalidation.seqno_recv, msg[0]);
488− wake_up_all(&guc->ct.wq);
489450
490451 list_for_each_entry_safe(fence, next,
491452 &gt->tlb_invalidation.pending_fences, link) {
@@ -508,3 +469,59 @@ int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len) · 16 unmodified lines
508469
509470 return 0;
510471 }
472+
473+static const char *
474+invalidation_fence_get_driver_name(struct dma_fence *dma_fence)
475+{
476+ return "xe";
477+}
478+
479+static const char *
480+invalidation_fence_get_timeline_name(struct dma_fence *dma_fence)
481+{
482+ return "invalidation_fence";
483+}
484+
485+static const struct dma_fence_ops invalidation_fence_ops = {
486+ .get_driver_name = invalidation_fence_get_driver_name,
487+ .get_timeline_name = invalidation_fence_get_timeline_name,
488+};
489+
490+/**
491+ * xe_gt_tlb_invalidation_fence_init - Initialize TLB invalidation fence
492+ * @gt: GT
493+ * @fence: TLB invalidation fence to initialize
494+ * @stack: fence is stack variable
495+ *
496+ * Initialize TLB invalidation fence for use. xe_gt_tlb_invalidation_fence_fini
497+ * must be called if fence is not signaled.
498+ */
499+void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
500+ struct xe_gt_tlb_invalidation_fence *fence,
501+ bool stack)
502+{
503+ xe_pm_runtime_get_noresume(gt_to_xe(gt));
504+
505+ spin_lock_irq(&gt->tlb_invalidation.lock);
506+ dma_fence_init(&fence->base, &invalidation_fence_ops,
507+ &gt->tlb_invalidation.lock,
508+ dma_fence_context_alloc(1), 1);
509+ spin_unlock_irq(&gt->tlb_invalidation.lock);
510+ INIT_LIST_HEAD(&fence->link);
511+ if (stack)
512+ set_bit(FENCE_STACK_BIT, &fence->base.flags);
513+ else
514+ dma_fence_get(&fence->base);
515+ fence->gt = gt;
516+}
517+
518+/**
519+ * xe_gt_tlb_invalidation_fence_fini - Finalize TLB invalidation fence
520+ * @fence: TLB invalidation fence to finalize
521+ *
522+ * Drop PM ref which fence took durinig init.
523+ */
524+void xe_gt_tlb_invalidation_fence_fini(struct xe_gt_tlb_invalidation_fence *fence)
525+{
526+ xe_pm_runtime_put(gt_to_xe(fence->gt));
527+}
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h+11−1
@@ -23,7 +23,17 @@ int xe_gt_tlb_invalidation_vma(struct xe_gt *gt, · 22 unmodified lines
2323 int xe_gt_tlb_invalidation_range(struct xe_gt *gt,
2424 struct xe_gt_tlb_invalidation_fence *fence,
2525 u64 start, u64 end, u32 asid);
26−int xe_gt_tlb_invalidation_wait(struct xe_gt *gt, int seqno);
2726 int xe_guc_tlb_invalidation_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
2827
28+void xe_gt_tlb_invalidation_fence_init(struct xe_gt *gt,
29+ struct xe_gt_tlb_invalidation_fence *fence,
30+ bool stack);
31+void xe_gt_tlb_invalidation_fence_fini(struct xe_gt_tlb_invalidation_fence *fence);
32+
33+static inline void
34+xe_gt_tlb_invalidation_fence_wait(struct xe_gt_tlb_invalidation_fence *fence)
35+{
36+ dma_fence_wait(&fence->base, false);
37+}
38+
2939 #endif /* _XE_GT_TLB_INVALIDATION_ */
drivers/gpu/drm/xe/xe_gt_tlb_invalidation_types.h+4−0
@@ -8,6 +8,8 @@ · 7 unmodified lines
88
99 #include <linux/dma-fence.h>
1010
11+struct xe_gt;
12+
1113 /**
1214 * struct xe_gt_tlb_invalidation_fence - XE GT TLB invalidation fence
1315 *
@@ -17,6 +19,8 @@ · 3 unmodified lines
1719 struct xe_gt_tlb_invalidation_fence {
1820 /** @base: dma fence base */
1921 struct dma_fence base;
22+ /** @gt: GT which fence belong to */
23+ struct xe_gt *gt;
2024 /** @link: link into list of pending tlb fences */
2125 struct list_head link;
2226 /** @seqno: seqno of TLB invalidation to signal fence one */
drivers/gpu/drm/xe/xe_gt_types.h+6−0
@@ -362,6 +362,12 @@ struct xe_gt { · 361 unmodified lines
362362 */
363363 spinlock_t mcr_lock;
364364
365+ /**
366+ * @global_invl_lock: protects the register for the duration
367+ * of a global invalidation of l2 cache
368+ */
369+ spinlock_t global_invl_lock;
370+
365371 /** @wa_active: keep track of active workarounds */
366372 struct {
367373 /** @wa_active.gt: bitmap with active GT workarounds */
drivers/gpu/drm/xe/xe_guc_ct.c+9−1
@@ -327,6 +327,8 @@ static void xe_guc_ct_set_state(struct xe_guc_ct *ct, · 326 unmodified lines
327327 xe_gt_assert(ct_to_gt(ct), ct->g2h_outstanding == 0 ||
328328 state == XE_GUC_CT_STATE_STOPPED);
329329
330+ if (ct->g2h_outstanding)
331+ xe_pm_runtime_put(ct_to_xe(ct));
330332 ct->g2h_outstanding = 0;
331333 ct->state = state;
332334
@@ -495,10 +497,15 @@ static void h2g_reserve_space(struct xe_guc_ct *ct, u32 cmd_len) · 162 unmodified lines
495497 static void __g2h_reserve_space(struct xe_guc_ct *ct, u32 g2h_len, u32 num_g2h)
496498 {
497499 xe_gt_assert(ct_to_gt(ct), g2h_len <= ct->ctbs.g2h.info.space);
500+ xe_gt_assert(ct_to_gt(ct), (!g2h_len && !num_g2h) ||
501+ (g2h_len && num_g2h));
498502
499503 if (g2h_len) {
500504 lockdep_assert_held(&ct->fast_lock);
501505
506+ if (!ct->g2h_outstanding)
507+ xe_pm_runtime_get_noresume(ct_to_xe(ct));
508+
502509 ct->ctbs.g2h.info.space -= g2h_len;
503510 ct->g2h_outstanding += num_g2h;
504511 }
@@ -511,7 +518,8 @@ static void __g2h_release_space(struct xe_guc_ct *ct, u32 g2h_len) · 6 unmodified lines
511518 ct->ctbs.g2h.info.size - ct->ctbs.g2h.info.resv_space);
512519
513520 ct->ctbs.g2h.info.space += g2h_len;
514− --ct->g2h_outstanding;
521+ if (!--ct->g2h_outstanding)
522+ xe_pm_runtime_put(ct_to_xe(ct));
515523 }
516524
517525 static void g2h_release_space(struct xe_guc_ct *ct, u32 g2h_len)
drivers/gpu/drm/xe/xe_guc_submit.c+6−2
@@ -284,7 +284,7 @@ static void guc_submit_fini(struct drm_device *drm, void *arg) · 283 unmodified lines
284284 free_submit_wq(guc);
285285 }
286286
287−static void guc_submit_wedged_fini(struct drm_device *drm, void *arg)
287+static void guc_submit_wedged_fini(void *arg)
288288 {
289289 struct xe_guc *guc = arg;
290290 struct xe_exec_queue *q;
@@ -877,7 +877,7 @@ void xe_guc_submit_wedge(struct xe_guc *guc) · 586 unmodified lines
877877
878878 xe_gt_assert(guc_to_gt(guc), guc_to_xe(guc)->wedged.mode);
879879
880− err = drmm_add_action_or_reset(&guc_to_xe(guc)->drm,
880+ err = devm_add_action_or_reset(guc_to_xe(guc)->drm.dev,
881881 guc_submit_wedged_fini, guc);
882882 if (err) {
883883 drm_err(&xe->drm, "Failed to register xe_guc_submit clean-up on wedged.mode=2. Although device is wedged.\n");
@@ -1393,6 +1393,8 @@ static void guc_exec_queue_process_msg(struct xe_sched_msg *msg) · 509 unmodified lines
13931393 default:
13941394 XE_WARN_ON("Unknown message type");
13951395 }
1396+
1397+ xe_pm_runtime_put(guc_to_xe(exec_queue_to_guc(msg->private_data)));
13961398 }
13971399
13981400 static const struct drm_sched_backend_ops drm_sched_ops = {
@@ -1482,6 +1484,8 @@ static void guc_exec_queue_kill(struct xe_exec_queue *q) · 83 unmodified lines
14821484 static void guc_exec_queue_add_msg(struct xe_exec_queue *q, struct xe_sched_msg *msg,
14831485 u32 opcode)
14841486 {
1487+ xe_pm_runtime_get_noresume(guc_to_xe(exec_queue_to_guc(q)));
1488+
14851489 INIT_LIST_HEAD(&msg->link);
14861490 msg->opcode = opcode;
14871491 msg->private_data = q;
drivers/gpu/drm/xe/xe_hw_fence.c+5−4
@@ -148,20 +148,20 @@ static const char *xe_hw_fence_get_driver_name(struct dma_fence *dma_fence) · 147 unmodified lines
148148 {
149149 struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);
150150
151− return dev_name(gt_to_xe(fence->ctx->gt)->drm.dev);
151+ return dev_name(fence->xe->drm.dev);
152152 }
153153
154154 static const char *xe_hw_fence_get_timeline_name(struct dma_fence *dma_fence)
155155 {
156156 struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);
157157
158− return fence->ctx->name;
158+ return fence->name;
159159 }
160160
161161 static bool xe_hw_fence_signaled(struct dma_fence *dma_fence)
162162 {
163163 struct xe_hw_fence *fence = to_xe_hw_fence(dma_fence);
164− struct xe_device *xe = gt_to_xe(fence->ctx->gt);
164+ struct xe_device *xe = fence->xe;
165165 u32 seqno = xe_map_rd(xe, &fence->seqno_map, 0, u32);
166166
167167 return dma_fence->error ||
@@ -253,7 +253,8 @@ void xe_hw_fence_init(struct dma_fence *fence, struct xe_hw_fence_ctx *ctx, · 85 unmodified lines
253253 struct xe_hw_fence *hw_fence =
254254 container_of(fence, typeof(*hw_fence), dma);
255255
256− hw_fence->ctx = ctx;
256+ hw_fence->xe = gt_to_xe(ctx->gt);
257+ snprintf(hw_fence->name, sizeof(hw_fence->name), "%s", ctx->name);
257258 hw_fence->seqno_map = seqno_map;
258259 INIT_LIST_HEAD(&hw_fence->irq_link);
259260
drivers/gpu/drm/xe/xe_hw_fence_types.h+5−2
@@ -12,6 +12,7 @@ · 11 unmodified lines
1212 #include <linux/list.h>
1313 #include <linux/spinlock.h>
1414
15+struct xe_device;
1516 struct xe_gt;
1617
1718 /**
@@ -61,8 +62,10 @@ struct xe_hw_fence_ctx { · 43 unmodified lines
6162 struct xe_hw_fence {
6263 /** @dma: base dma fence for hardware fence context */
6364 struct dma_fence dma;
64− /** @ctx: hardware fence context */
65− struct xe_hw_fence_ctx *ctx;
65+ /** @xe: Xe device for hw fence driver name */
66+ struct xe_device *xe;
67+ /** @name: name of hardware fence context */
68+ char name[MAX_FENCE_NAME_LEN];
6669 /** @seqno_map: I/O map for seqno */
6770 struct iosys_map seqno_map;
6871 /** @irq_link: Link in struct xe_hw_fence_irq.pending */
drivers/gpu/drm/xe/xe_hwmon.c+3−2
@@ -203,9 +203,10 @@ static int xe_hwmon_power_max_write(struct xe_hwmon *hwmon, int channel, long va · 202 unmodified lines
203203 reg_val = xe_mmio_rmw32(hwmon->gt, rapl_limit, PKG_PWR_LIM_1_EN, 0);
204204 reg_val = xe_mmio_read32(hwmon->gt, rapl_limit);
205205 if (reg_val & PKG_PWR_LIM_1_EN) {
206+ drm_warn(&gt_to_xe(hwmon->gt)->drm, "PL1 disable is not supported!\n");
206207 ret = -EOPNOTSUPP;
207− goto unlock;
208208 }
209+ goto unlock;
209210 }
210211
211212 /* Computation in 64-bits to avoid overflow. Round to nearest. */
@@ -449,7 +450,7 @@ static int xe_hwmon_pcode_write_i1(struct xe_gt *gt, u32 uval) · 237 unmodified lines
449450 {
450451 return xe_pcode_write(gt, PCODE_MBOX(PCODE_POWER_SETUP,
451452 POWER_SETUP_SUBCOMMAND_WRITE_I1, 0),
452− uval);
453+ (uval & POWER_SETUP_I1_DATA_MASK));
453454 }
454455
455456 static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,
drivers/gpu/drm/xe/xe_lrc.c+14−1
@@ -1634,6 +1634,9 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) · 1633 unmodified lines
16341634 if (!snapshot)
16351635 return NULL;
16361636
1637+ if (lrc->bo && lrc->bo->vm)
1638+ xe_vm_get(lrc->bo->vm);
1639+
16371640 snapshot->context_desc = xe_lrc_ggtt_addr(lrc);
16381641 snapshot->indirect_context_desc = xe_lrc_indirect_ring_ggtt_addr(lrc);
16391642 snapshot->head = xe_lrc_ring_head(lrc);
@@ -1653,12 +1656,14 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) · 13 unmodified lines
16531656 void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot)
16541657 {
16551658 struct xe_bo *bo;
1659+ struct xe_vm *vm;
16561660 struct iosys_map src;
16571661
16581662 if (!snapshot)
16591663 return;
16601664
16611665 bo = snapshot->lrc_bo;
1666+ vm = bo->vm;
16621667 snapshot->lrc_bo = NULL;
16631668
16641669 snapshot->lrc_snapshot = kvmalloc(snapshot->lrc_size, GFP_KERNEL);
@@ -1678,6 +1683,8 @@ void xe_lrc_snapshot_capture_delayed(struct xe_lrc_snapshot *snapshot) · 13 unmodified lines
16781683 xe_bo_unlock(bo);
16791684 put_bo:
16801685 xe_bo_put(bo);
1686+ if (vm)
1687+ xe_vm_put(vm);
16811688 }
16821689
16831690 void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer *p)
@@ -1727,8 +1734,14 @@ void xe_lrc_snapshot_free(struct xe_lrc_snapshot *snapshot) · 43 unmodified lines
17271734 return;
17281735
17291736 kvfree(snapshot->lrc_snapshot);
1730− if (snapshot->lrc_bo)
1737+ if (snapshot->lrc_bo) {
1738+ struct xe_vm *vm;
1739+
1740+ vm = snapshot->lrc_bo->vm;
17311741 xe_bo_put(snapshot->lrc_bo);
1742+ if (vm)
1743+ xe_vm_put(vm);
1744+ }
17321745 kfree(snapshot);
17331746 }
17341747
drivers/gpu/drm/xe/xe_mmio.c+27−1
@@ -30,7 +30,8 @@ static void tiles_fini(void *arg) · 29 unmodified lines
3030 int id;
3131
3232 for_each_tile(tile, xe, id)
33− tile->mmio.regs = NULL;
33+ if (tile != xe_device_get_root_tile(xe))
34+ tile->mmio.regs = NULL;
3435 }
3536
3637 int xe_mmio_probe_tiles(struct xe_device *xe)
@@ -91,9 +92,11 @@ add_mmio_ext: · 54 unmodified lines
9192 static void mmio_fini(void *arg)
9293 {
9394 struct xe_device *xe = arg;
95+ struct xe_tile *root_tile = xe_device_get_root_tile(xe);
9496
9597 pci_iounmap(to_pci_dev(xe->drm.dev), xe->mmio.regs);
9698 xe->mmio.regs = NULL;
99+ root_tile->mmio.regs = NULL;
97100 }
98101
99102 int xe_mmio_init(struct xe_device *xe)
@@ -121,12 +124,29 @@ int xe_mmio_init(struct xe_device *xe) · 21 unmodified lines
121124 return devm_add_action_or_reset(xe->drm.dev, mmio_fini, xe);
122125 }
123126
127+static void mmio_flush_pending_writes(struct xe_gt *gt)
128+{
129+#define DUMMY_REG_OFFSET 0x130030
130+ struct xe_tile *tile = gt_to_tile(gt);
131+ int i;
132+
133+ if (tile->xe->info.platform != XE_LUNARLAKE)
134+ return;
135+
136+ /* 4 dummy writes */
137+ for (i = 0; i < 4; i++)
138+ writel(0, tile->mmio.regs + DUMMY_REG_OFFSET);
139+}
140+
124141 u8 xe_mmio_read8(struct xe_gt *gt, struct xe_reg reg)
125142 {
126143 struct xe_tile *tile = gt_to_tile(gt);
127144 u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
128145 u8 val;
129146
147+ /* Wa_15015404425 */
148+ mmio_flush_pending_writes(gt);
149+
130150 val = readb((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
131151 trace_xe_reg_rw(gt, false, addr, val, sizeof(val));
132152
@@ -139,6 +159,9 @@ u16 xe_mmio_read16(struct xe_gt *gt, struct xe_reg reg) · 6 unmodified lines
139159 u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
140160 u16 val;
141161
162+ /* Wa_15015404425 */
163+ mmio_flush_pending_writes(gt);
164+
142165 val = readw((reg.ext ? tile->mmio_ext.regs : tile->mmio.regs) + addr);
143166 trace_xe_reg_rw(gt, false, addr, val, sizeof(val));
144167
@@ -160,6 +183,9 @@ u32 xe_mmio_read32(struct xe_gt *gt, struct xe_reg reg) · 15 unmodified lines
160183 u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
161184 u32 val;
162185
186+ /* Wa_15015404425 */
187+ mmio_flush_pending_writes(gt);
188+
163189 if (!reg.vf && IS_SRIOV_VF(gt_to_xe(gt)))
164190 val = xe_gt_sriov_vf_read32(gt, reg);
165191 else
drivers/gpu/drm/xe/xe_observation.c+0−1
@@ -66,7 +66,6 @@ static struct ctl_table observation_ctl_table[] = { · 65 unmodified lines
6666 .extra1 = SYSCTL_ZERO,
6767 .extra2 = SYSCTL_ONE,
6868 },
69− {}
7069 };
7170
7271 /**
drivers/gpu/drm/xe/xe_pat.c+10−1
@@ -7,6 +7,8 @@ · 6 unmodified lines
77
88 #include <drm/xe_drm.h>
99
10+#include <generated/xe_wa_oob.h>
11+
1012 #include "regs/xe_reg_defs.h"
1113 #include "xe_assert.h"
1214 #include "xe_device.h"
@@ -15,6 +17,7 @@ · 2 unmodified lines
1517 #include "xe_gt_mcr.h"
1618 #include "xe_mmio.h"
1719 #include "xe_sriov.h"
20+#include "xe_wa.h"
1821
1922 #define _PAT_ATS 0x47fc
2023 #define _PAT_INDEX(index) _PICK_EVEN_2RANGES(index, 8, \
@@ -382,7 +385,13 @@ void xe_pat_init_early(struct xe_device *xe) · 361 unmodified lines
382385 if (GRAPHICS_VER(xe) == 20) {
383386 xe->pat.ops = &xe2_pat_ops;
384387 xe->pat.table = xe2_pat_table;
385− xe->pat.n_entries = ARRAY_SIZE(xe2_pat_table);
388+
389+ /* Wa_16023588340. XXX: Should use XE_WA */
390+ if (GRAPHICS_VERx100(xe) == 2001)
391+ xe->pat.n_entries = 28; /* Disable CLOS3 */
392+ else
393+ xe->pat.n_entries = ARRAY_SIZE(xe2_pat_table);
394+
386395 xe->pat.idx[XE_CACHE_NONE] = 3;
387396 xe->pat.idx[XE_CACHE_WT] = 15;
388397 xe->pat.idx[XE_CACHE_WB] = 2;
drivers/gpu/drm/xe/xe_pm.c+6−5
@@ -91,13 +91,13 @@ int xe_pm_suspend(struct xe_device *xe) · 90 unmodified lines
9191 for_each_gt(gt, xe, id)
9292 xe_gt_suspend_prepare(gt);
9393
94+ xe_display_pm_suspend(xe, false);
95+
9496 /* FIXME: Super racey... */
9597 err = xe_bo_evict_all(xe);
9698 if (err)
9799 goto err;
98100
99− xe_display_pm_suspend(xe, false);
100−
101101 for_each_gt(gt, xe, id) {
102102 err = xe_gt_suspend(gt);
103103 if (err) {
@@ -151,11 +151,11 @@ int xe_pm_resume(struct xe_device *xe) · 47 unmodified lines
151151
152152 xe_irq_resume(xe);
153153
154− xe_display_pm_resume(xe, false);
155−
156154 for_each_gt(gt, xe, id)
157155 xe_gt_resume(gt);
158156
157+ xe_display_pm_resume(xe, false);
158+
159159 err = xe_bo_restore_user(xe);
160160 if (err)
161161 goto err;
@@ -363,10 +363,11 @@ int xe_pm_runtime_suspend(struct xe_device *xe) · 201 unmodified lines
363363 mutex_unlock(&xe->mem_access.vram_userfault.lock);
364364
365365 if (xe->d3cold.allowed) {
366+ xe_display_pm_suspend(xe, true);
367+
366368 err = xe_bo_evict_all(xe);
367369 if (err)
368370 goto out;
369− xe_display_pm_suspend(xe, true);
370371 }
371372
372373 for_each_gt(gt, xe, id) {
drivers/gpu/drm/xe/xe_preempt_fence.c+2−1
@@ -128,8 +128,9 @@ xe_preempt_fence_arm(struct xe_preempt_fence *pfence, struct xe_exec_queue *q, · 127 unmodified lines
128128 {
129129 list_del_init(&pfence->link);
130130 pfence->q = xe_exec_queue_get(q);
131+ spin_lock_init(&pfence->lock);
131132 dma_fence_init(&pfence->base, &preempt_fence_ops,
132− &q->lr.lock, context, seqno);
133+ &pfence->lock, context, seqno);
133134
134135 return &pfence->base;
135136 }
drivers/gpu/drm/xe/xe_preempt_fence_types.h+2−0
@@ -25,6 +25,8 @@ struct xe_preempt_fence { · 24 unmodified lines
2525 struct xe_exec_queue *q;
2626 /** @preempt_work: work struct which issues preemption */
2727 struct work_struct preempt_work;
28+ /** @lock: dma-fence fence lock */
29+ spinlock_t lock;
2830 /** @error: preempt fence is in error state */
2931 int error;
3032 };
drivers/gpu/drm/xe/xe_pt.c+1−25
@@ -1115,23 +1115,6 @@ struct invalidation_fence { · 1114 unmodified lines
11151115 u32 asid;
11161116 };
11171117
1118−static const char *
1119−invalidation_fence_get_driver_name(struct dma_fence *dma_fence)
1120−{
1121− return "xe";
1122−}
1123−
1124−static const char *
1125−invalidation_fence_get_timeline_name(struct dma_fence *dma_fence)
1126−{
1127− return "invalidation_fence";
1128−}
1129−
1130−static const struct dma_fence_ops invalidation_fence_ops = {
1131− .get_driver_name = invalidation_fence_get_driver_name,
1132− .get_timeline_name = invalidation_fence_get_timeline_name,
1133−};
1134−
11351118 static void invalidation_fence_cb(struct dma_fence *fence,
11361119 struct dma_fence_cb *cb)
11371120 {
@@ -1170,15 +1153,8 @@ static int invalidation_fence_init(struct xe_gt *gt, · 32 unmodified lines
11701153
11711154 trace_xe_gt_tlb_invalidation_fence_create(gt_to_xe(gt), &ifence->base);
11721155
1173− spin_lock_irq(&gt->tlb_invalidation.lock);
1174− dma_fence_init(&ifence->base.base, &invalidation_fence_ops,
1175− &gt->tlb_invalidation.lock,
1176− dma_fence_context_alloc(1), 1);
1177− spin_unlock_irq(&gt->tlb_invalidation.lock);
1178−
1179− INIT_LIST_HEAD(&ifence->base.link);
1156+ xe_gt_tlb_invalidation_fence_init(gt, &ifence->base, false);
11801157
1181− dma_fence_get(&ifence->base.base); /* Ref for caller */
11821158 ifence->fence = fence;
11831159 ifence->gt = gt;
11841160 ifence->start = start;
drivers/gpu/drm/xe/xe_rtp.c+1−1
@@ -231,7 +231,7 @@ static void rtp_mark_active(struct xe_device *xe, · 230 unmodified lines
231231 if (first == last)
232232 bitmap_set(ctx->active_entries, first, 1);
233233 else
234− bitmap_set(ctx->active_entries, first, last - first + 2);
234+ bitmap_set(ctx->active_entries, first, last - first + 1);
235235 }
236236
237237 /**
drivers/gpu/drm/xe/xe_sched_job.c+2−1
@@ -171,12 +171,13 @@ void xe_sched_job_destroy(struct kref *ref) · 170 unmodified lines
171171 struct xe_sched_job *job =
172172 container_of(ref, struct xe_sched_job, refcount);
173173 struct xe_device *xe = job_to_xe(job);
174+ struct xe_exec_queue *q = job->q;
174175
175176 xe_sched_job_free_fences(job);
176− xe_exec_queue_put(job->q);
177177 dma_fence_put(job->fence);
178178 drm_sched_job_cleanup(&job->drm);
179179 job_free(job);
180+ xe_exec_queue_put(q);
180181 xe_pm_runtime_put(xe);
181182 }
182183
drivers/gpu/drm/xe/xe_sync.c+9−5
@@ -53,14 +53,18 @@ static struct xe_user_fence *user_fence_create(struct xe_device *xe, u64 addr, · 52 unmodified lines
5353 u64 value)
5454 {
5555 struct xe_user_fence *ufence;
56+ u64 __user *ptr = u64_to_user_ptr(addr);
57+
58+ if (!access_ok(ptr, sizeof(ptr)))
59+ return ERR_PTR(-EFAULT);
5660
5761 ufence = kmalloc(sizeof(*ufence), GFP_KERNEL);
5862 if (!ufence)
59− return NULL;
63+ return ERR_PTR(-ENOMEM);
6064
6165 ufence->xe = xe;
6266 kref_init(&ufence->refcount);
63− ufence->addr = u64_to_user_ptr(addr);
67+ ufence->addr = ptr;
6468 ufence->value = value;
6569 ufence->mm = current->mm;
6670 mmgrab(ufence->mm);
@@ -183,8 +187,8 @@ int xe_sync_entry_parse(struct xe_device *xe, struct xe_file *xef, · 116 unmodified lines
183187 } else {
184188 sync->ufence = user_fence_create(xe, sync_in.addr,
185189 sync_in.timeline_value);
186− if (XE_IOCTL_DBG(xe, !sync->ufence))
187− return -ENOMEM;
190+ if (XE_IOCTL_DBG(xe, IS_ERR(sync->ufence)))
191+ return PTR_ERR(sync->ufence);
188192 }
189193
190194 break;
@@ -263,7 +267,7 @@ void xe_sync_entry_cleanup(struct xe_sync_entry *sync) · 72 unmodified lines
263267 if (sync->fence)
264268 dma_fence_put(sync->fence);
265269 if (sync->chain_fence)
266− dma_fence_put(&sync->chain_fence->base);
270+ dma_fence_chain_free(sync->chain_fence);
267271 if (sync->ufence)
268272 user_fence_put(sync->ufence);
269273 }
drivers/gpu/drm/xe/xe_trace.h+1−1
@@ -309,7 +309,7 @@ DECLARE_EVENT_CLASS(xe_hw_fence, · 308 unmodified lines
309309 TP_ARGS(fence),
310310
311311 TP_STRUCT__entry(
312− __string(dev, __dev_name_gt(fence->ctx->gt))
312+ __string(dev, __dev_name_xe(fence->xe))
313313 __field(u64, ctx)
314314 __field(u32, seqno)
315315 __field(struct xe_hw_fence *, fence)
drivers/gpu/drm/xe/xe_ttm_vram_mgr.c+1−1
@@ -150,7 +150,7 @@ static int xe_ttm_vram_mgr_new(struct ttm_resource_manager *man, · 149 unmodified lines
150150 } while (remaining_size);
151151
152152 if (place->flags & TTM_PL_FLAG_CONTIGUOUS) {
153− if (!drm_buddy_block_trim(mm, vres->base.size, &vres->blocks))
153+ if (!drm_buddy_block_trim(mm, NULL, vres->base.size, &vres->blocks))
154154 size = vres->base.size;
155155 }
156156
drivers/gpu/drm/xe/xe_vm.c+39−20
@@ -1601,6 +1601,10 @@ static void vm_destroy_work_func(struct work_struct *w) · 1600 unmodified lines
16011601 XE_WARN_ON(vm->pt_root[id]);
16021602
16031603 trace_xe_vm_free(vm);
1604+
1605+ if (vm->xef)
1606+ xe_file_put(vm->xef);
1607+
16041608 kfree(vm);
16051609 }
16061610
@@ -1916,7 +1920,7 @@ int xe_vm_create_ioctl(struct drm_device *dev, void *data, · 309 unmodified lines
19161920 }
19171921
19181922 args->vm_id = id;
1919− vm->xef = xef;
1923+ vm->xef = xe_file_get(xef);
19201924
19211925 /* Record BO memory for VM pagetable created against client */
19221926 for_each_tile(tile, xe, id)
@@ -3337,10 +3341,11 @@ int xe_vm_invalidate_vma(struct xe_vma *vma) · 1414 unmodified lines
33373341 {
33383342 struct xe_device *xe = xe_vma_vm(vma)->xe;
33393343 struct xe_tile *tile;
3340− u32 tile_needs_invalidate = 0;
3341− int seqno[XE_MAX_TILES_PER_DEVICE];
3344+ struct xe_gt_tlb_invalidation_fence
3345+ fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
33423346 u8 id;
3343− int ret;
3347+ u32 fence_id = 0;
3348+ int ret = 0;
33443349
33453350 xe_assert(xe, !xe_vma_is_null(vma));
33463351 trace_xe_vma_invalidate(vma);
@@ -3365,29 +3370,43 @@ int xe_vm_invalidate_vma(struct xe_vma *vma) · 18 unmodified lines
33653370
33663371 for_each_tile(tile, xe, id) {
33673372 if (xe_pt_zap_ptes(tile, vma)) {
3368− tile_needs_invalidate |= BIT(id);
33693373 xe_device_wmb(xe);
3370− /*
3371− * FIXME: We potentially need to invalidate multiple
3372− * GTs within the tile
3373− */
3374− seqno[id] = xe_gt_tlb_invalidation_vma(tile->primary_gt, NULL, vma);
3375− if (seqno[id] < 0)
3376− return seqno[id];
3377− }
3378− }
3374+ xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
3375+ &fence[fence_id],
3376+ true);
3377+
3378+ ret = xe_gt_tlb_invalidation_vma(tile->primary_gt,
3379+ &fence[fence_id], vma);
3380+ if (ret < 0) {
3381+ xe_gt_tlb_invalidation_fence_fini(&fence[fence_id]);
3382+ goto wait;
3383+ }
3384+ ++fence_id;
33793385
3380− for_each_tile(tile, xe, id) {
3381− if (tile_needs_invalidate & BIT(id)) {
3382− ret = xe_gt_tlb_invalidation_wait(tile->primary_gt, seqno[id]);
3383− if (ret < 0)
3384− return ret;
3386+ if (!tile->media_gt)
3387+ continue;
3388+
3389+ xe_gt_tlb_invalidation_fence_init(tile->media_gt,
3390+ &fence[fence_id],
3391+ true);
3392+
3393+ ret = xe_gt_tlb_invalidation_vma(tile->media_gt,
3394+ &fence[fence_id], vma);
3395+ if (ret < 0) {
3396+ xe_gt_tlb_invalidation_fence_fini(&fence[fence_id]);
3397+ goto wait;
3398+ }
3399+ ++fence_id;
33853400 }
33863401 }
33873402
3403+wait:
3404+ for (id = 0; id < fence_id; ++id)
3405+ xe_gt_tlb_invalidation_fence_wait(&fence[id]);
3406+
33883407 vma->tile_invalidated = vma->tile_mask;
33893408
3390− return 0;
3409+ return ret;
33913410 }
33923411
33933412 struct xe_vm_snapshot {
drivers/gpu/drm/xe/xe_wa.c+18−0
@@ -486,6 +486,10 @@ static const struct xe_rtp_entry_sr engine_was[] = { · 485 unmodified lines
486486 XE_RTP_RULES(GRAPHICS_VERSION(2004), FUNC(xe_rtp_match_first_render_or_compute)),
487487 XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, SLM_WMTP_RESTORE))
488488 },
489+ { XE_RTP_NAME("14021402888"),
490+ XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
491+ XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
492+ },
489493
490494 /* Xe2_HPG */
491495
@@ -538,6 +542,20 @@ static const struct xe_rtp_entry_sr engine_was[] = { · 46 unmodified lines
538542 XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
539543 XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
540544 },
545+ { XE_RTP_NAME("14021821874"),
546+ XE_RTP_RULES(GRAPHICS_VERSION(2001), FUNC(xe_rtp_match_first_render_or_compute)),
547+ XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
548+ },
549+
550+ /* Xe2_LPM */
551+
552+ { XE_RTP_NAME("16021639441"),
553+ XE_RTP_RULES(MEDIA_VERSION(2000)),
554+ XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
555+ GHWSP_CSB_REPORT_DIS |
556+ PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
557+ XE_RTP_ACTION_FLAG(ENGINE_BASE)))
558+ },
541559
542560 /* Xe2_HPM */
543561
drivers/gpu/drm/xe/xe_wa_oob.rules+1−0
@@ -29,3 +29,4 @@ · 28 unmodified lines
2929 13011645652 GRAPHICS_VERSION(2004)
3030 22019338487 MEDIA_VERSION(2000)
3131 GRAPHICS_VERSION(2001)
32+16023588340 GRAPHICS_VERSION(2001)
drivers/hid/amd-sfh-hid/amd_sfh_client.c+11−7
@@ -288,12 +288,22 @@ int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata) · 287 unmodified lines
288288 mp2_ops->start(privdata, info);
289289 cl_data->sensor_sts[i] = amd_sfh_wait_for_response
290290 (privdata, cl_data->sensor_idx[i], SENSOR_ENABLED);
291+
292+ if (cl_data->sensor_sts[i] == SENSOR_ENABLED)
293+ cl_data->is_any_sensor_enabled = true;
294+ }
295+
296+ if (!cl_data->is_any_sensor_enabled ||
297+ (mp2_ops->discovery_status && mp2_ops->discovery_status(privdata) == 0)) {
298+ dev_warn(dev, "Failed to discover, sensors not enabled is %d\n",
299+ cl_data->is_any_sensor_enabled);
300+ rc = -EOPNOTSUPP;
301+ goto cleanup;
291302 }
292303
293304 for (i = 0; i < cl_data->num_hid_devices; i++) {
294305 cl_data->cur_hid_dev = i;
295306 if (cl_data->sensor_sts[i] == SENSOR_ENABLED) {
296− cl_data->is_any_sensor_enabled = true;
297307 rc = amdtp_hid_probe(i, cl_data);
298308 if (rc)
299309 goto cleanup;
@@ -305,12 +315,6 @@ int amd_sfh_hid_client_init(struct amd_mp2_dev *privdata) · 5 unmodified lines
305315 cl_data->sensor_sts[i]);
306316 }
307317
308− if (!cl_data->is_any_sensor_enabled ||
309− (mp2_ops->discovery_status && mp2_ops->discovery_status(privdata) == 0)) {
310− dev_warn(dev, "Failed to discover, sensors not enabled is %d\n", cl_data->is_any_sensor_enabled);
311− rc = -EOPNOTSUPP;
312− goto cleanup;
313− }
314318 schedule_delayed_work(&cl_data->work_buffer, msecs_to_jiffies(AMD_SFH_IDLE_LOOP));
315319 return 0;
316320
drivers/hid/amd-sfh-hid/amd_sfh_hid.c+3−1
@@ -171,11 +171,13 @@ err_hid_data: · 170 unmodified lines
171171 void amdtp_hid_remove(struct amdtp_cl_data *cli_data)
172172 {
173173 int i;
174+ struct amdtp_hid_data *hid_data;
174175
175176 for (i = 0; i < cli_data->num_hid_devices; ++i) {
176177 if (cli_data->hid_sensor_hubs[i]) {
177− kfree(cli_data->hid_sensor_hubs[i]->driver_data);
178+ hid_data = cli_data->hid_sensor_hubs[i]->driver_data;
178179 hid_destroy_device(cli_data->hid_sensor_hubs[i]);
180+ kfree(hid_data);
179181 cli_data->hid_sensor_hubs[i] = NULL;
180182 }
181183 }
drivers/hid/bpf/Kconfig+1−1
@@ -3,7 +3,7 @@ menu "HID-BPF support" · 2 unmodified lines
33
44 config HID_BPF
55 bool "HID-BPF support"
6− depends on BPF
6+ depends on BPF_JIT
77 depends on BPF_SYSCALL
88 depends on DYNAMIC_FTRACE_WITH_DIRECT_CALLS
99 help
drivers/hid/bpf/hid_bpf_struct_ops.c+5−0
@@ -183,6 +183,10 @@ static int hid_bpf_reg(void *kdata, struct bpf_link *link) · 182 unmodified lines
183183 struct hid_device *hdev;
184184 int count, err = 0;
185185
186+ /* prevent multiple attach of the same struct_ops */
187+ if (ops->hdev)
188+ return -EINVAL;
189+
186190 hdev = hid_get_device(ops->hid_id);
187191 if (IS_ERR(hdev))
188192 return PTR_ERR(hdev);
@@ -248,6 +252,7 @@ static void hid_bpf_unreg(void *kdata, struct bpf_link *link) · 59 unmodified lines
248252
249253 list_del_rcu(&ops->list);
250254 synchronize_srcu(&hdev->bpf.srcu);
255+ ops->hdev = NULL;
251256
252257 reconnect = hdev->bpf.rdesc_ops == ops;
253258 if (reconnect)
drivers/hid/hid-asus.c+3−0
@@ -1248,6 +1248,9 @@ static const struct hid_device_id asus_devices[] = { · 1247 unmodified lines
12481248 { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,
12491249 USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY),
12501250 QUIRK_USE_KBD_BACKLIGHT | QUIRK_ROG_NKEY_KEYBOARD },
1251+ { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,
1252+ USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY_X),
1253+ QUIRK_USE_KBD_BACKLIGHT | QUIRK_ROG_NKEY_KEYBOARD },
12511254 { HID_USB_DEVICE(USB_VENDOR_ID_ASUSTEK,
12521255 USB_DEVICE_ID_ASUSTEK_ROG_CLAYMORE_II_KEYBOARD),
12531256 QUIRK_ROG_CLAYMORE_II_KEYBOARD },
drivers/hid/hid-cougar.c+1−1
@@ -106,7 +106,7 @@ static void cougar_fix_g6_mapping(void) · 105 unmodified lines
106106 static __u8 *cougar_report_fixup(struct hid_device *hdev, __u8 *rdesc,
107107 unsigned int *rsize)
108108 {
109− if (rdesc[2] == 0x09 && rdesc[3] == 0x02 &&
109+ if (*rsize >= 117 && rdesc[2] == 0x09 && rdesc[3] == 0x02 &&
110110 (rdesc[115] | rdesc[116] << 8) >= HID_MAX_USAGES) {
111111 hid_info(hdev,
112112 "usage count exceeds max: fixing up report descriptor\n");
drivers/hid/hid-ids.h+3−0
@@ -210,6 +210,7 @@ · 209 unmodified lines
210210 #define USB_DEVICE_ID_ASUSTEK_ROG_NKEY_KEYBOARD3 0x1a30
211211 #define USB_DEVICE_ID_ASUSTEK_ROG_Z13_LIGHTBAR 0x18c6
212212 #define USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY 0x1abe
213+#define USB_DEVICE_ID_ASUSTEK_ROG_NKEY_ALLY_X 0x1b4c
213214 #define USB_DEVICE_ID_ASUSTEK_ROG_CLAYMORE_II_KEYBOARD 0x196b
214215 #define USB_DEVICE_ID_ASUSTEK_FX503VD_KEYBOARD 0x1869
215216
@@ -520,6 +521,8 @@ · 304 unmodified lines
520521 #define USB_DEVICE_ID_GENERAL_TOUCH_WIN8_PIT_E100 0xe100
521522
522523 #define I2C_VENDOR_ID_GOODIX 0x27c6
524+#define I2C_DEVICE_ID_GOODIX_01E8 0x01e8
525+#define I2C_DEVICE_ID_GOODIX_01E9 0x01e9
523526 #define I2C_DEVICE_ID_GOODIX_01F0 0x01f0
524527
525528 #define USB_VENDOR_ID_GOODTOUCH 0x1aad
drivers/hid/hid-multitouch.c+33−0
@@ -1441,6 +1441,30 @@ static int mt_event(struct hid_device *hid, struct hid_field *field, · 1440 unmodified lines
14411441 return 0;
14421442 }
14431443
1444+static __u8 *mt_report_fixup(struct hid_device *hdev, __u8 *rdesc,
1445+ unsigned int *size)
1446+{
1447+ if (hdev->vendor == I2C_VENDOR_ID_GOODIX &&
1448+ (hdev->product == I2C_DEVICE_ID_GOODIX_01E8 ||
1449+ hdev->product == I2C_DEVICE_ID_GOODIX_01E9)) {
1450+ if (rdesc[607] == 0x15) {
1451+ rdesc[607] = 0x25;
1452+ dev_info(
1453+ &hdev->dev,
1454+ "GT7868Q report descriptor fixup is applied.\n");
1455+ } else {
1456+ dev_info(
1457+ &hdev->dev,
1458+ "The byte is not expected for fixing the report descriptor. \
1459+It's possible that the touchpad firmware is not suitable for applying the fix. \
1460+got: %x\n",
1461+ rdesc[607]);
1462+ }
1463+ }
1464+
1465+ return rdesc;
1466+}
1467+
14441468 static void mt_report(struct hid_device *hid, struct hid_report *report)
14451469 {
14461470 struct mt_device *td = hid_get_drvdata(hid);
@@ -2035,6 +2059,14 @@ static const struct hid_device_id mt_devices[] = { · 588 unmodified lines
20352059 MT_BT_DEVICE(USB_VENDOR_ID_FRUCTEL,
20362060 USB_DEVICE_ID_GAMETEL_MT_MODE) },
20372061
2062+ /* Goodix GT7868Q devices */
2063+ { .driver_data = MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU,
2064+ HID_DEVICE(BUS_I2C, HID_GROUP_ANY, I2C_VENDOR_ID_GOODIX,
2065+ I2C_DEVICE_ID_GOODIX_01E8) },
2066+ { .driver_data = MT_CLS_WIN_8_FORCE_MULTI_INPUT_NSMU,
2067+ HID_DEVICE(BUS_I2C, HID_GROUP_ANY, I2C_VENDOR_ID_GOODIX,
2068+ I2C_DEVICE_ID_GOODIX_01E8) },
2069+
20382070 /* GoodTouch panels */
20392071 { .driver_data = MT_CLS_NSMU,
20402072 MT_USB_DEVICE(USB_VENDOR_ID_GOODTOUCH,
@@ -2270,6 +2302,7 @@ static struct hid_driver mt_driver = { · 229 unmodified lines
22702302 .feature_mapping = mt_feature_mapping,
22712303 .usage_table = mt_grabbed_usages,
22722304 .event = mt_event,
2305+ .report_fixup = mt_report_fixup,
22732306 .report = mt_report,
22742307 .suspend = pm_ptr(mt_suspend),
22752308 .reset_resume = pm_ptr(mt_reset_resume),
drivers/hid/wacom_wac.c+13−58
@@ -692,78 +692,28 @@ static bool wacom_is_art_pen(int tool_id) · 691 unmodified lines
692692
693693 static int wacom_intuos_get_tool_type(int tool_id)
694694 {
695− int tool_type = BTN_TOOL_PEN;
696−
697− if (wacom_is_art_pen(tool_id))
698− return tool_type;
699−
700695 switch (tool_id) {
701696 case 0x812: /* Inking pen */
702697 case 0x801: /* Intuos3 Inking pen */
703698 case 0x12802: /* Intuos4/5 Inking Pen */
704699 case 0x012:
705− tool_type = BTN_TOOL_PENCIL;
706− break;
707−
708− case 0x822: /* Pen */
709− case 0x842:
710− case 0x852:
711− case 0x823: /* Intuos3 Grip Pen */
712− case 0x813: /* Intuos3 Classic Pen */
713− case 0x802: /* Intuos4/5 13HD/24HD General Pen */
714− case 0x8e2: /* IntuosHT2 pen */
715− case 0x022:
716− case 0x200: /* Pro Pen 3 */
717− case 0x04200: /* Pro Pen 3 */
718− case 0x10842: /* MobileStudio Pro Pro Pen slim */
719− case 0x14802: /* Intuos4/5 13HD/24HD Classic Pen */
720− case 0x16802: /* Cintiq 13HD Pro Pen */
721− case 0x18802: /* DTH2242 Pen */
722− case 0x10802: /* Intuos4/5 13HD/24HD General Pen */
723− case 0x80842: /* Intuos Pro and Cintiq Pro 3D Pen */
724− tool_type = BTN_TOOL_PEN;
725− break;
700+ return BTN_TOOL_PENCIL;
726701
727702 case 0x832: /* Stroke pen */
728703 case 0x032:
729− tool_type = BTN_TOOL_BRUSH;
730− break;
704+ return BTN_TOOL_BRUSH;
731705
732706 case 0x007: /* Mouse 4D and 2D */
733707 case 0x09c:
734708 case 0x094:
735709 case 0x017: /* Intuos3 2D Mouse */
736710 case 0x806: /* Intuos4 Mouse */
737− tool_type = BTN_TOOL_MOUSE;
738− break;
711+ return BTN_TOOL_MOUSE;
739712
740713 case 0x096: /* Lens cursor */
741714 case 0x097: /* Intuos3 Lens cursor */
742715 case 0x006: /* Intuos4 Lens cursor */
743− tool_type = BTN_TOOL_LENS;
744− break;
745−
746− case 0x82a: /* Eraser */
747− case 0x84a:
748− case 0x85a:
749− case 0x91a:
750− case 0xd1a:
751− case 0x0fa:
752− case 0x82b: /* Intuos3 Grip Pen Eraser */
753− case 0x81b: /* Intuos3 Classic Pen Eraser */
754− case 0x91b: /* Intuos3 Airbrush Eraser */
755− case 0x80c: /* Intuos4/5 13HD/24HD Marker Pen Eraser */
756− case 0x80a: /* Intuos4/5 13HD/24HD General Pen Eraser */
757− case 0x90a: /* Intuos4/5 13HD/24HD Airbrush Eraser */
758− case 0x1480a: /* Intuos4/5 13HD/24HD Classic Pen Eraser */
759− case 0x1090a: /* Intuos4/5 13HD/24HD Airbrush Eraser */
760− case 0x1080c: /* Intuos4/5 13HD/24HD Art Pen Eraser */
761− case 0x1084a: /* MobileStudio Pro Pro Pen slim Eraser */
762− case 0x1680a: /* Cintiq 13HD Pro Pen Eraser */
763− case 0x1880a: /* DTH2242 Eraser */
764− case 0x1080a: /* Intuos4/5 13HD/24HD General Pen Eraser */
765− tool_type = BTN_TOOL_RUBBER;
766− break;
716+ return BTN_TOOL_LENS;
767717
768718 case 0xd12:
769719 case 0x912:
@@ -771,10 +721,13 @@ static int wacom_intuos_get_tool_type(int tool_id) · 1 unmodified line
771721 case 0x913: /* Intuos3 Airbrush */
772722 case 0x902: /* Intuos4/5 13HD/24HD Airbrush */
773723 case 0x10902: /* Intuos4/5 13HD/24HD Airbrush */
774− tool_type = BTN_TOOL_AIRBRUSH;
775− break;
724+ return BTN_TOOL_AIRBRUSH;
725+
726+ default:
727+ if (tool_id & 0x0008)
728+ return BTN_TOOL_RUBBER;
729+ return BTN_TOOL_PEN;
776730 }
777− return tool_type;
778731 }
779732
780733 static void wacom_exit_report(struct wacom_wac *wacom)
@@ -1925,12 +1878,14 @@ static void wacom_map_usage(struct input_dev *input, struct hid_usage *usage, · 1144 unmodified lines
19251878 int fmax = field->logical_maximum;
19261879 unsigned int equivalent_usage = wacom_equivalent_usage(usage->hid);
19271880 int resolution_code = code;
1928− int resolution = hidinput_calc_abs_res(field, resolution_code);
1881+ int resolution;
19291882
19301883 if (equivalent_usage == HID_DG_TWIST) {
19311884 resolution_code = ABS_RZ;
19321885 }
19331886
1887+ resolution = hidinput_calc_abs_res(field, resolution_code);
1888+
19341889 if (equivalent_usage == HID_GD_X) {
19351890 fmin += features->offset_left;
19361891 fmax -= features->offset_right;
drivers/hwmon/adt7475.c+12−12
@@ -22,23 +22,23 @@ · 21 unmodified lines
2222 #include <linux/util_macros.h>
2323
2424 /* Indexes for the sysfs hooks */
25−
26−#define INPUT 0
27−#define MIN 1
28−#define MAX 2
29−#define CONTROL 3
30−#define OFFSET 3
31−#define AUTOMIN 4
32−#define THERM 5
33−#define HYSTERSIS 6
34−
25+enum adt_sysfs_id {
26+ INPUT = 0,
27+ MIN = 1,
28+ MAX = 2,
29+ CONTROL = 3,
30+ OFFSET = 3, // Dup
31+ AUTOMIN = 4,
32+ THERM = 5,
33+ HYSTERSIS = 6,
3534 /*
3635 * These are unique identifiers for the sysfs functions - unlike the
3736 * numbers above, these are not also indexes into an array
3837 */
38+ ALARM = 9,
39+ FAULT = 10,
40+};
3941
40−#define ALARM 9
41−#define FAULT 10
4242
4343 /* 7475 Common Registers */
4444
drivers/hwmon/asus-ec-sensors.c+1−1
@@ -420,7 +420,7 @@ static const struct ec_board_info board_info_strix_b550_i_gaming = { · 419 unmodified lines
420420
421421 static const struct ec_board_info board_info_strix_x570_e_gaming = {
422422 .sensors = SENSOR_SET_TEMP_CHIPSET_CPU_MB |
423− SENSOR_TEMP_T_SENSOR | SENSOR_TEMP_VRM |
423+ SENSOR_TEMP_T_SENSOR |
424424 SENSOR_FAN_CHIPSET | SENSOR_CURR_CPU |
425425 SENSOR_IN_CPU_CORE,
426426 .mutex_path = ASUS_HW_ACCESS_MUTEX_ASMX,
drivers/hwmon/pt5161l.c+2−2
@@ -427,7 +427,7 @@ static int pt5161l_read(struct device *dev, enum hwmon_sensor_types type, · 426 unmodified lines
427427 struct pt5161l_data *data = dev_get_drvdata(dev);
428428 int ret;
429429 u8 buf[8];
430− long adc_code;
430+ u32 adc_code;
431431
432432 switch (attr) {
433433 case hwmon_temp_input:
@@ -449,7 +449,7 @@ static int pt5161l_read(struct device *dev, enum hwmon_sensor_types type, · 15 unmodified lines
449449
450450 adc_code = buf[3] << 24 | buf[2] << 16 | buf[1] << 8 | buf[0];
451451 if (adc_code == 0 || adc_code >= 0x3ff) {
452− dev_dbg(dev, "Invalid adc_code %lx\n", adc_code);
452+ dev_dbg(dev, "Invalid adc_code %x\n", adc_code);
453453 return -EIO;
454454 }
455455
drivers/i2c/busses/i2c-qcom-geni.c+7−2
@@ -986,12 +986,17 @@ static int __maybe_unused geni_i2c_runtime_resume(struct device *dev) · 985 unmodified lines
986986 return ret;
987987
988988 ret = clk_prepare_enable(gi2c->core_clk);
989− if (ret)
989+ if (ret) {
990+ geni_icc_disable(&gi2c->se);
990991 return ret;
992+ }
991993
992994 ret = geni_se_resources_on(&gi2c->se);
993− if (ret)
995+ if (ret) {
996+ clk_disable_unprepare(gi2c->core_clk);
997+ geni_icc_disable(&gi2c->se);
994998 return ret;
999+ }
9951000
9961001 enable_irq(gi2c->irq);
9971002 gi2c->suspended = 0;
drivers/i2c/busses/i2c-tegra.c+2−2
@@ -1802,9 +1802,9 @@ static int tegra_i2c_probe(struct platform_device *pdev) · 1801 unmodified lines
18021802 * domain.
18031803 *
18041804 * VI I2C device shouldn't be marked as IRQ-safe because VI I2C won't
1805− * be used for atomic transfers.
1805+ * be used for atomic transfers. ACPI device is not IRQ safe also.
18061806 */
1807− if (!IS_VI(i2c_dev))
1807+ if (!IS_VI(i2c_dev) && !has_acpi_companion(i2c_dev->dev))
18081808 pm_runtime_irq_safe(i2c_dev->dev);
18091809
18101810 pm_runtime_enable(i2c_dev->dev);
drivers/i2c/i2c-slave-testunit.c+2−2
@@ -18,7 +18,7 @@ · 17 unmodified lines
1818
1919 enum testunit_cmds {
2020 TU_CMD_READ_BYTES = 1, /* save 0 for ABORT, RESET or similar */
21− TU_CMD_HOST_NOTIFY,
21+ TU_CMD_SMBUS_HOST_NOTIFY,
2222 TU_CMD_SMBUS_BLOCK_PROC_CALL,
2323 TU_NUM_CMDS
2424 };
@@ -60,7 +60,7 @@ static void i2c_slave_testunit_work(struct work_struct *work) · 35 unmodified lines
6060 msg.len = tu->regs[TU_REG_DATAH];
6161 break;
6262
63− case TU_CMD_HOST_NOTIFY:
63+ case TU_CMD_SMBUS_HOST_NOTIFY:
6464 msg.addr = 0x08;
6565 msg.flags = 0;
6666 msg.len = 3;
drivers/i2c/i2c-smbus.c+57−7
@@ -34,6 +34,7 @@ static int smbus_do_alert(struct device *dev, void *addrp) · 33 unmodified lines
3434 struct i2c_client *client = i2c_verify_client(dev);
3535 struct alert_data *data = addrp;
3636 struct i2c_driver *driver;
37+ int ret;
3738
3839 if (!client || client->addr != data->addr)
3940 return 0;
@@ -47,16 +48,47 @@ static int smbus_do_alert(struct device *dev, void *addrp) · 7 unmodified lines
4748 device_lock(dev);
4849 if (client->dev.driver) {
4950 driver = to_i2c_driver(client->dev.driver);
50− if (driver->alert)
51+ if (driver->alert) {
52+ /* Stop iterating after we find the device */
5153 driver->alert(client, data->type, data->data);
52− else
54+ ret = -EBUSY;
55+ } else {
5356 dev_warn(&client->dev, "no driver alert()!\n");
54− } else
57+ ret = -EOPNOTSUPP;
58+ }
59+ } else {
5560 dev_dbg(&client->dev, "alert with no driver\n");
61+ ret = -ENODEV;
62+ }
63+ device_unlock(dev);
64+
65+ return ret;
66+}
67+
68+/* Same as above, but call back all drivers with alert handler */
69+
70+static int smbus_do_alert_force(struct device *dev, void *addrp)
71+{
72+ struct i2c_client *client = i2c_verify_client(dev);
73+ struct alert_data *data = addrp;
74+ struct i2c_driver *driver;
75+
76+ if (!client || (client->flags & I2C_CLIENT_TEN))
77+ return 0;
78+
79+ /*
80+ * Drivers should either disable alerts, or provide at least
81+ * a minimal handler. Lock so the driver won't change.
82+ */
83+ device_lock(dev);
84+ if (client->dev.driver) {
85+ driver = to_i2c_driver(client->dev.driver);
86+ if (driver->alert)
87+ driver->alert(client, data->type, data->data);
88+ }
5689 device_unlock(dev);
5790
58− /* Stop iterating after we find the device */
59− return -EBUSY;
91+ return 0;
6092 }
6193
6294 /*
@@ -67,6 +99,7 @@ static irqreturn_t smbus_alert(int irq, void *d) · 4 unmodified lines
6799 {
68100 struct i2c_smbus_alert *alert = d;
69101 struct i2c_client *ara;
102+ unsigned short prev_addr = I2C_CLIENT_END; /* Not a valid address */
70103
71104 ara = alert->ara;
72105
@@ -94,8 +127,25 @@ static irqreturn_t smbus_alert(int irq, void *d) · 21 unmodified lines
94127 data.addr, data.data);
95128
96129 /* Notify driver for the device which issued the alert */
97− device_for_each_child(&ara->adapter->dev, &data,
98− smbus_do_alert);
130+ status = device_for_each_child(&ara->adapter->dev, &data,
131+ smbus_do_alert);
132+ /*
133+ * If we read the same address more than once, and the alert
134+ * was not handled by a driver, it won't do any good to repeat
135+ * the loop because it will never terminate. Try again, this
136+ * time calling the alert handlers of all devices connected to
137+ * the bus, and abort the loop afterwards. If this helps, we
138+ * are all set. If it doesn't, there is nothing else we can do,
139+ * so we might as well abort the loop.
140+ * Note: This assumes that a driver with alert handler handles
141+ * the alert properly and clears it if necessary.
142+ */
143+ if (data.addr == prev_addr && status != -EBUSY) {
144+ device_for_each_child(&ara->adapter->dev, &data,
145+ smbus_do_alert_force);
146+ break;
147+ }
148+ prev_addr = data.addr;
99149 }
100150
101151 return IRQ_HANDLED;
drivers/input/input-mt.c+3−0
@@ -46,6 +46,9 @@ int input_mt_init_slots(struct input_dev *dev, unsigned int num_slots, · 45 unmodified lines
4646 return 0;
4747 if (mt)
4848 return mt->num_slots != num_slots ? -EINVAL : 0;
49+ /* Arbitrary limit for avoiding too large memory allocation. */
50+ if (num_slots > 1024)
51+ return -EINVAL;
4952
5053 mt = kzalloc(struct_size(mt, slots, num_slots), GFP_KERNEL);
5154 if (!mt)
drivers/input/joystick/adc-joystick.c+5−2
@@ -182,8 +182,11 @@ static int adc_joystick_set_axes(struct device *dev, struct adc_joystick *joy) · 181 unmodified lines
182182 swap(range[0], range[1]);
183183 }
184184
185− fwnode_property_read_u32(child, "abs-fuzz", &fuzz);
186− fwnode_property_read_u32(child, "abs-flat", &flat);
185+ if (fwnode_property_read_u32(child, "abs-fuzz", &fuzz))
186+ fuzz = 0;
187+
188+ if (fwnode_property_read_u32(child, "abs-flat", &flat))
189+ flat = 0;
187190
188191 input_set_abs_params(joy->input, axes[i].code,
189192 range[0], range[1], fuzz, flat);
drivers/input/misc/uinput.c+14−0
@@ -417,6 +417,20 @@ static int uinput_validate_absinfo(struct input_dev *dev, unsigned int code, · 416 unmodified lines
417417 return -EINVAL;
418418 }
419419
420+ /*
421+ * Limit number of contacts to a reasonable value (100). This
422+ * ensures that we need less than 2 pages for struct input_mt
423+ * (we are not using in-kernel slot assignment so not going to
424+ * allocate memory for the "red" table), and we should have no
425+ * trouble getting this much memory.
426+ */
427+ if (code == ABS_MT_SLOT && max > 99) {
428+ printk(KERN_DEBUG
429+ "%s: unreasonably large number of slots requested: %d\n",
430+ UINPUT_NAME, max);
431+ return -EINVAL;
432+ }
433+
420434 return 0;
421435 }
422436
drivers/input/mouse/cypress_ps2.c+13−45
@@ -91,48 +91,6 @@ static int cypress_ps2_ext_cmd(struct psmouse *psmouse, u8 prefix, u8 nibble) · 90 unmodified lines
9191 return rc;
9292 }
9393
94−static int cypress_ps2_read_cmd_status(struct psmouse *psmouse,
95− u8 cmd, u8 *param)
96−{
97− struct ps2dev *ps2dev = &psmouse->ps2dev;
98− enum psmouse_state old_state;
99− int pktsize;
100− int rc;
101−
102− ps2_begin_command(ps2dev);
103−
104− old_state = psmouse->state;
105− psmouse->state = PSMOUSE_CMD_MODE;
106− psmouse->pktcnt = 0;
107−
108− pktsize = (cmd == CYTP_CMD_READ_TP_METRICS) ? 8 : 3;
109− memset(param, 0, pktsize);
110−
111− rc = cypress_ps2_sendbyte(psmouse, PSMOUSE_CMD_GETINFO & 0xff);
112− if (rc)
113− goto out;
114−
115− if (!wait_event_timeout(ps2dev->wait,
116− psmouse->pktcnt >= pktsize,
117− msecs_to_jiffies(CYTP_CMD_TIMEOUT))) {
118− rc = -ETIMEDOUT;
119− goto out;
120− }
121−
122− memcpy(param, psmouse->packet, pktsize);
123−
124− psmouse_dbg(psmouse, "Command 0x%02x response data (0x): %*ph\n",
125− cmd, pktsize, param);
126−
127−out:
128− psmouse->state = old_state;
129− psmouse->pktcnt = 0;
130−
131− ps2_end_command(ps2dev);
132−
133− return rc;
134−}
135−
13694 static bool cypress_verify_cmd_state(struct psmouse *psmouse, u8 cmd, u8* param)
13795 {
13896 bool rate_match = false;
@@ -166,6 +124,8 @@ static bool cypress_verify_cmd_state(struct psmouse *psmouse, u8 cmd, u8* param) · 27 unmodified lines
166124 static int cypress_send_ext_cmd(struct psmouse *psmouse, u8 cmd, u8 *param)
167125 {
168126 u8 cmd_prefix = PSMOUSE_CMD_SETRES & 0xff;
127+ unsigned int resp_size = cmd == CYTP_CMD_READ_TP_METRICS ? 8 : 3;
128+ unsigned int ps2_cmd = (PSMOUSE_CMD_GETINFO & 0xff) | (resp_size << 8);
169129 int tries = CYTP_PS2_CMD_TRIES;
170130 int error;
171131
@@ -179,10 +139,18 @@ static int cypress_send_ext_cmd(struct psmouse *psmouse, u8 cmd, u8 *param) · 7 unmodified lines
179139 cypress_ps2_ext_cmd(psmouse, cmd_prefix, DECODE_CMD_BB(cmd));
180140 cypress_ps2_ext_cmd(psmouse, cmd_prefix, DECODE_CMD_AA(cmd));
181141
182− error = cypress_ps2_read_cmd_status(psmouse, cmd, param);
183− if (!error && cypress_verify_cmd_state(psmouse, cmd, param))
184− return 0;
142+ error = ps2_command(&psmouse->ps2dev, param, ps2_cmd);
143+ if (error) {
144+ psmouse_dbg(psmouse, "Command 0x%02x failed: %d\n",
145+ cmd, error);
146+ } else {
147+ psmouse_dbg(psmouse,
148+ "Command 0x%02x response data (0x): %*ph\n",
149+ cmd, resp_size, param);
185150
151+ if (cypress_verify_cmd_state(psmouse, cmd, param))
152+ return 0;
153+ }
186154 } while (--tries > 0);
187155
188156 return -EIO;
drivers/input/mouse/synaptics.c+1−0
@@ -189,6 +189,7 @@ static const char * const smbus_pnp_ids[] = { · 188 unmodified lines
189189 "LEN2054", /* E480 */
190190 "LEN2055", /* E580 */
191191 "LEN2068", /* T14 Gen 1 */
192+ "SYN3015", /* HP EliteBook 840 G2 */
192193 "SYN3052", /* HP EliteBook 840 G4 */
193194 "SYN3221", /* HP 15-ay000 */
194195 "SYN323d", /* HP Spectre X360 13-w013dx */
drivers/input/serio/i8042-acpipnpio.h+17−12
@@ -83,6 +83,7 @@ static inline void i8042_write_command(int val) · 82 unmodified lines
8383 #define SERIO_QUIRK_KBDRESET BIT(12)
8484 #define SERIO_QUIRK_DRITEK BIT(13)
8585 #define SERIO_QUIRK_NOPNP BIT(14)
86+#define SERIO_QUIRK_FORCENORESTORE BIT(15)
8687
8788 /* Quirk table for different mainboards. Options similar or identical to i8042
8889 * module parameters.
@@ -626,6 +627,15 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { · 537 unmodified lines
626627 },
627628 .driver_data = (void *)(SERIO_QUIRK_NOMUX)
628629 },
630+ {
631+ /* Fujitsu Lifebook E756 */
632+ /* https://bugzilla.suse.com/show_bug.cgi?id=1229056 */
633+ .matches = {
634+ DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
635+ DMI_MATCH(DMI_PRODUCT_NAME, "LIFEBOOK E756"),
636+ },
637+ .driver_data = (void *)(SERIO_QUIRK_NOMUX)
638+ },
629639 {
630640 /* Fujitsu Lifebook E5411 */
631641 .matches = {
@@ -1149,18 +1159,10 @@ static const struct dmi_system_id i8042_dmi_quirk_table[] __initconst = { · 517 unmodified lines
11491159 SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP)
11501160 },
11511161 {
1152− /*
1153− * Setting SERIO_QUIRK_NOMUX or SERIO_QUIRK_RESET_ALWAYS makes
1154− * the keyboard very laggy for ~5 seconds after boot and
1155− * sometimes also after resume.
1156− * However both are required for the keyboard to not fail
1157− * completely sometimes after boot or resume.
1158− */
11591162 .matches = {
11601163 DMI_MATCH(DMI_BOARD_NAME, "N150CU"),
11611164 },
1162− .driver_data = (void *)(SERIO_QUIRK_NOMUX | SERIO_QUIRK_RESET_ALWAYS |
1163− SERIO_QUIRK_NOLOOP | SERIO_QUIRK_NOPNP)
1165+ .driver_data = (void *)(SERIO_QUIRK_FORCENORESTORE)
11641166 },
11651167 {
11661168 .matches = {
@@ -1685,6 +1687,8 @@ static void __init i8042_check_quirks(void) · 518 unmodified lines
16851687 if (quirks & SERIO_QUIRK_NOPNP)
16861688 i8042_nopnp = true;
16871689 #endif
1690+ if (quirks & SERIO_QUIRK_FORCENORESTORE)
1691+ i8042_forcenorestore = true;
16881692 }
16891693 #else
16901694 static inline void i8042_check_quirks(void) {}
@@ -1718,7 +1722,7 @@ static int __init i8042_platform_init(void) · 27 unmodified lines
17181722
17191723 i8042_check_quirks();
17201724
1721− pr_debug("Active quirks (empty means none):%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
1725+ pr_debug("Active quirks (empty means none):%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
17221726 i8042_nokbd ? " nokbd" : "",
17231727 i8042_noaux ? " noaux" : "",
17241728 i8042_nomux ? " nomux" : "",
@@ -1738,10 +1742,11 @@ static int __init i8042_platform_init(void) · 13 unmodified lines
17381742 "",
17391743 #endif
17401744 #ifdef CONFIG_PNP
1741− i8042_nopnp ? " nopnp" : "");
1745+ i8042_nopnp ? " nopnp" : "",
17421746 #else
1743− "");
1747+ "",
17441748 #endif
1749+ i8042_forcenorestore ? " forcenorestore" : "");
17451750
17461751 retval = i8042_pnp_init();
17471752 if (retval)
drivers/input/serio/i8042.c+7−3
@@ -115,6 +115,10 @@ module_param_named(nopnp, i8042_nopnp, bool, 0); · 114 unmodified lines
115115 MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
116116 #endif
117117
118+static bool i8042_forcenorestore;
119+module_param_named(forcenorestore, i8042_forcenorestore, bool, 0);
120+MODULE_PARM_DESC(forcenorestore, "Force no restore on s3 resume, copying s2idle behaviour");
121+
118122 #define DEBUG
119123 #ifdef DEBUG
120124 static bool i8042_debug;
@@ -1232,7 +1236,7 @@ static int i8042_pm_suspend(struct device *dev) · 1111 unmodified lines
12321236 {
12331237 int i;
12341238
1235− if (pm_suspend_via_firmware())
1239+ if (!i8042_forcenorestore && pm_suspend_via_firmware())
12361240 i8042_controller_reset(true);
12371241
12381242 /* Set up serio interrupts for system wakeup. */
@@ -1248,7 +1252,7 @@ static int i8042_pm_suspend(struct device *dev) · 9 unmodified lines
12481252
12491253 static int i8042_pm_resume_noirq(struct device *dev)
12501254 {
1251− if (!pm_resume_via_firmware())
1255+ if (i8042_forcenorestore || !pm_resume_via_firmware())
12521256 i8042_interrupt(0, NULL);
12531257
12541258 return 0;
@@ -1271,7 +1275,7 @@ static int i8042_pm_resume(struct device *dev) · 16 unmodified lines
12711275 * not restore the controller state to whatever it had been at boot
12721276 * time, so we do not need to do anything.
12731277 */
1274− if (!pm_suspend_via_firmware())
1278+ if (i8042_forcenorestore || !pm_suspend_via_firmware())
12751279 return 0;
12761280
12771281 /*
drivers/input/touchscreen/ads7846.c+1−1
@@ -824,7 +824,7 @@ static void ads7846_read_state(struct ads7846 *ts) · 823 unmodified lines
824824 m = &ts->msg[msg_idx];
825825 error = spi_sync(ts->spi, m);
826826 if (error) {
827− dev_err(&ts->spi->dev, "spi_sync --> %d\n", error);
827+ dev_err_ratelimited(&ts->spi->dev, "spi_sync --> %d\n", error);
828828 packet->ignore = true;
829829 return;
830830 }
drivers/input/touchscreen/cyttsp4_core.c+1−1
@@ -871,7 +871,7 @@ static void cyttsp4_get_mt_touches(struct cyttsp4_mt_data *md, int num_cur_tch) · 870 unmodified lines
871871 struct cyttsp4_touch tch;
872872 int sig;
873873 int i, j, t = 0;
874− int ids[max(CY_TMA1036_MAX_TCH, CY_TMA4XX_MAX_TCH)];
874+ int ids[MAX(CY_TMA1036_MAX_TCH, CY_TMA4XX_MAX_TCH)];
875875
876876 memset(ids, 0, si->si_ofs.tch_abs[CY_TCH_T].max * sizeof(int));
877877 for (i = 0; i < num_cur_tch; i++) {
drivers/input/touchscreen/edt-ft5x06.c+6−0
@@ -1474,6 +1474,10 @@ static const struct edt_i2c_chip_data edt_ft6236_data = { · 1473 unmodified lines
14741474 .max_support_points = 2,
14751475 };
14761476
1477+static const struct edt_i2c_chip_data edt_ft8201_data = {
1478+ .max_support_points = 10,
1479+};
1480+
14771481 static const struct edt_i2c_chip_data edt_ft8719_data = {
14781482 .max_support_points = 10,
14791483 };
@@ -1485,6 +1489,7 @@ static const struct i2c_device_id edt_ft5x06_ts_id[] = { · 5 unmodified lines
14851489 { .name = "ft5452", .driver_data = (long)&edt_ft5452_data },
14861490 /* Note no edt- prefix for compatibility with the ft6236.c driver */
14871491 { .name = "ft6236", .driver_data = (long)&edt_ft6236_data },
1492+ { .name = "ft8201", .driver_data = (long)&edt_ft8201_data },
14881493 { .name = "ft8719", .driver_data = (long)&edt_ft8719_data },
14891494 { /* sentinel */ }
14901495 };
@@ -1500,6 +1505,7 @@ static const struct of_device_id edt_ft5x06_of_match[] = { · 9 unmodified lines
15001505 { .compatible = "focaltech,ft5452", .data = &edt_ft5452_data },
15011506 /* Note focaltech vendor prefix for compatibility with ft6236.c */
15021507 { .compatible = "focaltech,ft6236", .data = &edt_ft6236_data },
1508+ { .compatible = "focaltech,ft8201", .data = &edt_ft8201_data },
15031509 { .compatible = "focaltech,ft8719", .data = &edt_ft8719_data },
15041510 { /* sentinel */ }
15051511 };
drivers/input/touchscreen/himax_hx83112b.c+2−12
@@ -130,17 +130,6 @@ static int himax_bus_read(struct himax_ts_data *ts, u32 address, void *dst, · 129 unmodified lines
130130 return 0;
131131 }
132132
133−static int himax_read_mcu(struct himax_ts_data *ts, u32 address, u32 *dst)
134−{
135− int error;
136−
137− error = himax_bus_read(ts, address, dst, sizeof(dst));
138− if (error)
139− return error;
140−
141− return 0;
142−}
143−
144133 static void himax_reset(struct himax_ts_data *ts)
145134 {
146135 gpiod_set_value_cansleep(ts->gpiod_rst, 1);
@@ -160,7 +149,8 @@ static int himax_read_product_id(struct himax_ts_data *ts, u32 *product_id) · 13 unmodified lines
160149 {
161150 int error;
162151
163− error = himax_read_mcu(ts, HIMAX_REG_ADDR_ICID, product_id);
152+ error = himax_bus_read(ts, HIMAX_REG_ADDR_ICID, product_id,
153+ sizeof(*product_id));
164154 if (error)
165155 return error;
166156
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c+1−1
@@ -1777,7 +1777,7 @@ static int arm_smmu_handle_evt(struct arm_smmu_device *smmu, u64 *evt) · 1776 unmodified lines
17771777 goto out_unlock;
17781778 }
17791779
1780− iommu_report_device_fault(master->dev, &fault_evt);
1780+ ret = iommu_report_device_fault(master->dev, &fault_evt);
17811781 out_unlock:
17821782 mutex_unlock(&smmu->streams_mutex);
17831783 return ret;
drivers/iommu/intel/iommu.c+6−2
@@ -1944,6 +1944,7 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 · 1943 unmodified lines
19441944 {
19451945 struct intel_iommu *iommu = info->iommu;
19461946 struct context_entry *context;
1947+ u16 did;
19471948
19481949 spin_lock(&iommu->lock);
19491950 context = iommu_context_addr(iommu, bus, devfn, 0);
@@ -1952,10 +1953,11 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 · 2 unmodified lines
19521953 return;
19531954 }
19541955
1956+ did = context_domain_id(context);
19551957 context_clear_entry(context);
19561958 __iommu_flush_cache(iommu, context, sizeof(*context));
19571959 spin_unlock(&iommu->lock);
1958− intel_context_flush_present(info, context, true);
1960+ intel_context_flush_present(info, context, did, true);
19591961 }
19601962
19611963 static int domain_setup_first_level(struct intel_iommu *iommu,
@@ -4249,6 +4251,7 @@ static int context_flip_pri(struct device_domain_info *info, bool enable) · 2287 unmodified lines
42494251 struct intel_iommu *iommu = info->iommu;
42504252 u8 bus = info->bus, devfn = info->devfn;
42514253 struct context_entry *context;
4254+ u16 did;
42524255
42534256 spin_lock(&iommu->lock);
42544257 if (context_copied(iommu, bus, devfn)) {
@@ -4261,6 +4264,7 @@ static int context_flip_pri(struct device_domain_info *info, bool enable) · 6 unmodified lines
42614264 spin_unlock(&iommu->lock);
42624265 return -ENODEV;
42634266 }
4267+ did = context_domain_id(context);
42644268
42654269 if (enable)
42664270 context_set_sm_pre(context);
@@ -4269,7 +4273,7 @@ static int context_flip_pri(struct device_domain_info *info, bool enable) · 2 unmodified lines
42694273
42704274 if (!ecap_coherent(iommu->ecap))
42714275 clflush_cache_range(context, sizeof(*context));
4272− intel_context_flush_present(info, context, true);
4276+ intel_context_flush_present(info, context, did, true);
42734277 spin_unlock(&iommu->lock);
42744278
42754279 return 0;
drivers/iommu/intel/iommu.h+1−1
@@ -1154,7 +1154,7 @@ void cache_tag_flush_range_np(struct dmar_domain *domain, unsigned long start, · 1153 unmodified lines
11541154
11551155 void intel_context_flush_present(struct device_domain_info *info,
11561156 struct context_entry *context,
1157− bool affect_domains);
1157+ u16 did, bool affect_domains);
11581158
11591159 #ifdef CONFIG_INTEL_IOMMU_SVM
11601160 void intel_svm_check(struct intel_iommu *iommu);
drivers/iommu/intel/pasid.c+4−3
@@ -683,6 +683,7 @@ static void device_pasid_table_teardown(struct device *dev, u8 bus, u8 devfn) · 682 unmodified lines
683683 struct device_domain_info *info = dev_iommu_priv_get(dev);
684684 struct intel_iommu *iommu = info->iommu;
685685 struct context_entry *context;
686+ u16 did;
686687
687688 spin_lock(&iommu->lock);
688689 context = iommu_context_addr(iommu, bus, devfn, false);
@@ -691,10 +692,11 @@ static void device_pasid_table_teardown(struct device *dev, u8 bus, u8 devfn) · 2 unmodified lines
691692 return;
692693 }
693694
695+ did = context_domain_id(context);
694696 context_clear_entry(context);
695697 __iommu_flush_cache(iommu, context, sizeof(*context));
696698 spin_unlock(&iommu->lock);
697− intel_context_flush_present(info, context, false);
699+ intel_context_flush_present(info, context, did, false);
698700 }
699701
700702 static int pci_pasid_table_teardown(struct pci_dev *pdev, u16 alias, void *data)
@@ -885,10 +887,9 @@ static void __context_flush_dev_iotlb(struct device_domain_info *info) · 184 unmodified lines
885887 */
886888 void intel_context_flush_present(struct device_domain_info *info,
887889 struct context_entry *context,
888− bool flush_domains)
890+ u16 did, bool flush_domains)
889891 {
890892 struct intel_iommu *iommu = info->iommu;
891− u16 did = context_domain_id(context);
892893 struct pasid_entry *pte;
893894 int i;
894895
drivers/iommu/io-pgfault.c+83−37
@@ -115,6 +115,59 @@ static struct iopf_group *iopf_group_alloc(struct iommu_fault_param *iopf_param, · 114 unmodified lines
115115 return group;
116116 }
117117
118+static struct iommu_attach_handle *find_fault_handler(struct device *dev,
119+ struct iopf_fault *evt)
120+{
121+ struct iommu_fault *fault = &evt->fault;
122+ struct iommu_attach_handle *attach_handle;
123+
124+ if (fault->prm.flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID) {
125+ attach_handle = iommu_attach_handle_get(dev->iommu_group,
126+ fault->prm.pasid, 0);
127+ if (IS_ERR(attach_handle)) {
128+ const struct iommu_ops *ops = dev_iommu_ops(dev);
129+
130+ if (!ops->user_pasid_table)
131+ return NULL;
132+ /*
133+ * The iommu driver for this device supports user-
134+ * managed PASID table. Therefore page faults for
135+ * any PASID should go through the NESTING domain
136+ * attached to the device RID.
137+ */
138+ attach_handle = iommu_attach_handle_get(
139+ dev->iommu_group, IOMMU_NO_PASID,
140+ IOMMU_DOMAIN_NESTED);
141+ if (IS_ERR(attach_handle))
142+ return NULL;
143+ }
144+ } else {
145+ attach_handle = iommu_attach_handle_get(dev->iommu_group,
146+ IOMMU_NO_PASID, 0);
147+
148+ if (IS_ERR(attach_handle))
149+ return NULL;
150+ }
151+
152+ if (!attach_handle->domain->iopf_handler)
153+ return NULL;
154+
155+ return attach_handle;
156+}
157+
158+static void iopf_error_response(struct device *dev, struct iopf_fault *evt)
159+{
160+ const struct iommu_ops *ops = dev_iommu_ops(dev);
161+ struct iommu_fault *fault = &evt->fault;
162+ struct iommu_page_response resp = {
163+ .pasid = fault->prm.pasid,
164+ .grpid = fault->prm.grpid,
165+ .code = IOMMU_PAGE_RESP_INVALID
166+ };
167+
168+ ops->page_response(dev, evt, &resp);
169+}
170+
118171 /**
119172 * iommu_report_device_fault() - Report fault event to device driver
120173 * @dev: the device
@@ -153,23 +206,39 @@ static struct iopf_group *iopf_group_alloc(struct iommu_fault_param *iopf_param, · 32 unmodified lines
153206 * handling framework should guarantee that the iommu domain could only be
154207 * freed after the device has stopped generating page faults (or the iommu
155208 * hardware has been set to block the page faults) and the pending page faults
156− * have been flushed.
209+ * have been flushed. In case no page fault handler is attached or no iopf params
210+ * are setup, then the ops->page_response() is called to complete the evt.
211+ *
212+ * Returns 0 on success, or an error in case of a bad/failed iopf setup.
157213 */
158−void iommu_report_device_fault(struct device *dev, struct iopf_fault *evt)
214+int iommu_report_device_fault(struct device *dev, struct iopf_fault *evt)
159215 {
216+ struct iommu_attach_handle *attach_handle;
160217 struct iommu_fault *fault = &evt->fault;
161218 struct iommu_fault_param *iopf_param;
162219 struct iopf_group abort_group = {};
163220 struct iopf_group *group;
164221
222+ attach_handle = find_fault_handler(dev, evt);
223+ if (!attach_handle)
224+ goto err_bad_iopf;
225+
226+ /*
227+ * Something has gone wrong if a fault capable domain is attached but no
228+ * iopf_param is setup
229+ */
165230 iopf_param = iopf_get_dev_fault_param(dev);
166231 if (WARN_ON(!iopf_param))
167− return;
232+ goto err_bad_iopf;
168233
169234 if (!(fault->prm.flags & IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE)) {
170− report_partial_fault(iopf_param, fault);
235+ int ret;
236+
237+ ret = report_partial_fault(iopf_param, fault);
171238 iopf_put_dev_fault_param(iopf_param);
172239 /* A request that is not the last does not need to be ack'd */
240+
241+ return ret;
173242 }
174243
175244 /*
@@ -184,38 +253,7 @@ void iommu_report_device_fault(struct device *dev, struct iopf_fault *evt) · 8 unmodified lines
184253 if (group == &abort_group)
185254 goto err_abort;
186255
187− if (fault->prm.flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID) {
188− group->attach_handle = iommu_attach_handle_get(dev->iommu_group,
189− fault->prm.pasid,
190− 0);
191− if (IS_ERR(group->attach_handle)) {
192− const struct iommu_ops *ops = dev_iommu_ops(dev);
193−
194− if (!ops->user_pasid_table)
195− goto err_abort;
196−
197− /*
198− * The iommu driver for this device supports user-
199− * managed PASID table. Therefore page faults for
200− * any PASID should go through the NESTING domain
201− * attached to the device RID.
202− */
203− group->attach_handle =
204− iommu_attach_handle_get(dev->iommu_group,
205− IOMMU_NO_PASID,
206− IOMMU_DOMAIN_NESTED);
207− if (IS_ERR(group->attach_handle))
208− goto err_abort;
209− }
210− } else {
211− group->attach_handle =
212− iommu_attach_handle_get(dev->iommu_group, IOMMU_NO_PASID, 0);
213− if (IS_ERR(group->attach_handle))
214− goto err_abort;
215− }
216−
217− if (!group->attach_handle->domain->iopf_handler)
218− goto err_abort;
256+ group->attach_handle = attach_handle;
219257
220258 /*
221259 * On success iopf_handler must call iopf_group_response() and
@@ -224,7 +262,7 @@ void iommu_report_device_fault(struct device *dev, struct iopf_fault *evt) · 2 unmodified lines
224262 if (group->attach_handle->domain->iopf_handler(group))
225263 goto err_abort;
226264
227− return;
265+ return 0;
228266
229267 err_abort:
230268 dev_warn_ratelimited(dev, "iopf with pasid %d aborted\n",
@@ -234,6 +272,14 @@ err_abort: · 3 unmodified lines
234272 __iopf_free_group(group);
235273 else
236274 iopf_free_group(group);
275+
276+ return 0;
277+
278+err_bad_iopf:
279+ if (fault->type == IOMMU_FAULT_PAGE_REQ)
280+ iopf_error_response(dev, evt);
281+
282+ return -EINVAL;
237283 }
238284 EXPORT_SYMBOL_GPL(iommu_report_device_fault);
239285
drivers/iommu/io-pgtable-arm-v7s.c+1−2
@@ -552,9 +552,8 @@ static int arm_v7s_map_pages(struct io_pgtable_ops *ops, unsigned long iova, · 551 unmodified lines
552552 paddr >= (1ULL << data->iop.cfg.oas)))
553553 return -ERANGE;
554554
555− /* If no access, then nothing to do */
556555 if (!(prot & (IOMMU_READ | IOMMU_WRITE)))
557− return 0;
556+ return -EINVAL;
558557
559558 while (pgcount--) {
560559 ret = __arm_v7s_map(data, iova, paddr, pgsize, prot, 1, data->pgd,
drivers/iommu/io-pgtable-arm.c+1−2
@@ -515,9 +515,8 @@ static int arm_lpae_map_pages(struct io_pgtable_ops *ops, unsigned long iova, · 514 unmodified lines
515515 if (WARN_ON(iaext || paddr >> cfg->oas))
516516 return -ERANGE;
517517
518− /* If no access, then nothing to do */
519518 if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE)))
520− return 0;
519+ return -EINVAL;
521520
522521 prot = arm_lpae_prot_to_pte(data, iommu_prot);
523522 ret = __arm_lpae_map(data, iova, paddr, pgsize, pgcount, prot, lvl,
drivers/iommu/io-pgtable-dart.c+1−2
@@ -245,9 +245,8 @@ static int dart_map_pages(struct io_pgtable_ops *ops, unsigned long iova, · 244 unmodified lines
245245 if (WARN_ON(paddr >> cfg->oas))
246246 return -ERANGE;
247247
248− /* If no access, then nothing to do */
249248 if (!(iommu_prot & (IOMMU_READ | IOMMU_WRITE)))
250− return 0;
249+ return -EINVAL;
251250
252251 tbl = dart_get_table(data, iova);
253252
drivers/iommu/iommufd/device.c+1−1
@@ -526,7 +526,7 @@ iommufd_device_do_replace(struct iommufd_device *idev, · 525 unmodified lines
526526 err_unresv:
527527 if (hwpt_is_paging(hwpt))
528528 iommufd_group_remove_reserved_iova(igroup,
529− to_hwpt_paging(old_hwpt));
529+ to_hwpt_paging(hwpt));
530530 err_unlock:
531531 mutex_unlock(&idev->igroup->lock);
532532 return ERR_PTR(rc);
drivers/iommu/iommufd/ioas.c+8−0
@@ -213,6 +213,10 @@ int iommufd_ioas_map(struct iommufd_ucmd *ucmd) · 212 unmodified lines
213213 if (cmd->iova >= ULONG_MAX || cmd->length >= ULONG_MAX)
214214 return -EOVERFLOW;
215215
216+ if (!(cmd->flags &
217+ (IOMMU_IOAS_MAP_WRITEABLE | IOMMU_IOAS_MAP_READABLE)))
218+ return -EINVAL;
219+
216220 ioas = iommufd_get_ioas(ucmd->ictx, cmd->ioas_id);
217221 if (IS_ERR(ioas))
218222 return PTR_ERR(ioas);
@@ -253,6 +257,10 @@ int iommufd_ioas_copy(struct iommufd_ucmd *ucmd) · 34 unmodified lines
253257 cmd->dst_iova >= ULONG_MAX)
254258 return -EOVERFLOW;
255259
260+ if (!(cmd->flags &
261+ (IOMMU_IOAS_MAP_WRITEABLE | IOMMU_IOAS_MAP_READABLE)))
262+ return -EINVAL;
263+
256264 src_ioas = iommufd_get_ioas(ucmd->ictx, cmd->src_ioas_id);
257265 if (IS_ERR(src_ioas))
258266 return PTR_ERR(src_ioas);
drivers/iommu/iommufd/selftest.c+1−1
@@ -273,7 +273,7 @@ static int mock_domain_read_and_clear_dirty(struct iommu_domain *domain, · 272 unmodified lines
273273 return 0;
274274 }
275275
276−const struct iommu_dirty_ops dirty_ops = {
276+static const struct iommu_dirty_ops dirty_ops = {
277277 .set_dirty_tracking = mock_domain_set_dirty_tracking,
278278 .read_and_clear_dirty = mock_domain_read_and_clear_dirty,
279279 };
drivers/irqchip/irq-loongarch-cpu.c+4−2
@@ -18,11 +18,13 @@ struct fwnode_handle *cpuintc_handle; · 17 unmodified lines
1818
1919 static u32 lpic_gsi_to_irq(u32 gsi)
2020 {
21+ int irq = 0;
22+
2123 /* Only pch irqdomain transferring is required for LoongArch. */
2224 if (gsi >= GSI_MIN_PCH_IRQ && gsi <= GSI_MAX_PCH_IRQ)
23− return acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH);
25+ irq = acpi_register_gsi(NULL, gsi, ACPI_LEVEL_SENSITIVE, ACPI_ACTIVE_HIGH);
2426
25− return 0;
27+ return (irq > 0) ? irq : 0;
2628 }
2729
2830 static struct fwnode_handle *lpic_get_gsi_domain_id(u32 gsi)
drivers/irqchip/irq-mbigen.c+16−4
@@ -64,6 +64,20 @@ struct mbigen_device { · 63 unmodified lines
6464 void __iomem *base;
6565 };
6666
67+static inline unsigned int get_mbigen_node_offset(unsigned int nid)
68+{
69+ unsigned int offset = nid * MBIGEN_NODE_OFFSET;
70+
71+ /*
72+ * To avoid touched clear register in unexpected way, we need to directly
73+ * skip clear register when access to more than 10 mbigen nodes.
74+ */
75+ if (nid >= (REG_MBIGEN_CLEAR_OFFSET / MBIGEN_NODE_OFFSET))
76+ offset += MBIGEN_NODE_OFFSET;
77+
78+ return offset;
79+}
80+
6781 static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq)
6882 {
6983 unsigned int nid, pin;
@@ -72,8 +86,7 @@ static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq) · 2 unmodified lines
7286 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1;
7387 pin = hwirq % IRQS_PER_MBIGEN_NODE;
7488
75− return pin * 4 + nid * MBIGEN_NODE_OFFSET
76− + REG_MBIGEN_VEC_OFFSET;
89+ return pin * 4 + get_mbigen_node_offset(nid) + REG_MBIGEN_VEC_OFFSET;
7790 }
7891
7992 static inline void get_mbigen_type_reg(irq_hw_number_t hwirq,
@@ -88,8 +101,7 @@ static inline void get_mbigen_type_reg(irq_hw_number_t hwirq, · 8 unmodified lines
88101 *mask = 1 << (irq_ofst % 32);
89102 ofst = irq_ofst / 32 * 4;
90103
91− *addr = ofst + nid * MBIGEN_NODE_OFFSET
92− + REG_MBIGEN_TYPE_OFFSET;
104+ *addr = ofst + get_mbigen_node_offset(nid) + REG_MBIGEN_TYPE_OFFSET;
93105 }
94106
95107 static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq,
drivers/irqchip/irq-meson-gpio.c+7−7
@@ -178,7 +178,7 @@ struct meson_gpio_irq_controller { · 177 unmodified lines
178178 void __iomem *base;
179179 u32 channel_irqs[MAX_NUM_CHANNEL];
180180 DECLARE_BITMAP(channel_map, MAX_NUM_CHANNEL);
181− spinlock_t lock;
181+ raw_spinlock_t lock;
182182 };
183183
184184 static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl,
@@ -187,14 +187,14 @@ static void meson_gpio_irq_update_bits(struct meson_gpio_irq_controller *ctl, · 2 unmodified lines
187187 unsigned long flags;
188188 u32 tmp;
189189
190− spin_lock_irqsave(&ctl->lock, flags);
190+ raw_spin_lock_irqsave(&ctl->lock, flags);
191191
192192 tmp = readl_relaxed(ctl->base + reg);
193193 tmp &= ~mask;
194194 tmp |= val;
195195 writel_relaxed(tmp, ctl->base + reg);
196196
197− spin_unlock_irqrestore(&ctl->lock, flags);
197+ raw_spin_unlock_irqrestore(&ctl->lock, flags);
198198 }
199199
200200 static void meson_gpio_irq_init_dummy(struct meson_gpio_irq_controller *ctl)
@@ -244,12 +244,12 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl, · 43 unmodified lines
244244 unsigned long flags;
245245 unsigned int idx;
246246
247− spin_lock_irqsave(&ctl->lock, flags);
247+ raw_spin_lock_irqsave(&ctl->lock, flags);
248248
249249 /* Find a free channel */
250250 idx = find_first_zero_bit(ctl->channel_map, ctl->params->nr_channels);
251251 if (idx >= ctl->params->nr_channels) {
252− spin_unlock_irqrestore(&ctl->lock, flags);
252+ raw_spin_unlock_irqrestore(&ctl->lock, flags);
253253 pr_err("No channel available\n");
254254 return -ENOSPC;
255255 }
@@ -257,7 +257,7 @@ meson_gpio_irq_request_channel(struct meson_gpio_irq_controller *ctl, · 1 unmodified line
257257 /* Mark the channel as used */
258258 set_bit(idx, ctl->channel_map);
259259
260− spin_unlock_irqrestore(&ctl->lock, flags);
260+ raw_spin_unlock_irqrestore(&ctl->lock, flags);
261261
262262 /*
263263 * Setup the mux of the channel to route the signal of the pad
@@ -567,7 +567,7 @@ static int meson_gpio_irq_of_init(struct device_node *node, struct device_node * · 303 unmodified lines
567567 if (!ctl)
568568 return -ENOMEM;
569569
570− spin_lock_init(&ctl->lock);
570+ raw_spin_lock_init(&ctl->lock);
571571
572572 ctl->base = of_iomap(node, 0);
573573 if (!ctl->base) {
drivers/irqchip/irq-pic32-evic.c+3−3
@@ -161,9 +161,9 @@ static int pic32_irq_domain_map(struct irq_domain *d, unsigned int virq, · 160 unmodified lines
161161 return ret;
162162 }
163163
164−int pic32_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
165− const u32 *intspec, unsigned int intsize,
166− irq_hw_number_t *out_hwirq, unsigned int *out_type)
164+static int pic32_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr,
165+ const u32 *intspec, unsigned int intsize,
166+ irq_hw_number_t *out_hwirq, unsigned int *out_type)
167167 {
168168 struct evic_chip_data *priv = d->host_data;
169169
drivers/irqchip/irq-riscv-aplic-msi.c+25−7
@@ -32,15 +32,10 @@ static void aplic_msi_irq_unmask(struct irq_data *d) · 31 unmodified lines
3232 aplic_irq_unmask(d);
3333 }
3434
35−static void aplic_msi_irq_eoi(struct irq_data *d)
35+static void aplic_msi_irq_retrigger_level(struct irq_data *d)
3636 {
3737 struct aplic_priv *priv = irq_data_get_irq_chip_data(d);
3838
39− /*
40− * EOI handling is required only for level-triggered interrupts
41− * when APLIC is in MSI mode.
42− */
43−
4439 switch (irqd_get_trigger_type(d)) {
4540 case IRQ_TYPE_LEVEL_LOW:
4641 case IRQ_TYPE_LEVEL_HIGH:
@@ -59,6 +54,29 @@ static void aplic_msi_irq_eoi(struct irq_data *d) · 12 unmodified lines
5954 }
6055 }
6156
57+static void aplic_msi_irq_eoi(struct irq_data *d)
58+{
59+ /*
60+ * EOI handling is required only for level-triggered interrupts
61+ * when APLIC is in MSI mode.
62+ */
63+ aplic_msi_irq_retrigger_level(d);
64+}
65+
66+static int aplic_msi_irq_set_type(struct irq_data *d, unsigned int type)
67+{
68+ int rc = aplic_irq_set_type(d, type);
69+
70+ if (rc)
71+ return rc;
72+ /*
73+ * Updating sourcecfg register for level-triggered interrupts
74+ * requires interrupt retriggering when APLIC is in MSI mode.
75+ */
76+ aplic_msi_irq_retrigger_level(d);
77+ return 0;
78+}
79+
6280 static void aplic_msi_write_msg(struct irq_data *d, struct msi_msg *msg)
6381 {
6482 unsigned int group_index, hart_index, guest_index, val;
@@ -130,7 +148,7 @@ static const struct msi_domain_template aplic_msi_template = { · 65 unmodified lines
130148 .name = "APLIC-MSI",
131149 .irq_mask = aplic_msi_irq_mask,
132150 .irq_unmask = aplic_msi_irq_unmask,
133− .irq_set_type = aplic_irq_set_type,
151+ .irq_set_type = aplic_msi_irq_set_type,
134152 .irq_eoi = aplic_msi_irq_eoi,
135153 #ifdef CONFIG_SMP
136154 .irq_set_affinity = irq_chip_set_affinity_parent,
drivers/irqchip/irq-sun6i-r.c+1−1
@@ -270,7 +270,7 @@ static const struct irq_domain_ops sun6i_r_intc_domain_ops = { · 269 unmodified lines
270270
271271 static int sun6i_r_intc_suspend(void)
272272 {
273− u32 buf[BITS_TO_U32(max(SUN6I_NR_TOP_LEVEL_IRQS, SUN6I_NR_MUX_BITS))];
273+ u32 buf[BITS_TO_U32(MAX(SUN6I_NR_TOP_LEVEL_IRQS, SUN6I_NR_MUX_BITS))];
274274 int i;
275275
276276 /* Wake IRQs are enabled during system sleep and shutdown. */
drivers/irqchip/irq-xilinx-intc.c+1−1
@@ -189,7 +189,7 @@ static int __init xilinx_intc_of_init(struct device_node *intc, · 188 unmodified lines
189189 irqc->intr_mask = 0;
190190 }
191191
192− if (irqc->intr_mask >> irqc->nr_irq)
192+ if ((u64)irqc->intr_mask >> irqc->nr_irq)
193193 pr_warn("irq-xilinx: mismatch in kind-of-intr param\n");
194194
195195 pr_info("irq-xilinx: %pOF: num_irq=%d, edge=0x%x\n",
drivers/md/dm-ioctl.c+20−2
@@ -1181,8 +1181,26 @@ static int do_resume(struct dm_ioctl *param) · 1180 unmodified lines
11811181 suspend_flags &= ~DM_SUSPEND_LOCKFS_FLAG;
11821182 if (param->flags & DM_NOFLUSH_FLAG)
11831183 suspend_flags |= DM_SUSPEND_NOFLUSH_FLAG;
1184− if (!dm_suspended_md(md))
1185− dm_suspend(md, suspend_flags);
1184+ if (!dm_suspended_md(md)) {
1185+ r = dm_suspend(md, suspend_flags);
1186+ if (r) {
1187+ down_write(&_hash_lock);
1188+ hc = dm_get_mdptr(md);
1189+ if (hc && !hc->new_map) {
1190+ hc->new_map = new_map;
1191+ new_map = NULL;
1192+ } else {
1193+ r = -ENXIO;
1194+ }
1195+ up_write(&_hash_lock);
1196+ if (new_map) {
1197+ dm_sync_table(md);
1198+ dm_table_destroy(new_map);
1199+ }
1200+ dm_put(md);
1201+ return r;
1202+ }
1203+ }
11861204
11871205 old_size = dm_get_size(md);
11881206 old_map = dm_swap_table(md, new_map);
drivers/md/dm.c+2−2
@@ -2737,7 +2737,7 @@ static int dm_wait_for_bios_completion(struct mapped_device *md, unsigned int ta · 2736 unmodified lines
27372737 break;
27382738
27392739 if (signal_pending_state(task_state, current)) {
2740− r = -EINTR;
2740+ r = -ERESTARTSYS;
27412741 break;
27422742 }
27432743
@@ -2762,7 +2762,7 @@ static int dm_wait_for_completion(struct mapped_device *md, unsigned int task_st · 18 unmodified lines
27622762 break;
27632763
27642764 if (signal_pending_state(task_state, current)) {
2765− r = -EINTR;
2765+ r = -ERESTARTSYS;
27662766 break;
27672767 }
27682768
drivers/md/persistent-data/dm-space-map-metadata.c+2−2
@@ -277,7 +277,7 @@ static void sm_metadata_destroy(struct dm_space_map *sm) · 276 unmodified lines
277277 {
278278 struct sm_metadata *smm = container_of(sm, struct sm_metadata, sm);
279279
280− kfree(smm);
280+ kvfree(smm);
281281 }
282282
283283 static int sm_metadata_get_nr_blocks(struct dm_space_map *sm, dm_block_t *count)
@@ -772,7 +772,7 @@ struct dm_space_map *dm_sm_metadata_init(void) · 488 unmodified lines
772772 {
773773 struct sm_metadata *smm;
774774
775− smm = kmalloc(sizeof(*smm), GFP_KERNEL);
775+ smm = kvmalloc(sizeof(*smm), GFP_KERNEL);
776776 if (!smm)
777777 return ERR_PTR(-ENOMEM);
778778
drivers/md/raid1.c+10−4
@@ -617,6 +617,12 @@ static int choose_first_rdev(struct r1conf *conf, struct r1bio *r1_bio, · 616 unmodified lines
617617 return -1;
618618 }
619619
620+static bool rdev_in_recovery(struct md_rdev *rdev, struct r1bio *r1_bio)
621+{
622+ return !test_bit(In_sync, &rdev->flags) &&
623+ rdev->recovery_offset < r1_bio->sector + r1_bio->sectors;
624+}
625+
620626 static int choose_bb_rdev(struct r1conf *conf, struct r1bio *r1_bio,
621627 int *max_sectors)
622628 {
@@ -635,6 +641,7 @@ static int choose_bb_rdev(struct r1conf *conf, struct r1bio *r1_bio, · 12 unmodified lines
635641
636642 rdev = conf->mirrors[disk].rdev;
637643 if (!rdev || test_bit(Faulty, &rdev->flags) ||
644+ rdev_in_recovery(rdev, r1_bio) ||
638645 test_bit(WriteMostly, &rdev->flags))
639646 continue;
640647
@@ -673,7 +680,8 @@ static int choose_slow_rdev(struct r1conf *conf, struct r1bio *r1_bio, · 32 unmodified lines
673680
674681 rdev = conf->mirrors[disk].rdev;
675682 if (!rdev || test_bit(Faulty, &rdev->flags) ||
676− !test_bit(WriteMostly, &rdev->flags))
683+ !test_bit(WriteMostly, &rdev->flags) ||
684+ rdev_in_recovery(rdev, r1_bio))
677685 continue;
678686
679687 /* there are no bad blocks, we can use this disk */
@@ -733,9 +741,7 @@ static bool rdev_readable(struct md_rdev *rdev, struct r1bio *r1_bio) · 53 unmodified lines
733741 if (!rdev || test_bit(Faulty, &rdev->flags))
734742 return false;
735743
736− /* still in recovery */
737− if (!test_bit(In_sync, &rdev->flags) &&
738− rdev->recovery_offset < r1_bio->sector + r1_bio->sectors)
744+ if (rdev_in_recovery(rdev, r1_bio))
739745 return false;
740746
741747 /* don't read from slow disk unless have to */
drivers/media/dvb-frontends/stv0367_priv.h+3−0
@@ -25,8 +25,11 @@ · 24 unmodified lines
2525 #endif
2626
2727 /* MACRO definitions */
28+#ifndef MIN
2829 #define MAX(X, Y) ((X) >= (Y) ? (X) : (Y))
2930 #define MIN(X, Y) ((X) <= (Y) ? (X) : (Y))
31+#endif
32+
3033 #define INRANGE(X, Y, Z) \
3134 ((((X) <= (Y)) && ((Y) <= (Z))) || \
3235 (((Z) <= (Y)) && ((Y) <= (X))) ? 1 : 0)
drivers/media/pci/intel/ipu6/Kconfig+2−1
@@ -3,13 +3,14 @@ config VIDEO_INTEL_IPU6 · 2 unmodified lines
33 depends on ACPI || COMPILE_TEST
44 depends on VIDEO_DEV
55 depends on X86 && X86_64 && HAS_DMA
6+ depends on IPU_BRIDGE || !IPU_BRIDGE
7+ select AUXILIARY_BUS
68 select DMA_OPS
79 select IOMMU_IOVA
810 select VIDEO_V4L2_SUBDEV_API
911 select MEDIA_CONTROLLER
1012 select VIDEOBUF2_DMA_CONTIG
1113 select V4L2_FWNODE
12− select IPU_BRIDGE
1314 help
1415 This is the 6th Gen Intel Image Processing Unit, found in Intel SoCs
1516 and used for capturing images and video from camera sensors.
drivers/media/usb/dvb-usb/dvb-usb-init.c+4−31
@@ -23,40 +23,11 @@ static int dvb_usb_force_pid_filter_usage; · 22 unmodified lines
2323 module_param_named(force_pid_filter_usage, dvb_usb_force_pid_filter_usage, int, 0444);
2424 MODULE_PARM_DESC(force_pid_filter_usage, "force all dvb-usb-devices to use a PID filter, if any (default: 0).");
2525
26−static int dvb_usb_check_bulk_endpoint(struct dvb_usb_device *d, u8 endpoint)
27−{
28− if (endpoint) {
29− int ret;
30−
31− ret = usb_pipe_type_check(d->udev, usb_sndbulkpipe(d->udev, endpoint));
32− if (ret)
33− return ret;
34− ret = usb_pipe_type_check(d->udev, usb_rcvbulkpipe(d->udev, endpoint));
35− if (ret)
36− return ret;
37− }
38− return 0;
39−}
40−
41−static void dvb_usb_clear_halt(struct dvb_usb_device *d, u8 endpoint)
42−{
43− if (endpoint) {
44− usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, endpoint));
45− usb_clear_halt(d->udev, usb_rcvbulkpipe(d->udev, endpoint));
46− }
47−}
48−
4926 static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs)
5027 {
5128 struct dvb_usb_adapter *adap;
5229 int ret, n, o;
5330
54− ret = dvb_usb_check_bulk_endpoint(d, d->props.generic_bulk_ctrl_endpoint);
55− if (ret)
56− return ret;
57− ret = dvb_usb_check_bulk_endpoint(d, d->props.generic_bulk_ctrl_endpoint_response);
58− if (ret)
59− return ret;
6031 for (n = 0; n < d->props.num_adapters; n++) {
6132 adap = &d->adapter[n];
6233 adap->dev = d;
@@ -132,8 +103,10 @@ static int dvb_usb_adapter_init(struct dvb_usb_device *d, short *adapter_nrs) · 69 unmodified lines
132103 * when reloading the driver w/o replugging the device
133104 * sometimes a timeout occurs, this helps
134105 */
135− dvb_usb_clear_halt(d, d->props.generic_bulk_ctrl_endpoint);
136− dvb_usb_clear_halt(d, d->props.generic_bulk_ctrl_endpoint_response);
106+ if (d->props.generic_bulk_ctrl_endpoint != 0) {
107+ usb_clear_halt(d->udev, usb_sndbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint));
108+ usb_clear_halt(d->udev, usb_rcvbulkpipe(d->udev, d->props.generic_bulk_ctrl_endpoint));
109+ }
137110
138111 return 0;
139112
drivers/media/usb/uvc/uvc_ctrl.c+5−3
@@ -2680,6 +2680,10 @@ static void uvc_ctrl_init_ctrl(struct uvc_video_chain *chain, · 2679 unmodified lines
26802680 for (i = 0; i < ARRAY_SIZE(uvc_ctrl_mappings); ++i) {
26812681 const struct uvc_control_mapping *mapping = &uvc_ctrl_mappings[i];
26822682
2683+ if (!uvc_entity_match_guid(ctrl->entity, mapping->entity) ||
2684+ ctrl->info.selector != mapping->selector)
2685+ continue;
2686+
26832687 /* Let the device provide a custom mapping. */
26842688 if (mapping->filter_mapping) {
26852689 mapping = mapping->filter_mapping(chain, ctrl);
@@ -2687,9 +2691,7 @@ static void uvc_ctrl_init_ctrl(struct uvc_video_chain *chain, · 1 unmodified line
26872691 continue;
26882692 }
26892693
2690− if (uvc_entity_match_guid(ctrl->entity, mapping->entity) &&
2691− ctrl->info.selector == mapping->selector)
2692− __uvc_ctrl_add_mapping(chain, ctrl, mapping);
2694+ __uvc_ctrl_add_mapping(chain, ctrl, mapping);
26932695 }
26942696 }
26952697
drivers/misc/Kconfig+1−1
@@ -587,7 +587,7 @@ config NSM · 586 unmodified lines
587587
588588 config MARVELL_CN10K_DPI
589589 tristate "Octeon CN10K DPI driver"
590− depends on PCI
590+ depends on PCI && PCI_IOV
591591 depends on ARCH_THUNDER || (COMPILE_TEST && 64BIT)
592592 help
593593 Enables Octeon CN10K DMA packet interface (DPI) driver which
drivers/misc/eeprom/ee1004.c+51−34
@@ -233,6 +233,49 @@ static void ee1004_cleanup_bus_data(void *data) · 232 unmodified lines
233233 mutex_unlock(&ee1004_bus_lock);
234234 }
235235
236+static int ee1004_init_bus_data(struct i2c_client *client)
237+{
238+ struct ee1004_bus_data *bd;
239+ int err, cnr = 0;
240+
241+ bd = ee1004_get_bus_data(client->adapter);
242+ if (!bd)
243+ return dev_err_probe(&client->dev, -ENOSPC, "Only %d busses supported",
244+ EE1004_MAX_BUSSES);
245+
246+ i2c_set_clientdata(client, bd);
247+
248+ if (++bd->dev_count == 1) {
249+ /* Use 2 dummy devices for page select command */
250+ for (cnr = 0; cnr < EE1004_NUM_PAGES; cnr++) {
251+ struct i2c_client *cl;
252+
253+ cl = i2c_new_dummy_device(client->adapter, EE1004_ADDR_SET_PAGE + cnr);
254+ if (IS_ERR(cl)) {
255+ err = PTR_ERR(cl);
256+ goto err_out;
257+ }
258+
259+ bd->set_page[cnr] = cl;
260+ }
261+
262+ /* Remember current page to avoid unneeded page select */
263+ err = ee1004_get_current_page(bd);
264+ if (err < 0)
265+ goto err_out;
266+
267+ dev_dbg(&client->dev, "Currently selected page: %d\n", err);
268+ bd->current_page = err;
269+ }
270+
271+ return 0;
272+
273+err_out:
274+ ee1004_cleanup(cnr, bd);
275+
276+ return err;
277+}
278+
236279 static int ee1004_probe(struct i2c_client *client)
237280 {
238281 struct nvmem_config config = {
@@ -251,9 +294,8 @@ static int ee1004_probe(struct i2c_client *client) · 12 unmodified lines
251294 .compat = true,
252295 .base_dev = &client->dev,
253296 };
254− struct ee1004_bus_data *bd;
255297 struct nvmem_device *ndev;
256− int err, cnr = 0;
298+ int err;
257299
258300 /* Make sure we can operate on this adapter */
259301 if (!i2c_check_functionality(client->adapter,
@@ -264,46 +306,21 @@ static int ee1004_probe(struct i2c_client *client) · 4 unmodified lines
264306
265307 mutex_lock(&ee1004_bus_lock);
266308
267− bd = ee1004_get_bus_data(client->adapter);
268− if (!bd) {
309+ err = ee1004_init_bus_data(client);
310+ if (err < 0) {
269311 mutex_unlock(&ee1004_bus_lock);
270− return dev_err_probe(&client->dev, -ENOSPC,
271− "Only %d busses supported", EE1004_MAX_BUSSES);
272− }
273−
274− err = devm_add_action_or_reset(&client->dev, ee1004_cleanup_bus_data, bd);
275− if (err < 0)
276312 return err;
277−
278− i2c_set_clientdata(client, bd);
279−
280− if (++bd->dev_count == 1) {
281− /* Use 2 dummy devices for page select command */
282− for (cnr = 0; cnr < EE1004_NUM_PAGES; cnr++) {
283− struct i2c_client *cl;
284−
285− cl = i2c_new_dummy_device(client->adapter, EE1004_ADDR_SET_PAGE + cnr);
286− if (IS_ERR(cl)) {
287− mutex_unlock(&ee1004_bus_lock);
288− return PTR_ERR(cl);
289− }
290− bd->set_page[cnr] = cl;
291− }
292−
293− /* Remember current page to avoid unneeded page select */
294− err = ee1004_get_current_page(bd);
295− if (err < 0) {
296− mutex_unlock(&ee1004_bus_lock);
297− return err;
298− }
299− dev_dbg(&client->dev, "Currently selected page: %d\n", err);
300− bd->current_page = err;
301313 }
302314
303315 ee1004_probe_temp_sensor(client);
304316
305317 mutex_unlock(&ee1004_bus_lock);
306318
319+ err = devm_add_action_or_reset(&client->dev, ee1004_cleanup_bus_data,
320+ i2c_get_clientdata(client));
321+ if (err < 0)
322+ return err;
323+
307324 ndev = devm_nvmem_register(&client->dev, &config);
308325 if (IS_ERR(ndev))
309326 return PTR_ERR(ndev);
drivers/misc/fastrpc.c+3−19
@@ -2085,16 +2085,6 @@ err_invoke: · 2084 unmodified lines
20852085 return err;
20862086 }
20872087
2088−static int is_attach_rejected(struct fastrpc_user *fl)
2089−{
2090− /* Check if the device node is non-secure */
2091− if (!fl->is_secure_dev) {
2092− dev_dbg(&fl->cctx->rpdev->dev, "untrusted app trying to attach to privileged DSP PD\n");
2093− return -EACCES;
2094− }
2095− return 0;
2096−}
2097−
20982088 static long fastrpc_device_ioctl(struct file *file, unsigned int cmd,
20992089 unsigned long arg)
21002090 {
@@ -2107,19 +2097,13 @@ static long fastrpc_device_ioctl(struct file *file, unsigned int cmd, · 6 unmodified lines
21072097 err = fastrpc_invoke(fl, argp);
21082098 break;
21092099 case FASTRPC_IOCTL_INIT_ATTACH:
2110− err = is_attach_rejected(fl);
2111− if (!err)
2112− err = fastrpc_init_attach(fl, ROOT_PD);
2100+ err = fastrpc_init_attach(fl, ROOT_PD);
21132101 break;
21142102 case FASTRPC_IOCTL_INIT_ATTACH_SNS:
2115− err = is_attach_rejected(fl);
2116− if (!err)
2117− err = fastrpc_init_attach(fl, SENSORS_PD);
2103+ err = fastrpc_init_attach(fl, SENSORS_PD);
21182104 break;
21192105 case FASTRPC_IOCTL_INIT_CREATE_STATIC:
2120− err = is_attach_rejected(fl);
2121− if (!err)
2122− err = fastrpc_init_create_static_process(fl, argp);
2106+ err = fastrpc_init_create_static_process(fl, argp);
21232107 break;
21242108 case FASTRPC_IOCTL_INIT_CREATE:
21252109 err = fastrpc_init_create_process(fl, argp);
drivers/misc/lkdtm/refcount.c+16−0
@@ -182,6 +182,21 @@ static void lkdtm_REFCOUNT_SUB_AND_TEST_NEGATIVE(void) · 181 unmodified lines
182182 check_negative(&neg, 3);
183183 }
184184
185+/*
186+ * A refcount_sub_and_test() by zero when the counter is at zero should act like
187+ * refcount_sub_and_test() above when going negative.
188+ */
189+static void lkdtm_REFCOUNT_SUB_AND_TEST_ZERO(void)
190+{
191+ refcount_t neg = REFCOUNT_INIT(0);
192+
193+ pr_info("attempting bad refcount_sub_and_test() at zero\n");
194+ if (refcount_sub_and_test(0, &neg))
195+ pr_warn("Weird: refcount_sub_and_test() reported zero\n");
196+
197+ check_negative(&neg, 0);
198+}
199+
185200 static void check_from_zero(refcount_t *ref)
186201 {
187202 switch (refcount_read(ref)) {
@@ -400,6 +415,7 @@ static struct crashtype crashtypes[] = { · 212 unmodified lines
400415 CRASHTYPE(REFCOUNT_DEC_NEGATIVE),
401416 CRASHTYPE(REFCOUNT_DEC_AND_TEST_NEGATIVE),
402417 CRASHTYPE(REFCOUNT_SUB_AND_TEST_NEGATIVE),
418+ CRASHTYPE(REFCOUNT_SUB_AND_TEST_ZERO),
403419 CRASHTYPE(REFCOUNT_INC_ZERO),
404420 CRASHTYPE(REFCOUNT_ADD_ZERO),
405421 CRASHTYPE(REFCOUNT_INC_SATURATED),
drivers/mmc/core/mmc_test.c+5−4
@@ -3125,13 +3125,13 @@ static ssize_t mtf_test_write(struct file *file, const char __user *buf, · 3124 unmodified lines
31253125 test->buffer = kzalloc(BUFFER_SIZE, GFP_KERNEL);
31263126 #ifdef CONFIG_HIGHMEM
31273127 test->highmem = alloc_pages(GFP_KERNEL | __GFP_HIGHMEM, BUFFER_ORDER);
3128+ if (!test->highmem) {
3129+ count = -ENOMEM;
3130+ goto free_test_buffer;
3131+ }
31283132 #endif
31293133
3130−#ifdef CONFIG_HIGHMEM
3131− if (test->buffer && test->highmem) {
3132−#else
31333134 if (test->buffer) {
3134−#endif
31353135 mutex_lock(&mmc_test_lock);
31363136 mmc_test_run(test, testcase);
31373137 mutex_unlock(&mmc_test_lock);
@@ -3139,6 +3139,7 @@ static ssize_t mtf_test_write(struct file *file, const char __user *buf, · 1 unmodified line
31393139
31403140 #ifdef CONFIG_HIGHMEM
31413141 __free_pages(test->highmem, BUFFER_ORDER);
3142+free_test_buffer:
31423143 #endif
31433144 kfree(test->buffer);
31443145 kfree(test);
drivers/mmc/host/dw_mmc.c+8−0
@@ -3299,6 +3299,10 @@ int dw_mci_probe(struct dw_mci *host) · 3298 unmodified lines
32993299 host->biu_clk = devm_clk_get(host->dev, "biu");
33003300 if (IS_ERR(host->biu_clk)) {
33013301 dev_dbg(host->dev, "biu clock not available\n");
3302+ ret = PTR_ERR(host->biu_clk);
3303+ if (ret == -EPROBE_DEFER)
3304+ return ret;
3305+
33023306 } else {
33033307 ret = clk_prepare_enable(host->biu_clk);
33043308 if (ret) {
@@ -3310,6 +3314,10 @@ int dw_mci_probe(struct dw_mci *host) · 5 unmodified lines
33103314 host->ciu_clk = devm_clk_get(host->dev, "ciu");
33113315 if (IS_ERR(host->ciu_clk)) {
33123316 dev_dbg(host->dev, "ciu clock not available\n");
3317+ ret = PTR_ERR(host->ciu_clk);
3318+ if (ret == -EPROBE_DEFER)
3319+ goto err_clk_biu;
3320+
33133321 host->bus_hz = host->pdata->bus_hz;
33143322 } else {
33153323 ret = clk_prepare_enable(host->ciu_clk);
drivers/mmc/host/mtk-sd.c+4−4
@@ -1230,7 +1230,7 @@ static bool msdc_cmd_done(struct msdc_host *host, int events, · 1229 unmodified lines
12301230 }
12311231
12321232 if (!sbc_error && !(events & MSDC_INT_CMDRDY)) {
1233− if (events & MSDC_INT_CMDTMO ||
1233+ if ((events & MSDC_INT_CMDTMO && !host->hs400_tuning) ||
12341234 (!mmc_op_tuning(cmd->opcode) && !host->hs400_tuning))
12351235 /*
12361236 * should not clear fifo/interrupt as the tune data
@@ -1323,9 +1323,9 @@ static void msdc_start_command(struct msdc_host *host, · 86 unmodified lines
13231323 static void msdc_cmd_next(struct msdc_host *host,
13241324 struct mmc_request *mrq, struct mmc_command *cmd)
13251325 {
1326− if ((cmd->error &&
1327− !(cmd->error == -EILSEQ &&
1328− (mmc_op_tuning(cmd->opcode) || host->hs400_tuning))) ||
1326+ if ((cmd->error && !host->hs400_tuning &&
1327+ !(cmd->error == -EILSEQ &&
1328+ mmc_op_tuning(cmd->opcode))) ||
13291329 (mrq->sbc && mrq->sbc->error))
13301330 msdc_request_done(host, mrq);
13311331 else if (cmd == mrq->sbc)
drivers/net/bonding/bond_main.c+113−67
@@ -427,6 +427,8 @@ static int bond_ipsec_add_sa(struct xfrm_state *xs, · 426 unmodified lines
427427 struct netlink_ext_ack *extack)
428428 {
429429 struct net_device *bond_dev = xs->xso.dev;
430+ struct net_device *real_dev;
431+ netdevice_tracker tracker;
430432 struct bond_ipsec *ipsec;
431433 struct bonding *bond;
432434 struct slave *slave;
@@ -438,74 +440,80 @@ static int bond_ipsec_add_sa(struct xfrm_state *xs, · 5 unmodified lines
438440 rcu_read_lock();
439441 bond = netdev_priv(bond_dev);
440442 slave = rcu_dereference(bond->curr_active_slave);
441− if (!slave) {
442− rcu_read_unlock();
443− return -ENODEV;
443+ real_dev = slave ? slave->dev : NULL;
444+ netdev_hold(real_dev, &tracker, GFP_ATOMIC);
445+ rcu_read_unlock();
446+ if (!real_dev) {
447+ err = -ENODEV;
448+ goto out;
444449 }
445450
446− if (!slave->dev->xfrmdev_ops ||
447− !slave->dev->xfrmdev_ops->xdo_dev_state_add ||
448− netif_is_bond_master(slave->dev)) {
451+ if (!real_dev->xfrmdev_ops ||
452+ !real_dev->xfrmdev_ops->xdo_dev_state_add ||
453+ netif_is_bond_master(real_dev)) {
449454 NL_SET_ERR_MSG_MOD(extack, "Slave does not support ipsec offload");
450− rcu_read_unlock();
451− return -EINVAL;
455+ err = -EINVAL;
456+ goto out;
452457 }
453458
454− ipsec = kmalloc(sizeof(*ipsec), GFP_ATOMIC);
459+ ipsec = kmalloc(sizeof(*ipsec), GFP_KERNEL);
455460 if (!ipsec) {
456− rcu_read_unlock();
457− return -ENOMEM;
461+ err = -ENOMEM;
462+ goto out;
458463 }
459− xs->xso.real_dev = slave->dev;
460464
461− err = slave->dev->xfrmdev_ops->xdo_dev_state_add(xs, extack);
465+ xs->xso.real_dev = real_dev;
466+ err = real_dev->xfrmdev_ops->xdo_dev_state_add(xs, extack);
462467 if (!err) {
463468 ipsec->xs = xs;
464469 INIT_LIST_HEAD(&ipsec->list);
465− spin_lock_bh(&bond->ipsec_lock);
470+ mutex_lock(&bond->ipsec_lock);
466471 list_add(&ipsec->list, &bond->ipsec_list);
467− spin_unlock_bh(&bond->ipsec_lock);
472+ mutex_unlock(&bond->ipsec_lock);
468473 } else {
469474 kfree(ipsec);
470475 }
471− rcu_read_unlock();
476+out:
477+ netdev_put(real_dev, &tracker);
472478 return err;
473479 }
474480
475481 static void bond_ipsec_add_sa_all(struct bonding *bond)
476482 {
477483 struct net_device *bond_dev = bond->dev;
484+ struct net_device *real_dev;
478485 struct bond_ipsec *ipsec;
479486 struct slave *slave;
480487
481− rcu_read_lock();
482− slave = rcu_dereference(bond->curr_active_slave);
483− if (!slave)
484− goto out;
488+ slave = rtnl_dereference(bond->curr_active_slave);
489+ real_dev = slave ? slave->dev : NULL;
490+ if (!real_dev)
491+ return;
485492
486− if (!slave->dev->xfrmdev_ops ||
487− !slave->dev->xfrmdev_ops->xdo_dev_state_add ||
488− netif_is_bond_master(slave->dev)) {
489− spin_lock_bh(&bond->ipsec_lock);
493+ mutex_lock(&bond->ipsec_lock);
494+ if (!real_dev->xfrmdev_ops ||
495+ !real_dev->xfrmdev_ops->xdo_dev_state_add ||
496+ netif_is_bond_master(real_dev)) {
490497 if (!list_empty(&bond->ipsec_list))
491− slave_warn(bond_dev, slave->dev,
498+ slave_warn(bond_dev, real_dev,
492499 "%s: no slave xdo_dev_state_add\n",
493500 __func__);
494− spin_unlock_bh(&bond->ipsec_lock);
495501 goto out;
496502 }
497503
498− spin_lock_bh(&bond->ipsec_lock);
499504 list_for_each_entry(ipsec, &bond->ipsec_list, list) {
500− ipsec->xs->xso.real_dev = slave->dev;
501− if (slave->dev->xfrmdev_ops->xdo_dev_state_add(ipsec->xs, NULL)) {
502− slave_warn(bond_dev, slave->dev, "%s: failed to add SA\n", __func__);
505+ /* If new state is added before ipsec_lock acquired */
506+ if (ipsec->xs->xso.real_dev == real_dev)
507+ continue;
508+
509+ ipsec->xs->xso.real_dev = real_dev;
510+ if (real_dev->xfrmdev_ops->xdo_dev_state_add(ipsec->xs, NULL)) {
511+ slave_warn(bond_dev, real_dev, "%s: failed to add SA\n", __func__);
503512 ipsec->xs->xso.real_dev = NULL;
504513 }
505514 }
506− spin_unlock_bh(&bond->ipsec_lock);
507515 out:
508− rcu_read_unlock();
516+ mutex_unlock(&bond->ipsec_lock);
509517 }
510518
511519 /**
@@ -515,6 +523,8 @@ out: · 3 unmodified lines
515523 static void bond_ipsec_del_sa(struct xfrm_state *xs)
516524 {
517525 struct net_device *bond_dev = xs->xso.dev;
526+ struct net_device *real_dev;
527+ netdevice_tracker tracker;
518528 struct bond_ipsec *ipsec;
519529 struct bonding *bond;
520530 struct slave *slave;
@@ -525,6 +535,9 @@ static void bond_ipsec_del_sa(struct xfrm_state *xs) · 4 unmodified lines
525535 rcu_read_lock();
526536 bond = netdev_priv(bond_dev);
527537 slave = rcu_dereference(bond->curr_active_slave);
538+ real_dev = slave ? slave->dev : NULL;
539+ netdev_hold(real_dev, &tracker, GFP_ATOMIC);
540+ rcu_read_unlock();
528541
529542 if (!slave)
530543 goto out;
@@ -532,18 +545,19 @@ static void bond_ipsec_del_sa(struct xfrm_state *xs) · 1 unmodified line
532545 if (!xs->xso.real_dev)
533546 goto out;
534547
535− WARN_ON(xs->xso.real_dev != slave->dev);
548+ WARN_ON(xs->xso.real_dev != real_dev);
536549
537− if (!slave->dev->xfrmdev_ops ||
538− !slave->dev->xfrmdev_ops->xdo_dev_state_delete ||
539− netif_is_bond_master(slave->dev)) {
540− slave_warn(bond_dev, slave->dev, "%s: no slave xdo_dev_state_delete\n", __func__);
550+ if (!real_dev->xfrmdev_ops ||
551+ !real_dev->xfrmdev_ops->xdo_dev_state_delete ||
552+ netif_is_bond_master(real_dev)) {
553+ slave_warn(bond_dev, real_dev, "%s: no slave xdo_dev_state_delete\n", __func__);
541554 goto out;
542555 }
543556
544− slave->dev->xfrmdev_ops->xdo_dev_state_delete(xs);
557+ real_dev->xfrmdev_ops->xdo_dev_state_delete(xs);
545558 out:
546− spin_lock_bh(&bond->ipsec_lock);
559+ netdev_put(real_dev, &tracker);
560+ mutex_lock(&bond->ipsec_lock);
547561 list_for_each_entry(ipsec, &bond->ipsec_list, list) {
548562 if (ipsec->xs == xs) {
549563 list_del(&ipsec->list);
@@ -551,41 +565,72 @@ out: · 1 unmodified line
551565 break;
552566 }
553567 }
554− spin_unlock_bh(&bond->ipsec_lock);
555− rcu_read_unlock();
568+ mutex_unlock(&bond->ipsec_lock);
556569 }
557570
558571 static void bond_ipsec_del_sa_all(struct bonding *bond)
559572 {
560573 struct net_device *bond_dev = bond->dev;
574+ struct net_device *real_dev;
561575 struct bond_ipsec *ipsec;
562576 struct slave *slave;
563577
564− rcu_read_lock();
565− slave = rcu_dereference(bond->curr_active_slave);
566− if (!slave) {
567− rcu_read_unlock();
578+ slave = rtnl_dereference(bond->curr_active_slave);
579+ real_dev = slave ? slave->dev : NULL;
580+ if (!real_dev)
568581 return;
569− }
570582
571− spin_lock_bh(&bond->ipsec_lock);
583+ mutex_lock(&bond->ipsec_lock);
572584 list_for_each_entry(ipsec, &bond->ipsec_list, list) {
573585 if (!ipsec->xs->xso.real_dev)
574586 continue;
575587
576− if (!slave->dev->xfrmdev_ops ||
577− !slave->dev->xfrmdev_ops->xdo_dev_state_delete ||
578− netif_is_bond_master(slave->dev)) {
579− slave_warn(bond_dev, slave->dev,
588+ if (!real_dev->xfrmdev_ops ||
589+ !real_dev->xfrmdev_ops->xdo_dev_state_delete ||
590+ netif_is_bond_master(real_dev)) {
591+ slave_warn(bond_dev, real_dev,
580592 "%s: no slave xdo_dev_state_delete\n",
581593 __func__);
582594 } else {
583− slave->dev->xfrmdev_ops->xdo_dev_state_delete(ipsec->xs);
595+ real_dev->xfrmdev_ops->xdo_dev_state_delete(ipsec->xs);
596+ if (real_dev->xfrmdev_ops->xdo_dev_state_free)
597+ real_dev->xfrmdev_ops->xdo_dev_state_free(ipsec->xs);
584598 }
585− ipsec->xs->xso.real_dev = NULL;
586599 }
587− spin_unlock_bh(&bond->ipsec_lock);
600+ mutex_unlock(&bond->ipsec_lock);
601+}
602+
603+static void bond_ipsec_free_sa(struct xfrm_state *xs)
604+{
605+ struct net_device *bond_dev = xs->xso.dev;
606+ struct net_device *real_dev;
607+ netdevice_tracker tracker;
608+ struct bonding *bond;
609+ struct slave *slave;
610+
611+ if (!bond_dev)
612+ return;
613+
614+ rcu_read_lock();
615+ bond = netdev_priv(bond_dev);
616+ slave = rcu_dereference(bond->curr_active_slave);
617+ real_dev = slave ? slave->dev : NULL;
618+ netdev_hold(real_dev, &tracker, GFP_ATOMIC);
588619 rcu_read_unlock();
620+
621+ if (!slave)
622+ goto out;
623+
624+ if (!xs->xso.real_dev)
625+ goto out;
626+
627+ WARN_ON(xs->xso.real_dev != real_dev);
628+
629+ if (real_dev && real_dev->xfrmdev_ops &&
630+ real_dev->xfrmdev_ops->xdo_dev_state_free)
631+ real_dev->xfrmdev_ops->xdo_dev_state_free(xs);
632+out:
633+ netdev_put(real_dev, &tracker);
589634 }
590635
591636 /**
@@ -599,39 +644,36 @@ static bool bond_ipsec_offload_ok(struct sk_buff *skb, struct xfrm_state *xs) · 7 unmodified lines
599644 struct net_device *real_dev;
600645 struct slave *curr_active;
601646 struct bonding *bond;
602− int err;
647+ bool ok = false;
603648
604649 bond = netdev_priv(bond_dev);
605650 rcu_read_lock();
606651 curr_active = rcu_dereference(bond->curr_active_slave);
652+ if (!curr_active)
653+ goto out;
607654 real_dev = curr_active->dev;
608655
609− if (BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) {
610− err = false;
656+ if (BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP)
611657 goto out;
612− }
613658
614− if (!xs->xso.real_dev) {
615− err = false;
659+ if (!xs->xso.real_dev)
616660 goto out;
617− }
618661
619662 if (!real_dev->xfrmdev_ops ||
620663 !real_dev->xfrmdev_ops->xdo_dev_offload_ok ||
621− netif_is_bond_master(real_dev)) {
622− err = false;
664+ netif_is_bond_master(real_dev))
623665 goto out;
624− }
625666
626− err = real_dev->xfrmdev_ops->xdo_dev_offload_ok(skb, xs);
667+ ok = real_dev->xfrmdev_ops->xdo_dev_offload_ok(skb, xs);
627668 out:
628669 rcu_read_unlock();
629− return err;
670+ return ok;
630671 }
631672
632673 static const struct xfrmdev_ops bond_xfrmdev_ops = {
633674 .xdo_dev_state_add = bond_ipsec_add_sa,
634675 .xdo_dev_state_delete = bond_ipsec_del_sa,
676+ .xdo_dev_state_free = bond_ipsec_free_sa,
635677 .xdo_dev_offload_ok = bond_ipsec_offload_ok,
636678 };
637679 #endif /* CONFIG_XFRM_OFFLOAD */
@@ -5882,7 +5924,7 @@ void bond_setup(struct net_device *bond_dev) · 5244 unmodified lines
58825924 /* set up xfrm device ops (only supported in active-backup right now) */
58835925 bond_dev->xfrmdev_ops = &bond_xfrmdev_ops;
58845926 INIT_LIST_HEAD(&bond->ipsec_list);
5885− spin_lock_init(&bond->ipsec_lock);
5927+ mutex_init(&bond->ipsec_lock);
58865928 #endif /* CONFIG_XFRM_OFFLOAD */
58875929
58885930 /* don't acquire bond device's netif_tx_lock when transmitting */
@@ -5931,6 +5973,10 @@ static void bond_uninit(struct net_device *bond_dev) · 42 unmodified lines
59315973 __bond_release_one(bond_dev, slave->dev, true, true);
59325974 netdev_info(bond_dev, "Released all slaves\n");
59335975
5976+#ifdef CONFIG_XFRM_OFFLOAD
5977+ mutex_destroy(&bond->ipsec_lock);
5978+#endif /* CONFIG_XFRM_OFFLOAD */
5979+
59345980 bond_set_slave_arr(bond, NULL, NULL);
59355981
59365982 list_del_rcu(&bond->bond_list);
drivers/net/bonding/bond_options.c+1−1
@@ -936,7 +936,7 @@ static int bond_option_active_slave_set(struct bonding *bond, · 935 unmodified lines
936936 /* check to see if we are clearing active */
937937 if (!slave_dev) {
938938 netdev_dbg(bond->dev, "Clearing current active slave\n");
939− RCU_INIT_POINTER(bond->curr_active_slave, NULL);
939+ bond_change_active_slave(bond, NULL);
940940 bond_select_active_slave(bond);
941941 } else {
942942 struct slave *old_active = rtnl_dereference(bond->curr_active_slave);
drivers/net/can/usb/etas_es58x/es58x_devlink.c+1−1
@@ -215,7 +215,7 @@ static int es58x_devlink_info_get(struct devlink *devlink, · 214 unmodified lines
215215 struct es58x_sw_version *fw_ver = &es58x_dev->firmware_version;
216216 struct es58x_sw_version *bl_ver = &es58x_dev->bootloader_version;
217217 struct es58x_hw_revision *hw_rev = &es58x_dev->hardware_revision;
218− char buf[max(sizeof("xx.xx.xx"), sizeof("axxx/xxx"))];
218+ char buf[MAX(sizeof("xx.xx.xx"), sizeof("axxx/xxx"))];
219219 int ret = 0;
220220
221221 if (es58x_sw_version_is_valid(fw_ver)) {
drivers/net/dsa/bcm_sf2.c+3−1
@@ -675,8 +675,10 @@ static int bcm_sf2_mdio_register(struct dsa_switch *ds) · 674 unmodified lines
675675 of_remove_property(child, prop);
676676
677677 phydev = of_phy_find_device(child);
678− if (phydev)
678+ if (phydev) {
679679 phy_device_remove(phydev);
680+ phy_device_free(phydev);
681+ }
680682 }
681683
682684 err = mdiobus_register(priv->user_mii_bus);
drivers/net/dsa/microchip/ksz_common.c+16−0
@@ -2578,7 +2578,11 @@ static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port) · 2577 unmodified lines
25782578 if (!port)
25792579 return MICREL_KSZ8_P1_ERRATA;
25802580 break;
2581+ case KSZ8567_CHIP_ID:
25812582 case KSZ9477_CHIP_ID:
2583+ case KSZ9567_CHIP_ID:
2584+ case KSZ9896_CHIP_ID:
2585+ case KSZ9897_CHIP_ID:
25822586 /* KSZ9477 Errata DS80000754C
25832587 *
25842588 * Module 4: Energy Efficient Ethernet (EEE) feature select must
@@ -2588,6 +2592,13 @@ static u32 ksz_get_phy_flags(struct dsa_switch *ds, int port) · 3 unmodified lines
25882592 * controls. If not disabled, the PHY ports can auto-negotiate
25892593 * to enable EEE, and this feature can cause link drops when
25902594 * linked to another device supporting EEE.
2595+ *
2596+ * The same item appears in the errata for the KSZ9567, KSZ9896,
2597+ * and KSZ9897.
2598+ *
2599+ * A similar item appears in the errata for the KSZ8567, but
2600+ * provides an alternative workaround. For now, use the simple
2601+ * workaround of disabling the EEE feature for this device too.
25912602 */
25922603 return MICREL_NO_EEE;
25932604 }
@@ -3764,6 +3775,11 @@ static int ksz_port_set_mac_address(struct dsa_switch *ds, int port, · 1170 unmodified lines
37643775 return -EBUSY;
37653776 }
37663777
3778+ /* Need to initialize variable as the code to fill in settings may
3779+ * not be executed.
3780+ */
3781+ wol.wolopts = 0;
3782+
37673783 ksz_get_wol(ds, dp->index, &wol);
37683784 if (wol.wolopts & WAKE_MAGIC) {
37693785 dev_err(ds->dev,
drivers/net/dsa/microchip/ksz_ptp.c+1−4
@@ -266,7 +266,6 @@ static int ksz_ptp_enable_mode(struct ksz_device *dev) · 265 unmodified lines
266266 struct ksz_port *prt;
267267 struct dsa_port *dp;
268268 bool tag_en = false;
269− int ret;
270269
271270 dsa_switch_for_each_user_port(dp, dev->ds) {
272271 prt = &dev->ports[dp->index];
@@ -277,9 +276,7 @@ static int ksz_ptp_enable_mode(struct ksz_device *dev) · 4 unmodified lines
277276 }
278277
279278 if (tag_en) {
280− ret = ptp_schedule_worker(ptp_data->clock, 0);
281− if (ret)
282− return ret;
279+ ptp_schedule_worker(ptp_data->clock, 0);
283280 } else {
284281 ptp_cancel_worker_sync(ptp_data->clock);
285282 }
drivers/net/dsa/mv88e6xxx/global1_atu.c+2−1
@@ -457,7 +457,8 @@ static irqreturn_t mv88e6xxx_g1_atu_prob_irq_thread_fn(int irq, void *dev_id) · 456 unmodified lines
457457 trace_mv88e6xxx_atu_full_violation(chip->dev, spid,
458458 entry.portvec, entry.mac,
459459 fid);
460− chip->ports[spid].atu_full_violation++;
460+ if (spid < ARRAY_SIZE(chip->ports))
461+ chip->ports[spid].atu_full_violation++;
461462 }
462463
463464 return IRQ_HANDLED;
drivers/net/dsa/ocelot/felix.c+120−6
@@ -61,11 +61,46 @@ static int felix_cpu_port_for_conduit(struct dsa_switch *ds, · 60 unmodified lines
6161 return cpu_dp->index;
6262 }
6363
64+/**
65+ * felix_update_tag_8021q_rx_rule - Update VCAP ES0 tag_8021q rule after
66+ * vlan_filtering change
67+ * @outer_tagging_rule: Pointer to VCAP filter on which the update is performed
68+ * @vlan_filtering: Current bridge VLAN filtering setting
69+ *
70+ * Source port identification for tag_8021q is done using VCAP ES0 rules on the
71+ * CPU port(s). The ES0 tag B (inner tag from the packet) can be configured as
72+ * either:
73+ * - push_inner_tag=0: the inner tag is never pushed into the frame
74+ * (and we lose info about the classified VLAN). This is
75+ * good when the classified VLAN is a discardable quantity
76+ * for the software RX path: it is either set to
77+ * OCELOT_STANDALONE_PVID, or to
78+ * ocelot_vlan_unaware_pvid(bridge).
79+ * - push_inner_tag=1: the inner tag is always pushed. This is good when the
80+ * classified VLAN is not a discardable quantity (the port
81+ * is under a VLAN-aware bridge, and software needs to
82+ * continue processing the packet in the same VLAN as the
83+ * hardware).
84+ * The point is that what is good for a VLAN-unaware port is not good for a
85+ * VLAN-aware port, and vice versa. Thus, the RX tagging rules must be kept in
86+ * sync with the VLAN filtering state of the port.
87+ */
88+static void
89+felix_update_tag_8021q_rx_rule(struct ocelot_vcap_filter *outer_tagging_rule,
90+ bool vlan_filtering)
91+{
92+ if (vlan_filtering)
93+ outer_tagging_rule->action.push_inner_tag = OCELOT_ES0_TAG;
94+ else
95+ outer_tagging_rule->action.push_inner_tag = OCELOT_NO_ES0_TAG;
96+}
97+
6498 /* Set up VCAP ES0 rules for pushing a tag_8021q VLAN towards the CPU such that
6599 * the tagger can perform RX source port identification.
66100 */
67101 static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port,
68− int upstream, u16 vid)
102+ int upstream, u16 vid,
103+ bool vlan_filtering)
69104 {
70105 struct ocelot_vcap_filter *outer_tagging_rule;
71106 struct ocelot *ocelot = ds->priv;
@@ -96,6 +131,14 @@ static int felix_tag_8021q_vlan_add_rx(struct dsa_switch *ds, int port, · 24 unmodified lines
96131 outer_tagging_rule->action.tag_a_tpid_sel = OCELOT_TAG_TPID_SEL_8021AD;
97132 outer_tagging_rule->action.tag_a_vid_sel = 1;
98133 outer_tagging_rule->action.vid_a_val = vid;
134+ felix_update_tag_8021q_rx_rule(outer_tagging_rule, vlan_filtering);
135+ outer_tagging_rule->action.tag_b_tpid_sel = OCELOT_TAG_TPID_SEL_8021Q;
136+ /* Leave TAG_B_VID_SEL at 0 (Classified VID + VID_B_VAL). Since we also
137+ * leave VID_B_VAL at 0, this makes ES0 tag B (the inner tag) equal to
138+ * the classified VID, which we need to see in the DSA tagger's receive
139+ * path. Note: the inner tag is only visible in the packet when pushed
140+ * (push_inner_tag == OCELOT_ES0_TAG).
141+ */
99142
100143 err = ocelot_vcap_filter_add(ocelot, outer_tagging_rule, NULL);
101144 if (err)
@@ -227,6 +270,7 @@ static int felix_tag_8021q_vlan_del_tx(struct dsa_switch *ds, int port, u16 vid) · 125 unmodified lines
227270 static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid,
228271 u16 flags)
229272 {
273+ struct dsa_port *dp = dsa_to_port(ds, port);
230274 struct dsa_port *cpu_dp;
231275 int err;
232276
@@ -234,11 +278,12 @@ static int felix_tag_8021q_vlan_add(struct dsa_switch *ds, int port, u16 vid, · 1 unmodified line
234278 * membership, which we aren't. So we don't need to add any VCAP filter
235279 * for the CPU port.
236280 */
237− if (!dsa_is_user_port(ds, port))
281+ if (!dsa_port_is_user(dp))
238282 return 0;
239283
240284 dsa_switch_for_each_cpu_port(cpu_dp, ds) {
241− err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
285+ err = felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid,
286+ dsa_port_is_vlan_filtering(dp));
242287 if (err)
243288 return err;
244289 }
@@ -258,10 +303,11 @@ add_tx_failed: · 13 unmodified lines
258303
259304 static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid)
260305 {
306+ struct dsa_port *dp = dsa_to_port(ds, port);
261307 struct dsa_port *cpu_dp;
262308 int err;
263309
264− if (!dsa_is_user_port(ds, port))
310+ if (!dsa_port_is_user(dp))
265311 return 0;
266312
267313 dsa_switch_for_each_cpu_port(cpu_dp, ds) {
@@ -278,11 +324,41 @@ static int felix_tag_8021q_vlan_del(struct dsa_switch *ds, int port, u16 vid) · 10 unmodified lines
278324
279325 del_tx_failed:
280326 dsa_switch_for_each_cpu_port(cpu_dp, ds)
281− felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid);
327+ felix_tag_8021q_vlan_add_rx(ds, port, cpu_dp->index, vid,
328+ dsa_port_is_vlan_filtering(dp));
282329
283330 return err;
284331 }
285332
333+static int felix_update_tag_8021q_rx_rules(struct dsa_switch *ds, int port,
334+ bool vlan_filtering)
335+{
336+ struct ocelot_vcap_filter *outer_tagging_rule;
337+ struct ocelot_vcap_block *block_vcap_es0;
338+ struct ocelot *ocelot = ds->priv;
339+ struct dsa_port *cpu_dp;
340+ unsigned long cookie;
341+ int err;
342+
343+ block_vcap_es0 = &ocelot->block[VCAP_ES0];
344+
345+ dsa_switch_for_each_cpu_port(cpu_dp, ds) {
346+ cookie = OCELOT_VCAP_ES0_TAG_8021Q_RXVLAN(ocelot, port,
347+ cpu_dp->index);
348+
349+ outer_tagging_rule = ocelot_vcap_block_find_filter_by_id(block_vcap_es0,
350+ cookie, false);
351+
352+ felix_update_tag_8021q_rx_rule(outer_tagging_rule, vlan_filtering);
353+
354+ err = ocelot_vcap_filter_replace(ocelot, outer_tagging_rule);
355+ if (err)
356+ return err;
357+ }
358+
359+ return 0;
360+}
361+
286362 static int felix_trap_get_cpu_port(struct dsa_switch *ds,
287363 const struct ocelot_vcap_filter *trap)
288364 {
@@ -528,7 +604,19 @@ static int felix_tag_8021q_setup(struct dsa_switch *ds) · 239 unmodified lines
528604 * so we need to be careful that there are no extra frames to be
529605 * dequeued over MMIO, since we would never know to discard them.
530606 */
607+ ocelot_lock_xtr_grp_bh(ocelot, 0);
531608 ocelot_drain_cpu_queue(ocelot, 0);
609+ ocelot_unlock_xtr_grp_bh(ocelot, 0);
610+
611+ /* Problem: when using push_inner_tag=1 for ES0 tag B, we lose info
612+ * about whether the received packets were VLAN-tagged on the wire,
613+ * since they are always tagged on egress towards the CPU port.
614+ *
615+ * Since using push_inner_tag=1 is unavoidable for VLAN-aware bridges,
616+ * we must work around the fallout by untagging in software to make
617+ * untagged reception work more or less as expected.
618+ */
619+ ds->untag_vlan_aware_bridge_pvid = true;
532620
533621 return 0;
534622 }
@@ -554,6 +642,8 @@ static void felix_tag_8021q_teardown(struct dsa_switch *ds) · 19 unmodified lines
554642 ocelot_port_teardown_dsa_8021q_cpu(ocelot, dp->index);
555643
556644 dsa_tag_8021q_unregister(ds);
645+
646+ ds->untag_vlan_aware_bridge_pvid = false;
557647 }
558648
559649 static unsigned long felix_tag_8021q_get_host_fwd_mask(struct dsa_switch *ds)
@@ -1008,8 +1098,23 @@ static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled, · 448 unmodified lines
10081098 struct netlink_ext_ack *extack)
10091099 {
10101100 struct ocelot *ocelot = ds->priv;
1101+ bool using_tag_8021q;
1102+ struct felix *felix;
1103+ int err;
10111104
1012− return ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
1105+ err = ocelot_port_vlan_filtering(ocelot, port, enabled, extack);
1106+ if (err)
1107+ return err;
1108+
1109+ felix = ocelot_to_felix(ocelot);
1110+ using_tag_8021q = felix->tag_proto == DSA_TAG_PROTO_OCELOT_8021Q;
1111+ if (using_tag_8021q) {
1112+ err = felix_update_tag_8021q_rx_rules(ds, port, enabled);
1113+ if (err)
1114+ return err;
1115+ }
1116+
1117+ return 0;
10131118 }
10141119
10151120 static int felix_vlan_add(struct dsa_switch *ds, int port,
@@ -1518,6 +1623,8 @@ static void felix_port_deferred_xmit(struct kthread_work *work) · 502 unmodified lines
15181623 int port = xmit_work->dp->index;
15191624 int retries = 10;
15201625
1626+ ocelot_lock_inj_grp(ocelot, 0);
1627+
15211628 do {
15221629 if (ocelot_can_inject(ocelot, 0))
15231630 break;
@@ -1526,6 +1633,7 @@ static void felix_port_deferred_xmit(struct kthread_work *work) · 2 unmodified lines
15261633 } while (--retries);
15271634
15281635 if (!retries) {
1636+ ocelot_unlock_inj_grp(ocelot, 0);
15291637 dev_err(ocelot->dev, "port %d failed to inject skb\n",
15301638 port);
15311639 ocelot_port_purge_txtstamp_skb(ocelot, port, skb);
@@ -1535,6 +1643,8 @@ static void felix_port_deferred_xmit(struct kthread_work *work) · 3 unmodified lines
15351643
15361644 ocelot_port_inject_frame(ocelot, port, 0, rew_op, skb);
15371645
1646+ ocelot_unlock_inj_grp(ocelot, 0);
1647+
15381648 consume_skb(skb);
15391649 kfree(xmit_work);
15401650 }
@@ -1694,6 +1804,8 @@ static bool felix_check_xtr_pkt(struct ocelot *ocelot) · 153 unmodified lines
16941804 if (!felix->info->quirk_no_xtr_irq)
16951805 return false;
16961806
1807+ ocelot_lock_xtr_grp(ocelot, grp);
1808+
16971809 while (ocelot_read(ocelot, QS_XTR_DATA_PRESENT) & BIT(grp)) {
16981810 struct sk_buff *skb;
16991811 unsigned int type;
@@ -1730,6 +1842,8 @@ out: · 30 unmodified lines
17301842 ocelot_drain_cpu_queue(ocelot, 0);
17311843 }
17321844
1845+ ocelot_unlock_xtr_grp(ocelot, grp);
1846+
17331847 return true;
17341848 }
17351849
drivers/net/dsa/vitesse-vsc73xx-core.c+41−13
@@ -40,6 +40,10 @@ · 39 unmodified lines
4040 #define VSC73XX_BLOCK_ARBITER 0x5 /* Only subblock 0 */
4141 #define VSC73XX_BLOCK_SYSTEM 0x7 /* Only subblock 0 */
4242
43+/* MII Block subblock */
44+#define VSC73XX_BLOCK_MII_INTERNAL 0x0 /* Internal MDIO subblock */
45+#define VSC73XX_BLOCK_MII_EXTERNAL 0x1 /* External MDIO subblock */
46+
4347 #define CPU_PORT 6 /* CPU port */
4448
4549 /* MAC Block registers */
@@ -225,6 +229,8 @@ · 179 unmodified lines
225229 #define VSC73XX_MII_CMD 0x1
226230 #define VSC73XX_MII_DATA 0x2
227231
232+#define VSC73XX_MII_STAT_BUSY BIT(3)
233+
228234 /* Arbiter block 5 registers */
229235 #define VSC73XX_ARBEMPTY 0x0c
230236 #define VSC73XX_ARBDISC 0x0e
@@ -299,6 +305,7 @@ · 68 unmodified lines
299305 #define IS_739X(a) (IS_7395(a) || IS_7398(a))
300306
301307 #define VSC73XX_POLL_SLEEP_US 1000
308+#define VSC73XX_MDIO_POLL_SLEEP_US 5
302309 #define VSC73XX_POLL_TIMEOUT_US 10000
303310
304311 struct vsc73xx_counter {
@@ -527,6 +534,22 @@ static int vsc73xx_detect(struct vsc73xx *vsc) · 222 unmodified lines
527534 return 0;
528535 }
529536
537+static int vsc73xx_mdio_busy_check(struct vsc73xx *vsc)
538+{
539+ int ret, err;
540+ u32 val;
541+
542+ ret = read_poll_timeout(vsc73xx_read, err,
543+ err < 0 || !(val & VSC73XX_MII_STAT_BUSY),
544+ VSC73XX_MDIO_POLL_SLEEP_US,
545+ VSC73XX_POLL_TIMEOUT_US, false, vsc,
546+ VSC73XX_BLOCK_MII, VSC73XX_BLOCK_MII_INTERNAL,
547+ VSC73XX_MII_STAT, &val);
548+ if (ret)
549+ return ret;
550+ return err;
551+}
552+
530553 static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum)
531554 {
532555 struct vsc73xx *vsc = ds->priv;
@@ -534,12 +557,20 @@ static int vsc73xx_phy_read(struct dsa_switch *ds, int phy, int regnum) · 1 unmodified line
534557 u32 val;
535558 int ret;
536559
560+ ret = vsc73xx_mdio_busy_check(vsc);
561+ if (ret)
562+ return ret;
563+
537564 /* Setting bit 26 means "read" */
538565 cmd = BIT(26) | (phy << 21) | (regnum << 16);
539566 ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd);
540567 if (ret)
541568 return ret;
542− msleep(2);
569+
570+ ret = vsc73xx_mdio_busy_check(vsc);
571+ if (ret)
572+ return ret;
573+
543574 ret = vsc73xx_read(vsc, VSC73XX_BLOCK_MII, 0, 2, &val);
544575 if (ret)
545576 return ret;
@@ -563,18 +594,11 @@ static int vsc73xx_phy_write(struct dsa_switch *ds, int phy, int regnum, · 17 unmodified lines
563594 u32 cmd;
564595 int ret;
565596
566− /* It was found through tedious experiments that this router
567− * chip really hates to have it's PHYs reset. They
568− * never recover if that happens: autonegotiation stops
569− * working after a reset. Just filter out this command.
570− * (Resetting the whole chip is OK.)
571− */
572− if (regnum == 0 && (val & BIT(15))) {
573− dev_info(vsc->dev, "reset PHY - disallowed\n");
574− return 0;
575− }
597+ ret = vsc73xx_mdio_busy_check(vsc);
598+ if (ret)
599+ return ret;
576600
577− cmd = (phy << 21) | (regnum << 16);
601+ cmd = (phy << 21) | (regnum << 16) | val;
578602 ret = vsc73xx_write(vsc, VSC73XX_BLOCK_MII, 0, 1, cmd);
579603 if (ret)
580604 return ret;
@@ -957,6 +981,11 @@ static void vsc73xx_mac_link_up(struct phylink_config *config, · 376 unmodified lines
957981
958982 if (duplex == DUPLEX_FULL)
959983 val |= VSC73XX_MAC_CFG_FDX;
984+ else
985+ /* In datasheet description ("Port Mode Procedure" in 5.6.2)
986+ * this bit is configured only for half duplex.
987+ */
988+ val |= VSC73XX_MAC_CFG_WEXC_DIS;
960989
961990 /* This routine is described in the datasheet (below ARBDISC register
962991 * description)
@@ -967,7 +996,6 @@ static void vsc73xx_mac_link_up(struct phylink_config *config, · 4 unmodified lines
967996 get_random_bytes(&seed, 1);
968997 val |= seed << VSC73XX_MAC_CFG_SEED_OFFSET;
969998 val |= VSC73XX_MAC_CFG_SEED_LOAD;
970− val |= VSC73XX_MAC_CFG_WEXC_DIS;
971999
9721000 /* Those bits are responsible for MTU only. Kernel takes care about MTU,
9731001 * let's enable +8 bytes frame length unconditionally.
drivers/net/ethernet/broadcom/bnxt/bnxt.c+13−10
@@ -5056,7 +5056,7 @@ void bnxt_del_one_usr_fltr(struct bnxt *bp, struct bnxt_filter_base *fltr) · 5055 unmodified lines
50565056 list_del_init(&fltr->list);
50575057 }
50585058
5059−void bnxt_clear_usr_fltrs(struct bnxt *bp, bool all)
5059+static void bnxt_clear_usr_fltrs(struct bnxt *bp, bool all)
50605060 {
50615061 struct bnxt_filter_base *usr_fltr, *tmp;
50625062
@@ -7591,19 +7591,20 @@ static bool bnxt_need_reserve_rings(struct bnxt *bp) · 2528 unmodified lines
75917591 int rx = bp->rx_nr_rings, stat;
75927592 int vnic, grp = rx;
75937593
7594− if (hw_resc->resv_tx_rings != bp->tx_nr_rings &&
7595− bp->hwrm_spec_code >= 0x10601)
7596− return true;
7597−
75987594 /* Old firmware does not need RX ring reservations but we still
75997595 * need to setup a default RSS map when needed. With new firmware
76007596 * we go through RX ring reservations first and then set up the
76017597 * RSS map for the successfully reserved RX rings when needed.
76027598 */
7603− if (!BNXT_NEW_RM(bp)) {
7599+ if (!BNXT_NEW_RM(bp))
76047600 bnxt_check_rss_tbl_no_rmgr(bp);
7601+
7602+ if (hw_resc->resv_tx_rings != bp->tx_nr_rings &&
7603+ bp->hwrm_spec_code >= 0x10601)
7604+ return true;
7605+
7606+ if (!BNXT_NEW_RM(bp))
76057607 return false;
7606− }
76077608
76087609 vnic = bnxt_get_total_vnics(bp, rx);
76097610
@@ -7649,8 +7650,8 @@ static int bnxt_get_avail_msix(struct bnxt *bp, int num); · 39 unmodified lines
76497650 static int __bnxt_reserve_rings(struct bnxt *bp)
76507651 {
76517652 struct bnxt_hw_rings hwr = {0};
7653+ int rx_rings, old_rx_rings, rc;
76527654 int cp = bp->cp_nr_rings;
7653− int rx_rings, rc;
76547655 int ulp_msix = 0;
76557656 bool sh = false;
76567657 int tx_cp;
@@ -7684,6 +7685,7 @@ static int __bnxt_reserve_rings(struct bnxt *bp) · 27 unmodified lines
76847685 hwr.grp = bp->rx_nr_rings;
76857686 hwr.rss_ctx = bnxt_get_total_rss_ctxs(bp, &hwr);
76867687 hwr.stat = bnxt_get_func_stat_ctxs(bp);
7688+ old_rx_rings = bp->hw_resc.resv_rx_rings;
76877689
76887690 rc = bnxt_hwrm_reserve_rings(bp, &hwr);
76897691 if (rc)
@@ -7738,7 +7740,8 @@ static int __bnxt_reserve_rings(struct bnxt *bp) · 48 unmodified lines
77387740 if (!bnxt_rings_ok(bp, &hwr))
77397741 return -ENOMEM;
77407742
7741− if (!netif_is_rxfh_configured(bp->dev))
7743+ if (old_rx_rings != bp->hw_resc.resv_rx_rings &&
7744+ !netif_is_rxfh_configured(bp->dev))
77427745 bnxt_set_dflt_rss_indir_tbl(bp, NULL);
77437746
77447747 if (!bnxt_ulp_registered(bp->edev) && BNXT_NEW_RM(bp)) {
@@ -10245,7 +10248,7 @@ static void bnxt_hwrm_realloc_rss_ctx_vnic(struct bnxt *bp) · 2500 unmodified lines
1024510248 }
1024610249 }
1024710250
10248−void bnxt_clear_rss_ctxs(struct bnxt *bp)
10251+static void bnxt_clear_rss_ctxs(struct bnxt *bp)
1024910252 {
1025010253 struct ethtool_rxfh_context *ctx;
1025110254 unsigned long context;
drivers/net/ethernet/broadcom/bnxt/bnxt.h+0−2
@@ -2790,7 +2790,6 @@ void bnxt_set_ring_params(struct bnxt *); · 2789 unmodified lines
27902790 int bnxt_set_rx_skb_mode(struct bnxt *bp, bool page_mode);
27912791 void bnxt_insert_usr_fltr(struct bnxt *bp, struct bnxt_filter_base *fltr);
27922792 void bnxt_del_one_usr_fltr(struct bnxt *bp, struct bnxt_filter_base *fltr);
2793−void bnxt_clear_usr_fltrs(struct bnxt *bp, bool all);
27942793 int bnxt_hwrm_func_drv_rgtr(struct bnxt *bp, unsigned long *bmap,
27952794 int bmap_size, bool async_only);
27962795 int bnxt_hwrm_func_drv_unrgtr(struct bnxt *bp);
@@ -2842,7 +2841,6 @@ int bnxt_hwrm_vnic_rss_cfg_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic); · 45 unmodified lines
28422841 int __bnxt_setup_vnic_p5(struct bnxt *bp, struct bnxt_vnic_info *vnic);
28432842 void bnxt_del_one_rss_ctx(struct bnxt *bp, struct bnxt_rss_ctx *rss_ctx,
28442843 bool all);
2845−void bnxt_clear_rss_ctxs(struct bnxt *bp);
28462844 int bnxt_open_nic(struct bnxt *, bool, bool);
28472845 int bnxt_half_open_nic(struct bnxt *bp);
28482846 void bnxt_half_close_nic(struct bnxt *bp);
drivers/net/ethernet/broadcom/bnxt/bnxt_ethtool.c+13−7
@@ -968,9 +968,6 @@ static int bnxt_set_channels(struct net_device *dev, · 967 unmodified lines
968968 return -EINVAL;
969969 }
970970
971− bnxt_clear_usr_fltrs(bp, true);
972− if (BNXT_SUPPORTS_MULTI_RSS_CTX(bp))
973− bnxt_clear_rss_ctxs(bp);
974971 if (netif_running(dev)) {
975972 if (BNXT_PF(bp)) {
976973 /* TODO CHIMP_FW: Send message to all VF's
@@ -1863,8 +1860,14 @@ static void bnxt_modify_rss(struct bnxt *bp, struct ethtool_rxfh_context *ctx, · 886 unmodified lines
18631860 }
18641861
18651862 static int bnxt_rxfh_context_check(struct bnxt *bp,
1863+ const struct ethtool_rxfh_param *rxfh,
18661864 struct netlink_ext_ack *extack)
18671865 {
1866+ if (rxfh->hfunc && rxfh->hfunc != ETH_RSS_HASH_TOP) {
1867+ NL_SET_ERR_MSG_MOD(extack, "RSS hash function not supported");
1868+ return -EOPNOTSUPP;
1869+ }
1870+
18681871 if (!BNXT_SUPPORTS_MULTI_RSS_CTX(bp)) {
18691872 NL_SET_ERR_MSG_MOD(extack, "RSS contexts not supported");
18701873 return -EOPNOTSUPP;
@@ -1888,7 +1891,7 @@ static int bnxt_create_rxfh_context(struct net_device *dev, · 17 unmodified lines
18881891 struct bnxt_vnic_info *vnic;
18891892 int rc;
18901893
1891− rc = bnxt_rxfh_context_check(bp, extack);
1894+ rc = bnxt_rxfh_context_check(bp, rxfh, extack);
18921895 if (rc)
18931896 return rc;
18941897
@@ -1915,8 +1918,12 @@ static int bnxt_create_rxfh_context(struct net_device *dev, · 20 unmodified lines
19151918 if (rc)
19161919 goto out;
19171920
1921+ /* Populate defaults in the context */
19181922 bnxt_set_dflt_rss_indir_tbl(bp, ctx);
1923+ ctx->hfunc = ETH_RSS_HASH_TOP;
19191924 memcpy(vnic->rss_hash_key, bp->rss_hash_key, HW_HASH_KEY_SIZE);
1925+ memcpy(ethtool_rxfh_context_key(ctx),
1926+ bp->rss_hash_key, HW_HASH_KEY_SIZE);
19201927
19211928 rc = bnxt_hwrm_vnic_alloc(bp, vnic, 0, bp->rx_nr_rings);
19221929 if (rc) {
@@ -1953,7 +1960,7 @@ static int bnxt_modify_rxfh_context(struct net_device *dev, · 30 unmodified lines
19531960 struct bnxt_rss_ctx *rss_ctx;
19541961 int rc;
19551962
1956− rc = bnxt_rxfh_context_check(bp, extack);
1963+ rc = bnxt_rxfh_context_check(bp, rxfh, extack);
19571964 if (rc)
19581965 return rc;
19591966
@@ -1990,7 +1997,6 @@ static int bnxt_set_rxfh(struct net_device *dev, · 30 unmodified lines
19901997
19911998 bnxt_modify_rss(bp, NULL, NULL, rxfh);
19921999
1993− bnxt_clear_usr_fltrs(bp, false);
19942000 if (netif_running(bp->dev)) {
19952001 bnxt_close_nic(bp, false, false);
19962002 rc = bnxt_open_nic(bp, false, false);
@@ -5280,7 +5286,7 @@ void bnxt_ethtool_free(struct bnxt *bp) · 3283 unmodified lines
52805286 const struct ethtool_ops bnxt_ethtool_ops = {
52815287 .cap_link_lanes_supported = 1,
52825288 .cap_rss_ctx_supported = 1,
5283− .rxfh_max_context_id = BNXT_MAX_ETH_RSS_CTX,
5289+ .rxfh_max_num_contexts = BNXT_MAX_ETH_RSS_CTX + 1,
52845290 .rxfh_indir_space = BNXT_MAX_RSS_TABLE_ENTRIES_P5,
52855291 .rxfh_priv_size = sizeof(struct bnxt_rss_ctx),
52865292 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
drivers/net/ethernet/broadcom/bnxt/bnxt_xdp.c+0−5
@@ -297,11 +297,6 @@ bool bnxt_rx_xdp(struct bnxt *bp, struct bnxt_rx_ring_info *rxr, u16 cons, · 296 unmodified lines
297297 * redirect is coming from a frame received by the
298298 * bnxt_en driver.
299299 */
300− rx_buf = &rxr->rx_buf_ring[cons];
301− mapping = rx_buf->mapping - bp->rx_dma_offset;
302− dma_unmap_page_attrs(&pdev->dev, mapping,
303− BNXT_RX_PAGE_SIZE, bp->rx_dir,
304− DMA_ATTR_WEAK_ORDERING);
305300
306301 /* if we are unable to allocate a new buffer, abort and reuse */
307302 if (bnxt_alloc_rx_data(bp, rxr, rxr->rx_prod, GFP_ATOMIC)) {
drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c+5−9
@@ -42,19 +42,15 @@ void bcmgenet_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) · 41 unmodified lines
4242 struct bcmgenet_priv *priv = netdev_priv(dev);
4343 struct device *kdev = &priv->pdev->dev;
4444
45− if (dev->phydev) {
45+ if (dev->phydev)
4646 phy_ethtool_get_wol(dev->phydev, wol);
47− if (wol->supported)
48− return;
49− }
5047
51− if (!device_can_wakeup(kdev)) {
52− wol->supported = 0;
53− wol->wolopts = 0;
48+ /* MAC is not wake-up capable, return what the PHY does */
49+ if (!device_can_wakeup(kdev))
5450 return;
55− }
5651
57− wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
52+ /* Overlay MAC capabilities with that of the PHY queried before */
53+ wol->supported |= WAKE_MAGIC | WAKE_MAGICSECURE | WAKE_FILTER;
5854 wol->wolopts = priv->wolopts;
5955 memset(wol->sopass, 0, sizeof(wol->sopass));
6056
drivers/net/ethernet/cadence/macb_main.c+2−2
@@ -5250,8 +5250,8 @@ static int __maybe_unused macb_suspend(struct device *dev) · 5249 unmodified lines
52505250 if (bp->wol & MACB_WOL_ENABLED) {
52515251 /* Check for IP address in WOL ARP mode */
52525252 idev = __in_dev_get_rcu(bp->dev);
5253− if (idev && idev->ifa_list)
5254− ifa = rcu_access_pointer(idev->ifa_list);
5253+ if (idev)
5254+ ifa = rcu_dereference(idev->ifa_list);
52555255 if ((bp->wolopts & WAKE_ARP) && !ifa) {
52565256 netdev_err(netdev, "IP address not assigned as required by WoL walk ARP\n");
52575257 return -EOPNOTSUPP;
drivers/net/ethernet/cavium/thunder/thunder_bgx.c+21−9
@@ -1054,18 +1054,12 @@ static int phy_interface_mode(u8 lmac_type) · 1053 unmodified lines
10541054
10551055 static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
10561056 {
1057− struct lmac *lmac, **priv;
1057+ struct lmac *lmac;
10581058 u64 cfg;
10591059
10601060 lmac = &bgx->lmac[lmacid];
10611061 lmac->bgx = bgx;
10621062
1063− lmac->netdev = alloc_netdev_dummy(sizeof(struct lmac *));
1064− if (!lmac->netdev)
1065− return -ENOMEM;
1066− priv = netdev_priv(lmac->netdev);
1067− *priv = lmac;
1068−
10691063 if ((lmac->lmac_type == BGX_MODE_SGMII) ||
10701064 (lmac->lmac_type == BGX_MODE_QSGMII) ||
10711065 (lmac->lmac_type == BGX_MODE_RGMII)) {
@@ -1191,7 +1185,6 @@ static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid) · 119 unmodified lines
11911185 (lmac->lmac_type != BGX_MODE_10G_KR) && lmac->phydev)
11921186 phy_disconnect(lmac->phydev);
11931187
1194− free_netdev(lmac->netdev);
11951188 lmac->phydev = NULL;
11961189 }
11971190
@@ -1653,6 +1646,23 @@ static int bgx_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 455 unmodified lines
16531646
16541647 bgx_get_qlm_mode(bgx);
16551648
1649+ for (lmac = 0; lmac < bgx->lmac_count; lmac++) {
1650+ struct lmac *lmacp, **priv;
1651+
1652+ lmacp = &bgx->lmac[lmac];
1653+ lmacp->netdev = alloc_netdev_dummy(sizeof(struct lmac *));
1654+
1655+ if (!lmacp->netdev) {
1656+ for (int i = 0; i < lmac; i++)
1657+ free_netdev(bgx->lmac[i].netdev);
1658+ err = -ENOMEM;
1659+ goto err_enable;
1660+ }
1661+
1662+ priv = netdev_priv(lmacp->netdev);
1663+ *priv = lmacp;
1664+ }
1665+
16561666 err = bgx_init_phy(bgx);
16571667 if (err)
16581668 goto err_enable;
@@ -1692,8 +1702,10 @@ static void bgx_remove(struct pci_dev *pdev) · 33 unmodified lines
16921702 u8 lmac;
16931703
16941704 /* Disable all LMACs */
1695− for (lmac = 0; lmac < bgx->lmac_count; lmac++)
1705+ for (lmac = 0; lmac < bgx->lmac_count; lmac++) {
16961706 bgx_lmac_disable(bgx, lmac);
1707+ free_netdev(bgx->lmac[lmac].netdev);
1708+ }
16971709
16981710 pci_free_irq(pdev, GMPX_GMI_TX_INT, bgx);
16991711
drivers/net/ethernet/chelsio/cxgb4/cxgb4_filter.c+2−1
@@ -1244,7 +1244,8 @@ static u64 hash_filter_ntuple(struct ch_filter_specification *fs, · 1243 unmodified lines
12441244 * in the Compressed Filter Tuple.
12451245 */
12461246 if (tp->vlan_shift >= 0 && fs->mask.ivlan)
1247− ntuple |= (FT_VLAN_VLD_F | fs->val.ivlan) << tp->vlan_shift;
1247+ ntuple |= (u64)(FT_VLAN_VLD_F |
1248+ fs->val.ivlan) << tp->vlan_shift;
12481249
12491250 if (tp->port_shift >= 0 && fs->mask.iport)
12501251 ntuple |= (u64)fs->val.iport << tp->port_shift;
drivers/net/ethernet/faraday/ftgmac100.c+18−8
@@ -572,7 +572,7 @@ static bool ftgmac100_rx_packet(struct ftgmac100 *priv, int *processed) · 571 unmodified lines
572572 (*processed)++;
573573 return true;
574574
575− drop:
575+drop:
576576 /* Clean rxdes0 (which resets own bit) */
577577 rxdes->rxdes0 = cpu_to_le32(status & priv->rxdes0_edorr_mask);
578578 priv->rx_pointer = ftgmac100_next_rx_pointer(priv, pointer);
@@ -656,6 +656,11 @@ static bool ftgmac100_tx_complete_packet(struct ftgmac100 *priv) · 77 unmodified lines
656656 ftgmac100_free_tx_packet(priv, pointer, skb, txdes, ctl_stat);
657657 txdes->txdes0 = cpu_to_le32(ctl_stat & priv->txdes0_edotr_mask);
658658
659+ /* Ensure the descriptor config is visible before setting the tx
660+ * pointer.
661+ */
662+ smp_wmb();
663+
659664 priv->tx_clean_pointer = ftgmac100_next_tx_pointer(priv, pointer);
660665
661666 return true;
@@ -809,6 +814,11 @@ static netdev_tx_t ftgmac100_hard_start_xmit(struct sk_buff *skb, · 147 unmodified lines
809814 dma_wmb();
810815 first->txdes0 = cpu_to_le32(f_ctl_stat);
811816
817+ /* Ensure the descriptor config is visible before setting the tx
818+ * pointer.
819+ */
820+ smp_wmb();
821+
812822 /* Update next TX pointer */
813823 priv->tx_pointer = pointer;
814824
@@ -829,7 +839,7 @@ static netdev_tx_t ftgmac100_hard_start_xmit(struct sk_buff *skb, · 14 unmodified lines
829839
830840 return NETDEV_TX_OK;
831841
832− dma_err:
842+dma_err:
833843 if (net_ratelimit())
834844 netdev_err(netdev, "map tx fragment failed\n");
835845
@@ -851,7 +861,7 @@ static netdev_tx_t ftgmac100_hard_start_xmit(struct sk_buff *skb, · 15 unmodified lines
851861 * last fragment, so we know ftgmac100_free_tx_packet()
852862 * hasn't freed the skb yet.
853863 */
854− drop:
864+drop:
855865 /* Drop the packet */
856866 dev_kfree_skb_any(skb);
857867 netdev->stats.tx_dropped++;
@@ -1344,7 +1354,7 @@ static void ftgmac100_reset(struct ftgmac100 *priv) · 486 unmodified lines
13441354 ftgmac100_init_all(priv, true);
13451355
13461356 netdev_dbg(netdev, "Reset done !\n");
1347− bail:
1357+bail:
13481358 if (priv->mii_bus)
13491359 mutex_unlock(&priv->mii_bus->mdio_lock);
13501360 if (netdev->phydev)
@@ -1543,15 +1553,15 @@ static int ftgmac100_open(struct net_device *netdev) · 192 unmodified lines
15431553
15441554 return 0;
15451555
1546− err_ncsi:
1556+err_ncsi:
15471557 napi_disable(&priv->napi);
15481558 netif_stop_queue(netdev);
1549− err_alloc:
1559+err_alloc:
15501560 ftgmac100_free_buffers(priv);
15511561 free_irq(netdev->irq, netdev);
1552− err_irq:
1562+err_irq:
15531563 netif_napi_del(&priv->napi);
1554− err_hw:
1564+err_hw:
15551565 iowrite32(0, priv->base + FTGMAC100_OFFSET_IER);
15561566 ftgmac100_free_rings(priv);
15571567 return err;
drivers/net/ethernet/freescale/dpaa2/dpaa2-switch.c+4−3
@@ -2638,13 +2638,14 @@ static int dpaa2_switch_refill_bp(struct ethsw_core *ethsw) · 2637 unmodified lines
26382638
26392639 static int dpaa2_switch_seed_bp(struct ethsw_core *ethsw)
26402640 {
2641− int *count, i;
2641+ int *count, ret, i;
26422642
26432643 for (i = 0; i < DPAA2_ETHSW_NUM_BUFS; i += BUFS_PER_CMD) {
2644+ ret = dpaa2_switch_add_bufs(ethsw, ethsw->bpid);
26442645 count = &ethsw->buf_count;
2645− *count += dpaa2_switch_add_bufs(ethsw, ethsw->bpid);
2646+ *count += ret;
26462647
2647− if (unlikely(*count < BUFS_PER_CMD))
2648+ if (unlikely(ret < BUFS_PER_CMD))
26482649 return -ENOMEM;
26492650 }
26502651
drivers/net/ethernet/freescale/fec_ptp.c+3−0
@@ -775,6 +775,9 @@ void fec_ptp_stop(struct platform_device *pdev) · 774 unmodified lines
775775 struct net_device *ndev = platform_get_drvdata(pdev);
776776 struct fec_enet_private *fep = netdev_priv(ndev);
777777
778+ if (fep->pps_enable)
779+ fec_ptp_enable_pps(fep, 0);
780+
778781 cancel_delayed_work_sync(&fep->time_keep);
779782 hrtimer_cancel(&fep->perout_timer);
780783 if (fep->ptp_clock)
drivers/net/ethernet/google/gve/gve_ethtool.c+1−1
@@ -495,7 +495,7 @@ static int gve_set_channels(struct net_device *netdev, · 494 unmodified lines
495495 return -EINVAL;
496496 }
497497
498− if (!netif_carrier_ok(netdev)) {
498+ if (!netif_running(netdev)) {
499499 priv->tx_cfg.num_queues = new_tx;
500500 priv->rx_cfg.num_queues = new_rx;
501501 return 0;
drivers/net/ethernet/google/gve/gve_main.c+6−6
@@ -1566,7 +1566,7 @@ static int gve_set_xdp(struct gve_priv *priv, struct bpf_prog *prog, · 1565 unmodified lines
15661566 u32 status;
15671567
15681568 old_prog = READ_ONCE(priv->xdp_prog);
1569− if (!netif_carrier_ok(priv->dev)) {
1569+ if (!netif_running(priv->dev)) {
15701570 WRITE_ONCE(priv->xdp_prog, prog);
15711571 if (old_prog)
15721572 bpf_prog_put(old_prog);
@@ -1847,7 +1847,7 @@ int gve_adjust_queues(struct gve_priv *priv, · 274 unmodified lines
18471847 rx_alloc_cfg.qcfg = &new_rx_config;
18481848 tx_alloc_cfg.num_rings = new_tx_config.num_queues;
18491849
1850− if (netif_carrier_ok(priv->dev)) {
1850+ if (netif_running(priv->dev)) {
18511851 err = gve_adjust_config(priv, &tx_alloc_cfg, &rx_alloc_cfg);
18521852 return err;
18531853 }
@@ -2064,7 +2064,7 @@ static int gve_set_features(struct net_device *netdev, · 210 unmodified lines
20642064
20652065 if ((netdev->features & NETIF_F_LRO) != (features & NETIF_F_LRO)) {
20662066 netdev->features ^= NETIF_F_LRO;
2067− if (netif_carrier_ok(netdev)) {
2067+ if (netif_running(netdev)) {
20682068 err = gve_adjust_config(priv, &tx_alloc_cfg, &rx_alloc_cfg);
20692069 if (err)
20702070 goto revert_features;
@@ -2359,7 +2359,7 @@ err: · 288 unmodified lines
23592359
23602360 int gve_reset(struct gve_priv *priv, bool attempt_teardown)
23612361 {
2362− bool was_up = netif_carrier_ok(priv->dev);
2362+ bool was_up = netif_running(priv->dev);
23632363 int err;
23642364
23652365 dev_info(&priv->pdev->dev, "Performing reset\n");
@@ -2700,7 +2700,7 @@ static void gve_shutdown(struct pci_dev *pdev) · 334 unmodified lines
27002700 {
27012701 struct net_device *netdev = pci_get_drvdata(pdev);
27022702 struct gve_priv *priv = netdev_priv(netdev);
2703− bool was_up = netif_carrier_ok(priv->dev);
2703+ bool was_up = netif_running(priv->dev);
27042704
27052705 rtnl_lock();
27062706 if (was_up && gve_close(priv->dev)) {
@@ -2718,7 +2718,7 @@ static int gve_suspend(struct pci_dev *pdev, pm_message_t state) · 11 unmodified lines
27182718 {
27192719 struct net_device *netdev = pci_get_drvdata(pdev);
27202720 struct gve_priv *priv = netdev_priv(netdev);
2721− bool was_up = netif_carrier_ok(priv->dev);
2721+ bool was_up = netif_running(priv->dev);
27222722
27232723 priv->suspend_cnt++;
27242724 rtnl_lock();
drivers/net/ethernet/hisilicon/hns3/hns3_enet.c+3−0
@@ -5724,6 +5724,9 @@ static int hns3_reset_notify_uninit_enet(struct hnae3_handle *handle) · 5723 unmodified lines
57245724 struct net_device *netdev = handle->kinfo.netdev;
57255725 struct hns3_nic_priv *priv = netdev_priv(netdev);
57265726
5727+ if (!test_bit(HNS3_NIC_STATE_DOWN, &priv->state))
5728+ hns3_nic_net_stop(netdev);
5729+
57275730 if (!test_and_clear_bit(HNS3_NIC_STATE_INITED, &priv->state)) {
57285731 netdev_warn(netdev, "already uninitialized\n");
57295732 return 0;
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c+3−3
@@ -1598,8 +1598,7 @@ static void hclge_query_reg_info_of_ssu(struct hclge_dev *hdev) · 1597 unmodified lines
15981598 {
15991599 u32 loop_para[HCLGE_MOD_MSG_PARA_ARRAY_MAX_SIZE] = {0};
16001600 struct hclge_mod_reg_common_msg msg;
1601− u8 i, j, num;
1602− u32 loop_time;
1601+ u8 i, j, num, loop_time;
16031602
16041603 num = ARRAY_SIZE(hclge_ssu_reg_common_msg);
16051604 for (i = 0; i < num; i++) {
@@ -1609,7 +1608,8 @@ static void hclge_query_reg_info_of_ssu(struct hclge_dev *hdev) · 3 unmodified lines
16091608 loop_time = 1;
16101609 loop_para[0] = 0;
16111610 if (msg.need_para) {
1612− loop_time = hdev->ae_dev->dev_specs.tnl_num;
1611+ loop_time = min(hdev->ae_dev->dev_specs.tnl_num,
1612+ HCLGE_MOD_MSG_PARA_ARRAY_MAX_SIZE);
16131613 for (j = 0; j < loop_time; j++)
16141614 loop_para[j] = j + 1;
16151615 }
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c+21−9
@@ -2653,8 +2653,17 @@ static int hclge_cfg_mac_speed_dup_h(struct hnae3_handle *handle, int speed, · 2652 unmodified lines
26532653 {
26542654 struct hclge_vport *vport = hclge_get_vport(handle);
26552655 struct hclge_dev *hdev = vport->back;
2656+ int ret;
2657+
2658+ ret = hclge_cfg_mac_speed_dup(hdev, speed, duplex, lane_num);
2659+
2660+ if (ret)
2661+ return ret;
26562662
2657− return hclge_cfg_mac_speed_dup(hdev, speed, duplex, lane_num);
2663+ hdev->hw.mac.req_speed = speed;
2664+ hdev->hw.mac.req_duplex = duplex;
2665+
2666+ return 0;
26582667 }
26592668
26602669 static int hclge_set_autoneg_en(struct hclge_dev *hdev, bool enable)
@@ -2956,17 +2965,20 @@ static int hclge_mac_init(struct hclge_dev *hdev) · 295 unmodified lines
29562965 if (!test_bit(HCLGE_STATE_RST_HANDLING, &hdev->state))
29572966 hdev->hw.mac.duplex = HCLGE_MAC_FULL;
29582967
2959− ret = hclge_cfg_mac_speed_dup_hw(hdev, hdev->hw.mac.speed,
2960− hdev->hw.mac.duplex, hdev->hw.mac.lane_num);
2961− if (ret)
2962− return ret;
2963−
29642968 if (hdev->hw.mac.support_autoneg) {
29652969 ret = hclge_set_autoneg_en(hdev, hdev->hw.mac.autoneg);
29662970 if (ret)
29672971 return ret;
29682972 }
29692973
2974+ if (!hdev->hw.mac.autoneg) {
2975+ ret = hclge_cfg_mac_speed_dup_hw(hdev, hdev->hw.mac.req_speed,
2976+ hdev->hw.mac.req_duplex,
2977+ hdev->hw.mac.lane_num);
2978+ if (ret)
2979+ return ret;
2980+ }
2981+
29702982 mac->link = 0;
29712983
29722984 if (mac->user_fec_mode & BIT(HNAE3_FEC_USER_DEF)) {
@@ -11444,7 +11456,7 @@ static void hclge_pci_uninit(struct hclge_dev *hdev) · 8471 unmodified lines
1144411456
1144511457 pcim_iounmap(pdev, hdev->hw.hw.io_base);
1144611458 pci_free_irq_vectors(pdev);
11447− pci_release_mem_regions(pdev);
11459+ pci_release_regions(pdev);
1144811460 pci_disable_device(pdev);
1144911461 }
1145011462
@@ -11516,8 +11528,8 @@ static void hclge_reset_done(struct hnae3_ae_dev *ae_dev) · 65 unmodified lines
1151611528 dev_err(&hdev->pdev->dev, "fail to rebuild, ret=%d\n", ret);
1151711529
1151811530 hdev->reset_type = HNAE3_NONE_RESET;
11519− clear_bit(HCLGE_STATE_RST_HANDLING, &hdev->state);
11520− up(&hdev->reset_sem);
11531+ if (test_and_clear_bit(HCLGE_STATE_RST_HANDLING, &hdev->state))
11532+ up(&hdev->reset_sem);
1152111533 }
1152211534
1152311535 static void hclge_clear_resetting_state(struct hclge_dev *hdev)
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c+3−0
@@ -191,6 +191,9 @@ static void hclge_mac_adjust_link(struct net_device *netdev) · 190 unmodified lines
191191 if (ret)
192192 netdev_err(netdev, "failed to adjust link.\n");
193193
194+ hdev->hw.mac.req_speed = (u32)speed;
195+ hdev->hw.mac.req_duplex = (u8)duplex;
196+
194197 ret = hclge_cfg_flowctrl(hdev);
195198 if (ret)
196199 netdev_err(netdev, "failed to configure flow control.\n");
drivers/net/ethernet/hisilicon/hns3/hns3vf/hclgevf_main.c+2−2
@@ -1747,8 +1747,8 @@ static void hclgevf_reset_done(struct hnae3_ae_dev *ae_dev) · 1746 unmodified lines
17471747 ret);
17481748
17491749 hdev->reset_type = HNAE3_NONE_RESET;
1750− clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state);
1751− up(&hdev->reset_sem);
1750+ if (test_and_clear_bit(HCLGEVF_STATE_RST_HANDLING, &hdev->state))
1751+ up(&hdev->reset_sem);
17521752 }
17531753
17541754 static u32 hclgevf_get_fw_version(struct hnae3_handle *handle)
drivers/net/ethernet/intel/ice/devlink/devlink_port.c+2−2
@@ -337,7 +337,7 @@ int ice_devlink_create_pf_port(struct ice_pf *pf) · 336 unmodified lines
337337 return -EIO;
338338
339339 attrs.flavour = DEVLINK_PORT_FLAVOUR_PHYSICAL;
340− attrs.phys.port_number = pf->hw.bus.func;
340+ attrs.phys.port_number = pf->hw.pf_id;
341341
342342 /* As FW supports only port split options for whole device,
343343 * set port split options only for first PF.
@@ -455,7 +455,7 @@ int ice_devlink_create_vf_port(struct ice_vf *vf) · 111 unmodified lines
455455 return -EINVAL;
456456
457457 attrs.flavour = DEVLINK_PORT_FLAVOUR_PCI_VF;
458− attrs.pci_vf.pf = pf->hw.bus.func;
458+ attrs.pci_vf.pf = pf->hw.pf_id;
459459 attrs.pci_vf.vf = vf->vf_id;
460460
461461 ice_devlink_set_switch_id(pf, &attrs.switch_id);
drivers/net/ethernet/intel/ice/ice.h+5−6
@@ -765,18 +765,17 @@ static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi, · 764 unmodified lines
765765 }
766766
767767 /**
768− * ice_xsk_pool - get XSK buffer pool bound to a ring
768+ * ice_rx_xsk_pool - assign XSK buff pool to Rx ring
769769 * @ring: Rx ring to use
770770 *
771− * Returns a pointer to xsk_buff_pool structure if there is a buffer pool
772− * present, NULL otherwise.
771+ * Sets XSK buff pool pointer on Rx ring.
773772 */
774−static inline struct xsk_buff_pool *ice_xsk_pool(struct ice_rx_ring *ring)
773+static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring)
775774 {
776775 struct ice_vsi *vsi = ring->vsi;
777776 u16 qid = ring->q_index;
778777
779− return ice_get_xp_from_qid(vsi, qid);
778+ WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));
780779 }
781780
782781 /**
@@ -801,7 +800,7 @@ static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid) · 18 unmodified lines
801800 if (!ring)
802801 return;
803802
804− ring->xsk_pool = ice_get_xp_from_qid(vsi, qid);
803+ WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));
805804 }
806805
807806 /**
drivers/net/ethernet/intel/ice/ice_base.c+22−3
@@ -512,6 +512,25 @@ static void ice_xsk_pool_fill_cb(struct ice_rx_ring *ring) · 511 unmodified lines
512512 xsk_pool_fill_cb(ring->xsk_pool, &desc);
513513 }
514514
515+/**
516+ * ice_get_frame_sz - calculate xdp_buff::frame_sz
517+ * @rx_ring: the ring being configured
518+ *
519+ * Return frame size based on underlying PAGE_SIZE
520+ */
521+static unsigned int ice_get_frame_sz(struct ice_rx_ring *rx_ring)
522+{
523+ unsigned int frame_sz;
524+
525+#if (PAGE_SIZE >= 8192)
526+ frame_sz = rx_ring->rx_buf_len;
527+#else
528+ frame_sz = ice_rx_pg_size(rx_ring) / 2;
529+#endif
530+
531+ return frame_sz;
532+}
533+
515534 /**
516535 * ice_vsi_cfg_rxq - Configure an Rx queue
517536 * @ring: the ring being configured
@@ -536,7 +555,7 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring) · 18 unmodified lines
536555 return err;
537556 }
538557
539− ring->xsk_pool = ice_xsk_pool(ring);
558+ ice_rx_xsk_pool(ring);
540559 if (ring->xsk_pool) {
541560 xdp_rxq_info_unreg(&ring->xdp_rxq);
542561
@@ -576,7 +595,7 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring) · 33 unmodified lines
576595 }
577596 }
578597
579− xdp_init_buff(&ring->xdp, ice_rx_pg_size(ring) / 2, &ring->xdp_rxq);
598+ xdp_init_buff(&ring->xdp, ice_get_frame_sz(ring), &ring->xdp_rxq);
580599 ring->xdp.data = NULL;
581600 ring->xdp_ext.pkt_ctx = &ring->pkt_ctx;
582601 err = ice_setup_rx_ctx(ring);
@@ -597,7 +616,7 @@ static int ice_vsi_cfg_rxq(struct ice_rx_ring *ring) · 14 unmodified lines
597616 return 0;
598617 }
599618
600− ok = ice_alloc_rx_bufs_zc(ring, num_bufs);
619+ ok = ice_alloc_rx_bufs_zc(ring, ring->xsk_pool, num_bufs);
601620 if (!ok) {
602621 u16 pf_q = ring->vsi->rxq_map[ring->q_index];
603622
drivers/net/ethernet/intel/ice/ice_ethtool.c+4−4
@@ -4673,10 +4673,10 @@ static int ice_get_port_fec_stats(struct ice_hw *hw, u16 pcs_quad, u16 pcs_port, · 4672 unmodified lines
46734673 if (err)
46744674 return err;
46754675
4676− fec_stats->uncorrectable_blocks.total = (fec_corr_high_val << 16) +
4677− fec_corr_low_val;
4678− fec_stats->corrected_blocks.total = (fec_uncorr_high_val << 16) +
4679− fec_uncorr_low_val;
4676+ fec_stats->corrected_blocks.total = (fec_corr_high_val << 16) +
4677+ fec_corr_low_val;
4678+ fec_stats->uncorrectable_blocks.total = (fec_uncorr_high_val << 16) +
4679+ fec_uncorr_low_val;
46804680 return 0;
46814681 }
46824682
drivers/net/ethernet/intel/ice/ice_main.c+3−1
@@ -559,6 +559,8 @@ ice_prepare_for_reset(struct ice_pf *pf, enum ice_reset_req reset_type) · 558 unmodified lines
559559 if (test_bit(ICE_PREPARED_FOR_RESET, pf->state))
560560 return;
561561
562+ synchronize_irq(pf->oicr_irq.virq);
563+
562564 ice_unplug_aux_dev(pf);
563565
564566 /* Notify VFs of impending reset */
@@ -2948,7 +2950,7 @@ static void ice_vsi_rx_napi_schedule(struct ice_vsi *vsi) · 2383 unmodified lines
29482950 ice_for_each_rxq(vsi, i) {
29492951 struct ice_rx_ring *rx_ring = vsi->rx_rings[i];
29502952
2951− if (rx_ring->xsk_pool)
2953+ if (READ_ONCE(rx_ring->xsk_pool))
29522954 napi_schedule(&rx_ring->q_vector->napi);
29532955 }
29542956 }
drivers/net/ethernet/intel/ice/ice_ptp.c+4−0
@@ -1477,6 +1477,10 @@ void ice_ptp_link_change(struct ice_pf *pf, u8 port, bool linkup) · 1476 unmodified lines
14771477 /* Update cached link status for this port immediately */
14781478 ptp_port->link_up = linkup;
14791479
1480+ /* Skip HW writes if reset is in progress */
1481+ if (pf->hw.reset_ongoing)
1482+ return;
1483+
14801484 switch (hw->ptp.phy_model) {
14811485 case ICE_PHY_E810:
14821486 /* Do not reconfigure E810 PHY */
drivers/net/ethernet/intel/ice/ice_txrx.c+10−47
@@ -456,7 +456,7 @@ void ice_free_rx_ring(struct ice_rx_ring *rx_ring) · 455 unmodified lines
456456 if (rx_ring->vsi->type == ICE_VSI_PF)
457457 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
458458 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
459− rx_ring->xdp_prog = NULL;
459+ WRITE_ONCE(rx_ring->xdp_prog, NULL);
460460 if (rx_ring->xsk_pool) {
461461 kfree(rx_ring->xdp_buf);
462462 rx_ring->xdp_buf = NULL;
@@ -521,30 +521,6 @@ err: · 58 unmodified lines
521521 return -ENOMEM;
522522 }
523523
524−/**
525− * ice_rx_frame_truesize
526− * @rx_ring: ptr to Rx ring
527− * @size: size
528− *
529− * calculate the truesize with taking into the account PAGE_SIZE of
530− * underlying arch
531− */
532−static unsigned int
533−ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, const unsigned int size)
534−{
535− unsigned int truesize;
536−
537−#if (PAGE_SIZE < 8192)
538− truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
539−#else
540− truesize = rx_ring->rx_offset ?
541− SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
542− SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
543− SKB_DATA_ALIGN(size);
544−#endif
545− return truesize;
546−}
547−
548524 /**
549525 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
550526 * @rx_ring: Rx ring
@@ -837,16 +813,15 @@ ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf) · 286 unmodified lines
837813 if (!dev_page_is_reusable(page))
838814 return false;
839815
840−#if (PAGE_SIZE < 8192)
841816 /* if we are only owner of page we can reuse it */
842817 if (unlikely(rx_buf->pgcnt - pagecnt_bias > 1))
843818 return false;
844−#else
819+#if (PAGE_SIZE >= 8192)
845820 #define ICE_LAST_OFFSET \
846− (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
821+ (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_3072)
847822 if (rx_buf->page_offset > ICE_LAST_OFFSET)
848823 return false;
849−#endif /* PAGE_SIZE < 8192) */
824+#endif /* PAGE_SIZE >= 8192) */
850825
851826 /* If we have drained the page fragment pool we need to update
852827 * the pagecnt_bias and page count so that we fully restock the
@@ -949,12 +924,7 @@ ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size, · 96 unmodified lines
949924 struct ice_rx_buf *rx_buf;
950925
951926 rx_buf = &rx_ring->rx_buf[ntc];
952− rx_buf->pgcnt =
953−#if (PAGE_SIZE < 8192)
954− page_count(rx_buf->page);
955−#else
956− 0;
957−#endif
927+ rx_buf->pgcnt = page_count(rx_buf->page);
958928 prefetchw(rx_buf->page);
959929
960930 if (!size)
@@ -1160,11 +1130,6 @@ int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget) · 199 unmodified lines
11601130 bool failure;
11611131 u32 first;
11621132
1163− /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1164−#if (PAGE_SIZE < 8192)
1165− xdp->frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1166−#endif
1167−
11681133 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
11691134 if (xdp_prog) {
11701135 xdp_ring = rx_ring->xdp_ring;
@@ -1223,10 +1188,6 @@ int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget) · 52 unmodified lines
12231188 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
12241189 offset;
12251190 xdp_prepare_buff(xdp, hard_start, offset, size, !!offset);
1226−#if (PAGE_SIZE > 4096)
1227− /* At larger PAGE_SIZE, frame_sz depend on len size */
1228− xdp->frame_sz = ice_rx_frame_truesize(rx_ring, size);
1229−#endif
12301191 xdp_buff_clear_frags_flag(xdp);
12311192 } else if (ice_add_xdp_frag(rx_ring, xdp, rx_buf, size)) {
12321193 break;
@@ -1521,10 +1482,11 @@ int ice_napi_poll(struct napi_struct *napi, int budget) · 288 unmodified lines
15211482 * budget and be more aggressive about cleaning up the Tx descriptors.
15221483 */
15231484 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1485+ struct xsk_buff_pool *xsk_pool = READ_ONCE(tx_ring->xsk_pool);
15241486 bool wd;
15251487
1526− if (tx_ring->xsk_pool)
1527− wd = ice_xmit_zc(tx_ring);
1488+ if (xsk_pool)
1489+ wd = ice_xmit_zc(tx_ring, xsk_pool);
15281490 else if (ice_ring_is_xdp(tx_ring))
15291491 wd = true;
15301492 else
@@ -1550,6 +1512,7 @@ int ice_napi_poll(struct napi_struct *napi, int budget) · 19 unmodified lines
15501512 budget_per_ring = budget;
15511513
15521514 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1515+ struct xsk_buff_pool *xsk_pool = READ_ONCE(rx_ring->xsk_pool);
15531516 int cleaned;
15541517
15551518 /* A dedicated path for zero-copy allows making a single
@@ -1557,7 +1520,7 @@ int ice_napi_poll(struct napi_struct *napi, int budget) · 1 unmodified line
15571520 * ice_clean_rx_irq function and makes the codebase cleaner.
15581521 */
15591522 cleaned = rx_ring->xsk_pool ?
1560− ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1523+ ice_clean_rx_irq_zc(rx_ring, xsk_pool, budget_per_ring) :
15611524 ice_clean_rx_irq(rx_ring, budget_per_ring);
15621525 work_done += cleaned;
15631526 /* if we clean as many as budgeted, we must not be done */
drivers/net/ethernet/intel/ice/ice_xsk.c+111−73
@@ -52,10 +52,8 @@ static void ice_qp_reset_stats(struct ice_vsi *vsi, u16 q_idx) · 51 unmodified lines
5252 static void ice_qp_clean_rings(struct ice_vsi *vsi, u16 q_idx)
5353 {
5454 ice_clean_tx_ring(vsi->tx_rings[q_idx]);
55− if (ice_is_xdp_ena_vsi(vsi)) {
56− synchronize_rcu();
55+ if (ice_is_xdp_ena_vsi(vsi))
5756 ice_clean_tx_ring(vsi->xdp_rings[q_idx]);
58− }
5957 ice_clean_rx_ring(vsi->rx_rings[q_idx]);
6058 }
6159
@@ -112,25 +110,29 @@ ice_qvec_dis_irq(struct ice_vsi *vsi, struct ice_rx_ring *rx_ring, · 50 unmodified lines
112110 * ice_qvec_cfg_msix - Enable IRQ for given queue vector
113111 * @vsi: the VSI that contains queue vector
114112 * @q_vector: queue vector
113+ * @qid: queue index
115114 */
116115 static void
117−ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector)
116+ice_qvec_cfg_msix(struct ice_vsi *vsi, struct ice_q_vector *q_vector, u16 qid)
118117 {
119118 u16 reg_idx = q_vector->reg_idx;
120119 struct ice_pf *pf = vsi->back;
121120 struct ice_hw *hw = &pf->hw;
122− struct ice_tx_ring *tx_ring;
123− struct ice_rx_ring *rx_ring;
121+ int q, _qid = qid;
124122
125123 ice_cfg_itr(hw, q_vector);
126124
127− ice_for_each_tx_ring(tx_ring, q_vector->tx)
128− ice_cfg_txq_interrupt(vsi, tx_ring->reg_idx, reg_idx,
129− q_vector->tx.itr_idx);
125+ for (q = 0; q < q_vector->num_ring_tx; q++) {
126+ ice_cfg_txq_interrupt(vsi, _qid, reg_idx, q_vector->tx.itr_idx);
127+ _qid++;
128+ }
129+
130+ _qid = qid;
130131
131− ice_for_each_rx_ring(rx_ring, q_vector->rx)
132− ice_cfg_rxq_interrupt(vsi, rx_ring->reg_idx, reg_idx,
133− q_vector->rx.itr_idx);
132+ for (q = 0; q < q_vector->num_ring_rx; q++) {
133+ ice_cfg_rxq_interrupt(vsi, _qid, reg_idx, q_vector->rx.itr_idx);
134+ _qid++;
135+ }
134136
135137 ice_flush(hw);
136138 }
@@ -164,6 +166,7 @@ static int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx) · 27 unmodified lines
164166 struct ice_tx_ring *tx_ring;
165167 struct ice_rx_ring *rx_ring;
166168 int timeout = 50;
169+ int fail = 0;
167170 int err;
168171
169172 if (q_idx >= vsi->num_rxq || q_idx >= vsi->num_txq)
@@ -180,15 +183,17 @@ static int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx) · 10 unmodified lines
180183 usleep_range(1000, 2000);
181184 }
182185
186+ synchronize_net();
187+ netif_carrier_off(vsi->netdev);
188+ netif_tx_stop_queue(netdev_get_tx_queue(vsi->netdev, q_idx));
189+
183190 ice_qvec_dis_irq(vsi, rx_ring, q_vector);
184191 ice_qvec_toggle_napi(vsi, q_vector, false);
185192
186− netif_tx_stop_queue(netdev_get_tx_queue(vsi->netdev, q_idx));
187−
188193 ice_fill_txq_meta(vsi, tx_ring, &txq_meta);
189194 err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, 0, tx_ring, &txq_meta);
190− if (err)
191− return err;
195+ if (!fail)
196+ fail = err;
192197 if (ice_is_xdp_ena_vsi(vsi)) {
193198 struct ice_tx_ring *xdp_ring = vsi->xdp_rings[q_idx];
194199
@@ -196,17 +201,15 @@ static int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx) · 1 unmodified line
196201 ice_fill_txq_meta(vsi, xdp_ring, &txq_meta);
197202 err = ice_vsi_stop_tx_ring(vsi, ICE_NO_RESET, 0, xdp_ring,
198203 &txq_meta);
199− if (err)
200− return err;
204+ if (!fail)
205+ fail = err;
201206 }
202− err = ice_vsi_ctrl_one_rx_ring(vsi, false, q_idx, true);
203− if (err)
204− return err;
205207
208+ ice_vsi_ctrl_one_rx_ring(vsi, false, q_idx, false);
206209 ice_qp_clean_rings(vsi, q_idx);
207210 ice_qp_reset_stats(vsi, q_idx);
208211
209− return 0;
212+ return fail;
210213 }
211214
212215 /**
@@ -219,40 +222,48 @@ static int ice_qp_dis(struct ice_vsi *vsi, u16 q_idx) · 6 unmodified lines
219222 static int ice_qp_ena(struct ice_vsi *vsi, u16 q_idx)
220223 {
221224 struct ice_q_vector *q_vector;
225+ int fail = 0;
226+ bool link_up;
222227 int err;
223228
224229 err = ice_vsi_cfg_single_txq(vsi, vsi->tx_rings, q_idx);
225− if (err)
226− return err;
230+ if (!fail)
231+ fail = err;
227232
228233 if (ice_is_xdp_ena_vsi(vsi)) {
229234 struct ice_tx_ring *xdp_ring = vsi->xdp_rings[q_idx];
230235
231236 err = ice_vsi_cfg_single_txq(vsi, vsi->xdp_rings, q_idx);
232− if (err)
233− return err;
237+ if (!fail)
238+ fail = err;
234239 ice_set_ring_xdp(xdp_ring);
235240 ice_tx_xsk_pool(vsi, q_idx);
236241 }
237242
238243 err = ice_vsi_cfg_single_rxq(vsi, q_idx);
239− if (err)
240− return err;
244+ if (!fail)
245+ fail = err;
241246
242247 q_vector = vsi->rx_rings[q_idx]->q_vector;
243− ice_qvec_cfg_msix(vsi, q_vector);
248+ ice_qvec_cfg_msix(vsi, q_vector, q_idx);
244249
245250 err = ice_vsi_ctrl_one_rx_ring(vsi, true, q_idx, true);
246− if (err)
247− return err;
251+ if (!fail)
252+ fail = err;
248253
249254 ice_qvec_toggle_napi(vsi, q_vector, true);
250255 ice_qvec_ena_irq(vsi, q_vector);
251256
252− netif_tx_start_queue(netdev_get_tx_queue(vsi->netdev, q_idx));
257+ /* make sure NAPI sees updated ice_{t,x}_ring::xsk_pool */
258+ synchronize_net();
259+ ice_get_link_status(vsi->port_info, &link_up);
260+ if (link_up) {
261+ netif_tx_start_queue(netdev_get_tx_queue(vsi->netdev, q_idx));
262+ netif_carrier_on(vsi->netdev);
263+ }
253264 clear_bit(ICE_CFG_BUSY, vsi->state);
254265
255− return 0;
266+ return fail;
256267 }
257268
258269 /**
@@ -459,6 +470,7 @@ static u16 ice_fill_rx_descs(struct xsk_buff_pool *pool, struct xdp_buff **xdp, · 200 unmodified lines
459470 /**
460471 * __ice_alloc_rx_bufs_zc - allocate a number of Rx buffers
461472 * @rx_ring: Rx ring
473+ * @xsk_pool: XSK buffer pool to pick buffers to be filled by HW
462474 * @count: The number of buffers to allocate
463475 *
464476 * Place the @count of descriptors onto Rx ring. Handle the ring wrap
@@ -467,7 +479,8 @@ static u16 ice_fill_rx_descs(struct xsk_buff_pool *pool, struct xdp_buff **xdp, · 2 unmodified lines
467479 *
468480 * Returns true if all allocations were successful, false if any fail.
469481 */
470−static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count)
482+static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring,
483+ struct xsk_buff_pool *xsk_pool, u16 count)
471484 {
472485 u32 nb_buffs_extra = 0, nb_buffs = 0;
473486 union ice_32b_rx_flex_desc *rx_desc;
@@ -479,8 +492,7 @@ static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count) · 5 unmodified lines
479492 xdp = ice_xdp_buf(rx_ring, ntu);
480493
481494 if (ntu + count >= rx_ring->count) {
482− nb_buffs_extra = ice_fill_rx_descs(rx_ring->xsk_pool, xdp,
483− rx_desc,
495+ nb_buffs_extra = ice_fill_rx_descs(xsk_pool, xdp, rx_desc,
484496 rx_ring->count - ntu);
485497 if (nb_buffs_extra != rx_ring->count - ntu) {
486498 ntu += nb_buffs_extra;
@@ -493,7 +505,7 @@ static bool __ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count) · 6 unmodified lines
493505 ice_release_rx_desc(rx_ring, 0);
494506 }
495507
496− nb_buffs = ice_fill_rx_descs(rx_ring->xsk_pool, xdp, rx_desc, count);
508+ nb_buffs = ice_fill_rx_descs(xsk_pool, xdp, rx_desc, count);
497509
498510 ntu += nb_buffs;
499511 if (ntu == rx_ring->count)
@@ -509,6 +521,7 @@ exit: · 9 unmodified lines
509521 /**
510522 * ice_alloc_rx_bufs_zc - allocate a number of Rx buffers
511523 * @rx_ring: Rx ring
524+ * @xsk_pool: XSK buffer pool to pick buffers to be filled by HW
512525 * @count: The number of buffers to allocate
513526 *
514527 * Wrapper for internal allocation routine; figure out how many tail
@@ -516,7 +529,8 @@ exit: · 1 unmodified line
516529 *
517530 * Returns true if all calls to internal alloc routine succeeded
518531 */
519−bool ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count)
532+bool ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring,
533+ struct xsk_buff_pool *xsk_pool, u16 count)
520534 {
521535 u16 rx_thresh = ICE_RING_QUARTER(rx_ring);
522536 u16 leftover, i, tail_bumps;
@@ -525,9 +539,9 @@ bool ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count) · 2 unmodified lines
525539 leftover = count - (tail_bumps * rx_thresh);
526540
527541 for (i = 0; i < tail_bumps; i++)
528− if (!__ice_alloc_rx_bufs_zc(rx_ring, rx_thresh))
542+ if (!__ice_alloc_rx_bufs_zc(rx_ring, xsk_pool, rx_thresh))
529543 return false;
530− return __ice_alloc_rx_bufs_zc(rx_ring, leftover);
544+ return __ice_alloc_rx_bufs_zc(rx_ring, xsk_pool, leftover);
531545 }
532546
533547 /**
@@ -596,8 +610,10 @@ out: · 62 unmodified lines
596610 /**
597611 * ice_clean_xdp_irq_zc - produce AF_XDP descriptors to CQ
598612 * @xdp_ring: XDP Tx ring
613+ * @xsk_pool: AF_XDP buffer pool pointer
599614 */
600−static u32 ice_clean_xdp_irq_zc(struct ice_tx_ring *xdp_ring)
615+static u32 ice_clean_xdp_irq_zc(struct ice_tx_ring *xdp_ring,
616+ struct xsk_buff_pool *xsk_pool)
601617 {
602618 u16 ntc = xdp_ring->next_to_clean;
603619 struct ice_tx_desc *tx_desc;
@@ -648,7 +664,7 @@ skip: · 44 unmodified lines
648664 if (xdp_ring->next_to_clean >= cnt)
649665 xdp_ring->next_to_clean -= cnt;
650666 if (xsk_frames)
651− xsk_tx_completed(xdp_ring->xsk_pool, xsk_frames);
667+ xsk_tx_completed(xsk_pool, xsk_frames);
652668
653669 return completed_frames;
654670 }
@@ -657,6 +673,7 @@ skip: · 2 unmodified lines
657673 * ice_xmit_xdp_tx_zc - AF_XDP ZC handler for XDP_TX
658674 * @xdp: XDP buffer to xmit
659675 * @xdp_ring: XDP ring to produce descriptor onto
676+ * @xsk_pool: AF_XDP buffer pool pointer
660677 *
661678 * note that this function works directly on xdp_buff, no need to convert
662679 * it to xdp_frame. xdp_buff pointer is stored to ice_tx_buf so that cleaning
@@ -666,7 +683,8 @@ skip: · 3 unmodified lines
666683 * was not enough space on XDP ring
667684 */
668685 static int ice_xmit_xdp_tx_zc(struct xdp_buff *xdp,
669− struct ice_tx_ring *xdp_ring)
686+ struct ice_tx_ring *xdp_ring,
687+ struct xsk_buff_pool *xsk_pool)
670688 {
671689 struct skb_shared_info *sinfo = NULL;
672690 u32 size = xdp->data_end - xdp->data;
@@ -680,7 +698,7 @@ static int ice_xmit_xdp_tx_zc(struct xdp_buff *xdp, · 7 unmodified lines
680698
681699 free_space = ICE_DESC_UNUSED(xdp_ring);
682700 if (free_space < ICE_RING_QUARTER(xdp_ring))
683− free_space += ice_clean_xdp_irq_zc(xdp_ring);
701+ free_space += ice_clean_xdp_irq_zc(xdp_ring, xsk_pool);
684702
685703 if (unlikely(!free_space))
686704 goto busy;
@@ -700,7 +718,7 @@ static int ice_xmit_xdp_tx_zc(struct xdp_buff *xdp, · 13 unmodified lines
700718 dma_addr_t dma;
701719
702720 dma = xsk_buff_xdp_get_dma(xdp);
703− xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, size);
721+ xsk_buff_raw_dma_sync_for_device(xsk_pool, dma, size);
704722
705723 tx_buf->xdp = xdp;
706724 tx_buf->type = ICE_TX_BUF_XSK_TX;
@@ -742,12 +760,14 @@ busy: · 35 unmodified lines
742760 * @xdp: xdp_buff used as input to the XDP program
743761 * @xdp_prog: XDP program to run
744762 * @xdp_ring: ring to be used for XDP_TX action
763+ * @xsk_pool: AF_XDP buffer pool pointer
745764 *
746765 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
747766 */
748767 static int
749768 ice_run_xdp_zc(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
750− struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring)
769+ struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring,
770+ struct xsk_buff_pool *xsk_pool)
751771 {
752772 int err, result = ICE_XDP_PASS;
753773 u32 act;
@@ -758,7 +778,7 @@ ice_run_xdp_zc(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp, · 4 unmodified lines
758778 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
759779 if (!err)
760780 return ICE_XDP_REDIR;
761− if (xsk_uses_need_wakeup(rx_ring->xsk_pool) && err == -ENOBUFS)
781+ if (xsk_uses_need_wakeup(xsk_pool) && err == -ENOBUFS)
762782 result = ICE_XDP_EXIT;
763783 else
764784 result = ICE_XDP_CONSUMED;
@@ -769,7 +789,7 @@ ice_run_xdp_zc(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp, · 4 unmodified lines
769789 case XDP_PASS:
770790 break;
771791 case XDP_TX:
772− result = ice_xmit_xdp_tx_zc(xdp, xdp_ring);
792+ result = ice_xmit_xdp_tx_zc(xdp, xdp_ring, xsk_pool);
773793 if (result == ICE_XDP_CONSUMED)
774794 goto out_failure;
775795 break;
@@ -821,14 +841,16 @@ ice_add_xsk_frag(struct ice_rx_ring *rx_ring, struct xdp_buff *first, · 45 unmodified lines
821841 /**
822842 * ice_clean_rx_irq_zc - consumes packets from the hardware ring
823843 * @rx_ring: AF_XDP Rx ring
844+ * @xsk_pool: AF_XDP buffer pool pointer
824845 * @budget: NAPI budget
825846 *
826847 * Returns number of processed packets on success, remaining budget on failure.
827848 */
828−int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring, int budget)
849+int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,
850+ struct xsk_buff_pool *xsk_pool,
851+ int budget)
829852 {
830853 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
831− struct xsk_buff_pool *xsk_pool = rx_ring->xsk_pool;
832854 u32 ntc = rx_ring->next_to_clean;
833855 u32 ntu = rx_ring->next_to_use;
834856 struct xdp_buff *first = NULL;
@@ -891,7 +913,8 @@ int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring, int budget) · 56 unmodified lines
891913 if (ice_is_non_eop(rx_ring, rx_desc))
892914 continue;
893915
894− xdp_res = ice_run_xdp_zc(rx_ring, first, xdp_prog, xdp_ring);
916+ xdp_res = ice_run_xdp_zc(rx_ring, first, xdp_prog, xdp_ring,
917+ xsk_pool);
895918 if (likely(xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR))) {
896919 xdp_xmit |= xdp_res;
897920 } else if (xdp_res == ICE_XDP_EXIT) {
@@ -940,7 +963,8 @@ construct_skb: · 42 unmodified lines
940963 rx_ring->next_to_clean = ntc;
941964 entries_to_alloc = ICE_RX_DESC_UNUSED(rx_ring);
942965 if (entries_to_alloc > ICE_RING_QUARTER(rx_ring))
943− failure |= !ice_alloc_rx_bufs_zc(rx_ring, entries_to_alloc);
966+ failure |= !ice_alloc_rx_bufs_zc(rx_ring, xsk_pool,
967+ entries_to_alloc);
944968
945969 ice_finalize_xdp_rx(xdp_ring, xdp_xmit, 0);
946970 ice_update_rx_ring_stats(rx_ring, total_rx_packets, total_rx_bytes);
@@ -963,17 +987,19 @@ construct_skb: · 16 unmodified lines
963987 /**
964988 * ice_xmit_pkt - produce a single HW Tx descriptor out of AF_XDP descriptor
965989 * @xdp_ring: XDP ring to produce the HW Tx descriptor on
990+ * @xsk_pool: XSK buffer pool to pick buffers to be consumed by HW
966991 * @desc: AF_XDP descriptor to pull the DMA address and length from
967992 * @total_bytes: bytes accumulator that will be used for stats update
968993 */
969−static void ice_xmit_pkt(struct ice_tx_ring *xdp_ring, struct xdp_desc *desc,
994+static void ice_xmit_pkt(struct ice_tx_ring *xdp_ring,
995+ struct xsk_buff_pool *xsk_pool, struct xdp_desc *desc,
970996 unsigned int *total_bytes)
971997 {
972998 struct ice_tx_desc *tx_desc;
973999 dma_addr_t dma;
9741000
975− dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, desc->addr);
976− xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, desc->len);
1001+ dma = xsk_buff_raw_get_dma(xsk_pool, desc->addr);
1002+ xsk_buff_raw_dma_sync_for_device(xsk_pool, dma, desc->len);
9771003
9781004 tx_desc = ICE_TX_DESC(xdp_ring, xdp_ring->next_to_use++);
9791005 tx_desc->buf_addr = cpu_to_le64(dma);
@@ -986,10 +1012,13 @@ static void ice_xmit_pkt(struct ice_tx_ring *xdp_ring, struct xdp_desc *desc, · 6 unmodified lines
9861012 /**
9871013 * ice_xmit_pkt_batch - produce a batch of HW Tx descriptors out of AF_XDP descriptors
9881014 * @xdp_ring: XDP ring to produce the HW Tx descriptors on
1015+ * @xsk_pool: XSK buffer pool to pick buffers to be consumed by HW
9891016 * @descs: AF_XDP descriptors to pull the DMA addresses and lengths from
9901017 * @total_bytes: bytes accumulator that will be used for stats update
9911018 */
992−static void ice_xmit_pkt_batch(struct ice_tx_ring *xdp_ring, struct xdp_desc *descs,
1019+static void ice_xmit_pkt_batch(struct ice_tx_ring *xdp_ring,
1020+ struct xsk_buff_pool *xsk_pool,
1021+ struct xdp_desc *descs,
9931022 unsigned int *total_bytes)
9941023 {
9951024 u16 ntu = xdp_ring->next_to_use;
@@ -999,8 +1028,8 @@ static void ice_xmit_pkt_batch(struct ice_tx_ring *xdp_ring, struct xdp_desc *de · 3 unmodified lines
9991028 loop_unrolled_for(i = 0; i < PKTS_PER_BATCH; i++) {
10001029 dma_addr_t dma;
10011030
1002− dma = xsk_buff_raw_get_dma(xdp_ring->xsk_pool, descs[i].addr);
1003− xsk_buff_raw_dma_sync_for_device(xdp_ring->xsk_pool, dma, descs[i].len);
1031+ dma = xsk_buff_raw_get_dma(xsk_pool, descs[i].addr);
1032+ xsk_buff_raw_dma_sync_for_device(xsk_pool, dma, descs[i].len);
10041033
10051034 tx_desc = ICE_TX_DESC(xdp_ring, ntu++);
10061035 tx_desc->buf_addr = cpu_to_le64(dma);
@@ -1016,60 +1045,69 @@ static void ice_xmit_pkt_batch(struct ice_tx_ring *xdp_ring, struct xdp_desc *de · 9 unmodified lines
10161045 /**
10171046 * ice_fill_tx_hw_ring - produce the number of Tx descriptors onto ring
10181047 * @xdp_ring: XDP ring to produce the HW Tx descriptors on
1048+ * @xsk_pool: XSK buffer pool to pick buffers to be consumed by HW
10191049 * @descs: AF_XDP descriptors to pull the DMA addresses and lengths from
10201050 * @nb_pkts: count of packets to be send
10211051 * @total_bytes: bytes accumulator that will be used for stats update
10221052 */
1023−static void ice_fill_tx_hw_ring(struct ice_tx_ring *xdp_ring, struct xdp_desc *descs,
1024− u32 nb_pkts, unsigned int *total_bytes)
1053+static void ice_fill_tx_hw_ring(struct ice_tx_ring *xdp_ring,
1054+ struct xsk_buff_pool *xsk_pool,
1055+ struct xdp_desc *descs, u32 nb_pkts,
1056+ unsigned int *total_bytes)
10251057 {
10261058 u32 batched, leftover, i;
10271059
10281060 batched = ALIGN_DOWN(nb_pkts, PKTS_PER_BATCH);
10291061 leftover = nb_pkts & (PKTS_PER_BATCH - 1);
10301062 for (i = 0; i < batched; i += PKTS_PER_BATCH)
1031− ice_xmit_pkt_batch(xdp_ring, &descs[i], total_bytes);
1063+ ice_xmit_pkt_batch(xdp_ring, xsk_pool, &descs[i], total_bytes);
10321064 for (; i < batched + leftover; i++)
1033− ice_xmit_pkt(xdp_ring, &descs[i], total_bytes);
1065+ ice_xmit_pkt(xdp_ring, xsk_pool, &descs[i], total_bytes);
10341066 }
10351067
10361068 /**
10371069 * ice_xmit_zc - take entries from XSK Tx ring and place them onto HW Tx ring
10381070 * @xdp_ring: XDP ring to produce the HW Tx descriptors on
1071+ * @xsk_pool: AF_XDP buffer pool pointer
10391072 *
10401073 * Returns true if there is no more work that needs to be done, false otherwise
10411074 */
1042−bool ice_xmit_zc(struct ice_tx_ring *xdp_ring)
1075+bool ice_xmit_zc(struct ice_tx_ring *xdp_ring, struct xsk_buff_pool *xsk_pool)
10431076 {
1044− struct xdp_desc *descs = xdp_ring->xsk_pool->tx_descs;
1077+ struct xdp_desc *descs = xsk_pool->tx_descs;
10451078 u32 nb_pkts, nb_processed = 0;
10461079 unsigned int total_bytes = 0;
10471080 int budget;
10481081
1049− ice_clean_xdp_irq_zc(xdp_ring);
1082+ ice_clean_xdp_irq_zc(xdp_ring, xsk_pool);
1083+
1084+ if (!netif_carrier_ok(xdp_ring->vsi->netdev) ||
1085+ !netif_running(xdp_ring->vsi->netdev))
1086+ return true;
10501087
10511088 budget = ICE_DESC_UNUSED(xdp_ring);
10521089 budget = min_t(u16, budget, ICE_RING_QUARTER(xdp_ring));
10531090
1054− nb_pkts = xsk_tx_peek_release_desc_batch(xdp_ring->xsk_pool, budget);
1091+ nb_pkts = xsk_tx_peek_release_desc_batch(xsk_pool, budget);
10551092 if (!nb_pkts)
10561093 return true;
10571094
10581095 if (xdp_ring->next_to_use + nb_pkts >= xdp_ring->count) {
10591096 nb_processed = xdp_ring->count - xdp_ring->next_to_use;
1060− ice_fill_tx_hw_ring(xdp_ring, descs, nb_processed, &total_bytes);
1097+ ice_fill_tx_hw_ring(xdp_ring, xsk_pool, descs, nb_processed,
1098+ &total_bytes);
10611099 xdp_ring->next_to_use = 0;
10621100 }
10631101
1064− ice_fill_tx_hw_ring(xdp_ring, &descs[nb_processed], nb_pkts - nb_processed,
1065− &total_bytes);
1102+ ice_fill_tx_hw_ring(xdp_ring, xsk_pool, &descs[nb_processed],
1103+ nb_pkts - nb_processed, &total_bytes);
10661104
10671105 ice_set_rs_bit(xdp_ring);
10681106 ice_xdp_ring_update_tail(xdp_ring);
10691107 ice_update_tx_ring_stats(xdp_ring, nb_pkts, total_bytes);
10701108
1071− if (xsk_uses_need_wakeup(xdp_ring->xsk_pool))
1072− xsk_set_tx_need_wakeup(xdp_ring->xsk_pool);
1109+ if (xsk_uses_need_wakeup(xsk_pool))
1110+ xsk_set_tx_need_wakeup(xsk_pool);
10731111
10741112 return nb_pkts < budget;
10751113 }
@@ -1091,7 +1129,7 @@ ice_xsk_wakeup(struct net_device *netdev, u32 queue_id, · 15 unmodified lines
10911129 struct ice_vsi *vsi = np->vsi;
10921130 struct ice_tx_ring *ring;
10931131
1094− if (test_bit(ICE_VSI_DOWN, vsi->state))
1132+ if (test_bit(ICE_VSI_DOWN, vsi->state) || !netif_carrier_ok(netdev))
10951133 return -ENETDOWN;
10961134
10971135 if (!ice_is_xdp_ena_vsi(vsi))
@@ -1102,7 +1140,7 @@ ice_xsk_wakeup(struct net_device *netdev, u32 queue_id, · 4 unmodified lines
11021140
11031141 ring = vsi->rx_rings[queue_id]->xdp_ring;
11041142
1105− if (!ring->xsk_pool)
1143+ if (!READ_ONCE(ring->xsk_pool))
11061144 return -EINVAL;
11071145
11081146 /* The idea here is that if NAPI is running, mark a miss, so
drivers/net/ethernet/intel/ice/ice_xsk.h+10−4
@@ -20,16 +20,20 @@ struct ice_vsi; · 19 unmodified lines
2020 #ifdef CONFIG_XDP_SOCKETS
2121 int ice_xsk_pool_setup(struct ice_vsi *vsi, struct xsk_buff_pool *pool,
2222 u16 qid);
23−int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring, int budget);
23+int ice_clean_rx_irq_zc(struct ice_rx_ring *rx_ring,
24+ struct xsk_buff_pool *xsk_pool,
25+ int budget);
2426 int ice_xsk_wakeup(struct net_device *netdev, u32 queue_id, u32 flags);
25−bool ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring, u16 count);
27+bool ice_alloc_rx_bufs_zc(struct ice_rx_ring *rx_ring,
28+ struct xsk_buff_pool *xsk_pool, u16 count);
2629 bool ice_xsk_any_rx_ring_ena(struct ice_vsi *vsi);
2730 void ice_xsk_clean_rx_ring(struct ice_rx_ring *rx_ring);
2831 void ice_xsk_clean_xdp_ring(struct ice_tx_ring *xdp_ring);
29−bool ice_xmit_zc(struct ice_tx_ring *xdp_ring);
32+bool ice_xmit_zc(struct ice_tx_ring *xdp_ring, struct xsk_buff_pool *xsk_pool);
3033 int ice_realloc_zc_buf(struct ice_vsi *vsi, bool zc);
3134 #else
32−static inline bool ice_xmit_zc(struct ice_tx_ring __always_unused *xdp_ring)
35+static inline bool ice_xmit_zc(struct ice_tx_ring __always_unused *xdp_ring,
36+ struct xsk_buff_pool __always_unused *xsk_pool)
3337 {
3438 return false;
3539 }
@@ -44,6 +48,7 @@ ice_xsk_pool_setup(struct ice_vsi __always_unused *vsi, · 8 unmodified lines
4448
4549 static inline int
4650 ice_clean_rx_irq_zc(struct ice_rx_ring __always_unused *rx_ring,
51+ struct xsk_buff_pool __always_unused *xsk_pool,
4752 int __always_unused budget)

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drivers/net/ethernet/intel/igb/igb_main.c+1−0

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drivers/net/ethernet/intel/igc/igc_defines.h+6−0

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drivers/net/ethernet/intel/igc/igc_main.c+23−18

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drivers/net/ethernet/intel/igc/igc_tsn.c+62−14

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drivers/net/ethernet/intel/igc/igc_tsn.h+1−0

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drivers/net/ethernet/jme.c+4−6

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drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c+3−3

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drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c+11−12

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drivers/net/ethernet/mediatek/mtk_wed.c+4−2

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drivers/net/ethernet/mellanox/mlx5/core/en.h+2−1

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drivers/net/ethernet/mellanox/mlx5/core/en/params.c+15−1

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drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_rx.c+44−6

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drivers/net/ethernet/meta/Kconfig+1−1

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drivers/net/ethernet/microsoft/mana/hw_channel.c+34−28

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drivers/net/ethernet/microsoft/mana/mana_en.c+20−10

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drivers/net/ethernet/mscc/ocelot.c+261−18

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drivers/net/ethernet/mscc/ocelot_fdma.c+1−2

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drivers/net/ethernet/mscc/ocelot_vcap.c+1−0

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drivers/net/ethernet/mscc/ocelot_vsc7514.c+4−0

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drivers/net/ethernet/pensando/ionic/ionic_dev.h+1−1

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drivers/net/ethernet/pensando/ionic/ionic_lif.c+1−1

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drivers/net/ethernet/realtek/r8169_main.c+2−6

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drivers/net/ethernet/stmicro/stmmac/dwmac4.h+0−2

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drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c+1−1

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drivers/net/ethernet/ti/icssg/icssg_prueth.c+1−0

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drivers/net/ethernet/wangxun/ngbe/ngbe_mdio.c+6−2

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drivers/net/ethernet/xilinx/xilinx_axienet.h+9−8

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drivers/net/ethernet/xilinx/xilinx_axienet_main.c+14−13

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drivers/net/fjes/fjes_main.c+1−3

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drivers/net/gtp.c+4−1

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drivers/net/phy/aquantia/aquantia_main.c+21−8

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drivers/net/phy/micrel.c+19−15

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drivers/net/phy/realtek.c+9−1

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drivers/net/phy/vitesse.c+0−14

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drivers/net/pse-pd/pse_core.c+8−3

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drivers/net/pse-pd/tps23881.c+4−1

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drivers/net/usb/ipheth.c+11−9

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drivers/net/usb/sr9700.c+9−2

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drivers/net/virtio_net.c+13−3

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drivers/net/wan/fsl_qmc_hdlc.c+22−9

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drivers/net/wireless/ath/ath12k/dp_tx.c+72−0

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drivers/net/wireless/ath/ath12k/mac.c+1−0

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drivers/net/wireless/ath/ath12k/wow.c+4−4

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drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c+10−3

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drivers/perf/riscv_pmu_sbi.c+1−1

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drivers/pinctrl/starfive/pinctrl-starfive-jh7110.c+2−2

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drivers/platform/chrome/cros_ec_proto.c+2−0

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drivers/platform/x86/intel/ifs/runtest.c+1−1

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drivers/platform/x86/sony-laptop.c+0−1

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drivers/platform/x86/x86-android-tablets/dmi.c+0−1

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drivers/power/sequencing/pwrseq-qcom-wcn.c+8−1

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drivers/power/supply/axp288_charger.c+11−11

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drivers/power/supply/qcom_battmgr.c+17−11

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drivers/power/supply/rt5033_battery.c+1−0

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drivers/scsi/mpi3mr/mpi3mr_app.c+8−3

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drivers/scsi/mpi3mr/mpi3mr_os.c+12−0

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drivers/scsi/mpt3sas/mpt3sas_base.c+18−2

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drivers/scsi/sr_ioctl.c+1−1

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drivers/soc/fsl/qbman/qman.c+0−5

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drivers/soc/qcom/pmic_glink.c+28−12

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drivers/soc/qcom/pmic_glink_altmode.c+11−6

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drivers/soc/qcom/qcom_pd_mapper.c+3−1

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drivers/spi/spi-cadence-quadspi.c+13−1

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drivers/spi/spi-hisi-kunpeng.c+4−0

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drivers/spi/spi-zynqmp-gqspi.c+24−6

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drivers/spi/spidev.c+1−0

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drivers/spmi/spmi-pmic-arb.c+5−6

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drivers/staging/media/atomisp/include/linux/atomisp.h+0−1

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drivers/staging/media/atomisp/pci/hive_isp_css_include/math_support.h+0−5

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drivers/staging/media/atomisp/pci/ia_css_stream_public.h+6−2

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drivers/staging/media/atomisp/pci/sh_css_internal.h+16−3

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drivers/thermal/gov_bang_bang.c+66−17

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drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c+22−7

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drivers/thunderbolt/debugfs.c+6−4

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drivers/thunderbolt/switch.c+1−0

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drivers/tty/serial/8250/8250_omap.c+5−28

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