[SPARC64]: Add __read_mostly support.

David S. Miller committed 21 years ago

Commit d369ddd1 parent 9126dfd4 files · +17 −21Browse files

Unified · Split

4 files

arch/sparc64/kernel/smp.c +5 −5
arch/sparc64/kernel/time.c +9 −15
arch/sparc64/kernel/vmlinux.lds.S +2 −0
include/linux/cache.h +1 −1

@@ -45,8 +45,8 @@ extern void calibrate_delay(void); · 44 unmodified lines
45	45	/* Please don't make this stuff initdata!!! --DaveM */
46	46	static unsigned char boot_cpu_id;
47	47
48		−cpumask_t cpu_online_map = CPU_MASK_NONE;
49		−cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
	48	+cpumask_t cpu_online_map = CPU_MASK_NONE __read_mostly;
	49	+cpumask_t phys_cpu_present_map = CPU_MASK_NONE __read_mostly;
50	50	static cpumask_t smp_commenced_mask;
51	51	static cpumask_t cpu_callout_map;
52	52
@@ -155,7 +155,7 @@ void cpu_panic(void) · 102 unmodified lines
155	155	panic("SMP bolixed\n");
156	156	}
157	157
158		−static unsigned long current_tick_offset;
	158	+static unsigned long current_tick_offset __read_mostly;
159	159
160	160	/* This tick register synchronization scheme is taken entirely from
161	161	* the ia64 port, see arch/ia64/kernel/smpboot.c for details and credit.
@@ -1193,8 +1193,8 @@ void smp_send_stop(void) · 1031 unmodified lines
1193	1193	{
1194	1194	}
1195	1195
1196		−unsigned long __per_cpu_base;
1197		−unsigned long __per_cpu_shift;
	1196	+unsigned long __per_cpu_base __read_mostly;
	1197	+unsigned long __per_cpu_shift __read_mostly;
1198	1198
1199	1199	EXPORT_SYMBOL(__per_cpu_base);
1200	1200	EXPORT_SYMBOL(__per_cpu_shift);

arch/sparc64/kernel/time.c+9−15

@@ -73,7 +73,7 @@ static __initdata struct sparc64_tick_ops dummy_tick_ops = { · 72 unmodified lines
73	73	.get_tick = dummy_get_tick,
74	74	};
75	75
76		−struct sparc64_tick_ops *tick_ops = &dummy_tick_ops;
	76	+struct sparc64_tick_ops *tick_ops __read_mostly = &dummy_tick_ops;
77	77
78	78	#define TICK_PRIV_BIT (1UL << 63)
79	79
@@ -195,7 +195,7 @@ static unsigned long tick_add_tick(unsigned long adj, unsigned long offset) · 115 unmodified lines
195	195	return new_tick;
196	196	}
197	197
198		−static struct sparc64_tick_ops tick_operations = {
	198	+static struct sparc64_tick_ops tick_operations __read_mostly = {
199	199	.init_tick = tick_init_tick,
200	200	.get_tick = tick_get_tick,
201	201	.get_compare = tick_get_compare,
@@ -276,7 +276,7 @@ static unsigned long stick_add_compare(unsigned long adj) · 74 unmodified lines
276	276	return new_compare;
277	277	}
278	278
279		−static struct sparc64_tick_ops stick_operations = {
	279	+static struct sparc64_tick_ops stick_operations __read_mostly = {
280	280	.init_tick = stick_init_tick,
281	281	.get_tick = stick_get_tick,
282	282	.get_compare = stick_get_compare,
@@ -422,7 +422,7 @@ static unsigned long hbtick_add_compare(unsigned long adj) · 139 unmodified lines
422	422	return val;
423	423	}
424	424
425		−static struct sparc64_tick_ops hbtick_operations = {
	425	+static struct sparc64_tick_ops hbtick_operations __read_mostly = {
426	426	.init_tick = hbtick_init_tick,
427	427	.get_tick = hbtick_get_tick,
428	428	.get_compare = hbtick_get_compare,
@@ -437,10 +437,9 @@ static struct sparc64_tick_ops hbtick_operations = { · 8 unmodified lines
437	437	* NOTE: On SUN5 systems the ticker interrupt comes in using 2
438	438	* interrupts, one at level14 and one with softint bit 0.
439	439	*/
440		−unsigned long timer_tick_offset;
441		−unsigned long timer_tick_compare;
	440	+unsigned long timer_tick_offset __read_mostly;
442	441
443		−static unsigned long timer_ticks_per_nsec_quotient;
	442	+static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
444	443
445	444	#define TICK_SIZE (tick_nsec / 1000)
446	445
@@ -464,7 +463,7 @@ static inline void timer_check_rtc(void) · 17 unmodified lines
464	463
465	464	static irqreturn_t timer_interrupt(int irq, void dev_id, struct pt_regs regs)
466	465	{
467		− unsigned long ticks, pstate;
	466	+ unsigned long ticks, compare, pstate;
468	467
469	468	write_seqlock(&xtime_lock);
470	469
@@ -483,14 +482,14 @@ static irqreturn_t timer_interrupt(int irq, void dev_id, struct pt_regs regs) · 12 unmodified lines
483	482	: "=r" (pstate)
484	483	: "i" (PSTATE_IE));
485	484
486		− timer_tick_compare = tick_ops->add_compare(timer_tick_offset);
	485	+ compare = tick_ops->add_compare(timer_tick_offset);
487	486	ticks = tick_ops->get_tick();
488	487
489	488	/* Restore PSTATE_IE. */
490	489	__asm__ __volatile__("wrpr %0, 0x0, %%pstate"
491	490	: /* no outputs */
492	491	: "r" (pstate));
493		− } while (time_after_eq(ticks, timer_tick_compare));
	492	+ } while (time_after_eq(ticks, compare));
494	493
495	494	timer_check_rtc();
496	495
@@ -506,11 +505,6 @@ void timer_tick_interrupt(struct pt_regs *regs) · 9 unmodified lines
506	505
507	506	do_timer(regs);
508	507
509		− /*
510		− * Only keep timer_tick_offset uptodate, but don't set TICK_CMPR.
511		− */
512		− timer_tick_compare = tick_ops->get_compare() + timer_tick_offset;
513		−
514	508	timer_check_rtc();
515	509
516	510	write_sequnlock(&xtime_lock);

arch/sparc64/kernel/vmlinux.lds.S+2−0

@@ -32,6 +32,8 @@ SECTIONS · 31 unmodified lines
32	32	.data1 : { *(.data1) }
33	33	. = ALIGN(64);
34	34	.data.cacheline_aligned : { *(.data.cacheline_aligned) }
	35	+ . = ALIGN(64);
	36	+ .data.read_mostly : { *(.data.read_mostly) }
35	37	_edata = .;
36	38	PROVIDE (edata = .);
37	39	.fixup : { *(.fixup) }

include/linux/cache.h+1−1

@@ -13,7 +13,7 @@ · 12 unmodified lines
13	13	#define SMP_CACHE_BYTES L1_CACHE_BYTES
14	14	#endif
15	15
16		−#ifdef CONFIG_X86
	16	+#if defined(CONFIG_X86) \|\| defined(CONFIG_SPARC64)
17	17	#define __read_mostly __attribute__((__section__(".data.read_mostly")))
18	18	#else
19	19	#define __read_mostly