A guest with access to VCMDQ generates its own invalidation commands and must apply any invalidation errata before submitting them. If the host also repeats those commands, each affected invalidation is issued four times instead of twice. Add IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI to report the CFGI/TLBI-repeat erratum to user space. This allows the VMM to expose the erratum to the guest or apply the workaround itself. Use the raw __arm_smmu_cmdq_issue_cmdlist() helper for user-provided invalidations so the host does not apply the workaround a second time. Add arm_smmu_erratum_repeat_tlbi_cfgi() to query the static key when populating the SMMUv3 hardware information.
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| @@ -574,11 +574,22 @@ struct iommu_hw_info_vtd { · 573 unmodified lines | |||
| 574 | __aligned_u64 ecap_reg; | 574 | __aligned_u64 ecap_reg; |
| 575 | }; | 575 | }; |
| 576 | 576 | ||
| 577 | /** | ||
| 578 | * enum iommu_hw_info_arm_smmuv3_flags - Flags for ARM SMMUv3 hw_info | ||
| 579 | * @IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI: | ||
| 580 | * If set, user space must issue TLBI/CFGI+SYNC commands twice due to | ||
| 581 | * hardware erratum T264-SMMU-3. See the description at | ||
| 582 | * arm_smmu_erratum_repeat_tlbi_cfgi_key. | ||
| 583 | */ | ||
| 584 | enum iommu_hw_info_arm_smmuv3_flags { | ||
| 585 | IOMMU_HW_INFO_ARM_SMMUV3_ERRATA_REPEAT_TLBI_CFGI = 1 << 0, | ||
| 586 | }; | ||
| 587 | |||
| 577 | /** | 588 | /** |
| 578 | * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information | 589 | * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information |
| 579 | * (IOMMU_HW_INFO_TYPE_ARM_SMMUV3) | 590 | * (IOMMU_HW_INFO_TYPE_ARM_SMMUV3) |
| 580 | * | 591 | * |
| 581 | * @flags: Must be set to 0 | 592 | * @flags: Combination of enum iommu_hw_info_arm_smmuv3_flags |
| 582 | * @__reserved: Must be 0 | 593 | * @__reserved: Must be 0 |
| 583 | * @idr: Implemented features for ARM SMMU Non-secure programming interface | 594 | * @idr: Implemented features for ARM SMMU Non-secure programming interface |
| 584 | * @iidr: Information about the implementation and implementer of ARM SMMU, | 595 | * @iidr: Information about the implementation and implementer of ARM SMMU, |