AMD SoC general pupose clk is present in new platforms with same MMIO mappings. We can reuse the same clk handler support for other platforms. Hence, changing name from ST(SoC) to FCH(IP)
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| @@ -1,17 +1,17 @@ | |||
| 1 | /* SPDX-License-Identifier: MIT */ | 1 | /* SPDX-License-Identifier: MIT */ |
| 2 | /* | 2 | /* |
| 3 | * clock framework for AMD Stoney based clock | 3 | * clock framework for AMD misc clocks |
| 4 | * | 4 | * |
| 5 | * Copyright 2018 Advanced Micro Devices, Inc. | 5 | * Copyright 2018 Advanced Micro Devices, Inc. |
| 6 | */ | 6 | */ |
| 7 | 7 | ||
| 8 | #ifndef __CLK_ST_H | 8 | #ifndef __CLK_FCH_H |
| 9 | #define __CLK_ST_H | 9 | #define __CLK_FCH_H |
| 10 | 10 | ||
| 11 | #include <linux/compiler.h> | 11 | #include <linux/compiler.h> |
| 12 | 12 | ||
| 13 | struct st_clk_data { | 13 | struct fch_clk_data { |
| 14 | void __iomem *base; | 14 | void __iomem *base; |
| 15 | }; | 15 | }; |
| 16 | 16 | ||
| 17 | #endif /* __CLK_ST_H */ | 17 | #endif /* __CLK_FCH_H */ |