Pull tty / serial driver updates from Greg KH: "Here is the "large" TTY and Serial driver update for 5.3-rc1. It's in the negative number of lines overall as we removed an obsolete serial driver that was causing problems for some people who were trying to clean up some apis (the mpsc.c driver, which only worked for some pre-production hardware that no one has anymore.) Other than that, lots of tiny changes, cleaning up small things along with some platform-specific serial driver updates. All of these have been in linux-next for a while now with no reported issues" * tag 'tty-5.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (68 commits) tty: serial: fsl_lpuart: add imx8qxp support serial: imx: set_termios(): preserve RTS state serial: imx: set_termios(): clarify RTS/CTS bits calculation serial: imx: set_termios(): factor-out 'ucr2' initial value serial: sh-sci: Terminate TX DMA during buffer flushing serial: sh-sci: Fix TX DMA buffer flushing and workqueue races serial: mpsc: Remove obsolete MPSC driver serial: 8250: 8250_core: Fix missing unlock on error in serial8250_register_8250_port() serial: stm32: add RX and TX FIFO flush serial: stm32: add support of RX FIFO threshold serial: stm32: add support of TX FIFO threshold serial: stm32: update PIO transmission serial: stm32: add support of timeout interrupt for RX Revert "serial: 8250: Don't service RX FIFO if interrupts are disabled" tty/serial/8250: use mctrl_gpio helpers serial: mctrl_gpio: Check if GPIO property exisits before requesting it serial: 8250: pericom_do_set_divisor can be static tty: serial_core: Set port active bit in uart_port_activate serial: 8250: Add MSR/MCR TIOCM conversion wrapper functions serial: 8250: factor out serial8250_{set,clear}_THRI() helpers ...
Showing the changes to include/linux (2 of 34 files). Show all
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| @@ -918,52 +918,6 @@ · 917 unmodified lines | |||
| 918 | 918 | ||
| 919 | extern void mv64340_irq_init(unsigned int base); | 919 | extern void mv64340_irq_init(unsigned int base); |
| 920 | 920 | ||
| 921 | /* MPSC Platform Device, Driver Data (Shared register regions) */ | ||
| 922 | #define MPSC_SHARED_NAME "mpsc_shared" | ||
| 923 | |||
| 924 | #define MPSC_ROUTING_BASE_ORDER 0 | ||
| 925 | #define MPSC_SDMA_INTR_BASE_ORDER 1 | ||
| 926 | |||
| 927 | #define MPSC_ROUTING_REG_BLOCK_SIZE 0x000c | ||
| 928 | #define MPSC_SDMA_INTR_REG_BLOCK_SIZE 0x0084 | ||
| 929 | |||
| 930 | struct mpsc_shared_pdata { | ||
| 931 | u32 mrr_val; | ||
| 932 | u32 rcrr_val; | ||
| 933 | u32 tcrr_val; | ||
| 934 | u32 intr_cause_val; | ||
| 935 | u32 intr_mask_val; | ||
| 936 | }; | ||
| 937 | |||
| 938 | /* MPSC Platform Device, Driver Data */ | ||
| 939 | #define MPSC_CTLR_NAME "mpsc" | ||
| 940 | |||
| 941 | #define MPSC_BASE_ORDER 0 | ||
| 942 | #define MPSC_SDMA_BASE_ORDER 1 | ||
| 943 | #define MPSC_BRG_BASE_ORDER 2 | ||
| 944 | |||
| 945 | #define MPSC_REG_BLOCK_SIZE 0x0038 | ||
| 946 | #define MPSC_SDMA_REG_BLOCK_SIZE 0x0c18 | ||
| 947 | #define MPSC_BRG_REG_BLOCK_SIZE 0x0008 | ||
| 948 | |||
| 949 | struct mpsc_pdata { | ||
| 950 | u8 mirror_regs; | ||
| 951 | u8 cache_mgmt; | ||
| 952 | u8 max_idle; | ||
| 953 | int default_baud; | ||
| 954 | int default_bits; | ||
| 955 | int default_parity; | ||
| 956 | int default_flow; | ||
| 957 | u32 chr_1_val; | ||
| 958 | u32 chr_2_val; | ||
| 959 | u32 chr_10_val; | ||
| 960 | u32 mpcr_val; | ||
| 961 | u32 bcr_val; | ||
| 962 | u8 brg_can_tune; | ||
| 963 | u8 brg_clk_src; | ||
| 964 | u32 brg_clk_freq; | ||
| 965 | }; | ||
| 966 | |||
| 967 | /* Watchdog Platform Device, Driver Data */ | 921 | /* Watchdog Platform Device, Driver Data */ |
| 968 | #define MV64x60_WDT_NAME "mv64x60_wdt" | 922 | #define MV64x60_WDT_NAME "mv64x60_wdt" |
| 969 | 923 | ||
| @@ -110,6 +110,7 @@ struct uart_8250_port { · 109 unmodified lines | |||
| 110 | * if no_console_suspend | 110 | * if no_console_suspend |
| 111 | */ | 111 | */ |
| 112 | unsigned char probe; | 112 | unsigned char probe; |
| 113 | struct mctrl_gpios *gpios; | ||
| 113 | #define UART_PROBE_RSA (1 << 0) | 114 | #define UART_PROBE_RSA (1 << 0) |
| 114 | 115 | ||
| 115 | /* | 116 | /* |