History

dmaengine: Introduce min burst length capability

Some hardware aside from default 0/1 may have greater minimum burst transactions length constraints. Here we introduce the DMA device and slave capability, which if required can be initialized by the DMA engine driver with the device-specific value.

Serge Semin committed 6 years ago

Commit d97758e1 parent 2e7d7422 files · +5 −0Browse files

Unified · Split

2 files
  1. drivers/dma/dmaengine.c +1 −0
  2. include/linux/dmaengine.h +4 −0
drivers/dma/dmaengine.c+1−0
@@ -592,6 +592,7 @@ int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) · 591 unmodified lines
592 caps->src_addr_widths = device->src_addr_widths;592 caps->src_addr_widths = device->src_addr_widths;
593 caps->dst_addr_widths = device->dst_addr_widths;593 caps->dst_addr_widths = device->dst_addr_widths;
594 caps->directions = device->directions;594 caps->directions = device->directions;
595 caps->min_burst = device->min_burst;
595 caps->max_burst = device->max_burst;596 caps->max_burst = device->max_burst;
596 caps->residue_granularity = device->residue_granularity;597 caps->residue_granularity = device->residue_granularity;
597 caps->descriptor_reuse = device->descriptor_reuse;598 caps->descriptor_reuse = device->descriptor_reuse;
include/linux/dmaengine.h+4−0
@@ -467,6 +467,7 @@ enum dma_residue_granularity { · 466 unmodified lines
467 * Since the enum dma_transfer_direction is not defined as bit flag for467 * Since the enum dma_transfer_direction is not defined as bit flag for
468 * each type, the dma controller should set BIT(<TYPE>) and same468 * each type, the dma controller should set BIT(<TYPE>) and same
469 * should be checked by controller as well469 * should be checked by controller as well
470 * @min_burst: min burst capability per-transfer
470 * @max_burst: max burst capability per-transfer471 * @max_burst: max burst capability per-transfer
471 * @cmd_pause: true, if pause is supported (i.e. for reading residue or472 * @cmd_pause: true, if pause is supported (i.e. for reading residue or
472 * for resume later)473 * for resume later)
@@ -480,6 +481,7 @@ struct dma_slave_caps { · 7 unmodified lines
480 u32 src_addr_widths;481 u32 src_addr_widths;
481 u32 dst_addr_widths;482 u32 dst_addr_widths;
482 u32 directions;483 u32 directions;
484 u32 min_burst;
483 u32 max_burst;485 u32 max_burst;
484 bool cmd_pause;486 bool cmd_pause;
485 bool cmd_resume;487 bool cmd_resume;
@@ -771,6 +773,7 @@ struct dma_filter { · 285 unmodified lines
771 * Since the enum dma_transfer_direction is not defined as bit flag for773 * Since the enum dma_transfer_direction is not defined as bit flag for
772 * each type, the dma controller should set BIT(<TYPE>) and same774 * each type, the dma controller should set BIT(<TYPE>) and same
773 * should be checked by controller as well775 * should be checked by controller as well
776 * @min_burst: min burst capability per-transfer
774 * @max_burst: max burst capability per-transfer777 * @max_burst: max burst capability per-transfer
775 * @residue_granularity: granularity of the transfer residue reported778 * @residue_granularity: granularity of the transfer residue reported
776 * by tx_status779 * by tx_status
@@ -841,6 +844,7 @@ struct dma_device { · 64 unmodified lines
841 u32 src_addr_widths;844 u32 src_addr_widths;
842 u32 dst_addr_widths;845 u32 dst_addr_widths;
843 u32 directions;846 u32 directions;
847 u32 min_burst;
844 u32 max_burst;848 u32 max_burst;
845 bool descriptor_reuse;849 bool descriptor_reuse;
846 enum dma_residue_granularity residue_granularity;850 enum dma_residue_granularity residue_granularity;