Some hardware aside from default 0/1 may have greater minimum burst transactions length constraints. Here we introduce the DMA device and slave capability, which if required can be initialized by the DMA engine driver with the device-specific value.
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| @@ -467,6 +467,7 @@ enum dma_residue_granularity { · 466 unmodified lines | |||
| 467 | * Since the enum dma_transfer_direction is not defined as bit flag for | 467 | * Since the enum dma_transfer_direction is not defined as bit flag for |
| 468 | * each type, the dma controller should set BIT(<TYPE>) and same | 468 | * each type, the dma controller should set BIT(<TYPE>) and same |
| 469 | * should be checked by controller as well | 469 | * should be checked by controller as well |
| 470 | * @min_burst: min burst capability per-transfer | ||
| 470 | * @max_burst: max burst capability per-transfer | 471 | * @max_burst: max burst capability per-transfer |
| 471 | * @cmd_pause: true, if pause is supported (i.e. for reading residue or | 472 | * @cmd_pause: true, if pause is supported (i.e. for reading residue or |
| 472 | * for resume later) | 473 | * for resume later) |
| @@ -480,6 +481,7 @@ struct dma_slave_caps { · 7 unmodified lines | |||
| 480 | u32 src_addr_widths; | 481 | u32 src_addr_widths; |
| 481 | u32 dst_addr_widths; | 482 | u32 dst_addr_widths; |
| 482 | u32 directions; | 483 | u32 directions; |
| 484 | u32 min_burst; | ||
| 483 | u32 max_burst; | 485 | u32 max_burst; |
| 484 | bool cmd_pause; | 486 | bool cmd_pause; |
| 485 | bool cmd_resume; | 487 | bool cmd_resume; |
| @@ -771,6 +773,7 @@ struct dma_filter { · 285 unmodified lines | |||
| 771 | * Since the enum dma_transfer_direction is not defined as bit flag for | 773 | * Since the enum dma_transfer_direction is not defined as bit flag for |
| 772 | * each type, the dma controller should set BIT(<TYPE>) and same | 774 | * each type, the dma controller should set BIT(<TYPE>) and same |
| 773 | * should be checked by controller as well | 775 | * should be checked by controller as well |
| 776 | * @min_burst: min burst capability per-transfer | ||
| 774 | * @max_burst: max burst capability per-transfer | 777 | * @max_burst: max burst capability per-transfer |
| 775 | * @residue_granularity: granularity of the transfer residue reported | 778 | * @residue_granularity: granularity of the transfer residue reported |
| 776 | * by tx_status | 779 | * by tx_status |
| @@ -841,6 +844,7 @@ struct dma_device { · 64 unmodified lines | |||
| 841 | u32 src_addr_widths; | 844 | u32 src_addr_widths; |
| 842 | u32 dst_addr_widths; | 845 | u32 dst_addr_widths; |
| 843 | u32 directions; | 846 | u32 directions; |
| 847 | u32 min_burst; | ||
| 844 | u32 max_burst; | 848 | u32 max_burst; |
| 845 | bool descriptor_reuse; | 849 | bool descriptor_reuse; |
| 846 | enum dma_residue_granularity residue_granularity; | 850 | enum dma_residue_granularity residue_granularity; |