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KVM: PPC: Book3S HV: Introduce new capability for 2nd DAWR

Introduce KVM_CAP_PPC_DAWR1 which can be used by QEMU to query whether KVM supports 2nd DAWR or not. The capability is by default disabled even when the underlying CPU supports 2nd DAWR. QEMU needs to check and enable it manually to use the feature.

Ravi Bangoria committed 5 years ago

Commit d9a47ed1 parent bd1de1a6 files · +35 −0Browse files

Unified · Split

6 files
  1. Documentation/virt/kvm/api.rst +10 −0
  2. arch/powerpc/include/asm/kvm_ppc.h +1 −0
  3. arch/powerpc/kvm/book3s_hv.c +12 −0
  4. arch/powerpc/kvm/powerpc.c +10 −0
  5. include/uapi/linux/kvm.h +1 −0
  6. tools/include/uapi/linux/kvm.h +1 −0
Documentation/virt/kvm/api.rst+10−0
@@ -6215,6 +6215,16 @@ the bus lock vm exit can be preempted by a higher priority VM exit, the exit · 6214 unmodified lines
62156215 notifications to userspace can be KVM_EXIT_BUS_LOCK or other reasons.
62166216 KVM_RUN_BUS_LOCK flag is used to distinguish between them.
62176217
6218+7.22 KVM_CAP_PPC_DAWR1
6219+----------------------
6220+
6221+:Architectures: ppc
6222+:Parameters: none
6223+:Returns: 0 on success, -EINVAL when CPU doesn't support 2nd DAWR
6224+
6225+This capability can be used to check / enable 2nd DAWR feature provided
6226+by POWER10 processor.
6227+
62186228 8. Other capabilities.
62196229 ======================
62206230
arch/powerpc/include/asm/kvm_ppc.h+1−0
@@ -314,6 +314,7 @@ struct kvmppc_ops { · 313 unmodified lines
314314 int size);
315315 int (*enable_svm)(struct kvm *kvm);
316316 int (*svm_off)(struct kvm *kvm);
317+ int (*enable_dawr1)(struct kvm *kvm);
317318 };
318319
319320 extern struct kvmppc_ops *kvmppc_hv_ops;
arch/powerpc/kvm/book3s_hv.c+12−0
@@ -5642,6 +5642,17 @@ out: · 5641 unmodified lines
56425642 return ret;
56435643 }
56445644
5645+static int kvmhv_enable_dawr1(struct kvm *kvm)
5646+{
5647+ if (!cpu_has_feature(CPU_FTR_DAWR1))
5648+ return -ENODEV;
5649+
5650+ /* kvm == NULL means the caller is testing if the capability exists */
5651+ if (kvm)
5652+ kvm->arch.dawr1_enabled = true;
5653+ return 0;
5654+}
5655+
56455656 static struct kvmppc_ops kvm_ops_hv = {
56465657 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
56475658 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
@@ -5685,6 +5696,7 @@ static struct kvmppc_ops kvm_ops_hv = { · 37 unmodified lines
56855696 .store_to_eaddr = kvmhv_store_to_eaddr,
56865697 .enable_svm = kvmhv_enable_svm,
56875698 .svm_off = kvmhv_svm_off,
5699+ .enable_dawr1 = kvmhv_enable_dawr1,
56885700 };
56895701
56905702 static int kvm_init_subcore_bitmap(void)
arch/powerpc/kvm/powerpc.c+10−0
@@ -678,6 +678,10 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 677 unmodified lines
678678 r = hv_enabled && kvmppc_hv_ops->enable_svm &&
679679 !kvmppc_hv_ops->enable_svm(NULL);
680680 break;
681+ case KVM_CAP_PPC_DAWR1:
682+ r = !!(hv_enabled && kvmppc_hv_ops->enable_dawr1 &&
683+ !kvmppc_hv_ops->enable_dawr1(NULL));
684+ break;
681685 #endif
682686 default:
683687 r = 0;
@@ -2187,6 +2191,12 @@ int kvm_vm_ioctl_enable_cap(struct kvm *kvm, · 1503 unmodified lines
21872191 break;
21882192 r = kvm->arch.kvm_ops->enable_svm(kvm);
21892193 break;
2194+ case KVM_CAP_PPC_DAWR1:
2195+ r = -EINVAL;
2196+ if (!is_kvmppc_hv_enabled(kvm) || !kvm->arch.kvm_ops->enable_dawr1)
2197+ break;
2198+ r = kvm->arch.kvm_ops->enable_dawr1(kvm);
2199+ break;
21902200 #endif
21912201 default:
21922202 r = -EINVAL;
include/uapi/linux/kvm.h+1−0
@@ -1077,6 +1077,7 @@ struct kvm_ppc_resize_hpt { · 1076 unmodified lines
10771077 #define KVM_CAP_SYS_HYPERV_CPUID 191
10781078 #define KVM_CAP_DIRTY_LOG_RING 192
10791079 #define KVM_CAP_X86_BUS_LOCK_EXIT 193
1080+#define KVM_CAP_PPC_DAWR1 194
10801081
10811082 #ifdef KVM_CAP_IRQ_ROUTING
10821083
tools/include/uapi/linux/kvm.h+1−0
@@ -1056,6 +1056,7 @@ struct kvm_ppc_resize_hpt { · 1055 unmodified lines
10561056 #define KVM_CAP_ENFORCE_PV_FEATURE_CPUID 190
10571057 #define KVM_CAP_SYS_HYPERV_CPUID 191
10581058 #define KVM_CAP_DIRTY_LOG_RING 192
1059+#define KVM_CAP_PPC_DAWR1 194
10591060
10601061 #ifdef KVM_CAP_IRQ_ROUTING
10611062

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