Pull rdma updates from Jason Gunthorpe: "This has been a smaller cycle with many of the commits being smallish code fixes and improvements across the drivers. - Driver updates for bnxt_re, cxgb4, hfi1, hns, mlx5, nes, qedr, and rxe - Memory window support in hns - mlx5 user API 'flow mutate/steering' allows accessing the full packet mangling and matching machinery from user space - Support inter-working with verbs API calls in the 'devx' mlx5 user API, and provide options to use devx with less privilege - Modernize the use of syfs and the device interface to use attribute groups and cdev properly for uverbs, and clean up some of the core code's device list management - More progress on net namespaces for RDMA devices - Consolidate driver BAR mmapping support into core code helpers and rework how RDMA holds poitners to mm_struct for get_user_pages cases - First pass to use 'dev_name' instead of ib_device->name - Device renaming for RDMA devices" * tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma: (242 commits) IB/mlx5: Add support for extended atomic operations RDMA/core: Fix comment for hw stats init for port == 0 RDMA/core: Refactor ib_register_device() function RDMA/core: Fix unwinding flow in case of error to register device ib_srp: Remove WARN_ON in srp_terminate_io() IB/mlx5: Allow scatter to CQE without global signaled WRs IB/mlx5: Verify that driver supports user flags IB/mlx5: Support scatter to CQE for DC transport type RDMA/drivers: Use core provided API for registering device attributes RDMA/core: Allow existing drivers to set one sysfs group per device IB/rxe: Remove unnecessary enum values RDMA/umad: Use kernel API to allocate umad indexes RDMA/uverbs: Use kernel API to allocate uverbs indexes RDMA/core: Increase total number of RDMA ports across all devices IB/mlx4: Add port and TID to MAD debug print IB/mlx4: Enable debug print of SMPs RDMA/core: Rename ports_parent to ports_kobj RDMA/core: Do not expose unsupported counters IB/mlx4: Refer to the device kobject instead of ports_parent RDMA/nldev: Allow IB device rename through RDMA netlink ...
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| @@ -763,10 +763,28 @@ struct ib_uverbs_sge { · 762 unmodified lines | |||
| 763 | __u32 lkey; | 763 | __u32 lkey; |
| 764 | }; | 764 | }; |
| 765 | 765 | ||
| 766 | enum ib_uverbs_wr_opcode { | ||
| 767 | IB_UVERBS_WR_RDMA_WRITE = 0, | ||
| 768 | IB_UVERBS_WR_RDMA_WRITE_WITH_IMM = 1, | ||
| 769 | IB_UVERBS_WR_SEND = 2, | ||
| 770 | IB_UVERBS_WR_SEND_WITH_IMM = 3, | ||
| 771 | IB_UVERBS_WR_RDMA_READ = 4, | ||
| 772 | IB_UVERBS_WR_ATOMIC_CMP_AND_SWP = 5, | ||
| 773 | IB_UVERBS_WR_ATOMIC_FETCH_AND_ADD = 6, | ||
| 774 | IB_UVERBS_WR_LOCAL_INV = 7, | ||
| 775 | IB_UVERBS_WR_BIND_MW = 8, | ||
| 776 | IB_UVERBS_WR_SEND_WITH_INV = 9, | ||
| 777 | IB_UVERBS_WR_TSO = 10, | ||
| 778 | IB_UVERBS_WR_RDMA_READ_WITH_INV = 11, | ||
| 779 | IB_UVERBS_WR_MASKED_ATOMIC_CMP_AND_SWP = 12, | ||
| 780 | IB_UVERBS_WR_MASKED_ATOMIC_FETCH_AND_ADD = 13, | ||
| 781 | /* Review enum ib_wr_opcode before modifying this */ | ||
| 782 | }; | ||
| 783 | |||
| 766 | struct ib_uverbs_send_wr { | 784 | struct ib_uverbs_send_wr { |
| 767 | __aligned_u64 wr_id; | 785 | __aligned_u64 wr_id; |
| 768 | __u32 num_sge; | 786 | __u32 num_sge; |
| 769 | __u32 opcode; | 787 | __u32 opcode; /* see enum ib_uverbs_wr_opcode */ |
| 770 | __u32 send_flags; | 788 | __u32 send_flags; |
| 771 | union { | 789 | union { |
| 772 | __be32 imm_data; | 790 | __be32 imm_data; |
| @@ -45,6 +45,9 @@ enum { · 44 unmodified lines | |||
| 45 | MLX5_QP_FLAG_BFREG_INDEX = 1 << 3, | 45 | MLX5_QP_FLAG_BFREG_INDEX = 1 << 3, |
| 46 | MLX5_QP_FLAG_TYPE_DCT = 1 << 4, | 46 | MLX5_QP_FLAG_TYPE_DCT = 1 << 4, |
| 47 | MLX5_QP_FLAG_TYPE_DCI = 1 << 5, | 47 | MLX5_QP_FLAG_TYPE_DCI = 1 << 5, |
| 48 | MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_UC = 1 << 6, | ||
| 49 | MLX5_QP_FLAG_TIR_ALLOW_SELF_LB_MC = 1 << 7, | ||
| 50 | MLX5_QP_FLAG_ALLOW_SCATTER_CQE = 1 << 8, | ||
| 48 | }; | 51 | }; |
| 49 | 52 | ||
| 50 | enum { | 53 | enum { |
| @@ -349,9 +352,22 @@ struct mlx5_ib_create_qp_rss { · 298 unmodified lines | |||
| 349 | __u32 flags; | 352 | __u32 flags; |
| 350 | }; | 353 | }; |
| 351 | 354 | ||
| 355 | enum mlx5_ib_create_qp_resp_mask { | ||
| 356 | MLX5_IB_CREATE_QP_RESP_MASK_TIRN = 1UL << 0, | ||
| 357 | MLX5_IB_CREATE_QP_RESP_MASK_TISN = 1UL << 1, | ||
| 358 | MLX5_IB_CREATE_QP_RESP_MASK_RQN = 1UL << 2, | ||
| 359 | MLX5_IB_CREATE_QP_RESP_MASK_SQN = 1UL << 3, | ||
| 360 | }; | ||
| 361 | |||
| 352 | struct mlx5_ib_create_qp_resp { | 362 | struct mlx5_ib_create_qp_resp { |
| 353 | __u32 bfreg_index; | 363 | __u32 bfreg_index; |
| 354 | __u32 reserved; | 364 | __u32 reserved; |
| 365 | __u32 comp_mask; | ||
| 366 | __u32 tirn; | ||
| 367 | __u32 tisn; | ||
| 368 | __u32 rqn; | ||
| 369 | __u32 sqn; | ||
| 370 | __u32 reserved1; | ||
| 355 | }; | 371 | }; |
| 356 | 372 | ||
| 357 | struct mlx5_ib_alloc_mw { | 373 | struct mlx5_ib_alloc_mw { |
| @@ -125,6 +125,7 @@ enum mlx5_ib_flow_matcher_create_attrs { · 124 unmodified lines | |||
| 125 | MLX5_IB_ATTR_FLOW_MATCHER_MATCH_MASK, | 125 | MLX5_IB_ATTR_FLOW_MATCHER_MATCH_MASK, |
| 126 | MLX5_IB_ATTR_FLOW_MATCHER_FLOW_TYPE, | 126 | MLX5_IB_ATTR_FLOW_MATCHER_FLOW_TYPE, |
| 127 | MLX5_IB_ATTR_FLOW_MATCHER_MATCH_CRITERIA, | 127 | MLX5_IB_ATTR_FLOW_MATCHER_MATCH_CRITERIA, |
| 128 | MLX5_IB_ATTR_FLOW_MATCHER_FLOW_FLAGS, | ||
| 128 | }; | 129 | }; |
| 129 | 130 | ||
| 130 | enum mlx5_ib_flow_matcher_destroy_attrs { | 131 | enum mlx5_ib_flow_matcher_destroy_attrs { |
| @@ -155,6 +156,8 @@ enum mlx5_ib_create_flow_attrs { · 24 unmodified lines | |||
| 155 | MLX5_IB_ATTR_CREATE_FLOW_DEST_QP, | 156 | MLX5_IB_ATTR_CREATE_FLOW_DEST_QP, |
| 156 | MLX5_IB_ATTR_CREATE_FLOW_DEST_DEVX, | 157 | MLX5_IB_ATTR_CREATE_FLOW_DEST_DEVX, |
| 157 | MLX5_IB_ATTR_CREATE_FLOW_MATCHER, | 158 | MLX5_IB_ATTR_CREATE_FLOW_MATCHER, |
| 159 | MLX5_IB_ATTR_CREATE_FLOW_ARR_FLOW_ACTIONS, | ||
| 160 | MLX5_IB_ATTR_CREATE_FLOW_TAG, | ||
| 158 | }; | 161 | }; |
| 159 | 162 | ||
| 160 | enum mlx5_ib_destoy_flow_attrs { | 163 | enum mlx5_ib_destoy_flow_attrs { |
| @@ -166,4 +169,22 @@ enum mlx5_ib_flow_methods { · 5 unmodified lines | |||
| 166 | MLX5_IB_METHOD_DESTROY_FLOW, | 169 | MLX5_IB_METHOD_DESTROY_FLOW, |
| 167 | }; | 170 | }; |
| 168 | 171 | ||
| 172 | enum mlx5_ib_flow_action_methods { | ||
| 173 | MLX5_IB_METHOD_FLOW_ACTION_CREATE_MODIFY_HEADER = (1U << UVERBS_ID_NS_SHIFT), | ||
| 174 | MLX5_IB_METHOD_FLOW_ACTION_CREATE_PACKET_REFORMAT, | ||
| 175 | }; | ||
| 176 | |||
| 177 | enum mlx5_ib_create_flow_action_create_modify_header_attrs { | ||
| 178 | MLX5_IB_ATTR_CREATE_MODIFY_HEADER_HANDLE = (1U << UVERBS_ID_NS_SHIFT), | ||
| 179 | MLX5_IB_ATTR_CREATE_MODIFY_HEADER_ACTIONS_PRM, | ||
| 180 | MLX5_IB_ATTR_CREATE_MODIFY_HEADER_FT_TYPE, | ||
| 181 | }; | ||
| 182 | |||
| 183 | enum mlx5_ib_create_flow_action_create_packet_reformat_attrs { | ||
| 184 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_HANDLE = (1U << UVERBS_ID_NS_SHIFT), | ||
| 185 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_TYPE, | ||
| 186 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_FT_TYPE, | ||
| 187 | MLX5_IB_ATTR_CREATE_PACKET_REFORMAT_DATA_BUF, | ||
| 188 | }; | ||
| 189 | |||
| 169 | #endif | 190 | #endif |
| @@ -39,5 +39,17 @@ enum mlx5_ib_uapi_flow_action_flags { · 38 unmodified lines | |||
| 39 | MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE_METADATA = 1 << 0, | 39 | MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE_METADATA = 1 << 0, |
| 40 | }; | 40 | }; |
| 41 | 41 | ||
| 42 | enum mlx5_ib_uapi_flow_table_type { | ||
| 43 | MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX = 0x0, | ||
| 44 | MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX = 0x1, | ||
| 45 | }; | ||
| 46 | |||
| 47 | enum mlx5_ib_uapi_flow_action_packet_reformat_type { | ||
| 48 | MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 = 0x0, | ||
| 49 | MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x1, | ||
| 50 | MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x2, | ||
| 51 | MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x3, | ||
| 52 | }; | ||
| 53 | |||
| 42 | #endif | 54 | #endif |
| 43 | 55 | ||
| @@ -227,8 +227,9 @@ enum rdma_nldev_command { · 226 unmodified lines | |||
| 227 | RDMA_NLDEV_CMD_UNSPEC, | 227 | RDMA_NLDEV_CMD_UNSPEC, |
| 228 | 228 | ||
| 229 | RDMA_NLDEV_CMD_GET, /* can dump */ | 229 | RDMA_NLDEV_CMD_GET, /* can dump */ |
| 230 | RDMA_NLDEV_CMD_SET, | ||
| 230 | 231 | ||
| 231 | /* 2 - 4 are free to use */ | 232 | /* 3 - 4 are free to use */ |
| 232 | 233 | ||
| 233 | RDMA_NLDEV_CMD_PORT_GET = 5, /* can dump */ | 234 | RDMA_NLDEV_CMD_PORT_GET = 5, /* can dump */ |
| 234 | 235 | ||
| @@ -53,7 +53,7 @@ enum { · 52 unmodified lines | |||
| 53 | 53 | ||
| 54 | struct ib_uverbs_attr { | 54 | struct ib_uverbs_attr { |
| 55 | __u16 attr_id; /* command specific type attribute */ | 55 | __u16 attr_id; /* command specific type attribute */ |
| 56 | __u16 len; /* only for pointers */ | 56 | __u16 len; /* only for pointers and IDRs array */ |
| 57 | __u16 flags; /* combination of UVERBS_ATTR_F_XXXX */ | 57 | __u16 flags; /* combination of UVERBS_ATTR_F_XXXX */ |
| 58 | union { | 58 | union { |
| 59 | struct { | 59 | struct { |
| @@ -63,7 +63,10 @@ struct ib_uverbs_attr { · 3 unmodified lines | |||
| 63 | __u16 reserved; | 63 | __u16 reserved; |
| 64 | } attr_data; | 64 | } attr_data; |
| 65 | union { | 65 | union { |
| 66 | /* Used by PTR_IN/OUT, ENUM_IN and IDR */ | 66 | /* |
| 67 | * ptr to command, inline data, idr/fd or | ||
| 68 | * ptr to __u32 array of IDRs | ||
| 69 | */ | ||
| 67 | __aligned_u64 data; | 70 | __aligned_u64 data; |
| 68 | /* Used by FD_IN and FD_OUT */ | 71 | /* Used by FD_IN and FD_OUT */ |
| 69 | __s64 data_s64; | 72 | __s64 data_s64; |