Pull drm fixes from Dave Airlie: "A fairly urgent nouveau regression fix for broken irqs across suspend/resume came in. This was broken before but a patch in 4.15 has made it much more obviously broken and now s/r fails a lot more often. The fix removes freeing the irq across s/r which never should have been done anyways. Also two vc4 fixes for a NULL deference and some misrendering / flickering on screen" * tag 'drm-fixes-for-v4.15-rc10-2' of git://people.freedesktop.org/~airlied/linux: drm/nouveau: Move irq setup/teardown to pci ctor/dtor drm/vc4: Fix NULL pointer dereference in vc4_save_hang_state() drm/vc4: Flush the caches before the bin jobs, as well.
Unified · Split
| @@ -71,6 +71,10 @@ nvkm_pci_intr(int irq, void *arg) · 70 unmodified lines | ||
| 71 | 71 | struct nvkm_pci *pci = arg; |
| 72 | 72 | struct nvkm_device *device = pci->subdev.device; |
| 73 | 73 | bool handled = false; |
| 74 | + | |
| 75 | + if (pci->irq < 0) | |
| 76 | + return IRQ_HANDLED; | |
| 77 | + | |
| 74 | 78 | nvkm_mc_intr_unarm(device); |
| 75 | 79 | if (pci->msi) |
| 76 | 80 | pci->func->msi_rearm(pci); |
| @@ -84,11 +88,6 @@ nvkm_pci_fini(struct nvkm_subdev *subdev, bool suspend) · 7 unmodified lines | ||
| 84 | 88 | { |
| 85 | 89 | struct nvkm_pci *pci = nvkm_pci(subdev); |
| 86 | 90 | |
| 87 | − if (pci->irq >= 0) { | |
| 88 | − free_irq(pci->irq, pci); | |
| 89 | − pci->irq = -1; | |
| 90 | − } | |
| 91 | − | |
| 92 | 91 | if (pci->agp.bridge) |
| 93 | 92 | nvkm_agp_fini(pci); |
| 94 | 93 | |
| @@ -108,8 +107,20 @@ static int · 13 unmodified lines | ||
| 108 | 107 | nvkm_pci_oneinit(struct nvkm_subdev *subdev) |
| 109 | 108 | { |
| 110 | 109 | struct nvkm_pci *pci = nvkm_pci(subdev); |
| 111 | − if (pci_is_pcie(pci->pdev)) | |
| 112 | − return nvkm_pcie_oneinit(pci); | |
| 110 | + struct pci_dev *pdev = pci->pdev; | |
| 111 | + int ret; | |
| 112 | + | |
| 113 | + if (pci_is_pcie(pci->pdev)) { | |
| 114 | + ret = nvkm_pcie_oneinit(pci); | |
| 115 | + if (ret) | |
| 116 | + return ret; | |
| 117 | + } | |
| 118 | + | |
| 119 | + ret = request_irq(pdev->irq, nvkm_pci_intr, IRQF_SHARED, "nvkm", pci); | |
| 120 | + if (ret) | |
| 121 | + return ret; | |
| 122 | + | |
| 123 | + pci->irq = pdev->irq; | |
| 113 | 124 | return 0; |
| 114 | 125 | } |
| 115 | 126 | |
| @@ -117,7 +128,6 @@ static int · 1 unmodified line | ||
| 117 | 128 | nvkm_pci_init(struct nvkm_subdev *subdev) |
| 118 | 129 | { |
| 119 | 130 | struct nvkm_pci *pci = nvkm_pci(subdev); |
| 120 | − struct pci_dev *pdev = pci->pdev; | |
| 121 | 131 | int ret; |
| 122 | 132 | |
| 123 | 133 | if (pci->agp.bridge) { |
| @@ -131,28 +141,34 @@ nvkm_pci_init(struct nvkm_subdev *subdev) · 7 unmodified lines | ||
| 131 | 141 | if (pci->func->init) |
| 132 | 142 | pci->func->init(pci); |
| 133 | 143 | |
| 134 | − ret = request_irq(pdev->irq, nvkm_pci_intr, IRQF_SHARED, "nvkm", pci); | |
| 135 | − if (ret) | |
| 136 | − return ret; | |
| 137 | − | |
| 138 | − pci->irq = pdev->irq; | |
| 139 | − | |
| 140 | 144 | /* Ensure MSI interrupts are armed, for the case where there are |
| 141 | 145 | * already interrupts pending (for whatever reason) at load time. |
| 142 | 146 | */ |
| 143 | 147 | if (pci->msi) |
| 144 | 148 | pci->func->msi_rearm(pci); |
| 145 | 149 | |
| 146 | − return ret; | |
| 150 | + return 0; | |
| 147 | 151 | } |
| 148 | 152 | |
| 149 | 153 | static void * |
| 150 | 154 | nvkm_pci_dtor(struct nvkm_subdev *subdev) |
| 151 | 155 | { |
| 152 | 156 | struct nvkm_pci *pci = nvkm_pci(subdev); |
| 157 | + | |
| 153 | 158 | nvkm_agp_dtor(pci); |
| 159 | + | |
| 160 | + if (pci->irq >= 0) { | |
| 161 | + /* freq_irq() will call the handler, we use pci->irq == -1 | |
| 162 | + * to signal that it's been torn down and should be a noop. | |
| 163 | + */ | |
| 164 | + int irq = pci->irq; | |
| 165 | + pci->irq = -1; | |
| 166 | + free_irq(irq, pci); | |
| 167 | + } | |
| 168 | + | |
| 154 | 169 | if (pci->msi) |
| 155 | 170 | pci_disable_msi(pci->pdev); |
| 171 | + | |
| 156 | 172 | return nvkm_pci(subdev); |
| 157 | 173 | } |
| 158 | 174 | |
| @@ -146,7 +146,7 @@ vc4_save_hang_state(struct drm_device *dev) · 145 unmodified lines | ||
| 146 | 146 | struct vc4_exec_info *exec[2]; |
| 147 | 147 | struct vc4_bo *bo; |
| 148 | 148 | unsigned long irqflags; |
| 149 | − unsigned int i, j, unref_list_count, prev_idx; | |
| 149 | + unsigned int i, j, k, unref_list_count; | |
| 150 | 150 | |
| 151 | 151 | kernel_state = kcalloc(1, sizeof(*kernel_state), GFP_KERNEL); |
| 152 | 152 | if (!kernel_state) |
| @@ -182,7 +182,7 @@ vc4_save_hang_state(struct drm_device *dev) · 29 unmodified lines | ||
| 182 | 182 | return; |
| 183 | 183 | } |
| 184 | 184 | |
| 185 | − prev_idx = 0; | |
| 185 | + k = 0; | |
| 186 | 186 | for (i = 0; i < 2; i++) { |
| 187 | 187 | if (!exec[i]) |
| 188 | 188 | continue; |
| @@ -197,7 +197,7 @@ vc4_save_hang_state(struct drm_device *dev) · 8 unmodified lines | ||
| 197 | 197 | WARN_ON(!refcount_read(&bo->usecnt)); |
| 198 | 198 | refcount_inc(&bo->usecnt); |
| 199 | 199 | drm_gem_object_get(&exec[i]->bo[j]->base); |
| 200 | − kernel_state->bo[j + prev_idx] = &exec[i]->bo[j]->base; | |
| 200 | + kernel_state->bo[k++] = &exec[i]->bo[j]->base; | |
| 201 | 201 | } |
| 202 | 202 | |
| 203 | 203 | list_for_each_entry(bo, &exec[i]->unref_list, unref_head) { |
| @@ -205,12 +205,12 @@ vc4_save_hang_state(struct drm_device *dev) · 1 unmodified line | ||
| 205 | 205 | * because they are naturally unpurgeable. |
| 206 | 206 | */ |
| 207 | 207 | drm_gem_object_get(&bo->base.base); |
| 208 | − kernel_state->bo[j + prev_idx] = &bo->base.base; | |
| 209 | − j++; | |
| 208 | + kernel_state->bo[k++] = &bo->base.base; | |
| 210 | 209 | } |
| 211 | − prev_idx = j + 1; | |
| 212 | 210 | } |
| 213 | 211 | |
| 212 | + WARN_ON_ONCE(k != state->bo_count); | |
| 213 | + | |
| 214 | 214 | if (exec[0]) |
| 215 | 215 | state->start_bin = exec[0]->ct0ca; |
| 216 | 216 | if (exec[1]) |
| @@ -436,6 +436,19 @@ vc4_flush_caches(struct drm_device *dev) · 219 unmodified lines | ||
| 436 | 436 | VC4_SET_FIELD(0xf, V3D_SLCACTL_ICC)); |
| 437 | 437 | } |
| 438 | 438 | |
| 439 | +static void | |
| 440 | +vc4_flush_texture_caches(struct drm_device *dev) | |
| 441 | +{ | |
| 442 | + struct vc4_dev *vc4 = to_vc4_dev(dev); | |
| 443 | + | |
| 444 | + V3D_WRITE(V3D_L2CACTL, | |
| 445 | + V3D_L2CACTL_L2CCLR); | |
| 446 | + | |
| 447 | + V3D_WRITE(V3D_SLCACTL, | |
| 448 | + VC4_SET_FIELD(0xf, V3D_SLCACTL_T1CC) | | |
| 449 | + VC4_SET_FIELD(0xf, V3D_SLCACTL_T0CC)); | |
| 450 | +} | |
| 451 | + | |
| 439 | 452 | /* Sets the registers for the next job to be actually be executed in |
| 440 | 453 | * the hardware. |
| 441 | 454 | * |
| @@ -474,6 +487,14 @@ vc4_submit_next_render_job(struct drm_device *dev) · 32 unmodified lines | ||
| 474 | 487 | if (!exec) |
| 475 | 488 | return; |
| 476 | 489 | |
| 490 | + /* A previous RCL may have written to one of our textures, and | |
| 491 | + * our full cache flush at bin time may have occurred before | |
| 492 | + * that RCL completed. Flush the texture cache now, but not | |
| 493 | + * the instructions or uniforms (since we don't write those | |
| 494 | + * from an RCL). | |
| 495 | + */ | |
| 496 | + vc4_flush_texture_caches(dev); | |
| 497 | + | |
| 477 | 498 | submit_cl(dev, 1, exec->ct1ca, exec->ct1ea); |
| 478 | 499 | } |
| 479 | 500 | |