iommu/io-pgtable-arm: Prepare for TTBR1 usage

Now that we can correctly extract top-level indices without relying on the remaining upper bits being zero, the only remaining impediments to using a given table for TTBR1 are the address validation on map/unmap and the awkward TCR translation granule format. Add a quirk so that we can do the right thing at those points.

Robin Murphy committed 7 years ago

Commit db690301 parent ac4b80e2 files · +23 −6Browse files

Showing the changes to include/linux (1 of 2 files). Show all

Unified · Split

include/linux/io-pgtable.h+4−0

@@ -83,12 +83,16 @@ struct io_pgtable_cfg { · 82 unmodified lines
83	83	* IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs
84	84	* on unmap, for DMA domains using the flush queue mechanism for
85	85	* delayed invalidation.
	86	+ *
	87	+ * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
	88	+ * for use in the upper half of a split address space.
86	89	*/
87	90	#define IO_PGTABLE_QUIRK_ARM_NS BIT(0)
88	91	#define IO_PGTABLE_QUIRK_NO_PERMS BIT(1)
89	92	#define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2)
90	93	#define IO_PGTABLE_QUIRK_ARM_MTK_EXT BIT(3)
91	94	#define IO_PGTABLE_QUIRK_NON_STRICT BIT(4)
	95	+ #define IO_PGTABLE_QUIRK_ARM_TTBR1 BIT(5)
92	96	unsigned long quirks;
93	97	unsigned long pgsize_bitmap;
94	98	unsigned int ias;