CQE checksum full mode in new HW, provides a full checksum of rx frame. Covering bytes starting from eth protocol up to last byte in the received frame (frame_size - ETH_HLEN), as expected by the stack. Fixing up skb->csum by the driver is not required in such case. This fix is to avoid wrong checksum calculation in drivers which already support the new hardware with the new checksum mode.
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| @@ -749,7 +749,8 @@ struct mlx5_ifc_per_protocol_networking_offload_caps_bits { · 748 unmodified lines | ||
| 749 | 749 | u8 swp[0x1]; |
| 750 | 750 | u8 swp_csum[0x1]; |
| 751 | 751 | u8 swp_lso[0x1]; |
| 752 | − u8 reserved_at_23[0xd]; | |
| 752 | + u8 cqe_checksum_full[0x1]; | |
| 753 | + u8 reserved_at_24[0xc]; | |
| 753 | 754 | u8 max_vxlan_udp_ports[0x8]; |
| 754 | 755 | u8 reserved_at_38[0x6]; |
| 755 | 756 | u8 max_geneve_opt_len[0x1]; |