Serial: Add support for new devices: Exar's XR17V35x family of multi-port PCIe UARTs

Add support for new devices: Exar's XR17V35x family of multi-port PCIe UARTs.

Matt Schulte committed 13 years ago

Commit dc96efb1 parent ae8d8a15 files · +178 −1Browse files

Showing the changes to include/uapi (2 of 5 files). Show all

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@@ -49,7 +49,8 @@ · 48 unmodified lines
49	#define PORT_XR17D15X 21 /* Exar XR17D15x UART */	49	#define PORT_XR17D15X 21 /* Exar XR17D15x UART */
50	#define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */	50	#define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
51	#define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */	51	#define PORT_8250_CIR 23 /* CIR infrared port, has its own driver */
52	#define PORT_MAX_8250 23 /* max port ID */	52	#define PORT_XR17V35X 24 /* Exar XR17V35x UARTs */
		53	#define PORT_MAX_8250 24 /* max port ID */
53		54
54	/*	55	/*
55	* ARM specific type numbers. These are not currently guaranteed	56	* ARM specific type numbers. These are not currently guaranteed

@@ -367,5 +367,11 @@ · 366 unmodified lines
367	#define UART_OMAP_MDR1_CIR_MODE 0x06 /* CIR mode */	367	#define UART_OMAP_MDR1_CIR_MODE 0x06 /* CIR mode */
368	#define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */	368	#define UART_OMAP_MDR1_DISABLE 0x07 /* Disable (default state) */
369		369
		370	/*
		371	* These are definitions for the XR17V35X and XR17D15X
		372	*/
		373	#define UART_EXAR_SLEEP 0x8b /* Sleep mode */
		374	#define UART_EXAR_DVID 0x8d /* Device identification */
		375
370	#endif /* _LINUX_SERIAL_REG_H */	376	#endif /* _LINUX_SERIAL_REG_H */
371		377