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mtd: Add support for HyperBus memory devices

Cypress' HyperBus is Low Signal Count, High Performance Double Data Rate Bus interface between a host system master and one or more slave interfaces. HyperBus is used to connect microprocessor, microcontroller, or ASIC devices with random access NOR flash memory (called HyperFlash) or self refresh DRAM (called HyperRAM). Its a 8-bit data bus (DQ[7:0]) with Read-Write Data Strobe (RWDS) signal and either Single-ended clock(3.0V parts) or Differential clock (1.8V parts). It uses ChipSelect lines to select b/w multiple slaves. At bus level, it follows a separate protocol described in HyperBus specification[1]. HyperFlash follows CFI AMD/Fujitsu Extended Command Set (0x0002) similar to that of existing parallel NORs. Since HyperBus is x8 DDR bus, its equivalent to x16 parallel NOR flash with respect to bits per clock cycle. But HyperBus operates at >166MHz frequencies. HyperRAM provides direct random read/write access to flash memory array. But, HyperBus memory controllers seem to abstract implementation details and expose a simple MMIO interface to access connected flash. Add support for registering HyperFlash devices with MTD framework. MTD maps framework along with CFI chip support framework are used to support communicating with flash. Framework is modelled along the lines of spi-nor framework. HyperBus memory controller (HBMC) drivers calls hyperbus_register_device() to register a single HyperFlash device. HyperFlash core parses MMIO access information from DT, sets up the map_info struct, probes CFI flash and registers it with MTD framework. Some HBMC masters need calibration/training sequence[3] to be carried out, in order for DLL inside the controller to lock, by reading a known string/pattern. This is done by repeatedly reading CFI Query Identification String. Calibration needs to be done before trying to detect flash as part of CFI flash probe. HyperRAM is not supported at the moment. HyperBus specification can be found at[1] HyperFlash datasheet can be found at[2] [1] https://www.cypress.com/file/213356/download [2] https://www.cypress.com/file/213346/download [3] http://www.ti.com/lit/ug/spruid7b/spruid7b.pdf Table 12-5741. HyperFlash Access Sequence

Vignesh Raghavendra committed 7 years ago

Commit dcc7d341 parent 89ebf2b7 files · +261 −0Browse files

Showing the changes to include/linux/mtd (1 of 7 files). Show all

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include/linux/mtd/hyperbus.h+84−0
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1+/* SPDX-License-Identifier: GPL-2.0
2+ *
3+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
4+ */
5+
6+#ifndef __LINUX_MTD_HYPERBUS_H__
7+#define __LINUX_MTD_HYPERBUS_H__
8+
9+#include <linux/mtd/map.h>
10+
11+enum hyperbus_memtype {
12+ HYPERFLASH,
13+ HYPERRAM,
14+};
15+
16+/**
17+ * struct hyperbus_device - struct representing HyperBus slave device
18+ * @map: map_info struct for accessing MMIO HyperBus flash memory
19+ * @np: pointer to HyperBus slave device node
20+ * @mtd: pointer to MTD struct
21+ * @ctlr: pointer to HyperBus controller struct
22+ * @memtype: type of memory device: HyperFlash or HyperRAM
23+ */
24+
25+struct hyperbus_device {
26+ struct map_info map;
27+ struct device_node *np;
28+ struct mtd_info *mtd;
29+ struct hyperbus_ctlr *ctlr;
30+ enum hyperbus_memtype memtype;
31+};
32+
33+/**
34+ * struct hyperbus_ops - struct representing custom HyperBus operations
35+ * @read16: read 16 bit of data from flash in a single burst. Used to read
36+ * from non default address space, such as ID/CFI space
37+ * @write16: write 16 bit of data to flash in a single burst. Used to
38+ * send cmd to flash or write single 16 bit word at a time.
39+ * @copy_from: copy data from flash memory
40+ * @copy_to: copy data to flash memory
41+ * @calibrate: calibrate HyperBus controller
42+ */
43+
44+struct hyperbus_ops {
45+ u16 (*read16)(struct hyperbus_device *hbdev, unsigned long addr);
46+ void (*write16)(struct hyperbus_device *hbdev,
47+ unsigned long addr, u16 val);
48+ void (*copy_from)(struct hyperbus_device *hbdev, void *to,
49+ unsigned long from, ssize_t len);
50+ void (*copy_to)(struct hyperbus_device *dev, unsigned long to,
51+ const void *from, ssize_t len);
52+ int (*calibrate)(struct hyperbus_device *dev);
53+};
54+
55+/**
56+ * struct hyperbus_ctlr - struct representing HyperBus controller
57+ * @dev: pointer to HyperBus controller device
58+ * @calibrated: flag to indicate ctlr calibration sequence is complete
59+ * @ops: HyperBus controller ops
60+ */
61+struct hyperbus_ctlr {
62+ struct device *dev;
63+ bool calibrated;
64+
65+ const struct hyperbus_ops *ops;
66+};
67+
68+/**
69+ * hyperbus_register_device - probe and register a HyperBus slave memory device
70+ * @hbdev: hyperbus_device struct with dev, np and ctlr field populated
71+ *
72+ * Return: 0 for success, others for failure.
73+ */
74+int hyperbus_register_device(struct hyperbus_device *hbdev);
75+
76+/**
77+ * hyperbus_unregister_device - deregister HyperBus slave memory device
78+ * @hbdev: hyperbus_device to be unregistered
79+ *
80+ * Return: 0 for success, others for failure.
81+ */
82+int hyperbus_unregister_device(struct hyperbus_device *hbdev);
83+
84+#endif /* __LINUX_MTD_HYPERBUS_H__ */