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ASoC: Intel: cht_bsw_rt5672: Fix MCLK leak on platform_clock_control error

If snd_soc_dai_set_pll() or snd_soc_dai_set_sysclk() fail inside the EVENT_ON path, the function returns without calling clk_disable_unprepare() on ctx->mclk, which was already enabled earlier in the same code path. Add the missing clk_disable_unprepare() calls before returning the error.

Aravind Anilraj committed 7 months ago

Commit dced5a31 parent b022e5c1 file · +4 −0Browse files

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sound/soc/intel/boards/cht_bsw_rt5672.c+4−0
@@ -77,6 +77,8 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w, · 76 unmodified lines
7777 CHT_PLAT_CLK_3_HZ, 48000 * 512);
7878 if (ret < 0) {
7979 dev_err(card->dev, "can't set codec pll: %d\n", ret);
80+ if (ctx->mclk)
81+ clk_disable_unprepare(ctx->mclk);
8082 return ret;
8183 }
8284
@@ -85,6 +87,8 @@ static int platform_clock_control(struct snd_soc_dapm_widget *w, · 2 unmodified lines
8587 48000 * 512, SND_SOC_CLOCK_IN);
8688 if (ret < 0) {
8789 dev_err(card->dev, "can't set codec sysclk: %d\n", ret);
90+ if (ctx->mclk)
91+ clk_disable_unprepare(ctx->mclk);
8892 return ret;
8993 }
9094 } else {

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