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Merge tag 'for-linus-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml

Pull UML updates from Richard Weinberger: - Support for optimized routines based on the host CPU - Support for PCI via virtio - Various fixes * tag 'for-linus-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml: um: remove unneeded semicolon in um_arch.c um: Remove the repeated declaration um: fix error return code in winch_tramp() um: fix error return code in slip_open() um: Fix stack pointer alignment um: implement flush_cache_vmap/flush_cache_vunmap um: add a UML specific futex implementation um: enable the use of optimized xor routines in UML um: Add support for host CPU flags and alignment um: allow not setting extra rpaths in the linux binary um: virtio/pci: enable suspend/resume um: add PCI over virtio emulation driver um: irqs: allow invoking time-travel handler multiple times um: time-travel/signals: fix ndelay() in interrupt um: expose time-travel mode to userspace side um: export signals_enabled directly um: remove unused smp_sigio_handler() declaration lib: add iomem emulation (logic_iomem) um: allow disabling NO_IOMEM

Linus Torvalds committed 5 years ago

Commit dcf3c932 parents 7a400bf 1aee02053 files · +2211 −111Browse files

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include/uapi/linux/virtio_pcidev.h+64−0
@@ -0,0 +1,64 @@
1+/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
2+/*
3+ * Copyright (C) 2021 Intel Corporation
4+ * Author: Johannes Berg <johannes@sipsolutions.net>
5+ */
6+#ifndef _UAPI_LINUX_VIRTIO_PCIDEV_H
7+#define _UAPI_LINUX_VIRTIO_PCIDEV_H
8+#include <linux/types.h>
9+
10+/**
11+ * enum virtio_pcidev_ops - virtual PCI device operations
12+ * @VIRTIO_PCIDEV_OP_CFG_READ: read config space, size is 1, 2, 4 or 8;
13+ * the @data field should be filled in by the device (in little endian).
14+ * @VIRTIO_PCIDEV_OP_CFG_WRITE: write config space, size is 1, 2, 4 or 8;
15+ * the @data field contains the data to write (in little endian).
16+ * @VIRTIO_PCIDEV_OP_BAR_READ: read BAR mem/pio, size can be variable;
17+ * the @data field should be filled in by the device (in little endian).
18+ * @VIRTIO_PCIDEV_OP_BAR_WRITE: write BAR mem/pio, size can be variable;
19+ * the @data field contains the data to write (in little endian).
20+ * @VIRTIO_PCIDEV_OP_MMIO_MEMSET: memset MMIO, size is variable but
21+ * the @data field only has one byte (unlike @VIRTIO_PCIDEV_OP_MMIO_WRITE)
22+ * @VIRTIO_PCIDEV_OP_INT: legacy INTx# pin interrupt, the addr field is 1-4 for
23+ * the number
24+ * @VIRTIO_PCIDEV_OP_MSI: MSI(-X) interrupt, this message basically transports
25+ * the 16- or 32-bit write that would otherwise be done into memory,
26+ * analogous to the write messages (@VIRTIO_PCIDEV_OP_MMIO_WRITE) above
27+ * @VIRTIO_PCIDEV_OP_PME: Dummy message whose content is ignored (and should be
28+ * all zeroes) to signal the PME# pin.
29+ */
30+enum virtio_pcidev_ops {
31+ VIRTIO_PCIDEV_OP_RESERVED = 0,
32+ VIRTIO_PCIDEV_OP_CFG_READ,
33+ VIRTIO_PCIDEV_OP_CFG_WRITE,
34+ VIRTIO_PCIDEV_OP_MMIO_READ,
35+ VIRTIO_PCIDEV_OP_MMIO_WRITE,
36+ VIRTIO_PCIDEV_OP_MMIO_MEMSET,
37+ VIRTIO_PCIDEV_OP_INT,
38+ VIRTIO_PCIDEV_OP_MSI,
39+ VIRTIO_PCIDEV_OP_PME,
40+};
41+
42+/**
43+ * struct virtio_pcidev_msg - virtio PCI device operation
44+ * @op: the operation to do
45+ * @bar: the bar (only with BAR read/write messages)
46+ * @reserved: reserved
47+ * @size: the size of the read/write (in bytes)
48+ * @addr: the address to read/write
49+ * @data: the data, normally @size long, but just one byte for
50+ * %VIRTIO_PCIDEV_OP_MMIO_MEMSET
51+ *
52+ * Note: the fields are all in native (CPU) endian, however, the
53+ * @data values will often be in little endian (see the ops above.)
54+ */
55+struct virtio_pcidev_msg {
56+ __u8 op;
57+ __u8 bar;
58+ __u16 reserved;
59+ __u32 size;
60+ __u64 addr;
61+ __u8 data[];
62+};
63+
64+#endif /* _UAPI_LINUX_VIRTIO_PCIDEV_H */

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