The upper 32-bit PHC register is not latched when reading the lower 32-bit PHC register. Current code leaves a small window where we may not read correct higher order bits if the lower order bits are just about to wrap around. This patch fixes this by reading higher order bits twice and makes sure that final value is correctly paired with its lower 32 bits.
Unified · Split
| @@ -76,14 +76,23 @@ static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts, · 75 unmodified lines | |||
| 76 | u64 *ns) | 76 | u64 *ns) |
| 77 | { | 77 | { |
| 78 | struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; | 78 | struct bnxt_ptp_cfg *ptp = bp->ptp_cfg; |
| 79 | u32 high_before, high_now, low; | ||
| 79 | 80 | ||
| 80 | if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) | 81 | if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state)) |
| 81 | return -EIO; | 82 | return -EIO; |
| 82 | 83 | ||
| 84 | high_before = readl(bp->bar0 + ptp->refclk_mapped_regs[1]); | ||
| 83 | ptp_read_system_prets(sts); | 85 | ptp_read_system_prets(sts); |
| 84 | *ns = readl(bp->bar0 + ptp->refclk_mapped_regs[0]); | 86 | low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]); |
| 85 | ptp_read_system_postts(sts); | 87 | ptp_read_system_postts(sts); |
| 86 | *ns |= (u64)readl(bp->bar0 + ptp->refclk_mapped_regs[1]) << 32; | 88 | high_now = readl(bp->bar0 + ptp->refclk_mapped_regs[1]); |
| 89 | if (high_now != high_before) { | ||
| 90 | ptp_read_system_prets(sts); | ||
| 91 | low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]); | ||
| 92 | ptp_read_system_postts(sts); | ||
| 93 | } | ||
| 94 | *ns = ((u64)high_now << 32) | low; | ||
| 95 | |||
| 87 | return 0; | 96 | return 0; |
| 88 | } | 97 | } |
| 89 | 98 | ||