Remove unused IOCTL. Without any userspace using it we need to remove before we can be accepted upstream. At this point we are breaking the compatibility for good, so we don't need to break when we are in-tree. So, let's also use this breakage to sort out the IOCTL entries and fix all the small indentation and line issues.
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| @@ -103,28 +103,26 @@ struct xe_user_extension { · 102 unmodified lines | ||
| 103 | 103 | #define DRM_XE_VM_CREATE 0x03 |
| 104 | 104 | #define DRM_XE_VM_DESTROY 0x04 |
| 105 | 105 | #define DRM_XE_VM_BIND 0x05 |
| 106 | −#define DRM_XE_EXEC_QUEUE_CREATE 0x06 | |
| 107 | −#define DRM_XE_EXEC_QUEUE_DESTROY 0x07 | |
| 108 | −#define DRM_XE_EXEC 0x08 | |
| 106 | +#define DRM_XE_EXEC 0x06 | |
| 107 | +#define DRM_XE_EXEC_QUEUE_CREATE 0x07 | |
| 108 | +#define DRM_XE_EXEC_QUEUE_DESTROY 0x08 | |
| 109 | 109 | #define DRM_XE_EXEC_QUEUE_SET_PROPERTY 0x09 |
| 110 | −#define DRM_XE_WAIT_USER_FENCE 0x0a | |
| 111 | −#define DRM_XE_VM_MADVISE 0x0b | |
| 112 | −#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0c | |
| 113 | − | |
| 110 | +#define DRM_XE_EXEC_QUEUE_GET_PROPERTY 0x0a | |
| 111 | +#define DRM_XE_WAIT_USER_FENCE 0x0b | |
| 114 | 112 | /* Must be kept compact -- no holes */ |
| 113 | + | |
| 115 | 114 | #define DRM_IOCTL_XE_DEVICE_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_DEVICE_QUERY, struct drm_xe_device_query) |
| 116 | 115 | #define DRM_IOCTL_XE_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_CREATE, struct drm_xe_gem_create) |
| 117 | 116 | #define DRM_IOCTL_XE_GEM_MMAP_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_GEM_MMAP_OFFSET, struct drm_xe_gem_mmap_offset) |
| 118 | 117 | #define DRM_IOCTL_XE_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_CREATE, struct drm_xe_vm_create) |
| 119 | −#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy) | |
| 120 | −#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind) | |
| 118 | +#define DRM_IOCTL_XE_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_DESTROY, struct drm_xe_vm_destroy) | |
| 119 | +#define DRM_IOCTL_XE_VM_BIND DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_BIND, struct drm_xe_vm_bind) | |
| 120 | +#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec) | |
| 121 | 121 | #define DRM_IOCTL_XE_EXEC_QUEUE_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_CREATE, struct drm_xe_exec_queue_create) |
| 122 | +#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy) | |
| 123 | +#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property) | |
| 122 | 124 | #define DRM_IOCTL_XE_EXEC_QUEUE_GET_PROPERTY DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_GET_PROPERTY, struct drm_xe_exec_queue_get_property) |
| 123 | −#define DRM_IOCTL_XE_EXEC_QUEUE_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_DESTROY, struct drm_xe_exec_queue_destroy) | |
| 124 | −#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec) | |
| 125 | −#define DRM_IOCTL_XE_EXEC_QUEUE_SET_PROPERTY DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC_QUEUE_SET_PROPERTY, struct drm_xe_exec_queue_set_property) | |
| 126 | 125 | #define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence) |
| 127 | −#define DRM_IOCTL_XE_VM_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_VM_MADVISE, struct drm_xe_vm_madvise) | |
| 128 | 126 | |
| 129 | 127 | /** struct drm_xe_engine_class_instance - instance of an engine class */ |
| 130 | 128 | struct drm_xe_engine_class_instance { |
| @@ -978,74 +976,6 @@ struct drm_xe_wait_user_fence { · 847 unmodified lines | ||
| 978 | 976 | __u64 reserved[2]; |
| 979 | 977 | }; |
| 980 | 978 | |
| 981 | −struct drm_xe_vm_madvise { | |
| 982 | − /** @extensions: Pointer to the first extension struct, if any */ | |
| 983 | − __u64 extensions; | |
| 984 | − | |
| 985 | − /** @vm_id: The ID VM in which the VMA exists */ | |
| 986 | − __u32 vm_id; | |
| 987 | − | |
| 988 | − /** @pad: MBZ */ | |
| 989 | − __u32 pad; | |
| 990 | − | |
| 991 | − /** @range: Number of bytes in the VMA */ | |
| 992 | − __u64 range; | |
| 993 | − | |
| 994 | − /** @addr: Address of the VMA to operation on */ | |
| 995 | − __u64 addr; | |
| 996 | − | |
| 997 | − /* | |
| 998 | − * Setting the preferred location will trigger a migrate of the VMA | |
| 999 | − * backing store to new location if the backing store is already | |
| 1000 | − * allocated. | |
| 1001 | − * | |
| 1002 | − * For DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS usage, see enum | |
| 1003 | − * drm_xe_memory_class. | |
| 1004 | − */ | |
| 1005 | −#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS 0 | |
| 1006 | −#define DRM_XE_VM_MADVISE_PREFERRED_GT 1 | |
| 1007 | − /* | |
| 1008 | − * In this case lower 32 bits are mem class, upper 32 are GT. | |
| 1009 | − * Combination provides a single IOCTL plus migrate VMA to preferred | |
| 1010 | − * location. | |
| 1011 | − */ | |
| 1012 | −#define DRM_XE_VM_MADVISE_PREFERRED_MEM_CLASS_GT 2 | |
| 1013 | − /* | |
| 1014 | − * The CPU will do atomic memory operations to this VMA. Must be set on | |
| 1015 | − * some devices for atomics to behave correctly. | |
| 1016 | − */ | |
| 1017 | −#define DRM_XE_VM_MADVISE_CPU_ATOMIC 3 | |
| 1018 | − /* | |
| 1019 | − * The device will do atomic memory operations to this VMA. Must be set | |
| 1020 | − * on some devices for atomics to behave correctly. | |
| 1021 | − */ | |
| 1022 | −#define DRM_XE_VM_MADVISE_DEVICE_ATOMIC 4 | |
| 1023 | − /* | |
| 1024 | − * Priority WRT to eviction (moving from preferred memory location due | |
| 1025 | − * to memory pressure). The lower the priority, the more likely to be | |
| 1026 | − * evicted. | |
| 1027 | − */ | |
| 1028 | −#define DRM_XE_VM_MADVISE_PRIORITY 5 | |
| 1029 | −#define DRM_XE_VMA_PRIORITY_LOW 0 | |
| 1030 | − /* Default */ | |
| 1031 | −#define DRM_XE_VMA_PRIORITY_NORMAL 1 | |
| 1032 | − /* Must be user with elevated privileges */ | |
| 1033 | −#define DRM_XE_VMA_PRIORITY_HIGH 2 | |
| 1034 | − /* Pin the VMA in memory, must be user with elevated privileges */ | |
| 1035 | −#define DRM_XE_VM_MADVISE_PIN 6 | |
| 1036 | − /** @property: property to set */ | |
| 1037 | − __u32 property; | |
| 1038 | − | |
| 1039 | − /** @pad2: MBZ */ | |
| 1040 | − __u32 pad2; | |
| 1041 | − | |
| 1042 | − /** @value: property value */ | |
| 1043 | − __u64 value; | |
| 1044 | − | |
| 1045 | − /** @reserved: Reserved */ | |
| 1046 | − __u64 reserved[2]; | |
| 1047 | −}; | |
| 1048 | − | |
| 1049 | 979 | /** |
| 1050 | 980 | * DOC: XE PMU event config IDs |
| 1051 | 981 | * |