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net/mlx5: Use aligned variable while allocating ICM memory

The alignment value is part of the input structure, so use it and spare extra memory allocation when is not needed. Now, using the new ability when allocating icm for Direct-Rule insertion. Signed-off-by: Ariel Levkovich <lariel@mellanox.com> Signed-off-by: Erez Shitrit <erezsh@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>

Erez Shitrit committed 6 years ago

Commit dff8e2d1 parent 2b58f6d4 files · +38 −35Browse files

Unified · Split

4 files
  1. drivers/infiniband/hw/mlx5/main.c +1 −1
  2. drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c +10 −5
  3. drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c +25 −28
  4. include/linux/mlx5/driver.h +2 −1
drivers/infiniband/hw/mlx5/main.c+1−1
@@ -2444,7 +2444,7 @@ static int handle_alloc_dm_sw_icm(struct ib_ucontext *ctx, · 2443 unmodified lines
24442444 act_size = roundup_pow_of_two(act_size);
24452445
24462446 dm->size = act_size;
2447− err = mlx5_dm_sw_icm_alloc(dev, type, act_size,
2447+ err = mlx5_dm_sw_icm_alloc(dev, type, act_size, attr->alignment,
24482448 to_mucontext(ctx)->devx_uid, &dm->dev_addr,
24492449 &dm->icm_dm.obj_id);
24502450 if (err)
drivers/net/ethernet/mellanox/mlx5/core/lib/dm.c+10−5
@@ -90,7 +90,8 @@ void mlx5_dm_cleanup(struct mlx5_core_dev *dev) · 89 unmodified lines
9090 }
9191
9292 int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
93− u64 length, u16 uid, phys_addr_t *addr, u32 *obj_id)
93+ u64 length, u32 log_alignment, u16 uid,
94+ phys_addr_t *addr, u32 *obj_id)
9495 {
9596 u32 num_blocks = DIV_ROUND_UP_ULL(length, MLX5_SW_ICM_BLOCK_SIZE(dev));
9697 u32 out[MLX5_ST_SZ_DW(general_obj_out_cmd_hdr)] = {};
@@ -99,6 +100,7 @@ int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type, · 2 unmodified lines
99100 unsigned long *block_map;
100101 u64 icm_start_addr;
101102 u32 log_icm_size;
103+ u64 align_mask;
102104 u32 max_blocks;
103105 u64 block_idx;
104106 void *sw_icm;
@@ -136,11 +138,14 @@ int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type, · 31 unmodified lines
136138 return -EOPNOTSUPP;
137139
138140 max_blocks = BIT(log_icm_size - MLX5_LOG_SW_ICM_BLOCK_SIZE(dev));
141+
142+ if (log_alignment < MLX5_LOG_SW_ICM_BLOCK_SIZE(dev))
143+ log_alignment = MLX5_LOG_SW_ICM_BLOCK_SIZE(dev);
144+ align_mask = BIT(log_alignment - MLX5_LOG_SW_ICM_BLOCK_SIZE(dev)) - 1;
145+
139146 spin_lock(&dm->lock);
140− block_idx = bitmap_find_next_zero_area(block_map,
141− max_blocks,
142− 0,
143− num_blocks, 0);
147+ block_idx = bitmap_find_next_zero_area(block_map, max_blocks, 0,
148+ num_blocks, align_mask);
144149
145150 if (block_idx < max_blocks)
146151 bitmap_set(block_map,
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c+25−28
@@ -95,13 +95,12 @@ static int dr_icm_create_dm_mkey(struct mlx5_core_dev *mdev, · 94 unmodified lines
9595 }
9696
9797 static struct mlx5dr_icm_mr *
98−dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool,
99− enum mlx5_sw_icm_type type,
100− size_t align_base)
98+dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool)
10199 {
102100 struct mlx5_core_dev *mdev = pool->dmn->mdev;
101+ enum mlx5_sw_icm_type dm_type;
103102 struct mlx5dr_icm_mr *icm_mr;
104− size_t align_diff;
103+ size_t log_align_base;
105104 int err;
106105
107106 icm_mr = kvzalloc(sizeof(*icm_mr), GFP_KERNEL);
@@ -111,14 +110,22 @@ dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool, · 3 unmodified lines
111110 icm_mr->pool = pool;
112111 INIT_LIST_HEAD(&icm_mr->mr_list);
113112
114− icm_mr->dm.type = type;
115−
116− /* 2^log_biggest_table * entry-size * double-for-alignment */
117113 icm_mr->dm.length = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
118− pool->icm_type) * 2;
114+ pool->icm_type);
115+
116+ if (pool->icm_type == DR_ICM_TYPE_STE) {
117+ dm_type = MLX5_SW_ICM_TYPE_STEERING;
118+ log_align_base = ilog2(icm_mr->dm.length);
119+ } else {
120+ dm_type = MLX5_SW_ICM_TYPE_HEADER_MODIFY;
121+ /* Align base is 64B */
122+ log_align_base = ilog2(DR_ICM_MODIFY_HDR_ALIGN_BASE);
123+ }
124+ icm_mr->dm.type = dm_type;
119125
120− err = mlx5_dm_sw_icm_alloc(mdev, icm_mr->dm.type, icm_mr->dm.length, 0,
121− &icm_mr->dm.addr, &icm_mr->dm.obj_id);
126+ err = mlx5_dm_sw_icm_alloc(mdev, icm_mr->dm.type, icm_mr->dm.length,
127+ log_align_base, 0, &icm_mr->dm.addr,
128+ &icm_mr->dm.obj_id);
122129 if (err) {
123130 mlx5dr_err(pool->dmn, "Failed to allocate SW ICM memory, err (%d)\n", err);
124131 goto free_icm_mr;
@@ -137,15 +144,18 @@ dr_icm_pool_mr_create(struct mlx5dr_icm_pool *pool, · 12 unmodified lines
137144
138145 icm_mr->icm_start_addr = icm_mr->dm.addr;
139146
140− /* align_base is always a power of 2 */
141− align_diff = icm_mr->icm_start_addr & (align_base - 1);
142− if (align_diff)
143− icm_mr->used_length = align_base - align_diff;
147+ if (icm_mr->icm_start_addr & (BIT(log_align_base) - 1)) {
148+ mlx5dr_err(pool->dmn, "Failed to get Aligned ICM mem (asked: %zu)\n",
149+ log_align_base);
150+ goto free_mkey;
151+ }
144152
145153 list_add_tail(&icm_mr->mr_list, &pool->icm_mr_list);
146154
147155 return icm_mr;
148156
157+free_mkey:
158+ mlx5_core_destroy_mkey(mdev, &icm_mr->mkey);
149159 free_dm:
150160 mlx5_dm_sw_icm_dealloc(mdev, icm_mr->dm.type, icm_mr->dm.length, 0,
151161 icm_mr->dm.addr, icm_mr->dm.obj_id);
@@ -200,24 +210,11 @@ static int dr_icm_chunks_create(struct mlx5dr_icm_bucket *bucket) · 48 unmodified lines
200210 struct mlx5dr_icm_pool *pool = bucket->pool;
201211 struct mlx5dr_icm_mr *icm_mr = NULL;
202212 struct mlx5dr_icm_chunk *chunk;
203− enum mlx5_sw_icm_type dm_type;
204− size_t align_base;
205213 int i, err = 0;
206214
207215 mr_req_size = bucket->num_of_entries * bucket->entry_size;
208216 mr_row_size = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
209217 pool->icm_type);
210−
211− if (pool->icm_type == DR_ICM_TYPE_STE) {
212− dm_type = MLX5_SW_ICM_TYPE_STEERING;
213− /* Align base is the biggest chunk size / row size */
214− align_base = mr_row_size;
215− } else {
216− dm_type = MLX5_SW_ICM_TYPE_HEADER_MODIFY;
217− /* Align base is 64B */
218− align_base = DR_ICM_MODIFY_HDR_ALIGN_BASE;
219− }
220−
221218 mutex_lock(&pool->mr_mutex);
222219 if (!list_empty(&pool->icm_mr_list)) {
223220 icm_mr = list_last_entry(&pool->icm_mr_list,
@@ -228,7 +225,7 @@ static int dr_icm_chunks_create(struct mlx5dr_icm_bucket *bucket) · 4 unmodified lines
228225 }
229226
230227 if (!icm_mr || mr_free_size < mr_row_size) {
231− icm_mr = dr_icm_pool_mr_create(pool, dm_type, align_base);
228+ icm_mr = dr_icm_pool_mr_create(pool);
232229 if (!icm_mr) {
233230 err = -ENOMEM;
234231 goto out_err;
include/linux/mlx5/driver.h+2−1
@@ -1080,7 +1080,8 @@ int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev, · 1079 unmodified lines
10801080 struct mlx5_uars_page *mlx5_get_uars_page(struct mlx5_core_dev *mdev);
10811081 void mlx5_put_uars_page(struct mlx5_core_dev *mdev, struct mlx5_uars_page *up);
10821082 int mlx5_dm_sw_icm_alloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
1083− u64 length, u16 uid, phys_addr_t *addr, u32 *obj_id);
1083+ u64 length, u32 log_alignment, u16 uid,
1084+ phys_addr_t *addr, u32 *obj_id);
10841085 int mlx5_dm_sw_icm_dealloc(struct mlx5_core_dev *dev, enum mlx5_sw_icm_type type,
10851086 u64 length, u16 uid, phys_addr_t addr, u32 obj_id);
10861087