mtd: rawnand: Hide the chip->data_interface indirection

As a preparation for allocating the data interface structure dynamically (and rename it), let's avoid accessing chip->data_interface directly. Instead, we introduce a helper, nand_get_interface_config(), and use it to retrieve the current data interface configuration out of a nand_chip object.

Miquel Raynal committed 6 years ago

Commit e0160cd1 parent d1bfe1e8 files · +45 −28Browse files

Unified · Split

8 files

drivers/mtd/nand/raw/marvell_nand.c +6 −3
drivers/mtd/nand/raw/meson_nand.c +4 −4
drivers/mtd/nand/raw/nand_base.c +17 −17
drivers/mtd/nand/raw/nand_legacy.c +4 −1
drivers/mtd/nand/raw/nand_toshiba.c +1 −1
drivers/mtd/nand/raw/stm32_fmc2_nand.c +1 −1
drivers/mtd/nand/raw/tango_nand.c +1 −1
include/linux/mtd/rawnand.h +11 −0

drivers/mtd/nand/raw/marvell_nand.c+6−3

@@ -1096,6 +1096,8 @@ static int marvell_nfc_hw_ecc_hmg_do_write_page(struct nand_chip *chip, · 1095 unmodified lines
1096	1096	const u8 *oob_buf, bool raw,
1097	1097	int page)
1098	1098	{
	1099	+ const struct nand_sdr_timings *sdr =
	1100	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1099	1101	struct marvell_nand_chip *marvell_nand = to_marvell_nand(chip);
1100	1102	struct marvell_nfc *nfc = to_marvell_nfc(chip->controller);
1101	1103	const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout;
@@ -1141,7 +1143,7 @@ static int marvell_nfc_hw_ecc_hmg_do_write_page(struct nand_chip *chip, · 39 unmodified lines
1141	1143	return ret;
1142	1144
1143	1145	ret = marvell_nfc_wait_op(chip,
1144		− PSEC_TO_MSEC(chip->data_interface.timings.sdr.tPROG_max));
	1146	+ PSEC_TO_MSEC(sdr->tPROG_max));
1145	1147	return ret;
1146	1148	}
1147	1149
@@ -1562,6 +1564,8 @@ static int marvell_nfc_hw_ecc_bch_write_page(struct nand_chip *chip, · 414 unmodified lines
1562	1564	const u8 *buf,
1563	1565	int oob_required, int page)
1564	1566	{
	1567	+ const struct nand_sdr_timings *sdr =
	1568	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1565	1569	struct mtd_info *mtd = nand_to_mtd(chip);
1566	1570	const struct marvell_hw_ecc_layout *lt = to_marvell_nand(chip)->layout;
1567	1571	const u8 *data = buf;
@@ -1598,8 +1602,7 @@ static int marvell_nfc_hw_ecc_bch_write_page(struct nand_chip *chip, · 30 unmodified lines
1598	1602	marvell_nfc_wait_ndrun(chip);
1599	1603	}
1600	1604
1601		− ret = marvell_nfc_wait_op(chip,
1602		− PSEC_TO_MSEC(chip->data_interface.timings.sdr.tPROG_max));
	1605	+ ret = marvell_nfc_wait_op(chip, PSEC_TO_MSEC(sdr->tPROG_max));
1603	1606
1604	1607	marvell_nfc_disable_hw_ecc(chip);
1605	1608

drivers/mtd/nand/raw/meson_nand.c+4−4

@@ -573,10 +573,10 @@ static int meson_nfc_write_buf(struct nand_chip nand, u8 buf, int len) · 572 unmodified lines
573	573	static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand,
574	574	int page, bool in)
575	575	{
	576	+ const struct nand_sdr_timings *sdr =
	577	+ nand_get_sdr_timings(nand_get_interface_config(nand));
576	578	struct mtd_info *mtd = nand_to_mtd(nand);
577	579	struct meson_nfc *nfc = nand_get_controller_data(nand);
578		− const struct nand_sdr_timings *sdr =
579		− nand_get_sdr_timings(&nand->data_interface);
580	580	u32 *addrs = nfc->cmdfifo.rw.addrs;
581	581	u32 cs = nfc->param.chip_select;
582	582	u32 cmd0, cmd_num, row_start;
@@ -626,9 +626,9 @@ static int meson_nfc_rw_cmd_prepare_and_execute(struct nand_chip *nand, · 43 unmodified lines
626	626	static int meson_nfc_write_page_sub(struct nand_chip *nand,
627	627	int page, int raw)
628	628	{
629		− struct mtd_info *mtd = nand_to_mtd(nand);
630	629	const struct nand_sdr_timings *sdr =
631		− nand_get_sdr_timings(&nand->data_interface);
	630	+ nand_get_sdr_timings(nand_get_interface_config(nand));
	631	+ struct mtd_info *mtd = nand_to_mtd(nand);
632	632	struct meson_nfc_nand_chip *meson_chip = to_meson_nand(nand);
633	633	struct meson_nfc *nfc = nand_get_controller_data(nand);
634	634	int data_len, info_len;

drivers/mtd/nand/raw/nand_base.c+17−17

@@ -773,7 +773,7 @@ int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms) · 772 unmodified lines
773	773	return -ENOTSUPP;
774	774
775	775	/* Wait tWB before polling the STATUS reg. */
776		− timings = nand_get_sdr_timings(&chip->data_interface);
	776	+ timings = nand_get_sdr_timings(nand_get_interface_config(chip));
777	777	ndelay(PSEC_TO_NSEC(timings->tWB_max));
778	778
779	779	ret = nand_status_op(chip, NULL);
@@ -1119,9 +1119,9 @@ static int nand_sp_exec_read_page_op(struct nand_chip *chip, unsigned int page, · 339 unmodified lines
1119	1119	unsigned int offset_in_page, void *buf,
1120	1120	unsigned int len)
1121	1121	{
1122		− struct mtd_info *mtd = nand_to_mtd(chip);
1123	1122	const struct nand_sdr_timings *sdr =
1124		− nand_get_sdr_timings(&chip->data_interface);
	1123	+ nand_get_sdr_timings(nand_get_interface_config(chip));
	1124	+ struct mtd_info *mtd = nand_to_mtd(chip);
1125	1125	u8 addrs[4];
1126	1126	struct nand_op_instr instrs[] = {
1127	1127	NAND_OP_CMD(NAND_CMD_READ0, 0),
@@ -1163,7 +1163,7 @@ static int nand_lp_exec_read_page_op(struct nand_chip *chip, unsigned int page, · 35 unmodified lines
1163	1163	unsigned int len)
1164	1164	{
1165	1165	const struct nand_sdr_timings *sdr =
1166		− nand_get_sdr_timings(&chip->data_interface);
	1166	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1167	1167	u8 addrs[5];
1168	1168	struct nand_op_instr instrs[] = {
1169	1169	NAND_OP_CMD(NAND_CMD_READ0, 0),
@@ -1260,7 +1260,7 @@ int nand_read_param_page_op(struct nand_chip chip, u8 page, void buf, · 90 unmodified lines
1260	1260
1261	1261	if (nand_has_exec_op(chip)) {
1262	1262	const struct nand_sdr_timings *sdr =
1263		− nand_get_sdr_timings(&chip->data_interface);
	1263	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1264	1264	struct nand_op_instr instrs[] = {
1265	1265	NAND_OP_CMD(NAND_CMD_PARAM, 0),
1266	1266	NAND_OP_ADDR(1, &page, PSEC_TO_NSEC(sdr->tWB_max)),
@@ -1315,7 +1315,7 @@ int nand_change_read_column_op(struct nand_chip *chip, · 48 unmodified lines
1315	1315
1316	1316	if (nand_has_exec_op(chip)) {
1317	1317	const struct nand_sdr_timings *sdr =
1318		− nand_get_sdr_timings(&chip->data_interface);
	1318	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1319	1319	u8 addrs[2] = {};
1320	1320	struct nand_op_instr instrs[] = {
1321	1321	NAND_OP_CMD(NAND_CMD_RNDOUT, 0),
@@ -1389,9 +1389,9 @@ static int nand_exec_prog_page_op(struct nand_chip *chip, unsigned int page, · 67 unmodified lines
1389	1389	unsigned int offset_in_page, const void *buf,
1390	1390	unsigned int len, bool prog)
1391	1391	{
1392		− struct mtd_info *mtd = nand_to_mtd(chip);
1393	1392	const struct nand_sdr_timings *sdr =
1394		− nand_get_sdr_timings(&chip->data_interface);
	1393	+ nand_get_sdr_timings(nand_get_interface_config(chip));
	1394	+ struct mtd_info *mtd = nand_to_mtd(chip);
1395	1395	u8 addrs[5] = {};
1396	1396	struct nand_op_instr instrs[] = {
1397	1397	/*
@@ -1514,7 +1514,7 @@ int nand_prog_page_end_op(struct nand_chip *chip) · 116 unmodified lines
1514	1514
1515	1515	if (nand_has_exec_op(chip)) {
1516	1516	const struct nand_sdr_timings *sdr =
1517		− nand_get_sdr_timings(&chip->data_interface);
	1517	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1518	1518	struct nand_op_instr instrs[] = {
1519	1519	NAND_OP_CMD(NAND_CMD_PAGEPROG,
1520	1520	PSEC_TO_NSEC(sdr->tWB_max)),
@@ -1621,7 +1621,7 @@ int nand_change_write_column_op(struct nand_chip *chip, · 100 unmodified lines
1621	1621
1622	1622	if (nand_has_exec_op(chip)) {
1623	1623	const struct nand_sdr_timings *sdr =
1624		− nand_get_sdr_timings(&chip->data_interface);
	1624	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1625	1625	u8 addrs[2];
1626	1626	struct nand_op_instr instrs[] = {
1627	1627	NAND_OP_CMD(NAND_CMD_RNDIN, 0),
@@ -1676,7 +1676,7 @@ int nand_readid_op(struct nand_chip chip, u8 addr, void buf, · 48 unmodified lines
1676	1676
1677	1677	if (nand_has_exec_op(chip)) {
1678	1678	const struct nand_sdr_timings *sdr =
1679		− nand_get_sdr_timings(&chip->data_interface);
	1679	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1680	1680	struct nand_op_instr instrs[] = {
1681	1681	NAND_OP_CMD(NAND_CMD_READID, 0),
1682	1682	NAND_OP_ADDR(1, &addr, PSEC_TO_NSEC(sdr->tADL_min)),
@@ -1715,7 +1715,7 @@ int nand_status_op(struct nand_chip chip, u8 status) · 32 unmodified lines
1715	1715	{
1716	1716	if (nand_has_exec_op(chip)) {
1717	1717	const struct nand_sdr_timings *sdr =
1718		− nand_get_sdr_timings(&chip->data_interface);
	1718	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1719	1719	struct nand_op_instr instrs[] = {
1720	1720	NAND_OP_CMD(NAND_CMD_STATUS,
1721	1721	PSEC_TO_NSEC(sdr->tADL_min)),
@@ -1784,7 +1784,7 @@ int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock) · 62 unmodified lines
1784	1784
1785	1785	if (nand_has_exec_op(chip)) {
1786	1786	const struct nand_sdr_timings *sdr =
1787		− nand_get_sdr_timings(&chip->data_interface);
	1787	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1788	1788	u8 addrs[3] = { page, page >> 8, page >> 16 };
1789	1789	struct nand_op_instr instrs[] = {
1790	1790	NAND_OP_CMD(NAND_CMD_ERASE1, 0),
@@ -1843,7 +1843,7 @@ static int nand_set_features_op(struct nand_chip *chip, u8 feature, · 52 unmodified lines
1843	1843
1844	1844	if (nand_has_exec_op(chip)) {
1845	1845	const struct nand_sdr_timings *sdr =
1846		− nand_get_sdr_timings(&chip->data_interface);
	1846	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1847	1847	struct nand_op_instr instrs[] = {
1848	1848	NAND_OP_CMD(NAND_CMD_SET_FEATURES, 0),
1849	1849	NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tADL_min)),
@@ -1890,7 +1890,7 @@ static int nand_get_features_op(struct nand_chip *chip, u8 feature, · 40 unmodified lines
1890	1890
1891	1891	if (nand_has_exec_op(chip)) {
1892	1892	const struct nand_sdr_timings *sdr =
1893		− nand_get_sdr_timings(&chip->data_interface);
	1893	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1894	1894	struct nand_op_instr instrs[] = {
1895	1895	NAND_OP_CMD(NAND_CMD_GET_FEATURES, 0),
1896	1896	NAND_OP_ADDR(1, &feature, PSEC_TO_NSEC(sdr->tWB_max)),
@@ -1947,7 +1947,7 @@ int nand_reset_op(struct nand_chip *chip) · 50 unmodified lines
1947	1947	{
1948	1948	if (nand_has_exec_op(chip)) {
1949	1949	const struct nand_sdr_timings *sdr =
1950		− nand_get_sdr_timings(&chip->data_interface);
	1950	+ nand_get_sdr_timings(nand_get_interface_config(chip));
1951	1951	struct nand_op_instr instrs[] = {
1952	1952	NAND_OP_CMD(NAND_CMD_RESET, PSEC_TO_NSEC(sdr->tWB_max)),
1953	1953	NAND_OP_WAIT_RDY(PSEC_TO_MSEC(sdr->tRST_max), 0),
@@ -3226,7 +3226,7 @@ static void nand_wait_readrdy(struct nand_chip *chip) · 1272 unmodified lines
3226	3226	if (!(chip->options & NAND_NEED_READRDY))
3227	3227	return;
3228	3228
3229		− sdr = nand_get_sdr_timings(&chip->data_interface);
	3229	+ sdr = nand_get_sdr_timings(nand_get_interface_config(chip));
3230	3230	WARN_ON(nand_wait_rdy_op(chip, PSEC_TO_MSEC(sdr->tR_max), 0));
3231	3231	}
3232	3232

drivers/mtd/nand/raw/nand_legacy.c+4−1

@@ -354,6 +354,9 @@ static void nand_command(struct nand_chip *chip, unsigned int command, · 353 unmodified lines
354	354
355	355	static void nand_ccs_delay(struct nand_chip *chip)
356	356	{
	357	+ const struct nand_sdr_timings *sdr =
	358	+ nand_get_sdr_timings(nand_get_interface_config(chip));
	359	+
357	360	/*
358	361	* The controller already takes care of waiting for tCCS when the RNDIN
359	362	* or RNDOUT command is sent, return directly.
@@ -366,7 +369,7 @@ static void nand_ccs_delay(struct nand_chip *chip) · 6 unmodified lines
366	369	* (which should be safe for all NANDs).
367	370	*/
368	371	if (nand_controller_can_setup_data_iface(chip))
369		− ndelay(chip->data_interface.timings.sdr.tCCS_min / 1000);
	372	+ ndelay(sdr->tCCS_min / 1000);
370	373	else
371	374	ndelay(500);
372	375	}

drivers/mtd/nand/raw/nand_toshiba.c+1−1

@@ -33,7 +33,7 @@ static int toshiba_nand_benand_read_eccstatus_op(struct nand_chip *chip, · 32 unmodified lines
33	33
34	34	if (nand_has_exec_op(chip)) {
35	35	const struct nand_sdr_timings *sdr =
36		− nand_get_sdr_timings(&chip->data_interface);
	36	+ nand_get_sdr_timings(nand_get_interface_config(chip));
37	37	struct nand_op_instr instrs[] = {
38	38	NAND_OP_CMD(TOSHIBA_NAND_CMD_ECC_STATUS_READ,
39	39	PSEC_TO_NSEC(sdr->tADL_min)),

drivers/mtd/nand/raw/stm32_fmc2_nand.c+1−1

@@ -1308,7 +1308,7 @@ static int stm32_fmc2_nfc_waitrdy(struct nand_chip *chip, · 1307 unmodified lines
1308	1308	dev_warn(nfc->dev, "Waitrdy timeout\n");
1309	1309
1310	1310	/* Wait tWB before R/B# signal is low */
1311		− timings = nand_get_sdr_timings(&chip->data_interface);
	1311	+ timings = nand_get_sdr_timings(nand_get_interface_config(chip));
1312	1312	ndelay(PSEC_TO_NSEC(timings->tWB_max));
1313	1313
1314	1314	/* R/B# signal is low, clear high level flag */

drivers/mtd/nand/raw/tango_nand.c+1−1

@@ -336,7 +336,7 @@ static int tango_write_page(struct nand_chip chip, const u8 buf, · 335 unmodified lines
336	336	if (err)
337	337	return err;
338	338
339		− timings = nand_get_sdr_timings(&chip->data_interface);
	339	+ timings = nand_get_sdr_timings(nand_get_interface_config(chip));
340	340	err = tango_waitrdy(chip, PSEC_TO_MSEC(timings->tR_max));
341	341	if (err)
342	342	return err;

include/linux/mtd/rawnand.h+11−0

@@ -1203,6 +1203,17 @@ static inline struct device_node nand_get_flash_node(struct nand_chip chip) · 1202 unmodified lines
1203	1203	return mtd_get_of_node(nand_to_mtd(chip));
1204	1204	}
1205	1205
	1206	+/**
	1207	+ * nand_get_interface_config - Retrieve the current interface configuration
	1208	+ * of a NAND chip
	1209	+ * @chip: The NAND chip
	1210	+ */
	1211	+static inline const struct nand_data_interface *
	1212	+nand_get_interface_config(struct nand_chip *chip)
	1213	+{
	1214	+ return &chip->data_interface;
	1215	+}
	1216	+
1206	1217	/*
1207	1218	* A helper for defining older NAND chips where the second ID byte fully
1208	1219	* defined the chip, including the geometry (chip size, eraseblock size, page