Unified · Split
| @@ -128,3 +128,17 @@ Description: · 127 unmodified lines | ||
| 128 | 128 | preferred request size for workloads where sustained |
| 129 | 129 | throughput is desired. If no optimal I/O size is |
| 130 | 130 | reported this file contains 0. |
| 131 | + | |
| 132 | +What: /sys/block/<disk>/queue/nomerges | |
| 133 | +Date: January 2010 | |
| 134 | +Contact: | |
| 135 | +Description: | |
| 136 | + Standard I/O elevator operations include attempts to | |
| 137 | + merge contiguous I/Os. For known random I/O loads these | |
| 138 | + attempts will always fail and result in extra cycles | |
| 139 | + being spent in the kernel. This allows one to turn off | |
| 140 | + this behavior on one of two ways: When set to 1, complex | |
| 141 | + merge checks are disabled, but the simple one-shot merges | |
| 142 | + with the previous I/O request are enabled. When set to 2, | |
| 143 | + all merge tries are disabled. The default value is 0 - | |
| 144 | + which enables all types of merge tries. | |
| @@ -0,0 +1,79 @@ | ||
| 1 | +What: /sys/devices/.../power/ | |
| 2 | +Date: January 2009 | |
| 3 | +Contact: Rafael J. Wysocki <rjw@sisk.pl> | |
| 4 | +Description: | |
| 5 | + The /sys/devices/.../power directory contains attributes | |
| 6 | + allowing the user space to check and modify some power | |
| 7 | + management related properties of given device. | |
| 8 | + | |
| 9 | +What: /sys/devices/.../power/wakeup | |
| 10 | +Date: January 2009 | |
| 11 | +Contact: Rafael J. Wysocki <rjw@sisk.pl> | |
| 12 | +Description: | |
| 13 | + The /sys/devices/.../power/wakeup attribute allows the user | |
| 14 | + space to check if the device is enabled to wake up the system | |
| 15 | + from sleep states, such as the memory sleep state (suspend to | |
| 16 | + RAM) and hibernation (suspend to disk), and to enable or disable | |
| 17 | + it to do that as desired. | |
| 18 | + | |
| 19 | + Some devices support "wakeup" events, which are hardware signals | |
| 20 | + used to activate the system from a sleep state. Such devices | |
| 21 | + have one of the following two values for the sysfs power/wakeup | |
| 22 | + file: | |
| 23 | + | |
| 24 | + + "enabled\n" to issue the events; | |
| 25 | + + "disabled\n" not to do so; | |
| 26 | + | |
| 27 | + In that cases the user space can change the setting represented | |
| 28 | + by the contents of this file by writing either "enabled", or | |
| 29 | + "disabled" to it. | |
| 30 | + | |
| 31 | + For the devices that are not capable of generating system wakeup | |
| 32 | + events this file contains "\n". In that cases the user space | |
| 33 | + cannot modify the contents of this file and the device cannot be | |
| 34 | + enabled to wake up the system. | |
| 35 | + | |
| 36 | +What: /sys/devices/.../power/control | |
| 37 | +Date: January 2009 | |
| 38 | +Contact: Rafael J. Wysocki <rjw@sisk.pl> | |
| 39 | +Description: | |
| 40 | + The /sys/devices/.../power/control attribute allows the user | |
| 41 | + space to control the run-time power management of the device. | |
| 42 | + | |
| 43 | + All devices have one of the following two values for the | |
| 44 | + power/control file: | |
| 45 | + | |
| 46 | + + "auto\n" to allow the device to be power managed at run time; | |
| 47 | + + "on\n" to prevent the device from being power managed; | |
| 48 | + | |
| 49 | + The default for all devices is "auto", which means that they may | |
| 50 | + be subject to automatic power management, depending on their | |
| 51 | + drivers. Changing this attribute to "on" prevents the driver | |
| 52 | + from power managing the device at run time. Doing that while | |
| 53 | + the device is suspended causes it to be woken up. | |
| 54 | + | |
| 55 | +What: /sys/devices/.../power/async | |
| 56 | +Date: January 2009 | |
| 57 | +Contact: Rafael J. Wysocki <rjw@sisk.pl> | |
| 58 | +Description: | |
| 59 | + The /sys/devices/.../async attribute allows the user space to | |
| 60 | + enable or diasble the device's suspend and resume callbacks to | |
| 61 | + be executed asynchronously (ie. in separate threads, in parallel | |
| 62 | + with the main suspend/resume thread) during system-wide power | |
| 63 | + transitions (eg. suspend to RAM, hibernation). | |
| 64 | + | |
| 65 | + All devices have one of the following two values for the | |
| 66 | + power/async file: | |
| 67 | + | |
| 68 | + + "enabled\n" to permit the asynchronous suspend/resume; | |
| 69 | + + "disabled\n" to forbid it; | |
| 70 | + | |
| 71 | + The value of this attribute may be changed by writing either | |
| 72 | + "enabled", or "disabled" to it. | |
| 73 | + | |
| 74 | + It generally is unsafe to permit the asynchronous suspend/resume | |
| 75 | + of a device unless it is certain that all of the PM dependencies | |
| 76 | + of the device are known to the PM core. However, for some | |
| 77 | + devices this attribute is set to "enabled" by bus type code or | |
| 78 | + device drivers and in that cases it should be safe to leave the | |
| 79 | + default value. | |
| @@ -101,3 +101,16 @@ Description: · 100 unmodified lines | ||
| 101 | 101 | |
| 102 | 102 | CAUTION: Using it will cause your machine's real-time (CMOS) |
| 103 | 103 | clock to be set to a random invalid time after a resume. |
| 104 | + | |
| 105 | +What: /sys/power/pm_async | |
| 106 | +Date: January 2009 | |
| 107 | +Contact: Rafael J. Wysocki <rjw@sisk.pl> | |
| 108 | +Description: | |
| 109 | + The /sys/power/pm_async file controls the switch allowing the | |
| 110 | + user space to enable or disable asynchronous suspend and resume | |
| 111 | + of devices. If enabled, this feature will cause some device | |
| 112 | + drivers' suspend and resume callbacks to be executed in parallel | |
| 113 | + with each other and with the main suspend thread. It is enabled | |
| 114 | + if this file contains "1", which is the default. It may be | |
| 115 | + disabled by writing "0" to this file, in which case all devices | |
| 116 | + will be suspended and resumed synchronously. | |
| @@ -144,7 +144,7 @@ usage should require reading the full document. · 143 unmodified lines | ||
| 144 | 144 | this though and the recommendation to allow only a single |
| 145 | 145 | interface in STA mode at first! |
| 146 | 146 | </para> |
| 147 | −!Finclude/net/mac80211.h ieee80211_if_init_conf | |
| 147 | +!Finclude/net/mac80211.h ieee80211_vif | |
| 148 | 148 | </chapter> |
| 149 | 149 | |
| 150 | 150 | <chapter id="rx-tx"> |
| @@ -234,7 +234,6 @@ usage should require reading the full document. · 83 unmodified lines | ||
| 234 | 234 | <title>Multiple queues and QoS support</title> |
| 235 | 235 | <para>TBD</para> |
| 236 | 236 | !Finclude/net/mac80211.h ieee80211_tx_queue_params |
| 237 | −!Finclude/net/mac80211.h ieee80211_tx_queue_stats | |
| 238 | 237 | </chapter> |
| 239 | 238 | |
| 240 | 239 | <chapter id="AP"> |
| @@ -589,7 +589,8 @@ number of a video input as in &v4l2-input; field · 588 unmodified lines | ||
| 589 | 589 | <entry></entry> |
| 590 | 590 | <entry>A place holder for future extensions and custom |
| 591 | 591 | (driver defined) buffer types |
| 592 | −<constant>V4L2_BUF_TYPE_PRIVATE</constant> and higher.</entry> | |
| 592 | +<constant>V4L2_BUF_TYPE_PRIVATE</constant> and higher. Applications | |
| 593 | +should set this to 0.</entry> | |
| 593 | 594 | </row> |
| 594 | 595 | </tbody> |
| 595 | 596 | </tgroup> |
| @@ -54,12 +54,10 @@ to enqueue an empty (capturing) or filled (output) buffer in the · 53 unmodified lines | ||
| 54 | 54 | driver's incoming queue. The semantics depend on the selected I/O |
| 55 | 55 | method.</para> |
| 56 | 56 | |
| 57 | − <para>To enqueue a <link linkend="mmap">memory mapped</link> | |
| 58 | −buffer applications set the <structfield>type</structfield> field of a | |
| 59 | −&v4l2-buffer; to the same buffer type as previously &v4l2-format; | |
| 60 | −<structfield>type</structfield> and &v4l2-requestbuffers; | |
| 61 | −<structfield>type</structfield>, the <structfield>memory</structfield> | |
| 62 | −field to <constant>V4L2_MEMORY_MMAP</constant> and the | |
| 57 | + <para>To enqueue a buffer applications set the <structfield>type</structfield> | |
| 58 | +field of a &v4l2-buffer; to the same buffer type as was previously used | |
| 59 | +with &v4l2-format; <structfield>type</structfield> and &v4l2-requestbuffers; | |
| 60 | +<structfield>type</structfield>. Applications must also set the | |
| 63 | 61 | <structfield>index</structfield> field. Valid index numbers range from |
| 64 | 62 | zero to the number of buffers allocated with &VIDIOC-REQBUFS; |
| 65 | 63 | (&v4l2-requestbuffers; <structfield>count</structfield>) minus one. The |
| @@ -70,8 +68,19 @@ intended for output (<structfield>type</structfield> is · 4 unmodified lines | ||
| 70 | 68 | <constant>V4L2_BUF_TYPE_VBI_OUTPUT</constant>) applications must also |
| 71 | 69 | initialize the <structfield>bytesused</structfield>, |
| 72 | 70 | <structfield>field</structfield> and |
| 73 | −<structfield>timestamp</structfield> fields. See <xref | |
| 74 | − linkend="buffer" /> for details. When | |
| 71 | +<structfield>timestamp</structfield> fields, see <xref | |
| 72 | +linkend="buffer" /> for details. | |
| 73 | +Applications must also set <structfield>flags</structfield> to 0. If a driver | |
| 74 | +supports capturing from specific video inputs and you want to specify a video | |
| 75 | +input, then <structfield>flags</structfield> should be set to | |
| 76 | +<constant>V4L2_BUF_FLAG_INPUT</constant> and the field | |
| 77 | +<structfield>input</structfield> must be initialized to the desired input. | |
| 78 | +The <structfield>reserved</structfield> field must be set to 0. | |
| 79 | +</para> | |
| 80 | + | |
| 81 | + <para>To enqueue a <link linkend="mmap">memory mapped</link> | |
| 82 | +buffer applications set the <structfield>memory</structfield> | |
| 83 | +field to <constant>V4L2_MEMORY_MMAP</constant>. When | |
| 75 | 84 | <constant>VIDIOC_QBUF</constant> is called with a pointer to this |
| 76 | 85 | structure the driver sets the |
| 77 | 86 | <constant>V4L2_BUF_FLAG_MAPPED</constant> and |
| @@ -81,14 +90,10 @@ structure the driver sets the · 3 unmodified lines | ||
| 81 | 90 | &EINVAL;.</para> |
| 82 | 91 | |
| 83 | 92 | <para>To enqueue a <link linkend="userp">user pointer</link> |
| 84 | −buffer applications set the <structfield>type</structfield> field of a | |
| 85 | −&v4l2-buffer; to the same buffer type as previously &v4l2-format; | |
| 86 | −<structfield>type</structfield> and &v4l2-requestbuffers; | |
| 87 | −<structfield>type</structfield>, the <structfield>memory</structfield> | |
| 88 | −field to <constant>V4L2_MEMORY_USERPTR</constant> and the | |
| 93 | +buffer applications set the <structfield>memory</structfield> | |
| 94 | +field to <constant>V4L2_MEMORY_USERPTR</constant>, the | |
| 89 | 95 | <structfield>m.userptr</structfield> field to the address of the |
| 90 | −buffer and <structfield>length</structfield> to its size. When the | |
| 91 | −buffer is intended for output additional fields must be set as above. | |
| 96 | +buffer and <structfield>length</structfield> to its size. | |
| 92 | 97 | When <constant>VIDIOC_QBUF</constant> is called with a pointer to this |
| 93 | 98 | structure the driver sets the <constant>V4L2_BUF_FLAG_QUEUED</constant> |
| 94 | 99 | flag and clears the <constant>V4L2_BUF_FLAG_MAPPED</constant> and |
| @@ -96,13 +101,14 @@ flag and clears the <constant>V4L2_BUF_FLAG_MAPPED</constant> and · 1 unmodified line | ||
| 96 | 101 | <structfield>flags</structfield> field, or it returns an error code. |
| 97 | 102 | This ioctl locks the memory pages of the buffer in physical memory, |
| 98 | 103 | they cannot be swapped out to disk. Buffers remain locked until |
| 99 | −dequeued, until the &VIDIOC-STREAMOFF; or &VIDIOC-REQBUFS; ioctl are | |
| 104 | +dequeued, until the &VIDIOC-STREAMOFF; or &VIDIOC-REQBUFS; ioctl is | |
| 100 | 105 | called, or until the device is closed.</para> |
| 101 | 106 | |
| 102 | 107 | <para>Applications call the <constant>VIDIOC_DQBUF</constant> |
| 103 | 108 | ioctl to dequeue a filled (capturing) or displayed (output) buffer |
| 104 | 109 | from the driver's outgoing queue. They just set the |
| 105 | −<structfield>type</structfield> and <structfield>memory</structfield> | |
| 110 | +<structfield>type</structfield>, <structfield>memory</structfield> | |
| 111 | +and <structfield>reserved</structfield> | |
| 106 | 112 | fields of a &v4l2-buffer; as above, when <constant>VIDIOC_DQBUF</constant> |
| 107 | 113 | is called with a pointer to this structure the driver fills the |
| 108 | 114 | remaining fields or returns an error code.</para> |
| @@ -54,12 +54,13 @@ buffer at any time after buffers have been allocated with the · 53 unmodified lines | ||
| 54 | 54 | &VIDIOC-REQBUFS; ioctl.</para> |
| 55 | 55 | |
| 56 | 56 | <para>Applications set the <structfield>type</structfield> field |
| 57 | − of a &v4l2-buffer; to the same buffer type as previously | |
| 57 | + of a &v4l2-buffer; to the same buffer type as was previously used with | |
| 58 | 58 | &v4l2-format; <structfield>type</structfield> and &v4l2-requestbuffers; |
| 59 | 59 | <structfield>type</structfield>, and the <structfield>index</structfield> |
| 60 | 60 | field. Valid index numbers range from zero |
| 61 | 61 | to the number of buffers allocated with &VIDIOC-REQBUFS; |
| 62 | 62 | (&v4l2-requestbuffers; <structfield>count</structfield>) minus one. |
| 63 | +The <structfield>reserved</structfield> field should to set to 0. | |
| 63 | 64 | After calling <constant>VIDIOC_QUERYBUF</constant> with a pointer to |
| 64 | 65 | this structure drivers return an error code or fill the rest of |
| 65 | 66 | the structure.</para> |
| @@ -68,8 +69,8 @@ the structure.</para> · 2 unmodified lines | ||
| 68 | 69 | <constant>V4L2_BUF_FLAG_MAPPED</constant>, |
| 69 | 70 | <constant>V4L2_BUF_FLAG_QUEUED</constant> and |
| 70 | 71 | <constant>V4L2_BUF_FLAG_DONE</constant> flags will be valid. The |
| 71 | −<structfield>memory</structfield> field will be set to | |
| 72 | −<constant>V4L2_MEMORY_MMAP</constant>, the <structfield>m.offset</structfield> | |
| 72 | +<structfield>memory</structfield> field will be set to the current | |
| 73 | +I/O method, the <structfield>m.offset</structfield> | |
| 73 | 74 | contains the offset of the buffer from the start of the device memory, |
| 74 | 75 | the <structfield>length</structfield> field its size. The driver may |
| 75 | 76 | or may not set the remaining fields and flags, they are meaningless in |
| @@ -54,23 +54,23 @@ I/O. Memory mapped buffers are located in device memory and must be · 53 unmodified lines | ||
| 54 | 54 | allocated with this ioctl before they can be mapped into the |
| 55 | 55 | application's address space. User buffers are allocated by |
| 56 | 56 | applications themselves, and this ioctl is merely used to switch the |
| 57 | −driver into user pointer I/O mode.</para> | |
| 57 | +driver into user pointer I/O mode and to setup some internal structures.</para> | |
| 58 | 58 | |
| 59 | − <para>To allocate device buffers applications initialize three | |
| 60 | −fields of a <structname>v4l2_requestbuffers</structname> structure. | |
| 59 | + <para>To allocate device buffers applications initialize all | |
| 60 | +fields of the <structname>v4l2_requestbuffers</structname> structure. | |
| 61 | 61 | They set the <structfield>type</structfield> field to the respective |
| 62 | 62 | stream or buffer type, the <structfield>count</structfield> field to |
| 63 | −the desired number of buffers, and <structfield>memory</structfield> | |
| 64 | −must be set to <constant>V4L2_MEMORY_MMAP</constant>. When the ioctl | |
| 65 | −is called with a pointer to this structure the driver attempts to | |
| 66 | −allocate the requested number of buffers and stores the actual number | |
| 63 | +the desired number of buffers, <structfield>memory</structfield> | |
| 64 | +must be set to the requested I/O method and the reserved array | |
| 65 | +must be zeroed. When the ioctl | |
| 66 | +is called with a pointer to this structure the driver will attempt to allocate | |
| 67 | +the requested number of buffers and it stores the actual number | |
| 67 | 68 | allocated in the <structfield>count</structfield> field. It can be |
| 68 | 69 | smaller than the number requested, even zero, when the driver runs out |
| 69 | −of free memory. A larger number is possible when the driver requires | |
| 70 | −more buffers to function correctly.<footnote> | |
| 71 | − <para>For example video output requires at least two buffers, | |
| 70 | +of free memory. A larger number is also possible when the driver requires | |
| 71 | +more buffers to function correctly. For example video output requires at least two buffers, | |
| 72 | 72 | one displayed and one filled by the application.</para> |
| 73 | − </footnote> When memory mapping I/O is not supported the ioctl | |
| 73 | + <para>When the I/O method is not supported the ioctl | |
| 74 | 74 | returns an &EINVAL;.</para> |
| 75 | 75 | |
| 76 | 76 | <para>Applications can call <constant>VIDIOC_REQBUFS</constant> |
| @@ -81,14 +81,6 @@ in progress, an implicit &VIDIOC-STREAMOFF;. <!-- mhs: I see no · 4 unmodified lines | ||
| 81 | 81 | reason why munmap()ping one or even all buffers must imply |
| 82 | 82 | streamoff.--></para> |
| 83 | 83 | |
| 84 | − <para>To negotiate user pointer I/O, applications initialize only | |
| 85 | −the <structfield>type</structfield> field and set | |
| 86 | −<structfield>memory</structfield> to | |
| 87 | −<constant>V4L2_MEMORY_USERPTR</constant>. When the ioctl is called | |
| 88 | −with a pointer to this structure the driver prepares for user pointer | |
| 89 | −I/O, when this I/O method is not supported the ioctl returns an | |
| 90 | −&EINVAL;.</para> | |
| 91 | − | |
| 92 | 84 | <table pgwide="1" frame="none" id="v4l2-requestbuffers"> |
| 93 | 85 | <title>struct <structname>v4l2_requestbuffers</structname></title> |
| 94 | 86 | <tgroup cols="3"> |
| @@ -97,9 +89,7 @@ I/O, when this I/O method is not supported the ioctl returns an · 2 unmodified lines | ||
| 97 | 89 | <row> |
| 98 | 90 | <entry>__u32</entry> |
| 99 | 91 | <entry><structfield>count</structfield></entry> |
| 100 | − <entry>The number of buffers requested or granted. This | |
| 101 | −field is only used when <structfield>memory</structfield> is set to | |
| 102 | −<constant>V4L2_MEMORY_MMAP</constant>.</entry> | |
| 92 | + <entry>The number of buffers requested or granted.</entry> | |
| 103 | 93 | </row> |
| 104 | 94 | <row> |
| 105 | 95 | <entry>&v4l2-buf-type;</entry> |
| @@ -120,7 +110,7 @@ as the &v4l2-format; <structfield>type</structfield> field. See <xref · 14 unmodified lines | ||
| 120 | 110 | <entry><structfield>reserved</structfield>[2]</entry> |
| 121 | 111 | <entry>A place holder for future extensions and custom |
| 122 | 112 | (driver defined) buffer types <constant>V4L2_BUF_TYPE_PRIVATE</constant> and |
| 123 | −higher.</entry> | |
| 113 | +higher. This array should be zeroed by applications.</entry> | |
| 124 | 114 | </row> |
| 125 | 115 | </tbody> |
| 126 | 116 | </tgroup> |
| @@ -6,16 +6,22 @@ checklist.txt · 5 unmodified lines | ||
| 6 | 6 | - Review Checklist for RCU Patches |
| 7 | 7 | listRCU.txt |
| 8 | 8 | - Using RCU to Protect Read-Mostly Linked Lists |
| 9 | +lockdep.txt | |
| 10 | + - RCU and lockdep checking | |
| 9 | 11 | NMI-RCU.txt |
| 10 | 12 | - Using RCU to Protect Dynamic NMI Handlers |
| 13 | +rcubarrier.txt | |
| 14 | + - RCU and Unloadable Modules | |
| 15 | +rculist_nulls.txt | |
| 16 | + - RCU list primitives for use with SLAB_DESTROY_BY_RCU | |
| 11 | 17 | rcuref.txt |
| 12 | 18 | - Reference-count design for elements of lists/arrays protected by RCU |
| 13 | 19 | rcu.txt |
| 14 | 20 | - RCU Concepts |
| 15 | −rcubarrier.txt | |
| 16 | − - Unloading modules that use RCU callbacks | |
| 17 | 21 | RTFP.txt |
| 18 | 22 | - List of RCU papers (bibliography) going back to 1980. |
| 23 | +stallwarn.txt | |
| 24 | + - RCU CPU stall warnings (CONFIG_RCU_CPU_STALL_DETECTOR) | |
| 19 | 25 | torture.txt |
| 20 | 26 | - RCU Torture Test Operation (CONFIG_RCU_TORTURE_TEST) |
| 21 | 27 | trace.txt |
| @@ -25,10 +25,10 @@ to be referencing the data structure. However, this mechanism was not · 24 unmodified lines | ||
| 25 | 25 | optimized for modern computer systems, which is not surprising given |
| 26 | 26 | that these overheads were not so expensive in the mid-80s. Nonetheless, |
| 27 | 27 | passive serialization appears to be the first deferred-destruction |
| 28 | −mechanism to be used in production. Furthermore, the relevant patent has | |
| 29 | −lapsed, so this approach may be used in non-GPL software, if desired. | |
| 30 | −(In contrast, use of RCU is permitted only in software licensed under | |
| 31 | −GPL. Sorry!!!) | |
| 28 | +mechanism to be used in production. Furthermore, the relevant patent | |
| 29 | +has lapsed, so this approach may be used in non-GPL software, if desired. | |
| 30 | +(In contrast, implementation of RCU is permitted only in software licensed | |
| 31 | +under either GPL or LGPL. Sorry!!!) | |
| 32 | 32 | |
| 33 | 33 | In 1990, Pugh [Pugh90] noted that explicitly tracking which threads |
| 34 | 34 | were reading a given data structure permitted deferred free to operate |
| @@ -150,6 +150,18 @@ preemptible RCU [PaulEMcKenney2007PreemptibleRCU], and the three-part · 115 unmodified lines | ||
| 150 | 150 | LWN "What is RCU?" series [PaulEMcKenney2007WhatIsRCUFundamentally, |
| 151 | 151 | PaulEMcKenney2008WhatIsRCUUsage, and PaulEMcKenney2008WhatIsRCUAPI]. |
| 152 | 152 | |
| 153 | +2008 saw a journal paper on real-time RCU [DinakarGuniguntala2008IBMSysJ], | |
| 154 | +a history of how Linux changed RCU more than RCU changed Linux | |
| 155 | +[PaulEMcKenney2008RCUOSR], and a design overview of hierarchical RCU | |
| 156 | +[PaulEMcKenney2008HierarchicalRCU]. | |
| 157 | + | |
| 158 | +2009 introduced user-level RCU algorithms [PaulEMcKenney2009MaliciousURCU], | |
| 159 | +which Mathieu Desnoyers is now maintaining [MathieuDesnoyers2009URCU] | |
| 160 | +[MathieuDesnoyersPhD]. TINY_RCU [PaulEMcKenney2009BloatWatchRCU] made | |
| 161 | +its appearance, as did expedited RCU [PaulEMcKenney2009expeditedRCU]. | |
| 162 | +The problem of resizeable RCU-protected hash tables may now be on a path | |
| 163 | +to a solution [JoshTriplett2009RPHash]. | |
| 164 | + | |
| 153 | 165 | Bibtex Entries |
| 154 | 166 | |
| 155 | 167 | @article{Kung80 |
| @@ -730,6 +742,11 @@ Revised: · 574 unmodified lines | ||
| 730 | 742 | " |
| 731 | 743 | } |
| 732 | 744 | |
| 745 | +# | |
| 746 | +# "What is RCU?" LWN series. | |
| 747 | +# | |
| 748 | +######################################################################## | |
| 749 | + | |
| 733 | 750 | @article{DinakarGuniguntala2008IBMSysJ |
| 734 | 751 | ,author="D. Guniguntala and P. E. McKenney and J. Triplett and J. Walpole" |
| 735 | 752 | ,title="The read-copy-update mechanism for supporting real-time applications on shared-memory multiprocessor systems with {Linux}" |
| @@ -820,3 +837,39 @@ Revised: · 84 unmodified lines | ||
| 820 | 837 | Uniprocessor assumptions allow simplified RCU implementation. |
| 821 | 838 | " |
| 822 | 839 | } |
| 840 | + | |
| 841 | +@unpublished{PaulEMcKenney2009expeditedRCU | |
| 842 | +,Author="Paul E. McKenney" | |
| 843 | +,Title="[{PATCH} -tip 0/3] expedited 'big hammer' {RCU} grace periods" | |
| 844 | +,month="June" | |
| 845 | +,day="25" | |
| 846 | +,year="2009" | |
| 847 | +,note="Available: | |
| 848 | +\url{http://lkml.org/lkml/2009/6/25/306} | |
| 849 | +[Viewed August 16, 2009]" | |
| 850 | +,annotation=" | |
| 851 | + First posting of expedited RCU to be accepted into -tip. | |
| 852 | +" | |
| 853 | +} | |
| 854 | + | |
| 855 | +@unpublished{JoshTriplett2009RPHash | |
| 856 | +,Author="Josh Triplett" | |
| 857 | +,Title="Scalable concurrent hash tables via relativistic programming" | |
| 858 | +,month="September" | |
| 859 | +,year="2009" | |
| 860 | +,note="Linux Plumbers Conference presentation" | |
| 861 | +,annotation=" | |
| 862 | + RP fun with hash tables. | |
| 863 | +" | |
| 864 | +} | |
| 865 | + | |
| 866 | +@phdthesis{MathieuDesnoyersPhD | |
| 867 | +, title = "Low-Impact Operating System Tracing" | |
| 868 | +, author = "Mathieu Desnoyers" | |
| 869 | +, school = "Ecole Polytechnique de Montr\'{e}al" | |
| 870 | +, month = "December" | |
| 871 | +, year = 2009 | |
| 872 | +,note="Available: | |
| 873 | +\url{http://www.lttng.org/pub/thesis/desnoyers-dissertation-2009-12.pdf} | |
| 874 | +[Viewed December 9, 2009]" | |
| 875 | +} | |
| @@ -8,13 +8,12 @@ would cause. This list is based on experiences reviewing such patches · 7 unmodified lines | ||
| 8 | 8 | over a rather long period of time, but improvements are always welcome! |
| 9 | 9 | |
| 10 | 10 | 0. Is RCU being applied to a read-mostly situation? If the data |
| 11 | − structure is updated more than about 10% of the time, then | |
| 12 | − you should strongly consider some other approach, unless | |
| 13 | − detailed performance measurements show that RCU is nonetheless | |
| 14 | − the right tool for the job. Yes, you might think of RCU | |
| 15 | − as simply cutting overhead off of the readers and imposing it | |
| 16 | − on the writers. That is exactly why normal uses of RCU will | |
| 17 | − do much more reading than updating. | |
| 11 | + structure is updated more than about 10% of the time, then you | |
| 12 | + should strongly consider some other approach, unless detailed | |
| 13 | + performance measurements show that RCU is nonetheless the right | |
| 14 | + tool for the job. Yes, RCU does reduce read-side overhead by | |
| 15 | + increasing write-side overhead, which is exactly why normal uses | |
| 16 | + of RCU will do much more reading than updating. | |
| 18 | 17 | |
| 19 | 18 | Another exception is where performance is not an issue, and RCU |
| 20 | 19 | provides a simpler implementation. An example of this situation |
| @@ -35,13 +34,13 @@ over a rather long period of time, but improvements are always welcome! · 14 unmodified lines | ||
| 35 | 34 | |
| 36 | 35 | If you choose #b, be prepared to describe how you have handled |
| 37 | 36 | memory barriers on weakly ordered machines (pretty much all of |
| 38 | − them -- even x86 allows reads to be reordered), and be prepared | |
| 39 | − to explain why this added complexity is worthwhile. If you | |
| 40 | − choose #c, be prepared to explain how this single task does not | |
| 41 | − become a major bottleneck on big multiprocessor machines (for | |
| 42 | − example, if the task is updating information relating to itself | |
| 43 | − that other tasks can read, there by definition can be no | |
| 44 | − bottleneck). | |
| 37 | + them -- even x86 allows later loads to be reordered to precede | |
| 38 | + earlier stores), and be prepared to explain why this added | |
| 39 | + complexity is worthwhile. If you choose #c, be prepared to | |
| 40 | + explain how this single task does not become a major bottleneck on | |
| 41 | + big multiprocessor machines (for example, if the task is updating | |
| 42 | + information relating to itself that other tasks can read, there | |
| 43 | + by definition can be no bottleneck). | |
| 45 | 44 | |
| 46 | 45 | 2. Do the RCU read-side critical sections make proper use of |
| 47 | 46 | rcu_read_lock() and friends? These primitives are needed |
| @@ -51,8 +50,10 @@ over a rather long period of time, but improvements are always welcome! · 3 unmodified lines | ||
| 51 | 50 | actuarial risk of your kernel. |
| 52 | 51 | |
| 53 | 52 | As a rough rule of thumb, any dereference of an RCU-protected |
| 54 | − pointer must be covered by rcu_read_lock() or rcu_read_lock_bh() | |
| 55 | − or by the appropriate update-side lock. | |
| 53 | + pointer must be covered by rcu_read_lock(), rcu_read_lock_bh(), | |
| 54 | + rcu_read_lock_sched(), or by the appropriate update-side lock. | |
| 55 | + Disabling of preemption can serve as rcu_read_lock_sched(), but | |
| 56 | + is less readable. | |
| 56 | 57 | |
| 57 | 58 | 3. Does the update code tolerate concurrent accesses? |
| 58 | 59 | |
| @@ -62,25 +63,27 @@ over a rather long period of time, but improvements are always welcome! · 3 unmodified lines | ||
| 62 | 63 | of ways to handle this concurrency, depending on the situation: |
| 63 | 64 | |
| 64 | 65 | a. Use the RCU variants of the list and hlist update |
| 65 | − primitives to add, remove, and replace elements on an | |
| 66 | − RCU-protected list. Alternatively, use the RCU-protected | |
| 67 | − trees that have been added to the Linux kernel. | |
| 66 | + primitives to add, remove, and replace elements on | |
| 67 | + an RCU-protected list. Alternatively, use the other | |
| 68 | + RCU-protected data structures that have been added to | |
| 69 | + the Linux kernel. | |
| 68 | 70 | |
| 69 | 71 | This is almost always the best approach. |
| 70 | 72 | |
| 71 | 73 | b. Proceed as in (a) above, but also maintain per-element |
| 72 | 74 | locks (that are acquired by both readers and writers) |
| 73 | 75 | that guard per-element state. Of course, fields that |
| 74 | − the readers refrain from accessing can be guarded by the | |
| 75 | − update-side lock. | |
| 76 | + the readers refrain from accessing can be guarded by | |
| 77 | + some other lock acquired only by updaters, if desired. | |
| 76 | 78 | |
| 77 | 79 | This works quite well, also. |
| 78 | 80 | |
| 79 | 81 | c. Make updates appear atomic to readers. For example, |
| 80 | − pointer updates to properly aligned fields will appear | |
| 81 | − atomic, as will individual atomic primitives. Operations | |
| 82 | − performed under a lock and sequences of multiple atomic | |
| 83 | − primitives will -not- appear to be atomic. | |
| 82 | + pointer updates to properly aligned fields will | |
| 83 | + appear atomic, as will individual atomic primitives. | |
| 84 | + Sequences of perations performed under a lock will -not- | |
| 85 | + appear to be atomic to RCU readers, nor will sequences | |
| 86 | + of multiple atomic primitives. | |
| 84 | 87 | |
| 85 | 88 | This can work, but is starting to get a bit tricky. |
| 86 | 89 | |
| @@ -98,9 +101,9 @@ over a rather long period of time, but improvements are always welcome! · 11 unmodified lines | ||
| 98 | 101 | a new structure containing updated values. |
| 99 | 102 | |
| 100 | 103 | 4. Weakly ordered CPUs pose special challenges. Almost all CPUs |
| 101 | − are weakly ordered -- even i386 CPUs allow reads to be reordered. | |
| 102 | − RCU code must take all of the following measures to prevent | |
| 103 | − memory-corruption problems: | |
| 104 | + are weakly ordered -- even x86 CPUs allow later loads to be | |
| 105 | + reordered to precede earlier stores. RCU code must take all of | |
| 106 | + the following measures to prevent memory-corruption problems: | |
| 104 | 107 | |
| 105 | 108 | a. Readers must maintain proper ordering of their memory |
| 106 | 109 | accesses. The rcu_dereference() primitive ensures that |
| @@ -113,14 +116,25 @@ over a rather long period of time, but improvements are always welcome! · 6 unmodified lines | ||
| 113 | 116 | The rcu_dereference() primitive is also an excellent |
| 114 | 117 | documentation aid, letting the person reading the code |
| 115 | 118 | know exactly which pointers are protected by RCU. |
| 116 | − | |
| 117 | − The rcu_dereference() primitive is used by the various | |
| 118 | − "_rcu()" list-traversal primitives, such as the | |
| 119 | − list_for_each_entry_rcu(). Note that it is perfectly | |
| 120 | − legal (if redundant) for update-side code to use | |
| 121 | − rcu_dereference() and the "_rcu()" list-traversal | |
| 122 | − primitives. This is particularly useful in code | |
| 123 | − that is common to readers and updaters. | |
| 119 | + Please note that compilers can also reorder code, and | |
| 120 | + they are becoming increasingly aggressive about doing | |
| 121 | + just that. The rcu_dereference() primitive therefore | |
| 122 | + also prevents destructive compiler optimizations. | |
| 123 | + | |
| 124 | + The rcu_dereference() primitive is used by the | |
| 125 | + various "_rcu()" list-traversal primitives, such | |
| 126 | + as the list_for_each_entry_rcu(). Note that it is | |
| 127 | + perfectly legal (if redundant) for update-side code to | |
| 128 | + use rcu_dereference() and the "_rcu()" list-traversal | |
| 129 | + primitives. This is particularly useful in code that | |
| 130 | + is common to readers and updaters. However, lockdep | |
| 131 | + will complain if you access rcu_dereference() outside | |
| 132 | + of an RCU read-side critical section. See lockdep.txt | |
| 133 | + to learn what to do about this. | |
| 134 | + | |
| 135 | + Of course, neither rcu_dereference() nor the "_rcu()" | |
| 136 | + list-traversal primitives can substitute for a good | |
| 137 | + concurrency design coordinating among multiple updaters. | |
| 124 | 138 | |
| 125 | 139 | b. If the list macros are being used, the list_add_tail_rcu() |
| 126 | 140 | and list_add_rcu() primitives must be used in order |
| @@ -135,11 +149,14 @@ over a rather long period of time, but improvements are always welcome! · 8 unmodified lines | ||
| 135 | 149 | readers. Similarly, if the hlist macros are being used, |
| 136 | 150 | the hlist_del_rcu() primitive is required. |
| 137 | 151 | |
| 138 | − The list_replace_rcu() primitive may be used to | |
| 139 | − replace an old structure with a new one in an | |
| 140 | − RCU-protected list. | |
| 152 | + The list_replace_rcu() and hlist_replace_rcu() primitives | |
| 153 | + may be used to replace an old structure with a new one | |
| 154 | + in their respective types of RCU-protected lists. | |
| 155 | + | |
| 156 | + d. Rules similar to (4b) and (4c) apply to the "hlist_nulls" | |
| 157 | + type of RCU-protected linked lists. | |
| 141 | 158 | |
| 142 | − d. Updates must ensure that initialization of a given | |
| 159 | + e. Updates must ensure that initialization of a given | |
| 143 | 160 | structure happens before pointers to that structure are |
| 144 | 161 | publicized. Use the rcu_assign_pointer() primitive |
| 145 | 162 | when publicizing a pointer to a structure that can |
| @@ -151,16 +168,31 @@ over a rather long period of time, but improvements are always welcome! · 5 unmodified lines | ||
| 151 | 168 | it cannot block. |
| 152 | 169 | |
| 153 | 170 | 6. Since synchronize_rcu() can block, it cannot be called from |
| 154 | − any sort of irq context. Ditto for synchronize_sched() and | |
| 155 | − synchronize_srcu(). | |
| 156 | − | |
| 157 | −7. If the updater uses call_rcu(), then the corresponding readers | |
| 158 | − must use rcu_read_lock() and rcu_read_unlock(). If the updater | |
| 159 | − uses call_rcu_bh(), then the corresponding readers must use | |
| 160 | − rcu_read_lock_bh() and rcu_read_unlock_bh(). If the updater | |
| 161 | − uses call_rcu_sched(), then the corresponding readers must | |
| 162 | − disable preemption. Mixing things up will result in confusion | |
| 163 | − and broken kernels. | |
| 171 | + any sort of irq context. The same rule applies for | |
| 172 | + synchronize_rcu_bh(), synchronize_sched(), synchronize_srcu(), | |
| 173 | + synchronize_rcu_expedited(), synchronize_rcu_bh_expedited(), | |
| 174 | + synchronize_sched_expedite(), and synchronize_srcu_expedited(). | |
| 175 | + | |
| 176 | + The expedited forms of these primitives have the same semantics | |
| 177 | + as the non-expedited forms, but expediting is both expensive | |
| 178 | + and unfriendly to real-time workloads. Use of the expedited | |
| 179 | + primitives should be restricted to rare configuration-change | |
| 180 | + operations that would not normally be undertaken while a real-time | |
| 181 | + workload is running. | |
| 182 | + | |
| 183 | +7. If the updater uses call_rcu() or synchronize_rcu(), then the | |
| 184 | + corresponding readers must use rcu_read_lock() and | |
| 185 | + rcu_read_unlock(). If the updater uses call_rcu_bh() or | |
| 186 | + synchronize_rcu_bh(), then the corresponding readers must | |
| 187 | + use rcu_read_lock_bh() and rcu_read_unlock_bh(). If the | |
| 188 | + updater uses call_rcu_sched() or synchronize_sched(), then | |
| 189 | + the corresponding readers must disable preemption, possibly | |
| 190 | + by calling rcu_read_lock_sched() and rcu_read_unlock_sched(). | |
| 191 | + If the updater uses synchronize_srcu(), the the corresponding | |
| 192 | + readers must use srcu_read_lock() and srcu_read_unlock(), | |
| 193 | + and with the same srcu_struct. The rules for the expedited | |
| 194 | + primitives are the same as for their non-expedited counterparts. | |
| 195 | + Mixing things up will result in confusion and broken kernels. | |
| 164 | 196 | |
| 165 | 197 | One exception to this rule: rcu_read_lock() and rcu_read_unlock() |
| 166 | 198 | may be substituted for rcu_read_lock_bh() and rcu_read_unlock_bh() |
| @@ -212,6 +244,8 @@ over a rather long period of time, but improvements are always welcome! · 45 unmodified lines | ||
| 212 | 244 | e. Periodically invoke synchronize_rcu(), permitting a limited |
| 213 | 245 | number of updates per grace period. |
| 214 | 246 | |
| 247 | + The same cautions apply to call_rcu_bh() and call_rcu_sched(). | |
| 248 | + | |
| 215 | 249 | 9. All RCU list-traversal primitives, which include |
| 216 | 250 | rcu_dereference(), list_for_each_entry_rcu(), |
| 217 | 251 | list_for_each_continue_rcu(), and list_for_each_safe_rcu(), |
| @@ -219,7 +253,9 @@ over a rather long period of time, but improvements are always welcome! · 1 unmodified line | ||
| 219 | 253 | must be protected by appropriate update-side locks. RCU |
| 220 | 254 | read-side critical sections are delimited by rcu_read_lock() |
| 221 | 255 | and rcu_read_unlock(), or by similar primitives such as |
| 222 | − rcu_read_lock_bh() and rcu_read_unlock_bh(). | |
| 256 | + rcu_read_lock_bh() and rcu_read_unlock_bh(), in which case | |
| 257 | + the matching rcu_dereference() primitive must be used in order | |
| 258 | + to keep lockdep happy, in this case, rcu_dereference_bh(). | |
| 223 | 259 | |
| 224 | 260 | The reason that it is permissible to use RCU list-traversal |
| 225 | 261 | primitives when the update-side lock is held is that doing so |
| @@ -229,7 +265,8 @@ over a rather long period of time, but improvements are always welcome! · 3 unmodified lines | ||
| 229 | 265 | 10. Conversely, if you are in an RCU read-side critical section, |
| 230 | 266 | and you don't hold the appropriate update-side lock, you -must- |
| 231 | 267 | use the "_rcu()" variants of the list macros. Failing to do so |
| 232 | − will break Alpha and confuse people reading your code. | |
| 268 | + will break Alpha, cause aggressive compilers to generate bad code, | |
| 269 | + and confuse people trying to read your code. | |
| 233 | 270 | |
| 234 | 271 | 11. Note that synchronize_rcu() -only- guarantees to wait until |
| 235 | 272 | all currently executing rcu_read_lock()-protected RCU read-side |
| @@ -239,15 +276,21 @@ over a rather long period of time, but improvements are always welcome! · 3 unmodified lines | ||
| 239 | 276 | rcu_read_lock()-protected read-side critical sections, do -not- |
| 240 | 277 | use synchronize_rcu(). |
| 241 | 278 | |
| 242 | − If you want to wait for some of these other things, you might | |
| 243 | − instead need to use synchronize_irq() or synchronize_sched(). | |
| 279 | + Similarly, disabling preemption is not an acceptable substitute | |
| 280 | + for rcu_read_lock(). Code that attempts to use preemption | |
| 281 | + disabling where it should be using rcu_read_lock() will break | |
| 282 | + in real-time kernel builds. | |
| 283 | + | |
| 284 | + If you want to wait for interrupt handlers, NMI handlers, and | |
| 285 | + code under the influence of preempt_disable(), you instead | |
| 286 | + need to use synchronize_irq() or synchronize_sched(). | |
| 244 | 287 | |
| 245 | 288 | 12. Any lock acquired by an RCU callback must be acquired elsewhere |
| 246 | 289 | with softirq disabled, e.g., via spin_lock_irqsave(), |
| 247 | 290 | spin_lock_bh(), etc. Failing to disable irq on a given |
| 248 | − acquisition of that lock will result in deadlock as soon as the | |
| 249 | − RCU callback happens to interrupt that acquisition's critical | |
| 250 | − section. | |
| 291 | + acquisition of that lock will result in deadlock as soon as | |
| 292 | + the RCU softirq handler happens to run your RCU callback while | |
| 293 | + interrupting that acquisition's critical section. | |
| 251 | 294 | |
| 252 | 295 | 13. RCU callbacks can be and are executed in parallel. In many cases, |
| 253 | 296 | the callback code simply wrappers around kfree(), so that this |
| @@ -265,29 +308,30 @@ over a rather long period of time, but improvements are always welcome! · 11 unmodified lines | ||
| 265 | 308 | not the case, a self-spawning RCU callback would prevent the |
| 266 | 309 | victim CPU from ever going offline.) |
| 267 | 310 | |
| 268 | −14. SRCU (srcu_read_lock(), srcu_read_unlock(), and synchronize_srcu()) | |
| 269 | − may only be invoked from process context. Unlike other forms of | |
| 270 | − RCU, it -is- permissible to block in an SRCU read-side critical | |
| 271 | − section (demarked by srcu_read_lock() and srcu_read_unlock()), | |
| 272 | − hence the "SRCU": "sleepable RCU". Please note that if you | |
| 273 | − don't need to sleep in read-side critical sections, you should | |
| 274 | − be using RCU rather than SRCU, because RCU is almost always | |
| 275 | − faster and easier to use than is SRCU. | |
| 311 | +14. SRCU (srcu_read_lock(), srcu_read_unlock(), srcu_dereference(), | |
| 312 | + synchronize_srcu(), and synchronize_srcu_expedited()) may only | |
| 313 | + be invoked from process context. Unlike other forms of RCU, it | |
| 314 | + -is- permissible to block in an SRCU read-side critical section | |
| 315 | + (demarked by srcu_read_lock() and srcu_read_unlock()), hence the | |
| 316 | + "SRCU": "sleepable RCU". Please note that if you don't need | |
| 317 | + to sleep in read-side critical sections, you should be using | |
| 318 | + RCU rather than SRCU, because RCU is almost always faster and | |
| 319 | + easier to use than is SRCU. | |
| 276 | 320 | |
| 277 | 321 | Also unlike other forms of RCU, explicit initialization |
| 278 | 322 | and cleanup is required via init_srcu_struct() and |
| 279 | 323 | cleanup_srcu_struct(). These are passed a "struct srcu_struct" |
| 280 | 324 | that defines the scope of a given SRCU domain. Once initialized, |
| 281 | 325 | the srcu_struct is passed to srcu_read_lock(), srcu_read_unlock() |
| 282 | − and synchronize_srcu(). A given synchronize_srcu() waits only | |
| 283 | − for SRCU read-side critical sections governed by srcu_read_lock() | |
| 284 | − and srcu_read_unlock() calls that have been passd the same | |
| 285 | − srcu_struct. This property is what makes sleeping read-side | |
| 286 | − critical sections tolerable -- a given subsystem delays only | |
| 287 | − its own updates, not those of other subsystems using SRCU. | |
| 288 | − Therefore, SRCU is less prone to OOM the system than RCU would | |
| 289 | − be if RCU's read-side critical sections were permitted to | |
| 290 | − sleep. | |
| 326 | + synchronize_srcu(), and synchronize_srcu_expedited(). A given | |
| 327 | + synchronize_srcu() waits only for SRCU read-side critical | |
| 328 | + sections governed by srcu_read_lock() and srcu_read_unlock() | |
| 329 | + calls that have been passed the same srcu_struct. This property | |
| 330 | + is what makes sleeping read-side critical sections tolerable -- | |
| 331 | + a given subsystem delays only its own updates, not those of other | |
| 332 | + subsystems using SRCU. Therefore, SRCU is less prone to OOM the | |
| 333 | + system than RCU would be if RCU's read-side critical sections | |
| 334 | + were permitted to sleep. | |
| 291 | 335 | |
| 292 | 336 | The ability to sleep in read-side critical sections does not |
| 293 | 337 | come for free. First, corresponding srcu_read_lock() and |
| @@ -311,12 +355,12 @@ over a rather long period of time, but improvements are always welcome! · 17 unmodified lines | ||
| 311 | 355 | destructive operation, and -only- -then- invoke call_rcu(), |
| 312 | 356 | synchronize_rcu(), or friends. |
| 313 | 357 | |
| 314 | − Because these primitives only wait for pre-existing readers, | |
| 315 | − it is the caller's responsibility to guarantee safety to | |
| 316 | − any subsequent readers. | |
| 358 | + Because these primitives only wait for pre-existing readers, it | |
| 359 | + is the caller's responsibility to guarantee that any subsequent | |
| 360 | + readers will execute safely. | |
| 317 | 361 | |
| 318 | −16. The various RCU read-side primitives do -not- contain memory | |
| 319 | − barriers. The CPU (and in some cases, the compiler) is free | |
| 320 | − to reorder code into and out of RCU read-side critical sections. | |
| 321 | − It is the responsibility of the RCU update-side primitives to | |
| 322 | − deal with this. | |
| 362 | +16. The various RCU read-side primitives do -not- necessarily contain | |
| 363 | + memory barriers. You should therefore plan for the CPU | |
| 364 | + and the compiler to freely reorder code into and out of RCU | |
| 365 | + read-side critical sections. It is the responsibility of the | |
| 366 | + RCU update-side primitives to deal with this. | |
| @@ -0,0 +1,67 @@ | ||
| 1 | +RCU and lockdep checking | |
| 2 | + | |
| 3 | +All flavors of RCU have lockdep checking available, so that lockdep is | |
| 4 | +aware of when each task enters and leaves any flavor of RCU read-side | |
| 5 | +critical section. Each flavor of RCU is tracked separately (but note | |
| 6 | +that this is not the case in 2.6.32 and earlier). This allows lockdep's | |
| 7 | +tracking to include RCU state, which can sometimes help when debugging | |
| 8 | +deadlocks and the like. | |
| 9 | + | |
| 10 | +In addition, RCU provides the following primitives that check lockdep's | |
| 11 | +state: | |
| 12 | + | |
| 13 | + rcu_read_lock_held() for normal RCU. | |
| 14 | + rcu_read_lock_bh_held() for RCU-bh. | |
| 15 | + rcu_read_lock_sched_held() for RCU-sched. | |
| 16 | + srcu_read_lock_held() for SRCU. | |
| 17 | + | |
| 18 | +These functions are conservative, and will therefore return 1 if they | |
| 19 | +aren't certain (for example, if CONFIG_DEBUG_LOCK_ALLOC is not set). | |
| 20 | +This prevents things like WARN_ON(!rcu_read_lock_held()) from giving false | |
| 21 | +positives when lockdep is disabled. | |
| 22 | + | |
| 23 | +In addition, a separate kernel config parameter CONFIG_PROVE_RCU enables | |
| 24 | +checking of rcu_dereference() primitives: | |
| 25 | + | |
| 26 | + rcu_dereference(p): | |
| 27 | + Check for RCU read-side critical section. | |
| 28 | + rcu_dereference_bh(p): | |
| 29 | + Check for RCU-bh read-side critical section. | |
| 30 | + rcu_dereference_sched(p): | |
| 31 | + Check for RCU-sched read-side critical section. | |
| 32 | + srcu_dereference(p, sp): | |
| 33 | + Check for SRCU read-side critical section. | |
| 34 | + rcu_dereference_check(p, c): | |
| 35 | + Use explicit check expression "c". | |
| 36 | + rcu_dereference_raw(p) | |
| 37 | + Don't check. (Use sparingly, if at all.) | |
| 38 | + | |
| 39 | +The rcu_dereference_check() check expression can be any boolean | |
| 40 | +expression, but would normally include one of the rcu_read_lock_held() | |
| 41 | +family of functions and a lockdep expression. However, any boolean | |
| 42 | +expression can be used. For a moderately ornate example, consider | |
| 43 | +the following: | |
| 44 | + | |
| 45 | + file = rcu_dereference_check(fdt->fd[fd], | |
| 46 | + rcu_read_lock_held() || | |
| 47 | + lockdep_is_held(&files->file_lock) || | |
| 48 | + atomic_read(&files->count) == 1); | |
| 49 | + | |
| 50 | +This expression picks up the pointer "fdt->fd[fd]" in an RCU-safe manner, | |
| 51 | +and, if CONFIG_PROVE_RCU is configured, verifies that this expression | |
| 52 | +is used in: | |
| 53 | + | |
| 54 | +1. An RCU read-side critical section, or | |
| 55 | +2. with files->file_lock held, or | |
| 56 | +3. on an unshared files_struct. | |
| 57 | + | |
| 58 | +In case (1), the pointer is picked up in an RCU-safe manner for vanilla | |
| 59 | +RCU read-side critical sections, in case (2) the ->file_lock prevents | |
| 60 | +any change from taking place, and finally, in case (3) the current task | |
| 61 | +is the only task accessing the file_struct, again preventing any change | |
| 62 | +from taking place. | |
| 63 | + | |
| 64 | +There are currently only "universal" versions of the rcu_assign_pointer() | |
| 65 | +and RCU list-/tree-traversal primitives, which do not (yet) check for | |
| 66 | +being in an RCU read-side critical section. In the future, separate | |
| 67 | +versions of these primitives might be created. | |
| @@ -75,6 +75,8 @@ o I hear that RCU is patented? What is with that? · 74 unmodified lines | ||
| 75 | 75 | search for the string "Patent" in RTFP.txt to find them. |
| 76 | 76 | Of these, one was allowed to lapse by the assignee, and the |
| 77 | 77 | others have been contributed to the Linux kernel under GPL. |
| 78 | + There are now also LGPL implementations of user-level RCU | |
| 79 | + available (http://lttng.org/?q=node/18). | |
| 78 | 80 | |
| 79 | 81 | o I hear that RCU needs work in order to support realtime kernels? |
| 80 | 82 | |
| @@ -91,48 +93,4 @@ o Where can I find more information on RCU? · 10 unmodified lines | ||
| 91 | 93 | |
| 92 | 94 | o What are all these files in this directory? |
| 93 | 95 | |
| 94 | − | |
| 95 | − NMI-RCU.txt | |
| 96 | − | |
| 97 | − Describes how to use RCU to implement dynamic | |
| 98 | − NMI handlers, which can be revectored on the fly, | |
| 99 | − without rebooting. | |
| 100 | − | |
| 101 | − RTFP.txt | |
| 102 | − | |
| 103 | − List of RCU-related publications and web sites. | |
| 104 | − | |
| 105 | − UP.txt | |
| 106 | − | |
| 107 | − Discussion of RCU usage in UP kernels. | |
| 108 | − | |
| 109 | − arrayRCU.txt | |
| 110 | − | |
| 111 | − Describes how to use RCU to protect arrays, with | |
| 112 | − resizeable arrays whose elements reference other | |
| 113 | − data structures being of the most interest. | |
| 114 | − | |
| 115 | − checklist.txt | |
| 116 | − | |
| 117 | − Lists things to check for when inspecting code that | |
| 118 | − uses RCU. | |
| 119 | − | |
| 120 | − listRCU.txt | |
| 121 | − | |
| 122 | − Describes how to use RCU to protect linked lists. | |
| 123 | − This is the simplest and most common use of RCU | |
| 124 | − in the Linux kernel. | |
| 125 | − | |
| 126 | − rcu.txt | |
| 127 | − | |
| 128 | − You are reading it! | |
| 129 | − | |
| 130 | − rcuref.txt | |
| 131 | − | |
| 132 | − Describes how to combine use of reference counts | |
| 133 | − with RCU. | |
| 134 | − | |
| 135 | − whatisRCU.txt | |
| 136 | − | |
| 137 | − Overview of how the RCU implementation works. Along | |
| 138 | − the way, presents a conceptual view of RCU. | |
| 96 | + See 00-INDEX for the list. | |
| @@ -0,0 +1,58 @@ | ||
| 1 | +Using RCU's CPU Stall Detector | |
| 2 | + | |
| 3 | +The CONFIG_RCU_CPU_STALL_DETECTOR kernel config parameter enables | |
| 4 | +RCU's CPU stall detector, which detects conditions that unduly delay | |
| 5 | +RCU grace periods. The stall detector's idea of what constitutes | |
| 6 | +"unduly delayed" is controlled by a pair of C preprocessor macros: | |
| 7 | + | |
| 8 | +RCU_SECONDS_TILL_STALL_CHECK | |
| 9 | + | |
| 10 | + This macro defines the period of time that RCU will wait from | |
| 11 | + the beginning of a grace period until it issues an RCU CPU | |
| 12 | + stall warning. It is normally ten seconds. | |
| 13 | + | |
| 14 | +RCU_SECONDS_TILL_STALL_RECHECK | |
| 15 | + | |
| 16 | + This macro defines the period of time that RCU will wait after | |
| 17 | + issuing a stall warning until it issues another stall warning. | |
| 18 | + It is normally set to thirty seconds. | |
| 19 | + | |
| 20 | +RCU_STALL_RAT_DELAY | |
| 21 | + | |
| 22 | + The CPU stall detector tries to make the offending CPU rat on itself, | |
| 23 | + as this often gives better-quality stack traces. However, if | |
| 24 | + the offending CPU does not detect its own stall in the number | |
| 25 | + of jiffies specified by RCU_STALL_RAT_DELAY, then other CPUs will | |
| 26 | + complain. This is normally set to two jiffies. | |
| 27 | + | |
| 28 | +The following problems can result in an RCU CPU stall warning: | |
| 29 | + | |
| 30 | +o A CPU looping in an RCU read-side critical section. | |
| 31 | + | |
| 32 | +o A CPU looping with interrupts disabled. | |
| 33 | + | |
| 34 | +o A CPU looping with preemption disabled. | |
| 35 | + | |
| 36 | +o For !CONFIG_PREEMPT kernels, a CPU looping anywhere in the kernel | |
| 37 | + without invoking schedule(). | |
| 38 | + | |
| 39 | +o A bug in the RCU implementation. | |
| 40 | + | |
| 41 | +o A hardware failure. This is quite unlikely, but has occurred | |
| 42 | + at least once in a former life. A CPU failed in a running system, | |
| 43 | + becoming unresponsive, but not causing an immediate crash. | |
| 44 | + This resulted in a series of RCU CPU stall warnings, eventually | |
| 45 | + leading the realization that the CPU had failed. | |
| 46 | + | |
| 47 | +The RCU, RCU-sched, and RCU-bh implementations have CPU stall warning. | |
| 48 | +SRCU does not do so directly, but its calls to synchronize_sched() will | |
| 49 | +result in RCU-sched detecting any CPU stalls that might be occurring. | |
| 50 | + | |
| 51 | +To diagnose the cause of the stall, inspect the stack traces. The offending | |
| 52 | +function will usually be near the top of the stack. If you have a series | |
| 53 | +of stall warnings from a single extended stall, comparing the stack traces | |
| 54 | +can often help determine where the stall is occurring, which will usually | |
| 55 | +be in the function nearest the top of the stack that stays the same from | |
| 56 | +trace to trace. | |
| 57 | + | |
| 58 | +RCU bugs can often be debugged with the help of CONFIG_RCU_TRACE. | |
| @@ -30,6 +30,18 @@ MODULE PARAMETERS · 29 unmodified lines | ||
| 30 | 30 | |
| 31 | 31 | This module has the following parameters: |
| 32 | 32 | |
| 33 | +fqs_duration Duration (in microseconds) of artificially induced bursts | |
| 34 | + of force_quiescent_state() invocations. In RCU | |
| 35 | + implementations having force_quiescent_state(), these | |
| 36 | + bursts help force races between forcing a given grace | |
| 37 | + period and that grace period ending on its own. | |
| 38 | + | |
| 39 | +fqs_holdoff Holdoff time (in microseconds) between consecutive calls | |
| 40 | + to force_quiescent_state() within a burst. | |
| 41 | + | |
| 42 | +fqs_stutter Wait time (in seconds) between consecutive bursts | |
| 43 | + of calls to force_quiescent_state(). | |
| 44 | + | |
| 33 | 45 | irqreaders Says to invoke RCU readers from irq level. This is currently |
| 34 | 46 | done via timers. Defaults to "1" for variants of RCU that |
| 35 | 47 | permit this. (Or, more accurately, variants of RCU that do |
| @@ -323,14 +323,17 @@ used as follows: · 322 unmodified lines | ||
| 323 | 323 | Defer Protect |
| 324 | 324 | |
| 325 | 325 | a. synchronize_rcu() rcu_read_lock() / rcu_read_unlock() |
| 326 | − call_rcu() | |
| 326 | + call_rcu() rcu_dereference() | |
| 327 | 327 | |
| 328 | 328 | b. call_rcu_bh() rcu_read_lock_bh() / rcu_read_unlock_bh() |
| 329 | + rcu_dereference_bh() | |
| 329 | 330 | |
| 330 | −c. synchronize_sched() preempt_disable() / preempt_enable() | |
| 331 | +c. synchronize_sched() rcu_read_lock_sched() / rcu_read_unlock_sched() | |
| 332 | + preempt_disable() / preempt_enable() | |
| 331 | 333 | local_irq_save() / local_irq_restore() |
| 332 | 334 | hardirq enter / hardirq exit |
| 333 | 335 | NMI enter / NMI exit |
| 336 | + rcu_dereference_sched() | |
| 334 | 337 | |
| 335 | 338 | These three mechanisms are used as follows: |
| 336 | 339 | |
| @@ -780,9 +783,8 @@ Linux-kernel source code, but it helps to have a full list of the · 443 unmodified lines | ||
| 780 | 783 | APIs, since there does not appear to be a way to categorize them |
| 781 | 784 | in docbook. Here is the list, by category. |
| 782 | 785 | |
| 783 | −RCU pointer/list traversal: | |
| 786 | +RCU list traversal: | |
| 784 | 787 | |
| 785 | − rcu_dereference | |
| 786 | 788 | list_for_each_entry_rcu |
| 787 | 789 | hlist_for_each_entry_rcu |
| 788 | 790 | hlist_nulls_for_each_entry_rcu |
| @@ -808,7 +810,7 @@ RCU: Critical sections Grace period Barrier · 19 unmodified lines | ||
| 808 | 810 | |
| 809 | 811 | rcu_read_lock synchronize_net rcu_barrier |
| 810 | 812 | rcu_read_unlock synchronize_rcu |
| 811 | − synchronize_rcu_expedited | |
| 813 | + rcu_dereference synchronize_rcu_expedited | |
| 812 | 814 | call_rcu |
| 813 | 815 | |
| 814 | 816 | |
| @@ -816,7 +818,7 @@ bh: Critical sections Grace period Barrier · 1 unmodified line | ||
| 816 | 818 | |
| 817 | 819 | rcu_read_lock_bh call_rcu_bh rcu_barrier_bh |
| 818 | 820 | rcu_read_unlock_bh synchronize_rcu_bh |
| 819 | − synchronize_rcu_bh_expedited | |
| 821 | + rcu_dereference_bh synchronize_rcu_bh_expedited | |
| 820 | 822 | |
| 821 | 823 | |
| 822 | 824 | sched: Critical sections Grace period Barrier |
| @@ -825,12 +827,14 @@ sched: Critical sections Grace period Barrier · 2 unmodified lines | ||
| 825 | 827 | rcu_read_unlock_sched call_rcu_sched |
| 826 | 828 | [preempt_disable] synchronize_sched_expedited |
| 827 | 829 | [and friends] |
| 830 | + rcu_dereference_sched | |
| 828 | 831 | |
| 829 | 832 | |
| 830 | 833 | SRCU: Critical sections Grace period Barrier |
| 831 | 834 | |
| 832 | 835 | srcu_read_lock synchronize_srcu N/A |
| 833 | 836 | srcu_read_unlock synchronize_srcu_expedited |
| 837 | + srcu_dereference | |
| 834 | 838 | |
| 835 | 839 | SRCU: Initialization/cleanup |
| 836 | 840 | init_srcu_struct |
| @@ -59,7 +59,11 @@ PAGE_OFFSET high_memory-1 Kernel direct-mapped RAM region. · 58 unmodified lines | ||
| 59 | 59 | This maps the platforms RAM, and typically |
| 60 | 60 | maps all platform RAM in a 1:1 relationship. |
| 61 | 61 | |
| 62 | −TASK_SIZE PAGE_OFFSET-1 Kernel module space | |
| 62 | +PKMAP_BASE PAGE_OFFSET-1 Permanent kernel mappings | |
| 63 | + One way of mapping HIGHMEM pages into kernel | |
| 64 | + space. | |
| 65 | + | |
| 66 | +MODULES_VADDR MODULES_END-1 Kernel module space | |
| 63 | 67 | Kernel modules inserted via insmod are |
| 64 | 68 | placed here using dynamic mappings. |
| 65 | 69 | |
| @@ -25,11 +25,11 @@ size allowed by the hardware. · 24 unmodified lines | ||
| 25 | 25 | |
| 26 | 26 | nomerges (RW) |
| 27 | 27 | ------------- |
| 28 | −This enables the user to disable the lookup logic involved with IO merging | |
| 29 | −requests in the block layer. Merging may still occur through a direct | |
| 30 | −1-hit cache, since that comes for (almost) free. The IO scheduler will not | |
| 31 | −waste cycles doing tree/hash lookups for merges if nomerges is 1. Defaults | |
| 32 | −to 0, enabling all merges. | |
| 28 | +This enables the user to disable the lookup logic involved with IO | |
| 29 | +merging requests in the block layer. By default (0) all merges are | |
| 30 | +enabled. When set to 1 only simple one-hit merges will be tried. When | |
| 31 | +set to 2 no merge algorithms will be tried (including one-hit or more | |
| 32 | +complex tree/hash lookups). | |
| 33 | 33 | |
| 34 | 34 | nr_requests (RW) |
| 35 | 35 | ---------------- |
| @@ -88,12 +88,12 @@ changes occur: · 87 unmodified lines | ||
| 88 | 88 | This is used primarily during fault processing. |
| 89 | 89 | |
| 90 | 90 | 5) void update_mmu_cache(struct vm_area_struct *vma, |
| 91 | − unsigned long address, pte_t pte) | |
| 91 | + unsigned long address, pte_t *ptep) | |
| 92 | 92 | |
| 93 | 93 | At the end of every page fault, this routine is invoked to |
| 94 | 94 | tell the architecture specific code that a translation |
| 95 | − described by "pte" now exists at virtual address "address" | |
| 96 | − for address space "vma->vm_mm", in the software page tables. | |
| 95 | + now exists at virtual address "address" for address space | |
| 96 | + "vma->vm_mm", in the software page tables. | |
| 97 | 97 | |
| 98 | 98 | A port may use this information in any way it so chooses. |
| 99 | 99 | For example, it could use this event to pre-load TLB |
| @@ -377,3 +377,27 @@ maps this page at its virtual address. · 277 unmodified lines | ||
| 377 | 377 | All the functionality of flush_icache_page can be implemented in |
| 378 | 378 | flush_dcache_page and update_mmu_cache. In 2.7 the hope is to |
| 379 | 379 | remove this interface completely. |
| 380 | + | |
| 381 | +The final category of APIs is for I/O to deliberately aliased address | |
| 382 | +ranges inside the kernel. Such aliases are set up by use of the | |
| 383 | +vmap/vmalloc API. Since kernel I/O goes via physical pages, the I/O | |
| 384 | +subsystem assumes that the user mapping and kernel offset mapping are | |
| 385 | +the only aliases. This isn't true for vmap aliases, so anything in | |
| 386 | +the kernel trying to do I/O to vmap areas must manually manage | |
| 387 | +coherency. It must do this by flushing the vmap range before doing | |
| 388 | +I/O and invalidating it after the I/O returns. | |
| 389 | + | |
| 390 | + void flush_kernel_vmap_range(void *vaddr, int size) | |
| 391 | + flushes the kernel cache for a given virtual address range in | |
| 392 | + the vmap area. This is to make sure that any data the kernel | |
| 393 | + modified in the vmap range is made visible to the physical | |
| 394 | + page. The design is to make this area safe to perform I/O on. | |
| 395 | + Note that this API does *not* also flush the offset map alias | |
| 396 | + of the area. | |
| 397 | + | |
| 398 | + void invalidate_kernel_vmap_range(void *vaddr, int size) invalidates | |
| 399 | + the cache for a given virtual address range in the vmap area | |
| 400 | + which prevents the processor from making the cache stale by | |
| 401 | + speculatively reading data while the I/O was occurring to the | |
| 402 | + physical pages. This is only necessary for data reads into the | |
| 403 | + vmap area. | |
| @@ -69,7 +69,6 @@ av_permissions.h · 68 unmodified lines | ||
| 69 | 69 | bbootsect |
| 70 | 70 | bin2c |
| 71 | 71 | binkernel.spec |
| 72 | −binoffset | |
| 73 | 72 | bootsect |
| 74 | 73 | bounds.h |
| 75 | 74 | bsetup |
| @@ -26,7 +26,7 @@ use IO::Handle; · 25 unmodified lines | ||
| 26 | 26 | "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004", |
| 27 | 27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", |
| 28 | 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718", |
| 29 | − "af9015"); | |
| 29 | + "af9015", "ngene"); | |
| 30 | 30 | |
| 31 | 31 | # Check args |
| 32 | 32 | syntax() if (scalar(@ARGV) != 1); |
| @@ -39,7 +39,7 @@ for ($i=0; $i < scalar(@components); $i++) { · 6 unmodified lines | ||
| 39 | 39 | die $@ if $@; |
| 40 | 40 | print STDERR <<EOF; |
| 41 | 41 | Firmware(s) $outfile extracted successfully. |
| 42 | −Now copy it(they) to either /usr/lib/hotplug/firmware or /lib/firmware | |
| 42 | +Now copy it(them) to either /usr/lib/hotplug/firmware or /lib/firmware | |
| 43 | 43 | (depending on configuration of firmware hotplug). |
| 44 | 44 | EOF |
| 45 | 45 | exit(0); |
| @@ -549,6 +549,24 @@ sub af9015 { · 503 unmodified lines | ||
| 549 | 549 | close INFILE; |
| 550 | 550 | } |
| 551 | 551 | |
| 552 | +sub ngene { | |
| 553 | + my $url = "http://www.digitaldevices.de/download/"; | |
| 554 | + my $file1 = "ngene_15.fw"; | |
| 555 | + my $hash1 = "d798d5a757121174f0dbc5f2833c0c85"; | |
| 556 | + my $file2 = "ngene_17.fw"; | |
| 557 | + my $hash2 = "26b687136e127b8ac24b81e0eeafc20b"; | |
| 558 | + | |
| 559 | + checkstandard(); | |
| 560 | + | |
| 561 | + wgetfile($file1, $url . $file1); | |
| 562 | + verify($file1, $hash1); | |
| 563 | + | |
| 564 | + wgetfile($file2, $url . $file2); | |
| 565 | + verify($file2, $hash2); | |
| 566 | + | |
| 567 | + "$file1, $file2"; | |
| 568 | +} | |
| 569 | + | |
| 552 | 570 | # --------------------------------------------------------------- |
| 553 | 571 | # Utilities |
| 554 | 572 | |
| @@ -667,6 +685,7 @@ sub delzero{ · 112 unmodified lines | ||
| 667 | 685 | sub syntax() { |
| 668 | 686 | print STDERR "syntax: get_dvb_firmware <component>\n"; |
| 669 | 687 | print STDERR "Supported components:\n"; |
| 688 | + @components = sort @components; | |
| 670 | 689 | for($i=0; $i < scalar(@components); $i++) { |
| 671 | 690 | print STDERR "\t" . $components[$i] . "\n"; |
| 672 | 691 | } |
| @@ -6,21 +6,6 @@ be removed from this file. · 5 unmodified lines | ||
| 6 | 6 | |
| 7 | 7 | --------------------------- |
| 8 | 8 | |
| 9 | −What: USER_SCHED | |
| 10 | −When: 2.6.34 | |
| 11 | − | |
| 12 | −Why: USER_SCHED was implemented as a proof of concept for group scheduling. | |
| 13 | − The effect of USER_SCHED can already be achieved from userspace with | |
| 14 | − the help of libcgroup. The removal of USER_SCHED will also simplify | |
| 15 | − the scheduler code with the removal of one major ifdef. There are also | |
| 16 | − issues USER_SCHED has with USER_NS. A decision was taken not to fix | |
| 17 | − those and instead remove USER_SCHED. Also new group scheduling | |
| 18 | − features will not be implemented for USER_SCHED. | |
| 19 | − | |
| 20 | −Who: Dhaval Giani <dhaval@linux.vnet.ibm.com> | |
| 21 | − | |
| 22 | −--------------------------- | |
| 23 | − | |
| 24 | 9 | What: PRISM54 |
| 25 | 10 | When: 2.6.34 |
| 26 | 11 | |
| @@ -64,6 +49,17 @@ Who: Robin Getz <rgetz@blackfin.uclinux.org> & Matt Mackall <mpm@selenic.com> · 37 unmodified lines | ||
| 64 | 49 | |
| 65 | 50 | --------------------------- |
| 66 | 51 | |
| 52 | +What: Deprecated snapshot ioctls | |
| 53 | +When: 2.6.36 | |
| 54 | + | |
| 55 | +Why: The ioctls in kernel/power/user.c were marked as deprecated long time | |
| 56 | + ago. Now they notify users about that so that they need to replace | |
| 57 | + their userspace. After some more time, remove them completely. | |
| 58 | + | |
| 59 | +Who: Jiri Slaby <jirislaby@gmail.com> | |
| 60 | + | |
| 61 | +--------------------------- | |
| 62 | + | |
| 67 | 63 | What: The ieee80211_regdom module parameter |
| 68 | 64 | When: March 2010 / desktop catchup |
| 69 | 65 | |
| @@ -88,27 +84,6 @@ Who: Luis R. Rodriguez <lrodriguez@atheros.com> · 18 unmodified lines | ||
| 88 | 84 | |
| 89 | 85 | --------------------------- |
| 90 | 86 | |
| 91 | −What: CONFIG_WIRELESS_OLD_REGULATORY - old static regulatory information | |
| 92 | −When: March 2010 / desktop catchup | |
| 93 | − | |
| 94 | −Why: The old regulatory infrastructure has been replaced with a new one | |
| 95 | − which does not require statically defined regulatory domains. We do | |
| 96 | − not want to keep static regulatory domains in the kernel due to the | |
| 97 | − the dynamic nature of regulatory law and localization. We kept around | |
| 98 | − the old static definitions for the regulatory domains of: | |
| 99 | − | |
| 100 | − * US | |
| 101 | − * JP | |
| 102 | − * EU | |
| 103 | − | |
| 104 | − and used by default the US when CONFIG_WIRELESS_OLD_REGULATORY was | |
| 105 | − set. We will remove this option once the standard Linux desktop catches | |
| 106 | − up with the new userspace APIs we have implemented. | |
| 107 | − | |
| 108 | −Who: Luis R. Rodriguez <lrodriguez@atheros.com> | |
| 109 | − | |
| 110 | −--------------------------- | |
| 111 | − | |
| 112 | 87 | What: dev->power.power_state |
| 113 | 88 | When: July 2007 |
| 114 | 89 | Why: Broken design for runtime control over driver power states, confusing |
| @@ -542,3 +517,36 @@ Why: Duplicate functionality with the gspca_zc3xx driver, zc0301 only · 427 unmodified lines | ||
| 542 | 517 | sensors) wich are also supported by the gspca_zc3xx driver |
| 543 | 518 | (which supports 53 USB-ID's in total) |
| 544 | 519 | Who: Hans de Goede <hdegoede@redhat.com> |
| 520 | + | |
| 521 | +---------------------------- | |
| 522 | + | |
| 523 | +What: corgikbd, spitzkbd, tosakbd driver | |
| 524 | +When: 2.6.35 | |
| 525 | +Files: drivers/input/keyboard/{corgi,spitz,tosa}kbd.c | |
| 526 | +Why: We now have a generic GPIO based matrix keyboard driver that | |
| 527 | + are fully capable of handling all the keys on these devices. | |
| 528 | + The original drivers manipulate the GPIO registers directly | |
| 529 | + and so are difficult to maintain. | |
| 530 | +Who: Eric Miao <eric.y.miao@gmail.com> | |
| 531 | + | |
| 532 | +---------------------------- | |
| 533 | + | |
| 534 | +What: corgi_ssp and corgi_ts driver | |
| 535 | +When: 2.6.35 | |
| 536 | +Files: arch/arm/mach-pxa/corgi_ssp.c, drivers/input/touchscreen/corgi_ts.c | |
| 537 | +Why: The corgi touchscreen is now deprecated in favour of the generic | |
| 538 | + ads7846.c driver. The noise reduction technique used in corgi_ts.c, | |
| 539 | + that's to wait till vsync before ADC sampling, is also integrated into | |
| 540 | + ads7846 driver now. Provided that the original driver is not generic | |
| 541 | + and is difficult to maintain, it will be removed later. | |
| 542 | +Who: Eric Miao <eric.y.miao@gmail.com> | |
| 543 | + | |
| 544 | +---------------------------- | |
| 545 | + | |
| 546 | +What: capifs | |
| 547 | +When: February 2011 | |
| 548 | +Files: drivers/isdn/capi/capifs.* | |
| 549 | +Why: udev fully replaces this special file system that only contains CAPI | |
| 550 | + NCCI TTY device nodes. User space (pppdcapiplugin) works without | |
| 551 | + noticing the difference. | |
| 552 | +Who: Jan Kiszka <jan.kiszka@web.de> | |
| @@ -62,7 +62,8 @@ changes are : · 61 unmodified lines | ||
| 62 | 62 | 2. Insertion of a dentry into the hash table is done using |
| 63 | 63 | hlist_add_head_rcu() which take care of ordering the writes - the |
| 64 | 64 | writes to the dentry must be visible before the dentry is |
| 65 | − inserted. This works in conjunction with hlist_for_each_rcu() while | |
| 65 | + inserted. This works in conjunction with hlist_for_each_rcu(), | |
| 66 | + which has since been replaced by hlist_for_each_entry_rcu(), while | |
| 66 | 67 | walking the hash chain. The only requirement is that all |
| 67 | 68 | initialization to the dentry must be done before |
| 68 | 69 | hlist_add_head_rcu() since we don't have dcache_lock protection |
| @@ -1,5 +1,5 @@ | ||
| 1 | −Copyright (C) 2002-2008 Sentelic Corporation. | |
| 2 | −Last update: Oct-31-2008 | |
| 1 | +Copyright (C) 2002-2010 Sentelic Corporation. | |
| 2 | +Last update: Jan-13-2010 | |
| 3 | 3 | |
| 4 | 4 | ============================================================================== |
| 5 | 5 | * Finger Sensing Pad Intellimouse Mode(scrolling wheel, 4th and 5th buttons) |
| @@ -44,7 +44,7 @@ B) MSID 6: Horizontal and Vertical scrolling. · 38 unmodified lines | ||
| 44 | 44 | Packet 1 |
| 45 | 45 | Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 |
| 46 | 46 | BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| |
| 47 | − 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|l|r|u|d| | |
| 47 | + 1 |Y|X|y|x|1|M|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 | | |B|F|r|l|u|d| | |
| 48 | 48 | |---------------| |---------------| |---------------| |---------------| |
| 49 | 49 | |
| 50 | 50 | Byte 1: Bit7 => Y overflow |
| @@ -59,15 +59,15 @@ Byte 2: X Movement(9-bit 2's complement integers) · 8 unmodified lines | ||
| 59 | 59 | Byte 3: Y Movement(9-bit 2's complement integers) |
| 60 | 60 | Byte 4: Bit0 => the Vertical scrolling movement downward. |
| 61 | 61 | Bit1 => the Vertical scrolling movement upward. |
| 62 | − Bit2 => the Vertical scrolling movement rightward. | |
| 63 | − Bit3 => the Vertical scrolling movement leftward. | |
| 62 | + Bit2 => the Horizontal scrolling movement leftward. | |
| 63 | + Bit3 => the Horizontal scrolling movement rightward. | |
| 64 | 64 | Bit4 => 1 = 4th mouse button is pressed, Forward one page. |
| 65 | 65 | 0 = 4th mouse button is not pressed. |
| 66 | 66 | Bit5 => 1 = 5th mouse button is pressed, Backward one page. |
| 67 | 67 | 0 = 5th mouse button is not pressed. |
| 68 | 68 | |
| 69 | 69 | C) MSID 7: |
| 70 | −# FSP uses 2 packets(8 Bytes) data to represent Absolute Position | |
| 70 | +# FSP uses 2 packets (8 Bytes) to represent Absolute Position. | |
| 71 | 71 | so we have PACKET NUMBER to identify packets. |
| 72 | 72 | If PACKET NUMBER is 0, the packet is Packet 1. |
| 73 | 73 | If PACKET NUMBER is 1, the packet is Packet 2. |
| @@ -129,7 +129,7 @@ Byte 3: Message Type => 0x00 (Disabled) · 55 unmodified lines | ||
| 129 | 129 | Byte 4: Bit7~Bit0 => Don't Care |
| 130 | 130 | |
| 131 | 131 | ============================================================================== |
| 132 | −* Absolute position for STL3888-A0. | |
| 132 | +* Absolute position for STL3888-Ax. | |
| 133 | 133 | ============================================================================== |
| 134 | 134 | Packet 1 (ABSOLUTE POSITION) |
| 135 | 135 | Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 |
| @@ -179,14 +179,14 @@ Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) · 43 unmodified lines | ||
| 179 | 179 | Bit5~Bit4 => y2_g |
| 180 | 180 | Bit7~Bit6 => x2_g |
| 181 | 181 | |
| 182 | −Notify Packet for STL3888-A0 | |
| 182 | +Notify Packet for STL3888-Ax | |
| 183 | 183 | Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 |
| 184 | 184 | BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| |
| 185 | 185 | 1 |1|0|1|P|1|M|R|L| 2 |C|C|C|C|C|C|C|C| 3 |0|0|F|F|0|0|0|i| 4 |r|l|d|u|0|0|0|0| |
| 186 | 186 | |---------------| |---------------| |---------------| |---------------| |
| 187 | 187 | |
| 188 | 188 | Byte 1: Bit7~Bit6 => 00, Normal data packet |
| 189 | − => 01, Absolute coordination packet | |
| 189 | + => 01, Absolute coordinates packet | |
| 190 | 190 | => 10, Notify packet |
| 191 | 191 | Bit5 => 1 |
| 192 | 192 | Bit4 => when in absolute coordinates mode (valid when EN_PKT_GO is 1): |
| @@ -205,15 +205,106 @@ Byte 4: Bit7 => scroll right button · 12 unmodified lines | ||
| 205 | 205 | Bit6 => scroll left button |
| 206 | 206 | Bit5 => scroll down button |
| 207 | 207 | Bit4 => scroll up button |
| 208 | − * Note that if gesture and additional button (Bit4~Bit7) | |
| 209 | − happen at the same time, the button information will not | |
| 210 | − be sent. | |
| 208 | + * Note that if gesture and additional buttoni (Bit4~Bit7) | |
| 209 | + happen at the same time, the button information will not | |
| 210 | + be sent. | |
| 211 | + Bit3~Bit0 => Reserved | |
| 212 | + | |
| 213 | +Sample sequence of Multi-finger, Multi-coordinate mode: | |
| 214 | + | |
| 215 | + notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1, | |
| 216 | + abs pkt 2, ..., notify packet (valid bit == 0) | |
| 217 | + | |
| 218 | +============================================================================== | |
| 219 | +* Absolute position for STL3888-B0. | |
| 220 | +============================================================================== | |
| 221 | +Packet 1(ABSOLUTE POSITION) | |
| 222 | + Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 | |
| 223 | +BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| | |
| 224 | + 1 |0|1|V|F|1|0|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|u|d|X|X|Y|Y| | |
| 225 | + |---------------| |---------------| |---------------| |---------------| | |
| 226 | + | |
| 227 | +Byte 1: Bit7~Bit6 => 00, Normal data packet | |
| 228 | + => 01, Absolute coordinates packet | |
| 229 | + => 10, Notify packet | |
| 230 | + Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. | |
| 231 | + When both fingers are up, the last two reports have zero valid | |
| 232 | + bit. | |
| 233 | + Bit4 => finger up/down information. 1: finger down, 0: finger up. | |
| 234 | + Bit3 => 1 | |
| 235 | + Bit2 => finger index, 0 is the first finger, 1 is the second finger. | |
| 236 | + Bit1 => Right Button, 1 is pressed, 0 is not pressed. | |
| 237 | + Bit0 => Left Button, 1 is pressed, 0 is not pressed. | |
| 238 | +Byte 2: X coordinate (xpos[9:2]) | |
| 239 | +Byte 3: Y coordinate (ypos[9:2]) | |
| 240 | +Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) | |
| 241 | + Bit3~Bit2 => X coordinate (ypos[1:0]) | |
| 242 | + Bit4 => scroll down button | |
| 243 | + Bit5 => scroll up button | |
| 244 | + Bit6 => scroll left button | |
| 245 | + Bit7 => scroll right button | |
| 246 | + | |
| 247 | +Packet 2 (ABSOLUTE POSITION) | |
| 248 | + Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 | |
| 249 | +BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| | |
| 250 | + 1 |0|1|V|F|1|1|R|L| 2 |X|X|X|X|X|X|X|X| 3 |Y|Y|Y|Y|Y|Y|Y|Y| 4 |r|l|u|d|X|X|Y|Y| | |
| 251 | + |---------------| |---------------| |---------------| |---------------| | |
| 252 | + | |
| 253 | +Byte 1: Bit7~Bit6 => 00, Normal data packet | |
| 254 | + => 01, Absolute coordination packet | |
| 255 | + => 10, Notify packet | |
| 256 | + Bit5 => Valid bit, 0 means that the coordinate is invalid or finger up. | |
| 257 | + When both fingers are up, the last two reports have zero valid | |
| 258 | + bit. | |
| 259 | + Bit4 => finger up/down information. 1: finger down, 0: finger up. | |
| 260 | + Bit3 => 1 | |
| 261 | + Bit2 => finger index, 0 is the first finger, 1 is the second finger. | |
| 262 | + Bit1 => Right Button, 1 is pressed, 0 is not pressed. | |
| 263 | + Bit0 => Left Button, 1 is pressed, 0 is not pressed. | |
| 264 | +Byte 2: X coordinate (xpos[9:2]) | |
| 265 | +Byte 3: Y coordinate (ypos[9:2]) | |
| 266 | +Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0]) | |
| 267 | + Bit3~Bit2 => X coordinate (ypos[1:0]) | |
| 268 | + Bit4 => scroll down button | |
| 269 | + Bit5 => scroll up button | |
| 270 | + Bit6 => scroll left button | |
| 271 | + Bit7 => scroll right button | |
| 272 | + | |
| 273 | +Notify Packet for STL3888-B0 | |
| 274 | + Bit 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 7 6 5 4 3 2 1 0 | |
| 275 | +BYTE |---------------|BYTE |---------------|BYTE|---------------|BYTE|---------------| | |
| 276 | + 1 |1|0|1|P|1|M|R|L| 2 |C|C|C|C|C|C|C|C| 3 |0|0|F|F|0|0|0|i| 4 |r|l|u|d|0|0|0|0| | |
| 277 | + |---------------| |---------------| |---------------| |---------------| | |
| 278 | + | |
| 279 | +Byte 1: Bit7~Bit6 => 00, Normal data packet | |
| 280 | + => 01, Absolute coordination packet | |
| 281 | + => 10, Notify packet | |
| 282 | + Bit5 => 1 | |
| 283 | + Bit4 => when in absolute coordinate mode (valid when EN_PKT_GO is 1): | |
| 284 | + 0: left button is generated by the on-pad command | |
| 285 | + 1: left button is generated by the external button | |
| 286 | + Bit3 => 1 | |
| 287 | + Bit2 => Middle Button, 1 is pressed, 0 is not pressed. | |
| 288 | + Bit1 => Right Button, 1 is pressed, 0 is not pressed. | |
| 289 | + Bit0 => Left Button, 1 is pressed, 0 is not pressed. | |
| 290 | +Byte 2: Message Type => 0xB7 (Multi Finger, Multi Coordinate mode) | |
| 291 | +Byte 3: Bit7~Bit6 => Don't care | |
| 292 | + Bit5~Bit4 => Number of fingers | |
| 293 | + Bit3~Bit1 => Reserved | |
| 294 | + Bit0 => 1: enter gesture mode; 0: leaving gesture mode | |
| 295 | +Byte 4: Bit7 => scroll right button | |
| 296 | + Bit6 => scroll left button | |
| 297 | + Bit5 => scroll up button | |
| 298 | + Bit4 => scroll down button | |
| 299 | + * Note that if gesture and additional button(Bit4~Bit7) | |
| 300 | + happen at the same time, the button information will not | |
| 301 | + be sent. | |
| 211 | 302 | Bit3~Bit0 => Reserved |
| 212 | 303 | |
| 213 | 304 | Sample sequence of Multi-finger, Multi-coordinate mode: |
| 214 | 305 | |
| 215 | 306 | notify packet (valid bit == 1), abs pkt 1, abs pkt 2, abs pkt 1, |
| 216 | − abs pkt 2, ..., notify packet(valid bit == 0) | |
| 307 | + abs pkt 2, ..., notify packet (valid bit == 0) | |
| 217 | 308 | |
| 218 | 309 | ============================================================================== |
| 219 | 310 | * FSP Enable/Disable packet |
| @@ -409,7 +500,8 @@ offset width default r/w name · 189 unmodified lines | ||
| 409 | 500 | 0: read only, 1: read/write enable |
| 410 | 501 | (Note that following registers does not require clock gating being |
| 411 | 502 | enabled prior to write: 05 06 07 08 09 0c 0f 10 11 12 16 17 18 23 2e |
| 412 | − 40 41 42 43.) | |
| 503 | + 40 41 42 43. In addition to that, this bit must be 1 when gesture | |
| 504 | + mode is enabled) | |
| 413 | 505 | |
| 414 | 506 | 0x31 RW on-pad command detection |
| 415 | 507 | bit7 0 RW on-pad command left button down tag |
| @@ -463,6 +555,10 @@ offset width default r/w name · 47 unmodified lines | ||
| 463 | 555 | absolute coordinates; otherwise, host only receives packets with |
| 464 | 556 | relative coordinate.) |
| 465 | 557 | |
| 558 | + bit7 0 RW EN_PS2_F2: PS/2 gesture mode 2nd | |
| 559 | + finger packet enable | |
| 560 | + 0: disable, 1: enable | |
| 561 | + | |
| 466 | 562 | 0x43 RW on-pad control |
| 467 | 563 | bit0 0 RW on-pad control enable |
| 468 | 564 | 0: disable, 1: enable |
| @@ -149,10 +149,11 @@ char *(*procinfo)(struct capi_ctr *ctrlr) · 148 unmodified lines | ||
| 149 | 149 | pointer to a callback function returning the entry for the device in |
| 150 | 150 | the CAPI controller info table, /proc/capi/controller |
| 151 | 151 | |
| 152 | −read_proc_t *ctr_read_proc | |
| 153 | − pointer to the read_proc callback function for the device's proc file | |
| 154 | − system entry, /proc/capi/controllers/<n>; will be called with a | |
| 155 | − pointer to the device's capi_ctr structure as the last (data) argument | |
| 152 | +const struct file_operations *proc_fops | |
| 153 | + pointers to callback functions for the device's proc file | |
| 154 | + system entry, /proc/capi/controllers/<n>; pointer to the device's | |
| 155 | + capi_ctr structure is available from struct proc_dir_entry::data | |
| 156 | + which is available from struct inode. | |
| 156 | 157 | |
| 157 | 158 | Note: Callback functions except send_message() are never called in interrupt |
| 158 | 159 | context. |
| @@ -292,10 +292,10 @@ GigaSet 307x Device Driver · 291 unmodified lines | ||
| 292 | 292 | to /etc/modprobe.d/gigaset, /etc/modprobe.conf.local or a similar file. |
| 293 | 293 | |
| 294 | 294 | Problem: |
| 295 | − Your isdn script aborts with a message about isdnlog. | |
| 295 | + The isdnlog program emits error messages or just doesn't work. | |
| 296 | 296 | Solution: |
| 297 | − Try deactivating (or commenting out) isdnlog. This driver does not | |
| 298 | − support it. | |
| 297 | + Isdnlog supports only the HiSax driver. Do not attempt to use it with | |
| 298 | + other drivers such as Gigaset. | |
| 299 | 299 | |
| 300 | 300 | Problem: |
| 301 | 301 | You have two or more DECT data adapters (M101/M105) and only the |
| @@ -321,8 +321,8 @@ GigaSet 307x Device Driver · 19 unmodified lines | ||
| 321 | 321 | writing an appropriate value to /sys/module/gigaset/parameters/debug, e.g. |
| 322 | 322 | echo 0 > /sys/module/gigaset/parameters/debug |
| 323 | 323 | switches off debugging output completely, |
| 324 | − echo 0x10a020 > /sys/module/gigaset/parameters/debug | |
| 325 | − enables the standard set of debugging output messages. These values are | |
| 324 | + echo 0x302020 > /sys/module/gigaset/parameters/debug | |
| 325 | + enables a reasonable set of debugging output messages. These values are | |
| 326 | 326 | bit patterns where every bit controls a certain type of debugging output. |
| 327 | 327 | See the constants DEBUG_* in the source file gigaset.h for details. |
| 328 | 328 | |
| @@ -54,6 +54,7 @@ parameter is applicable: · 53 unmodified lines | ||
| 54 | 54 | IMA Integrity measurement architecture is enabled. |
| 55 | 55 | IOSCHED More than one I/O scheduler is enabled. |
| 56 | 56 | IP_PNP IP DHCP, BOOTP, or RARP is enabled. |
| 57 | + IPV6 IPv6 support is enabled. | |
| 57 | 58 | ISAPNP ISA PnP code is enabled. |
| 58 | 59 | ISDN Appropriate ISDN support is enabled. |
| 59 | 60 | JOY Appropriate joystick support is enabled. |
| @@ -356,6 +357,9 @@ and is between 256 and 4096 characters. It is defined in the file · 296 unmodified lines | ||
| 356 | 357 | Change the amount of debugging information output |
| 357 | 358 | when initialising the APIC and IO-APIC components. |
| 358 | 359 | |
| 360 | + autoconf= [IPV6] | |
| 361 | + See Documentation/networking/ipv6.txt. | |
| 362 | + | |
| 359 | 363 | show_lapic= [APIC,X86] Advanced Programmable Interrupt Controller |
| 360 | 364 | Limit apic dumping. The parameter defines the maximal |
| 361 | 365 | number of local apics being dumped. Also it is possible |
| @@ -638,6 +642,12 @@ and is between 256 and 4096 characters. It is defined in the file · 276 unmodified lines | ||
| 638 | 642 | See drivers/char/README.epca and |
| 639 | 643 | Documentation/serial/digiepca.txt. |
| 640 | 644 | |
| 645 | + disable= [IPV6] | |
| 646 | + See Documentation/networking/ipv6.txt. | |
| 647 | + | |
| 648 | + disable_ipv6= [IPV6] | |
| 649 | + See Documentation/networking/ipv6.txt. | |
| 650 | + | |
| 641 | 651 | disable_mtrr_cleanup [X86] |
| 642 | 652 | The kernel tries to adjust MTRR layout from continuous |
| 643 | 653 | to discrete, to make X server driver able to add WB |
| @@ -1738,6 +1748,9 @@ and is between 256 and 4096 characters. It is defined in the file · 1094 unmodified lines | ||
| 1738 | 1748 | nomfgpt [X86-32] Disable Multi-Function General Purpose |
| 1739 | 1749 | Timer usage (for AMD Geode machines). |
| 1740 | 1750 | |
| 1751 | + nopat [X86] Disable PAT (page attribute table extension of | |
| 1752 | + pagetables) support. | |
| 1753 | + | |
| 1741 | 1754 | norandmaps Don't use address space randomization. Equivalent to |
| 1742 | 1755 | echo 0 > /proc/sys/kernel/randomize_va_space |
| 1743 | 1756 | |
| @@ -1948,8 +1961,12 @@ and is between 256 and 4096 characters. It is defined in the file · 204 unmodified lines | ||
| 1948 | 1961 | IRQ routing is enabled. |
| 1949 | 1962 | noacpi [X86] Do not use ACPI for IRQ routing |
| 1950 | 1963 | or for PCI scanning. |
| 1951 | − use_crs [X86] Use _CRS for PCI resource | |
| 1952 | − allocation. | |
| 1964 | + use_crs [X86] Use PCI host bridge window information | |
| 1965 | + from ACPI. On BIOSes from 2008 or later, this | |
| 1966 | + is enabled by default. If you need to use this, | |
| 1967 | + please report a bug. | |
| 1968 | + nocrs [X86] Ignore PCI host bridge windows from ACPI. | |
| 1969 | + If you need to use this, please report a bug. | |
| 1953 | 1970 | routeirq Do IRQ routing for all PCI devices. |
| 1954 | 1971 | This is normally done in pci_enable_device(), |
| 1955 | 1972 | so this option is a temporary workaround |
| @@ -1998,6 +2015,14 @@ and is between 256 and 4096 characters. It is defined in the file · 42 unmodified lines | ||
| 1998 | 2015 | force Enable ASPM even on devices that claim not to support it. |
| 1999 | 2016 | WARNING: Forcing ASPM on may cause system lockups. |
| 2000 | 2017 | |
| 2018 | + pcie_pme= [PCIE,PM] Native PCIe PME signaling options: | |
| 2019 | + off Do not use native PCIe PME signaling. | |
| 2020 | + force Use native PCIe PME signaling even if the BIOS refuses | |
| 2021 | + to allow the kernel to control the relevant PCIe config | |
| 2022 | + registers. | |
| 2023 | + nomsi Do not use MSI for native PCIe PME signaling (this makes | |
| 2024 | + all PCIe root ports use INTx for everything). | |
| 2025 | + | |
| 2001 | 2026 | pcmv= [HW,PCMCIA] BadgePAD 4 |
| 2002 | 2027 | |
| 2003 | 2028 | pd. [PARIDE] |
| @@ -2703,6 +2728,13 @@ and is between 256 and 4096 characters. It is defined in the file · 699 unmodified lines | ||
| 2703 | 2728 | medium is write-protected). |
| 2704 | 2729 | Example: quirks=0419:aaf5:rl,0421:0433:rc |
| 2705 | 2730 | |
| 2731 | + userpte= | |
| 2732 | + [X86] Flags controlling user PTE allocations. | |
| 2733 | + | |
| 2734 | + nohigh = do not allocate PTE pages in | |
| 2735 | + HIGHMEM regardless of setting | |
| 2736 | + of CONFIG_HIGHPTE. | |
| 2737 | + | |
| 2706 | 2738 | vdso= [X86,SH] |
| 2707 | 2739 | vdso=2: enable compat VDSO (default with COMPAT_VDSO) |
| 2708 | 2740 | vdso=1: enable VDSO (default) |
| @@ -34,7 +34,6 @@ · 33 unmodified lines | ||
| 34 | 34 | #include <sys/uio.h> |
| 35 | 35 | #include <termios.h> |
| 36 | 36 | #include <getopt.h> |
| 37 | −#include <zlib.h> | |
| 38 | 37 | #include <assert.h> |
| 39 | 38 | #include <sched.h> |
| 40 | 39 | #include <limits.h> |
| @@ -58,8 +58,10 @@ DCCP_SOCKOPT_GET_CUR_MPS is read-only and retrieves the current maximum packet · 57 unmodified lines | ||
| 58 | 58 | size (application payload size) in bytes, see RFC 4340, section 14. |
| 59 | 59 | |
| 60 | 60 | DCCP_SOCKOPT_AVAILABLE_CCIDS is also read-only and returns the list of CCIDs |
| 61 | −supported by the endpoint (see include/linux/dccp.h for symbolic constants). | |
| 62 | −The caller needs to provide a sufficiently large (> 2) array of type uint8_t. | |
| 61 | +supported by the endpoint. The option value is an array of type uint8_t whose | |
| 62 | +size is passed as option length. The minimum array size is 4 elements, the | |
| 63 | +value returned in the optlen argument always reflects the true number of | |
| 64 | +built-in CCIDs. | |
| 63 | 65 | |
| 64 | 66 | DCCP_SOCKOPT_CCID is write-only and sets both the TX and RX CCIDs at the same |
| 65 | 67 | time, combining the operation of the next two socket options. This option is |
| @@ -487,6 +487,30 @@ tcp_dma_copybreak - INTEGER · 486 unmodified lines | ||
| 487 | 487 | and CONFIG_NET_DMA is enabled. |
| 488 | 488 | Default: 4096 |
| 489 | 489 | |
| 490 | +tcp_thin_linear_timeouts - BOOLEAN | |
| 491 | + Enable dynamic triggering of linear timeouts for thin streams. | |
| 492 | + If set, a check is performed upon retransmission by timeout to | |
| 493 | + determine if the stream is thin (less than 4 packets in flight). | |
| 494 | + As long as the stream is found to be thin, up to 6 linear | |
| 495 | + timeouts may be performed before exponential backoff mode is | |
| 496 | + initiated. This improves retransmission latency for | |
| 497 | + non-aggressive thin streams, often found to be time-dependent. | |
| 498 | + For more information on thin streams, see | |
| 499 | + Documentation/networking/tcp-thin.txt | |
| 500 | + Default: 0 | |
| 501 | + | |
| 502 | +tcp_thin_dupack - BOOLEAN | |
| 503 | + Enable dynamic triggering of retransmissions after one dupACK | |
| 504 | + for thin streams. If set, a check is performed upon reception | |
| 505 | + of a dupACK to determine if the stream is thin (less than 4 | |
| 506 | + packets in flight). As long as the stream is found to be thin, | |
| 507 | + data is retransmitted on the first received dupACK. This | |
| 508 | + improves retransmission latency for non-aggressive thin | |
| 509 | + streams, often found to be time-dependent. | |
| 510 | + For more information on thin streams, see | |
| 511 | + Documentation/networking/tcp-thin.txt | |
| 512 | + Default: 0 | |
| 513 | + | |
| 490 | 514 | UDP variables: |
| 491 | 515 | |
| 492 | 516 | udp_mem - vector of 3 INTEGERs: min, pressure, max |
| @@ -692,6 +716,25 @@ proxy_arp - BOOLEAN · 199 unmodified lines | ||
| 692 | 716 | conf/{all,interface}/proxy_arp is set to TRUE, |
| 693 | 717 | it will be disabled otherwise |
| 694 | 718 | |
| 719 | +proxy_arp_pvlan - BOOLEAN | |
| 720 | + Private VLAN proxy arp. | |
| 721 | + Basically allow proxy arp replies back to the same interface | |
| 722 | + (from which the ARP request/solicitation was received). | |
| 723 | + | |
| 724 | + This is done to support (ethernet) switch features, like RFC | |
| 725 | + 3069, where the individual ports are NOT allowed to | |
| 726 | + communicate with each other, but they are allowed to talk to | |
| 727 | + the upstream router. As described in RFC 3069, it is possible | |
| 728 | + to allow these hosts to communicate through the upstream | |
| 729 | + router by proxy_arp'ing. Don't need to be used together with | |
| 730 | + proxy_arp. | |
| 731 | + | |
| 732 | + This technology is known by different names: | |
| 733 | + In RFC 3069 it is called VLAN Aggregation. | |
| 734 | + Cisco and Allied Telesyn call it Private VLAN. | |
| 735 | + Hewlett-Packard call it Source-Port filtering or port-isolation. | |
| 736 | + Ericsson call it MAC-Forced Forwarding (RFC Draft). | |
| 737 | + | |
| 695 | 738 | shared_media - BOOLEAN |
| 696 | 739 | Send(router) or accept(host) RFC1620 shared media redirects. |
| 697 | 740 | Overrides ip_secure_redirects. |
| @@ -833,9 +876,18 @@ arp_notify - BOOLEAN · 135 unmodified lines | ||
| 833 | 876 | or hardware address changes. |
| 834 | 877 | |
| 835 | 878 | arp_accept - BOOLEAN |
| 836 | − Define behavior when gratuitous arp replies are received: | |
| 837 | − 0 - drop gratuitous arp frames | |
| 838 | − 1 - accept gratuitous arp frames | |
| 879 | + Define behavior for gratuitous ARP frames who's IP is not | |
| 880 | + already present in the ARP table: | |
| 881 | + 0 - don't create new entries in the ARP table | |
| 882 | + 1 - create new entries in the ARP table | |
| 883 | + | |
| 884 | + Both replies and requests type gratuitous arp will trigger the | |
| 885 | + ARP table to be updated, if this setting is on. | |
| 886 | + | |
| 887 | + If the ARP table already contains the IP address of the | |
| 888 | + gratuitous arp frame, the arp table will be updated regardless | |
| 889 | + if this setting is on or off. | |
| 890 | + | |
| 839 | 891 | |
| 840 | 892 | app_solicit - INTEGER |
| 841 | 893 | The maximum number of probes to send to the user space ARP daemon |
| @@ -0,0 +1,90 @@ | ||
| 1 | +Linux* Base Driver for Intel(R) Network Connection | |
| 2 | +================================================== | |
| 3 | + | |
| 4 | +November 24, 2009 | |
| 5 | + | |
| 6 | +Contents | |
| 7 | +======== | |
| 8 | + | |
| 9 | +- In This Release | |
| 10 | +- Identifying Your Adapter | |
| 11 | +- Known Issues/Troubleshooting | |
| 12 | +- Support | |
| 13 | + | |
| 14 | +In This Release | |
| 15 | +=============== | |
| 16 | + | |
| 17 | +This file describes the ixgbevf Linux* Base Driver for Intel Network | |
| 18 | +Connection. | |
| 19 | + | |
| 20 | +The ixgbevf driver supports 82599-based virtual function devices that can only | |
| 21 | +be activated on kernels with CONFIG_PCI_IOV enabled. | |
| 22 | + | |
| 23 | +The ixgbevf driver supports virtual functions generated by the ixgbe driver | |
| 24 | +with a max_vfs value of 1 or greater. | |
| 25 | + | |
| 26 | +The guest OS loading the ixgbevf driver must support MSI-X interrupts. | |
| 27 | + | |
| 28 | +VLANs: There is a limit of a total of 32 shared VLANs to 1 or more VFs. | |
| 29 | + | |
| 30 | +Identifying Your Adapter | |
| 31 | +======================== | |
| 32 | + | |
| 33 | +For more information on how to identify your adapter, go to the Adapter & | |
| 34 | +Driver ID Guide at: | |
| 35 | + | |
| 36 | + http://support.intel.com/support/network/sb/CS-008441.htm | |
| 37 | + | |
| 38 | +Known Issues/Troubleshooting | |
| 39 | +============================ | |
| 40 | + | |
| 41 | + Unloading Physical Function (PF) Driver Causes System Reboots When VM is | |
| 42 | + Running and VF is Loaded on the VM | |
| 43 | + ------------------------------------------------------------------------ | |
| 44 | + Do not unload the PF driver (ixgbe) while VFs are assigned to guests. | |
| 45 | + | |
| 46 | +Support | |
| 47 | +======= | |
| 48 | + | |
| 49 | +For general information, go to the Intel support website at: | |
| 50 | + | |
| 51 | + http://support.intel.com | |
| 52 | + | |
| 53 | +or the Intel Wired Networking project hosted by Sourceforge at: | |
| 54 | + | |
| 55 | + http://sourceforge.net/projects/e1000 | |
| 56 | + | |
| 57 | +If an issue is identified with the released source code on the supported | |
| 58 | +kernel with a supported adapter, email the specific information related | |
| 59 | +to the issue to e1000-devel@lists.sf.net | |
| 60 | + | |
| 61 | +License | |
| 62 | +======= | |
| 63 | + | |
| 64 | +Intel 10 Gigabit Linux driver. | |
| 65 | +Copyright(c) 1999 - 2009 Intel Corporation. | |
| 66 | + | |
| 67 | +This program is free software; you can redistribute it and/or modify it | |
| 68 | +under the terms and conditions of the GNU General Public License, | |
| 69 | +version 2, as published by the Free Software Foundation. | |
| 70 | + | |
| 71 | +This program is distributed in the hope it will be useful, but WITHOUT | |
| 72 | +ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 73 | +FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 74 | +more details. | |
| 75 | + | |
| 76 | +You should have received a copy of the GNU General Public License along with | |
| 77 | +this program; if not, write to the Free Software Foundation, Inc., | |
| 78 | +51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
| 79 | + | |
| 80 | +The full GNU General Public License is included in this distribution in | |
| 81 | +the file called "COPYING". | |
| 82 | + | |
| 83 | +Trademarks | |
| 84 | +========== | |
| 85 | + | |
| 86 | +Intel, Itanium, and Pentium are trademarks or registered trademarks of | |
| 87 | +Intel Corporation or its subsidiaries in the United States and other | |
| 88 | +countries. | |
| 89 | + | |
| 90 | +* Other names and brands may be claimed as the property of others. | |
| @@ -2,7 +2,7 @@ · 1 unmodified line | ||
| 2 | 2 | + ABSTRACT |
| 3 | 3 | -------------------------------------------------------------------------------- |
| 4 | 4 | |
| 5 | −This file documents the CONFIG_PACKET_MMAP option available with the PACKET | |
| 5 | +This file documents the mmap() facility available with the PACKET | |
| 6 | 6 | socket interface on 2.4 and 2.6 kernels. This type of sockets is used for |
| 7 | 7 | capture network traffic with utilities like tcpdump or any other that needs |
| 8 | 8 | raw access to network interface. |
| @@ -44,7 +44,7 @@ enabled. For transmission, check the MTU (Maximum Transmission Unit) used and · 35 unmodified lines | ||
| 44 | 44 | supported by devices of your network. |
| 45 | 45 | |
| 46 | 46 | -------------------------------------------------------------------------------- |
| 47 | −+ How to use CONFIG_PACKET_MMAP to improve capture process | |
| 47 | ++ How to use mmap() to improve capture process | |
| 48 | 48 | -------------------------------------------------------------------------------- |
| 49 | 49 | |
| 50 | 50 | From the user standpoint, you should use the higher level libpcap library, which |
| @@ -64,7 +64,7 @@ the low level details or want to improve libpcap by including PACKET_MMAP · 13 unmodified lines | ||
| 64 | 64 | support. |
| 65 | 65 | |
| 66 | 66 | -------------------------------------------------------------------------------- |
| 67 | −+ How to use CONFIG_PACKET_MMAP directly to improve capture process | |
| 67 | ++ How to use mmap() directly to improve capture process | |
| 68 | 68 | -------------------------------------------------------------------------------- |
| 69 | 69 | |
| 70 | 70 | From the system calls stand point, the use of PACKET_MMAP involves |
| @@ -105,7 +105,7 @@ also the mapping of the circular buffer in the user process and · 34 unmodified lines | ||
| 105 | 105 | the use of this buffer. |
| 106 | 106 | |
| 107 | 107 | -------------------------------------------------------------------------------- |
| 108 | −+ How to use CONFIG_PACKET_MMAP directly to improve transmission process | |
| 108 | ++ How to use mmap() directly to improve transmission process | |
| 109 | 109 | -------------------------------------------------------------------------------- |
| 110 | 110 | Transmission process is similar to capture as shown below. |
| 111 | 111 | |
| @@ -188,3 +188,27 @@ Then in some part of your code after your wiphy has been registered: · 187 unmodified lines | ||
| 188 | 188 | &mydriver_jp_regdom.reg_rules[i], |
| 189 | 189 | sizeof(struct ieee80211_reg_rule)); |
| 190 | 190 | regulatory_struct_hint(rd); |
| 191 | + | |
| 192 | +Statically compiled regulatory database | |
| 193 | +--------------------------------------- | |
| 194 | + | |
| 195 | +In most situations the userland solution using CRDA as described | |
| 196 | +above is the preferred solution. However in some cases a set of | |
| 197 | +rules built into the kernel itself may be desirable. To account | |
| 198 | +for this situation, a configuration option has been provided | |
| 199 | +(i.e. CONFIG_CFG80211_INTERNAL_REGDB). With this option enabled, | |
| 200 | +the wireless database information contained in net/wireless/db.txt is | |
| 201 | +used to generate a data structure encoded in net/wireless/regdb.c. | |
| 202 | +That option also enables code in net/wireless/reg.c which queries | |
| 203 | +the data in regdb.c as an alternative to using CRDA. | |
| 204 | + | |
| 205 | +The file net/wireless/db.txt should be kept up-to-date with the db.txt | |
| 206 | +file available in the git repository here: | |
| 207 | + | |
| 208 | + git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-regdb.git | |
| 209 | + | |
| 210 | +Again, most users in most situations should be using the CRDA package | |
| 211 | +provided with their distribution, and in most other situations users | |
| 212 | +should be building and using CRDA on their own rather than using | |
| 213 | +this option. If you are not absolutely sure that you should be using | |
| 214 | +CONFIG_CFG80211_INTERNAL_REGDB then _DO_NOT_USE_IT_. | |
| @@ -0,0 +1,47 @@ | ||
| 1 | +Thin-streams and TCP | |
| 2 | +==================== | |
| 3 | +A wide range of Internet-based services that use reliable transport | |
| 4 | +protocols display what we call thin-stream properties. This means | |
| 5 | +that the application sends data with such a low rate that the | |
| 6 | +retransmission mechanisms of the transport protocol are not fully | |
| 7 | +effective. In time-dependent scenarios (like online games, control | |
| 8 | +systems, stock trading etc.) where the user experience depends | |
| 9 | +on the data delivery latency, packet loss can be devastating for | |
| 10 | +the service quality. Extreme latencies are caused by TCP's | |
| 11 | +dependency on the arrival of new data from the application to trigger | |
| 12 | +retransmissions effectively through fast retransmit instead of | |
| 13 | +waiting for long timeouts. | |
| 14 | + | |
| 15 | +After analysing a large number of time-dependent interactive | |
| 16 | +applications, we have seen that they often produce thin streams | |
| 17 | +and also stay with this traffic pattern throughout its entire | |
| 18 | +lifespan. The combination of time-dependency and the fact that the | |
| 19 | +streams provoke high latencies when using TCP is unfortunate. | |
| 20 | + | |
| 21 | +In order to reduce application-layer latency when packets are lost, | |
| 22 | +a set of mechanisms has been made, which address these latency issues | |
| 23 | +for thin streams. In short, if the kernel detects a thin stream, | |
| 24 | +the retransmission mechanisms are modified in the following manner: | |
| 25 | + | |
| 26 | +1) If the stream is thin, fast retransmit on the first dupACK. | |
| 27 | +2) If the stream is thin, do not apply exponential backoff. | |
| 28 | + | |
| 29 | +These enhancements are applied only if the stream is detected as | |
| 30 | +thin. This is accomplished by defining a threshold for the number | |
| 31 | +of packets in flight. If there are less than 4 packets in flight, | |
| 32 | +fast retransmissions can not be triggered, and the stream is prone | |
| 33 | +to experience high retransmission latencies. | |
| 34 | + | |
| 35 | +Since these mechanisms are targeted at time-dependent applications, | |
| 36 | +they must be specifically activated by the application using the | |
| 37 | +TCP_THIN_LINEAR_TIMEOUTS and TCP_THIN_DUPACK IOCTLS or the | |
| 38 | +tcp_thin_linear_timeouts and tcp_thin_dupack sysctls. Both | |
| 39 | +modifications are turned off by default. | |
| 40 | + | |
| 41 | +References | |
| 42 | +========== | |
| 43 | +More information on the modifications, as well as a wide range of | |
| 44 | +experimental data can be found here: | |
| 45 | +"Improving latency for interactive, thin-stream applications over | |
| 46 | +reliable transport" | |
| 47 | +http://simula.no/research/nd/publications/Simula.nd.477/simula_pdf_file | |
| @@ -0,0 +1,118 @@ | ||
| 1 | +This file explains the locking and exclusion scheme used in the PCCARD | |
| 2 | +and PCMCIA subsystems. | |
| 3 | + | |
| 4 | + | |
| 5 | +A) Overview, Locking Hierarchy: | |
| 6 | +=============================== | |
| 7 | + | |
| 8 | +pcmcia_socket_list_rwsem - protects only the list of sockets | |
| 9 | +- skt_mutex - serializes card insert / ejection | |
| 10 | + - ops_mutex - serializes socket operation | |
| 11 | + | |
| 12 | + | |
| 13 | +B) Exclusion | |
| 14 | +============ | |
| 15 | + | |
| 16 | +The following functions and callbacks to struct pcmcia_socket must | |
| 17 | +be called with "skt_mutex" held: | |
| 18 | + | |
| 19 | + socket_detect_change() | |
| 20 | + send_event() | |
| 21 | + socket_reset() | |
| 22 | + socket_shutdown() | |
| 23 | + socket_setup() | |
| 24 | + socket_remove() | |
| 25 | + socket_insert() | |
| 26 | + socket_early_resume() | |
| 27 | + socket_late_resume() | |
| 28 | + socket_resume() | |
| 29 | + socket_suspend() | |
| 30 | + | |
| 31 | + struct pcmcia_callback *callback | |
| 32 | + | |
| 33 | +The following functions and callbacks to struct pcmcia_socket must | |
| 34 | +be called with "ops_mutex" held: | |
| 35 | + | |
| 36 | + socket_reset() | |
| 37 | + socket_setup() | |
| 38 | + | |
| 39 | + struct pccard_operations *ops | |
| 40 | + struct pccard_resource_ops *resource_ops; | |
| 41 | + | |
| 42 | +Note that send_event() and struct pcmcia_callback *callback must not be | |
| 43 | +called with "ops_mutex" held. | |
| 44 | + | |
| 45 | + | |
| 46 | +C) Protection | |
| 47 | +============= | |
| 48 | + | |
| 49 | +1. Global Data: | |
| 50 | +--------------- | |
| 51 | +struct list_head pcmcia_socket_list; | |
| 52 | + | |
| 53 | +protected by pcmcia_socket_list_rwsem; | |
| 54 | + | |
| 55 | + | |
| 56 | +2. Per-Socket Data: | |
| 57 | +------------------- | |
| 58 | +The resource_ops and their data are protected by ops_mutex. | |
| 59 | + | |
| 60 | +The "main" struct pcmcia_socket is protected as follows (read-only fields | |
| 61 | +or single-use fields not mentioned): | |
| 62 | + | |
| 63 | +- by pcmcia_socket_list_rwsem: | |
| 64 | + struct list_head socket_list; | |
| 65 | + | |
| 66 | +- by thread_lock: | |
| 67 | + unsigned int thread_events; | |
| 68 | + | |
| 69 | +- by skt_mutex: | |
| 70 | + u_int suspended_state; | |
| 71 | + void (*tune_bridge); | |
| 72 | + struct pcmcia_callback *callback; | |
| 73 | + int resume_status; | |
| 74 | + | |
| 75 | +- by ops_mutex: | |
| 76 | + socket_state_t socket; | |
| 77 | + u_int state; | |
| 78 | + u_short lock_count; | |
| 79 | + pccard_mem_map cis_mem; | |
| 80 | + void __iomem *cis_virt; | |
| 81 | + struct { } irq; | |
| 82 | + io_window_t io[]; | |
| 83 | + pccard_mem_map win[]; | |
| 84 | + struct list_head cis_cache; | |
| 85 | + size_t fake_cis_len; | |
| 86 | + u8 *fake_cis; | |
| 87 | + u_int irq_mask; | |
| 88 | + void (*zoom_video); | |
| 89 | + int (*power_hook); | |
| 90 | + u8 resource...; | |
| 91 | + struct list_head devices_list; | |
| 92 | + u8 device_count; | |
| 93 | + struct pcmcia_state; | |
| 94 | + | |
| 95 | + | |
| 96 | +3. Per PCMCIA-device Data: | |
| 97 | +-------------------------- | |
| 98 | + | |
| 99 | +The "main" struct pcmcia_devie is protected as follows (read-only fields | |
| 100 | +or single-use fields not mentioned): | |
| 101 | + | |
| 102 | + | |
| 103 | +- by pcmcia_socket->ops_mutex: | |
| 104 | + struct list_head socket_device_list; | |
| 105 | + struct config_t *function_config; | |
| 106 | + u16 _irq:1; | |
| 107 | + u16 _io:1; | |
| 108 | + u16 _win:4; | |
| 109 | + u16 _locked:1; | |
| 110 | + u16 allow_func_id_match:1; | |
| 111 | + u16 suspended:1; | |
| 112 | + u16 _removed:1; | |
| 113 | + | |
| 114 | +- by the PCMCIA driver: | |
| 115 | + io_req_t io; | |
| 116 | + irq_req_t irq; | |
| 117 | + config_req_t conf; | |
| 118 | + window_handle_t win; | |
| @@ -0,0 +1,53 @@ | ||
| 1 | +CAN Device Tree Bindings | |
| 2 | +------------------------ | |
| 3 | + | |
| 4 | +(c) 2006-2009 Secret Lab Technologies Ltd | |
| 5 | +Grant Likely <grant.likely@secretlab.ca> | |
| 6 | + | |
| 7 | +fsl,mpc5200-mscan nodes | |
| 8 | +----------------------- | |
| 9 | +In addition to the required compatible-, reg- and interrupt-properties, you can | |
| 10 | +also specify which clock source shall be used for the controller: | |
| 11 | + | |
| 12 | +- fsl,mscan-clock-source : a string describing the clock source. Valid values | |
| 13 | + are: "ip" for ip bus clock | |
| 14 | + "ref" for reference clock (XTAL) | |
| 15 | + "ref" is default in case this property is not | |
| 16 | + present. | |
| 17 | + | |
| 18 | +fsl,mpc5121-mscan nodes | |
| 19 | +----------------------- | |
| 20 | +In addition to the required compatible-, reg- and interrupt-properties, you can | |
| 21 | +also specify which clock source and divider shall be used for the controller: | |
| 22 | + | |
| 23 | +- fsl,mscan-clock-source : a string describing the clock source. Valid values | |
| 24 | + are: "ip" for ip bus clock | |
| 25 | + "ref" for reference clock | |
| 26 | + "sys" for system clock | |
| 27 | + If this property is not present, an optimal CAN | |
| 28 | + clock source and frequency based on the system | |
| 29 | + clock will be selected. If this is not possible, | |
| 30 | + the reference clock will be used. | |
| 31 | + | |
| 32 | +- fsl,mscan-clock-divider: for the reference and system clock, an additional | |
| 33 | + clock divider can be specified. By default, a | |
| 34 | + value of 1 is used. | |
| 35 | + | |
| 36 | +Note that the MPC5121 Rev. 1 processor is not supported. | |
| 37 | + | |
| 38 | +Examples: | |
| 39 | + can@1300 { | |
| 40 | + compatible = "fsl,mpc5121-mscan"; | |
| 41 | + interrupts = <12 0x8>; | |
| 42 | + interrupt-parent = <&ipic>; | |
| 43 | + reg = <0x1300 0x80>; | |
| 44 | + }; | |
| 45 | + | |
| 46 | + can@1380 { | |
| 47 | + compatible = "fsl,mpc5121-mscan"; | |
| 48 | + interrupts = <13 0x8>; | |
| 49 | + interrupt-parent = <&ipic>; | |
| 50 | + reg = <0x1380 0x80>; | |
| 51 | + fsl,mscan-clock-source = "ref"; | |
| 52 | + fsl,mscan-clock-divider = <3>; | |
| 53 | + }; | |
| @@ -0,0 +1,70 @@ | ||
| 1 | +MPC5121 PSC Device Tree Bindings | |
| 2 | + | |
| 3 | +PSC in UART mode | |
| 4 | +---------------- | |
| 5 | + | |
| 6 | +For PSC in UART mode the needed PSC serial devices | |
| 7 | +are specified by fsl,mpc5121-psc-uart nodes in the | |
| 8 | +fsl,mpc5121-immr SoC node. Additionally the PSC FIFO | |
| 9 | +Controller node fsl,mpc5121-psc-fifo is requered there: | |
| 10 | + | |
| 11 | +fsl,mpc5121-psc-uart nodes | |
| 12 | +-------------------------- | |
| 13 | + | |
| 14 | +Required properties : | |
| 15 | + - compatible : Should contain "fsl,mpc5121-psc-uart" and "fsl,mpc5121-psc" | |
| 16 | + - cell-index : Index of the PSC in hardware | |
| 17 | + - reg : Offset and length of the register set for the PSC device | |
| 18 | + - interrupts : <a b> where a is the interrupt number of the | |
| 19 | + PSC FIFO Controller and b is a field that represents an | |
| 20 | + encoding of the sense and level information for the interrupt. | |
| 21 | + - interrupt-parent : the phandle for the interrupt controller that | |
| 22 | + services interrupts for this device. | |
| 23 | + | |
| 24 | +Recommended properties : | |
| 25 | + - fsl,rx-fifo-size : the size of the RX fifo slice (a multiple of 4) | |
| 26 | + - fsl,tx-fifo-size : the size of the TX fifo slice (a multiple of 4) | |
| 27 | + | |
| 28 | + | |
| 29 | +fsl,mpc5121-psc-fifo node | |
| 30 | +------------------------- | |
| 31 | + | |
| 32 | +Required properties : | |
| 33 | + - compatible : Should be "fsl,mpc5121-psc-fifo" | |
| 34 | + - reg : Offset and length of the register set for the PSC | |
| 35 | + FIFO Controller | |
| 36 | + - interrupts : <a b> where a is the interrupt number of the | |
| 37 | + PSC FIFO Controller and b is a field that represents an | |
| 38 | + encoding of the sense and level information for the interrupt. | |
| 39 | + - interrupt-parent : the phandle for the interrupt controller that | |
| 40 | + services interrupts for this device. | |
| 41 | + | |
| 42 | + | |
| 43 | +Example for a board using PSC0 and PSC1 devices in serial mode: | |
| 44 | + | |
| 45 | +serial@11000 { | |
| 46 | + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; | |
| 47 | + cell-index = <0>; | |
| 48 | + reg = <0x11000 0x100>; | |
| 49 | + interrupts = <40 0x8>; | |
| 50 | + interrupt-parent = < &ipic >; | |
| 51 | + fsl,rx-fifo-size = <16>; | |
| 52 | + fsl,tx-fifo-size = <16>; | |
| 53 | +}; | |
| 54 | + | |
| 55 | +serial@11100 { | |
| 56 | + compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc"; | |
| 57 | + cell-index = <1>; | |
| 58 | + reg = <0x11100 0x100>; | |
| 59 | + interrupts = <40 0x8>; | |
| 60 | + interrupt-parent = < &ipic >; | |
| 61 | + fsl,rx-fifo-size = <16>; | |
| 62 | + fsl,tx-fifo-size = <16>; | |
| 63 | +}; | |
| 64 | + | |
| 65 | +pscfifo@11f00 { | |
| 66 | + compatible = "fsl,mpc5121-psc-fifo"; | |
| 67 | + reg = <0x11f00 0x100>; | |
| 68 | + interrupts = <40 0x8>; | |
| 69 | + interrupt-parent = < &ipic >; | |
| 70 | +}; | |
| @@ -195,11 +195,4 @@ External interrupts: · 194 unmodified lines | ||
| 195 | 195 | |
| 196 | 196 | fsl,mpc5200-mscan nodes |
| 197 | 197 | ----------------------- |
| 198 | −In addition to the required compatible-, reg- and interrupt-properites, you can | |
| 199 | −also specify which clock source shall be used for the controller: | |
| 200 | − | |
| 201 | −- fsl,mscan-clock-source- a string describing the clock source. Valid values | |
| 202 | − are: "ip" for ip bus clock | |
| 203 | − "ref" for reference clock (XTAL) | |
| 204 | − "ref" is default in case this property is not | |
| 205 | − present. | |
| 198 | +See file can.txt in this directory. | |
| @@ -13,6 +13,11 @@ Required properties: · 12 unmodified lines | ||
| 13 | 13 | - interrupt-parent : the phandle for the interrupt controller that |
| 14 | 14 | services interrupts for this device. |
| 15 | 15 | |
| 16 | +Optional properties: | |
| 17 | +- gpios : specifies the gpio pins to be used for chipselects. | |
| 18 | + The gpios will be referred to as reg = <index> in the SPI child nodes. | |
| 19 | + If unspecified, a single SPI device without a chip select can be used. | |
| 20 | + | |
| 16 | 21 | Example: |
| 17 | 22 | spi@4c0 { |
| 18 | 23 | cell-index = <0>; |
| @@ -21,4 +26,6 @@ Example: · 2 unmodified lines | ||
| 21 | 26 | interrupts = <82 0>; |
| 22 | 27 | interrupt-parent = <700>; |
| 23 | 28 | mode = "cpu"; |
| 29 | + gpios = <&gpio 18 1 // device reg=<0> | |
| 30 | + &gpio 19 1>; // device reg=<1> | |
| 24 | 31 | }; |
| @@ -0,0 +1,134 @@ | ||
| 1 | +GDB intends to support the following hardware debug features of BookE | |
| 2 | +processors: | |
| 3 | + | |
| 4 | +4 hardware breakpoints (IAC) | |
| 5 | +2 hardware watchpoints (read, write and read-write) (DAC) | |
| 6 | +2 value conditions for the hardware watchpoints (DVC) | |
| 7 | + | |
| 8 | +For that, we need to extend ptrace so that GDB can query and set these | |
| 9 | +resources. Since we're extending, we're trying to create an interface | |
| 10 | +that's extendable and that covers both BookE and server processors, so | |
| 11 | +that GDB doesn't need to special-case each of them. We added the | |
| 12 | +following 3 new ptrace requests. | |
| 13 | + | |
| 14 | +1. PTRACE_PPC_GETHWDEBUGINFO | |
| 15 | + | |
| 16 | +Query for GDB to discover the hardware debug features. The main info to | |
| 17 | +be returned here is the minimum alignment for the hardware watchpoints. | |
| 18 | +BookE processors don't have restrictions here, but server processors have | |
| 19 | +an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid | |
| 20 | +adding special cases to GDB based on what it sees in AUXV. | |
| 21 | + | |
| 22 | +Since we're at it, we added other useful info that the kernel can return to | |
| 23 | +GDB: this query will return the number of hardware breakpoints, hardware | |
| 24 | +watchpoints and whether it supports a range of addresses and a condition. | |
| 25 | +The query will fill the following structure provided by the requesting process: | |
| 26 | + | |
| 27 | +struct ppc_debug_info { | |
| 28 | + unit32_t version; | |
| 29 | + unit32_t num_instruction_bps; | |
| 30 | + unit32_t num_data_bps; | |
| 31 | + unit32_t num_condition_regs; | |
| 32 | + unit32_t data_bp_alignment; | |
| 33 | + unit32_t sizeof_condition; /* size of the DVC register */ | |
| 34 | + uint64_t features; /* bitmask of the individual flags */ | |
| 35 | +}; | |
| 36 | + | |
| 37 | +features will have bits indicating whether there is support for: | |
| 38 | + | |
| 39 | +#define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x1 | |
| 40 | +#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2 | |
| 41 | +#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4 | |
| 42 | +#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8 | |
| 43 | + | |
| 44 | +2. PTRACE_SETHWDEBUG | |
| 45 | + | |
| 46 | +Sets a hardware breakpoint or watchpoint, according to the provided structure: | |
| 47 | + | |
| 48 | +struct ppc_hw_breakpoint { | |
| 49 | + uint32_t version; | |
| 50 | +#define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x1 | |
| 51 | +#define PPC_BREAKPOINT_TRIGGER_READ 0x2 | |
| 52 | +#define PPC_BREAKPOINT_TRIGGER_WRITE 0x4 | |
| 53 | + uint32_t trigger_type; /* only some combinations allowed */ | |
| 54 | +#define PPC_BREAKPOINT_MODE_EXACT 0x0 | |
| 55 | +#define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x1 | |
| 56 | +#define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2 | |
| 57 | +#define PPC_BREAKPOINT_MODE_MASK 0x3 | |
| 58 | + uint32_t addr_mode; /* address match mode */ | |
| 59 | + | |
| 60 | +#define PPC_BREAKPOINT_CONDITION_MODE 0x3 | |
| 61 | +#define PPC_BREAKPOINT_CONDITION_NONE 0x0 | |
| 62 | +#define PPC_BREAKPOINT_CONDITION_AND 0x1 | |
| 63 | +#define PPC_BREAKPOINT_CONDITION_EXACT 0x1 /* different name for the same thing as above */ | |
| 64 | +#define PPC_BREAKPOINT_CONDITION_OR 0x2 | |
| 65 | +#define PPC_BREAKPOINT_CONDITION_AND_OR 0x3 | |
| 66 | +#define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 /* byte enable bits */ | |
| 67 | +#define PPC_BREAKPOINT_CONDITION_BE(n) (1<<((n)+16)) | |
| 68 | + uint32_t condition_mode; /* break/watchpoint condition flags */ | |
| 69 | + | |
| 70 | + uint64_t addr; | |
| 71 | + uint64_t addr2; | |
| 72 | + uint64_t condition_value; | |
| 73 | +}; | |
| 74 | + | |
| 75 | +A request specifies one event, not necessarily just one register to be set. | |
| 76 | +For instance, if the request is for a watchpoint with a condition, both the | |
| 77 | +DAC and DVC registers will be set in the same request. | |
| 78 | + | |
| 79 | +With this GDB can ask for all kinds of hardware breakpoints and watchpoints | |
| 80 | +that the BookE supports. COMEFROM breakpoints available in server processors | |
| 81 | +are not contemplated, but that is out of the scope of this work. | |
| 82 | + | |
| 83 | +ptrace will return an integer (handle) uniquely identifying the breakpoint or | |
| 84 | +watchpoint just created. This integer will be used in the PTRACE_DELHWDEBUG | |
| 85 | +request to ask for its removal. Return -ENOSPC if the requested breakpoint | |
| 86 | +can't be allocated on the registers. | |
| 87 | + | |
| 88 | +Some examples of using the structure to: | |
| 89 | + | |
| 90 | +- set a breakpoint in the first breakpoint register | |
| 91 | + | |
| 92 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 93 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; | |
| 94 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 95 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 96 | + p.addr = (uint64_t) address; | |
| 97 | + p.addr2 = 0; | |
| 98 | + p.condition_value = 0; | |
| 99 | + | |
| 100 | +- set a watchpoint which triggers on reads in the second watchpoint register | |
| 101 | + | |
| 102 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 103 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; | |
| 104 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 105 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 106 | + p.addr = (uint64_t) address; | |
| 107 | + p.addr2 = 0; | |
| 108 | + p.condition_value = 0; | |
| 109 | + | |
| 110 | +- set a watchpoint which triggers only with a specific value | |
| 111 | + | |
| 112 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 113 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_READ; | |
| 114 | + p.addr_mode = PPC_BREAKPOINT_MODE_EXACT; | |
| 115 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_AND | PPC_BREAKPOINT_CONDITION_BE_ALL; | |
| 116 | + p.addr = (uint64_t) address; | |
| 117 | + p.addr2 = 0; | |
| 118 | + p.condition_value = (uint64_t) condition; | |
| 119 | + | |
| 120 | +- set a ranged hardware breakpoint | |
| 121 | + | |
| 122 | + p.version = PPC_DEBUG_CURRENT_VERSION; | |
| 123 | + p.trigger_type = PPC_BREAKPOINT_TRIGGER_EXECUTE; | |
| 124 | + p.addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE; | |
| 125 | + p.condition_mode = PPC_BREAKPOINT_CONDITION_NONE; | |
| 126 | + p.addr = (uint64_t) begin_range; | |
| 127 | + p.addr2 = (uint64_t) end_range; | |
| 128 | + p.condition_value = 0; | |
| 129 | + | |
| 130 | +3. PTRACE_DELHWDEBUG | |
| 131 | + | |
| 132 | +Takes an integer which identifies an existing breakpoint or watchpoint | |
| 133 | +(i.e., the value returned from PTRACE_SETHWDEBUG), and deletes the | |
| 134 | +corresponding breakpoint or watchpoint.. | |
| @@ -87,6 +87,12 @@ Command line parameters · 86 unmodified lines | ||
| 87 | 87 | compatibility, by the device number in hexadecimal (0xabcd or abcd). Device |
| 88 | 88 | numbers given as 0xabcd will be interpreted as 0.0.abcd. |
| 89 | 89 | |
| 90 | +* /proc/cio_settle | |
| 91 | + | |
| 92 | + A write request to this file is blocked until all queued cio actions are | |
| 93 | + handled. This will allow userspace to wait for pending work affecting | |
| 94 | + device availability after changing cio_ignore or the hardware configuration. | |
| 95 | + | |
| 90 | 96 | * For some of the information present in the /proc filesystem in 2.4 (namely, |
| 91 | 97 | /proc/subchannels and /proc/chpids), see driver-model.txt. |
| 92 | 98 | Information formerly in /proc/irq_count is now in /proc/interrupts. |
| @@ -223,8 +223,8 @@ touched by the driver - it should use the ccwgroup device's driver_data for its · 222 unmodified lines | ||
| 223 | 223 | private data. |
| 224 | 224 | |
| 225 | 225 | To implement a ccwgroup driver, please refer to include/asm/ccwgroup.h. Keep in |
| 226 | −mind that most drivers will need to implement both a ccwgroup and a ccw driver | |
| 227 | −(unless you have a meta ccw driver, like cu3088 for lcs and ctc). | |
| 226 | +mind that most drivers will need to implement both a ccwgroup and a ccw | |
| 227 | +driver. | |
| 228 | 228 | |
| 229 | 229 | |
| 230 | 230 | 2. Channel paths |
| @@ -1,3 +1,19 @@ | ||
| 1 | +1 Release Date : Thur. Oct 29, 2009 09:12:45 PST 2009 - | |
| 2 | + (emaild-id:megaraidlinux@lsi.com) | |
| 3 | + Bo Yang | |
| 4 | + | |
| 5 | +2 Current Version : 00.00.04.17.1-rc1 | |
| 6 | +3 Older Version : 00.00.04.12 | |
| 7 | + | |
| 8 | +1. Add the pad_0 in mfi frame structure to 0 to fix the | |
| 9 | + context value larger than 32bit value issue. | |
| 10 | + | |
| 11 | +2. Add the logic drive list to the driver. Driver will | |
| 12 | + keep the logic drive list internal after driver load. | |
| 13 | + | |
| 14 | +3. driver fixed the device update issue after get the AEN | |
| 15 | + PD delete/ADD, LD add/delete from FW. | |
| 16 | + | |
| 1 | 17 | 1 Release Date : Tues. July 28, 2009 10:12:45 PST 2009 - |
| 2 | 18 | (emaild-id:megaraidlinux@lsi.com) |
| 3 | 19 | Bo Yang |
| @@ -482,6 +482,9 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 481 unmodified lines | ||
| 482 | 482 | |
| 483 | 483 | reference_rate - reference sample rate, 44100 or 48000 (default) |
| 484 | 484 | multiple - multiple to ref. sample rate, 1 or 2 (default) |
| 485 | + subsystem - override the PCI SSID for probing; the value | |
| 486 | + consists of SSVID << 16 | SSDID. The default is | |
| 487 | + zero, which means no override. | |
| 485 | 488 | |
| 486 | 489 | This module supports multiple cards. |
| 487 | 490 | |
| @@ -1123,6 +1126,21 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 635 unmodified lines | ||
| 1123 | 1126 | |
| 1124 | 1127 | This module supports multiple cards, autoprobe and ISA PnP. |
| 1125 | 1128 | |
| 1129 | + Module snd-jazz16 | |
| 1130 | + ------------------- | |
| 1131 | + | |
| 1132 | + Module for Media Vision Jazz16 chipset. The chipset consists of 3 chips: | |
| 1133 | + MVD1216 + MVA416 + MVA514. | |
| 1134 | + | |
| 1135 | + port - port # for SB DSP chip (0x210,0x220,0x230,0x240,0x250,0x260) | |
| 1136 | + irq - IRQ # for SB DSP chip (3,5,7,9,10,15) | |
| 1137 | + dma8 - DMA # for SB DSP chip (1,3) | |
| 1138 | + dma16 - DMA # for SB DSP chip (5,7) | |
| 1139 | + mpu_port - MPU-401 port # (0x300,0x310,0x320,0x330) | |
| 1140 | + mpu_irq - MPU-401 irq # (2,3,5,7) | |
| 1141 | + | |
| 1142 | + This module supports multiple cards. | |
| 1143 | + | |
| 1126 | 1144 | Module snd-korg1212 |
| 1127 | 1145 | ------------------- |
| 1128 | 1146 | |
| @@ -1791,6 +1809,13 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 662 unmodified lines | ||
| 1791 | 1809 | |
| 1792 | 1810 | The power-management is supported. |
| 1793 | 1811 | |
| 1812 | + Module snd-ua101 | |
| 1813 | + ---------------- | |
| 1814 | + | |
| 1815 | + Module for the Edirol UA-101 audio/MIDI interface. | |
| 1816 | + | |
| 1817 | + This module supports multiple devices, autoprobe and hotplugging. | |
| 1818 | + | |
| 1794 | 1819 | Module snd-usb-audio |
| 1795 | 1820 | -------------------- |
| 1796 | 1821 | |
| @@ -1923,7 +1948,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed. · 126 unmodified lines | ||
| 1923 | 1948 | ------------------- |
| 1924 | 1949 | |
| 1925 | 1950 | Module for sound cards based on the Asus AV100/AV200 chips, |
| 1926 | − i.e., Xonar D1, DX, D2, D2X, HDAV1.3 (Deluxe), Essence ST | |
| 1951 | + i.e., Xonar D1, DX, D2, D2X, DS, HDAV1.3 (Deluxe), Essence ST | |
| 1927 | 1952 | (Deluxe) and Essence STX. |
| 1928 | 1953 | |
| 1929 | 1954 | This module supports autoprobe and multiple cards. |
| @@ -124,6 +124,8 @@ ALC882/883/885/888/889 · 123 unmodified lines | ||
| 124 | 124 | asus-a7m ASUS A7M |
| 125 | 125 | macpro MacPro support |
| 126 | 126 | mb5 Macbook 5,1 |
| 127 | + macmini3 Macmini 3,1 | |
| 128 | + mba21 Macbook Air 2,1 | |
| 127 | 129 | mbp3 Macbook Pro rev3 |
| 128 | 130 | imac24 iMac 24'' with jack detection |
| 129 | 131 | imac91 iMac 9,1 |
| @@ -279,13 +281,16 @@ Conexant 5051 · 149 unmodified lines | ||
| 279 | 281 | laptop Basic Laptop config (default) |
| 280 | 282 | hp HP Spartan laptop |
| 281 | 283 | hp-dv6736 HP dv6736 |
| 284 | + hp-f700 HP Compaq Presario F700 | |
| 282 | 285 | lenovo-x200 Lenovo X200 laptop |
| 286 | + toshiba Toshiba Satellite M300 | |
| 283 | 287 | |
| 284 | 288 | Conexant 5066 |
| 285 | 289 | ============= |
| 286 | 290 | laptop Basic Laptop config (default) |
| 287 | 291 | dell-laptop Dell laptops |
| 288 | 292 | olpc-xo-1_5 OLPC XO 1.5 |
| 293 | + ideapad Lenovo IdeaPad U150 | |
| 289 | 294 | |
| 290 | 295 | STAC9200 |
| 291 | 296 | ======== |
| @@ -452,6 +452,33 @@ Similarly, the lines after `[verb]` are parsed as `init_verbs` · 451 unmodified lines | ||
| 452 | 452 | sysfs entries, and the lines after `[hint]` are parsed as `hints` |
| 453 | 453 | sysfs entries, respectively. |
| 454 | 454 | |
| 455 | +Another example to override the codec vendor id from 0x12345678 to | |
| 456 | +0xdeadbeef is like below: | |
| 457 | +------------------------------------------------------------------------ | |
| 458 | + [codec] | |
| 459 | + 0x12345678 0xabcd1234 2 | |
| 460 | + | |
| 461 | + [vendor_id] | |
| 462 | + 0xdeadbeef | |
| 463 | +------------------------------------------------------------------------ | |
| 464 | + | |
| 465 | +In the similar way, you can override the codec subsystem_id via | |
| 466 | +`[subsystem_id]`, the revision id via `[revision_id]` line. | |
| 467 | +Also, the codec chip name can be rewritten via `[chip_name]` line. | |
| 468 | +------------------------------------------------------------------------ | |
| 469 | + [codec] | |
| 470 | + 0x12345678 0xabcd1234 2 | |
| 471 | + | |
| 472 | + [subsystem_id] | |
| 473 | + 0xffff1111 | |
| 474 | + | |
| 475 | + [revision_id] | |
| 476 | + 0x10 | |
| 477 | + | |
| 478 | + [chip_name] | |
| 479 | + My-own NEWS-0002 | |
| 480 | +------------------------------------------------------------------------ | |
| 481 | + | |
| 455 | 482 | The hd-audio driver reads the file via request_firmware(). Thus, |
| 456 | 483 | a patch file has to be located on the appropriate firmware path, |
| 457 | 484 | typically, /lib/firmware. For example, when you pass the option |
| @@ -24,6 +24,7 @@ Synopsis of kprobe_events · 23 unmodified lines | ||
| 24 | 24 | ------------------------- |
| 25 | 25 | p[:[GRP/]EVENT] SYMBOL[+offs]|MEMADDR [FETCHARGS] : Set a probe |
| 26 | 26 | r[:[GRP/]EVENT] SYMBOL[+0] [FETCHARGS] : Set a return probe |
| 27 | + -:[GRP/]EVENT : Clear a probe | |
| 27 | 28 | |
| 28 | 29 | GRP : Group name. If omitted, use "kprobes" for it. |
| 29 | 30 | EVENT : Event name. If omitted, the event name is generated |
| @@ -37,15 +38,12 @@ Synopsis of kprobe_events · 7 unmodified lines | ||
| 37 | 38 | @SYM[+|-offs] : Fetch memory at SYM +|- offs (SYM should be a data symbol) |
| 38 | 39 | $stackN : Fetch Nth entry of stack (N >= 0) |
| 39 | 40 | $stack : Fetch stack address. |
| 40 | − $argN : Fetch function argument. (N >= 0)(*) | |
| 41 | − $retval : Fetch return value.(**) | |
| 42 | − +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(***) | |
| 41 | + $retval : Fetch return value.(*) | |
| 42 | + +|-offs(FETCHARG) : Fetch memory at FETCHARG +|- offs address.(**) | |
| 43 | 43 | NAME=FETCHARG: Set NAME as the argument name of FETCHARG. |
| 44 | 44 | |
| 45 | − (*) aN may not correct on asmlinkaged functions and at the middle of | |
| 46 | − function body. | |
| 47 | − (**) only for return probe. | |
| 48 | − (***) this is useful for fetching a field of data structures. | |
| 45 | + (*) only for return probe. | |
| 46 | + (**) this is useful for fetching a field of data structures. | |
| 49 | 47 | |
| 50 | 48 | |
| 51 | 49 | Per-Probe Event Filtering |
| @@ -82,13 +80,16 @@ Usage examples · 30 unmodified lines | ||
| 82 | 80 | To add a probe as a new event, write a new definition to kprobe_events |
| 83 | 81 | as below. |
| 84 | 82 | |
| 85 | − echo p:myprobe do_sys_open dfd=$arg0 filename=$arg1 flags=$arg2 mode=$arg3 > /sys/kernel/debug/tracing/kprobe_events | |
| 83 | + echo 'p:myprobe do_sys_open dfd=%ax filename=%dx flags=%cx mode=+4($stack)' > /sys/kernel/debug/tracing/kprobe_events | |
| 86 | 84 | |
| 87 | 85 | This sets a kprobe on the top of do_sys_open() function with recording |
| 88 | −1st to 4th arguments as "myprobe" event. As this example shows, users can | |
| 89 | −choose more familiar names for each arguments. | |
| 86 | +1st to 4th arguments as "myprobe" event. Note, which register/stack entry is | |
| 87 | +assigned to each function argument depends on arch-specific ABI. If you unsure | |
| 88 | +the ABI, please try to use probe subcommand of perf-tools (you can find it | |
| 89 | +under tools/perf/). | |
| 90 | +As this example shows, users can choose more familiar names for each arguments. | |
| 90 | 91 | |
| 91 | − echo r:myretprobe do_sys_open $retval >> /sys/kernel/debug/tracing/kprobe_events | |
| 92 | + echo 'r:myretprobe do_sys_open $retval' >> /sys/kernel/debug/tracing/kprobe_events | |
| 92 | 93 | |
| 93 | 94 | This sets a kretprobe on the return point of do_sys_open() function with |
| 94 | 95 | recording return value as "myretprobe" event. |
| @@ -97,23 +98,24 @@ recording return value as "myretprobe" event. · 2 unmodified lines | ||
| 97 | 98 | |
| 98 | 99 | cat /sys/kernel/debug/tracing/events/kprobes/myprobe/format |
| 99 | 100 | name: myprobe |
| 100 | −ID: 75 | |
| 101 | +ID: 780 | |
| 101 | 102 | format: |
| 102 | − field:unsigned short common_type; offset:0; size:2; | |
| 103 | − field:unsigned char common_flags; offset:2; size:1; | |
| 104 | − field:unsigned char common_preempt_count; offset:3; size:1; | |
| 105 | − field:int common_pid; offset:4; size:4; | |
| 106 | − field:int common_tgid; offset:8; size:4; | |
| 103 | + field:unsigned short common_type; offset:0; size:2; signed:0; | |
| 104 | + field:unsigned char common_flags; offset:2; size:1; signed:0; | |
| 105 | + field:unsigned char common_preempt_count; offset:3; size:1;signed:0; | |
| 106 | + field:int common_pid; offset:4; size:4; signed:1; | |
| 107 | + field:int common_lock_depth; offset:8; size:4; signed:1; | |
| 107 | 108 | |
| 108 | − field: unsigned long ip; offset:16;tsize:8; | |
| 109 | − field: int nargs; offset:24;tsize:4; | |
| 110 | − field: unsigned long dfd; offset:32;tsize:8; | |
| 111 | − field: unsigned long filename; offset:40;tsize:8; | |
| 112 | − field: unsigned long flags; offset:48;tsize:8; | |
| 113 | − field: unsigned long mode; offset:56;tsize:8; | |
| 109 | + field:unsigned long __probe_ip; offset:12; size:4; signed:0; | |
| 110 | + field:int __probe_nargs; offset:16; size:4; signed:1; | |
| 111 | + field:unsigned long dfd; offset:20; size:4; signed:0; | |
| 112 | + field:unsigned long filename; offset:24; size:4; signed:0; | |
| 113 | + field:unsigned long flags; offset:28; size:4; signed:0; | |
| 114 | + field:unsigned long mode; offset:32; size:4; signed:0; | |
| 114 | 115 | |
| 115 | −print fmt: "(%lx) dfd=%lx filename=%lx flags=%lx mode=%lx", REC->ip, REC->dfd, REC->filename, REC->flags, REC->mode | |
| 116 | 116 | |
| 117 | +print fmt: "(%lx) dfd=%lx filename=%lx flags=%lx mode=%lx", REC->__probe_ip, | |
| 118 | +REC->dfd, REC->filename, REC->flags, REC->mode | |
| 117 | 119 | |
| 118 | 120 | You can see that the event has 4 arguments as in the expressions you specified. |
| 119 | 121 | |
| @@ -121,6 +123,12 @@ print fmt: "(%lx) dfd=%lx filename=%lx flags=%lx mode=%lx", REC->ip, REC->dfd, R · 1 unmodified line | ||
| 121 | 123 | |
| 122 | 124 | This clears all probe points. |
| 123 | 125 | |
| 126 | + Or, | |
| 127 | + | |
| 128 | + echo -:myprobe >> kprobe_events | |
| 129 | + | |
| 130 | + This clears probe points selectively. | |
| 131 | + | |
| 124 | 132 | Right after definition, each event is disabled by default. For tracing these |
| 125 | 133 | events, you need to enable it. |
| 126 | 134 | |
| @@ -146,4 +154,3 @@ events, you need to enable it. · 19 unmodified lines | ||
| 146 | 154 | returns from SYMBOL(e.g. "sys_open+0x1b/0x1d <- do_sys_open" means kernel |
| 147 | 155 | returns from do_sys_open to sys_open+0x1b). |
| 148 | 156 | |
| 149 | − | |
| @@ -26,3 +26,4 @@ · 25 unmodified lines | ||
| 26 | 26 | 25 -> Compro VideoMate E800 [1858:e800] |
| 27 | 27 | 26 -> Hauppauge WinTV-HVR1290 [0070:8551] |
| 28 | 28 | 27 -> Mygica X8558 PRO DMB-TH [14f1:8578] |
| 29 | + 28 -> LEADTEK WinFast PxTV1200 [107d:6f22] | |
| @@ -174,3 +174,4 @@ · 173 unmodified lines | ||
| 174 | 174 | 173 -> Zolid Hybrid TV Tuner PCI [1131:2004] |
| 175 | 175 | 174 -> Asus Europa Hybrid OEM [1043:4847] |
| 176 | 176 | 175 -> Leadtek Winfast DTV1000S [107d:6655] |
| 177 | +176 -> Beholder BeholdTV 505 RDS [0000:5051] | |
| @@ -81,3 +81,4 @@ tuner=80 - Philips FQ1216LME MK3 PAL/SECAM w/active loopthrough · 80 unmodified lines | ||
| 81 | 81 | tuner=81 - Partsnic (Daewoo) PTI-5NF05 |
| 82 | 82 | tuner=82 - Philips CU1216L |
| 83 | 83 | tuner=83 - NXP TDA18271 |
| 84 | +tuner=84 - Sony BTF-Pxn01Z | |
| @@ -0,0 +1,47 @@ | ||
| 1 | +tlg2300 release notes | |
| 2 | +==================== | |
| 3 | + | |
| 4 | +This is a v4l2/dvb device driver for the tlg2300 chip. | |
| 5 | + | |
| 6 | + | |
| 7 | +current status | |
| 8 | +============== | |
| 9 | + | |
| 10 | +video | |
| 11 | + - support mmap and read().(no overlay) | |
| 12 | + | |
| 13 | +audio | |
| 14 | + - The driver will register a ALSA card for the audio input. | |
| 15 | + | |
| 16 | +vbi | |
| 17 | + - Works for almost TV norms. | |
| 18 | + | |
| 19 | +dvb-t | |
| 20 | + - works for DVB-T | |
| 21 | + | |
| 22 | +FM | |
| 23 | + - Works for radio. | |
| 24 | + | |
| 25 | +--------------------------------------------------------------------------- | |
| 26 | +TESTED APPLICATIONS: | |
| 27 | + | |
| 28 | +-VLC1.0.4 test the video and dvb. The GUI is friendly to use. | |
| 29 | + | |
| 30 | +-Mplayer test the video. | |
| 31 | + | |
| 32 | +-Mplayer test the FM. The mplayer should be compiled with --enable-radio and | |
| 33 | + --enable-radio-capture. | |
| 34 | + The command runs as this(The alsa audio registers to card 1): | |
| 35 | + #mplayer radio://103.7/capture/ -radio adevice=hw=1,0:arate=48000 \ | |
| 36 | + -rawaudio rate=48000:channels=2 | |
| 37 | + | |
| 38 | +--------------------------------------------------------------------------- | |
| 39 | +KNOWN PROBLEMS: | |
| 40 | +about preemphasis: | |
| 41 | + You can set the preemphasis for radio by the following command: | |
| 42 | + #v4l2-ctl -d /dev/radio0 --set-ctrl=pre_emphasis_settings=1 | |
| 43 | + | |
| 44 | + "pre_emphasis_settings=1" means that you select the 50us. If you want | |
| 45 | + to select the 75us, please use "pre_emphasis_settings=2" | |
| 46 | + | |
| 47 | + | |
| @@ -42,6 +42,7 @@ ov519 041e:4064 Creative Live! VISTA VF0420 · 41 unmodified lines | ||
| 42 | 42 | ov519 041e:4067 Creative Live! Cam Video IM (VF0350) |
| 43 | 43 | ov519 041e:4068 Creative Live! VISTA VF0470 |
| 44 | 44 | spca561 0458:7004 Genius VideoCAM Express V2 |
| 45 | +sn9c2028 0458:7005 Genius Smart 300, version 2 | |
| 45 | 46 | sunplus 0458:7006 Genius Dsc 1.3 Smart |
| 46 | 47 | zc3xx 0458:7007 Genius VideoCam V2 |
| 47 | 48 | zc3xx 0458:700c Genius VideoCam V3 |
| @@ -109,6 +110,7 @@ sunplus 04a5:3003 Benq DC 1300 · 61 unmodified lines | ||
| 109 | 110 | sunplus 04a5:3008 Benq DC 1500 |
| 110 | 111 | sunplus 04a5:300a Benq DC 3410 |
| 111 | 112 | spca500 04a5:300c Benq DC 1016 |
| 113 | +benq 04a5:3035 Benq DC E300 | |
| 112 | 114 | finepix 04cb:0104 Fujifilm FinePix 4800 |
| 113 | 115 | finepix 04cb:0109 Fujifilm FinePix A202 |
| 114 | 116 | finepix 04cb:010b Fujifilm FinePix A203 |
| @@ -142,6 +144,7 @@ sunplus 04fc:5360 Sunplus Generic · 27 unmodified lines | ||
| 142 | 144 | spca500 04fc:7333 PalmPixDC85 |
| 143 | 145 | sunplus 04fc:ffff Pure DigitalDakota |
| 144 | 146 | spca501 0506:00df 3Com HomeConnect Lite |
| 147 | +sunplus 052b:1507 Megapixel 5 Pretec DC-1007 | |
| 145 | 148 | sunplus 052b:1513 Megapix V4 |
| 146 | 149 | sunplus 052b:1803 MegaImage VI |
| 147 | 150 | tv8532 0545:808b Veo Stingray |
| @@ -151,6 +154,7 @@ sunplus 0546:3191 Polaroid Ion 80 · 3 unmodified lines | ||
| 151 | 154 | sunplus 0546:3273 Polaroid PDC2030 |
| 152 | 155 | ov519 054c:0154 Sonny toy4 |
| 153 | 156 | ov519 054c:0155 Sonny toy5 |
| 157 | +cpia1 0553:0002 CPIA CPiA (version1) based cameras | |
| 154 | 158 | zc3xx 055f:c005 Mustek Wcam300A |
| 155 | 159 | spca500 055f:c200 Mustek Gsmart 300 |
| 156 | 160 | sunplus 055f:c211 Kowa Bs888e Microcamera |
| @@ -188,8 +192,7 @@ spca500 06bd:0404 Agfa CL20 · 31 unmodified lines | ||
| 188 | 192 | spca500 06be:0800 Optimedia |
| 189 | 193 | sunplus 06d6:0031 Trust 610 LCD PowerC@m Zoom |
| 190 | 194 | spca506 06e1:a190 ADS Instant VCD |
| 191 | −ov534 06f8:3002 Hercules Blog Webcam | |
| 192 | −ov534 06f8:3003 Hercules Dualpix HD Weblog | |
| 195 | +ov534_9 06f8:3003 Hercules Dualpix HD Weblog | |
| 193 | 196 | sonixj 06f8:3004 Hercules Classic Silver |
| 194 | 197 | sonixj 06f8:3008 Hercules Deluxe Optical Glass |
| 195 | 198 | pac7302 06f8:3009 Hercules Classic Link |
| @@ -204,6 +207,7 @@ sunplus 0733:2221 Mercury Digital Pro 3.1p · 8 unmodified lines | ||
| 204 | 207 | sunplus 0733:3261 Concord 3045 spca536a |
| 205 | 208 | sunplus 0733:3281 Cyberpix S550V |
| 206 | 209 | spca506 0734:043b 3DeMon USB Capture aka |
| 210 | +cpia1 0813:0001 QX3 camera | |
| 207 | 211 | ov519 0813:0002 Dual Mode USB Camera Plus |
| 208 | 212 | spca500 084d:0003 D-Link DSC-350 |
| 209 | 213 | spca500 08ca:0103 Aiptek PocketDV |
| @@ -225,7 +229,8 @@ sunplus 08ca:2050 Medion MD 41437 · 15 unmodified lines | ||
| 225 | 229 | sunplus 08ca:2060 Aiptek PocketDV5300 |
| 226 | 230 | tv8532 0923:010f ICM532 cams |
| 227 | 231 | mars 093a:050f Mars-Semi Pc-Camera |
| 228 | −mr97310a 093a:010f Sakar Digital no. 77379 | |
| 232 | +mr97310a 093a:010e All known CIF cams with this ID | |
| 233 | +mr97310a 093a:010f All known VGA cams with this ID | |
| 229 | 234 | pac207 093a:2460 Qtec Webcam 100 |
| 230 | 235 | pac207 093a:2461 HP Webcam |
| 231 | 236 | pac207 093a:2463 Philips SPC 220 NC |
| @@ -302,6 +307,7 @@ sonixj 0c45:613b Surfer SN-206 · 70 unmodified lines | ||
| 302 | 307 | sonixj 0c45:613c Sonix Pccam168 |
| 303 | 308 | sonixj 0c45:6143 Sonix Pccam168 |
| 304 | 309 | sonixj 0c45:6148 Digitus DA-70811/ZSMC USB PC Camera ZS211/Microdia |
| 310 | +sonixj 0c45:614a Frontech E-Ccam (JIL-2225) | |
| 305 | 311 | sn9c20x 0c45:6240 PC Camera (SN9C201 + MT9M001) |
| 306 | 312 | sn9c20x 0c45:6242 PC Camera (SN9C201 + MT9M111) |
| 307 | 313 | sn9c20x 0c45:6248 PC Camera (SN9C201 + OV9655) |
| @@ -324,6 +330,10 @@ sn9c20x 0c45:62b0 PC Camera (SN9C202 + MT9V011/MT9V111/MT9V112) · 16 unmodified lines | ||
| 324 | 330 | sn9c20x 0c45:62b3 PC Camera (SN9C202 + OV9655) |
| 325 | 331 | sn9c20x 0c45:62bb PC Camera (SN9C202 + OV7660) |
| 326 | 332 | sn9c20x 0c45:62bc PC Camera (SN9C202 + HV7131R) |
| 333 | +sn9c2028 0c45:8001 Wild Planet Digital Spy Camera | |
| 334 | +sn9c2028 0c45:8003 Sakar #11199, #6637x, #67480 keychain cams | |
| 335 | +sn9c2028 0c45:8008 Mini-Shotz ms-350 | |
| 336 | +sn9c2028 0c45:800a Vivitar Vivicam 3350B | |
| 327 | 337 | sunplus 0d64:0303 Sunplus FashionCam DXG |
| 328 | 338 | ov519 0e96:c001 TRUST 380 USB2 SPACEC@M |
| 329 | 339 | etoms 102c:6151 Qcam Sangha CIF |
| @@ -341,10 +351,11 @@ spca501 1776:501c Arowana 300K CMOS Camera · 11 unmodified lines | ||
| 341 | 351 | t613 17a1:0128 TASCORP JPEG Webcam, NGS Cyclops |
| 342 | 352 | vc032x 17ef:4802 Lenovo Vc0323+MI1310_SOC |
| 343 | 353 | pac207 2001:f115 D-Link DSB-C120 |
| 344 | −sq905c 2770:9050 sq905c | |
| 345 | −sq905c 2770:905c DualCamera | |
| 346 | −sq905 2770:9120 Argus Digital Camera DC1512 | |
| 347 | −sq905c 2770:913d sq905c | |
| 354 | +sq905c 2770:9050 Disney pix micro (CIF) | |
| 355 | +sq905c 2770:9052 Disney pix micro 2 (VGA) | |
| 356 | +sq905c 2770:905c All 11 known cameras with this ID | |
| 357 | +sq905 2770:9120 All 24 known cameras with this ID | |
| 358 | +sq905c 2770:913d All 4 known cameras with this ID | |
| 348 | 359 | spca500 2899:012c Toptro Industrial |
| 349 | 360 | ov519 8020:ef04 ov519 |
| 350 | 361 | spca508 8086:0110 Intel Easy PC Camera |
| @@ -599,99 +599,13 @@ video_device::minor fields. · 598 unmodified lines | ||
| 599 | 599 | video buffer helper functions |
| 600 | 600 | ----------------------------- |
| 601 | 601 | |
| 602 | −The v4l2 core API provides a standard method for dealing with video | |
| 603 | −buffers. Those methods allow a driver to implement read(), mmap() and | |
| 604 | −overlay() on a consistent way. | |
| 605 | − | |
| 606 | −There are currently methods for using video buffers on devices that | |
| 607 | −supports DMA with scatter/gather method (videobuf-dma-sg), DMA with | |
| 608 | −linear access (videobuf-dma-contig), and vmalloced buffers, mostly | |
| 609 | −used on USB drivers (videobuf-vmalloc). | |
| 610 | − | |
| 611 | −Any driver using videobuf should provide operations (callbacks) for | |
| 612 | −four handlers: | |
| 613 | − | |
| 614 | −ops->buf_setup - calculates the size of the video buffers and avoid they | |
| 615 | − to waste more than some maximum limit of RAM; | |
| 616 | −ops->buf_prepare - fills the video buffer structs and calls | |
| 617 | − videobuf_iolock() to alloc and prepare mmaped memory; | |
| 618 | −ops->buf_queue - advices the driver that another buffer were | |
| 619 | − requested (by read() or by QBUF); | |
| 620 | −ops->buf_release - frees any buffer that were allocated. | |
| 621 | − | |
| 622 | −In order to use it, the driver need to have a code (generally called at | |
| 623 | −interrupt context) that will properly handle the buffer request lists, | |
| 624 | −announcing that a new buffer were filled. | |
| 625 | − | |
| 626 | −The irq handling code should handle the videobuf task lists, in order | |
| 627 | −to advice videobuf that a new frame were filled, in order to honor to a | |
| 628 | −request. The code is generally like this one: | |
| 629 | − if (list_empty(&dma_q->active)) | |
| 630 | − return; | |
| 631 | − | |
| 632 | − buf = list_entry(dma_q->active.next, struct vbuffer, vb.queue); | |
| 633 | − | |
| 634 | − if (!waitqueue_active(&buf->vb.done)) | |
| 635 | − return; | |
| 636 | − | |
| 637 | − /* Some logic to handle the buf may be needed here */ | |
| 638 | − | |
| 639 | − list_del(&buf->vb.queue); | |
| 640 | − do_gettimeofday(&buf->vb.ts); | |
| 641 | − wake_up(&buf->vb.done); | |
| 642 | − | |
| 643 | −Those are the videobuffer functions used on drivers, implemented on | |
| 644 | −videobuf-core: | |
| 645 | − | |
| 646 | −- Videobuf init functions | |
| 647 | − videobuf_queue_sg_init() | |
| 648 | − Initializes the videobuf infrastructure. This function should be | |
| 649 | − called before any other videobuf function on drivers that uses DMA | |
| 650 | − Scatter/Gather buffers. | |
| 651 | − | |
| 652 | − videobuf_queue_dma_contig_init | |
| 653 | − Initializes the videobuf infrastructure. This function should be | |
| 654 | − called before any other videobuf function on drivers that need DMA | |
| 655 | − contiguous buffers. | |
| 656 | − | |
| 657 | − videobuf_queue_vmalloc_init() | |
| 658 | − Initializes the videobuf infrastructure. This function should be | |
| 659 | − called before any other videobuf function on USB (and other drivers) | |
| 660 | − that need a vmalloced type of videobuf. | |
| 661 | − | |
| 662 | −- videobuf_iolock() | |
| 663 | − Prepares the videobuf memory for the proper method (read, mmap, overlay). | |
| 664 | − | |
| 665 | −- videobuf_queue_is_busy() | |
| 666 | − Checks if a videobuf is streaming. | |
| 667 | − | |
| 668 | −- videobuf_queue_cancel() | |
| 669 | − Stops video handling. | |
| 670 | − | |
| 671 | −- videobuf_mmap_free() | |
| 672 | − frees mmap buffers. | |
| 673 | − | |
| 674 | −- videobuf_stop() | |
| 675 | − Stops video handling, ends mmap and frees mmap and other buffers. | |
| 676 | − | |
| 677 | −- V4L2 api functions. Those functions correspond to VIDIOC_foo ioctls: | |
| 678 | − videobuf_reqbufs(), videobuf_querybuf(), videobuf_qbuf(), | |
| 679 | − videobuf_dqbuf(), videobuf_streamon(), videobuf_streamoff(). | |
| 680 | − | |
| 681 | −- V4L1 api function (corresponds to VIDIOCMBUF ioctl): | |
| 682 | − videobuf_cgmbuf() | |
| 683 | − This function is used to provide backward compatibility with V4L1 | |
| 684 | − API. | |
| 685 | − | |
| 686 | −- Some help functions for read()/poll() operations: | |
| 687 | − videobuf_read_stream() | |
| 688 | − For continuous stream read() | |
| 689 | − videobuf_read_one() | |
| 690 | − For snapshot read() | |
| 691 | − videobuf_poll_stream() | |
| 692 | − polling help function | |
| 693 | − | |
| 694 | −The better way to understand it is to take a look at vivi driver. One | |
| 695 | −of the main reasons for vivi is to be a videobuf usage example. the | |
| 696 | −vivi_thread_tick() does the task that the IRQ callback would do on PCI | |
| 697 | −drivers (or the irq callback on USB). | |
| 602 | +The v4l2 core API provides a set of standard methods (called "videobuf") | |
| 603 | +for dealing with video buffers. Those methods allow a driver to implement | |
| 604 | +read(), mmap() and overlay() in a consistent way. There are currently | |
| 605 | +methods for using video buffers on devices that supports DMA with | |
| 606 | +scatter/gather method (videobuf-dma-sg), DMA with linear access | |
| 607 | +(videobuf-dma-contig), and vmalloced buffers, mostly used on USB drivers | |
| 608 | +(videobuf-vmalloc). | |
| 609 | + | |
| 610 | +Please see Documentation/video4linux/videobuf for more information on how | |
| 611 | +to use the videobuf layer. | |
| @@ -0,0 +1,360 @@ | ||
| 1 | +An introduction to the videobuf layer | |
| 2 | +Jonathan Corbet <corbet@lwn.net> | |
| 3 | +Current as of 2.6.33 | |
| 4 | + | |
| 5 | +The videobuf layer functions as a sort of glue layer between a V4L2 driver | |
| 6 | +and user space. It handles the allocation and management of buffers for | |
| 7 | +the storage of video frames. There is a set of functions which can be used | |
| 8 | +to implement many of the standard POSIX I/O system calls, including read(), | |
| 9 | +poll(), and, happily, mmap(). Another set of functions can be used to | |
| 10 | +implement the bulk of the V4L2 ioctl() calls related to streaming I/O, | |
| 11 | +including buffer allocation, queueing and dequeueing, and streaming | |
| 12 | +control. Using videobuf imposes a few design decisions on the driver | |
| 13 | +author, but the payback comes in the form of reduced code in the driver and | |
| 14 | +a consistent implementation of the V4L2 user-space API. | |
| 15 | + | |
| 16 | +Buffer types | |
| 17 | + | |
| 18 | +Not all video devices use the same kind of buffers. In fact, there are (at | |
| 19 | +least) three common variations: | |
| 20 | + | |
| 21 | + - Buffers which are scattered in both the physical and (kernel) virtual | |
| 22 | + address spaces. (Almost) all user-space buffers are like this, but it | |
| 23 | + makes great sense to allocate kernel-space buffers this way as well when | |
| 24 | + it is possible. Unfortunately, it is not always possible; working with | |
| 25 | + this kind of buffer normally requires hardware which can do | |
| 26 | + scatter/gather DMA operations. | |
| 27 | + | |
| 28 | + - Buffers which are physically scattered, but which are virtually | |
| 29 | + contiguous; buffers allocated with vmalloc(), in other words. These | |
| 30 | + buffers are just as hard to use for DMA operations, but they can be | |
| 31 | + useful in situations where DMA is not available but virtually-contiguous | |
| 32 | + buffers are convenient. | |
| 33 | + | |
| 34 | + - Buffers which are physically contiguous. Allocation of this kind of | |
| 35 | + buffer can be unreliable on fragmented systems, but simpler DMA | |
| 36 | + controllers cannot deal with anything else. | |
| 37 | + | |
| 38 | +Videobuf can work with all three types of buffers, but the driver author | |
| 39 | +must pick one at the outset and design the driver around that decision. | |
| 40 | + | |
| 41 | +[It's worth noting that there's a fourth kind of buffer: "overlay" buffers | |
| 42 | +which are located within the system's video memory. The overlay | |
| 43 | +functionality is considered to be deprecated for most use, but it still | |
| 44 | +shows up occasionally in system-on-chip drivers where the performance | |
| 45 | +benefits merit the use of this technique. Overlay buffers can be handled | |
| 46 | +as a form of scattered buffer, but there are very few implementations in | |
| 47 | +the kernel and a description of this technique is currently beyond the | |
| 48 | +scope of this document.] | |
| 49 | + | |
| 50 | +Data structures, callbacks, and initialization | |
| 51 | + | |
| 52 | +Depending on which type of buffers are being used, the driver should | |
| 53 | +include one of the following files: | |
| 54 | + | |
| 55 | + <media/videobuf-dma-sg.h> /* Physically scattered */ | |
| 56 | + <media/videobuf-vmalloc.h> /* vmalloc() buffers */ | |
| 57 | + <media/videobuf-dma-contig.h> /* Physically contiguous */ | |
| 58 | + | |
| 59 | +The driver's data structure describing a V4L2 device should include a | |
| 60 | +struct videobuf_queue instance for the management of the buffer queue, | |
| 61 | +along with a list_head for the queue of available buffers. There will also | |
| 62 | +need to be an interrupt-safe spinlock which is used to protect (at least) | |
| 63 | +the queue. | |
| 64 | + | |
| 65 | +The next step is to write four simple callbacks to help videobuf deal with | |
| 66 | +the management of buffers: | |
| 67 | + | |
| 68 | + struct videobuf_queue_ops { | |
| 69 | + int (*buf_setup)(struct videobuf_queue *q, | |
| 70 | + unsigned int *count, unsigned int *size); | |
| 71 | + int (*buf_prepare)(struct videobuf_queue *q, | |
| 72 | + struct videobuf_buffer *vb, | |
| 73 | + enum v4l2_field field); | |
| 74 | + void (*buf_queue)(struct videobuf_queue *q, | |
| 75 | + struct videobuf_buffer *vb); | |
| 76 | + void (*buf_release)(struct videobuf_queue *q, | |
| 77 | + struct videobuf_buffer *vb); | |
| 78 | + }; | |
| 79 | + | |
| 80 | +buf_setup() is called early in the I/O process, when streaming is being | |
| 81 | +initiated; its purpose is to tell videobuf about the I/O stream. The count | |
| 82 | +parameter will be a suggested number of buffers to use; the driver should | |
| 83 | +check it for rationality and adjust it if need be. As a practical rule, a | |
| 84 | +minimum of two buffers are needed for proper streaming, and there is | |
| 85 | +usually a maximum (which cannot exceed 32) which makes sense for each | |
| 86 | +device. The size parameter should be set to the expected (maximum) size | |
| 87 | +for each frame of data. | |
| 88 | + | |
| 89 | +Each buffer (in the form of a struct videobuf_buffer pointer) will be | |
| 90 | +passed to buf_prepare(), which should set the buffer's size, width, height, | |
| 91 | +and field fields properly. If the buffer's state field is | |
| 92 | +VIDEOBUF_NEEDS_INIT, the driver should pass it to: | |
| 93 | + | |
| 94 | + int videobuf_iolock(struct videobuf_queue* q, struct videobuf_buffer *vb, | |
| 95 | + struct v4l2_framebuffer *fbuf); | |
| 96 | + | |
| 97 | +Among other things, this call will usually allocate memory for the buffer. | |
| 98 | +Finally, the buf_prepare() function should set the buffer's state to | |
| 99 | +VIDEOBUF_PREPARED. | |
| 100 | + | |
| 101 | +When a buffer is queued for I/O, it is passed to buf_queue(), which should | |
| 102 | +put it onto the driver's list of available buffers and set its state to | |
| 103 | +VIDEOBUF_QUEUED. Note that this function is called with the queue spinlock | |
| 104 | +held; if it tries to acquire it as well things will come to a screeching | |
| 105 | +halt. Yes, this is the voice of experience. Note also that videobuf may | |
| 106 | +wait on the first buffer in the queue; placing other buffers in front of it | |
| 107 | +could again gum up the works. So use list_add_tail() to enqueue buffers. | |
| 108 | + | |
| 109 | +Finally, buf_release() is called when a buffer is no longer intended to be | |
| 110 | +used. The driver should ensure that there is no I/O active on the buffer, | |
| 111 | +then pass it to the appropriate free routine(s): | |
| 112 | + | |
| 113 | + /* Scatter/gather drivers */ | |
| 114 | + int videobuf_dma_unmap(struct videobuf_queue *q, | |
| 115 | + struct videobuf_dmabuf *dma); | |
| 116 | + int videobuf_dma_free(struct videobuf_dmabuf *dma); | |
| 117 | + | |
| 118 | + /* vmalloc drivers */ | |
| 119 | + void videobuf_vmalloc_free (struct videobuf_buffer *buf); | |
| 120 | + | |
| 121 | + /* Contiguous drivers */ | |
| 122 | + void videobuf_dma_contig_free(struct videobuf_queue *q, | |
| 123 | + struct videobuf_buffer *buf); | |
| 124 | + | |
| 125 | +One way to ensure that a buffer is no longer under I/O is to pass it to: | |
| 126 | + | |
| 127 | + int videobuf_waiton(struct videobuf_buffer *vb, int non_blocking, int intr); | |
| 128 | + | |
| 129 | +Here, vb is the buffer, non_blocking indicates whether non-blocking I/O | |
| 130 | +should be used (it should be zero in the buf_release() case), and intr | |
| 131 | +controls whether an interruptible wait is used. | |
| 132 | + | |
| 133 | +File operations | |
| 134 | + | |
| 135 | +At this point, much of the work is done; much of the rest is slipping | |
| 136 | +videobuf calls into the implementation of the other driver callbacks. The | |
| 137 | +first step is in the open() function, which must initialize the | |
| 138 | +videobuf queue. The function to use depends on the type of buffer used: | |
| 139 | + | |
| 140 | + void videobuf_queue_sg_init(struct videobuf_queue *q, | |
| 141 | + struct videobuf_queue_ops *ops, | |
| 142 | + struct device *dev, | |
| 143 | + spinlock_t *irqlock, | |
| 144 | + enum v4l2_buf_type type, | |
| 145 | + enum v4l2_field field, | |
| 146 | + unsigned int msize, | |
| 147 | + void *priv); | |
| 148 | + | |
| 149 | + void videobuf_queue_vmalloc_init(struct videobuf_queue *q, | |
| 150 | + struct videobuf_queue_ops *ops, | |
| 151 | + struct device *dev, | |
| 152 | + spinlock_t *irqlock, | |
| 153 | + enum v4l2_buf_type type, | |
| 154 | + enum v4l2_field field, | |
| 155 | + unsigned int msize, | |
| 156 | + void *priv); | |
| 157 | + | |
| 158 | + void videobuf_queue_dma_contig_init(struct videobuf_queue *q, | |
| 159 | + struct videobuf_queue_ops *ops, | |
| 160 | + struct device *dev, | |
| 161 | + spinlock_t *irqlock, | |
| 162 | + enum v4l2_buf_type type, | |
| 163 | + enum v4l2_field field, | |
| 164 | + unsigned int msize, | |
| 165 | + void *priv); | |
| 166 | + | |
| 167 | +In each case, the parameters are the same: q is the queue structure for the | |
| 168 | +device, ops is the set of callbacks as described above, dev is the device | |
| 169 | +structure for this video device, irqlock is an interrupt-safe spinlock to | |
| 170 | +protect access to the data structures, type is the buffer type used by the | |
| 171 | +device (cameras will use V4L2_BUF_TYPE_VIDEO_CAPTURE, for example), field | |
| 172 | +describes which field is being captured (often V4L2_FIELD_NONE for | |
| 173 | +progressive devices), msize is the size of any containing structure used | |
| 174 | +around struct videobuf_buffer, and priv is a private data pointer which | |
| 175 | +shows up in the priv_data field of struct videobuf_queue. Note that these | |
| 176 | +are void functions which, evidently, are immune to failure. | |
| 177 | + | |
| 178 | +V4L2 capture drivers can be written to support either of two APIs: the | |
| 179 | +read() system call and the rather more complicated streaming mechanism. As | |
| 180 | +a general rule, it is necessary to support both to ensure that all | |
| 181 | +applications have a chance of working with the device. Videobuf makes it | |
| 182 | +easy to do that with the same code. To implement read(), the driver need | |
| 183 | +only make a call to one of: | |
| 184 | + | |
| 185 | + ssize_t videobuf_read_one(struct videobuf_queue *q, | |
| 186 | + char __user *data, size_t count, | |
| 187 | + loff_t *ppos, int nonblocking); | |
| 188 | + | |
| 189 | + ssize_t videobuf_read_stream(struct videobuf_queue *q, | |
| 190 | + char __user *data, size_t count, | |
| 191 | + loff_t *ppos, int vbihack, int nonblocking); | |
| 192 | + | |
| 193 | +Either one of these functions will read frame data into data, returning the | |
| 194 | +amount actually read; the difference is that videobuf_read_one() will only | |
| 195 | +read a single frame, while videobuf_read_stream() will read multiple frames | |
| 196 | +if they are needed to satisfy the count requested by the application. A | |
| 197 | +typical driver read() implementation will start the capture engine, call | |
| 198 | +one of the above functions, then stop the engine before returning (though a | |
| 199 | +smarter implementation might leave the engine running for a little while in | |
| 200 | +anticipation of another read() call happening in the near future). | |
| 201 | + | |
| 202 | +The poll() function can usually be implemented with a direct call to: | |
| 203 | + | |
| 204 | + unsigned int videobuf_poll_stream(struct file *file, | |
| 205 | + struct videobuf_queue *q, | |
| 206 | + poll_table *wait); | |
| 207 | + | |
| 208 | +Note that the actual wait queue eventually used will be the one associated | |
| 209 | +with the first available buffer. | |
| 210 | + | |
| 211 | +When streaming I/O is done to kernel-space buffers, the driver must support | |
| 212 | +the mmap() system call to enable user space to access the data. In many | |
| 213 | +V4L2 drivers, the often-complex mmap() implementation simplifies to a | |
| 214 | +single call to: | |
| 215 | + | |
| 216 | + int videobuf_mmap_mapper(struct videobuf_queue *q, | |
| 217 | + struct vm_area_struct *vma); | |
| 218 | + | |
| 219 | +Everything else is handled by the videobuf code. | |
| 220 | + | |
| 221 | +The release() function requires two separate videobuf calls: | |
| 222 | + | |
| 223 | + void videobuf_stop(struct videobuf_queue *q); | |
| 224 | + int videobuf_mmap_free(struct videobuf_queue *q); | |
| 225 | + | |
| 226 | +The call to videobuf_stop() terminates any I/O in progress - though it is | |
| 227 | +still up to the driver to stop the capture engine. The call to | |
| 228 | +videobuf_mmap_free() will ensure that all buffers have been unmapped; if | |
| 229 | +so, they will all be passed to the buf_release() callback. If buffers | |
| 230 | +remain mapped, videobuf_mmap_free() returns an error code instead. The | |
| 231 | +purpose is clearly to cause the closing of the file descriptor to fail if | |
| 232 | +buffers are still mapped, but every driver in the 2.6.32 kernel cheerfully | |
| 233 | +ignores its return value. | |
| 234 | + | |
| 235 | +ioctl() operations | |
| 236 | + | |
| 237 | +The V4L2 API includes a very long list of driver callbacks to respond to | |
| 238 | +the many ioctl() commands made available to user space. A number of these | |
| 239 | +- those associated with streaming I/O - turn almost directly into videobuf | |
| 240 | +calls. The relevant helper functions are: | |
| 241 | + | |
| 242 | + int videobuf_reqbufs(struct videobuf_queue *q, | |
| 243 | + struct v4l2_requestbuffers *req); | |
| 244 | + int videobuf_querybuf(struct videobuf_queue *q, struct v4l2_buffer *b); | |
| 245 | + int videobuf_qbuf(struct videobuf_queue *q, struct v4l2_buffer *b); | |
| 246 | + int videobuf_dqbuf(struct videobuf_queue *q, struct v4l2_buffer *b, | |
| 247 | + int nonblocking); | |
| 248 | + int videobuf_streamon(struct videobuf_queue *q); | |
| 249 | + int videobuf_streamoff(struct videobuf_queue *q); | |
| 250 | + int videobuf_cgmbuf(struct videobuf_queue *q, struct video_mbuf *mbuf, | |
| 251 | + int count); | |
| 252 | + | |
| 253 | +So, for example, a VIDIOC_REQBUFS call turns into a call to the driver's | |
| 254 | +vidioc_reqbufs() callback which, in turn, usually only needs to locate the | |
| 255 | +proper struct videobuf_queue pointer and pass it to videobuf_reqbufs(). | |
| 256 | +These support functions can replace a great deal of buffer management | |
| 257 | +boilerplate in a lot of V4L2 drivers. | |
| 258 | + | |
| 259 | +The vidioc_streamon() and vidioc_streamoff() functions will be a bit more | |
| 260 | +complex, of course, since they will also need to deal with starting and | |
| 261 | +stopping the capture engine. videobuf_cgmbuf(), called from the driver's | |
| 262 | +vidiocgmbuf() function, only exists if the V4L1 compatibility module has | |
| 263 | +been selected with CONFIG_VIDEO_V4L1_COMPAT, so its use must be surrounded | |
| 264 | +with #ifdef directives. | |
| 265 | + | |
| 266 | +Buffer allocation | |
| 267 | + | |
| 268 | +Thus far, we have talked about buffers, but have not looked at how they are | |
| 269 | +allocated. The scatter/gather case is the most complex on this front. For | |
| 270 | +allocation, the driver can leave buffer allocation entirely up to the | |
| 271 | +videobuf layer; in this case, buffers will be allocated as anonymous | |
| 272 | +user-space pages and will be very scattered indeed. If the application is | |
| 273 | +using user-space buffers, no allocation is needed; the videobuf layer will | |
| 274 | +take care of calling get_user_pages() and filling in the scatterlist array. | |
| 275 | + | |
| 276 | +If the driver needs to do its own memory allocation, it should be done in | |
| 277 | +the vidioc_reqbufs() function, *after* calling videobuf_reqbufs(). The | |
| 278 | +first step is a call to: | |
| 279 | + | |
| 280 | + struct videobuf_dmabuf *videobuf_to_dma(struct videobuf_buffer *buf); | |
| 281 | + | |
| 282 | +The returned videobuf_dmabuf structure (defined in | |
| 283 | +<media/videobuf-dma-sg.h>) includes a couple of relevant fields: | |
| 284 | + | |
| 285 | + struct scatterlist *sglist; | |
| 286 | + int sglen; | |
| 287 | + | |
| 288 | +The driver must allocate an appropriately-sized scatterlist array and | |
| 289 | +populate it with pointers to the pieces of the allocated buffer; sglen | |
| 290 | +should be set to the length of the array. | |
| 291 | + | |
| 292 | +Drivers using the vmalloc() method need not (and cannot) concern themselves | |
| 293 | +with buffer allocation at all; videobuf will handle those details. The | |
| 294 | +same is normally true of contiguous-DMA drivers as well; videobuf will | |
| 295 | +allocate the buffers (with dma_alloc_coherent()) when it sees fit. That | |
| 296 | +means that these drivers may be trying to do high-order allocations at any | |
| 297 | +time, an operation which is not always guaranteed to work. Some drivers | |
| 298 | +play tricks by allocating DMA space at system boot time; videobuf does not | |
| 299 | +currently play well with those drivers. | |
| 300 | + | |
| 301 | +As of 2.6.31, contiguous-DMA drivers can work with a user-supplied buffer, | |
| 302 | +as long as that buffer is physically contiguous. Normal user-space | |
| 303 | +allocations will not meet that criterion, but buffers obtained from other | |
| 304 | +kernel drivers, or those contained within huge pages, will work with these | |
| 305 | +drivers. | |
| 306 | + | |
| 307 | +Filling the buffers | |
| 308 | + | |
| 309 | +The final part of a videobuf implementation has no direct callback - it's | |
| 310 | +the portion of the code which actually puts frame data into the buffers, | |
| 311 | +usually in response to interrupts from the device. For all types of | |
| 312 | +drivers, this process works approximately as follows: | |
| 313 | + | |
| 314 | + - Obtain the next available buffer and make sure that somebody is actually | |
| 315 | + waiting for it. | |
| 316 | + | |
| 317 | + - Get a pointer to the memory and put video data there. | |
| 318 | + | |
| 319 | + - Mark the buffer as done and wake up the process waiting for it. | |
| 320 | + | |
| 321 | +Step (1) above is done by looking at the driver-managed list_head structure | |
| 322 | +- the one which is filled in the buf_queue() callback. Because starting | |
| 323 | +the engine and enqueueing buffers are done in separate steps, it's possible | |
| 324 | +for the engine to be running without any buffers available - in the | |
| 325 | +vmalloc() case especially. So the driver should be prepared for the list | |
| 326 | +to be empty. It is equally possible that nobody is yet interested in the | |
| 327 | +buffer; the driver should not remove it from the list or fill it until a | |
| 328 | +process is waiting on it. That test can be done by examining the buffer's | |
| 329 | +done field (a wait_queue_head_t structure) with waitqueue_active(). | |
| 330 | + | |
| 331 | +A buffer's state should be set to VIDEOBUF_ACTIVE before being mapped for | |
| 332 | +DMA; that ensures that the videobuf layer will not try to do anything with | |
| 333 | +it while the device is transferring data. | |
| 334 | + | |
| 335 | +For scatter/gather drivers, the needed memory pointers will be found in the | |
| 336 | +scatterlist structure described above. Drivers using the vmalloc() method | |
| 337 | +can get a memory pointer with: | |
| 338 | + | |
| 339 | + void *videobuf_to_vmalloc(struct videobuf_buffer *buf); | |
| 340 | + | |
| 341 | +For contiguous DMA drivers, the function to use is: | |
| 342 | + | |
| 343 | + dma_addr_t videobuf_to_dma_contig(struct videobuf_buffer *buf); | |
| 344 | + | |
| 345 | +The contiguous DMA API goes out of its way to hide the kernel-space address | |
| 346 | +of the DMA buffer from drivers. | |
| 347 | + | |
| 348 | +The final step is to set the size field of the relevant videobuf_buffer | |
| 349 | +structure to the actual size of the captured image, set state to | |
| 350 | +VIDEOBUF_DONE, then call wake_up() on the done queue. At this point, the | |
| 351 | +buffer is owned by the videobuf layer and the driver should not touch it | |
| 352 | +again. | |
| 353 | + | |
| 354 | +Developers who are interested in more information can go into the relevant | |
| 355 | +header files; there are a few low-level functions declared there which have | |
| 356 | +not been talked about here. Also worthwhile is the vivi driver | |
| 357 | +(drivers/media/video/vivi.c), which is maintained as an example of how V4L2 | |
| 358 | +drivers should be written. Vivi only uses the vmalloc() API, but it's good | |
| 359 | +enough to get started with. Note also that all of these calls are exported | |
| 360 | +GPL-only, so they will not be available to non-GPL kernel modules. | |
| @@ -166,19 +166,13 @@ NUMA · 165 unmodified lines | ||
| 166 | 166 | |
| 167 | 167 | numa=noacpi Don't parse the SRAT table for NUMA setup |
| 168 | 168 | |
| 169 | − numa=fake=CMDLINE | |
| 170 | − If a number, fakes CMDLINE nodes and ignores NUMA setup of the | |
| 171 | − actual machine. Otherwise, system memory is configured | |
| 172 | − depending on the sizes and coefficients listed. For example: | |
| 173 | − numa=fake=2*512,1024,4*256,*128 | |
| 174 | − gives two 512M nodes, a 1024M node, four 256M nodes, and the | |
| 175 | − rest split into 128M chunks. If the last character of CMDLINE | |
| 176 | − is a *, the remaining memory is divided up equally among its | |
| 177 | − coefficient: | |
| 178 | − numa=fake=2*512,2* | |
| 179 | − gives two 512M nodes and the rest split into two nodes. | |
| 180 | − Otherwise, the remaining system RAM is allocated to an | |
| 181 | − additional node. | |
| 169 | + numa=fake=<size>[MG] | |
| 170 | + If given as a memory unit, fills all system RAM with nodes of | |
| 171 | + size interleaved over physical nodes. | |
| 172 | + | |
| 173 | + numa=fake=<N> | |
| 174 | + If given as an integer, fills all system RAM with N fake nodes | |
| 175 | + interleaved over physical nodes. | |
| 182 | 176 | |
| 183 | 177 | ACPI |
| 184 | 178 | |
| @@ -221,6 +221,7 @@ F: drivers/net/acenic* · 220 unmodified lines | ||
| 221 | 221 | |
| 222 | 222 | ACER ASPIRE ONE TEMPERATURE AND FAN DRIVER |
| 223 | 223 | M: Peter Feuerer <peter@piie.net> |
| 224 | +L: platform-driver-x86@vger.kernel.org | |
| 224 | 225 | W: http://piie.net/?section=acerhdf |
| 225 | 226 | S: Maintained |
| 226 | 227 | F: drivers/platform/x86/acerhdf.c |
| @@ -228,6 +229,7 @@ F: drivers/platform/x86/acerhdf.c · 1 unmodified line | ||
| 228 | 229 | ACER WMI LAPTOP EXTRAS |
| 229 | 230 | M: Carlos Corbacho <carlos@strangeworlds.co.uk> |
| 230 | 231 | L: aceracpi@googlegroups.com (subscribers-only) |
| 232 | +L: platform-driver-x86@vger.kernel.org | |
| 231 | 233 | W: http://code.google.com/p/aceracpi |
| 232 | 234 | S: Maintained |
| 233 | 235 | F: drivers/platform/x86/acer-wmi.c |
| @@ -288,7 +290,7 @@ F: drivers/acpi/video.c · 54 unmodified lines | ||
| 288 | 290 | |
| 289 | 291 | ACPI WMI DRIVER |
| 290 | 292 | M: Carlos Corbacho <carlos@strangeworlds.co.uk> |
| 291 | −L: linux-acpi@vger.kernel.org | |
| 293 | +L: platform-driver-x86@vger.kernel.org | |
| 292 | 294 | W: http://www.lesswatts.org/projects/acpi/ |
| 293 | 295 | S: Maintained |
| 294 | 296 | F: drivers/platform/x86/wmi.c |
| @@ -968,6 +970,7 @@ ASUS ACPI EXTRAS DRIVER · 673 unmodified lines | ||
| 968 | 970 | M: Corentin Chary <corentincj@iksaif.net> |
| 969 | 971 | M: Karol Kozimor <sziwan@users.sourceforge.net> |
| 970 | 972 | L: acpi4asus-user@lists.sourceforge.net |
| 973 | +L: platform-driver-x86@vger.kernel.org | |
| 971 | 974 | W: http://acpi4asus.sf.net |
| 972 | 975 | S: Maintained |
| 973 | 976 | F: drivers/platform/x86/asus_acpi.c |
| @@ -981,6 +984,7 @@ F: drivers/hwmon/asb100.c · 7 unmodified lines | ||
| 981 | 984 | ASUS LAPTOP EXTRAS DRIVER |
| 982 | 985 | M: Corentin Chary <corentincj@iksaif.net> |
| 983 | 986 | L: acpi4asus-user@lists.sourceforge.net |
| 987 | +L: platform-driver-x86@vger.kernel.org | |
| 984 | 988 | W: http://acpi4asus.sf.net |
| 985 | 989 | S: Maintained |
| 986 | 990 | F: drivers/platform/x86/asus-laptop.c |
| @@ -1473,6 +1477,7 @@ F: drivers/scsi/fnic/ · 486 unmodified lines | ||
| 1473 | 1477 | CMPC ACPI DRIVER |
| 1474 | 1478 | M: Thadeu Lima de Souza Cascardo <cascardo@holoscopio.com> |
| 1475 | 1479 | M: Daniel Oliveira Nascimento <don@syst.com.br> |
| 1480 | +L: platform-driver-x86@vger.kernel.org | |
| 1476 | 1481 | S: Supported |
| 1477 | 1482 | F: drivers/platform/x86/classmate-laptop.c |
| 1478 | 1483 | |
| @@ -1516,6 +1521,7 @@ F: drivers/pci/hotplug/cpcihp_generic.c · 37 unmodified lines | ||
| 1516 | 1521 | |
| 1517 | 1522 | COMPAL LAPTOP SUPPORT |
| 1518 | 1523 | M: Cezary Jackiewicz <cezary.jackiewicz@gmail.com> |
| 1524 | +L: platform-driver-x86@vger.kernel.org | |
| 1519 | 1525 | S: Maintained |
| 1520 | 1526 | F: drivers/platform/x86/compal-laptop.c |
| 1521 | 1527 | |
| @@ -1746,6 +1752,7 @@ F: drivers/net/defxx.* · 224 unmodified lines | ||
| 1746 | 1752 | |
| 1747 | 1753 | DELL LAPTOP DRIVER |
| 1748 | 1754 | M: Matthew Garrett <mjg59@srcf.ucam.org> |
| 1755 | +L: platform-driver-x86@vger.kernel.org | |
| 1749 | 1756 | S: Maintained |
| 1750 | 1757 | F: drivers/platform/x86/dell-laptop.c |
| 1751 | 1758 | |
| @@ -2028,6 +2035,7 @@ F: drivers/edac/r82600_edac.c · 276 unmodified lines | ||
| 2028 | 2035 | EEEPC LAPTOP EXTRAS DRIVER |
| 2029 | 2036 | M: Corentin Chary <corentincj@iksaif.net> |
| 2030 | 2037 | L: acpi4asus-user@lists.sourceforge.net |
| 2038 | +L: platform-driver-x86@vger.kernel.org | |
| 2031 | 2039 | W: http://acpi4asus.sf.net |
| 2032 | 2040 | S: Maintained |
| 2033 | 2041 | F: drivers/platform/x86/eeepc-laptop.c |
| @@ -2141,6 +2149,17 @@ S: Supported · 107 unmodified lines | ||
| 2141 | 2149 | F: Documentation/fault-injection/ |
| 2142 | 2150 | F: lib/fault-inject.c |
| 2143 | 2151 | |
| 2152 | +FCOE SUBSYSTEM (libfc, libfcoe, fcoe) | |
| 2153 | +M: Robert Love <robert.w.love@intel.com> | |
| 2154 | +L: devel@open-fcoe.org | |
| 2155 | +W: www.Open-FCoE.org | |
| 2156 | +S: Supported | |
| 2157 | +F: drivers/scsi/libfc/ | |
| 2158 | +F: drivers/scsi/fcoe/ | |
| 2159 | +F: include/scsi/fc/ | |
| 2160 | +F: include/scsi/libfc.h | |
| 2161 | +F: include/scsi/libfcoe.h | |
| 2162 | + | |
| 2144 | 2163 | FILE LOCKING (flock() and fcntl()/lockf()) |
| 2145 | 2164 | M: Matthew Wilcox <matthew@wil.cx> |
| 2146 | 2165 | L: linux-fsdevel@vger.kernel.org |
| @@ -2295,7 +2314,7 @@ F: arch/frv/ · 148 unmodified lines | ||
| 2295 | 2314 | |
| 2296 | 2315 | FUJITSU LAPTOP EXTRAS |
| 2297 | 2316 | M: Jonathan Woithe <jwoithe@physics.adelaide.edu.au> |
| 2298 | −L: linux-acpi@vger.kernel.org | |
| 2317 | +L: platform-driver-x86@vger.kernel.org | |
| 2299 | 2318 | S: Maintained |
| 2300 | 2319 | F: drivers/platform/x86/fujitsu-laptop.c |
| 2301 | 2320 | |
| @@ -2372,6 +2391,12 @@ F: Documentation/isdn/README.gigaset · 70 unmodified lines | ||
| 2372 | 2391 | F: drivers/isdn/gigaset/ |
| 2373 | 2392 | F: include/linux/gigaset_dev.h |
| 2374 | 2393 | |
| 2394 | +GRETH 10/100/1G Ethernet MAC device driver | |
| 2395 | +M: Kristoffer Glembo <kristoffer@gaisler.com> | |
| 2396 | +L: netdev@vger.kernel.org | |
| 2397 | +S: Maintained | |
| 2398 | +F: drivers/net/greth* | |
| 2399 | + | |
| 2375 | 2400 | HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER |
| 2376 | 2401 | M: Frank Seidel <frank@f-seidel.de> |
| 2377 | 2402 | L: lm-sensors@lm-sensors.org |
| @@ -2393,6 +2418,18 @@ L: linuxppc-dev@ozlabs.org · 15 unmodified lines | ||
| 2393 | 2418 | S: Odd Fixes |
| 2394 | 2419 | F: drivers/char/hvc_* |
| 2395 | 2420 | |
| 2421 | +VIRTIO CONSOLE DRIVER | |
| 2422 | +M: Amit Shah <amit.shah@redhat.com> | |
| 2423 | +L: virtualization@lists.linux-foundation.org | |
| 2424 | +S: Maintained | |
| 2425 | +F: drivers/char/virtio_console.c | |
| 2426 | + | |
| 2427 | +iSCSI BOOT FIRMWARE TABLE (iBFT) DRIVER | |
| 2428 | +M: Peter Jones <pjones@redhat.com> | |
| 2429 | +M: Konrad Rzeszutek Wilk <konrad@kernel.org> | |
| 2430 | +S: Maintained | |
| 2431 | +F: drivers/firmware/iscsi_ibft* | |
| 2432 | + | |
| 2396 | 2433 | GSPCA FINEPIX SUBDRIVER |
| 2397 | 2434 | M: Frank Zago <frank@zago.net> |
| 2398 | 2435 | L: linux-media@vger.kernel.org |
| @@ -2561,6 +2598,7 @@ F: drivers/net/wireless/hostap/ · 162 unmodified lines | ||
| 2561 | 2598 | |
| 2562 | 2599 | HP COMPAQ TC1100 TABLET WMI EXTRAS DRIVER |
| 2563 | 2600 | M: Carlos Corbacho <carlos@strangeworlds.co.uk> |
| 2601 | +L: platform-driver-x86@vger.kernel.org | |
| 2564 | 2602 | S: Odd Fixes |
| 2565 | 2603 | F: drivers/platform/x86/tc1100-wmi.c |
| 2566 | 2604 | |
| @@ -2771,7 +2809,7 @@ F: drivers/video/i810/ · 204 unmodified lines | ||
| 2771 | 2809 | |
| 2772 | 2810 | INTEL MENLOW THERMAL DRIVER |
| 2773 | 2811 | M: Sujith Thomas <sujith.thomas@intel.com> |
| 2774 | −L: linux-acpi@vger.kernel.org | |
| 2812 | +L: platform-driver-x86@vger.kernel.org | |
| 2775 | 2813 | W: http://www.lesswatts.org/projects/acpi/ |
| 2776 | 2814 | S: Supported |
| 2777 | 2815 | F: drivers/platform/x86/intel_menlow.c |
| @@ -3496,9 +3534,9 @@ F: drivers/net/mv643xx_eth.* · 718 unmodified lines | ||
| 3496 | 3534 | F: include/linux/mv643xx.h |
| 3497 | 3535 | |
| 3498 | 3536 | MARVELL MWL8K WIRELESS DRIVER |
| 3499 | −M: Lennert Buytenhek <buytenh@marvell.com> | |
| 3537 | +M: Lennert Buytenhek <buytenh@wantstofly.org> | |
| 3500 | 3538 | L: linux-wireless@vger.kernel.org |
| 3501 | −S: Supported | |
| 3539 | +S: Maintained | |
| 3502 | 3540 | F: drivers/net/wireless/mwl8k.c |
| 3503 | 3541 | |
| 3504 | 3542 | MARVELL SOC MMC/SD/SDIO CONTROLLER DRIVER |
| @@ -3637,6 +3675,7 @@ F: drivers/char/mxser.* · 132 unmodified lines | ||
| 3637 | 3675 | |
| 3638 | 3676 | MSI LAPTOP SUPPORT |
| 3639 | 3677 | M: Lennart Poettering <mzxreary@0pointer.de> |
| 3678 | +L: platform-driver-x86@vger.kernel.org | |
| 3640 | 3679 | W: https://tango.0pointer.de/mailman/listinfo/s270-linux |
| 3641 | 3680 | W: http://0pointer.de/lennart/tchibo.html |
| 3642 | 3681 | S: Maintained |
| @@ -3644,6 +3683,7 @@ F: drivers/platform/x86/msi-laptop.c · 1 unmodified line | ||
| 3644 | 3683 | |
| 3645 | 3684 | MSI WMI SUPPORT |
| 3646 | 3685 | M: Anisse Astier <anisse@astier.eu> |
| 3686 | +L: platform-driver-x86@vger.kernel.org | |
| 3647 | 3687 | S: Supported |
| 3648 | 3688 | F: drivers/platform/x86/msi-wmi.c |
| 3649 | 3689 | |
| @@ -4096,6 +4136,7 @@ F: drivers/i2c/busses/i2c-pasemi.c · 446 unmodified lines | ||
| 4096 | 4136 | |
| 4097 | 4137 | PANASONIC LAPTOP ACPI EXTRAS DRIVER |
| 4098 | 4138 | M: Harald Welte <laforge@gnumonks.org> |
| 4139 | +L: platform-driver-x86@vger.kernel.org | |
| 4099 | 4140 | S: Maintained |
| 4100 | 4141 | F: drivers/platform/x86/panasonic-laptop.c |
| 4101 | 4142 | |
| @@ -4445,6 +4486,13 @@ S: Supported · 343 unmodified lines | ||
| 4445 | 4486 | F: Documentation/networking/LICENSE.qla3xxx |
| 4446 | 4487 | F: drivers/net/qla3xxx.* |
| 4447 | 4488 | |
| 4489 | +QLOGIC QLCNIC (1/10)Gb ETHERNET DRIVER | |
| 4490 | +M: Amit Kumar Salecha <amit.salecha@qlogic.com> | |
| 4491 | +M: linux-driver@qlogic.com | |
| 4492 | +L: netdev@vger.kernel.org | |
| 4493 | +S: Supported | |
| 4494 | +F: drivers/net/qlcnic/ | |
| 4495 | + | |
| 4448 | 4496 | QLOGIC QLGE 10Gb ETHERNET DRIVER |
| 4449 | 4497 | M: Ron Mercer <ron.mercer@qlogic.com> |
| 4450 | 4498 | M: linux-driver@qlogic.com |
| @@ -4509,7 +4557,7 @@ F: drivers/net/wireless/ray* · 58 unmodified lines | ||
| 4509 | 4557 | RCUTORTURE MODULE |
| 4510 | 4558 | M: Josh Triplett <josh@freedesktop.org> |
| 4511 | 4559 | M: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> |
| 4512 | −S: Maintained | |
| 4560 | +S: Supported | |
| 4513 | 4561 | F: Documentation/RCU/torture.txt |
| 4514 | 4562 | F: kernel/rcutorture.c |
| 4515 | 4563 | |
| @@ -4534,11 +4582,12 @@ M: Dipankar Sarma <dipankar@in.ibm.com> · 18 unmodified lines | ||
| 4534 | 4582 | M: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com> |
| 4535 | 4583 | W: http://www.rdrop.com/users/paulmck/rclock/ |
| 4536 | 4584 | S: Supported |
| 4537 | −F: Documentation/RCU/rcu.txt | |
| 4538 | −F: Documentation/RCU/rcuref.txt | |
| 4539 | −F: include/linux/rcupdate.h | |
| 4540 | −F: include/linux/srcu.h | |
| 4541 | −F: kernel/rcupdate.c | |
| 4585 | +F: Documentation/RCU/ | |
| 4586 | +F: include/linux/rcu* | |
| 4587 | +F: include/linux/srcu* | |
| 4588 | +F: kernel/rcu* | |
| 4589 | +F: kernel/srcu* | |
| 4590 | +X: kernel/rcutorture.c | |
| 4542 | 4591 | |
| 4543 | 4592 | REAL TIME CLOCK DRIVER |
| 4544 | 4593 | M: Paul Gortmaker <p_gortmaker@yahoo.com> |
| @@ -4676,6 +4725,13 @@ F: drivers/media/common/saa7146* · 131 unmodified lines | ||
| 4676 | 4725 | F: drivers/media/video/*7146* |
| 4677 | 4726 | F: include/media/*7146* |
| 4678 | 4727 | |
| 4728 | +TLG2300 VIDEO4LINUX-2 DRIVER | |
| 4729 | +M: Huang Shijie <shijie8@gmail.com> | |
| 4730 | +M: Kang Yong <kangyong@telegent.com> | |
| 4731 | +M: Zhang Xiaobing <xbzhang@telegent.com> | |
| 4732 | +S: Supported | |
| 4733 | +F: drivers/media/video/tlg2300 | |
| 4734 | + | |
| 4679 | 4735 | SC1200 WDT DRIVER |
| 4680 | 4736 | M: Zwane Mwaikambo <zwane@arm.linux.org.uk> |
| 4681 | 4737 | S: Maintained |
| @@ -4831,6 +4887,8 @@ F: drivers/scsi/be2iscsi/ · 149 unmodified lines | ||
| 4831 | 4887 | SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER |
| 4832 | 4888 | M: Sathya Perla <sathyap@serverengines.com> |
| 4833 | 4889 | M: Subbu Seetharaman <subbus@serverengines.com> |
| 4890 | +M: Sarveshwar Bandi <sarveshwarb@serverengines.com> | |
| 4891 | +M: Ajit Khaparde <ajitk@serverengines.com> | |
| 4834 | 4892 | L: netdev@vger.kernel.org |
| 4835 | 4893 | W: http://www.serverengines.com |
| 4836 | 4894 | S: Supported |
| @@ -5034,7 +5092,7 @@ F: include/linux/ssb/ · 197 unmodified lines | ||
| 5034 | 5092 | |
| 5035 | 5093 | SONY VAIO CONTROL DEVICE DRIVER |
| 5036 | 5094 | M: Mattia Dongili <malattia@linux.it> |
| 5037 | −L: linux-acpi@vger.kernel.org | |
| 5095 | +L: platform-driver-x86@vger.kernel.org | |
| 5038 | 5096 | W: http://www.linux.it/~malattia/wiki/index.php/Sony_drivers |
| 5039 | 5097 | S: Maintained |
| 5040 | 5098 | F: Documentation/laptops/sony-laptop.txt |
| @@ -5240,6 +5298,7 @@ F: arch/xtensa/ · 199 unmodified lines | ||
| 5240 | 5298 | THINKPAD ACPI EXTRAS DRIVER |
| 5241 | 5299 | M: Henrique de Moraes Holschuh <ibm-acpi@hmh.eng.br> |
| 5242 | 5300 | L: ibm-acpi-devel@lists.sourceforge.net |
| 5301 | +L: platform-driver-x86@vger.kernel.org | |
| 5243 | 5302 | W: http://ibm-acpi.sourceforge.net |
| 5244 | 5303 | W: http://thinkwiki.org/wiki/Ibm-acpi |
| 5245 | 5304 | T: git git://repo.or.cz/linux-2.6/linux-acpi-2.6/ibm-acpi-2.6.git |
| @@ -5293,10 +5352,12 @@ F: security/tomoyo/ · 47 unmodified lines | ||
| 5293 | 5352 | |
| 5294 | 5353 | TOPSTAR LAPTOP EXTRAS DRIVER |
| 5295 | 5354 | M: Herton Ronaldo Krzesinski <herton@mandriva.com.br> |
| 5355 | +L: platform-driver-x86@vger.kernel.org | |
| 5296 | 5356 | S: Maintained |
| 5297 | 5357 | F: drivers/platform/x86/topstar-laptop.c |
| 5298 | 5358 | |
| 5299 | 5359 | TOSHIBA ACPI EXTRAS DRIVER |
| 5360 | +L: platform-driver-x86@vger.kernel.org | |
| 5300 | 5361 | S: Orphan |
| 5301 | 5362 | F: drivers/platform/x86/toshiba_acpi.c |
| 5302 | 5363 | |
| @@ -5796,6 +5857,15 @@ S: Maintained · 493 unmodified lines | ||
| 5796 | 5857 | F: Documentation/filesystems/vfat.txt |
| 5797 | 5858 | F: fs/fat/ |
| 5798 | 5859 | |
| 5860 | +VIRTIO HOST (VHOST) | |
| 5861 | +M: "Michael S. Tsirkin" <mst@redhat.com> | |
| 5862 | +L: kvm@vger.kernel.org | |
| 5863 | +L: virtualization@lists.osdl.org | |
| 5864 | +L: netdev@vger.kernel.org | |
| 5865 | +S: Maintained | |
| 5866 | +F: drivers/vhost/ | |
| 5867 | +F: include/linux/vhost.h | |
| 5868 | + | |
| 5799 | 5869 | VIA RHINE NETWORK DRIVER |
| 5800 | 5870 | M: Roger Luethi <rl@hellgate.ch> |
| 5801 | 5871 | S: Maintained |
| @@ -5954,7 +6024,7 @@ S: Maintained · 152 unmodified lines | ||
| 5954 | 6024 | F: drivers/input/misc/wistron_btns.c |
| 5955 | 6025 | |
| 5956 | 6026 | WL1251 WIRELESS DRIVER |
| 5957 | −M: Kalle Valo <kalle.valo@nokia.com> | |
| 6027 | +M: Kalle Valo <kalle.valo@iki.fi> | |
| 5958 | 6028 | L: linux-wireless@vger.kernel.org |
| 5959 | 6029 | W: http://wireless.kernel.org |
| 5960 | 6030 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-testing.git |
| @@ -6024,6 +6094,12 @@ S: Maintained · 63 unmodified lines | ||
| 6024 | 6094 | F: Documentation/x86/ |
| 6025 | 6095 | F: arch/x86/ |
| 6026 | 6096 | |
| 6097 | +X86 PLATFORM DRIVERS | |
| 6098 | +M: Matthew Garrett <mjg@redhat.com> | |
| 6099 | +L: platform-driver-x86@vger.kernel.org | |
| 6100 | +S: Maintained | |
| 6101 | +F: drivers/platform/x86 | |
| 6102 | + | |
| 6027 | 6103 | XEN HYPERVISOR INTERFACE |
| 6028 | 6104 | M: Jeremy Fitzhardinge <jeremy@xensource.com> |
| 6029 | 6105 | M: Chris Wright <chrisw@sous-sol.org> |
| @@ -3,11 +3,9 @@ · 2 unmodified lines | ||
| 3 | 3 | # |
| 4 | 4 | |
| 5 | 5 | config OPROFILE |
| 6 | − tristate "OProfile system profiling (EXPERIMENTAL)" | |
| 6 | + tristate "OProfile system profiling" | |
| 7 | 7 | depends on PROFILING |
| 8 | 8 | depends on HAVE_OPROFILE |
| 9 | − depends on TRACING_SUPPORT | |
| 10 | − select TRACING | |
| 11 | 9 | select RING_BUFFER |
| 12 | 10 | select RING_BUFFER_ALLOW_SWAP |
| 13 | 11 | help |
| @@ -17,20 +15,6 @@ config OPROFILE · 3 unmodified lines | ||
| 17 | 15 | |
| 18 | 16 | If unsure, say N. |
| 19 | 17 | |
| 20 | −config OPROFILE_IBS | |
| 21 | − bool "OProfile AMD IBS support (EXPERIMENTAL)" | |
| 22 | − default n | |
| 23 | − depends on OPROFILE && SMP && X86 | |
| 24 | − help | |
| 25 | − Instruction-Based Sampling (IBS) is a new profiling | |
| 26 | − technique that provides rich, precise program performance | |
| 27 | − information. IBS is introduced by AMD Family10h processors | |
| 28 | − (AMD Opteron Quad-Core processor "Barcelona") to overcome | |
| 29 | − the limitations of conventional performance counter | |
| 30 | − sampling. | |
| 31 | − | |
| 32 | − If unsure, say N. | |
| 33 | − | |
| 34 | 18 | config OPROFILE_EVENT_MULTIPLEX |
| 35 | 19 | bool "OProfile multiplexing support (EXPERIMENTAL)" |
| 36 | 20 | default n |
| @@ -329,7 +329,7 @@ extern pgd_t swapper_pg_dir[1024]; · 328 unmodified lines | ||
| 329 | 329 | * tables contain all the necessary information. |
| 330 | 330 | */ |
| 331 | 331 | extern inline void update_mmu_cache(struct vm_area_struct * vma, |
| 332 | − unsigned long address, pte_t pte) | |
| 332 | + unsigned long address, pte_t *ptep) | |
| 333 | 333 | { |
| 334 | 334 | } |
| 335 | 335 | |
| @@ -126,8 +126,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_final); · 125 unmodified lines | ||
| 126 | 126 | #define MB (1024*KB) |
| 127 | 127 | #define GB (1024*MB) |
| 128 | 128 | |
| 129 | −void | |
| 130 | −pcibios_align_resource(void *data, struct resource *res, | |
| 129 | +resource_size_t | |
| 130 | +pcibios_align_resource(void *data, const struct resource *res, | |
| 131 | 131 | resource_size_t size, resource_size_t align) |
| 132 | 132 | { |
| 133 | 133 | struct pci_dev *dev = data; |
| @@ -184,7 +184,7 @@ pcibios_align_resource(void *data, struct resource *res, · 50 unmodified lines | ||
| 184 | 184 | } |
| 185 | 185 | } |
| 186 | 186 | |
| 187 | − res->start = start; | |
| 187 | + return start; | |
| 188 | 188 | } |
| 189 | 189 | #undef KB |
| 190 | 190 | #undef MB |
| @@ -12,6 +12,7 @@ config ARM · 11 unmodified lines | ||
| 12 | 12 | select HAVE_IDE |
| 13 | 13 | select RTC_LIB |
| 14 | 14 | select SYS_SUPPORTS_APM_EMULATION |
| 15 | + select GENERIC_ATOMIC64 if (!CPU_32v6K) | |
| 15 | 16 | select HAVE_OPROFILE |
| 16 | 17 | select HAVE_ARCH_KGDB |
| 17 | 18 | select HAVE_KPROBES if (!XIP_KERNEL) |
| @@ -20,6 +21,8 @@ config ARM · 2 unmodified lines | ||
| 20 | 21 | select HAVE_GENERIC_DMA_COHERENT |
| 21 | 22 | select HAVE_KERNEL_GZIP |
| 22 | 23 | select HAVE_KERNEL_LZO |
| 24 | + select HAVE_PERF_EVENTS | |
| 25 | + select PERF_USE_VMALLOC | |
| 23 | 26 | help |
| 24 | 27 | The ARM series is a line of low-power-consumption RISC chip designs |
| 25 | 28 | licensed by ARM Ltd and targeted at embedded applications and |
| @@ -52,6 +55,9 @@ config HAVE_TCM · 26 unmodified lines | ||
| 52 | 55 | bool |
| 53 | 56 | select GENERIC_ALLOCATOR |
| 54 | 57 | |
| 58 | +config HAVE_PROC_CPU | |
| 59 | + bool | |
| 60 | + | |
| 55 | 61 | config NO_IOPORT |
| 56 | 62 | bool |
| 57 | 63 | |
| @@ -161,6 +167,11 @@ config ARCH_MTD_XIP · 103 unmodified lines | ||
| 161 | 167 | config GENERIC_HARDIRQS_NO__DO_IRQ |
| 162 | 168 | def_bool y |
| 163 | 169 | |
| 170 | +config ARM_L1_CACHE_SHIFT_6 | |
| 171 | + bool | |
| 172 | + help | |
| 173 | + Setting ARM L1 cache line size to 64 Bytes. | |
| 174 | + | |
| 164 | 175 | if OPROFILE |
| 165 | 176 | |
| 166 | 177 | config OPROFILE_ARMV6 |
| @@ -550,10 +561,20 @@ config ARCH_W90X900 · 383 unmodified lines | ||
| 550 | 561 | <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/ |
| 551 | 562 | ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller> |
| 552 | 563 | |
| 564 | +config ARCH_NUC93X | |
| 565 | + bool "Nuvoton NUC93X CPU" | |
| 566 | + select CPU_ARM926T | |
| 567 | + select HAVE_CLK | |
| 568 | + select COMMON_CLKDEV | |
| 569 | + help | |
| 570 | + Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a | |
| 571 | + low-power and high performance MPEG-4/JPEG multimedia controller chip. | |
| 572 | + | |
| 553 | 573 | config ARCH_PNX4008 |
| 554 | 574 | bool "Philips Nexperia PNX4008 Mobile" |
| 555 | 575 | select CPU_ARM926T |
| 556 | 576 | select HAVE_CLK |
| 577 | + select COMMON_CLKDEV | |
| 557 | 578 | help |
| 558 | 579 | This enables support for Philips PNX4008 mobile platform. |
| 559 | 580 | |
| @@ -638,6 +659,7 @@ config ARCH_S5PC1XX · 78 unmodified lines | ||
| 638 | 659 | select GENERIC_GPIO |
| 639 | 660 | select HAVE_CLK |
| 640 | 661 | select CPU_V7 |
| 662 | + select ARM_L1_CACHE_SHIFT_6 | |
| 641 | 663 | help |
| 642 | 664 | Samsung S5PC1XX series based systems |
| 643 | 665 | |
| @@ -785,6 +807,8 @@ source "arch/arm/plat-nomadik/Kconfig" · 141 unmodified lines | ||
| 785 | 807 | |
| 786 | 808 | source "arch/arm/mach-ns9xxx/Kconfig" |
| 787 | 809 | |
| 810 | +source "arch/arm/mach-nuc93x/Kconfig" | |
| 811 | + | |
| 788 | 812 | source "arch/arm/plat-omap/Kconfig" |
| 789 | 813 | |
| 790 | 814 | source "arch/arm/mach-omap1/Kconfig" |
| @@ -867,6 +891,11 @@ config XSCALE_PMU · 76 unmodified lines | ||
| 867 | 891 | depends on CPU_XSCALE && !XSCALE_PMU_TIMER |
| 868 | 892 | default y |
| 869 | 893 | |
| 894 | +config CPU_HAS_PMU | |
| 895 | + depends on CPU_V6 || CPU_V7 || XSCALE_PMU | |
| 896 | + default y | |
| 897 | + bool | |
| 898 | + | |
| 870 | 899 | if !MMU |
| 871 | 900 | source "arch/arm/Kconfig-nommu" |
| 872 | 901 | endif |
| @@ -921,6 +950,19 @@ config ARM_ERRATA_460075 · 48 unmodified lines | ||
| 921 | 950 | ACTLR register. Note that setting specific bits in the ACTLR register |
| 922 | 951 | may not be available in non-secure mode. |
| 923 | 952 | |
| 953 | +config PL310_ERRATA_588369 | |
| 954 | + bool "Clean & Invalidate maintenance operations do not invalidate clean lines" | |
| 955 | + depends on CACHE_L2X0 && ARCH_OMAP4 | |
| 956 | + help | |
| 957 | + The PL310 L2 cache controller implements three types of Clean & | |
| 958 | + Invalidate maintenance operations: by Physical Address | |
| 959 | + (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC). | |
| 960 | + They are architecturally defined to behave as the execution of a | |
| 961 | + clean operation followed immediately by an invalidate operation, | |
| 962 | + both performing to the same memory location. This functionality | |
| 963 | + is not correctly implemented in PL310 as clean lines are not | |
| 964 | + invalidated as a result of these operations. Note that this errata | |
| 965 | + uses Texas Instrument's secure monitor api. | |
| 924 | 966 | endmenu |
| 925 | 967 | |
| 926 | 968 | source "arch/arm/common/Kconfig" |
| @@ -1171,6 +1213,14 @@ config HIGHPTE · 244 unmodified lines | ||
| 1171 | 1213 | depends on HIGHMEM |
| 1172 | 1214 | depends on !OUTER_CACHE |
| 1173 | 1215 | |
| 1216 | +config HW_PERF_EVENTS | |
| 1217 | + bool "Enable hardware performance counter support for perf events" | |
| 1218 | + depends on PERF_EVENTS && CPU_HAS_PMU && (CPU_V6 || CPU_V7) | |
| 1219 | + default y | |
| 1220 | + help | |
| 1221 | + Enable hardware performance counter support for perf events. If | |
| 1222 | + disabled, perf events will use software events only. | |
| 1223 | + | |
| 1174 | 1224 | source "mm/Kconfig" |
| 1175 | 1225 | |
| 1176 | 1226 | config LEDS |
| @@ -1230,6 +1280,7 @@ config ALIGNMENT_TRAP · 53 unmodified lines | ||
| 1230 | 1280 | bool |
| 1231 | 1281 | depends on CPU_CP15_MMU |
| 1232 | 1282 | default y if !ARCH_EBSA110 |
| 1283 | + select HAVE_PROC_CPU if PROC_FS | |
| 1233 | 1284 | help |
| 1234 | 1285 | ARM processors cannot fetch/store information which is not |
| 1235 | 1286 | naturally aligned on the bus, i.e., a 4 byte fetch must start at an |
| @@ -171,6 +171,7 @@ machine-$(CONFIG_ARCH_U300) := u300 · 170 unmodified lines | ||
| 171 | 171 | machine-$(CONFIG_ARCH_U8500) := ux500 |
| 172 | 172 | machine-$(CONFIG_ARCH_VERSATILE) := versatile |
| 173 | 173 | machine-$(CONFIG_ARCH_W90X900) := w90x900 |
| 174 | +machine-$(CONFIG_ARCH_NUC93X) := nuc93x | |
| 174 | 175 | machine-$(CONFIG_FOOTBRIDGE) := footbridge |
| 175 | 176 | |
| 176 | 177 | # Platform directory name. This list is sorted alphanumerically |
| @@ -5,7 +5,7 @@ · 4 unmodified lines | ||
| 5 | 5 | # |
| 6 | 6 | |
| 7 | 7 | HEAD = head.o |
| 8 | −OBJS = misc.o | |
| 8 | +OBJS = misc.o decompress.o | |
| 9 | 9 | FONTC = $(srctree)/drivers/video/console/font_acorn_8x8.c |
| 10 | 10 | |
| 11 | 11 | # |
| @@ -106,10 +106,6 @@ lib1funcs = $(obj)/lib1funcs.o · 94 unmodified lines | ||
| 106 | 106 | $(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE |
| 107 | 107 | $(call cmd,shipped) |
| 108 | 108 | |
| 109 | −# Don't allow any static data in misc.o, which | |
| 110 | −# would otherwise mess up our GOT table | |
| 111 | −CFLAGS_misc.o := -Dstatic= | |
| 112 | − | |
| 113 | 109 | $(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \ |
| 114 | 110 | $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE |
| 115 | 111 | $(call if_changed,ld) |
| @@ -0,0 +1,45 @@ | ||
| 1 | +#define _LINUX_STRING_H_ | |
| 2 | + | |
| 3 | +#include <linux/compiler.h> /* for inline */ | |
| 4 | +#include <linux/types.h> /* for size_t */ | |
| 5 | +#include <linux/stddef.h> /* for NULL */ | |
| 6 | +#include <linux/linkage.h> | |
| 7 | +#include <asm/string.h> | |
| 8 | + | |
| 9 | +extern unsigned long free_mem_ptr; | |
| 10 | +extern unsigned long free_mem_end_ptr; | |
| 11 | +extern void error(char *); | |
| 12 | + | |
| 13 | +#define STATIC static | |
| 14 | + | |
| 15 | +#define ARCH_HAS_DECOMP_WDOG | |
| 16 | + | |
| 17 | +/* Diagnostic functions */ | |
| 18 | +#ifdef DEBUG | |
| 19 | +# define Assert(cond,msg) {if(!(cond)) error(msg);} | |
| 20 | +# define Trace(x) fprintf x | |
| 21 | +# define Tracev(x) {if (verbose) fprintf x ;} | |
| 22 | +# define Tracevv(x) {if (verbose>1) fprintf x ;} | |
| 23 | +# define Tracec(c,x) {if (verbose && (c)) fprintf x ;} | |
| 24 | +# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} | |
| 25 | +#else | |
| 26 | +# define Assert(cond,msg) | |
| 27 | +# define Trace(x) | |
| 28 | +# define Tracev(x) | |
| 29 | +# define Tracevv(x) | |
| 30 | +# define Tracec(c,x) | |
| 31 | +# define Tracecv(c,x) | |
| 32 | +#endif | |
| 33 | + | |
| 34 | +#ifdef CONFIG_KERNEL_GZIP | |
| 35 | +#include "../../../../lib/decompress_inflate.c" | |
| 36 | +#endif | |
| 37 | + | |
| 38 | +#ifdef CONFIG_KERNEL_LZO | |
| 39 | +#include "../../../../lib/decompress_unlzo.c" | |
| 40 | +#endif | |
| 41 | + | |
| 42 | +void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)) | |
| 43 | +{ | |
| 44 | + decompress(input, len, NULL, NULL, output, NULL, error); | |
| 45 | +} | |
| @@ -22,13 +22,13 @@ · 21 unmodified lines | ||
| 22 | 22 | #if defined(CONFIG_DEBUG_ICEDCC) |
| 23 | 23 | |
| 24 | 24 | #ifdef CONFIG_CPU_V6 |
| 25 | − .macro loadsp, rb | |
| 25 | + .macro loadsp, rb, tmp | |
| 26 | 26 | .endm |
| 27 | 27 | .macro writeb, ch, rb |
| 28 | 28 | mcr p14, 0, \ch, c0, c5, 0 |
| 29 | 29 | .endm |
| 30 | 30 | #elif defined(CONFIG_CPU_V7) |
| 31 | − .macro loadsp, rb | |
| 31 | + .macro loadsp, rb, tmp | |
| 32 | 32 | .endm |
| 33 | 33 | .macro writeb, ch, rb |
| 34 | 34 | wait: mrc p14, 0, pc, c0, c1, 0 |
| @@ -36,13 +36,13 @@ wait: mrc p14, 0, pc, c0, c1, 0 · 1 unmodified line | ||
| 36 | 36 | mcr p14, 0, \ch, c0, c5, 0 |
| 37 | 37 | .endm |
| 38 | 38 | #elif defined(CONFIG_CPU_XSCALE) |
| 39 | − .macro loadsp, rb | |
| 39 | + .macro loadsp, rb, tmp | |
| 40 | 40 | .endm |
| 41 | 41 | .macro writeb, ch, rb |
| 42 | 42 | mcr p14, 0, \ch, c8, c0, 0 |
| 43 | 43 | .endm |
| 44 | 44 | #else |
| 45 | − .macro loadsp, rb | |
| 45 | + .macro loadsp, rb, tmp | |
| 46 | 46 | .endm |
| 47 | 47 | .macro writeb, ch, rb |
| 48 | 48 | mcr p14, 0, \ch, c1, c0, 0 |
| @@ -58,7 +58,7 @@ wait: mrc p14, 0, pc, c0, c1, 0 · 9 unmodified lines | ||
| 58 | 58 | .endm |
| 59 | 59 | |
| 60 | 60 | #if defined(CONFIG_ARCH_SA1100) |
| 61 | − .macro loadsp, rb | |
| 61 | + .macro loadsp, rb, tmp | |
| 62 | 62 | mov \rb, #0x80000000 @ physical base address |
| 63 | 63 | #ifdef CONFIG_DEBUG_LL_SER3 |
| 64 | 64 | add \rb, \rb, #0x00050000 @ Ser3 |
| @@ -67,13 +67,13 @@ wait: mrc p14, 0, pc, c0, c1, 0 · 2 unmodified lines | ||
| 67 | 67 | #endif |
| 68 | 68 | .endm |
| 69 | 69 | #elif defined(CONFIG_ARCH_S3C2410) |
| 70 | − .macro loadsp, rb | |
| 70 | + .macro loadsp, rb, tmp | |
| 71 | 71 | mov \rb, #0x50000000 |
| 72 | 72 | add \rb, \rb, #0x4000 * CONFIG_S3C_LOWLEVEL_UART_PORT |
| 73 | 73 | .endm |
| 74 | 74 | #else |
| 75 | − .macro loadsp, rb | |
| 76 | − addruart \rb | |
| 75 | + .macro loadsp, rb, tmp | |
| 76 | + addruart \rb, \tmp | |
| 77 | 77 | .endm |
| 78 | 78 | #endif |
| 79 | 79 | #endif |
| @@ -1025,7 +1025,7 @@ phex: adr r3, phexbuf · 945 unmodified lines | ||
| 1025 | 1025 | strb r2, [r3, r1] |
| 1026 | 1026 | b 1b |
| 1027 | 1027 | |
| 1028 | −puts: loadsp r3 | |
| 1028 | +puts: loadsp r3, r1 | |
| 1029 | 1029 | 1: ldrb r2, [r0], #1 |
| 1030 | 1030 | teq r2, #0 |
| 1031 | 1031 | moveq pc, lr |
| @@ -1042,7 +1042,7 @@ puts: loadsp r3 · 10 unmodified lines | ||
| 1042 | 1042 | putc: |
| 1043 | 1043 | mov r2, r0 |
| 1044 | 1044 | mov r0, #0 |
| 1045 | − loadsp r3 | |
| 1045 | + loadsp r3, r1 | |
| 1046 | 1046 | b 2b |
| 1047 | 1047 | |
| 1048 | 1048 | memdump: mov r12, r0 |
| @@ -23,8 +23,8 @@ unsigned int __machine_arch_type; · 22 unmodified lines | ||
| 23 | 23 | #include <linux/compiler.h> /* for inline */ |
| 24 | 24 | #include <linux/types.h> /* for size_t */ |
| 25 | 25 | #include <linux/stddef.h> /* for NULL */ |
| 26 | −#include <asm/string.h> | |
| 27 | 26 | #include <linux/linkage.h> |
| 27 | +#include <asm/string.h> | |
| 28 | 28 | |
| 29 | 29 | #include <asm/unaligned.h> |
| 30 | 30 | |
| @@ -117,57 +117,7 @@ static void putstr(const char *ptr) · 86 unmodified lines | ||
| 117 | 117 | |
| 118 | 118 | #endif |
| 119 | 119 | |
| 120 | −#define __ptr_t void * | |
| 121 | − | |
| 122 | −#define memzero(s,n) __memzero(s,n) | |
| 123 | − | |
| 124 | −/* | |
| 125 | − * Optimised C version of memzero for the ARM. | |
| 126 | − */ | |
| 127 | −void __memzero (__ptr_t s, size_t n) | |
| 128 | −{ | |
| 129 | − union { void *vp; unsigned long *ulp; unsigned char *ucp; } u; | |
| 130 | − int i; | |
| 131 | − | |
| 132 | − u.vp = s; | |
| 133 | − | |
| 134 | − for (i = n >> 5; i > 0; i--) { | |
| 135 | − *u.ulp++ = 0; | |
| 136 | − *u.ulp++ = 0; | |
| 137 | − *u.ulp++ = 0; | |
| 138 | − *u.ulp++ = 0; | |
| 139 | − *u.ulp++ = 0; | |
| 140 | − *u.ulp++ = 0; | |
| 141 | − *u.ulp++ = 0; | |
| 142 | − *u.ulp++ = 0; | |
| 143 | − } | |
| 144 | − | |
| 145 | − if (n & 1 << 4) { | |
| 146 | − *u.ulp++ = 0; | |
| 147 | − *u.ulp++ = 0; | |
| 148 | − *u.ulp++ = 0; | |
| 149 | − *u.ulp++ = 0; | |
| 150 | − } | |
| 151 | − | |
| 152 | − if (n & 1 << 3) { | |
| 153 | − *u.ulp++ = 0; | |
| 154 | − *u.ulp++ = 0; | |
| 155 | − } | |
| 156 | − | |
| 157 | − if (n & 1 << 2) | |
| 158 | − *u.ulp++ = 0; | |
| 159 | − | |
| 160 | − if (n & 1 << 1) { | |
| 161 | − *u.ucp++ = 0; | |
| 162 | − *u.ucp++ = 0; | |
| 163 | − } | |
| 164 | − | |
| 165 | − if (n & 1) | |
| 166 | − *u.ucp++ = 0; | |
| 167 | −} | |
| 168 | − | |
| 169 | −static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src, | |
| 170 | − size_t __n) | |
| 120 | +void *memcpy(void *__dest, __const void *__src, size_t __n) | |
| 171 | 121 | { |
| 172 | 122 | int i = 0; |
| 173 | 123 | unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src; |
| @@ -204,59 +154,20 @@ static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src, · 30 unmodified lines | ||
| 204 | 154 | /* |
| 205 | 155 | * gzip delarations |
| 206 | 156 | */ |
| 207 | −#define STATIC static | |
| 208 | − | |
| 209 | −/* Diagnostic functions */ | |
| 210 | −#ifdef DEBUG | |
| 211 | −# define Assert(cond,msg) {if(!(cond)) error(msg);} | |
| 212 | −# define Trace(x) fprintf x | |
| 213 | −# define Tracev(x) {if (verbose) fprintf x ;} | |
| 214 | −# define Tracevv(x) {if (verbose>1) fprintf x ;} | |
| 215 | −# define Tracec(c,x) {if (verbose && (c)) fprintf x ;} | |
| 216 | −# define Tracecv(c,x) {if (verbose>1 && (c)) fprintf x ;} | |
| 217 | −#else | |
| 218 | −# define Assert(cond,msg) | |
| 219 | −# define Trace(x) | |
| 220 | −# define Tracev(x) | |
| 221 | −# define Tracevv(x) | |
| 222 | −# define Tracec(c,x) | |
| 223 | −# define Tracecv(c,x) | |
| 224 | −#endif | |
| 225 | − | |
| 226 | −static void error(char *m); | |
| 227 | − | |
| 228 | 157 | extern char input_data[]; |
| 229 | 158 | extern char input_data_end[]; |
| 230 | 159 | |
| 231 | −static unsigned char *output_data; | |
| 232 | −static unsigned long output_ptr; | |
| 233 | − | |
| 234 | −static void error(char *m); | |
| 160 | +unsigned char *output_data; | |
| 161 | +unsigned long output_ptr; | |
| 235 | 162 | |
| 236 | −static void putstr(const char *); | |
| 237 | − | |
| 238 | −static unsigned long free_mem_ptr; | |
| 239 | −static unsigned long free_mem_end_ptr; | |
| 240 | − | |
| 241 | −#ifdef STANDALONE_DEBUG | |
| 242 | −#define NO_INFLATE_MALLOC | |
| 243 | −#endif | |
| 244 | − | |
| 245 | −#define ARCH_HAS_DECOMP_WDOG | |
| 246 | − | |
| 247 | −#ifdef CONFIG_KERNEL_GZIP | |
| 248 | −#include "../../../../lib/decompress_inflate.c" | |
| 249 | −#endif | |
| 250 | − | |
| 251 | −#ifdef CONFIG_KERNEL_LZO | |
| 252 | −#include "../../../../lib/decompress_unlzo.c" | |
| 253 | −#endif | |
| 163 | +unsigned long free_mem_ptr; | |
| 164 | +unsigned long free_mem_end_ptr; | |
| 254 | 165 | |
| 255 | 166 | #ifndef arch_error |
| 256 | 167 | #define arch_error(x) |
| 257 | 168 | #endif |
| 258 | 169 | |
| 259 | −static void error(char *x) | |
| 170 | +void error(char *x) | |
| 260 | 171 | { |
| 261 | 172 | arch_error(x); |
| 262 | 173 | |
| @@ -272,6 +183,8 @@ asmlinkage void __div0(void) · 9 unmodified lines | ||
| 272 | 183 | error("Attempting division by 0!"); |
| 273 | 184 | } |
| 274 | 185 | |
| 186 | +extern void do_decompress(u8 *input, int len, u8 *output, void (*error)(char *x)); | |
| 187 | + | |
| 275 | 188 | #ifndef STANDALONE_DEBUG |
| 276 | 189 | |
| 277 | 190 | unsigned long |
| @@ -292,8 +205,8 @@ decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p, · 14 unmodified lines | ||
| 292 | 205 | output_ptr = get_unaligned_le32(tmp); |
| 293 | 206 | |
| 294 | 207 | putstr("Uncompressing Linux..."); |
| 295 | − decompress(input_data, input_data_end - input_data, | |
| 296 | − NULL, NULL, output_data, NULL, error); | |
| 208 | + do_decompress(input_data, input_data_end - input_data, | |
| 209 | + output_data, error); | |
| 297 | 210 | putstr(" done, booting the kernel.\n"); |
| 298 | 211 | return output_ptr; |
| 299 | 212 | } |
| @@ -14,6 +14,13 @@ SECTIONS · 13 unmodified lines | ||
| 14 | 14 | /DISCARD/ : { |
| 15 | 15 | *(.ARM.exidx*) |
| 16 | 16 | *(.ARM.extab*) |
| 17 | + /* | |
| 18 | + * Discard any r/w data - this produces a link error if we have any, | |
| 19 | + * which is required for PIC decompression. Local data generates | |
| 20 | + * GOTOFF relocations, which prevents it being relocated independently | |
| 21 | + * of the text/got segments. | |
| 22 | + */ | |
| 23 | + *(.data) | |
| 17 | 24 | } |
| 18 | 25 | |
| 19 | 26 | . = TEXT_START; |
| @@ -40,7 +47,6 @@ SECTIONS · 20 unmodified lines | ||
| 40 | 47 | .got : { *(.got) } |
| 41 | 48 | _got_end = .; |
| 42 | 49 | .got.plt : { *(.got.plt) } |
| 43 | − .data : { *(.data) } | |
| 44 | 50 | _edata = .; |
| 45 | 51 | |
| 46 | 52 | . = BSS_START; |
| @@ -99,6 +99,16 @@ void clkdev_add(struct clk_lookup *cl) · 98 unmodified lines | ||
| 99 | 99 | } |
| 100 | 100 | EXPORT_SYMBOL(clkdev_add); |
| 101 | 101 | |
| 102 | +void __init clkdev_add_table(struct clk_lookup *cl, size_t num) | |
| 103 | +{ | |
| 104 | + mutex_lock(&clocks_mutex); | |
| 105 | + while (num--) { | |
| 106 | + list_add_tail(&cl->node, &clocks); | |
| 107 | + cl++; | |
| 108 | + } | |
| 109 | + mutex_unlock(&clocks_mutex); | |
| 110 | +} | |
| 111 | + | |
| 102 | 112 | #define MAX_DEV_ID 20 |
| 103 | 113 | #define MAX_CON_ID 16 |
| 104 | 114 | |
| @@ -277,7 +277,7 @@ static inline dma_addr_t map_single(struct device *dev, void *ptr, size_t size, · 276 unmodified lines | ||
| 277 | 277 | * We don't need to sync the DMA buffer since |
| 278 | 278 | * it was allocated via the coherent allocators. |
| 279 | 279 | */ |
| 280 | − dma_cache_maint(ptr, size, dir); | |
| 280 | + __dma_single_cpu_to_dev(ptr, size, dir); | |
| 281 | 281 | } |
| 282 | 282 | |
| 283 | 283 | return dma_addr; |
| @@ -315,6 +315,8 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr, · 31 unmodified lines | ||
| 315 | 315 | __cpuc_flush_dcache_area(ptr, size); |
| 316 | 316 | } |
| 317 | 317 | free_safe_buffer(dev->archdata.dmabounce, buf); |
| 318 | + } else { | |
| 319 | + __dma_single_dev_to_cpu(dma_to_virt(dev, dma_addr), size, dir); | |
| 318 | 320 | } |
| 319 | 321 | } |
| 320 | 322 | |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | * along with this program; if not, write to the Free Software |
| 19 | 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | 20 | */ |
| 21 | + | |
| 21 | 22 | #include <linux/init.h> |
| 22 | 23 | #include <linux/list.h> |
| 23 | 24 | #include <linux/io.h> |
| @@ -28,48 +29,6 @@ · 4 unmodified lines | ||
| 28 | 29 | #include <asm/mach/irq.h> |
| 29 | 30 | #include <asm/hardware/vic.h> |
| 30 | 31 | |
| 31 | −static void vic_ack_irq(unsigned int irq) | |
| 32 | −{ | |
| 33 | − void __iomem *base = get_irq_chip_data(irq); | |
| 34 | − irq &= 31; | |
| 35 | − writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); | |
| 36 | − /* moreover, clear the soft-triggered, in case it was the reason */ | |
| 37 | − writel(1 << irq, base + VIC_INT_SOFT_CLEAR); | |
| 38 | −} | |
| 39 | − | |
| 40 | −static void vic_mask_irq(unsigned int irq) | |
| 41 | −{ | |
| 42 | − void __iomem *base = get_irq_chip_data(irq); | |
| 43 | − irq &= 31; | |
| 44 | − writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); | |
| 45 | −} | |
| 46 | − | |
| 47 | −static void vic_unmask_irq(unsigned int irq) | |
| 48 | −{ | |
| 49 | − void __iomem *base = get_irq_chip_data(irq); | |
| 50 | − irq &= 31; | |
| 51 | − writel(1 << irq, base + VIC_INT_ENABLE); | |
| 52 | −} | |
| 53 | − | |
| 54 | −/** | |
| 55 | − * vic_init2 - common initialisation code | |
| 56 | − * @base: Base of the VIC. | |
| 57 | − * | |
| 58 | − * Common initialisation code for registeration | |
| 59 | − * and resume. | |
| 60 | −*/ | |
| 61 | −static void vic_init2(void __iomem *base) | |
| 62 | −{ | |
| 63 | − int i; | |
| 64 | − | |
| 65 | − for (i = 0; i < 16; i++) { | |
| 66 | − void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); | |
| 67 | − writel(VIC_VECT_CNTL_ENABLE | i, reg); | |
| 68 | − } | |
| 69 | − | |
| 70 | − writel(32, base + VIC_PL190_DEF_VECT_ADDR); | |
| 71 | −} | |
| 72 | − | |
| 73 | 32 | #if defined(CONFIG_PM) |
| 74 | 33 | /** |
| 75 | 34 | * struct vic_device - VIC PM device |
| @@ -99,13 +58,34 @@ struct vic_device { · 23 unmodified lines | ||
| 99 | 58 | /* we cannot allocate memory when VICs are initially registered */ |
| 100 | 59 | static struct vic_device vic_devices[CONFIG_ARM_VIC_NR]; |
| 101 | 60 | |
| 61 | +static int vic_id; | |
| 62 | + | |
| 102 | 63 | static inline struct vic_device *to_vic(struct sys_device *sys) |
| 103 | 64 | { |
| 104 | 65 | return container_of(sys, struct vic_device, sysdev); |
| 105 | 66 | } |
| 67 | +#endif /* CONFIG_PM */ | |
| 106 | 68 | |
| 107 | −static int vic_id; | |
| 69 | +/** | |
| 70 | + * vic_init2 - common initialisation code | |
| 71 | + * @base: Base of the VIC. | |
| 72 | + * | |
| 73 | + * Common initialisation code for registeration | |
| 74 | + * and resume. | |
| 75 | +*/ | |
| 76 | +static void vic_init2(void __iomem *base) | |
| 77 | +{ | |
| 78 | + int i; | |
| 79 | + | |
| 80 | + for (i = 0; i < 16; i++) { | |
| 81 | + void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); | |
| 82 | + writel(VIC_VECT_CNTL_ENABLE | i, reg); | |
| 83 | + } | |
| 84 | + | |
| 85 | + writel(32, base + VIC_PL190_DEF_VECT_ADDR); | |
| 86 | +} | |
| 108 | 87 | |
| 88 | +#if defined(CONFIG_PM) | |
| 109 | 89 | static int vic_class_resume(struct sys_device *dev) |
| 110 | 90 | { |
| 111 | 91 | struct vic_device *vic = to_vic(dev); |
| @@ -158,31 +138,6 @@ struct sysdev_class vic_class = { · 46 unmodified lines | ||
| 158 | 138 | .resume = vic_class_resume, |
| 159 | 139 | }; |
| 160 | 140 | |
| 161 | −/** | |
| 162 | − * vic_pm_register - Register a VIC for later power management control | |
| 163 | − * @base: The base address of the VIC. | |
| 164 | − * @irq: The base IRQ for the VIC. | |
| 165 | − * @resume_sources: bitmask of interrupts allowed for resume sources. | |
| 166 | − * | |
| 167 | − * Register the VIC with the system device tree so that it can be notified | |
| 168 | − * of suspend and resume requests and ensure that the correct actions are | |
| 169 | − * taken to re-instate the settings on resume. | |
| 170 | − */ | |
| 171 | −static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) | |
| 172 | −{ | |
| 173 | − struct vic_device *v; | |
| 174 | − | |
| 175 | − if (vic_id >= ARRAY_SIZE(vic_devices)) | |
| 176 | − printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); | |
| 177 | − else { | |
| 178 | − v = &vic_devices[vic_id]; | |
| 179 | − v->base = base; | |
| 180 | − v->resume_sources = resume_sources; | |
| 181 | − v->irq = irq; | |
| 182 | − vic_id++; | |
| 183 | − } | |
| 184 | −} | |
| 185 | − | |
| 186 | 141 | /** |
| 187 | 142 | * vic_pm_init - initicall to register VIC pm |
| 188 | 143 | * |
| @@ -219,9 +174,60 @@ static int __init vic_pm_init(void) · 30 unmodified lines | ||
| 219 | 174 | |
| 220 | 175 | return 0; |
| 221 | 176 | } |
| 222 | − | |
| 223 | 177 | late_initcall(vic_pm_init); |
| 224 | 178 | |
| 179 | +/** | |
| 180 | + * vic_pm_register - Register a VIC for later power management control | |
| 181 | + * @base: The base address of the VIC. | |
| 182 | + * @irq: The base IRQ for the VIC. | |
| 183 | + * @resume_sources: bitmask of interrupts allowed for resume sources. | |
| 184 | + * | |
| 185 | + * Register the VIC with the system device tree so that it can be notified | |
| 186 | + * of suspend and resume requests and ensure that the correct actions are | |
| 187 | + * taken to re-instate the settings on resume. | |
| 188 | + */ | |
| 189 | +static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 resume_sources) | |
| 190 | +{ | |
| 191 | + struct vic_device *v; | |
| 192 | + | |
| 193 | + if (vic_id >= ARRAY_SIZE(vic_devices)) | |
| 194 | + printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__); | |
| 195 | + else { | |
| 196 | + v = &vic_devices[vic_id]; | |
| 197 | + v->base = base; | |
| 198 | + v->resume_sources = resume_sources; | |
| 199 | + v->irq = irq; | |
| 200 | + vic_id++; | |
| 201 | + } | |
| 202 | +} | |
| 203 | +#else | |
| 204 | +static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } | |
| 205 | +#endif /* CONFIG_PM */ | |
| 206 | + | |
| 207 | +static void vic_ack_irq(unsigned int irq) | |
| 208 | +{ | |
| 209 | + void __iomem *base = get_irq_chip_data(irq); | |
| 210 | + irq &= 31; | |
| 211 | + writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); | |
| 212 | + /* moreover, clear the soft-triggered, in case it was the reason */ | |
| 213 | + writel(1 << irq, base + VIC_INT_SOFT_CLEAR); | |
| 214 | +} | |
| 215 | + | |
| 216 | +static void vic_mask_irq(unsigned int irq) | |
| 217 | +{ | |
| 218 | + void __iomem *base = get_irq_chip_data(irq); | |
| 219 | + irq &= 31; | |
| 220 | + writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); | |
| 221 | +} | |
| 222 | + | |
| 223 | +static void vic_unmask_irq(unsigned int irq) | |
| 224 | +{ | |
| 225 | + void __iomem *base = get_irq_chip_data(irq); | |
| 226 | + irq &= 31; | |
| 227 | + writel(1 << irq, base + VIC_INT_ENABLE); | |
| 228 | +} | |
| 229 | + | |
| 230 | +#if defined(CONFIG_PM) | |
| 225 | 231 | static struct vic_device *vic_from_irq(unsigned int irq) |
| 226 | 232 | { |
| 227 | 233 | struct vic_device *v = vic_devices; |
| @@ -255,10 +261,7 @@ static int vic_set_wake(unsigned int irq, unsigned int on) · 27 unmodified lines | ||
| 255 | 261 | |
| 256 | 262 | return 0; |
| 257 | 263 | } |
| 258 | − | |
| 259 | 264 | #else |
| 260 | −static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } | |
| 261 | − | |
| 262 | 265 | #define vic_set_wake NULL |
| 263 | 266 | #endif /* CONFIG_PM */ |
| 264 | 267 | |
| @@ -270,9 +273,62 @@ static struct irq_chip vic_chip = { · 5 unmodified lines | ||
| 270 | 273 | .set_wake = vic_set_wake, |
| 271 | 274 | }; |
| 272 | 275 | |
| 273 | −/* The PL190 cell from ARM has been modified by ST, so handle both here */ | |
| 274 | −static void vik_init_st(void __iomem *base, unsigned int irq_start, | |
| 275 | − u32 vic_sources); | |
| 276 | +/* | |
| 277 | + * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. | |
| 278 | + * The original cell has 32 interrupts, while the modified one has 64, | |
| 279 | + * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case | |
| 280 | + * the probe function is called twice, with base set to offset 000 | |
| 281 | + * and 020 within the page. We call this "second block". | |
| 282 | + */ | |
| 283 | +static void __init vic_init_st(void __iomem *base, unsigned int irq_start, | |
| 284 | + u32 vic_sources) | |
| 285 | +{ | |
| 286 | + unsigned int i; | |
| 287 | + int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; | |
| 288 | + | |
| 289 | + /* Disable all interrupts initially. */ | |
| 290 | + | |
| 291 | + writel(0, base + VIC_INT_SELECT); | |
| 292 | + writel(0, base + VIC_INT_ENABLE); | |
| 293 | + writel(~0, base + VIC_INT_ENABLE_CLEAR); | |
| 294 | + writel(0, base + VIC_IRQ_STATUS); | |
| 295 | + writel(0, base + VIC_ITCR); | |
| 296 | + writel(~0, base + VIC_INT_SOFT_CLEAR); | |
| 297 | + | |
| 298 | + /* | |
| 299 | + * Make sure we clear all existing interrupts. The vector registers | |
| 300 | + * in this cell are after the second block of general registers, | |
| 301 | + * so we can address them using standard offsets, but only from | |
| 302 | + * the second base address, which is 0x20 in the page | |
| 303 | + */ | |
| 304 | + if (vic_2nd_block) { | |
| 305 | + writel(0, base + VIC_PL190_VECT_ADDR); | |
| 306 | + for (i = 0; i < 19; i++) { | |
| 307 | + unsigned int value; | |
| 308 | + | |
| 309 | + value = readl(base + VIC_PL190_VECT_ADDR); | |
| 310 | + writel(value, base + VIC_PL190_VECT_ADDR); | |
| 311 | + } | |
| 312 | + /* ST has 16 vectors as well, but we don't enable them by now */ | |
| 313 | + for (i = 0; i < 16; i++) { | |
| 314 | + void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); | |
| 315 | + writel(0, reg); | |
| 316 | + } | |
| 317 | + | |
| 318 | + writel(32, base + VIC_PL190_DEF_VECT_ADDR); | |
| 319 | + } | |
| 320 | + | |
| 321 | + for (i = 0; i < 32; i++) { | |
| 322 | + if (vic_sources & (1 << i)) { | |
| 323 | + unsigned int irq = irq_start + i; | |
| 324 | + | |
| 325 | + set_irq_chip(irq, &vic_chip); | |
| 326 | + set_irq_chip_data(irq, base); | |
| 327 | + set_irq_handler(irq, handle_level_irq); | |
| 328 | + set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
| 329 | + } | |
| 330 | + } | |
| 331 | +} | |
| 276 | 332 | |
| 277 | 333 | /** |
| 278 | 334 | * vic_init - initialise a vectored interrupt controller |
| @@ -299,7 +355,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, · 20 unmodified lines | ||
| 299 | 355 | |
| 300 | 356 | switch(vendor) { |
| 301 | 357 | case AMBA_VENDOR_ST: |
| 302 | − vik_init_st(base, irq_start, vic_sources); | |
| 358 | + vic_init_st(base, irq_start, vic_sources); | |
| 303 | 359 | return; |
| 304 | 360 | default: |
| 305 | 361 | printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n"); |
| @@ -343,60 +399,3 @@ void __init vic_init(void __iomem *base, unsigned int irq_start, · 37 unmodified lines | ||
| 343 | 399 | |
| 344 | 400 | vic_pm_register(base, irq_start, resume_sources); |
| 345 | 401 | } |
| 346 | − | |
| 347 | −/* | |
| 348 | − * The PL190 cell from ARM has been modified by ST to handle 64 interrupts. | |
| 349 | − * The original cell has 32 interrupts, while the modified one has 64, | |
| 350 | − * replocating two blocks 0x00..0x1f in 0x20..0x3f. In that case | |
| 351 | − * the probe function is called twice, with base set to offset 000 | |
| 352 | − * and 020 within the page. We call this "second block". | |
| 353 | − */ | |
| 354 | −static void __init vik_init_st(void __iomem *base, unsigned int irq_start, | |
| 355 | − u32 vic_sources) | |
| 356 | −{ | |
| 357 | − unsigned int i; | |
| 358 | − int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0; | |
| 359 | − | |
| 360 | − /* Disable all interrupts initially. */ | |
| 361 | − | |
| 362 | − writel(0, base + VIC_INT_SELECT); | |
| 363 | − writel(0, base + VIC_INT_ENABLE); | |
| 364 | − writel(~0, base + VIC_INT_ENABLE_CLEAR); | |
| 365 | − writel(0, base + VIC_IRQ_STATUS); | |
| 366 | − writel(0, base + VIC_ITCR); | |
| 367 | − writel(~0, base + VIC_INT_SOFT_CLEAR); | |
| 368 | − | |
| 369 | − /* | |
| 370 | − * Make sure we clear all existing interrupts. The vector registers | |
| 371 | − * in this cell are after the second block of general registers, | |
| 372 | − * so we can address them using standard offsets, but only from | |
| 373 | − * the second base address, which is 0x20 in the page | |
| 374 | − */ | |
| 375 | − if (vic_2nd_block) { | |
| 376 | − writel(0, base + VIC_PL190_VECT_ADDR); | |
| 377 | − for (i = 0; i < 19; i++) { | |
| 378 | − unsigned int value; | |
| 379 | − | |
| 380 | − value = readl(base + VIC_PL190_VECT_ADDR); | |
| 381 | − writel(value, base + VIC_PL190_VECT_ADDR); | |
| 382 | − } | |
| 383 | − /* ST has 16 vectors as well, but we don't enable them by now */ | |
| 384 | − for (i = 0; i < 16; i++) { | |
| 385 | − void __iomem *reg = base + VIC_VECT_CNTL0 + (i * 4); | |
| 386 | − writel(0, reg); | |
| 387 | − } | |
| 388 | − | |
| 389 | − writel(32, base + VIC_PL190_DEF_VECT_ADDR); | |
| 390 | − } | |
| 391 | − | |
| 392 | − for (i = 0; i < 32; i++) { | |
| 393 | − if (vic_sources & (1 << i)) { | |
| 394 | − unsigned int irq = irq_start + i; | |
| 395 | − | |
| 396 | − set_irq_chip(irq, &vic_chip); | |
| 397 | − set_irq_chip_data(irq, base); | |
| 398 | − set_irq_handler(irq, handle_level_irq); | |
| 399 | − set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
| 400 | − } | |
| 401 | − } | |
| 402 | −} | |
| @@ -201,7 +201,7 @@ CONFIG_ARCH_OMAP3=y · 200 unmodified lines | ||
| 201 | 201 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set |
| 202 | 202 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set |
| 203 | 203 | CONFIG_OMAP_RESET_CLOCKS=y |
| 204 | −# CONFIG_OMAP_MUX is not set | |
| 204 | +CONFIG_OMAP_MUX=y | |
| 205 | 205 | # CONFIG_OMAP_MCBSP is not set |
| 206 | 206 | # CONFIG_OMAP_MBOX_FWK is not set |
| 207 | 207 | # CONFIG_OMAP_MPU_TIMER is not set |
| @@ -590,7 +590,46 @@ CONFIG_HW_RANDOM=y · 382 unmodified lines | ||
| 590 | 590 | # CONFIG_R3964 is not set |
| 591 | 591 | # CONFIG_RAW_DRIVER is not set |
| 592 | 592 | # CONFIG_TCG_TPM is not set |
| 593 | −# CONFIG_I2C is not set | |
| 593 | +CONFIG_I2C=y | |
| 594 | +CONFIG_I2C_BOARDINFO=y | |
| 595 | +CONFIG_I2C_COMPAT=y | |
| 596 | +CONFIG_I2C_CHARDEV=y | |
| 597 | +CONFIG_I2C_HELPER_AUTO=y | |
| 598 | + | |
| 599 | +# | |
| 600 | +# I2C Hardware Bus support | |
| 601 | +# | |
| 602 | + | |
| 603 | +# | |
| 604 | +# I2C system bus drivers (mostly embedded / system-on-chip) | |
| 605 | +# | |
| 606 | +# CONFIG_I2C_DESIGNWARE is not set | |
| 607 | +# CONFIG_I2C_GPIO is not set | |
| 608 | +# CONFIG_I2C_OCORES is not set | |
| 609 | +CONFIG_I2C_OMAP=y | |
| 610 | +# CONFIG_I2C_SIMTEC is not set | |
| 611 | + | |
| 612 | +# | |
| 613 | +# External I2C/SMBus adapter drivers | |
| 614 | +# | |
| 615 | +# CONFIG_I2C_PARPORT_LIGHT is not set | |
| 616 | +# CONFIG_I2C_TAOS_EVM is not set | |
| 617 | +# CONFIG_I2C_TINY_USB is not set | |
| 618 | + | |
| 619 | +# | |
| 620 | +# Other I2C/SMBus bus drivers | |
| 621 | +# | |
| 622 | +# CONFIG_I2C_PCA_PLATFORM is not set | |
| 623 | +# CONFIG_I2C_STUB is not set | |
| 624 | + | |
| 625 | +# | |
| 626 | +# Miscellaneous I2C Chip support | |
| 627 | +# | |
| 628 | +# CONFIG_SENSORS_TSL2550 is not set | |
| 629 | +# CONFIG_I2C_DEBUG_CORE is not set | |
| 630 | +# CONFIG_I2C_DEBUG_ALGO is not set | |
| 631 | +# CONFIG_I2C_DEBUG_BUS is not set | |
| 632 | +# CONFIG_I2C_DEBUG_CHIP is not set | |
| 594 | 633 | # CONFIG_SPI is not set |
| 595 | 634 | |
| 596 | 635 | # |
| @@ -0,0 +1,1640 @@ | ||
| 1 | +# | |
| 2 | +# Automatically generated make config: don't edit | |
| 3 | +# Linux kernel version: 2.6.28-rc7 | |
| 4 | +# Fri Dec 5 10:58:47 2008 | |
| 5 | +# | |
| 6 | +CONFIG_ARM=y | |
| 7 | +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
| 8 | +CONFIG_GENERIC_GPIO=y | |
| 9 | +CONFIG_GENERIC_TIME=y | |
| 10 | +CONFIG_GENERIC_CLOCKEVENTS=y | |
| 11 | +CONFIG_MMU=y | |
| 12 | +# CONFIG_NO_IOPORT is not set | |
| 13 | +CONFIG_GENERIC_HARDIRQS=y | |
| 14 | +CONFIG_STACKTRACE_SUPPORT=y | |
| 15 | +CONFIG_HAVE_LATENCYTOP_SUPPORT=y | |
| 16 | +CONFIG_LOCKDEP_SUPPORT=y | |
| 17 | +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |
| 18 | +CONFIG_HARDIRQS_SW_RESEND=y | |
| 19 | +CONFIG_GENERIC_IRQ_PROBE=y | |
| 20 | +CONFIG_RWSEM_GENERIC_SPINLOCK=y | |
| 21 | +# CONFIG_ARCH_HAS_ILOG2_U32 is not set | |
| 22 | +# CONFIG_ARCH_HAS_ILOG2_U64 is not set | |
| 23 | +CONFIG_GENERIC_HWEIGHT=y | |
| 24 | +CONFIG_GENERIC_CALIBRATE_DELAY=y | |
| 25 | +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | |
| 26 | +CONFIG_VECTORS_BASE=0xffff0000 | |
| 27 | +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |
| 28 | + | |
| 29 | +# | |
| 30 | +# General setup | |
| 31 | +# | |
| 32 | +CONFIG_EXPERIMENTAL=y | |
| 33 | +CONFIG_BROKEN_ON_SMP=y | |
| 34 | +CONFIG_LOCK_KERNEL=y | |
| 35 | +CONFIG_INIT_ENV_ARG_LIMIT=32 | |
| 36 | +CONFIG_LOCALVERSION="-AT572D940HF" | |
| 37 | +# CONFIG_LOCALVERSION_AUTO is not set | |
| 38 | +CONFIG_SWAP=y | |
| 39 | +CONFIG_SYSVIPC=y | |
| 40 | +CONFIG_SYSVIPC_SYSCTL=y | |
| 41 | +CONFIG_POSIX_MQUEUE=y | |
| 42 | +CONFIG_BSD_PROCESS_ACCT=y | |
| 43 | +CONFIG_BSD_PROCESS_ACCT_V3=y | |
| 44 | +CONFIG_TASKSTATS=y | |
| 45 | +# CONFIG_TASK_DELAY_ACCT is not set | |
| 46 | +CONFIG_TASK_XACCT=y | |
| 47 | +CONFIG_TASK_IO_ACCOUNTING=y | |
| 48 | +CONFIG_AUDIT=y | |
| 49 | +# CONFIG_IKCONFIG is not set | |
| 50 | +CONFIG_LOG_BUF_SHIFT=17 | |
| 51 | +CONFIG_CGROUPS=y | |
| 52 | +# CONFIG_CGROUP_DEBUG is not set | |
| 53 | +# CONFIG_CGROUP_NS is not set | |
| 54 | +# CONFIG_CGROUP_FREEZER is not set | |
| 55 | +# CONFIG_CGROUP_DEVICE is not set | |
| 56 | +CONFIG_GROUP_SCHED=y | |
| 57 | +CONFIG_FAIR_GROUP_SCHED=y | |
| 58 | +CONFIG_RT_GROUP_SCHED=y | |
| 59 | +# CONFIG_USER_SCHED is not set | |
| 60 | +CONFIG_CGROUP_SCHED=y | |
| 61 | +CONFIG_CGROUP_CPUACCT=y | |
| 62 | +# CONFIG_RESOURCE_COUNTERS is not set | |
| 63 | +CONFIG_SYSFS_DEPRECATED=y | |
| 64 | +CONFIG_SYSFS_DEPRECATED_V2=y | |
| 65 | +CONFIG_RELAY=y | |
| 66 | +# CONFIG_NAMESPACES is not set | |
| 67 | +CONFIG_BLK_DEV_INITRD=y | |
| 68 | +CONFIG_INITRAMFS_SOURCE="" | |
| 69 | +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | |
| 70 | +CONFIG_SYSCTL=y | |
| 71 | +CONFIG_EMBEDDED=y | |
| 72 | +CONFIG_UID16=y | |
| 73 | +CONFIG_SYSCTL_SYSCALL=y | |
| 74 | +CONFIG_KALLSYMS=y | |
| 75 | +# CONFIG_KALLSYMS_EXTRA_PASS is not set | |
| 76 | +CONFIG_HOTPLUG=y | |
| 77 | +CONFIG_PRINTK=y | |
| 78 | +CONFIG_BUG=y | |
| 79 | +CONFIG_ELF_CORE=y | |
| 80 | +CONFIG_COMPAT_BRK=y | |
| 81 | +CONFIG_BASE_FULL=y | |
| 82 | +CONFIG_FUTEX=y | |
| 83 | +CONFIG_ANON_INODES=y | |
| 84 | +CONFIG_EPOLL=y | |
| 85 | +CONFIG_SIGNALFD=y | |
| 86 | +CONFIG_TIMERFD=y | |
| 87 | +CONFIG_EVENTFD=y | |
| 88 | +CONFIG_SHMEM=y | |
| 89 | +CONFIG_AIO=y | |
| 90 | +CONFIG_VM_EVENT_COUNTERS=y | |
| 91 | +CONFIG_SLAB=y | |
| 92 | +# CONFIG_SLUB is not set | |
| 93 | +# CONFIG_SLOB is not set | |
| 94 | +CONFIG_PROFILING=y | |
| 95 | +CONFIG_MARKERS=y | |
| 96 | +CONFIG_OPROFILE=m | |
| 97 | +CONFIG_HAVE_OPROFILE=y | |
| 98 | +CONFIG_KPROBES=y | |
| 99 | +CONFIG_KRETPROBES=y | |
| 100 | +CONFIG_HAVE_KPROBES=y | |
| 101 | +CONFIG_HAVE_KRETPROBES=y | |
| 102 | +CONFIG_HAVE_CLK=y | |
| 103 | +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | |
| 104 | +CONFIG_SLABINFO=y | |
| 105 | +CONFIG_RT_MUTEXES=y | |
| 106 | +# CONFIG_TINY_SHMEM is not set | |
| 107 | +CONFIG_BASE_SMALL=0 | |
| 108 | +CONFIG_MODULES=y | |
| 109 | +# CONFIG_MODULE_FORCE_LOAD is not set | |
| 110 | +CONFIG_MODULE_UNLOAD=y | |
| 111 | +# CONFIG_MODULE_FORCE_UNLOAD is not set | |
| 112 | +CONFIG_MODVERSIONS=y | |
| 113 | +CONFIG_MODULE_SRCVERSION_ALL=y | |
| 114 | +CONFIG_KMOD=y | |
| 115 | +CONFIG_BLOCK=y | |
| 116 | +# CONFIG_LBD is not set | |
| 117 | +CONFIG_BLK_DEV_IO_TRACE=y | |
| 118 | +# CONFIG_LSF is not set | |
| 119 | +# CONFIG_BLK_DEV_BSG is not set | |
| 120 | +# CONFIG_BLK_DEV_INTEGRITY is not set | |
| 121 | + | |
| 122 | +# | |
| 123 | +# IO Schedulers | |
| 124 | +# | |
| 125 | +CONFIG_IOSCHED_NOOP=y | |
| 126 | +CONFIG_IOSCHED_AS=y | |
| 127 | +CONFIG_IOSCHED_DEADLINE=y | |
| 128 | +CONFIG_IOSCHED_CFQ=y | |
| 129 | +# CONFIG_DEFAULT_AS is not set | |
| 130 | +# CONFIG_DEFAULT_DEADLINE is not set | |
| 131 | +CONFIG_DEFAULT_CFQ=y | |
| 132 | +# CONFIG_DEFAULT_NOOP is not set | |
| 133 | +CONFIG_DEFAULT_IOSCHED="cfq" | |
| 134 | +CONFIG_CLASSIC_RCU=y | |
| 135 | +# CONFIG_FREEZER is not set | |
| 136 | + | |
| 137 | +# | |
| 138 | +# System Type | |
| 139 | +# | |
| 140 | +# CONFIG_ARCH_AAEC2000 is not set | |
| 141 | +# CONFIG_ARCH_INTEGRATOR is not set | |
| 142 | +# CONFIG_ARCH_REALVIEW is not set | |
| 143 | +# CONFIG_ARCH_VERSATILE is not set | |
| 144 | +CONFIG_ARCH_AT91=y | |
| 145 | +# CONFIG_ARCH_CLPS7500 is not set | |
| 146 | +# CONFIG_ARCH_CLPS711X is not set | |
| 147 | +# CONFIG_ARCH_EBSA110 is not set | |
| 148 | +# CONFIG_ARCH_EP93XX is not set | |
| 149 | +# CONFIG_ARCH_FOOTBRIDGE is not set | |
| 150 | +# CONFIG_ARCH_NETX is not set | |
| 151 | +# CONFIG_ARCH_H720X is not set | |
| 152 | +# CONFIG_ARCH_IMX is not set | |
| 153 | +# CONFIG_ARCH_IOP13XX is not set | |
| 154 | +# CONFIG_ARCH_IOP32X is not set | |
| 155 | +# CONFIG_ARCH_IOP33X is not set | |
| 156 | +# CONFIG_ARCH_IXP23XX is not set | |
| 157 | +# CONFIG_ARCH_IXP2000 is not set | |
| 158 | +# CONFIG_ARCH_IXP4XX is not set | |
| 159 | +# CONFIG_ARCH_L7200 is not set | |
| 160 | +# CONFIG_ARCH_KIRKWOOD is not set | |
| 161 | +# CONFIG_ARCH_KS8695 is not set | |
| 162 | +# CONFIG_ARCH_NS9XXX is not set | |
| 163 | +# CONFIG_ARCH_LOKI is not set | |
| 164 | +# CONFIG_ARCH_MV78XX0 is not set | |
| 165 | +# CONFIG_ARCH_MXC is not set | |
| 166 | +# CONFIG_ARCH_ORION5X is not set | |
| 167 | +# CONFIG_ARCH_PNX4008 is not set | |
| 168 | +# CONFIG_ARCH_PXA is not set | |
| 169 | +# CONFIG_ARCH_RPC is not set | |
| 170 | +# CONFIG_ARCH_SA1100 is not set | |
| 171 | +# CONFIG_ARCH_S3C2410 is not set | |
| 172 | +# CONFIG_ARCH_SHARK is not set | |
| 173 | +# CONFIG_ARCH_LH7A40X is not set | |
| 174 | +# CONFIG_ARCH_DAVINCI is not set | |
| 175 | +# CONFIG_ARCH_OMAP is not set | |
| 176 | +# CONFIG_ARCH_MSM is not set | |
| 177 | + | |
| 178 | +# | |
| 179 | +# Boot options | |
| 180 | +# | |
| 181 | + | |
| 182 | +# | |
| 183 | +# Power management | |
| 184 | +# | |
| 185 | + | |
| 186 | +# | |
| 187 | +# Atmel AT91 System-on-Chip | |
| 188 | +# | |
| 189 | +# CONFIG_ARCH_AT91RM9200 is not set | |
| 190 | +# CONFIG_ARCH_AT91SAM9260 is not set | |
| 191 | +# CONFIG_ARCH_AT91SAM9261 is not set | |
| 192 | +# CONFIG_ARCH_AT91SAM9263 is not set | |
| 193 | +# CONFIG_ARCH_AT91SAM9RL is not set | |
| 194 | +# CONFIG_ARCH_AT91SAM9G20 is not set | |
| 195 | +# CONFIG_ARCH_AT91CAP9 is not set | |
| 196 | +# CONFIG_ARCH_AT91X40 is not set | |
| 197 | +CONFIG_ARCH_AT572D940HF=y | |
| 198 | +CONFIG_AT91_PMC_UNIT=y | |
| 199 | + | |
| 200 | +# | |
| 201 | +# AT572D940HF Board Type | |
| 202 | +# | |
| 203 | +CONFIG_MACH_AT572D940HFEB=y | |
| 204 | + | |
| 205 | +# | |
| 206 | +# AT91 Board Options | |
| 207 | +# | |
| 208 | +# CONFIG_MTD_AT91_DATAFLASH_CARD is not set | |
| 209 | +# CONFIG_MTD_NAND_ATMEL_BUSWIDTH_16 is not set | |
| 210 | +CONFIG_NUM_SERIAL=3 | |
| 211 | + | |
| 212 | +# | |
| 213 | +# AT91 Feature Selections | |
| 214 | +# | |
| 215 | +CONFIG_AT91_PROGRAMMABLE_CLOCKS=y | |
| 216 | +CONFIG_AT91_TIMER_HZ=100 | |
| 217 | +CONFIG_AT91_EARLY_DBGU=y | |
| 218 | +# CONFIG_AT91_EARLY_USART0 is not set | |
| 219 | +# CONFIG_AT91_EARLY_USART1 is not set | |
| 220 | +# CONFIG_AT91_EARLY_USART2 is not set | |
| 221 | +# CONFIG_AT91_EARLY_USART3 is not set | |
| 222 | +# CONFIG_AT91_EARLY_USART4 is not set | |
| 223 | +# CONFIG_AT91_EARLY_USART5 is not set | |
| 224 | + | |
| 225 | +# | |
| 226 | +# Processor Type | |
| 227 | +# | |
| 228 | +CONFIG_CPU_32=y | |
| 229 | +CONFIG_CPU_ARM926T=y | |
| 230 | +CONFIG_CPU_32v5=y | |
| 231 | +CONFIG_CPU_ABRT_EV5TJ=y | |
| 232 | +CONFIG_CPU_PABRT_NOIFAR=y | |
| 233 | +CONFIG_CPU_CACHE_VIVT=y | |
| 234 | +CONFIG_CPU_COPY_V4WB=y | |
| 235 | +CONFIG_CPU_TLB_V4WBI=y | |
| 236 | +CONFIG_CPU_CP15=y | |
| 237 | +CONFIG_CPU_CP15_MMU=y | |
| 238 | + | |
| 239 | +# | |
| 240 | +# Processor Features | |
| 241 | +# | |
| 242 | +CONFIG_ARM_THUMB=y | |
| 243 | +# CONFIG_CPU_ICACHE_DISABLE is not set | |
| 244 | +# CONFIG_CPU_DCACHE_DISABLE is not set | |
| 245 | +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set | |
| 246 | +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set | |
| 247 | +# CONFIG_OUTER_CACHE is not set | |
| 248 | + | |
| 249 | +# | |
| 250 | +# Bus support | |
| 251 | +# | |
| 252 | +# CONFIG_PCI_SYSCALL is not set | |
| 253 | +# CONFIG_ARCH_SUPPORTS_MSI is not set | |
| 254 | +# CONFIG_PCCARD is not set | |
| 255 | + | |
| 256 | +# | |
| 257 | +# Kernel Features | |
| 258 | +# | |
| 259 | +CONFIG_TICK_ONESHOT=y | |
| 260 | +CONFIG_NO_HZ=y | |
| 261 | +CONFIG_HIGH_RES_TIMERS=y | |
| 262 | +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
| 263 | +CONFIG_VMSPLIT_3G=y | |
| 264 | +# CONFIG_VMSPLIT_2G is not set | |
| 265 | +# CONFIG_VMSPLIT_1G is not set | |
| 266 | +CONFIG_PAGE_OFFSET=0xC0000000 | |
| 267 | +CONFIG_PREEMPT=y | |
| 268 | +CONFIG_HZ=100 | |
| 269 | +# CONFIG_AEABI is not set | |
| 270 | +CONFIG_ARCH_FLATMEM_HAS_HOLES=y | |
| 271 | +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | |
| 272 | +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | |
| 273 | +CONFIG_SELECT_MEMORY_MODEL=y | |
| 274 | +CONFIG_FLATMEM_MANUAL=y | |
| 275 | +# CONFIG_DISCONTIGMEM_MANUAL is not set | |
| 276 | +# CONFIG_SPARSEMEM_MANUAL is not set | |
| 277 | +CONFIG_FLATMEM=y | |
| 278 | +CONFIG_FLAT_NODE_MEM_MAP=y | |
| 279 | +CONFIG_PAGEFLAGS_EXTENDED=y | |
| 280 | +CONFIG_SPLIT_PTLOCK_CPUS=4096 | |
| 281 | +CONFIG_RESOURCES_64BIT=y | |
| 282 | +# CONFIG_PHYS_ADDR_T_64BIT is not set | |
| 283 | +CONFIG_ZONE_DMA_FLAG=0 | |
| 284 | +CONFIG_VIRT_TO_BUS=y | |
| 285 | +CONFIG_UNEVICTABLE_LRU=y | |
| 286 | +# CONFIG_LEDS is not set | |
| 287 | +CONFIG_ALIGNMENT_TRAP=y | |
| 288 | + | |
| 289 | +# | |
| 290 | +# Boot options | |
| 291 | +# | |
| 292 | +CONFIG_ZBOOT_ROM_TEXT=0 | |
| 293 | +CONFIG_ZBOOT_ROM_BSS=0 | |
| 294 | +CONFIG_CMDLINE="mem=48M console=ttyS0 initrd=0x21100000,3145728 root=/dev/ram0 rw ip=172.16.1.181" | |
| 295 | +# CONFIG_XIP_KERNEL is not set | |
| 296 | +CONFIG_KEXEC=y | |
| 297 | +CONFIG_ATAGS_PROC=y | |
| 298 | + | |
| 299 | +# | |
| 300 | +# CPU Power Management | |
| 301 | +# | |
| 302 | +# CONFIG_CPU_IDLE is not set | |
| 303 | + | |
| 304 | +# | |
| 305 | +# Floating point emulation | |
| 306 | +# | |
| 307 | + | |
| 308 | +# | |
| 309 | +# At least one emulation must be selected | |
| 310 | +# | |
| 311 | +CONFIG_FPE_NWFPE=y | |
| 312 | +CONFIG_FPE_NWFPE_XP=y | |
| 313 | +# CONFIG_FPE_FASTFPE is not set | |
| 314 | +# CONFIG_VFP is not set | |
| 315 | + | |
| 316 | +# | |
| 317 | +# Userspace binary formats | |
| 318 | +# | |
| 319 | +CONFIG_BINFMT_ELF=y | |
| 320 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 321 | +CONFIG_HAVE_AOUT=y | |
| 322 | +# CONFIG_BINFMT_AOUT is not set | |
| 323 | +# CONFIG_BINFMT_MISC is not set | |
| 324 | +# CONFIG_ARTHUR is not set | |
| 325 | + | |
| 326 | +# | |
| 327 | +# Power management options | |
| 328 | +# | |
| 329 | +# CONFIG_PM is not set | |
| 330 | +CONFIG_ARCH_SUSPEND_POSSIBLE=y | |
| 331 | +CONFIG_NET=y | |
| 332 | + | |
| 333 | +# | |
| 334 | +# Networking options | |
| 335 | +# | |
| 336 | +CONFIG_PACKET=m | |
| 337 | +CONFIG_PACKET_MMAP=y | |
| 338 | +CONFIG_UNIX=y | |
| 339 | +# CONFIG_NET_KEY is not set | |
| 340 | +CONFIG_INET=y | |
| 341 | +# CONFIG_IP_MULTICAST is not set | |
| 342 | +# CONFIG_IP_ADVANCED_ROUTER is not set | |
| 343 | +CONFIG_IP_FIB_HASH=y | |
| 344 | +# CONFIG_IP_PNP is not set | |
| 345 | +# CONFIG_NET_IPIP is not set | |
| 346 | +# CONFIG_NET_IPGRE is not set | |
| 347 | +# CONFIG_ARPD is not set | |
| 348 | +# CONFIG_SYN_COOKIES is not set | |
| 349 | +# CONFIG_INET_AH is not set | |
| 350 | +# CONFIG_INET_ESP is not set | |
| 351 | +# CONFIG_INET_IPCOMP is not set | |
| 352 | +# CONFIG_INET_XFRM_TUNNEL is not set | |
| 353 | +# CONFIG_INET_TUNNEL is not set | |
| 354 | +# CONFIG_INET_XFRM_MODE_TRANSPORT is not set | |
| 355 | +# CONFIG_INET_XFRM_MODE_TUNNEL is not set | |
| 356 | +# CONFIG_INET_XFRM_MODE_BEET is not set | |
| 357 | +# CONFIG_INET_LRO is not set | |
| 358 | +# CONFIG_INET_DIAG is not set | |
| 359 | +# CONFIG_TCP_CONG_ADVANCED is not set | |
| 360 | +CONFIG_TCP_CONG_CUBIC=y | |
| 361 | +CONFIG_DEFAULT_TCP_CONG="cubic" | |
| 362 | +# CONFIG_TCP_MD5SIG is not set | |
| 363 | +# CONFIG_IPV6 is not set | |
| 364 | +# CONFIG_NETWORK_SECMARK is not set | |
| 365 | +# CONFIG_NETFILTER is not set | |
| 366 | +# CONFIG_IP_DCCP is not set | |
| 367 | +CONFIG_IP_SCTP=m | |
| 368 | +# CONFIG_SCTP_DBG_MSG is not set | |
| 369 | +# CONFIG_SCTP_DBG_OBJCNT is not set | |
| 370 | +# CONFIG_SCTP_HMAC_NONE is not set | |
| 371 | +# CONFIG_SCTP_HMAC_SHA1 is not set | |
| 372 | +CONFIG_SCTP_HMAC_MD5=y | |
| 373 | +# CONFIG_TIPC is not set | |
| 374 | +# CONFIG_ATM is not set | |
| 375 | +# CONFIG_BRIDGE is not set | |
| 376 | +# CONFIG_NET_DSA is not set | |
| 377 | +# CONFIG_VLAN_8021Q is not set | |
| 378 | +# CONFIG_DECNET is not set | |
| 379 | +# CONFIG_LLC2 is not set | |
| 380 | +# CONFIG_IPX is not set | |
| 381 | +# CONFIG_ATALK is not set | |
| 382 | +# CONFIG_X25 is not set | |
| 383 | +# CONFIG_LAPB is not set | |
| 384 | +# CONFIG_ECONET is not set | |
| 385 | +# CONFIG_WAN_ROUTER is not set | |
| 386 | +# CONFIG_NET_SCHED is not set | |
| 387 | + | |
| 388 | +# | |
| 389 | +# Network testing | |
| 390 | +# | |
| 391 | +CONFIG_NET_PKTGEN=m | |
| 392 | +CONFIG_NET_TCPPROBE=m | |
| 393 | +# CONFIG_HAMRADIO is not set | |
| 394 | +CONFIG_CAN=m | |
| 395 | +CONFIG_CAN_RAW=m | |
| 396 | +CONFIG_CAN_BCM=m | |
| 397 | + | |
| 398 | +# | |
| 399 | +# CAN Device Drivers | |
| 400 | +# | |
| 401 | +CONFIG_CAN_VCAN=m | |
| 402 | +CONFIG_CAN_DEBUG_DEVICES=y | |
| 403 | +# CONFIG_IRDA is not set | |
| 404 | +# CONFIG_BT is not set | |
| 405 | +# CONFIG_AF_RXRPC is not set | |
| 406 | +# CONFIG_PHONET is not set | |
| 407 | +CONFIG_WIRELESS=y | |
| 408 | +# CONFIG_CFG80211 is not set | |
| 409 | +CONFIG_WIRELESS_OLD_REGULATORY=y | |
| 410 | +CONFIG_WIRELESS_EXT=y | |
| 411 | +CONFIG_WIRELESS_EXT_SYSFS=y | |
| 412 | +# CONFIG_MAC80211 is not set | |
| 413 | +CONFIG_IEEE80211=m | |
| 414 | +# CONFIG_IEEE80211_DEBUG is not set | |
| 415 | +CONFIG_IEEE80211_CRYPT_WEP=m | |
| 416 | +# CONFIG_IEEE80211_CRYPT_CCMP is not set | |
| 417 | +# CONFIG_IEEE80211_CRYPT_TKIP is not set | |
| 418 | +# CONFIG_RFKILL is not set | |
| 419 | +# CONFIG_NET_9P is not set | |
| 420 | + | |
| 421 | +# | |
| 422 | +# Device Drivers | |
| 423 | +# | |
| 424 | + | |
| 425 | +# | |
| 426 | +# Generic Driver Options | |
| 427 | +# | |
| 428 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 429 | +CONFIG_STANDALONE=y | |
| 430 | +CONFIG_PREVENT_FIRMWARE_BUILD=y | |
| 431 | +CONFIG_FW_LOADER=y | |
| 432 | +CONFIG_FIRMWARE_IN_KERNEL=y | |
| 433 | +CONFIG_EXTRA_FIRMWARE="" | |
| 434 | +# CONFIG_SYS_HYPERVISOR is not set | |
| 435 | +CONFIG_CONNECTOR=m | |
| 436 | +CONFIG_MTD=m | |
| 437 | +CONFIG_MTD_DEBUG=y | |
| 438 | +CONFIG_MTD_DEBUG_VERBOSE=1 | |
| 439 | +CONFIG_MTD_CONCAT=m | |
| 440 | +CONFIG_MTD_PARTITIONS=y | |
| 441 | +# CONFIG_MTD_REDBOOT_PARTS is not set | |
| 442 | +# CONFIG_MTD_AFS_PARTS is not set | |
| 443 | +# CONFIG_MTD_AR7_PARTS is not set | |
| 444 | + | |
| 445 | +# | |
| 446 | +# User Modules And Translation Layers | |
| 447 | +# | |
| 448 | +CONFIG_MTD_CHAR=m | |
| 449 | +CONFIG_MTD_BLKDEVS=m | |
| 450 | +CONFIG_MTD_BLOCK=m | |
| 451 | +CONFIG_MTD_BLOCK_RO=m | |
| 452 | +CONFIG_FTL=m | |
| 453 | +CONFIG_NFTL=m | |
| 454 | +CONFIG_NFTL_RW=y | |
| 455 | +CONFIG_INFTL=m | |
| 456 | +CONFIG_RFD_FTL=m | |
| 457 | +CONFIG_SSFDC=m | |
| 458 | +CONFIG_MTD_OOPS=m | |
| 459 | + | |
| 460 | +# | |
| 461 | +# RAM/ROM/Flash chip drivers | |
| 462 | +# | |
| 463 | +CONFIG_MTD_CFI=m | |
| 464 | +CONFIG_MTD_JEDECPROBE=m | |
| 465 | +CONFIG_MTD_GEN_PROBE=m | |
| 466 | +# CONFIG_MTD_CFI_ADV_OPTIONS is not set | |
| 467 | +CONFIG_MTD_MAP_BANK_WIDTH_1=y | |
| 468 | +CONFIG_MTD_MAP_BANK_WIDTH_2=y | |
| 469 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | |
| 470 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | |
| 471 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | |
| 472 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | |
| 473 | +CONFIG_MTD_CFI_I1=y | |
| 474 | +CONFIG_MTD_CFI_I2=y | |
| 475 | +# CONFIG_MTD_CFI_I4 is not set | |
| 476 | +# CONFIG_MTD_CFI_I8 is not set | |
| 477 | +CONFIG_MTD_CFI_INTELEXT=m | |
| 478 | +CONFIG_MTD_CFI_AMDSTD=m | |
| 479 | +CONFIG_MTD_CFI_STAA=m | |
| 480 | +CONFIG_MTD_CFI_UTIL=m | |
| 481 | +CONFIG_MTD_RAM=m | |
| 482 | +CONFIG_MTD_ROM=m | |
| 483 | +CONFIG_MTD_ABSENT=m | |
| 484 | + | |
| 485 | +# | |
| 486 | +# Mapping drivers for chip access | |
| 487 | +# | |
| 488 | +CONFIG_MTD_COMPLEX_MAPPINGS=y | |
| 489 | +CONFIG_MTD_PHYSMAP=m | |
| 490 | +CONFIG_MTD_PHYSMAP_START=0x8000000 | |
| 491 | +CONFIG_MTD_PHYSMAP_LEN=0x4000000 | |
| 492 | +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | |
| 493 | +# CONFIG_MTD_ARM_INTEGRATOR is not set | |
| 494 | +# CONFIG_MTD_IMPA7 is not set | |
| 495 | +CONFIG_MTD_PLATRAM=m | |
| 496 | + | |
| 497 | +# | |
| 498 | +# Self-contained MTD device drivers | |
| 499 | +# | |
| 500 | +CONFIG_MTD_DATAFLASH=m | |
| 501 | +# CONFIG_MTD_DATAFLASH_WRITE_VERIFY is not set | |
| 502 | +# CONFIG_MTD_DATAFLASH_OTP is not set | |
| 503 | +CONFIG_MTD_M25P80=m | |
| 504 | +CONFIG_M25PXX_USE_FAST_READ=y | |
| 505 | +CONFIG_MTD_SLRAM=m | |
| 506 | +CONFIG_MTD_PHRAM=m | |
| 507 | +CONFIG_MTD_MTDRAM=m | |
| 508 | +CONFIG_MTDRAM_TOTAL_SIZE=4096 | |
| 509 | +CONFIG_MTDRAM_ERASE_SIZE=128 | |
| 510 | +CONFIG_MTD_BLOCK2MTD=m | |
| 511 | + | |
| 512 | +# | |
| 513 | +# Disk-On-Chip Device Drivers | |
| 514 | +# | |
| 515 | +# CONFIG_MTD_DOC2000 is not set | |
| 516 | +# CONFIG_MTD_DOC2001 is not set | |
| 517 | +# CONFIG_MTD_DOC2001PLUS is not set | |
| 518 | +CONFIG_MTD_NAND=m | |
| 519 | +CONFIG_MTD_NAND_VERIFY_WRITE=y | |
| 520 | +# CONFIG_MTD_NAND_ECC_SMC is not set | |
| 521 | +# CONFIG_MTD_NAND_MUSEUM_IDS is not set | |
| 522 | +# CONFIG_MTD_NAND_GPIO is not set | |
| 523 | +CONFIG_MTD_NAND_IDS=m | |
| 524 | +CONFIG_MTD_NAND_DISKONCHIP=m | |
| 525 | +# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set | |
| 526 | +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 | |
| 527 | +# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set | |
| 528 | +# CONFIG_MTD_NAND_ATMEL is not set | |
| 529 | +CONFIG_MTD_NAND_NANDSIM=m | |
| 530 | +CONFIG_MTD_NAND_PLATFORM=m | |
| 531 | +CONFIG_MTD_ALAUDA=m | |
| 532 | +# CONFIG_MTD_ONENAND is not set | |
| 533 | + | |
| 534 | +# | |
| 535 | +# UBI - Unsorted block images | |
| 536 | +# | |
| 537 | +CONFIG_MTD_UBI=m | |
| 538 | +CONFIG_MTD_UBI_WL_THRESHOLD=4096 | |
| 539 | +CONFIG_MTD_UBI_BEB_RESERVE=1 | |
| 540 | +CONFIG_MTD_UBI_GLUEBI=y | |
| 541 | + | |
| 542 | +# | |
| 543 | +# UBI debugging options | |
| 544 | +# | |
| 545 | +# CONFIG_MTD_UBI_DEBUG is not set | |
| 546 | +# CONFIG_PARPORT is not set | |
| 547 | +CONFIG_BLK_DEV=y | |
| 548 | +# CONFIG_BLK_DEV_COW_COMMON is not set | |
| 549 | +CONFIG_BLK_DEV_LOOP=y | |
| 550 | +CONFIG_BLK_DEV_CRYPTOLOOP=m | |
| 551 | +CONFIG_BLK_DEV_NBD=m | |
| 552 | +# CONFIG_BLK_DEV_UB is not set | |
| 553 | +CONFIG_BLK_DEV_RAM=y | |
| 554 | +CONFIG_BLK_DEV_RAM_COUNT=16 | |
| 555 | +CONFIG_BLK_DEV_RAM_SIZE=65536 | |
| 556 | +# CONFIG_BLK_DEV_XIP is not set | |
| 557 | +# CONFIG_CDROM_PKTCDVD is not set | |
| 558 | +# CONFIG_ATA_OVER_ETH is not set | |
| 559 | +CONFIG_MISC_DEVICES=y | |
| 560 | +CONFIG_ATMEL_TCLIB=y | |
| 561 | +CONFIG_ATMEL_TCB_CLKSRC=y | |
| 562 | +CONFIG_ATMEL_TCB_CLKSRC_BLOCK=0 | |
| 563 | +# CONFIG_EEPROM_93CX6 is not set | |
| 564 | +# CONFIG_ICS932S401 is not set | |
| 565 | +CONFIG_ATMEL_SSC=m | |
| 566 | +# CONFIG_ENCLOSURE_SERVICES is not set | |
| 567 | +# CONFIG_C2PORT is not set | |
| 568 | +CONFIG_HAVE_IDE=y | |
| 569 | +# CONFIG_IDE is not set | |
| 570 | + | |
| 571 | +# | |
| 572 | +# SCSI device support | |
| 573 | +# | |
| 574 | +CONFIG_RAID_ATTRS=m | |
| 575 | +CONFIG_SCSI=m | |
| 576 | +CONFIG_SCSI_DMA=y | |
| 577 | +CONFIG_SCSI_TGT=m | |
| 578 | +# CONFIG_SCSI_NETLINK is not set | |
| 579 | +# CONFIG_SCSI_PROC_FS is not set | |
| 580 | + | |
| 581 | +# | |
| 582 | +# SCSI support type (disk, tape, CD-ROM) | |
| 583 | +# | |
| 584 | +CONFIG_BLK_DEV_SD=m | |
| 585 | +# CONFIG_CHR_DEV_ST is not set | |
| 586 | +# CONFIG_CHR_DEV_OSST is not set | |
| 587 | +CONFIG_BLK_DEV_SR=m | |
| 588 | +# CONFIG_BLK_DEV_SR_VENDOR is not set | |
| 589 | +CONFIG_CHR_DEV_SG=m | |
| 590 | +CONFIG_CHR_DEV_SCH=m | |
| 591 | + | |
| 592 | +# | |
| 593 | +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs | |
| 594 | +# | |
| 595 | +CONFIG_SCSI_MULTI_LUN=y | |
| 596 | +CONFIG_SCSI_CONSTANTS=y | |
| 597 | +CONFIG_SCSI_LOGGING=y | |
| 598 | +CONFIG_SCSI_SCAN_ASYNC=y | |
| 599 | +CONFIG_SCSI_WAIT_SCAN=m | |
| 600 | + | |
| 601 | +# | |
| 602 | +# SCSI Transports | |
| 603 | +# | |
| 604 | +# CONFIG_SCSI_SPI_ATTRS is not set | |
| 605 | +# CONFIG_SCSI_FC_ATTRS is not set | |
| 606 | +CONFIG_SCSI_ISCSI_ATTRS=m | |
| 607 | +# CONFIG_SCSI_SAS_LIBSAS is not set | |
| 608 | +# CONFIG_SCSI_SRP_ATTRS is not set | |
| 609 | +CONFIG_SCSI_LOWLEVEL=y | |
| 610 | +# CONFIG_ISCSI_TCP is not set | |
| 611 | +# CONFIG_SCSI_DEBUG is not set | |
| 612 | +# CONFIG_SCSI_DH is not set | |
| 613 | +# CONFIG_ATA is not set | |
| 614 | +# CONFIG_MD is not set | |
| 615 | +CONFIG_NETDEVICES=y | |
| 616 | +CONFIG_DUMMY=m | |
| 617 | +CONFIG_BONDING=m | |
| 618 | +CONFIG_MACVLAN=m | |
| 619 | +CONFIG_EQUALIZER=m | |
| 620 | +CONFIG_TUN=m | |
| 621 | +CONFIG_VETH=m | |
| 622 | +CONFIG_PHYLIB=y | |
| 623 | + | |
| 624 | +# | |
| 625 | +# MII PHY device drivers | |
| 626 | +# | |
| 627 | +CONFIG_MARVELL_PHY=m | |
| 628 | +CONFIG_DAVICOM_PHY=m | |
| 629 | +CONFIG_QSEMI_PHY=m | |
| 630 | +CONFIG_LXT_PHY=m | |
| 631 | +CONFIG_CICADA_PHY=m | |
| 632 | +CONFIG_VITESSE_PHY=m | |
| 633 | +CONFIG_SMSC_PHY=m | |
| 634 | +CONFIG_BROADCOM_PHY=m | |
| 635 | +CONFIG_ICPLUS_PHY=m | |
| 636 | +# CONFIG_REALTEK_PHY is not set | |
| 637 | +# CONFIG_FIXED_PHY is not set | |
| 638 | +CONFIG_MDIO_BITBANG=m | |
| 639 | +CONFIG_NET_ETHERNET=y | |
| 640 | +CONFIG_MII=m | |
| 641 | +CONFIG_MACB=y | |
| 642 | +# CONFIG_AX88796 is not set | |
| 643 | +# CONFIG_SMC91X is not set | |
| 644 | +# CONFIG_DM9000 is not set | |
| 645 | +# CONFIG_ENC28J60 is not set | |
| 646 | +# CONFIG_SMC911X is not set | |
| 647 | +# CONFIG_IBM_NEW_EMAC_ZMII is not set | |
| 648 | +# CONFIG_IBM_NEW_EMAC_RGMII is not set | |
| 649 | +# CONFIG_IBM_NEW_EMAC_TAH is not set | |
| 650 | +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | |
| 651 | +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | |
| 652 | +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | |
| 653 | +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | |
| 654 | +# CONFIG_B44 is not set | |
| 655 | +# CONFIG_NETDEV_1000 is not set | |
| 656 | +# CONFIG_NETDEV_10000 is not set | |
| 657 | + | |
| 658 | +# | |
| 659 | +# Wireless LAN | |
| 660 | +# | |
| 661 | +CONFIG_WLAN_PRE80211=y | |
| 662 | +CONFIG_STRIP=m | |
| 663 | +CONFIG_WLAN_80211=y | |
| 664 | +CONFIG_LIBERTAS=m | |
| 665 | +CONFIG_LIBERTAS_USB=m | |
| 666 | +CONFIG_LIBERTAS_SDIO=m | |
| 667 | +# CONFIG_LIBERTAS_DEBUG is not set | |
| 668 | +CONFIG_USB_ZD1201=m | |
| 669 | +# CONFIG_USB_NET_RNDIS_WLAN is not set | |
| 670 | +# CONFIG_IWLWIFI_LEDS is not set | |
| 671 | +CONFIG_HOSTAP=m | |
| 672 | +CONFIG_HOSTAP_FIRMWARE=y | |
| 673 | +CONFIG_HOSTAP_FIRMWARE_NVRAM=y | |
| 674 | + | |
| 675 | +# | |
| 676 | +# USB Network Adapters | |
| 677 | +# | |
| 678 | +CONFIG_USB_CATC=m | |
| 679 | +CONFIG_USB_KAWETH=m | |
| 680 | +CONFIG_USB_PEGASUS=m | |
| 681 | +CONFIG_USB_RTL8150=m | |
| 682 | +CONFIG_USB_USBNET=m | |
| 683 | +CONFIG_USB_NET_AX8817X=m | |
| 684 | +CONFIG_USB_NET_CDCETHER=m | |
| 685 | +CONFIG_USB_NET_DM9601=m | |
| 686 | +# CONFIG_USB_NET_SMSC95XX is not set | |
| 687 | +CONFIG_USB_NET_GL620A=m | |
| 688 | +CONFIG_USB_NET_NET1080=m | |
| 689 | +CONFIG_USB_NET_PLUSB=m | |
| 690 | +CONFIG_USB_NET_MCS7830=m | |
| 691 | +CONFIG_USB_NET_RNDIS_HOST=m | |
| 692 | +CONFIG_USB_NET_CDC_SUBSET=m | |
| 693 | +CONFIG_USB_ALI_M5632=y | |
| 694 | +CONFIG_USB_AN2720=y | |
| 695 | +CONFIG_USB_BELKIN=y | |
| 696 | +CONFIG_USB_ARMLINUX=y | |
| 697 | +CONFIG_USB_EPSON2888=y | |
| 698 | +CONFIG_USB_KC2190=y | |
| 699 | +# CONFIG_USB_NET_ZAURUS is not set | |
| 700 | +# CONFIG_WAN is not set | |
| 701 | +# CONFIG_PPP is not set | |
| 702 | +# CONFIG_SLIP is not set | |
| 703 | +# CONFIG_NETCONSOLE is not set | |
| 704 | +# CONFIG_NETPOLL is not set | |
| 705 | +# CONFIG_NET_POLL_CONTROLLER is not set | |
| 706 | +# CONFIG_ISDN is not set | |
| 707 | + | |
| 708 | +# | |
| 709 | +# Input device support | |
| 710 | +# | |
| 711 | +CONFIG_INPUT=y | |
| 712 | +# CONFIG_INPUT_FF_MEMLESS is not set | |
| 713 | +CONFIG_INPUT_POLLDEV=m | |
| 714 | + | |
| 715 | +# | |
| 716 | +# Userland interfaces | |
| 717 | +# | |
| 718 | +CONFIG_INPUT_MOUSEDEV=m | |
| 719 | +CONFIG_INPUT_MOUSEDEV_PSAUX=y | |
| 720 | +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | |
| 721 | +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |
| 722 | +# CONFIG_INPUT_JOYDEV is not set | |
| 723 | +CONFIG_INPUT_EVDEV=m | |
| 724 | +CONFIG_INPUT_EVBUG=m | |
| 725 | + | |
| 726 | +# | |
| 727 | +# Input Device Drivers | |
| 728 | +# | |
| 729 | +CONFIG_INPUT_KEYBOARD=y | |
| 730 | +CONFIG_KEYBOARD_ATKBD=y | |
| 731 | +CONFIG_KEYBOARD_SUNKBD=m | |
| 732 | +CONFIG_KEYBOARD_LKKBD=m | |
| 733 | +CONFIG_KEYBOARD_XTKBD=m | |
| 734 | +CONFIG_KEYBOARD_NEWTON=m | |
| 735 | +CONFIG_KEYBOARD_STOWAWAY=m | |
| 736 | +CONFIG_KEYBOARD_GPIO=m | |
| 737 | +CONFIG_INPUT_MOUSE=y | |
| 738 | +CONFIG_MOUSE_PS2=m | |
| 739 | +CONFIG_MOUSE_PS2_ALPS=y | |
| 740 | +CONFIG_MOUSE_PS2_LOGIPS2PP=y | |
| 741 | +CONFIG_MOUSE_PS2_SYNAPTICS=y | |
| 742 | +CONFIG_MOUSE_PS2_LIFEBOOK=y | |
| 743 | +CONFIG_MOUSE_PS2_TRACKPOINT=y | |
| 744 | +# CONFIG_MOUSE_PS2_ELANTECH is not set | |
| 745 | +# CONFIG_MOUSE_PS2_TOUCHKIT is not set | |
| 746 | +CONFIG_MOUSE_SERIAL=m | |
| 747 | +CONFIG_MOUSE_APPLETOUCH=m | |
| 748 | +# CONFIG_MOUSE_BCM5974 is not set | |
| 749 | +CONFIG_MOUSE_VSXXXAA=m | |
| 750 | +CONFIG_MOUSE_GPIO=m | |
| 751 | +# CONFIG_INPUT_JOYSTICK is not set | |
| 752 | +# CONFIG_INPUT_TABLET is not set | |
| 753 | +# CONFIG_INPUT_TOUCHSCREEN is not set | |
| 754 | +CONFIG_INPUT_MISC=y | |
| 755 | +# CONFIG_INPUT_ATI_REMOTE is not set | |
| 756 | +# CONFIG_INPUT_ATI_REMOTE2 is not set | |
| 757 | +# CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
| 758 | +# CONFIG_INPUT_POWERMATE is not set | |
| 759 | +# CONFIG_INPUT_YEALINK is not set | |
| 760 | +# CONFIG_INPUT_CM109 is not set | |
| 761 | +CONFIG_INPUT_UINPUT=m | |
| 762 | + | |
| 763 | +# | |
| 764 | +# Hardware I/O ports | |
| 765 | +# | |
| 766 | +CONFIG_SERIO=y | |
| 767 | +CONFIG_SERIO_SERPORT=m | |
| 768 | +CONFIG_SERIO_LIBPS2=y | |
| 769 | +CONFIG_SERIO_RAW=m | |
| 770 | +# CONFIG_GAMEPORT is not set | |
| 771 | + | |
| 772 | +# | |
| 773 | +# Character devices | |
| 774 | +# | |
| 775 | +CONFIG_VT=y | |
| 776 | +CONFIG_CONSOLE_TRANSLATIONS=y | |
| 777 | +CONFIG_VT_CONSOLE=y | |
| 778 | +CONFIG_HW_CONSOLE=y | |
| 779 | +CONFIG_VT_HW_CONSOLE_BINDING=y | |
| 780 | +CONFIG_DEVKMEM=y | |
| 781 | +CONFIG_SERIAL_NONSTANDARD=y | |
| 782 | +CONFIG_N_HDLC=m | |
| 783 | +# CONFIG_RISCOM8 is not set | |
| 784 | +CONFIG_SPECIALIX=m | |
| 785 | +CONFIG_RIO=m | |
| 786 | +# CONFIG_RIO_OLDPCI is not set | |
| 787 | +CONFIG_STALDRV=y | |
| 788 | + | |
| 789 | +# | |
| 790 | +# Serial drivers | |
| 791 | +# | |
| 792 | +# CONFIG_SERIAL_8250 is not set | |
| 793 | + | |
| 794 | +# | |
| 795 | +# Non-8250 serial port support | |
| 796 | +# | |
| 797 | +CONFIG_SERIAL_ATMEL=y | |
| 798 | +CONFIG_SERIAL_ATMEL_CONSOLE=y | |
| 799 | +CONFIG_SERIAL_ATMEL_PDC=y | |
| 800 | +# CONFIG_SERIAL_ATMEL_TTYAT is not set | |
| 801 | +CONFIG_SERIAL_CORE=y | |
| 802 | +CONFIG_SERIAL_CORE_CONSOLE=y | |
| 803 | +CONFIG_UNIX98_PTYS=y | |
| 804 | +CONFIG_LEGACY_PTYS=y | |
| 805 | +CONFIG_LEGACY_PTY_COUNT=256 | |
| 806 | +CONFIG_IPMI_HANDLER=m | |
| 807 | +# CONFIG_IPMI_PANIC_EVENT is not set | |
| 808 | +CONFIG_IPMI_DEVICE_INTERFACE=m | |
| 809 | +CONFIG_IPMI_SI=m | |
| 810 | +CONFIG_IPMI_WATCHDOG=m | |
| 811 | +CONFIG_IPMI_POWEROFF=m | |
| 812 | +CONFIG_HW_RANDOM=y | |
| 813 | +CONFIG_NVRAM=m | |
| 814 | +CONFIG_R3964=m | |
| 815 | +CONFIG_RAW_DRIVER=m | |
| 816 | +CONFIG_MAX_RAW_DEVS=256 | |
| 817 | +CONFIG_TCG_TPM=m | |
| 818 | +CONFIG_TCG_NSC=m | |
| 819 | +CONFIG_TCG_ATMEL=m | |
| 820 | +CONFIG_I2C=m | |
| 821 | +CONFIG_I2C_BOARDINFO=y | |
| 822 | +CONFIG_I2C_CHARDEV=m | |
| 823 | +CONFIG_I2C_HELPER_AUTO=y | |
| 824 | + | |
| 825 | +# | |
| 826 | +# I2C Hardware Bus support | |
| 827 | +# | |
| 828 | + | |
| 829 | +# | |
| 830 | +# I2C system bus drivers (mostly embedded / system-on-chip) | |
| 831 | +# | |
| 832 | +# CONFIG_I2C_GPIO is not set | |
| 833 | +# CONFIG_I2C_OCORES is not set | |
| 834 | +# CONFIG_I2C_SIMTEC is not set | |
| 835 | + | |
| 836 | +# | |
| 837 | +# External I2C/SMBus adapter drivers | |
| 838 | +# | |
| 839 | +# CONFIG_I2C_PARPORT_LIGHT is not set | |
| 840 | +# CONFIG_I2C_TAOS_EVM is not set | |
| 841 | +# CONFIG_I2C_TINY_USB is not set | |
| 842 | + | |
| 843 | +# | |
| 844 | +# Other I2C/SMBus bus drivers | |
| 845 | +# | |
| 846 | +# CONFIG_I2C_PCA_PLATFORM is not set | |
| 847 | +# CONFIG_I2C_STUB is not set | |
| 848 | + | |
| 849 | +# | |
| 850 | +# Miscellaneous I2C Chip support | |
| 851 | +# | |
| 852 | +CONFIG_DS1682=m | |
| 853 | +# CONFIG_AT24 is not set | |
| 854 | +CONFIG_SENSORS_EEPROM=m | |
| 855 | +CONFIG_SENSORS_PCF8574=m | |
| 856 | +# CONFIG_PCF8575 is not set | |
| 857 | +# CONFIG_SENSORS_PCA9539 is not set | |
| 858 | +CONFIG_SENSORS_PCF8591=m | |
| 859 | +CONFIG_SENSORS_MAX6875=m | |
| 860 | +CONFIG_SENSORS_TSL2550=m | |
| 861 | +# CONFIG_I2C_DEBUG_CORE is not set | |
| 862 | +# CONFIG_I2C_DEBUG_ALGO is not set | |
| 863 | +# CONFIG_I2C_DEBUG_BUS is not set | |
| 864 | +# CONFIG_I2C_DEBUG_CHIP is not set | |
| 865 | +CONFIG_SPI=y | |
| 866 | +CONFIG_SPI_MASTER=y | |
| 867 | + | |
| 868 | +# | |
| 869 | +# SPI Master Controller Drivers | |
| 870 | +# | |
| 871 | +CONFIG_SPI_ATMEL=y | |
| 872 | +CONFIG_SPI_BITBANG=m | |
| 873 | + | |
| 874 | +# | |
| 875 | +# SPI Protocol Masters | |
| 876 | +# | |
| 877 | +CONFIG_SPI_AT25=m | |
| 878 | +CONFIG_SPI_SPIDEV=m | |
| 879 | +# CONFIG_SPI_TLE62X0 is not set | |
| 880 | +# CONFIG_W1 is not set | |
| 881 | +# CONFIG_POWER_SUPPLY is not set | |
| 882 | +# CONFIG_HWMON is not set | |
| 883 | +# CONFIG_THERMAL is not set | |
| 884 | +# CONFIG_THERMAL_HWMON is not set | |
| 885 | +# CONFIG_WATCHDOG is not set | |
| 886 | +CONFIG_SSB_POSSIBLE=y | |
| 887 | + | |
| 888 | +# | |
| 889 | +# Sonics Silicon Backplane | |
| 890 | +# | |
| 891 | +# CONFIG_SSB is not set | |
| 892 | + | |
| 893 | +# | |
| 894 | +# Multifunction device drivers | |
| 895 | +# | |
| 896 | +# CONFIG_MFD_CORE is not set | |
| 897 | +# CONFIG_MFD_SM501 is not set | |
| 898 | +# CONFIG_HTC_PASIC3 is not set | |
| 899 | +# CONFIG_MFD_TMIO is not set | |
| 900 | +# CONFIG_MFD_T7L66XB is not set | |
| 901 | +# CONFIG_MFD_TC6387XB is not set | |
| 902 | +# CONFIG_MFD_WM8400 is not set | |
| 903 | +# CONFIG_MFD_WM8350_I2C is not set | |
| 904 | + | |
| 905 | +# | |
| 906 | +# Multimedia devices | |
| 907 | +# | |
| 908 | + | |
| 909 | +# | |
| 910 | +# Multimedia core support | |
| 911 | +# | |
| 912 | +# CONFIG_VIDEO_DEV is not set | |
| 913 | +# CONFIG_DVB_CORE is not set | |
| 914 | +# CONFIG_VIDEO_MEDIA is not set | |
| 915 | + | |
| 916 | +# | |
| 917 | +# Multimedia drivers | |
| 918 | +# | |
| 919 | +# CONFIG_DAB is not set | |
| 920 | + | |
| 921 | +# | |
| 922 | +# Graphics support | |
| 923 | +# | |
| 924 | +# CONFIG_VGASTATE is not set | |
| 925 | +# CONFIG_VIDEO_OUTPUT_CONTROL is not set | |
| 926 | +# CONFIG_FB is not set | |
| 927 | +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set | |
| 928 | + | |
| 929 | +# | |
| 930 | +# Display device support | |
| 931 | +# | |
| 932 | +# CONFIG_DISPLAY_SUPPORT is not set | |
| 933 | + | |
| 934 | +# | |
| 935 | +# Console display driver support | |
| 936 | +# | |
| 937 | +# CONFIG_VGA_CONSOLE is not set | |
| 938 | +CONFIG_DUMMY_CONSOLE=y | |
| 939 | +CONFIG_SOUND=m | |
| 940 | +CONFIG_SOUND_OSS_CORE=y | |
| 941 | +CONFIG_SND=m | |
| 942 | +CONFIG_SND_TIMER=m | |
| 943 | +CONFIG_SND_PCM=m | |
| 944 | +CONFIG_SND_HWDEP=m | |
| 945 | +CONFIG_SND_RAWMIDI=m | |
| 946 | +CONFIG_SND_SEQUENCER=m | |
| 947 | +CONFIG_SND_SEQ_DUMMY=m | |
| 948 | +CONFIG_SND_OSSEMUL=y | |
| 949 | +CONFIG_SND_MIXER_OSS=m | |
| 950 | +CONFIG_SND_PCM_OSS=m | |
| 951 | +# CONFIG_SND_PCM_OSS_PLUGINS is not set | |
| 952 | +CONFIG_SND_SEQUENCER_OSS=y | |
| 953 | +CONFIG_SND_DYNAMIC_MINORS=y | |
| 954 | +CONFIG_SND_SUPPORT_OLD_API=y | |
| 955 | +# CONFIG_SND_VERBOSE_PROCFS is not set | |
| 956 | +# CONFIG_SND_VERBOSE_PRINTK is not set | |
| 957 | +# CONFIG_SND_DEBUG is not set | |
| 958 | +CONFIG_SND_DRIVERS=y | |
| 959 | +CONFIG_SND_DUMMY=m | |
| 960 | +CONFIG_SND_VIRMIDI=m | |
| 961 | +# CONFIG_SND_MTPAV is not set | |
| 962 | +# CONFIG_SND_SERIAL_U16550 is not set | |
| 963 | +# CONFIG_SND_MPU401 is not set | |
| 964 | +CONFIG_SND_ARM=y | |
| 965 | +CONFIG_SND_SPI=y | |
| 966 | +# CONFIG_SND_AT73C213 is not set | |
| 967 | +CONFIG_SND_USB=y | |
| 968 | +CONFIG_SND_USB_AUDIO=m | |
| 969 | +CONFIG_SND_USB_CAIAQ=m | |
| 970 | +CONFIG_SND_USB_CAIAQ_INPUT=y | |
| 971 | +# CONFIG_SND_SOC is not set | |
| 972 | +# CONFIG_SOUND_PRIME is not set | |
| 973 | +CONFIG_HID_SUPPORT=y | |
| 974 | +CONFIG_HID=m | |
| 975 | +# CONFIG_HID_DEBUG is not set | |
| 976 | +CONFIG_HIDRAW=y | |
| 977 | + | |
| 978 | +# | |
| 979 | +# USB Input Devices | |
| 980 | +# | |
| 981 | +CONFIG_USB_HID=m | |
| 982 | +# CONFIG_HID_PID is not set | |
| 983 | +CONFIG_USB_HIDDEV=y | |
| 984 | + | |
| 985 | +# | |
| 986 | +# USB HID Boot Protocol drivers | |
| 987 | +# | |
| 988 | +CONFIG_USB_KBD=m | |
| 989 | +CONFIG_USB_MOUSE=m | |
| 990 | + | |
| 991 | +# | |
| 992 | +# Special HID drivers | |
| 993 | +# | |
| 994 | +CONFIG_HID_COMPAT=y | |
| 995 | +CONFIG_HID_A4TECH=m | |
| 996 | +CONFIG_HID_APPLE=m | |
| 997 | +CONFIG_HID_BELKIN=m | |
| 998 | +CONFIG_HID_BRIGHT=m | |
| 999 | +CONFIG_HID_CHERRY=m | |
| 1000 | +CONFIG_HID_CHICONY=m | |
| 1001 | +CONFIG_HID_CYPRESS=m | |
| 1002 | +CONFIG_HID_DELL=m | |
| 1003 | +CONFIG_HID_EZKEY=m | |
| 1004 | +CONFIG_HID_GYRATION=m | |
| 1005 | +CONFIG_HID_LOGITECH=m | |
| 1006 | +# CONFIG_LOGITECH_FF is not set | |
| 1007 | +# CONFIG_LOGIRUMBLEPAD2_FF is not set | |
| 1008 | +CONFIG_HID_MICROSOFT=m | |
| 1009 | +CONFIG_HID_MONTEREY=m | |
| 1010 | +CONFIG_HID_PANTHERLORD=m | |
| 1011 | +# CONFIG_PANTHERLORD_FF is not set | |
| 1012 | +CONFIG_HID_PETALYNX=m | |
| 1013 | +CONFIG_HID_SAMSUNG=m | |
| 1014 | +CONFIG_HID_SONY=m | |
| 1015 | +CONFIG_HID_SUNPLUS=m | |
| 1016 | +# CONFIG_THRUSTMASTER_FF is not set | |
| 1017 | +# CONFIG_ZEROPLUS_FF is not set | |
| 1018 | +CONFIG_USB_SUPPORT=y | |
| 1019 | +CONFIG_USB_ARCH_HAS_HCD=y | |
| 1020 | +CONFIG_USB_ARCH_HAS_OHCI=y | |
| 1021 | +# CONFIG_USB_ARCH_HAS_EHCI is not set | |
| 1022 | +CONFIG_USB=y | |
| 1023 | +# CONFIG_USB_DEBUG is not set | |
| 1024 | +# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | |
| 1025 | + | |
| 1026 | +# | |
| 1027 | +# Miscellaneous USB options | |
| 1028 | +# | |
| 1029 | +CONFIG_USB_DEVICEFS=y | |
| 1030 | +# CONFIG_USB_DEVICE_CLASS is not set | |
| 1031 | +CONFIG_USB_DYNAMIC_MINORS=y | |
| 1032 | +# CONFIG_USB_OTG is not set | |
| 1033 | +# CONFIG_USB_OTG_WHITELIST is not set | |
| 1034 | +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | |
| 1035 | +CONFIG_USB_MON=y | |
| 1036 | +# CONFIG_USB_WUSB is not set | |
| 1037 | +# CONFIG_USB_WUSB_CBAF is not set | |
| 1038 | + | |
| 1039 | +# | |
| 1040 | +# USB Host Controller Drivers | |
| 1041 | +# | |
| 1042 | +# CONFIG_USB_C67X00_HCD is not set | |
| 1043 | +# CONFIG_USB_ISP116X_HCD is not set | |
| 1044 | +CONFIG_USB_OHCI_HCD=y | |
| 1045 | +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | |
| 1046 | +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | |
| 1047 | +CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |
| 1048 | +# CONFIG_USB_SL811_HCD is not set | |
| 1049 | +# CONFIG_USB_R8A66597_HCD is not set | |
| 1050 | +# CONFIG_USB_HWA_HCD is not set | |
| 1051 | +# CONFIG_USB_MUSB_HDRC is not set | |
| 1052 | +# CONFIG_USB_GADGET_MUSB_HDRC is not set | |
| 1053 | + | |
| 1054 | +# | |
| 1055 | +# USB Device Class drivers | |
| 1056 | +# | |
| 1057 | +# CONFIG_USB_ACM is not set | |
| 1058 | +# CONFIG_USB_PRINTER is not set | |
| 1059 | +# CONFIG_USB_WDM is not set | |
| 1060 | +# CONFIG_USB_TMC is not set | |
| 1061 | + | |
| 1062 | +# | |
| 1063 | +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | |
| 1064 | +# | |
| 1065 | + | |
| 1066 | +# | |
| 1067 | +# see USB_STORAGE Help for more information | |
| 1068 | +# | |
| 1069 | +CONFIG_USB_STORAGE=m | |
| 1070 | +# CONFIG_USB_STORAGE_DEBUG is not set | |
| 1071 | +CONFIG_USB_STORAGE_DATAFAB=y | |
| 1072 | +CONFIG_USB_STORAGE_FREECOM=y | |
| 1073 | +CONFIG_USB_STORAGE_ISD200=y | |
| 1074 | +CONFIG_USB_STORAGE_DPCM=y | |
| 1075 | +CONFIG_USB_STORAGE_USBAT=y | |
| 1076 | +CONFIG_USB_STORAGE_SDDR09=y | |
| 1077 | +CONFIG_USB_STORAGE_SDDR55=y | |
| 1078 | +CONFIG_USB_STORAGE_JUMPSHOT=y | |
| 1079 | +CONFIG_USB_STORAGE_ALAUDA=y | |
| 1080 | +# CONFIG_USB_STORAGE_ONETOUCH is not set | |
| 1081 | +CONFIG_USB_STORAGE_KARMA=y | |
| 1082 | +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | |
| 1083 | +CONFIG_USB_LIBUSUAL=y | |
| 1084 | + | |
| 1085 | +# | |
| 1086 | +# USB Imaging devices | |
| 1087 | +# | |
| 1088 | +# CONFIG_USB_MDC800 is not set | |
| 1089 | +# CONFIG_USB_MICROTEK is not set | |
| 1090 | + | |
| 1091 | +# | |
| 1092 | +# USB port drivers | |
| 1093 | +# | |
| 1094 | +CONFIG_USB_SERIAL=m | |
| 1095 | +CONFIG_USB_EZUSB=y | |
| 1096 | +CONFIG_USB_SERIAL_GENERIC=y | |
| 1097 | +# CONFIG_USB_SERIAL_AIRCABLE is not set | |
| 1098 | +# CONFIG_USB_SERIAL_ARK3116 is not set | |
| 1099 | +# CONFIG_USB_SERIAL_BELKIN is not set | |
| 1100 | +# CONFIG_USB_SERIAL_CH341 is not set | |
| 1101 | +# CONFIG_USB_SERIAL_WHITEHEAT is not set | |
| 1102 | +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | |
| 1103 | +# CONFIG_USB_SERIAL_CP2101 is not set | |
| 1104 | +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set | |
| 1105 | +# CONFIG_USB_SERIAL_EMPEG is not set | |
| 1106 | +# CONFIG_USB_SERIAL_FTDI_SIO is not set | |
| 1107 | +# CONFIG_USB_SERIAL_FUNSOFT is not set | |
| 1108 | +# CONFIG_USB_SERIAL_VISOR is not set | |
| 1109 | +# CONFIG_USB_SERIAL_IPAQ is not set | |
| 1110 | +# CONFIG_USB_SERIAL_IR is not set | |
| 1111 | +# CONFIG_USB_SERIAL_EDGEPORT is not set | |
| 1112 | +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set | |
| 1113 | +# CONFIG_USB_SERIAL_GARMIN is not set | |
| 1114 | +# CONFIG_USB_SERIAL_IPW is not set | |
| 1115 | +# CONFIG_USB_SERIAL_IUU is not set | |
| 1116 | +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | |
| 1117 | +# CONFIG_USB_SERIAL_KEYSPAN is not set | |
| 1118 | +# CONFIG_USB_SERIAL_KLSI is not set | |
| 1119 | +# CONFIG_USB_SERIAL_KOBIL_SCT is not set | |
| 1120 | +# CONFIG_USB_SERIAL_MCT_U232 is not set | |
| 1121 | +# CONFIG_USB_SERIAL_MOS7720 is not set | |
| 1122 | +# CONFIG_USB_SERIAL_MOS7840 is not set | |
| 1123 | +# CONFIG_USB_SERIAL_MOTOROLA is not set | |
| 1124 | +# CONFIG_USB_SERIAL_NAVMAN is not set | |
| 1125 | +CONFIG_USB_SERIAL_PL2303=m | |
| 1126 | +# CONFIG_USB_SERIAL_OTI6858 is not set | |
| 1127 | +CONFIG_USB_SERIAL_SPCP8X5=m | |
| 1128 | +# CONFIG_USB_SERIAL_HP4X is not set | |
| 1129 | +# CONFIG_USB_SERIAL_SAFE is not set | |
| 1130 | +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | |
| 1131 | +# CONFIG_USB_SERIAL_TI is not set | |
| 1132 | +# CONFIG_USB_SERIAL_CYBERJACK is not set | |
| 1133 | +# CONFIG_USB_SERIAL_XIRCOM is not set | |
| 1134 | +# CONFIG_USB_SERIAL_OPTION is not set | |
| 1135 | +# CONFIG_USB_SERIAL_OMNINET is not set | |
| 1136 | +CONFIG_USB_SERIAL_DEBUG=m | |
| 1137 | + | |
| 1138 | +# | |
| 1139 | +# USB Miscellaneous drivers | |
| 1140 | +# | |
| 1141 | +CONFIG_USB_EMI62=m | |
| 1142 | +CONFIG_USB_EMI26=m | |
| 1143 | +CONFIG_USB_ADUTUX=m | |
| 1144 | +# CONFIG_USB_SEVSEG is not set | |
| 1145 | +# CONFIG_USB_RIO500 is not set | |
| 1146 | +# CONFIG_USB_LEGOTOWER is not set | |
| 1147 | +# CONFIG_USB_LCD is not set | |
| 1148 | +# CONFIG_USB_BERRY_CHARGE is not set | |
| 1149 | +# CONFIG_USB_LED is not set | |
| 1150 | +# CONFIG_USB_CYPRESS_CY7C63 is not set | |
| 1151 | +# CONFIG_USB_CYTHERM is not set | |
| 1152 | +# CONFIG_USB_PHIDGET is not set | |
| 1153 | +# CONFIG_USB_IDMOUSE is not set | |
| 1154 | +# CONFIG_USB_FTDI_ELAN is not set | |
| 1155 | +# CONFIG_USB_APPLEDISPLAY is not set | |
| 1156 | +# CONFIG_USB_LD is not set | |
| 1157 | +# CONFIG_USB_TRANCEVIBRATOR is not set | |
| 1158 | +# CONFIG_USB_IOWARRIOR is not set | |
| 1159 | +CONFIG_USB_TEST=m | |
| 1160 | +# CONFIG_USB_ISIGHTFW is not set | |
| 1161 | +# CONFIG_USB_VST is not set | |
| 1162 | +CONFIG_USB_GADGET=m | |
| 1163 | +CONFIG_USB_GADGET_DEBUG_FILES=y | |
| 1164 | +CONFIG_USB_GADGET_DEBUG_FS=y | |
| 1165 | +CONFIG_USB_GADGET_VBUS_DRAW=2 | |
| 1166 | +CONFIG_USB_GADGET_SELECTED=y | |
| 1167 | +CONFIG_USB_GADGET_AT91=y | |
| 1168 | +CONFIG_USB_AT91=m | |
| 1169 | +# CONFIG_USB_GADGET_ATMEL_USBA is not set | |
| 1170 | +# CONFIG_USB_GADGET_FSL_USB2 is not set | |
| 1171 | +# CONFIG_USB_GADGET_LH7A40X is not set | |
| 1172 | +# CONFIG_USB_GADGET_OMAP is not set | |
| 1173 | +# CONFIG_USB_GADGET_PXA25X is not set | |
| 1174 | +# CONFIG_USB_GADGET_PXA27X is not set | |
| 1175 | +# CONFIG_USB_GADGET_S3C2410 is not set | |
| 1176 | +# CONFIG_USB_GADGET_M66592 is not set | |
| 1177 | +# CONFIG_USB_GADGET_AMD5536UDC is not set | |
| 1178 | +# CONFIG_USB_GADGET_FSL_QE is not set | |
| 1179 | +# CONFIG_USB_GADGET_NET2280 is not set | |
| 1180 | +# CONFIG_USB_GADGET_GOKU is not set | |
| 1181 | +# CONFIG_USB_GADGET_DUMMY_HCD is not set | |
| 1182 | +# CONFIG_USB_GADGET_DUALSPEED is not set | |
| 1183 | +CONFIG_USB_ZERO=m | |
| 1184 | +CONFIG_USB_ETH=m | |
| 1185 | +CONFIG_USB_ETH_RNDIS=y | |
| 1186 | +CONFIG_USB_GADGETFS=m | |
| 1187 | +CONFIG_USB_FILE_STORAGE=m | |
| 1188 | +# CONFIG_USB_FILE_STORAGE_TEST is not set | |
| 1189 | +CONFIG_USB_G_SERIAL=m | |
| 1190 | +CONFIG_USB_MIDI_GADGET=m | |
| 1191 | +# CONFIG_USB_G_PRINTER is not set | |
| 1192 | +# CONFIG_USB_CDC_COMPOSITE is not set | |
| 1193 | +CONFIG_MMC=y | |
| 1194 | +# CONFIG_MMC_DEBUG is not set | |
| 1195 | +# CONFIG_MMC_UNSAFE_RESUME is not set | |
| 1196 | + | |
| 1197 | +# | |
| 1198 | +# MMC/SD/SDIO Card Drivers | |
| 1199 | +# | |
| 1200 | +CONFIG_MMC_BLOCK=y | |
| 1201 | +CONFIG_MMC_BLOCK_BOUNCE=y | |
| 1202 | +CONFIG_SDIO_UART=m | |
| 1203 | +# CONFIG_MMC_TEST is not set | |
| 1204 | + | |
| 1205 | +# | |
| 1206 | +# MMC/SD/SDIO Host Controller Drivers | |
| 1207 | +# | |
| 1208 | +# CONFIG_MMC_SDHCI is not set | |
| 1209 | +CONFIG_MMC_AT91=y | |
| 1210 | +CONFIG_MMC_SPI=m | |
| 1211 | +# CONFIG_MEMSTICK is not set | |
| 1212 | +# CONFIG_ACCESSIBILITY is not set | |
| 1213 | +CONFIG_NEW_LEDS=y | |
| 1214 | +CONFIG_LEDS_CLASS=m | |
| 1215 | + | |
| 1216 | +# | |
| 1217 | +# LED drivers | |
| 1218 | +# | |
| 1219 | +# CONFIG_LEDS_PCA9532 is not set | |
| 1220 | +CONFIG_LEDS_GPIO=m | |
| 1221 | +# CONFIG_LEDS_PCA955X is not set | |
| 1222 | + | |
| 1223 | +# | |
| 1224 | +# LED Triggers | |
| 1225 | +# | |
| 1226 | +CONFIG_LEDS_TRIGGERS=y | |
| 1227 | +CONFIG_LEDS_TRIGGER_TIMER=m | |
| 1228 | +CONFIG_LEDS_TRIGGER_HEARTBEAT=m | |
| 1229 | +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | |
| 1230 | +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | |
| 1231 | +CONFIG_RTC_LIB=y | |
| 1232 | +CONFIG_RTC_CLASS=y | |
| 1233 | +CONFIG_RTC_HCTOSYS=y | |
| 1234 | +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | |
| 1235 | +# CONFIG_RTC_DEBUG is not set | |
| 1236 | + | |
| 1237 | +# | |
| 1238 | +# RTC interfaces | |
| 1239 | +# | |
| 1240 | +CONFIG_RTC_INTF_SYSFS=y | |
| 1241 | +CONFIG_RTC_INTF_PROC=y | |
| 1242 | +CONFIG_RTC_INTF_DEV=y | |
| 1243 | +CONFIG_RTC_INTF_DEV_UIE_EMUL=y | |
| 1244 | +# CONFIG_RTC_DRV_TEST is not set | |
| 1245 | + | |
| 1246 | +# | |
| 1247 | +# I2C RTC drivers | |
| 1248 | +# | |
| 1249 | +CONFIG_RTC_DRV_DS1307=m | |
| 1250 | +# CONFIG_RTC_DRV_DS1374 is not set | |
| 1251 | +# CONFIG_RTC_DRV_DS1672 is not set | |
| 1252 | +# CONFIG_RTC_DRV_MAX6900 is not set | |
| 1253 | +# CONFIG_RTC_DRV_RS5C372 is not set | |
| 1254 | +# CONFIG_RTC_DRV_ISL1208 is not set | |
| 1255 | +# CONFIG_RTC_DRV_X1205 is not set | |
| 1256 | +# CONFIG_RTC_DRV_PCF8563 is not set | |
| 1257 | +# CONFIG_RTC_DRV_PCF8583 is not set | |
| 1258 | +# CONFIG_RTC_DRV_M41T80 is not set | |
| 1259 | +# CONFIG_RTC_DRV_S35390A is not set | |
| 1260 | +# CONFIG_RTC_DRV_FM3130 is not set | |
| 1261 | +# CONFIG_RTC_DRV_RX8581 is not set | |
| 1262 | + | |
| 1263 | +# | |
| 1264 | +# SPI RTC drivers | |
| 1265 | +# | |
| 1266 | +# CONFIG_RTC_DRV_M41T94 is not set | |
| 1267 | +CONFIG_RTC_DRV_DS1305=y | |
| 1268 | +# CONFIG_RTC_DRV_DS1390 is not set | |
| 1269 | +# CONFIG_RTC_DRV_MAX6902 is not set | |
| 1270 | +# CONFIG_RTC_DRV_R9701 is not set | |
| 1271 | +# CONFIG_RTC_DRV_RS5C348 is not set | |
| 1272 | +# CONFIG_RTC_DRV_DS3234 is not set | |
| 1273 | + | |
| 1274 | +# | |
| 1275 | +# Platform RTC drivers | |
| 1276 | +# | |
| 1277 | +# CONFIG_RTC_DRV_CMOS is not set | |
| 1278 | +# CONFIG_RTC_DRV_DS1286 is not set | |
| 1279 | +# CONFIG_RTC_DRV_DS1511 is not set | |
| 1280 | +# CONFIG_RTC_DRV_DS1553 is not set | |
| 1281 | +# CONFIG_RTC_DRV_DS1742 is not set | |
| 1282 | +# CONFIG_RTC_DRV_STK17TA8 is not set | |
| 1283 | +# CONFIG_RTC_DRV_M48T86 is not set | |
| 1284 | +# CONFIG_RTC_DRV_M48T35 is not set | |
| 1285 | +# CONFIG_RTC_DRV_M48T59 is not set | |
| 1286 | +# CONFIG_RTC_DRV_BQ4802 is not set | |
| 1287 | +# CONFIG_RTC_DRV_V3020 is not set | |
| 1288 | + | |
| 1289 | +# | |
| 1290 | +# on-CPU RTC drivers | |
| 1291 | +# | |
| 1292 | +# CONFIG_RTC_DRV_AT91SAM9 is not set | |
| 1293 | +# CONFIG_DMADEVICES is not set | |
| 1294 | +# CONFIG_REGULATOR is not set | |
| 1295 | +# CONFIG_UIO is not set | |
| 1296 | + | |
| 1297 | +# | |
| 1298 | +# File systems | |
| 1299 | +# | |
| 1300 | +CONFIG_EXT2_FS=y | |
| 1301 | +CONFIG_EXT2_FS_XATTR=y | |
| 1302 | +CONFIG_EXT2_FS_POSIX_ACL=y | |
| 1303 | +CONFIG_EXT2_FS_SECURITY=y | |
| 1304 | +# CONFIG_EXT2_FS_XIP is not set | |
| 1305 | +CONFIG_EXT3_FS=y | |
| 1306 | +CONFIG_EXT3_FS_XATTR=y | |
| 1307 | +CONFIG_EXT3_FS_POSIX_ACL=y | |
| 1308 | +CONFIG_EXT3_FS_SECURITY=y | |
| 1309 | +# CONFIG_EXT4_FS is not set | |
| 1310 | +CONFIG_JBD=y | |
| 1311 | +CONFIG_JBD_DEBUG=y | |
| 1312 | +CONFIG_FS_MBCACHE=y | |
| 1313 | +CONFIG_REISERFS_FS=m | |
| 1314 | +CONFIG_REISERFS_CHECK=y | |
| 1315 | +CONFIG_REISERFS_PROC_INFO=y | |
| 1316 | +CONFIG_REISERFS_FS_XATTR=y | |
| 1317 | +CONFIG_REISERFS_FS_POSIX_ACL=y | |
| 1318 | +CONFIG_REISERFS_FS_SECURITY=y | |
| 1319 | +# CONFIG_JFS_FS is not set | |
| 1320 | +CONFIG_FS_POSIX_ACL=y | |
| 1321 | +CONFIG_FILE_LOCKING=y | |
| 1322 | +# CONFIG_XFS_FS is not set | |
| 1323 | +# CONFIG_OCFS2_FS is not set | |
| 1324 | +CONFIG_DNOTIFY=y | |
| 1325 | +CONFIG_INOTIFY=y | |
| 1326 | +CONFIG_INOTIFY_USER=y | |
| 1327 | +# CONFIG_QUOTA is not set | |
| 1328 | +# CONFIG_AUTOFS_FS is not set | |
| 1329 | +# CONFIG_AUTOFS4_FS is not set | |
| 1330 | +CONFIG_FUSE_FS=m | |
| 1331 | +CONFIG_GENERIC_ACL=y | |
| 1332 | + | |
| 1333 | +# | |
| 1334 | +# CD-ROM/DVD Filesystems | |
| 1335 | +# | |
| 1336 | +# CONFIG_ISO9660_FS is not set | |
| 1337 | +# CONFIG_UDF_FS is not set | |
| 1338 | + | |
| 1339 | +# | |
| 1340 | +# DOS/FAT/NT Filesystems | |
| 1341 | +# | |
| 1342 | +CONFIG_FAT_FS=y | |
| 1343 | +CONFIG_MSDOS_FS=m | |
| 1344 | +CONFIG_VFAT_FS=y | |
| 1345 | +CONFIG_FAT_DEFAULT_CODEPAGE=437 | |
| 1346 | +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |
| 1347 | +CONFIG_NTFS_FS=m | |
| 1348 | +# CONFIG_NTFS_DEBUG is not set | |
| 1349 | +CONFIG_NTFS_RW=y | |
| 1350 | + | |
| 1351 | +# | |
| 1352 | +# Pseudo filesystems | |
| 1353 | +# | |
| 1354 | +CONFIG_PROC_FS=y | |
| 1355 | +CONFIG_PROC_SYSCTL=y | |
| 1356 | +CONFIG_PROC_PAGE_MONITOR=y | |
| 1357 | +CONFIG_SYSFS=y | |
| 1358 | +CONFIG_TMPFS=y | |
| 1359 | +CONFIG_TMPFS_POSIX_ACL=y | |
| 1360 | +# CONFIG_HUGETLB_PAGE is not set | |
| 1361 | +CONFIG_CONFIGFS_FS=m | |
| 1362 | + | |
| 1363 | +# | |
| 1364 | +# Miscellaneous filesystems | |
| 1365 | +# | |
| 1366 | +# CONFIG_ADFS_FS is not set | |
| 1367 | +# CONFIG_AFFS_FS is not set | |
| 1368 | +# CONFIG_HFS_FS is not set | |
| 1369 | +# CONFIG_HFSPLUS_FS is not set | |
| 1370 | +# CONFIG_BEFS_FS is not set | |
| 1371 | +# CONFIG_BFS_FS is not set | |
| 1372 | +# CONFIG_EFS_FS is not set | |
| 1373 | +CONFIG_JFFS2_FS=m | |
| 1374 | +CONFIG_JFFS2_FS_DEBUG=0 | |
| 1375 | +CONFIG_JFFS2_FS_WRITEBUFFER=y | |
| 1376 | +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set | |
| 1377 | +# CONFIG_JFFS2_SUMMARY is not set | |
| 1378 | +# CONFIG_JFFS2_FS_XATTR is not set | |
| 1379 | +CONFIG_JFFS2_COMPRESSION_OPTIONS=y | |
| 1380 | +CONFIG_JFFS2_ZLIB=y | |
| 1381 | +CONFIG_JFFS2_LZO=y | |
| 1382 | +CONFIG_JFFS2_RTIME=y | |
| 1383 | +# CONFIG_JFFS2_RUBIN is not set | |
| 1384 | +# CONFIG_JFFS2_CMODE_NONE is not set | |
| 1385 | +# CONFIG_JFFS2_CMODE_PRIORITY is not set | |
| 1386 | +# CONFIG_JFFS2_CMODE_SIZE is not set | |
| 1387 | +CONFIG_JFFS2_CMODE_FAVOURLZO=y | |
| 1388 | +# CONFIG_UBIFS_FS is not set | |
| 1389 | +CONFIG_CRAMFS=m | |
| 1390 | +# CONFIG_VXFS_FS is not set | |
| 1391 | +# CONFIG_MINIX_FS is not set | |
| 1392 | +# CONFIG_OMFS_FS is not set | |
| 1393 | +# CONFIG_HPFS_FS is not set | |
| 1394 | +# CONFIG_QNX4FS_FS is not set | |
| 1395 | +# CONFIG_ROMFS_FS is not set | |
| 1396 | +# CONFIG_SYSV_FS is not set | |
| 1397 | +# CONFIG_UFS_FS is not set | |
| 1398 | +CONFIG_NETWORK_FILESYSTEMS=y | |
| 1399 | +CONFIG_NFS_FS=m | |
| 1400 | +CONFIG_NFS_V3=y | |
| 1401 | +CONFIG_NFS_V3_ACL=y | |
| 1402 | +CONFIG_NFS_V4=y | |
| 1403 | +CONFIG_NFSD=m | |
| 1404 | +CONFIG_NFSD_V2_ACL=y | |
| 1405 | +CONFIG_NFSD_V3=y | |
| 1406 | +CONFIG_NFSD_V3_ACL=y | |
| 1407 | +CONFIG_NFSD_V4=y | |
| 1408 | +CONFIG_LOCKD=m | |
| 1409 | +CONFIG_LOCKD_V4=y | |
| 1410 | +CONFIG_EXPORTFS=m | |
| 1411 | +CONFIG_NFS_ACL_SUPPORT=m | |
| 1412 | +CONFIG_NFS_COMMON=y | |
| 1413 | +CONFIG_SUNRPC=m | |
| 1414 | +CONFIG_SUNRPC_GSS=m | |
| 1415 | +# CONFIG_SUNRPC_REGISTER_V4 is not set | |
| 1416 | +CONFIG_RPCSEC_GSS_KRB5=m | |
| 1417 | +# CONFIG_RPCSEC_GSS_SPKM3 is not set | |
| 1418 | +# CONFIG_SMB_FS is not set | |
| 1419 | +CONFIG_CIFS=m | |
| 1420 | +# CONFIG_CIFS_STATS is not set | |
| 1421 | +CONFIG_CIFS_WEAK_PW_HASH=y | |
| 1422 | +# CONFIG_CIFS_XATTR is not set | |
| 1423 | +# CONFIG_CIFS_DEBUG2 is not set | |
| 1424 | +# CONFIG_CIFS_EXPERIMENTAL is not set | |
| 1425 | +# CONFIG_NCP_FS is not set | |
| 1426 | +# CONFIG_CODA_FS is not set | |
| 1427 | +# CONFIG_AFS_FS is not set | |
| 1428 | + | |
| 1429 | +# | |
| 1430 | +# Partition Types | |
| 1431 | +# | |
| 1432 | +CONFIG_PARTITION_ADVANCED=y | |
| 1433 | +# CONFIG_ACORN_PARTITION is not set | |
| 1434 | +# CONFIG_OSF_PARTITION is not set | |
| 1435 | +# CONFIG_AMIGA_PARTITION is not set | |
| 1436 | +# CONFIG_ATARI_PARTITION is not set | |
| 1437 | +CONFIG_MAC_PARTITION=y | |
| 1438 | +CONFIG_MSDOS_PARTITION=y | |
| 1439 | +CONFIG_BSD_DISKLABEL=y | |
| 1440 | +CONFIG_MINIX_SUBPARTITION=y | |
| 1441 | +CONFIG_SOLARIS_X86_PARTITION=y | |
| 1442 | +CONFIG_UNIXWARE_DISKLABEL=y | |
| 1443 | +CONFIG_LDM_PARTITION=y | |
| 1444 | +CONFIG_LDM_DEBUG=y | |
| 1445 | +CONFIG_SGI_PARTITION=y | |
| 1446 | +# CONFIG_ULTRIX_PARTITION is not set | |
| 1447 | +CONFIG_SUN_PARTITION=y | |
| 1448 | +# CONFIG_KARMA_PARTITION is not set | |
| 1449 | +# CONFIG_EFI_PARTITION is not set | |
| 1450 | +# CONFIG_SYSV68_PARTITION is not set | |
| 1451 | +CONFIG_NLS=y | |
| 1452 | +CONFIG_NLS_DEFAULT="cp437" | |
| 1453 | +CONFIG_NLS_CODEPAGE_437=y | |
| 1454 | +# CONFIG_NLS_CODEPAGE_737 is not set | |
| 1455 | +# CONFIG_NLS_CODEPAGE_775 is not set | |
| 1456 | +CONFIG_NLS_CODEPAGE_850=m | |
| 1457 | +# CONFIG_NLS_CODEPAGE_852 is not set | |
| 1458 | +# CONFIG_NLS_CODEPAGE_855 is not set | |
| 1459 | +# CONFIG_NLS_CODEPAGE_857 is not set | |
| 1460 | +# CONFIG_NLS_CODEPAGE_860 is not set | |
| 1461 | +# CONFIG_NLS_CODEPAGE_861 is not set | |
| 1462 | +# CONFIG_NLS_CODEPAGE_862 is not set | |
| 1463 | +# CONFIG_NLS_CODEPAGE_863 is not set | |
| 1464 | +# CONFIG_NLS_CODEPAGE_864 is not set | |
| 1465 | +# CONFIG_NLS_CODEPAGE_865 is not set | |
| 1466 | +# CONFIG_NLS_CODEPAGE_866 is not set | |
| 1467 | +# CONFIG_NLS_CODEPAGE_869 is not set | |
| 1468 | +# CONFIG_NLS_CODEPAGE_936 is not set | |
| 1469 | +# CONFIG_NLS_CODEPAGE_950 is not set | |
| 1470 | +# CONFIG_NLS_CODEPAGE_932 is not set | |
| 1471 | +# CONFIG_NLS_CODEPAGE_949 is not set | |
| 1472 | +# CONFIG_NLS_CODEPAGE_874 is not set | |
| 1473 | +# CONFIG_NLS_ISO8859_8 is not set | |
| 1474 | +# CONFIG_NLS_CODEPAGE_1250 is not set | |
| 1475 | +# CONFIG_NLS_CODEPAGE_1251 is not set | |
| 1476 | +CONFIG_NLS_ASCII=y | |
| 1477 | +CONFIG_NLS_ISO8859_1=y | |
| 1478 | +# CONFIG_NLS_ISO8859_2 is not set | |
| 1479 | +# CONFIG_NLS_ISO8859_3 is not set | |
| 1480 | +# CONFIG_NLS_ISO8859_4 is not set | |
| 1481 | +# CONFIG_NLS_ISO8859_5 is not set | |
| 1482 | +# CONFIG_NLS_ISO8859_6 is not set | |
| 1483 | +# CONFIG_NLS_ISO8859_7 is not set | |
| 1484 | +# CONFIG_NLS_ISO8859_9 is not set | |
| 1485 | +# CONFIG_NLS_ISO8859_13 is not set | |
| 1486 | +# CONFIG_NLS_ISO8859_14 is not set | |
| 1487 | +# CONFIG_NLS_ISO8859_15 is not set | |
| 1488 | +# CONFIG_NLS_KOI8_R is not set | |
| 1489 | +# CONFIG_NLS_KOI8_U is not set | |
| 1490 | +CONFIG_NLS_UTF8=m | |
| 1491 | +CONFIG_DLM=m | |
| 1492 | +# CONFIG_DLM_DEBUG is not set | |
| 1493 | + | |
| 1494 | +# | |
| 1495 | +# Kernel hacking | |
| 1496 | +# | |
| 1497 | +CONFIG_PRINTK_TIME=y | |
| 1498 | +CONFIG_ENABLE_WARN_DEPRECATED=y | |
| 1499 | +CONFIG_ENABLE_MUST_CHECK=y | |
| 1500 | +CONFIG_FRAME_WARN=1024 | |
| 1501 | +CONFIG_MAGIC_SYSRQ=y | |
| 1502 | +CONFIG_UNUSED_SYMBOLS=y | |
| 1503 | +CONFIG_DEBUG_FS=y | |
| 1504 | +# CONFIG_HEADERS_CHECK is not set | |
| 1505 | +# CONFIG_DEBUG_KERNEL is not set | |
| 1506 | +# CONFIG_DEBUG_BUGVERBOSE is not set | |
| 1507 | +# CONFIG_DEBUG_MEMORY_INIT is not set | |
| 1508 | +CONFIG_FRAME_POINTER=y | |
| 1509 | +# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 1510 | +# CONFIG_LATENCYTOP is not set | |
| 1511 | +CONFIG_SYSCTL_SYSCALL_CHECK=y | |
| 1512 | +CONFIG_HAVE_FUNCTION_TRACER=y | |
| 1513 | + | |
| 1514 | +# | |
| 1515 | +# Tracers | |
| 1516 | +# | |
| 1517 | +# CONFIG_DYNAMIC_PRINTK_DEBUG is not set | |
| 1518 | +# CONFIG_SAMPLES is not set | |
| 1519 | +CONFIG_HAVE_ARCH_KGDB=y | |
| 1520 | +# CONFIG_DEBUG_USER is not set | |
| 1521 | + | |
| 1522 | +# | |
| 1523 | +# Security options | |
| 1524 | +# | |
| 1525 | +# CONFIG_KEYS is not set | |
| 1526 | +# CONFIG_SECURITY is not set | |
| 1527 | +CONFIG_SECURITYFS=y | |
| 1528 | +# CONFIG_SECURITY_FILE_CAPABILITIES is not set | |
| 1529 | +CONFIG_CRYPTO=y | |
| 1530 | + | |
| 1531 | +# | |
| 1532 | +# Crypto core or helper | |
| 1533 | +# | |
| 1534 | +# CONFIG_CRYPTO_FIPS is not set | |
| 1535 | +CONFIG_CRYPTO_ALGAPI=y | |
| 1536 | +CONFIG_CRYPTO_AEAD=y | |
| 1537 | +CONFIG_CRYPTO_BLKCIPHER=y | |
| 1538 | +CONFIG_CRYPTO_HASH=y | |
| 1539 | +CONFIG_CRYPTO_RNG=y | |
| 1540 | +CONFIG_CRYPTO_MANAGER=y | |
| 1541 | +CONFIG_CRYPTO_GF128MUL=m | |
| 1542 | +# CONFIG_CRYPTO_NULL is not set | |
| 1543 | +# CONFIG_CRYPTO_CRYPTD is not set | |
| 1544 | +# CONFIG_CRYPTO_AUTHENC is not set | |
| 1545 | +# CONFIG_CRYPTO_TEST is not set | |
| 1546 | + | |
| 1547 | +# | |
| 1548 | +# Authenticated Encryption with Associated Data | |
| 1549 | +# | |
| 1550 | +# CONFIG_CRYPTO_CCM is not set | |
| 1551 | +# CONFIG_CRYPTO_GCM is not set | |
| 1552 | +# CONFIG_CRYPTO_SEQIV is not set | |
| 1553 | + | |
| 1554 | +# | |
| 1555 | +# Block modes | |
| 1556 | +# | |
| 1557 | +CONFIG_CRYPTO_CBC=m | |
| 1558 | +# CONFIG_CRYPTO_CTR is not set | |
| 1559 | +# CONFIG_CRYPTO_CTS is not set | |
| 1560 | +CONFIG_CRYPTO_ECB=m | |
| 1561 | +# CONFIG_CRYPTO_LRW is not set | |
| 1562 | +# CONFIG_CRYPTO_PCBC is not set | |
| 1563 | +# CONFIG_CRYPTO_XTS is not set | |
| 1564 | + | |
| 1565 | +# | |
| 1566 | +# Hash modes | |
| 1567 | +# | |
| 1568 | +CONFIG_CRYPTO_HMAC=y | |
| 1569 | +# CONFIG_CRYPTO_XCBC is not set | |
| 1570 | + | |
| 1571 | +# | |
| 1572 | +# Digest | |
| 1573 | +# | |
| 1574 | +# CONFIG_CRYPTO_CRC32C is not set | |
| 1575 | +# CONFIG_CRYPTO_MD4 is not set | |
| 1576 | +CONFIG_CRYPTO_MD5=y | |
| 1577 | +# CONFIG_CRYPTO_MICHAEL_MIC is not set | |
| 1578 | +# CONFIG_CRYPTO_RMD128 is not set | |
| 1579 | +# CONFIG_CRYPTO_RMD160 is not set | |
| 1580 | +# CONFIG_CRYPTO_RMD256 is not set | |
| 1581 | +# CONFIG_CRYPTO_RMD320 is not set | |
| 1582 | +CONFIG_CRYPTO_SHA1=m | |
| 1583 | +# CONFIG_CRYPTO_SHA256 is not set | |
| 1584 | +# CONFIG_CRYPTO_SHA512 is not set | |
| 1585 | +# CONFIG_CRYPTO_TGR192 is not set | |
| 1586 | +# CONFIG_CRYPTO_WP512 is not set | |
| 1587 | + | |
| 1588 | +# | |
| 1589 | +# Ciphers | |
| 1590 | +# | |
| 1591 | +# CONFIG_CRYPTO_AES is not set | |
| 1592 | +# CONFIG_CRYPTO_ANUBIS is not set | |
| 1593 | +CONFIG_CRYPTO_ARC4=m | |
| 1594 | +# CONFIG_CRYPTO_BLOWFISH is not set | |
| 1595 | +# CONFIG_CRYPTO_CAMELLIA is not set | |
| 1596 | +# CONFIG_CRYPTO_CAST5 is not set | |
| 1597 | +# CONFIG_CRYPTO_CAST6 is not set | |
| 1598 | +CONFIG_CRYPTO_DES=m | |
| 1599 | +# CONFIG_CRYPTO_FCRYPT is not set | |
| 1600 | +# CONFIG_CRYPTO_KHAZAD is not set | |
| 1601 | +# CONFIG_CRYPTO_SALSA20 is not set | |
| 1602 | +# CONFIG_CRYPTO_SEED is not set | |
| 1603 | +# CONFIG_CRYPTO_SERPENT is not set | |
| 1604 | +# CONFIG_CRYPTO_TEA is not set | |
| 1605 | +# CONFIG_CRYPTO_TWOFISH is not set | |
| 1606 | + | |
| 1607 | +# | |
| 1608 | +# Compression | |
| 1609 | +# | |
| 1610 | +# CONFIG_CRYPTO_DEFLATE is not set | |
| 1611 | +# CONFIG_CRYPTO_LZO is not set | |
| 1612 | + | |
| 1613 | +# | |
| 1614 | +# Random Number Generation | |
| 1615 | +# | |
| 1616 | +# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| 1617 | +# CONFIG_CRYPTO_HW is not set | |
| 1618 | + | |
| 1619 | +# | |
| 1620 | +# Library routines | |
| 1621 | +# | |
| 1622 | +CONFIG_BITREVERSE=y | |
| 1623 | +CONFIG_CRC_CCITT=m | |
| 1624 | +CONFIG_CRC16=m | |
| 1625 | +# CONFIG_CRC_T10DIF is not set | |
| 1626 | +CONFIG_CRC_ITU_T=m | |
| 1627 | +CONFIG_CRC32=y | |
| 1628 | +CONFIG_CRC7=m | |
| 1629 | +CONFIG_LIBCRC32C=m | |
| 1630 | +CONFIG_AUDIT_GENERIC=y | |
| 1631 | +CONFIG_ZLIB_INFLATE=m | |
| 1632 | +CONFIG_ZLIB_DEFLATE=m | |
| 1633 | +CONFIG_LZO_COMPRESS=m | |
| 1634 | +CONFIG_LZO_DECOMPRESS=m | |
| 1635 | +CONFIG_REED_SOLOMON=m | |
| 1636 | +CONFIG_REED_SOLOMON_DEC16=y | |
| 1637 | +CONFIG_PLIST=y | |
| 1638 | +CONFIG_HAS_IOMEM=y | |
| 1639 | +CONFIG_HAS_IOPORT=y | |
| 1640 | +CONFIG_HAS_DMA=y | |
| @@ -0,0 +1,1889 @@ | ||
| 1 | +# | |
| 2 | +# Automatically generated make config: don't edit | |
| 3 | +# Linux kernel version: 2.6.33-rc6 | |
| 4 | +# Thu Feb 4 15:42:56 2010 | |
| 5 | +# | |
| 6 | +CONFIG_ARM=y | |
| 7 | +CONFIG_SYS_SUPPORTS_APM_EMULATION=y | |
| 8 | +CONFIG_GENERIC_GPIO=y | |
| 9 | +CONFIG_GENERIC_TIME=y | |
| 10 | +CONFIG_GENERIC_CLOCKEVENTS=y | |
| 11 | +CONFIG_GENERIC_HARDIRQS=y | |
| 12 | +CONFIG_STACKTRACE_SUPPORT=y | |
| 13 | +CONFIG_HAVE_LATENCYTOP_SUPPORT=y | |
| 14 | +CONFIG_LOCKDEP_SUPPORT=y | |
| 15 | +CONFIG_TRACE_IRQFLAGS_SUPPORT=y | |
| 16 | +CONFIG_HARDIRQS_SW_RESEND=y | |
| 17 | +CONFIG_GENERIC_IRQ_PROBE=y | |
| 18 | +CONFIG_RWSEM_GENERIC_SPINLOCK=y | |
| 19 | +CONFIG_ARCH_HAS_CPUFREQ=y | |
| 20 | +CONFIG_GENERIC_HWEIGHT=y | |
| 21 | +CONFIG_GENERIC_CALIBRATE_DELAY=y | |
| 22 | +CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | |
| 23 | +CONFIG_VECTORS_BASE=0xffff0000 | |
| 24 | +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | |
| 25 | +CONFIG_CONSTRUCTORS=y | |
| 26 | + | |
| 27 | +# | |
| 28 | +# General setup | |
| 29 | +# | |
| 30 | +CONFIG_EXPERIMENTAL=y | |
| 31 | +CONFIG_BROKEN_ON_SMP=y | |
| 32 | +CONFIG_INIT_ENV_ARG_LIMIT=32 | |
| 33 | +CONFIG_LOCALVERSION="" | |
| 34 | +CONFIG_LOCALVERSION_AUTO=y | |
| 35 | +CONFIG_HAVE_KERNEL_GZIP=y | |
| 36 | +CONFIG_HAVE_KERNEL_LZO=y | |
| 37 | +CONFIG_KERNEL_GZIP=y | |
| 38 | +# CONFIG_KERNEL_BZIP2 is not set | |
| 39 | +# CONFIG_KERNEL_LZMA is not set | |
| 40 | +# CONFIG_KERNEL_LZO is not set | |
| 41 | +CONFIG_SWAP=y | |
| 42 | +CONFIG_SYSVIPC=y | |
| 43 | +CONFIG_SYSVIPC_SYSCTL=y | |
| 44 | +# CONFIG_POSIX_MQUEUE is not set | |
| 45 | +CONFIG_BSD_PROCESS_ACCT=y | |
| 46 | +# CONFIG_BSD_PROCESS_ACCT_V3 is not set | |
| 47 | +# CONFIG_TASKSTATS is not set | |
| 48 | +# CONFIG_AUDIT is not set | |
| 49 | + | |
| 50 | +# | |
| 51 | +# RCU Subsystem | |
| 52 | +# | |
| 53 | +CONFIG_TREE_RCU=y | |
| 54 | +# CONFIG_TREE_PREEMPT_RCU is not set | |
| 55 | +# CONFIG_TINY_RCU is not set | |
| 56 | +# CONFIG_RCU_TRACE is not set | |
| 57 | +CONFIG_RCU_FANOUT=32 | |
| 58 | +# CONFIG_RCU_FANOUT_EXACT is not set | |
| 59 | +# CONFIG_TREE_RCU_TRACE is not set | |
| 60 | +CONFIG_IKCONFIG=y | |
| 61 | +CONFIG_IKCONFIG_PROC=y | |
| 62 | +CONFIG_LOG_BUF_SHIFT=14 | |
| 63 | +CONFIG_GROUP_SCHED=y | |
| 64 | +CONFIG_FAIR_GROUP_SCHED=y | |
| 65 | +# CONFIG_RT_GROUP_SCHED is not set | |
| 66 | +CONFIG_USER_SCHED=y | |
| 67 | +# CONFIG_CGROUP_SCHED is not set | |
| 68 | +# CONFIG_CGROUPS is not set | |
| 69 | +# CONFIG_SYSFS_DEPRECATED_V2 is not set | |
| 70 | +# CONFIG_RELAY is not set | |
| 71 | +# CONFIG_NAMESPACES is not set | |
| 72 | +CONFIG_BLK_DEV_INITRD=y | |
| 73 | +CONFIG_INITRAMFS_SOURCE="" | |
| 74 | +CONFIG_RD_GZIP=y | |
| 75 | +CONFIG_RD_BZIP2=y | |
| 76 | +CONFIG_RD_LZMA=y | |
| 77 | +# CONFIG_RD_LZO is not set | |
| 78 | +CONFIG_CC_OPTIMIZE_FOR_SIZE=y | |
| 79 | +CONFIG_SYSCTL=y | |
| 80 | +CONFIG_ANON_INODES=y | |
| 81 | +CONFIG_EMBEDDED=y | |
| 82 | +CONFIG_UID16=y | |
| 83 | +# CONFIG_SYSCTL_SYSCALL is not set | |
| 84 | +CONFIG_KALLSYMS=y | |
| 85 | +# CONFIG_KALLSYMS_ALL is not set | |
| 86 | +CONFIG_KALLSYMS_EXTRA_PASS=y | |
| 87 | +CONFIG_HOTPLUG=y | |
| 88 | +CONFIG_PRINTK=y | |
| 89 | +CONFIG_BUG=y | |
| 90 | +CONFIG_ELF_CORE=y | |
| 91 | +CONFIG_BASE_FULL=y | |
| 92 | +CONFIG_FUTEX=y | |
| 93 | +CONFIG_EPOLL=y | |
| 94 | +CONFIG_SIGNALFD=y | |
| 95 | +CONFIG_TIMERFD=y | |
| 96 | +CONFIG_EVENTFD=y | |
| 97 | +CONFIG_SHMEM=y | |
| 98 | +CONFIG_AIO=y | |
| 99 | + | |
| 100 | +# | |
| 101 | +# Kernel Performance Events And Counters | |
| 102 | +# | |
| 103 | +CONFIG_VM_EVENT_COUNTERS=y | |
| 104 | +CONFIG_COMPAT_BRK=y | |
| 105 | +CONFIG_SLAB=y | |
| 106 | +# CONFIG_SLUB is not set | |
| 107 | +# CONFIG_SLOB is not set | |
| 108 | +# CONFIG_PROFILING is not set | |
| 109 | +CONFIG_HAVE_OPROFILE=y | |
| 110 | +# CONFIG_KPROBES is not set | |
| 111 | +CONFIG_HAVE_KPROBES=y | |
| 112 | +CONFIG_HAVE_KRETPROBES=y | |
| 113 | +CONFIG_HAVE_CLK=y | |
| 114 | + | |
| 115 | +# | |
| 116 | +# GCOV-based kernel profiling | |
| 117 | +# | |
| 118 | +# CONFIG_SLOW_WORK is not set | |
| 119 | +CONFIG_HAVE_GENERIC_DMA_COHERENT=y | |
| 120 | +CONFIG_SLABINFO=y | |
| 121 | +CONFIG_RT_MUTEXES=y | |
| 122 | +CONFIG_BASE_SMALL=0 | |
| 123 | +CONFIG_MODULES=y | |
| 124 | +CONFIG_MODULE_FORCE_LOAD=y | |
| 125 | +CONFIG_MODULE_UNLOAD=y | |
| 126 | +# CONFIG_MODULE_FORCE_UNLOAD is not set | |
| 127 | +CONFIG_MODVERSIONS=y | |
| 128 | +# CONFIG_MODULE_SRCVERSION_ALL is not set | |
| 129 | +CONFIG_BLOCK=y | |
| 130 | +CONFIG_LBDAF=y | |
| 131 | +# CONFIG_BLK_DEV_BSG is not set | |
| 132 | +# CONFIG_BLK_DEV_INTEGRITY is not set | |
| 133 | + | |
| 134 | +# | |
| 135 | +# IO Schedulers | |
| 136 | +# | |
| 137 | +CONFIG_IOSCHED_NOOP=y | |
| 138 | +CONFIG_IOSCHED_DEADLINE=y | |
| 139 | +CONFIG_IOSCHED_CFQ=y | |
| 140 | +# CONFIG_DEFAULT_DEADLINE is not set | |
| 141 | +CONFIG_DEFAULT_CFQ=y | |
| 142 | +# CONFIG_DEFAULT_NOOP is not set | |
| 143 | +CONFIG_DEFAULT_IOSCHED="cfq" | |
| 144 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | |
| 145 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | |
| 146 | +# CONFIG_INLINE_SPIN_LOCK is not set | |
| 147 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | |
| 148 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | |
| 149 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | |
| 150 | +CONFIG_INLINE_SPIN_UNLOCK=y | |
| 151 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | |
| 152 | +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | |
| 153 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | |
| 154 | +# CONFIG_INLINE_READ_TRYLOCK is not set | |
| 155 | +# CONFIG_INLINE_READ_LOCK is not set | |
| 156 | +# CONFIG_INLINE_READ_LOCK_BH is not set | |
| 157 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | |
| 158 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | |
| 159 | +CONFIG_INLINE_READ_UNLOCK=y | |
| 160 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | |
| 161 | +CONFIG_INLINE_READ_UNLOCK_IRQ=y | |
| 162 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | |
| 163 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | |
| 164 | +# CONFIG_INLINE_WRITE_LOCK is not set | |
| 165 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | |
| 166 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | |
| 167 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | |
| 168 | +CONFIG_INLINE_WRITE_UNLOCK=y | |
| 169 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | |
| 170 | +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | |
| 171 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | |
| 172 | +# CONFIG_MUTEX_SPIN_ON_OWNER is not set | |
| 173 | +# CONFIG_FREEZER is not set | |
| 174 | + | |
| 175 | +# | |
| 176 | +# System Type | |
| 177 | +# | |
| 178 | +CONFIG_MMU=y | |
| 179 | +# CONFIG_ARCH_AAEC2000 is not set | |
| 180 | +# CONFIG_ARCH_INTEGRATOR is not set | |
| 181 | +# CONFIG_ARCH_REALVIEW is not set | |
| 182 | +# CONFIG_ARCH_VERSATILE is not set | |
| 183 | +# CONFIG_ARCH_AT91 is not set | |
| 184 | +# CONFIG_ARCH_CLPS711X is not set | |
| 185 | +# CONFIG_ARCH_GEMINI is not set | |
| 186 | +# CONFIG_ARCH_EBSA110 is not set | |
| 187 | +# CONFIG_ARCH_EP93XX is not set | |
| 188 | +# CONFIG_ARCH_FOOTBRIDGE is not set | |
| 189 | +# CONFIG_ARCH_MXC is not set | |
| 190 | +# CONFIG_ARCH_STMP3XXX is not set | |
| 191 | +# CONFIG_ARCH_NETX is not set | |
| 192 | +# CONFIG_ARCH_H720X is not set | |
| 193 | +# CONFIG_ARCH_NOMADIK is not set | |
| 194 | +# CONFIG_ARCH_IOP13XX is not set | |
| 195 | +# CONFIG_ARCH_IOP32X is not set | |
| 196 | +# CONFIG_ARCH_IOP33X is not set | |
| 197 | +# CONFIG_ARCH_IXP23XX is not set | |
| 198 | +# CONFIG_ARCH_IXP2000 is not set | |
| 199 | +# CONFIG_ARCH_IXP4XX is not set | |
| 200 | +# CONFIG_ARCH_L7200 is not set | |
| 201 | +# CONFIG_ARCH_DOVE is not set | |
| 202 | +# CONFIG_ARCH_KIRKWOOD is not set | |
| 203 | +# CONFIG_ARCH_LOKI is not set | |
| 204 | +# CONFIG_ARCH_MV78XX0 is not set | |
| 205 | +# CONFIG_ARCH_ORION5X is not set | |
| 206 | +# CONFIG_ARCH_MMP is not set | |
| 207 | +# CONFIG_ARCH_KS8695 is not set | |
| 208 | +# CONFIG_ARCH_NS9XXX is not set | |
| 209 | +# CONFIG_ARCH_W90X900 is not set | |
| 210 | +# CONFIG_ARCH_PNX4008 is not set | |
| 211 | +# CONFIG_ARCH_PXA is not set | |
| 212 | +# CONFIG_ARCH_MSM is not set | |
| 213 | +# CONFIG_ARCH_RPC is not set | |
| 214 | +# CONFIG_ARCH_SA1100 is not set | |
| 215 | +# CONFIG_ARCH_S3C2410 is not set | |
| 216 | +# CONFIG_ARCH_S3C64XX is not set | |
| 217 | +# CONFIG_ARCH_S5PC1XX is not set | |
| 218 | +# CONFIG_ARCH_SHARK is not set | |
| 219 | +# CONFIG_ARCH_LH7A40X is not set | |
| 220 | +# CONFIG_ARCH_U300 is not set | |
| 221 | +# CONFIG_ARCH_DAVINCI is not set | |
| 222 | +CONFIG_ARCH_OMAP=y | |
| 223 | +# CONFIG_ARCH_BCMRING is not set | |
| 224 | +# CONFIG_ARCH_U8500 is not set | |
| 225 | + | |
| 226 | +# | |
| 227 | +# TI OMAP Implementations | |
| 228 | +# | |
| 229 | +CONFIG_ARCH_OMAP_OTG=y | |
| 230 | +# CONFIG_ARCH_OMAP1 is not set | |
| 231 | +CONFIG_ARCH_OMAP2PLUS=y | |
| 232 | +# CONFIG_ARCH_OMAP2 is not set | |
| 233 | +CONFIG_ARCH_OMAP3=y | |
| 234 | +# CONFIG_ARCH_OMAP4 is not set | |
| 235 | + | |
| 236 | +# | |
| 237 | +# OMAP Feature Selections | |
| 238 | +# | |
| 239 | +# CONFIG_OMAP_RESET_CLOCKS is not set | |
| 240 | +# CONFIG_OMAP_MUX is not set | |
| 241 | +CONFIG_OMAP_MCBSP=y | |
| 242 | +# CONFIG_OMAP_MBOX_FWK is not set | |
| 243 | +# CONFIG_OMAP_MPU_TIMER is not set | |
| 244 | +CONFIG_OMAP_32K_TIMER=y | |
| 245 | +CONFIG_OMAP_32K_TIMER_HZ=128 | |
| 246 | +CONFIG_OMAP_DM_TIMER=y | |
| 247 | +# CONFIG_OMAP_PM_NONE is not set | |
| 248 | +CONFIG_OMAP_PM_NOOP=y | |
| 249 | +CONFIG_ARCH_OMAP3430=y | |
| 250 | + | |
| 251 | +# | |
| 252 | +# OMAP Board Type | |
| 253 | +# | |
| 254 | +# CONFIG_MACH_OMAP3_BEAGLE is not set | |
| 255 | +CONFIG_MACH_DEVKIT8000=y | |
| 256 | +# CONFIG_MACH_OMAP_LDP is not set | |
| 257 | +# CONFIG_MACH_OVERO is not set | |
| 258 | +# CONFIG_MACH_OMAP3EVM is not set | |
| 259 | +# CONFIG_MACH_OMAP3517EVM is not set | |
| 260 | +# CONFIG_MACH_OMAP3_PANDORA is not set | |
| 261 | +# CONFIG_MACH_OMAP3_TOUCHBOOK is not set | |
| 262 | +# CONFIG_MACH_OMAP_3430SDP is not set | |
| 263 | +# CONFIG_MACH_NOKIA_RX51 is not set | |
| 264 | +# CONFIG_MACH_OMAP_ZOOM2 is not set | |
| 265 | +# CONFIG_MACH_OMAP_ZOOM3 is not set | |
| 266 | +# CONFIG_MACH_CM_T35 is not set | |
| 267 | +# CONFIG_MACH_IGEP0020 is not set | |
| 268 | +# CONFIG_MACH_OMAP_3630SDP is not set | |
| 269 | +# CONFIG_OMAP3_EMU is not set | |
| 270 | +# CONFIG_OMAP3_SDRC_AC_TIMING is not set | |
| 271 | + | |
| 272 | +# | |
| 273 | +# Processor Type | |
| 274 | +# | |
| 275 | +CONFIG_CPU_32v6K=y | |
| 276 | +CONFIG_CPU_V7=y | |
| 277 | +CONFIG_CPU_32v7=y | |
| 278 | +CONFIG_CPU_ABRT_EV7=y | |
| 279 | +CONFIG_CPU_PABRT_V7=y | |
| 280 | +CONFIG_CPU_CACHE_V7=y | |
| 281 | +CONFIG_CPU_CACHE_VIPT=y | |
| 282 | +CONFIG_CPU_COPY_V6=y | |
| 283 | +CONFIG_CPU_TLB_V7=y | |
| 284 | +CONFIG_CPU_HAS_ASID=y | |
| 285 | +CONFIG_CPU_CP15=y | |
| 286 | +CONFIG_CPU_CP15_MMU=y | |
| 287 | + | |
| 288 | +# | |
| 289 | +# Processor Features | |
| 290 | +# | |
| 291 | +CONFIG_ARM_THUMB=y | |
| 292 | +# CONFIG_ARM_THUMBEE is not set | |
| 293 | +# CONFIG_CPU_ICACHE_DISABLE is not set | |
| 294 | +# CONFIG_CPU_DCACHE_DISABLE is not set | |
| 295 | +# CONFIG_CPU_BPREDICT_DISABLE is not set | |
| 296 | +CONFIG_HAS_TLS_REG=y | |
| 297 | +CONFIG_ARM_L1_CACHE_SHIFT=6 | |
| 298 | +# CONFIG_ARM_ERRATA_430973 is not set | |
| 299 | +# CONFIG_ARM_ERRATA_458693 is not set | |
| 300 | +# CONFIG_ARM_ERRATA_460075 is not set | |
| 301 | +CONFIG_COMMON_CLKDEV=y | |
| 302 | + | |
| 303 | +# | |
| 304 | +# Bus support | |
| 305 | +# | |
| 306 | +# CONFIG_PCI_SYSCALL is not set | |
| 307 | +# CONFIG_ARCH_SUPPORTS_MSI is not set | |
| 308 | +# CONFIG_PCCARD is not set | |
| 309 | + | |
| 310 | +# | |
| 311 | +# Kernel Features | |
| 312 | +# | |
| 313 | +CONFIG_TICK_ONESHOT=y | |
| 314 | +CONFIG_NO_HZ=y | |
| 315 | +CONFIG_HIGH_RES_TIMERS=y | |
| 316 | +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | |
| 317 | +CONFIG_VMSPLIT_3G=y | |
| 318 | +# CONFIG_VMSPLIT_2G is not set | |
| 319 | +# CONFIG_VMSPLIT_1G is not set | |
| 320 | +CONFIG_PAGE_OFFSET=0xC0000000 | |
| 321 | +CONFIG_PREEMPT_NONE=y | |
| 322 | +# CONFIG_PREEMPT_VOLUNTARY is not set | |
| 323 | +# CONFIG_PREEMPT is not set | |
| 324 | +CONFIG_HZ=128 | |
| 325 | +# CONFIG_THUMB2_KERNEL is not set | |
| 326 | +CONFIG_AEABI=y | |
| 327 | +CONFIG_OABI_COMPAT=y | |
| 328 | +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y | |
| 329 | +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | |
| 330 | +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | |
| 331 | +# CONFIG_HIGHMEM is not set | |
| 332 | +CONFIG_SELECT_MEMORY_MODEL=y | |
| 333 | +CONFIG_FLATMEM_MANUAL=y | |
| 334 | +# CONFIG_DISCONTIGMEM_MANUAL is not set | |
| 335 | +# CONFIG_SPARSEMEM_MANUAL is not set | |
| 336 | +CONFIG_FLATMEM=y | |
| 337 | +CONFIG_FLAT_NODE_MEM_MAP=y | |
| 338 | +CONFIG_PAGEFLAGS_EXTENDED=y | |
| 339 | +CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| 340 | +# CONFIG_PHYS_ADDR_T_64BIT is not set | |
| 341 | +CONFIG_ZONE_DMA_FLAG=0 | |
| 342 | +CONFIG_VIRT_TO_BUS=y | |
| 343 | +# CONFIG_KSM is not set | |
| 344 | +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| 345 | +# CONFIG_LEDS is not set | |
| 346 | +CONFIG_ALIGNMENT_TRAP=y | |
| 347 | +# CONFIG_UACCESS_WITH_MEMCPY is not set | |
| 348 | + | |
| 349 | +# | |
| 350 | +# Boot options | |
| 351 | +# | |
| 352 | +CONFIG_ZBOOT_ROM_TEXT=0x0 | |
| 353 | +CONFIG_ZBOOT_ROM_BSS=0x0 | |
| 354 | +CONFIG_CMDLINE="console=ttyS2,115200n8 root=/dev/nfs nfsroot=192.168.1.1:home/nfsroot/current,home/nfsroot/current ip=dhcp rw noinitrd root delay=3" | |
| 355 | +# CONFIG_XIP_KERNEL is not set | |
| 356 | +# CONFIG_KEXEC is not set | |
| 357 | + | |
| 358 | +# | |
| 359 | +# CPU Power Management | |
| 360 | +# | |
| 361 | +# CONFIG_CPU_FREQ is not set | |
| 362 | +# CONFIG_CPU_IDLE is not set | |
| 363 | + | |
| 364 | +# | |
| 365 | +# Floating point emulation | |
| 366 | +# | |
| 367 | + | |
| 368 | +# | |
| 369 | +# At least one emulation must be selected | |
| 370 | +# | |
| 371 | +CONFIG_FPE_NWFPE=y | |
| 372 | +# CONFIG_FPE_NWFPE_XP is not set | |
| 373 | +# CONFIG_FPE_FASTFPE is not set | |
| 374 | +CONFIG_VFP=y | |
| 375 | +CONFIG_VFPv3=y | |
| 376 | +CONFIG_NEON=y | |
| 377 | + | |
| 378 | +# | |
| 379 | +# Userspace binary formats | |
| 380 | +# | |
| 381 | +CONFIG_BINFMT_ELF=y | |
| 382 | +# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | |
| 383 | +CONFIG_HAVE_AOUT=y | |
| 384 | +# CONFIG_BINFMT_AOUT is not set | |
| 385 | +# CONFIG_BINFMT_MISC is not set | |
| 386 | + | |
| 387 | +# | |
| 388 | +# Power management options | |
| 389 | +# | |
| 390 | +# CONFIG_PM is not set | |
| 391 | +CONFIG_ARCH_SUSPEND_POSSIBLE=y | |
| 392 | +CONFIG_NET=y | |
| 393 | + | |
| 394 | +# | |
| 395 | +# Networking options | |
| 396 | +# | |
| 397 | +CONFIG_PACKET=y | |
| 398 | +# CONFIG_PACKET_MMAP is not set | |
| 399 | +CONFIG_UNIX=y | |
| 400 | +CONFIG_XFRM=y | |
| 401 | +# CONFIG_XFRM_USER is not set | |
| 402 | +# CONFIG_XFRM_SUB_POLICY is not set | |
| 403 | +# CONFIG_XFRM_MIGRATE is not set | |
| 404 | +# CONFIG_XFRM_STATISTICS is not set | |
| 405 | +CONFIG_NET_KEY=y | |
| 406 | +# CONFIG_NET_KEY_MIGRATE is not set | |
| 407 | +CONFIG_INET=y | |
| 408 | +CONFIG_IP_MULTICAST=y | |
| 409 | +# CONFIG_IP_ADVANCED_ROUTER is not set | |
| 410 | +CONFIG_IP_FIB_HASH=y | |
| 411 | +CONFIG_IP_PNP=y | |
| 412 | +CONFIG_IP_PNP_DHCP=y | |
| 413 | +CONFIG_IP_PNP_BOOTP=y | |
| 414 | +CONFIG_IP_PNP_RARP=y | |
| 415 | +# CONFIG_NET_IPIP is not set | |
| 416 | +# CONFIG_NET_IPGRE is not set | |
| 417 | +# CONFIG_IP_MROUTE is not set | |
| 418 | +# CONFIG_ARPD is not set | |
| 419 | +# CONFIG_SYN_COOKIES is not set | |
| 420 | +# CONFIG_INET_AH is not set | |
| 421 | +# CONFIG_INET_ESP is not set | |
| 422 | +# CONFIG_INET_IPCOMP is not set | |
| 423 | +# CONFIG_INET_XFRM_TUNNEL is not set | |
| 424 | +# CONFIG_INET_TUNNEL is not set | |
| 425 | +CONFIG_INET_XFRM_MODE_TRANSPORT=y | |
| 426 | +CONFIG_INET_XFRM_MODE_TUNNEL=y | |
| 427 | +CONFIG_INET_XFRM_MODE_BEET=y | |
| 428 | +# CONFIG_INET_LRO is not set | |
| 429 | +CONFIG_INET_DIAG=y | |
| 430 | +CONFIG_INET_TCP_DIAG=y | |
| 431 | +# CONFIG_TCP_CONG_ADVANCED is not set | |
| 432 | +CONFIG_TCP_CONG_CUBIC=y | |
| 433 | +CONFIG_DEFAULT_TCP_CONG="cubic" | |
| 434 | +# CONFIG_TCP_MD5SIG is not set | |
| 435 | +# CONFIG_IPV6 is not set | |
| 436 | +# CONFIG_NETWORK_SECMARK is not set | |
| 437 | +# CONFIG_NETFILTER is not set | |
| 438 | +# CONFIG_IP_DCCP is not set | |
| 439 | +# CONFIG_IP_SCTP is not set | |
| 440 | +# CONFIG_RDS is not set | |
| 441 | +# CONFIG_TIPC is not set | |
| 442 | +# CONFIG_ATM is not set | |
| 443 | +# CONFIG_BRIDGE is not set | |
| 444 | +# CONFIG_NET_DSA is not set | |
| 445 | +# CONFIG_VLAN_8021Q is not set | |
| 446 | +# CONFIG_DECNET is not set | |
| 447 | +# CONFIG_LLC2 is not set | |
| 448 | +# CONFIG_IPX is not set | |
| 449 | +# CONFIG_ATALK is not set | |
| 450 | +# CONFIG_X25 is not set | |
| 451 | +# CONFIG_LAPB is not set | |
| 452 | +# CONFIG_ECONET is not set | |
| 453 | +# CONFIG_WAN_ROUTER is not set | |
| 454 | +# CONFIG_PHONET is not set | |
| 455 | +# CONFIG_IEEE802154 is not set | |
| 456 | +# CONFIG_NET_SCHED is not set | |
| 457 | +# CONFIG_DCB is not set | |
| 458 | + | |
| 459 | +# | |
| 460 | +# Network testing | |
| 461 | +# | |
| 462 | +# CONFIG_NET_PKTGEN is not set | |
| 463 | +# CONFIG_HAMRADIO is not set | |
| 464 | +# CONFIG_CAN is not set | |
| 465 | +CONFIG_IRDA=y | |
| 466 | + | |
| 467 | +# | |
| 468 | +# IrDA protocols | |
| 469 | +# | |
| 470 | +# CONFIG_IRLAN is not set | |
| 471 | +# CONFIG_IRCOMM is not set | |
| 472 | +# CONFIG_IRDA_ULTRA is not set | |
| 473 | + | |
| 474 | +# | |
| 475 | +# IrDA options | |
| 476 | +# | |
| 477 | +# CONFIG_IRDA_CACHE_LAST_LSAP is not set | |
| 478 | +# CONFIG_IRDA_FAST_RR is not set | |
| 479 | +# CONFIG_IRDA_DEBUG is not set | |
| 480 | + | |
| 481 | +# | |
| 482 | +# Infrared-port device drivers | |
| 483 | +# | |
| 484 | + | |
| 485 | +# | |
| 486 | +# SIR device drivers | |
| 487 | +# | |
| 488 | +# CONFIG_IRTTY_SIR is not set | |
| 489 | + | |
| 490 | +# | |
| 491 | +# Dongle support | |
| 492 | +# | |
| 493 | +# CONFIG_KINGSUN_DONGLE is not set | |
| 494 | +# CONFIG_KSDAZZLE_DONGLE is not set | |
| 495 | +# CONFIG_KS959_DONGLE is not set | |
| 496 | + | |
| 497 | +# | |
| 498 | +# FIR device drivers | |
| 499 | +# | |
| 500 | +# CONFIG_USB_IRDA is not set | |
| 501 | +# CONFIG_SIGMATEL_FIR is not set | |
| 502 | +# CONFIG_MCS_FIR is not set | |
| 503 | +CONFIG_BT=y | |
| 504 | +# CONFIG_BT_L2CAP is not set | |
| 505 | +# CONFIG_BT_SCO is not set | |
| 506 | + | |
| 507 | +# | |
| 508 | +# Bluetooth device drivers | |
| 509 | +# | |
| 510 | +# CONFIG_BT_HCIBTUSB is not set | |
| 511 | +# CONFIG_BT_HCIBTSDIO is not set | |
| 512 | +# CONFIG_BT_HCIUART is not set | |
| 513 | +# CONFIG_BT_HCIBCM203X is not set | |
| 514 | +# CONFIG_BT_HCIBPA10X is not set | |
| 515 | +# CONFIG_BT_HCIBFUSB is not set | |
| 516 | +# CONFIG_BT_HCIVHCI is not set | |
| 517 | +# CONFIG_BT_MRVL is not set | |
| 518 | +# CONFIG_AF_RXRPC is not set | |
| 519 | +CONFIG_WIRELESS=y | |
| 520 | +# CONFIG_CFG80211 is not set | |
| 521 | +# CONFIG_LIB80211 is not set | |
| 522 | + | |
| 523 | +# | |
| 524 | +# CFG80211 needs to be enabled for MAC80211 | |
| 525 | +# | |
| 526 | +# CONFIG_WIMAX is not set | |
| 527 | +# CONFIG_RFKILL is not set | |
| 528 | +# CONFIG_NET_9P is not set | |
| 529 | + | |
| 530 | +# | |
| 531 | +# Device Drivers | |
| 532 | +# | |
| 533 | + | |
| 534 | +# | |
| 535 | +# Generic Driver Options | |
| 536 | +# | |
| 537 | +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | |
| 538 | +# CONFIG_DEVTMPFS is not set | |
| 539 | +CONFIG_STANDALONE=y | |
| 540 | +# CONFIG_PREVENT_FIRMWARE_BUILD is not set | |
| 541 | +# CONFIG_FW_LOADER is not set | |
| 542 | +# CONFIG_DEBUG_DRIVER is not set | |
| 543 | +# CONFIG_DEBUG_DEVRES is not set | |
| 544 | +# CONFIG_SYS_HYPERVISOR is not set | |
| 545 | +# CONFIG_CONNECTOR is not set | |
| 546 | +CONFIG_MTD=y | |
| 547 | +# CONFIG_MTD_DEBUG is not set | |
| 548 | +# CONFIG_MTD_TESTS is not set | |
| 549 | +# CONFIG_MTD_CONCAT is not set | |
| 550 | +CONFIG_MTD_PARTITIONS=y | |
| 551 | +# CONFIG_MTD_REDBOOT_PARTS is not set | |
| 552 | +# CONFIG_MTD_CMDLINE_PARTS is not set | |
| 553 | +# CONFIG_MTD_AFS_PARTS is not set | |
| 554 | +# CONFIG_MTD_AR7_PARTS is not set | |
| 555 | + | |
| 556 | +# | |
| 557 | +# User Modules And Translation Layers | |
| 558 | +# | |
| 559 | +CONFIG_MTD_CHAR=y | |
| 560 | +CONFIG_MTD_BLKDEVS=y | |
| 561 | +CONFIG_MTD_BLOCK=y | |
| 562 | +# CONFIG_FTL is not set | |
| 563 | +# CONFIG_NFTL is not set | |
| 564 | +# CONFIG_INFTL is not set | |
| 565 | +# CONFIG_RFD_FTL is not set | |
| 566 | +# CONFIG_SSFDC is not set | |
| 567 | +# CONFIG_MTD_OOPS is not set | |
| 568 | + | |
| 569 | +# | |
| 570 | +# RAM/ROM/Flash chip drivers | |
| 571 | +# | |
| 572 | +# CONFIG_MTD_CFI is not set | |
| 573 | +# CONFIG_MTD_JEDECPROBE is not set | |
| 574 | +CONFIG_MTD_MAP_BANK_WIDTH_1=y | |
| 575 | +CONFIG_MTD_MAP_BANK_WIDTH_2=y | |
| 576 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | |
| 577 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | |
| 578 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | |
| 579 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | |
| 580 | +CONFIG_MTD_CFI_I1=y | |
| 581 | +CONFIG_MTD_CFI_I2=y | |
| 582 | +# CONFIG_MTD_CFI_I4 is not set | |
| 583 | +# CONFIG_MTD_CFI_I8 is not set | |
| 584 | +CONFIG_MTD_RAM=y | |
| 585 | +CONFIG_MTD_ROM=y | |
| 586 | +# CONFIG_MTD_ABSENT is not set | |
| 587 | + | |
| 588 | +# | |
| 589 | +# Mapping drivers for chip access | |
| 590 | +# | |
| 591 | +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | |
| 592 | +# CONFIG_MTD_PHYSMAP is not set | |
| 593 | +# CONFIG_MTD_PLATRAM is not set | |
| 594 | + | |
| 595 | +# | |
| 596 | +# Self-contained MTD device drivers | |
| 597 | +# | |
| 598 | +# CONFIG_MTD_DATAFLASH is not set | |
| 599 | +# CONFIG_MTD_M25P80 is not set | |
| 600 | +# CONFIG_MTD_SST25L is not set | |
| 601 | +# CONFIG_MTD_SLRAM is not set | |
| 602 | +# CONFIG_MTD_PHRAM is not set | |
| 603 | +# CONFIG_MTD_MTDRAM is not set | |
| 604 | +# CONFIG_MTD_BLOCK2MTD is not set | |
| 605 | + | |
| 606 | +# | |
| 607 | +# Disk-On-Chip Device Drivers | |
| 608 | +# | |
| 609 | +# CONFIG_MTD_DOC2000 is not set | |
| 610 | +# CONFIG_MTD_DOC2001 is not set | |
| 611 | +# CONFIG_MTD_DOC2001PLUS is not set | |
| 612 | +CONFIG_MTD_NAND=y | |
| 613 | +# CONFIG_MTD_NAND_VERIFY_WRITE is not set | |
| 614 | +# CONFIG_MTD_NAND_ECC_SMC is not set | |
| 615 | +# CONFIG_MTD_NAND_MUSEUM_IDS is not set | |
| 616 | +# CONFIG_MTD_NAND_GPIO is not set | |
| 617 | +CONFIG_MTD_NAND_OMAP2=y | |
| 618 | +CONFIG_MTD_NAND_OMAP_PREFETCH=y | |
| 619 | +# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set | |
| 620 | +CONFIG_MTD_NAND_IDS=y | |
| 621 | +# CONFIG_MTD_NAND_DISKONCHIP is not set | |
| 622 | +# CONFIG_MTD_NAND_NANDSIM is not set | |
| 623 | +# CONFIG_MTD_NAND_PLATFORM is not set | |
| 624 | +# CONFIG_MTD_ALAUDA is not set | |
| 625 | +# CONFIG_MTD_ONENAND is not set | |
| 626 | + | |
| 627 | +# | |
| 628 | +# LPDDR flash memory drivers | |
| 629 | +# | |
| 630 | +# CONFIG_MTD_LPDDR is not set | |
| 631 | + | |
| 632 | +# | |
| 633 | +# UBI - Unsorted block images | |
| 634 | +# | |
| 635 | +CONFIG_MTD_UBI=y | |
| 636 | +CONFIG_MTD_UBI_WL_THRESHOLD=4096 | |
| 637 | +CONFIG_MTD_UBI_BEB_RESERVE=1 | |
| 638 | +# CONFIG_MTD_UBI_GLUEBI is not set | |
| 639 | + | |
| 640 | +# | |
| 641 | +# UBI debugging options | |
| 642 | +# | |
| 643 | +# CONFIG_MTD_UBI_DEBUG is not set | |
| 644 | +# CONFIG_PARPORT is not set | |
| 645 | +CONFIG_BLK_DEV=y | |
| 646 | +# CONFIG_BLK_DEV_COW_COMMON is not set | |
| 647 | +CONFIG_BLK_DEV_LOOP=y | |
| 648 | +# CONFIG_BLK_DEV_CRYPTOLOOP is not set | |
| 649 | + | |
| 650 | +# | |
| 651 | +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected | |
| 652 | +# | |
| 653 | +# CONFIG_BLK_DEV_NBD is not set | |
| 654 | +# CONFIG_BLK_DEV_UB is not set | |
| 655 | +CONFIG_BLK_DEV_RAM=y | |
| 656 | +CONFIG_BLK_DEV_RAM_COUNT=16 | |
| 657 | +CONFIG_BLK_DEV_RAM_SIZE=40960 | |
| 658 | +# CONFIG_BLK_DEV_XIP is not set | |
| 659 | +# CONFIG_CDROM_PKTCDVD is not set | |
| 660 | +# CONFIG_ATA_OVER_ETH is not set | |
| 661 | +# CONFIG_MG_DISK is not set | |
| 662 | +# CONFIG_MISC_DEVICES is not set | |
| 663 | +CONFIG_HAVE_IDE=y | |
| 664 | +# CONFIG_IDE is not set | |
| 665 | + | |
| 666 | +# | |
| 667 | +# SCSI device support | |
| 668 | +# | |
| 669 | +# CONFIG_RAID_ATTRS is not set | |
| 670 | +CONFIG_SCSI=y | |
| 671 | +CONFIG_SCSI_DMA=y | |
| 672 | +# CONFIG_SCSI_TGT is not set | |
| 673 | +# CONFIG_SCSI_NETLINK is not set | |
| 674 | +CONFIG_SCSI_PROC_FS=y | |
| 675 | + | |
| 676 | +# | |
| 677 | +# SCSI support type (disk, tape, CD-ROM) | |
| 678 | +# | |
| 679 | +CONFIG_BLK_DEV_SD=y | |
| 680 | +# CONFIG_CHR_DEV_ST is not set | |
| 681 | +# CONFIG_CHR_DEV_OSST is not set | |
| 682 | +# CONFIG_BLK_DEV_SR is not set | |
| 683 | +# CONFIG_CHR_DEV_SG is not set | |
| 684 | +# CONFIG_CHR_DEV_SCH is not set | |
| 685 | +# CONFIG_SCSI_MULTI_LUN is not set | |
| 686 | +# CONFIG_SCSI_CONSTANTS is not set | |
| 687 | +# CONFIG_SCSI_LOGGING is not set | |
| 688 | +# CONFIG_SCSI_SCAN_ASYNC is not set | |
| 689 | +CONFIG_SCSI_WAIT_SCAN=m | |
| 690 | + | |
| 691 | +# | |
| 692 | +# SCSI Transports | |
| 693 | +# | |
| 694 | +# CONFIG_SCSI_SPI_ATTRS is not set | |
| 695 | +# CONFIG_SCSI_FC_ATTRS is not set | |
| 696 | +# CONFIG_SCSI_ISCSI_ATTRS is not set | |
| 697 | +# CONFIG_SCSI_SAS_LIBSAS is not set | |
| 698 | +# CONFIG_SCSI_SRP_ATTRS is not set | |
| 699 | +CONFIG_SCSI_LOWLEVEL=y | |
| 700 | +# CONFIG_ISCSI_TCP is not set | |
| 701 | +# CONFIG_LIBFC is not set | |
| 702 | +# CONFIG_LIBFCOE is not set | |
| 703 | +# CONFIG_SCSI_DEBUG is not set | |
| 704 | +# CONFIG_SCSI_DH is not set | |
| 705 | +# CONFIG_SCSI_OSD_INITIATOR is not set | |
| 706 | +# CONFIG_ATA is not set | |
| 707 | +# CONFIG_MD is not set | |
| 708 | +CONFIG_NETDEVICES=y | |
| 709 | +# CONFIG_DUMMY is not set | |
| 710 | +# CONFIG_BONDING is not set | |
| 711 | +# CONFIG_MACVLAN is not set | |
| 712 | +# CONFIG_EQUALIZER is not set | |
| 713 | +# CONFIG_TUN is not set | |
| 714 | +# CONFIG_VETH is not set | |
| 715 | +# CONFIG_PHYLIB is not set | |
| 716 | +CONFIG_NET_ETHERNET=y | |
| 717 | +CONFIG_MII=y | |
| 718 | +# CONFIG_AX88796 is not set | |
| 719 | +# CONFIG_SMC91X is not set | |
| 720 | +CONFIG_DM9000=y | |
| 721 | +CONFIG_DM9000_DEBUGLEVEL=4 | |
| 722 | +CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL=y | |
| 723 | +# CONFIG_ENC28J60 is not set | |
| 724 | +# CONFIG_ETHOC is not set | |
| 725 | +# CONFIG_SMC911X is not set | |
| 726 | +# CONFIG_SMSC911X is not set | |
| 727 | +# CONFIG_DNET is not set | |
| 728 | +# CONFIG_IBM_NEW_EMAC_ZMII is not set | |
| 729 | +# CONFIG_IBM_NEW_EMAC_RGMII is not set | |
| 730 | +# CONFIG_IBM_NEW_EMAC_TAH is not set | |
| 731 | +# CONFIG_IBM_NEW_EMAC_EMAC4 is not set | |
| 732 | +# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | |
| 733 | +# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | |
| 734 | +# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | |
| 735 | +# CONFIG_B44 is not set | |
| 736 | +# CONFIG_KS8842 is not set | |
| 737 | +# CONFIG_KS8851 is not set | |
| 738 | +# CONFIG_KS8851_MLL is not set | |
| 739 | +# CONFIG_NETDEV_1000 is not set | |
| 740 | +# CONFIG_NETDEV_10000 is not set | |
| 741 | +# CONFIG_WLAN is not set | |
| 742 | + | |
| 743 | +# | |
| 744 | +# Enable WiMAX (Networking options) to see the WiMAX drivers | |
| 745 | +# | |
| 746 | + | |
| 747 | +# | |
| 748 | +# USB Network Adapters | |
| 749 | +# | |
| 750 | +# CONFIG_USB_CATC is not set | |
| 751 | +# CONFIG_USB_KAWETH is not set | |
| 752 | +# CONFIG_USB_PEGASUS is not set | |
| 753 | +# CONFIG_USB_RTL8150 is not set | |
| 754 | +# CONFIG_USB_USBNET is not set | |
| 755 | +# CONFIG_WAN is not set | |
| 756 | +# CONFIG_PPP is not set | |
| 757 | +# CONFIG_SLIP is not set | |
| 758 | +# CONFIG_NETCONSOLE is not set | |
| 759 | +# CONFIG_NETPOLL is not set | |
| 760 | +# CONFIG_NET_POLL_CONTROLLER is not set | |
| 761 | +# CONFIG_ISDN is not set | |
| 762 | +# CONFIG_PHONE is not set | |
| 763 | + | |
| 764 | +# | |
| 765 | +# Input device support | |
| 766 | +# | |
| 767 | +CONFIG_INPUT=y | |
| 768 | +# CONFIG_INPUT_FF_MEMLESS is not set | |
| 769 | +# CONFIG_INPUT_POLLDEV is not set | |
| 770 | +# CONFIG_INPUT_SPARSEKMAP is not set | |
| 771 | + | |
| 772 | +# | |
| 773 | +# Userland interfaces | |
| 774 | +# | |
| 775 | +# CONFIG_INPUT_MOUSEDEV is not set | |
| 776 | +# CONFIG_INPUT_JOYDEV is not set | |
| 777 | +CONFIG_INPUT_EVDEV=y | |
| 778 | +# CONFIG_INPUT_EVBUG is not set | |
| 779 | + | |
| 780 | +# | |
| 781 | +# Input Device Drivers | |
| 782 | +# | |
| 783 | +CONFIG_INPUT_KEYBOARD=y | |
| 784 | +# CONFIG_KEYBOARD_ADP5588 is not set | |
| 785 | +CONFIG_KEYBOARD_ATKBD=y | |
| 786 | +# CONFIG_QT2160 is not set | |
| 787 | +# CONFIG_KEYBOARD_LKKBD is not set | |
| 788 | +# CONFIG_KEYBOARD_GPIO is not set | |
| 789 | +CONFIG_KEYBOARD_MATRIX=y | |
| 790 | +# CONFIG_KEYBOARD_LM8323 is not set | |
| 791 | +# CONFIG_KEYBOARD_MAX7359 is not set | |
| 792 | +# CONFIG_KEYBOARD_NEWTON is not set | |
| 793 | +# CONFIG_KEYBOARD_OPENCORES is not set | |
| 794 | +# CONFIG_KEYBOARD_STOWAWAY is not set | |
| 795 | +# CONFIG_KEYBOARD_SUNKBD is not set | |
| 796 | +CONFIG_KEYBOARD_TWL4030=y | |
| 797 | +# CONFIG_KEYBOARD_XTKBD is not set | |
| 798 | +# CONFIG_INPUT_MOUSE is not set | |
| 799 | +# CONFIG_INPUT_JOYSTICK is not set | |
| 800 | +# CONFIG_INPUT_TABLET is not set | |
| 801 | +CONFIG_INPUT_TOUCHSCREEN=y | |
| 802 | +CONFIG_TOUCHSCREEN_ADS7846=y | |
| 803 | +# CONFIG_TOUCHSCREEN_AD7877 is not set | |
| 804 | +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set | |
| 805 | +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set | |
| 806 | +# CONFIG_TOUCHSCREEN_AD7879 is not set | |
| 807 | +# CONFIG_TOUCHSCREEN_DYNAPRO is not set | |
| 808 | +# CONFIG_TOUCHSCREEN_EETI is not set | |
| 809 | +# CONFIG_TOUCHSCREEN_FUJITSU is not set | |
| 810 | +# CONFIG_TOUCHSCREEN_GUNZE is not set | |
| 811 | +# CONFIG_TOUCHSCREEN_ELO is not set | |
| 812 | +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | |
| 813 | +# CONFIG_TOUCHSCREEN_MCS5000 is not set | |
| 814 | +# CONFIG_TOUCHSCREEN_MTOUCH is not set | |
| 815 | +# CONFIG_TOUCHSCREEN_INEXIO is not set | |
| 816 | +# CONFIG_TOUCHSCREEN_MK712 is not set | |
| 817 | +# CONFIG_TOUCHSCREEN_PENMOUNT is not set | |
| 818 | +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | |
| 819 | +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set | |
| 820 | +# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | |
| 821 | +# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | |
| 822 | +# CONFIG_TOUCHSCREEN_TSC2007 is not set | |
| 823 | +# CONFIG_TOUCHSCREEN_W90X900 is not set | |
| 824 | +# CONFIG_INPUT_MISC is not set | |
| 825 | + | |
| 826 | +# | |
| 827 | +# Hardware I/O ports | |
| 828 | +# | |
| 829 | +CONFIG_SERIO=y | |
| 830 | +CONFIG_SERIO_SERPORT=y | |
| 831 | +CONFIG_SERIO_LIBPS2=y | |
| 832 | +CONFIG_SERIO_RAW=y | |
| 833 | +# CONFIG_SERIO_ALTERA_PS2 is not set | |
| 834 | +# CONFIG_GAMEPORT is not set | |
| 835 | + | |
| 836 | +# | |
| 837 | +# Character devices | |
| 838 | +# | |
| 839 | +CONFIG_VT=y | |
| 840 | +CONFIG_CONSOLE_TRANSLATIONS=y | |
| 841 | +CONFIG_VT_CONSOLE=y | |
| 842 | +CONFIG_HW_CONSOLE=y | |
| 843 | +# CONFIG_VT_HW_CONSOLE_BINDING is not set | |
| 844 | +CONFIG_DEVKMEM=y | |
| 845 | +# CONFIG_SERIAL_NONSTANDARD is not set | |
| 846 | + | |
| 847 | +# | |
| 848 | +# Serial drivers | |
| 849 | +# | |
| 850 | +CONFIG_SERIAL_8250=y | |
| 851 | +CONFIG_SERIAL_8250_CONSOLE=y | |
| 852 | +CONFIG_SERIAL_8250_NR_UARTS=32 | |
| 853 | +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | |
| 854 | +CONFIG_SERIAL_8250_EXTENDED=y | |
| 855 | +CONFIG_SERIAL_8250_MANY_PORTS=y | |
| 856 | +CONFIG_SERIAL_8250_SHARE_IRQ=y | |
| 857 | +CONFIG_SERIAL_8250_DETECT_IRQ=y | |
| 858 | +CONFIG_SERIAL_8250_RSA=y | |
| 859 | + | |
| 860 | +# | |
| 861 | +# Non-8250 serial port support | |
| 862 | +# | |
| 863 | +# CONFIG_SERIAL_MAX3100 is not set | |
| 864 | +CONFIG_SERIAL_CORE=y | |
| 865 | +CONFIG_SERIAL_CORE_CONSOLE=y | |
| 866 | +CONFIG_UNIX98_PTYS=y | |
| 867 | +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | |
| 868 | +# CONFIG_LEGACY_PTYS is not set | |
| 869 | +# CONFIG_IPMI_HANDLER is not set | |
| 870 | +CONFIG_HW_RANDOM=y | |
| 871 | +# CONFIG_HW_RANDOM_TIMERIOMEM is not set | |
| 872 | +# CONFIG_R3964 is not set | |
| 873 | +CONFIG_RAW_DRIVER=y | |
| 874 | +CONFIG_MAX_RAW_DEVS=256 | |
| 875 | +# CONFIG_TCG_TPM is not set | |
| 876 | +CONFIG_I2C=y | |
| 877 | +CONFIG_I2C_BOARDINFO=y | |
| 878 | +CONFIG_I2C_COMPAT=y | |
| 879 | +CONFIG_I2C_CHARDEV=y | |
| 880 | +CONFIG_I2C_HELPER_AUTO=y | |
| 881 | + | |
| 882 | +# | |
| 883 | +# I2C Hardware Bus support | |
| 884 | +# | |
| 885 | + | |
| 886 | +# | |
| 887 | +# I2C system bus drivers (mostly embedded / system-on-chip) | |
| 888 | +# | |
| 889 | +# CONFIG_I2C_DESIGNWARE is not set | |
| 890 | +# CONFIG_I2C_GPIO is not set | |
| 891 | +# CONFIG_I2C_OCORES is not set | |
| 892 | +CONFIG_I2C_OMAP=y | |
| 893 | +# CONFIG_I2C_SIMTEC is not set | |
| 894 | + | |
| 895 | +# | |
| 896 | +# External I2C/SMBus adapter drivers | |
| 897 | +# | |
| 898 | +# CONFIG_I2C_PARPORT_LIGHT is not set | |
| 899 | +# CONFIG_I2C_TAOS_EVM is not set | |
| 900 | +# CONFIG_I2C_TINY_USB is not set | |
| 901 | + | |
| 902 | +# | |
| 903 | +# Other I2C/SMBus bus drivers | |
| 904 | +# | |
| 905 | +# CONFIG_I2C_PCA_PLATFORM is not set | |
| 906 | +# CONFIG_I2C_STUB is not set | |
| 907 | + | |
| 908 | +# | |
| 909 | +# Miscellaneous I2C Chip support | |
| 910 | +# | |
| 911 | +# CONFIG_SENSORS_TSL2550 is not set | |
| 912 | +# CONFIG_I2C_DEBUG_CORE is not set | |
| 913 | +# CONFIG_I2C_DEBUG_ALGO is not set | |
| 914 | +# CONFIG_I2C_DEBUG_BUS is not set | |
| 915 | +# CONFIG_I2C_DEBUG_CHIP is not set | |
| 916 | +CONFIG_SPI=y | |
| 917 | +# CONFIG_SPI_DEBUG is not set | |
| 918 | +CONFIG_SPI_MASTER=y | |
| 919 | + | |
| 920 | +# | |
| 921 | +# SPI Master Controller Drivers | |
| 922 | +# | |
| 923 | +# CONFIG_SPI_BITBANG is not set | |
| 924 | +# CONFIG_SPI_GPIO is not set | |
| 925 | +CONFIG_SPI_OMAP24XX=y | |
| 926 | +# CONFIG_SPI_XILINX is not set | |
| 927 | +# CONFIG_SPI_DESIGNWARE is not set | |
| 928 | + | |
| 929 | +# | |
| 930 | +# SPI Protocol Masters | |
| 931 | +# | |
| 932 | +# CONFIG_SPI_SPIDEV is not set | |
| 933 | +# CONFIG_SPI_TLE62X0 is not set | |
| 934 | + | |
| 935 | +# | |
| 936 | +# PPS support | |
| 937 | +# | |
| 938 | +# CONFIG_PPS is not set | |
| 939 | +CONFIG_ARCH_REQUIRE_GPIOLIB=y | |
| 940 | +CONFIG_GPIOLIB=y | |
| 941 | +# CONFIG_DEBUG_GPIO is not set | |
| 942 | +# CONFIG_GPIO_SYSFS is not set | |
| 943 | + | |
| 944 | +# | |
| 945 | +# Memory mapped GPIO expanders: | |
| 946 | +# | |
| 947 | + | |
| 948 | +# | |
| 949 | +# I2C GPIO expanders: | |
| 950 | +# | |
| 951 | +# CONFIG_GPIO_MAX732X is not set | |
| 952 | +# CONFIG_GPIO_PCA953X is not set | |
| 953 | +# CONFIG_GPIO_PCF857X is not set | |
| 954 | +CONFIG_GPIO_TWL4030=y | |
| 955 | +# CONFIG_GPIO_ADP5588 is not set | |
| 956 | + | |
| 957 | +# | |
| 958 | +# PCI GPIO expanders: | |
| 959 | +# | |
| 960 | + | |
| 961 | +# | |
| 962 | +# SPI GPIO expanders: | |
| 963 | +# | |
| 964 | +# CONFIG_GPIO_MAX7301 is not set | |
| 965 | +# CONFIG_GPIO_MCP23S08 is not set | |
| 966 | +# CONFIG_GPIO_MC33880 is not set | |
| 967 | + | |
| 968 | +# | |
| 969 | +# AC97 GPIO expanders: | |
| 970 | +# | |
| 971 | +# CONFIG_W1 is not set | |
| 972 | +# CONFIG_POWER_SUPPLY is not set | |
| 973 | +# CONFIG_HWMON is not set | |
| 974 | +# CONFIG_THERMAL is not set | |
| 975 | +# CONFIG_WATCHDOG is not set | |
| 976 | +CONFIG_SSB_POSSIBLE=y | |
| 977 | + | |
| 978 | +# | |
| 979 | +# Sonics Silicon Backplane | |
| 980 | +# | |
| 981 | +# CONFIG_SSB is not set | |
| 982 | + | |
| 983 | +# | |
| 984 | +# Multifunction device drivers | |
| 985 | +# | |
| 986 | +CONFIG_MFD_CORE=y | |
| 987 | +# CONFIG_MFD_SM501 is not set | |
| 988 | +# CONFIG_MFD_ASIC3 is not set | |
| 989 | +# CONFIG_HTC_EGPIO is not set | |
| 990 | +# CONFIG_HTC_PASIC3 is not set | |
| 991 | +# CONFIG_TPS65010 is not set | |
| 992 | +CONFIG_TWL4030_CORE=y | |
| 993 | +CONFIG_TWL4030_POWER=y | |
| 994 | +CONFIG_TWL4030_CODEC=y | |
| 995 | +# CONFIG_MFD_TMIO is not set | |
| 996 | +# CONFIG_MFD_T7L66XB is not set | |
| 997 | +# CONFIG_MFD_TC6387XB is not set | |
| 998 | +# CONFIG_MFD_TC6393XB is not set | |
| 999 | +# CONFIG_PMIC_DA903X is not set | |
| 1000 | +# CONFIG_PMIC_ADP5520 is not set | |
| 1001 | +# CONFIG_MFD_WM8400 is not set | |
| 1002 | +# CONFIG_MFD_WM831X is not set | |
| 1003 | +# CONFIG_MFD_WM8350_I2C is not set | |
| 1004 | +# CONFIG_MFD_PCF50633 is not set | |
| 1005 | +# CONFIG_MFD_MC13783 is not set | |
| 1006 | +# CONFIG_AB3100_CORE is not set | |
| 1007 | +# CONFIG_EZX_PCAP is not set | |
| 1008 | +# CONFIG_MFD_88PM8607 is not set | |
| 1009 | +# CONFIG_AB4500_CORE is not set | |
| 1010 | +CONFIG_REGULATOR=y | |
| 1011 | +# CONFIG_REGULATOR_DEBUG is not set | |
| 1012 | +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set | |
| 1013 | +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | |
| 1014 | +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | |
| 1015 | +# CONFIG_REGULATOR_BQ24022 is not set | |
| 1016 | +# CONFIG_REGULATOR_MAX1586 is not set | |
| 1017 | +# CONFIG_REGULATOR_MAX8660 is not set | |
| 1018 | +CONFIG_REGULATOR_TWL4030=y | |
| 1019 | +# CONFIG_REGULATOR_LP3971 is not set | |
| 1020 | +# CONFIG_REGULATOR_TPS65023 is not set | |
| 1021 | +# CONFIG_REGULATOR_TPS6507X is not set | |
| 1022 | +# CONFIG_MEDIA_SUPPORT is not set | |
| 1023 | + | |
| 1024 | +# | |
| 1025 | +# Graphics support | |
| 1026 | +# | |
| 1027 | +# CONFIG_VGASTATE is not set | |
| 1028 | +# CONFIG_VIDEO_OUTPUT_CONTROL is not set | |
| 1029 | +CONFIG_FB=y | |
| 1030 | +# CONFIG_FIRMWARE_EDID is not set | |
| 1031 | +# CONFIG_FB_DDC is not set | |
| 1032 | +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | |
| 1033 | +CONFIG_FB_CFB_FILLRECT=y | |
| 1034 | +CONFIG_FB_CFB_COPYAREA=y | |
| 1035 | +CONFIG_FB_CFB_IMAGEBLIT=y | |
| 1036 | +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | |
| 1037 | +# CONFIG_FB_SYS_FILLRECT is not set | |
| 1038 | +# CONFIG_FB_SYS_COPYAREA is not set | |
| 1039 | +# CONFIG_FB_SYS_IMAGEBLIT is not set | |
| 1040 | +CONFIG_FB_FOREIGN_ENDIAN=y | |
| 1041 | +CONFIG_FB_BOTH_ENDIAN=y | |
| 1042 | +# CONFIG_FB_BIG_ENDIAN is not set | |
| 1043 | +# CONFIG_FB_LITTLE_ENDIAN is not set | |
| 1044 | +# CONFIG_FB_SYS_FOPS is not set | |
| 1045 | +# CONFIG_FB_SVGALIB is not set | |
| 1046 | +# CONFIG_FB_MACMODES is not set | |
| 1047 | +# CONFIG_FB_BACKLIGHT is not set | |
| 1048 | +# CONFIG_FB_MODE_HELPERS is not set | |
| 1049 | +# CONFIG_FB_TILEBLITTING is not set | |
| 1050 | + | |
| 1051 | +# | |
| 1052 | +# Frame buffer hardware drivers | |
| 1053 | +# | |
| 1054 | +# CONFIG_FB_S1D13XXX is not set | |
| 1055 | +# CONFIG_FB_TMIO is not set | |
| 1056 | +# CONFIG_FB_VIRTUAL is not set | |
| 1057 | +# CONFIG_FB_METRONOME is not set | |
| 1058 | +# CONFIG_FB_MB862XX is not set | |
| 1059 | +# CONFIG_FB_BROADSHEET is not set | |
| 1060 | +CONFIG_FB_OMAP_BOOTLOADER_INIT=y | |
| 1061 | +CONFIG_OMAP2_VRAM=y | |
| 1062 | +CONFIG_OMAP2_VRFB=y | |
| 1063 | +CONFIG_OMAP2_DSS=y | |
| 1064 | +CONFIG_OMAP2_VRAM_SIZE=0 | |
| 1065 | +CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y | |
| 1066 | +# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set | |
| 1067 | +# CONFIG_OMAP2_DSS_RFBI is not set | |
| 1068 | +CONFIG_OMAP2_DSS_VENC=y | |
| 1069 | +# CONFIG_OMAP2_DSS_SDI is not set | |
| 1070 | +# CONFIG_OMAP2_DSS_DSI is not set | |
| 1071 | +# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | |
| 1072 | +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 | |
| 1073 | +CONFIG_FB_OMAP2=y | |
| 1074 | +CONFIG_FB_OMAP2_DEBUG_SUPPORT=y | |
| 1075 | +# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set | |
| 1076 | +CONFIG_FB_OMAP2_NUM_FBS=3 | |
| 1077 | + | |
| 1078 | +# | |
| 1079 | +# OMAP2/3 Display Device Drivers | |
| 1080 | +# | |
| 1081 | +CONFIG_PANEL_GENERIC=y | |
| 1082 | +# CONFIG_PANEL_SHARP_LS037V7DW01 is not set | |
| 1083 | +CONFIG_PANEL_INNOLUX_AT070TN83=y | |
| 1084 | +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set | |
| 1085 | + | |
| 1086 | +# | |
| 1087 | +# Display device support | |
| 1088 | +# | |
| 1089 | +CONFIG_DISPLAY_SUPPORT=y | |
| 1090 | + | |
| 1091 | +# | |
| 1092 | +# Display hardware drivers | |
| 1093 | +# | |
| 1094 | + | |
| 1095 | +# | |
| 1096 | +# Console display driver support | |
| 1097 | +# | |
| 1098 | +# CONFIG_VGA_CONSOLE is not set | |
| 1099 | +CONFIG_DUMMY_CONSOLE=y | |
| 1100 | +CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 1101 | +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | |
| 1102 | +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | |
| 1103 | +# CONFIG_FONTS is not set | |
| 1104 | +CONFIG_FONT_8x8=y | |
| 1105 | +CONFIG_FONT_8x16=y | |
| 1106 | +CONFIG_LOGO=y | |
| 1107 | +# CONFIG_LOGO_LINUX_MONO is not set | |
| 1108 | +# CONFIG_LOGO_LINUX_VGA16 is not set | |
| 1109 | +CONFIG_LOGO_LINUX_CLUT224=y | |
| 1110 | +CONFIG_SOUND=y | |
| 1111 | +# CONFIG_SOUND_OSS_CORE is not set | |
| 1112 | +CONFIG_SND=y | |
| 1113 | +CONFIG_SND_TIMER=y | |
| 1114 | +CONFIG_SND_PCM=y | |
| 1115 | +CONFIG_SND_JACK=y | |
| 1116 | +# CONFIG_SND_SEQUENCER is not set | |
| 1117 | +# CONFIG_SND_MIXER_OSS is not set | |
| 1118 | +# CONFIG_SND_PCM_OSS is not set | |
| 1119 | +# CONFIG_SND_HRTIMER is not set | |
| 1120 | +# CONFIG_SND_DYNAMIC_MINORS is not set | |
| 1121 | +CONFIG_SND_SUPPORT_OLD_API=y | |
| 1122 | +CONFIG_SND_VERBOSE_PROCFS=y | |
| 1123 | +# CONFIG_SND_VERBOSE_PRINTK is not set | |
| 1124 | +# CONFIG_SND_DEBUG is not set | |
| 1125 | +# CONFIG_SND_RAWMIDI_SEQ is not set | |
| 1126 | +# CONFIG_SND_OPL3_LIB_SEQ is not set | |
| 1127 | +# CONFIG_SND_OPL4_LIB_SEQ is not set | |
| 1128 | +# CONFIG_SND_SBAWE_SEQ is not set | |
| 1129 | +# CONFIG_SND_EMU10K1_SEQ is not set | |
| 1130 | +CONFIG_SND_DRIVERS=y | |
| 1131 | +# CONFIG_SND_DUMMY is not set | |
| 1132 | +# CONFIG_SND_MTPAV is not set | |
| 1133 | +# CONFIG_SND_SERIAL_U16550 is not set | |
| 1134 | +# CONFIG_SND_MPU401 is not set | |
| 1135 | +CONFIG_SND_ARM=y | |
| 1136 | +CONFIG_SND_SPI=y | |
| 1137 | +CONFIG_SND_USB=y | |
| 1138 | +# CONFIG_SND_USB_AUDIO is not set | |
| 1139 | +# CONFIG_SND_USB_CAIAQ is not set | |
| 1140 | +CONFIG_SND_SOC=y | |
| 1141 | +CONFIG_SND_OMAP_SOC=y | |
| 1142 | +CONFIG_SND_OMAP_SOC_MCBSP=y | |
| 1143 | +CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y | |
| 1144 | +CONFIG_SND_SOC_I2C_AND_SPI=y | |
| 1145 | +# CONFIG_SND_SOC_ALL_CODECS is not set | |
| 1146 | +CONFIG_SND_SOC_TWL4030=y | |
| 1147 | +# CONFIG_SOUND_PRIME is not set | |
| 1148 | +CONFIG_HID_SUPPORT=y | |
| 1149 | +CONFIG_HID=y | |
| 1150 | +CONFIG_HIDRAW=y | |
| 1151 | + | |
| 1152 | +# | |
| 1153 | +# USB Input Devices | |
| 1154 | +# | |
| 1155 | +CONFIG_USB_HID=y | |
| 1156 | +# CONFIG_HID_PID is not set | |
| 1157 | +CONFIG_USB_HIDDEV=y | |
| 1158 | + | |
| 1159 | +# | |
| 1160 | +# Special HID drivers | |
| 1161 | +# | |
| 1162 | +CONFIG_HID_A4TECH=y | |
| 1163 | +CONFIG_HID_APPLE=y | |
| 1164 | +CONFIG_HID_BELKIN=y | |
| 1165 | +CONFIG_HID_CHERRY=y | |
| 1166 | +CONFIG_HID_CHICONY=y | |
| 1167 | +CONFIG_HID_CYPRESS=y | |
| 1168 | +# CONFIG_HID_DRAGONRISE is not set | |
| 1169 | +CONFIG_HID_EZKEY=y | |
| 1170 | +# CONFIG_HID_KYE is not set | |
| 1171 | +CONFIG_HID_GYRATION=y | |
| 1172 | +# CONFIG_HID_TWINHAN is not set | |
| 1173 | +# CONFIG_HID_KENSINGTON is not set | |
| 1174 | +CONFIG_HID_LOGITECH=y | |
| 1175 | +# CONFIG_LOGITECH_FF is not set | |
| 1176 | +# CONFIG_LOGIRUMBLEPAD2_FF is not set | |
| 1177 | +CONFIG_HID_MICROSOFT=y | |
| 1178 | +CONFIG_HID_MONTEREY=y | |
| 1179 | +# CONFIG_HID_NTRIG is not set | |
| 1180 | +CONFIG_HID_PANTHERLORD=y | |
| 1181 | +# CONFIG_PANTHERLORD_FF is not set | |
| 1182 | +CONFIG_HID_PETALYNX=y | |
| 1183 | +CONFIG_HID_SAMSUNG=y | |
| 1184 | +CONFIG_HID_SONY=y | |
| 1185 | +CONFIG_HID_SUNPLUS=y | |
| 1186 | +# CONFIG_HID_GREENASIA is not set | |
| 1187 | +# CONFIG_HID_SMARTJOYPLUS is not set | |
| 1188 | +# CONFIG_HID_TOPSEED is not set | |
| 1189 | +# CONFIG_HID_THRUSTMASTER is not set | |
| 1190 | +# CONFIG_HID_ZEROPLUS is not set | |
| 1191 | +CONFIG_USB_SUPPORT=y | |
| 1192 | +CONFIG_USB_ARCH_HAS_HCD=y | |
| 1193 | +CONFIG_USB_ARCH_HAS_OHCI=y | |
| 1194 | +CONFIG_USB_ARCH_HAS_EHCI=y | |
| 1195 | +CONFIG_USB=y | |
| 1196 | +# CONFIG_USB_DEBUG is not set | |
| 1197 | +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | |
| 1198 | + | |
| 1199 | +# | |
| 1200 | +# Miscellaneous USB options | |
| 1201 | +# | |
| 1202 | +# CONFIG_USB_DEVICEFS is not set | |
| 1203 | +# CONFIG_USB_DEVICE_CLASS is not set | |
| 1204 | +# CONFIG_USB_DYNAMIC_MINORS is not set | |
| 1205 | +# CONFIG_USB_OTG is not set | |
| 1206 | +# CONFIG_USB_OTG_WHITELIST is not set | |
| 1207 | +# CONFIG_USB_OTG_BLACKLIST_HUB is not set | |
| 1208 | +CONFIG_USB_MON=y | |
| 1209 | +# CONFIG_USB_WUSB is not set | |
| 1210 | +# CONFIG_USB_WUSB_CBAF is not set | |
| 1211 | + | |
| 1212 | +# | |
| 1213 | +# USB Host Controller Drivers | |
| 1214 | +# | |
| 1215 | +# CONFIG_USB_C67X00_HCD is not set | |
| 1216 | +CONFIG_USB_EHCI_HCD=y | |
| 1217 | +CONFIG_USB_EHCI_ROOT_HUB_TT=y | |
| 1218 | +# CONFIG_USB_EHCI_TT_NEWSCHED is not set | |
| 1219 | +# CONFIG_USB_OXU210HP_HCD is not set | |
| 1220 | +# CONFIG_USB_ISP116X_HCD is not set | |
| 1221 | +# CONFIG_USB_ISP1760_HCD is not set | |
| 1222 | +# CONFIG_USB_ISP1362_HCD is not set | |
| 1223 | +# CONFIG_USB_OHCI_HCD is not set | |
| 1224 | +# CONFIG_USB_SL811_HCD is not set | |
| 1225 | +# CONFIG_USB_R8A66597_HCD is not set | |
| 1226 | +# CONFIG_USB_HWA_HCD is not set | |
| 1227 | +CONFIG_USB_MUSB_HDRC=y | |
| 1228 | +CONFIG_USB_MUSB_SOC=y | |
| 1229 | + | |
| 1230 | +# | |
| 1231 | +# OMAP 343x high speed USB support | |
| 1232 | +# | |
| 1233 | +CONFIG_USB_MUSB_HOST=y | |
| 1234 | +# CONFIG_USB_MUSB_PERIPHERAL is not set | |
| 1235 | +# CONFIG_USB_MUSB_OTG is not set | |
| 1236 | +# CONFIG_USB_GADGET_MUSB_HDRC is not set | |
| 1237 | +CONFIG_USB_MUSB_HDRC_HCD=y | |
| 1238 | +# CONFIG_MUSB_PIO_ONLY is not set | |
| 1239 | +CONFIG_USB_INVENTRA_DMA=y | |
| 1240 | +# CONFIG_USB_TI_CPPI_DMA is not set | |
| 1241 | +# CONFIG_USB_MUSB_DEBUG is not set | |
| 1242 | + | |
| 1243 | +# | |
| 1244 | +# USB Device Class drivers | |
| 1245 | +# | |
| 1246 | +# CONFIG_USB_ACM is not set | |
| 1247 | +# CONFIG_USB_PRINTER is not set | |
| 1248 | +# CONFIG_USB_WDM is not set | |
| 1249 | +# CONFIG_USB_TMC is not set | |
| 1250 | + | |
| 1251 | +# | |
| 1252 | +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | |
| 1253 | +# | |
| 1254 | + | |
| 1255 | +# | |
| 1256 | +# also be needed; see USB_STORAGE Help for more info | |
| 1257 | +# | |
| 1258 | +CONFIG_USB_STORAGE=m | |
| 1259 | +# CONFIG_USB_STORAGE_DEBUG is not set | |
| 1260 | +# CONFIG_USB_STORAGE_DATAFAB is not set | |
| 1261 | +# CONFIG_USB_STORAGE_FREECOM is not set | |
| 1262 | +# CONFIG_USB_STORAGE_ISD200 is not set | |
| 1263 | +# CONFIG_USB_STORAGE_USBAT is not set | |
| 1264 | +# CONFIG_USB_STORAGE_SDDR09 is not set | |
| 1265 | +# CONFIG_USB_STORAGE_SDDR55 is not set | |
| 1266 | +# CONFIG_USB_STORAGE_JUMPSHOT is not set | |
| 1267 | +# CONFIG_USB_STORAGE_ALAUDA is not set | |
| 1268 | +# CONFIG_USB_STORAGE_ONETOUCH is not set | |
| 1269 | +# CONFIG_USB_STORAGE_KARMA is not set | |
| 1270 | +# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | |
| 1271 | +# CONFIG_USB_LIBUSUAL is not set | |
| 1272 | + | |
| 1273 | +# | |
| 1274 | +# USB Imaging devices | |
| 1275 | +# | |
| 1276 | +# CONFIG_USB_MDC800 is not set | |
| 1277 | +# CONFIG_USB_MICROTEK is not set | |
| 1278 | + | |
| 1279 | +# | |
| 1280 | +# USB port drivers | |
| 1281 | +# | |
| 1282 | +# CONFIG_USB_SERIAL is not set | |
| 1283 | + | |
| 1284 | +# | |
| 1285 | +# USB Miscellaneous drivers | |
| 1286 | +# | |
| 1287 | +# CONFIG_USB_EMI62 is not set | |
| 1288 | +# CONFIG_USB_EMI26 is not set | |
| 1289 | +# CONFIG_USB_ADUTUX is not set | |
| 1290 | +# CONFIG_USB_SEVSEG is not set | |
| 1291 | +# CONFIG_USB_RIO500 is not set | |
| 1292 | +# CONFIG_USB_LEGOTOWER is not set | |
| 1293 | +# CONFIG_USB_LCD is not set | |
| 1294 | +# CONFIG_USB_BERRY_CHARGE is not set | |
| 1295 | +# CONFIG_USB_LED is not set | |
| 1296 | +# CONFIG_USB_CYPRESS_CY7C63 is not set | |
| 1297 | +# CONFIG_USB_CYTHERM is not set | |
| 1298 | +# CONFIG_USB_IDMOUSE is not set | |
| 1299 | +# CONFIG_USB_FTDI_ELAN is not set | |
| 1300 | +# CONFIG_USB_APPLEDISPLAY is not set | |
| 1301 | +# CONFIG_USB_SISUSBVGA is not set | |
| 1302 | +# CONFIG_USB_LD is not set | |
| 1303 | +# CONFIG_USB_TRANCEVIBRATOR is not set | |
| 1304 | +# CONFIG_USB_IOWARRIOR is not set | |
| 1305 | +# CONFIG_USB_TEST is not set | |
| 1306 | +# CONFIG_USB_ISIGHTFW is not set | |
| 1307 | +# CONFIG_USB_VST is not set | |
| 1308 | +CONFIG_USB_GADGET=y | |
| 1309 | +# CONFIG_USB_GADGET_DEBUG is not set | |
| 1310 | +# CONFIG_USB_GADGET_DEBUG_FILES is not set | |
| 1311 | +CONFIG_USB_GADGET_VBUS_DRAW=2 | |
| 1312 | +CONFIG_USB_GADGET_SELECTED=y | |
| 1313 | +# CONFIG_USB_GADGET_AT91 is not set | |
| 1314 | +# CONFIG_USB_GADGET_ATMEL_USBA is not set | |
| 1315 | +# CONFIG_USB_GADGET_FSL_USB2 is not set | |
| 1316 | +# CONFIG_USB_GADGET_LH7A40X is not set | |
| 1317 | +CONFIG_USB_GADGET_OMAP=y | |
| 1318 | +CONFIG_USB_OMAP=y | |
| 1319 | +# CONFIG_USB_GADGET_PXA25X is not set | |
| 1320 | +# CONFIG_USB_GADGET_R8A66597 is not set | |
| 1321 | +# CONFIG_USB_GADGET_PXA27X is not set | |
| 1322 | +# CONFIG_USB_GADGET_S3C_HSOTG is not set | |
| 1323 | +# CONFIG_USB_GADGET_IMX is not set | |
| 1324 | +# CONFIG_USB_GADGET_S3C2410 is not set | |
| 1325 | +# CONFIG_USB_GADGET_M66592 is not set | |
| 1326 | +# CONFIG_USB_GADGET_AMD5536UDC is not set | |
| 1327 | +# CONFIG_USB_GADGET_FSL_QE is not set | |
| 1328 | +# CONFIG_USB_GADGET_CI13XXX is not set | |
| 1329 | +# CONFIG_USB_GADGET_NET2280 is not set | |
| 1330 | +# CONFIG_USB_GADGET_GOKU is not set | |
| 1331 | +# CONFIG_USB_GADGET_LANGWELL is not set | |
| 1332 | +# CONFIG_USB_GADGET_DUMMY_HCD is not set | |
| 1333 | +# CONFIG_USB_GADGET_DUALSPEED is not set | |
| 1334 | +# CONFIG_USB_ZERO is not set | |
| 1335 | +CONFIG_USB_AUDIO=m | |
| 1336 | +CONFIG_USB_ETH=m | |
| 1337 | +CONFIG_USB_ETH_RNDIS=y | |
| 1338 | +CONFIG_USB_ETH_EEM=y | |
| 1339 | +CONFIG_USB_GADGETFS=m | |
| 1340 | +# CONFIG_USB_FILE_STORAGE is not set | |
| 1341 | +# CONFIG_USB_MASS_STORAGE is not set | |
| 1342 | +CONFIG_USB_G_SERIAL=m | |
| 1343 | +# CONFIG_USB_MIDI_GADGET is not set | |
| 1344 | +CONFIG_USB_G_PRINTER=m | |
| 1345 | +# CONFIG_USB_CDC_COMPOSITE is not set | |
| 1346 | +# CONFIG_USB_G_MULTI is not set | |
| 1347 | + | |
| 1348 | +# | |
| 1349 | +# OTG and related infrastructure | |
| 1350 | +# | |
| 1351 | +CONFIG_USB_OTG_UTILS=y | |
| 1352 | +# CONFIG_USB_GPIO_VBUS is not set | |
| 1353 | +# CONFIG_ISP1301_OMAP is not set | |
| 1354 | +# CONFIG_USB_ULPI is not set | |
| 1355 | +CONFIG_TWL4030_USB=y | |
| 1356 | +# CONFIG_NOP_USB_XCEIV is not set | |
| 1357 | +CONFIG_MMC=y | |
| 1358 | +# CONFIG_MMC_DEBUG is not set | |
| 1359 | +# CONFIG_MMC_UNSAFE_RESUME is not set | |
| 1360 | + | |
| 1361 | +# | |
| 1362 | +# MMC/SD/SDIO Card Drivers | |
| 1363 | +# | |
| 1364 | +CONFIG_MMC_BLOCK=y | |
| 1365 | +CONFIG_MMC_BLOCK_BOUNCE=y | |
| 1366 | +# CONFIG_SDIO_UART is not set | |
| 1367 | +# CONFIG_MMC_TEST is not set | |
| 1368 | + | |
| 1369 | +# | |
| 1370 | +# MMC/SD/SDIO Host Controller Drivers | |
| 1371 | +# | |
| 1372 | +CONFIG_MMC_SDHCI=y | |
| 1373 | +CONFIG_MMC_SDHCI_PLTFM=m | |
| 1374 | +# CONFIG_MMC_OMAP is not set | |
| 1375 | +CONFIG_MMC_OMAP_HS=y | |
| 1376 | +# CONFIG_MMC_AT91 is not set | |
| 1377 | +# CONFIG_MMC_ATMELMCI is not set | |
| 1378 | +CONFIG_MMC_SPI=m | |
| 1379 | +# CONFIG_MEMSTICK is not set | |
| 1380 | +CONFIG_NEW_LEDS=y | |
| 1381 | +CONFIG_LEDS_CLASS=y | |
| 1382 | + | |
| 1383 | +# | |
| 1384 | +# LED drivers | |
| 1385 | +# | |
| 1386 | +# CONFIG_LEDS_PCA9532 is not set | |
| 1387 | +CONFIG_LEDS_GPIO=y | |
| 1388 | +CONFIG_LEDS_GPIO_PLATFORM=y | |
| 1389 | +# CONFIG_LEDS_LP3944 is not set | |
| 1390 | +# CONFIG_LEDS_PCA955X is not set | |
| 1391 | +# CONFIG_LEDS_DAC124S085 is not set | |
| 1392 | +# CONFIG_LEDS_REGULATOR is not set | |
| 1393 | +# CONFIG_LEDS_BD2802 is not set | |
| 1394 | +# CONFIG_LEDS_LT3593 is not set | |
| 1395 | + | |
| 1396 | +# | |
| 1397 | +# LED Triggers | |
| 1398 | +# | |
| 1399 | +CONFIG_LEDS_TRIGGERS=y | |
| 1400 | +# CONFIG_LEDS_TRIGGER_TIMER is not set | |
| 1401 | +CONFIG_LEDS_TRIGGER_HEARTBEAT=y | |
| 1402 | +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | |
| 1403 | +# CONFIG_LEDS_TRIGGER_GPIO is not set | |
| 1404 | +# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set | |
| 1405 | + | |
| 1406 | +# | |
| 1407 | +# iptables trigger is under Netfilter config (LED target) | |
| 1408 | +# | |
| 1409 | +# CONFIG_ACCESSIBILITY is not set | |
| 1410 | +CONFIG_RTC_LIB=y | |
| 1411 | +CONFIG_RTC_CLASS=y | |
| 1412 | +CONFIG_RTC_HCTOSYS=y | |
| 1413 | +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | |
| 1414 | +# CONFIG_RTC_DEBUG is not set | |
| 1415 | + | |
| 1416 | +# | |
| 1417 | +# RTC interfaces | |
| 1418 | +# | |
| 1419 | +CONFIG_RTC_INTF_SYSFS=y | |
| 1420 | +CONFIG_RTC_INTF_PROC=y | |
| 1421 | +CONFIG_RTC_INTF_DEV=y | |
| 1422 | +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | |
| 1423 | +# CONFIG_RTC_DRV_TEST is not set | |
| 1424 | + | |
| 1425 | +# | |
| 1426 | +# I2C RTC drivers | |
| 1427 | +# | |
| 1428 | +# CONFIG_RTC_DRV_DS1307 is not set | |
| 1429 | +# CONFIG_RTC_DRV_DS1374 is not set | |
| 1430 | +# CONFIG_RTC_DRV_DS1672 is not set | |
| 1431 | +# CONFIG_RTC_DRV_MAX6900 is not set | |
| 1432 | +# CONFIG_RTC_DRV_RS5C372 is not set | |
| 1433 | +# CONFIG_RTC_DRV_ISL1208 is not set | |
| 1434 | +# CONFIG_RTC_DRV_X1205 is not set | |
| 1435 | +# CONFIG_RTC_DRV_PCF8563 is not set | |
| 1436 | +# CONFIG_RTC_DRV_PCF8583 is not set | |
| 1437 | +# CONFIG_RTC_DRV_M41T80 is not set | |
| 1438 | +# CONFIG_RTC_DRV_BQ32K is not set | |
| 1439 | +CONFIG_RTC_DRV_TWL4030=y | |
| 1440 | +# CONFIG_RTC_DRV_S35390A is not set | |
| 1441 | +# CONFIG_RTC_DRV_FM3130 is not set | |
| 1442 | +# CONFIG_RTC_DRV_RX8581 is not set | |
| 1443 | +# CONFIG_RTC_DRV_RX8025 is not set | |
| 1444 | + | |
| 1445 | +# | |
| 1446 | +# SPI RTC drivers | |
| 1447 | +# | |
| 1448 | +# CONFIG_RTC_DRV_M41T94 is not set | |
| 1449 | +# CONFIG_RTC_DRV_DS1305 is not set | |
| 1450 | +# CONFIG_RTC_DRV_DS1390 is not set | |
| 1451 | +# CONFIG_RTC_DRV_MAX6902 is not set | |
| 1452 | +# CONFIG_RTC_DRV_R9701 is not set | |
| 1453 | +# CONFIG_RTC_DRV_RS5C348 is not set | |
| 1454 | +# CONFIG_RTC_DRV_DS3234 is not set | |
| 1455 | +# CONFIG_RTC_DRV_PCF2123 is not set | |
| 1456 | + | |
| 1457 | +# | |
| 1458 | +# Platform RTC drivers | |
| 1459 | +# | |
| 1460 | +# CONFIG_RTC_DRV_CMOS is not set | |
| 1461 | +# CONFIG_RTC_DRV_DS1286 is not set | |
| 1462 | +# CONFIG_RTC_DRV_DS1511 is not set | |
| 1463 | +# CONFIG_RTC_DRV_DS1553 is not set | |
| 1464 | +# CONFIG_RTC_DRV_DS1742 is not set | |
| 1465 | +# CONFIG_RTC_DRV_STK17TA8 is not set | |
| 1466 | +# CONFIG_RTC_DRV_M48T86 is not set | |
| 1467 | +# CONFIG_RTC_DRV_M48T35 is not set | |
| 1468 | +# CONFIG_RTC_DRV_M48T59 is not set | |
| 1469 | +# CONFIG_RTC_DRV_MSM6242 is not set | |
| 1470 | +# CONFIG_RTC_DRV_BQ4802 is not set | |
| 1471 | +# CONFIG_RTC_DRV_RP5C01 is not set | |
| 1472 | +# CONFIG_RTC_DRV_V3020 is not set | |
| 1473 | + | |
| 1474 | +# | |
| 1475 | +# on-CPU RTC drivers | |
| 1476 | +# | |
| 1477 | +# CONFIG_DMADEVICES is not set | |
| 1478 | +# CONFIG_AUXDISPLAY is not set | |
| 1479 | +# CONFIG_UIO is not set | |
| 1480 | + | |
| 1481 | +# | |
| 1482 | +# TI VLYNQ | |
| 1483 | +# | |
| 1484 | +# CONFIG_STAGING is not set | |
| 1485 | + | |
| 1486 | +# | |
| 1487 | +# CBUS support | |
| 1488 | +# | |
| 1489 | +# CONFIG_CBUS is not set | |
| 1490 | + | |
| 1491 | +# | |
| 1492 | +# File systems | |
| 1493 | +# | |
| 1494 | +CONFIG_EXT2_FS=y | |
| 1495 | +# CONFIG_EXT2_FS_XATTR is not set | |
| 1496 | +# CONFIG_EXT2_FS_XIP is not set | |
| 1497 | +CONFIG_EXT3_FS=y | |
| 1498 | +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | |
| 1499 | +# CONFIG_EXT3_FS_XATTR is not set | |
| 1500 | +# CONFIG_EXT4_FS is not set | |
| 1501 | +CONFIG_JBD=y | |
| 1502 | +# CONFIG_REISERFS_FS is not set | |
| 1503 | +# CONFIG_JFS_FS is not set | |
| 1504 | +# CONFIG_FS_POSIX_ACL is not set | |
| 1505 | +# CONFIG_XFS_FS is not set | |
| 1506 | +# CONFIG_GFS2_FS is not set | |
| 1507 | +# CONFIG_OCFS2_FS is not set | |
| 1508 | +# CONFIG_BTRFS_FS is not set | |
| 1509 | +# CONFIG_NILFS2_FS is not set | |
| 1510 | +CONFIG_FILE_LOCKING=y | |
| 1511 | +CONFIG_FSNOTIFY=y | |
| 1512 | +CONFIG_DNOTIFY=y | |
| 1513 | +CONFIG_INOTIFY=y | |
| 1514 | +CONFIG_INOTIFY_USER=y | |
| 1515 | +CONFIG_QUOTA=y | |
| 1516 | +# CONFIG_QUOTA_NETLINK_INTERFACE is not set | |
| 1517 | +CONFIG_PRINT_QUOTA_WARNING=y | |
| 1518 | +CONFIG_QUOTA_TREE=y | |
| 1519 | +# CONFIG_QFMT_V1 is not set | |
| 1520 | +CONFIG_QFMT_V2=y | |
| 1521 | +CONFIG_QUOTACTL=y | |
| 1522 | +# CONFIG_AUTOFS_FS is not set | |
| 1523 | +# CONFIG_AUTOFS4_FS is not set | |
| 1524 | +# CONFIG_FUSE_FS is not set | |
| 1525 | + | |
| 1526 | +# | |
| 1527 | +# Caches | |
| 1528 | +# | |
| 1529 | +# CONFIG_FSCACHE is not set | |
| 1530 | + | |
| 1531 | +# | |
| 1532 | +# CD-ROM/DVD Filesystems | |
| 1533 | +# | |
| 1534 | +# CONFIG_ISO9660_FS is not set | |
| 1535 | +# CONFIG_UDF_FS is not set | |
| 1536 | + | |
| 1537 | +# | |
| 1538 | +# DOS/FAT/NT Filesystems | |
| 1539 | +# | |
| 1540 | +CONFIG_FAT_FS=y | |
| 1541 | +CONFIG_MSDOS_FS=y | |
| 1542 | +CONFIG_VFAT_FS=y | |
| 1543 | +CONFIG_FAT_DEFAULT_CODEPAGE=437 | |
| 1544 | +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | |
| 1545 | +# CONFIG_NTFS_FS is not set | |
| 1546 | + | |
| 1547 | +# | |
| 1548 | +# Pseudo filesystems | |
| 1549 | +# | |
| 1550 | +CONFIG_PROC_FS=y | |
| 1551 | +CONFIG_PROC_SYSCTL=y | |
| 1552 | +CONFIG_PROC_PAGE_MONITOR=y | |
| 1553 | +CONFIG_SYSFS=y | |
| 1554 | +CONFIG_TMPFS=y | |
| 1555 | +# CONFIG_TMPFS_POSIX_ACL is not set | |
| 1556 | +# CONFIG_HUGETLB_PAGE is not set | |
| 1557 | +# CONFIG_CONFIGFS_FS is not set | |
| 1558 | +CONFIG_MISC_FILESYSTEMS=y | |
| 1559 | +# CONFIG_ADFS_FS is not set | |
| 1560 | +# CONFIG_AFFS_FS is not set | |
| 1561 | +# CONFIG_HFS_FS is not set | |
| 1562 | +# CONFIG_HFSPLUS_FS is not set | |
| 1563 | +# CONFIG_BEFS_FS is not set | |
| 1564 | +# CONFIG_BFS_FS is not set | |
| 1565 | +# CONFIG_EFS_FS is not set | |
| 1566 | +CONFIG_JFFS2_FS=y | |
| 1567 | +CONFIG_JFFS2_FS_DEBUG=0 | |
| 1568 | +CONFIG_JFFS2_FS_WRITEBUFFER=y | |
| 1569 | +# CONFIG_JFFS2_FS_WBUF_VERIFY is not set | |
| 1570 | +# CONFIG_JFFS2_SUMMARY is not set | |
| 1571 | +# CONFIG_JFFS2_FS_XATTR is not set | |
| 1572 | +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | |
| 1573 | +CONFIG_JFFS2_ZLIB=y | |
| 1574 | +# CONFIG_JFFS2_LZO is not set | |
| 1575 | +CONFIG_JFFS2_RTIME=y | |
| 1576 | +# CONFIG_JFFS2_RUBIN is not set | |
| 1577 | +CONFIG_UBIFS_FS=y | |
| 1578 | +# CONFIG_UBIFS_FS_XATTR is not set | |
| 1579 | +# CONFIG_UBIFS_FS_ADVANCED_COMPR is not set | |
| 1580 | +CONFIG_UBIFS_FS_LZO=y | |
| 1581 | +CONFIG_UBIFS_FS_ZLIB=y | |
| 1582 | +# CONFIG_UBIFS_FS_DEBUG is not set | |
| 1583 | +CONFIG_CRAMFS=y | |
| 1584 | +# CONFIG_SQUASHFS is not set | |
| 1585 | +# CONFIG_VXFS_FS is not set | |
| 1586 | +# CONFIG_MINIX_FS is not set | |
| 1587 | +# CONFIG_OMFS_FS is not set | |
| 1588 | +# CONFIG_HPFS_FS is not set | |
| 1589 | +# CONFIG_QNX4FS_FS is not set | |
| 1590 | +# CONFIG_ROMFS_FS is not set | |
| 1591 | +# CONFIG_SYSV_FS is not set | |
| 1592 | +# CONFIG_UFS_FS is not set | |
| 1593 | +CONFIG_NETWORK_FILESYSTEMS=y | |
| 1594 | +CONFIG_NFS_FS=y | |
| 1595 | +CONFIG_NFS_V3=y | |
| 1596 | +# CONFIG_NFS_V3_ACL is not set | |
| 1597 | +CONFIG_NFS_V4=y | |
| 1598 | +# CONFIG_NFS_V4_1 is not set | |
| 1599 | +CONFIG_ROOT_NFS=y | |
| 1600 | +# CONFIG_NFSD is not set | |
| 1601 | +CONFIG_LOCKD=y | |
| 1602 | +CONFIG_LOCKD_V4=y | |
| 1603 | +CONFIG_NFS_COMMON=y | |
| 1604 | +CONFIG_SUNRPC=y | |
| 1605 | +CONFIG_SUNRPC_GSS=y | |
| 1606 | +CONFIG_RPCSEC_GSS_KRB5=y | |
| 1607 | +# CONFIG_RPCSEC_GSS_SPKM3 is not set | |
| 1608 | +# CONFIG_SMB_FS is not set | |
| 1609 | +# CONFIG_CIFS is not set | |
| 1610 | +# CONFIG_NCP_FS is not set | |
| 1611 | +# CONFIG_CODA_FS is not set | |
| 1612 | +# CONFIG_AFS_FS is not set | |
| 1613 | + | |
| 1614 | +# | |
| 1615 | +# Partition Types | |
| 1616 | +# | |
| 1617 | +CONFIG_PARTITION_ADVANCED=y | |
| 1618 | +# CONFIG_ACORN_PARTITION is not set | |
| 1619 | +# CONFIG_OSF_PARTITION is not set | |
| 1620 | +# CONFIG_AMIGA_PARTITION is not set | |
| 1621 | +# CONFIG_ATARI_PARTITION is not set | |
| 1622 | +# CONFIG_MAC_PARTITION is not set | |
| 1623 | +CONFIG_MSDOS_PARTITION=y | |
| 1624 | +# CONFIG_BSD_DISKLABEL is not set | |
| 1625 | +# CONFIG_MINIX_SUBPARTITION is not set | |
| 1626 | +# CONFIG_SOLARIS_X86_PARTITION is not set | |
| 1627 | +# CONFIG_UNIXWARE_DISKLABEL is not set | |
| 1628 | +# CONFIG_LDM_PARTITION is not set | |
| 1629 | +# CONFIG_SGI_PARTITION is not set | |
| 1630 | +# CONFIG_ULTRIX_PARTITION is not set | |
| 1631 | +# CONFIG_SUN_PARTITION is not set | |
| 1632 | +# CONFIG_KARMA_PARTITION is not set | |
| 1633 | +# CONFIG_EFI_PARTITION is not set | |
| 1634 | +# CONFIG_SYSV68_PARTITION is not set | |
| 1635 | +CONFIG_NLS=y | |
| 1636 | +CONFIG_NLS_DEFAULT="iso8859-1" | |
| 1637 | +CONFIG_NLS_CODEPAGE_437=y | |
| 1638 | +# CONFIG_NLS_CODEPAGE_737 is not set | |
| 1639 | +# CONFIG_NLS_CODEPAGE_775 is not set | |
| 1640 | +# CONFIG_NLS_CODEPAGE_850 is not set | |
| 1641 | +# CONFIG_NLS_CODEPAGE_852 is not set | |
| 1642 | +# CONFIG_NLS_CODEPAGE_855 is not set | |
| 1643 | +# CONFIG_NLS_CODEPAGE_857 is not set | |
| 1644 | +# CONFIG_NLS_CODEPAGE_860 is not set | |
| 1645 | +# CONFIG_NLS_CODEPAGE_861 is not set | |
| 1646 | +# CONFIG_NLS_CODEPAGE_862 is not set | |
| 1647 | +# CONFIG_NLS_CODEPAGE_863 is not set | |
| 1648 | +# CONFIG_NLS_CODEPAGE_864 is not set | |
| 1649 | +# CONFIG_NLS_CODEPAGE_865 is not set | |
| 1650 | +# CONFIG_NLS_CODEPAGE_866 is not set | |
| 1651 | +# CONFIG_NLS_CODEPAGE_869 is not set | |
| 1652 | +# CONFIG_NLS_CODEPAGE_936 is not set | |
| 1653 | +# CONFIG_NLS_CODEPAGE_950 is not set | |
| 1654 | +# CONFIG_NLS_CODEPAGE_932 is not set | |
| 1655 | +# CONFIG_NLS_CODEPAGE_949 is not set | |
| 1656 | +# CONFIG_NLS_CODEPAGE_874 is not set | |
| 1657 | +# CONFIG_NLS_ISO8859_8 is not set | |
| 1658 | +# CONFIG_NLS_CODEPAGE_1250 is not set | |
| 1659 | +# CONFIG_NLS_CODEPAGE_1251 is not set | |
| 1660 | +# CONFIG_NLS_ASCII is not set | |
| 1661 | +CONFIG_NLS_ISO8859_1=y | |
| 1662 | +# CONFIG_NLS_ISO8859_2 is not set | |
| 1663 | +# CONFIG_NLS_ISO8859_3 is not set | |
| 1664 | +# CONFIG_NLS_ISO8859_4 is not set | |
| 1665 | +# CONFIG_NLS_ISO8859_5 is not set | |
| 1666 | +# CONFIG_NLS_ISO8859_6 is not set | |
| 1667 | +# CONFIG_NLS_ISO8859_7 is not set | |
| 1668 | +# CONFIG_NLS_ISO8859_9 is not set | |
| 1669 | +# CONFIG_NLS_ISO8859_13 is not set | |
| 1670 | +# CONFIG_NLS_ISO8859_14 is not set | |
| 1671 | +# CONFIG_NLS_ISO8859_15 is not set | |
| 1672 | +# CONFIG_NLS_KOI8_R is not set | |
| 1673 | +# CONFIG_NLS_KOI8_U is not set | |
| 1674 | +# CONFIG_NLS_UTF8 is not set | |
| 1675 | +# CONFIG_DLM is not set | |
| 1676 | + | |
| 1677 | +# | |
| 1678 | +# Kernel hacking | |
| 1679 | +# | |
| 1680 | +CONFIG_PRINTK_TIME=y | |
| 1681 | +CONFIG_ENABLE_WARN_DEPRECATED=y | |
| 1682 | +CONFIG_ENABLE_MUST_CHECK=y | |
| 1683 | +CONFIG_FRAME_WARN=1024 | |
| 1684 | +CONFIG_MAGIC_SYSRQ=y | |
| 1685 | +# CONFIG_STRIP_ASM_SYMS is not set | |
| 1686 | +# CONFIG_UNUSED_SYMBOLS is not set | |
| 1687 | +# CONFIG_DEBUG_FS is not set | |
| 1688 | +# CONFIG_HEADERS_CHECK is not set | |
| 1689 | +CONFIG_DEBUG_KERNEL=y | |
| 1690 | +# CONFIG_DEBUG_SHIRQ is not set | |
| 1691 | +CONFIG_DETECT_SOFTLOCKUP=y | |
| 1692 | +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | |
| 1693 | +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | |
| 1694 | +CONFIG_DETECT_HUNG_TASK=y | |
| 1695 | +CONFIG_BOOTPARAM_HUNG_TASK_PANIC=y | |
| 1696 | +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=1 | |
| 1697 | +CONFIG_SCHED_DEBUG=y | |
| 1698 | +# CONFIG_SCHEDSTATS is not set | |
| 1699 | +# CONFIG_TIMER_STATS is not set | |
| 1700 | +# CONFIG_DEBUG_OBJECTS is not set | |
| 1701 | +# CONFIG_DEBUG_SLAB is not set | |
| 1702 | +# CONFIG_DEBUG_KMEMLEAK is not set | |
| 1703 | +# CONFIG_DEBUG_RT_MUTEXES is not set | |
| 1704 | +# CONFIG_RT_MUTEX_TESTER is not set | |
| 1705 | +# CONFIG_DEBUG_SPINLOCK is not set | |
| 1706 | +CONFIG_DEBUG_MUTEXES=y | |
| 1707 | +# CONFIG_DEBUG_LOCK_ALLOC is not set | |
| 1708 | +# CONFIG_PROVE_LOCKING is not set | |
| 1709 | +# CONFIG_LOCK_STAT is not set | |
| 1710 | +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set | |
| 1711 | +# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | |
| 1712 | +# CONFIG_DEBUG_KOBJECT is not set | |
| 1713 | +# CONFIG_DEBUG_BUGVERBOSE is not set | |
| 1714 | +# CONFIG_DEBUG_INFO is not set | |
| 1715 | +# CONFIG_DEBUG_VM is not set | |
| 1716 | +# CONFIG_DEBUG_WRITECOUNT is not set | |
| 1717 | +# CONFIG_DEBUG_MEMORY_INIT is not set | |
| 1718 | +# CONFIG_DEBUG_LIST is not set | |
| 1719 | +# CONFIG_DEBUG_SG is not set | |
| 1720 | +# CONFIG_DEBUG_NOTIFIERS is not set | |
| 1721 | +# CONFIG_DEBUG_CREDENTIALS is not set | |
| 1722 | +# CONFIG_BOOT_PRINTK_DELAY is not set | |
| 1723 | +# CONFIG_RCU_TORTURE_TEST is not set | |
| 1724 | +# CONFIG_RCU_CPU_STALL_DETECTOR is not set | |
| 1725 | +# CONFIG_BACKTRACE_SELF_TEST is not set | |
| 1726 | +# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | |
| 1727 | +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | |
| 1728 | +# CONFIG_FAULT_INJECTION is not set | |
| 1729 | +# CONFIG_LATENCYTOP is not set | |
| 1730 | +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | |
| 1731 | +# CONFIG_PAGE_POISONING is not set | |
| 1732 | +CONFIG_HAVE_FUNCTION_TRACER=y | |
| 1733 | +CONFIG_TRACING_SUPPORT=y | |
| 1734 | +CONFIG_FTRACE=y | |
| 1735 | +# CONFIG_FUNCTION_TRACER is not set | |
| 1736 | +# CONFIG_IRQSOFF_TRACER is not set | |
| 1737 | +# CONFIG_SCHED_TRACER is not set | |
| 1738 | +# CONFIG_ENABLE_DEFAULT_TRACERS is not set | |
| 1739 | +# CONFIG_BOOT_TRACER is not set | |
| 1740 | +CONFIG_BRANCH_PROFILE_NONE=y | |
| 1741 | +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | |
| 1742 | +# CONFIG_PROFILE_ALL_BRANCHES is not set | |
| 1743 | +# CONFIG_STACK_TRACER is not set | |
| 1744 | +# CONFIG_KMEMTRACE is not set | |
| 1745 | +# CONFIG_WORKQUEUE_TRACER is not set | |
| 1746 | +# CONFIG_BLK_DEV_IO_TRACE is not set | |
| 1747 | +# CONFIG_SAMPLES is not set | |
| 1748 | +CONFIG_HAVE_ARCH_KGDB=y | |
| 1749 | +# CONFIG_KGDB is not set | |
| 1750 | +CONFIG_ARM_UNWIND=y | |
| 1751 | +CONFIG_DEBUG_USER=y | |
| 1752 | +CONFIG_DEBUG_ERRORS=y | |
| 1753 | +# CONFIG_DEBUG_STACK_USAGE is not set | |
| 1754 | +# CONFIG_DEBUG_LL is not set | |
| 1755 | +# CONFIG_OC_ETM is not set | |
| 1756 | + | |
| 1757 | +# | |
| 1758 | +# Security options | |
| 1759 | +# | |
| 1760 | +# CONFIG_KEYS is not set | |
| 1761 | +# CONFIG_SECURITY is not set | |
| 1762 | +# CONFIG_SECURITYFS is not set | |
| 1763 | +# CONFIG_DEFAULT_SECURITY_SELINUX is not set | |
| 1764 | +# CONFIG_DEFAULT_SECURITY_SMACK is not set | |
| 1765 | +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set | |
| 1766 | +CONFIG_DEFAULT_SECURITY_DAC=y | |
| 1767 | +CONFIG_DEFAULT_SECURITY="" | |
| 1768 | +CONFIG_CRYPTO=y | |
| 1769 | + | |
| 1770 | +# | |
| 1771 | +# Crypto core or helper | |
| 1772 | +# | |
| 1773 | +CONFIG_CRYPTO_ALGAPI=y | |
| 1774 | +CONFIG_CRYPTO_ALGAPI2=y | |
| 1775 | +CONFIG_CRYPTO_AEAD2=y | |
| 1776 | +CONFIG_CRYPTO_BLKCIPHER=y | |
| 1777 | +CONFIG_CRYPTO_BLKCIPHER2=y | |
| 1778 | +CONFIG_CRYPTO_HASH=y | |
| 1779 | +CONFIG_CRYPTO_HASH2=y | |
| 1780 | +CONFIG_CRYPTO_RNG2=y | |
| 1781 | +CONFIG_CRYPTO_PCOMP=y | |
| 1782 | +CONFIG_CRYPTO_MANAGER=y | |
| 1783 | +CONFIG_CRYPTO_MANAGER2=y | |
| 1784 | +# CONFIG_CRYPTO_GF128MUL is not set | |
| 1785 | +# CONFIG_CRYPTO_NULL is not set | |
| 1786 | +CONFIG_CRYPTO_WORKQUEUE=y | |
| 1787 | +# CONFIG_CRYPTO_CRYPTD is not set | |
| 1788 | +# CONFIG_CRYPTO_AUTHENC is not set | |
| 1789 | +# CONFIG_CRYPTO_TEST is not set | |
| 1790 | + | |
| 1791 | +# | |
| 1792 | +# Authenticated Encryption with Associated Data | |
| 1793 | +# | |
| 1794 | +# CONFIG_CRYPTO_CCM is not set | |
| 1795 | +# CONFIG_CRYPTO_GCM is not set | |
| 1796 | +# CONFIG_CRYPTO_SEQIV is not set | |
| 1797 | + | |
| 1798 | +# | |
| 1799 | +# Block modes | |
| 1800 | +# | |
| 1801 | +CONFIG_CRYPTO_CBC=y | |
| 1802 | +# CONFIG_CRYPTO_CTR is not set | |
| 1803 | +# CONFIG_CRYPTO_CTS is not set | |
| 1804 | +CONFIG_CRYPTO_ECB=m | |
| 1805 | +# CONFIG_CRYPTO_LRW is not set | |
| 1806 | +CONFIG_CRYPTO_PCBC=m | |
| 1807 | +# CONFIG_CRYPTO_XTS is not set | |
| 1808 | + | |
| 1809 | +# | |
| 1810 | +# Hash modes | |
| 1811 | +# | |
| 1812 | +# CONFIG_CRYPTO_HMAC is not set | |
| 1813 | +# CONFIG_CRYPTO_XCBC is not set | |
| 1814 | +# CONFIG_CRYPTO_VMAC is not set | |
| 1815 | + | |
| 1816 | +# | |
| 1817 | +# Digest | |
| 1818 | +# | |
| 1819 | +CONFIG_CRYPTO_CRC32C=y | |
| 1820 | +# CONFIG_CRYPTO_GHASH is not set | |
| 1821 | +# CONFIG_CRYPTO_MD4 is not set | |
| 1822 | +CONFIG_CRYPTO_MD5=y | |
| 1823 | +# CONFIG_CRYPTO_MICHAEL_MIC is not set | |
| 1824 | +# CONFIG_CRYPTO_RMD128 is not set | |
| 1825 | +# CONFIG_CRYPTO_RMD160 is not set | |
| 1826 | +# CONFIG_CRYPTO_RMD256 is not set | |
| 1827 | +# CONFIG_CRYPTO_RMD320 is not set | |
| 1828 | +# CONFIG_CRYPTO_SHA1 is not set | |
| 1829 | +# CONFIG_CRYPTO_SHA256 is not set | |
| 1830 | +# CONFIG_CRYPTO_SHA512 is not set | |
| 1831 | +# CONFIG_CRYPTO_TGR192 is not set | |
| 1832 | +# CONFIG_CRYPTO_WP512 is not set | |
| 1833 | + | |
| 1834 | +# | |
| 1835 | +# Ciphers | |
| 1836 | +# | |
| 1837 | +# CONFIG_CRYPTO_AES is not set | |
| 1838 | +# CONFIG_CRYPTO_ANUBIS is not set | |
| 1839 | +# CONFIG_CRYPTO_ARC4 is not set | |
| 1840 | +# CONFIG_CRYPTO_BLOWFISH is not set | |
| 1841 | +# CONFIG_CRYPTO_CAMELLIA is not set | |
| 1842 | +# CONFIG_CRYPTO_CAST5 is not set | |
| 1843 | +# CONFIG_CRYPTO_CAST6 is not set | |
| 1844 | +CONFIG_CRYPTO_DES=y | |
| 1845 | +# CONFIG_CRYPTO_FCRYPT is not set | |
| 1846 | +# CONFIG_CRYPTO_KHAZAD is not set | |
| 1847 | +# CONFIG_CRYPTO_SALSA20 is not set | |
| 1848 | +# CONFIG_CRYPTO_SEED is not set | |
| 1849 | +# CONFIG_CRYPTO_SERPENT is not set | |
| 1850 | +# CONFIG_CRYPTO_TEA is not set | |
| 1851 | +# CONFIG_CRYPTO_TWOFISH is not set | |
| 1852 | + | |
| 1853 | +# | |
| 1854 | +# Compression | |
| 1855 | +# | |
| 1856 | +CONFIG_CRYPTO_DEFLATE=y | |
| 1857 | +# CONFIG_CRYPTO_ZLIB is not set | |
| 1858 | +CONFIG_CRYPTO_LZO=y | |
| 1859 | + | |
| 1860 | +# | |
| 1861 | +# Random Number Generation | |
| 1862 | +# | |
| 1863 | +# CONFIG_CRYPTO_ANSI_CPRNG is not set | |
| 1864 | +CONFIG_CRYPTO_HW=y | |
| 1865 | +# CONFIG_BINARY_PRINTF is not set | |
| 1866 | + | |
| 1867 | +# | |
| 1868 | +# Library routines | |
| 1869 | +# | |
| 1870 | +CONFIG_BITREVERSE=y | |
| 1871 | +CONFIG_GENERIC_FIND_LAST_BIT=y | |
| 1872 | +CONFIG_CRC_CCITT=y | |
| 1873 | +CONFIG_CRC16=y | |
| 1874 | +CONFIG_CRC_T10DIF=m | |
| 1875 | +CONFIG_CRC_ITU_T=m | |
| 1876 | +CONFIG_CRC32=y | |
| 1877 | +CONFIG_CRC7=m | |
| 1878 | +CONFIG_LIBCRC32C=y | |
| 1879 | +CONFIG_ZLIB_INFLATE=y | |
| 1880 | +CONFIG_ZLIB_DEFLATE=y | |
| 1881 | +CONFIG_LZO_COMPRESS=y | |
| 1882 | +CONFIG_LZO_DECOMPRESS=y | |
| 1883 | +CONFIG_DECOMPRESS_GZIP=y | |
| 1884 | +CONFIG_DECOMPRESS_BZIP2=y | |
| 1885 | +CONFIG_DECOMPRESS_LZMA=y | |
| 1886 | +CONFIG_HAS_IOMEM=y | |
| 1887 | +CONFIG_HAS_IOPORT=y | |
| 1888 | +CONFIG_HAS_DMA=y | |
| 1889 | +CONFIG_NLATTR=y | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # |
| 2 | 2 | # Automatically generated make config: don't edit |
| 3 | −# Linux kernel version: 2.6.32-rc6 | |
| 4 | −# Fri Nov 13 12:01:17 2009 | |
| 3 | +# Linux kernel version: 2.6.33-rc3 | |
| 4 | +# Thu Jan 7 16:14:55 2010 | |
| 5 | 5 | # |
| 6 | 6 | CONFIG_ARM=y |
| 7 | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -46,6 +46,7 @@ CONFIG_BSD_PROCESS_ACCT=y · 38 unmodified lines | ||
| 46 | 46 | # |
| 47 | 47 | CONFIG_TREE_RCU=y |
| 48 | 48 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 49 | +# CONFIG_TINY_RCU is not set | |
| 49 | 50 | # CONFIG_RCU_TRACE is not set |
| 50 | 51 | CONFIG_RCU_FANOUT=32 |
| 51 | 52 | # CONFIG_RCU_FANOUT_EXACT is not set |
| @@ -126,14 +127,41 @@ CONFIG_LBDAF=y · 74 unmodified lines | ||
| 126 | 127 | # IO Schedulers |
| 127 | 128 | # |
| 128 | 129 | CONFIG_IOSCHED_NOOP=y |
| 129 | −CONFIG_IOSCHED_AS=y | |
| 130 | 130 | CONFIG_IOSCHED_DEADLINE=y |
| 131 | 131 | CONFIG_IOSCHED_CFQ=y |
| 132 | −CONFIG_DEFAULT_AS=y | |
| 133 | 132 | # CONFIG_DEFAULT_DEADLINE is not set |
| 134 | −# CONFIG_DEFAULT_CFQ is not set | |
| 133 | +CONFIG_DEFAULT_CFQ=y | |
| 135 | 134 | # CONFIG_DEFAULT_NOOP is not set |
| 136 | −CONFIG_DEFAULT_IOSCHED="anticipatory" | |
| 135 | +CONFIG_DEFAULT_IOSCHED="cfq" | |
| 136 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | |
| 137 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | |
| 138 | +# CONFIG_INLINE_SPIN_LOCK is not set | |
| 139 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | |
| 140 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | |
| 141 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | |
| 142 | +CONFIG_INLINE_SPIN_UNLOCK=y | |
| 143 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | |
| 144 | +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | |
| 145 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | |
| 146 | +# CONFIG_INLINE_READ_TRYLOCK is not set | |
| 147 | +# CONFIG_INLINE_READ_LOCK is not set | |
| 148 | +# CONFIG_INLINE_READ_LOCK_BH is not set | |
| 149 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | |
| 150 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | |
| 151 | +CONFIG_INLINE_READ_UNLOCK=y | |
| 152 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | |
| 153 | +CONFIG_INLINE_READ_UNLOCK_IRQ=y | |
| 154 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | |
| 155 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | |
| 156 | +# CONFIG_INLINE_WRITE_LOCK is not set | |
| 157 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | |
| 158 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | |
| 159 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | |
| 160 | +CONFIG_INLINE_WRITE_UNLOCK=y | |
| 161 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | |
| 162 | +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | |
| 163 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | |
| 164 | +# CONFIG_MUTEX_SPIN_ON_OWNER is not set | |
| 137 | 165 | # CONFIG_FREEZER is not set |
| 138 | 166 | |
| 139 | 167 | # |
| @@ -162,6 +190,7 @@ CONFIG_MMU=y · 22 unmodified lines | ||
| 162 | 190 | # CONFIG_ARCH_IXP2000 is not set |
| 163 | 191 | # CONFIG_ARCH_IXP4XX is not set |
| 164 | 192 | # CONFIG_ARCH_L7200 is not set |
| 193 | +# CONFIG_ARCH_DOVE is not set | |
| 165 | 194 | # CONFIG_ARCH_KIRKWOOD is not set |
| 166 | 195 | # CONFIG_ARCH_LOKI is not set |
| 167 | 196 | # CONFIG_ARCH_MV78XX0 is not set |
| @@ -184,6 +213,7 @@ CONFIG_MMU=y · 16 unmodified lines | ||
| 184 | 213 | # CONFIG_ARCH_DAVINCI is not set |
| 185 | 214 | CONFIG_ARCH_OMAP=y |
| 186 | 215 | # CONFIG_ARCH_BCMRING is not set |
| 216 | +# CONFIG_ARCH_U8500 is not set | |
| 187 | 217 | |
| 188 | 218 | # |
| 189 | 219 | # TI OMAP Implementations |
| @@ -197,12 +227,8 @@ CONFIG_ARCH_OMAP3=y · 7 unmodified lines | ||
| 197 | 227 | # |
| 198 | 228 | # OMAP Feature Selections |
| 199 | 229 | # |
| 200 | −# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | |
| 201 | −# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | |
| 202 | −# CONFIG_OMAP_RESET_CLOCKS is not set | |
| 203 | −CONFIG_OMAP_MUX=y | |
| 204 | −CONFIG_OMAP_MUX_DEBUG=y | |
| 205 | −CONFIG_OMAP_MUX_WARNINGS=y | |
| 230 | +CONFIG_OMAP_RESET_CLOCKS=y | |
| 231 | +# CONFIG_OMAP_MUX is not set | |
| 206 | 232 | CONFIG_OMAP_MCBSP=y |
| 207 | 233 | # CONFIG_OMAP_MBOX_FWK is not set |
| 208 | 234 | # CONFIG_OMAP_MPU_TIMER is not set |
| @@ -217,6 +243,7 @@ CONFIG_OMAP_LL_DEBUG_UART3=y · 8 unmodified lines | ||
| 217 | 243 | CONFIG_OMAP_PM_NOOP=y |
| 218 | 244 | CONFIG_ARCH_OMAP34XX=y |
| 219 | 245 | CONFIG_ARCH_OMAP3430=y |
| 246 | +CONFIG_OMAP_PACKAGE_CBB=y | |
| 220 | 247 | |
| 221 | 248 | # |
| 222 | 249 | # OMAP Board Type |
| @@ -227,13 +254,16 @@ CONFIG_ARCH_OMAP3430=y · 4 unmodified lines | ||
| 227 | 254 | # CONFIG_MACH_OMAP3EVM is not set |
| 228 | 255 | # CONFIG_MACH_OMAP3517EVM is not set |
| 229 | 256 | # CONFIG_MACH_OMAP3_PANDORA is not set |
| 257 | +# CONFIG_MACH_OMAP3_TOUCHBOOK is not set | |
| 230 | 258 | # CONFIG_MACH_OMAP_3430SDP is not set |
| 231 | 259 | # CONFIG_MACH_NOKIA_RX51 is not set |
| 232 | 260 | # CONFIG_MACH_OMAP_ZOOM2 is not set |
| 233 | −# CONFIG_MACH_CM_T35 is not set | |
| 234 | 261 | # CONFIG_MACH_OMAP_ZOOM3 is not set |
| 235 | −# CONFIG_MACH_OMAP_3630SDP is not set | |
| 262 | +# CONFIG_MACH_CM_T35 is not set | |
| 236 | 263 | CONFIG_MACH_IGEP0020=y |
| 264 | +# CONFIG_MACH_OMAP_3630SDP is not set | |
| 265 | +# CONFIG_OMAP3_EMU is not set | |
| 266 | +# CONFIG_OMAP3_SDRC_AC_TIMING is not set | |
| 237 | 267 | |
| 238 | 268 | # |
| 239 | 269 | # Processor Type |
| @@ -305,8 +335,6 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 · 65 unmodified lines | ||
| 305 | 335 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 306 | 336 | CONFIG_ZONE_DMA_FLAG=0 |
| 307 | 337 | CONFIG_VIRT_TO_BUS=y |
| 308 | −CONFIG_HAVE_MLOCK=y | |
| 309 | −CONFIG_HAVE_MLOCKED_PAGE_BIT=y | |
| 310 | 338 | # CONFIG_KSM is not set |
| 311 | 339 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 312 | 340 | # CONFIG_LEDS is not set |
| @@ -440,35 +468,35 @@ CONFIG_BT_HIDP=m · 127 unmodified lines | ||
| 440 | 468 | # |
| 441 | 469 | # Bluetooth device drivers |
| 442 | 470 | # |
| 443 | −CONFIG_BT_HCIBTUSB=m | |
| 471 | +# CONFIG_BT_HCIBTUSB is not set | |
| 444 | 472 | # CONFIG_BT_HCIBTSDIO is not set |
| 445 | 473 | CONFIG_BT_HCIUART=m |
| 446 | 474 | CONFIG_BT_HCIUART_H4=y |
| 447 | 475 | CONFIG_BT_HCIUART_BCSP=y |
| 448 | 476 | CONFIG_BT_HCIUART_LL=y |
| 449 | −CONFIG_BT_HCIBCM203X=m | |
| 450 | −CONFIG_BT_HCIBPA10X=m | |
| 451 | −CONFIG_BT_HCIBFUSB=m | |
| 477 | +# CONFIG_BT_HCIBCM203X is not set | |
| 478 | +# CONFIG_BT_HCIBPA10X is not set | |
| 479 | +# CONFIG_BT_HCIBFUSB is not set | |
| 452 | 480 | CONFIG_BT_HCIVHCI=m |
| 453 | 481 | CONFIG_BT_MRVL=m |
| 454 | 482 | CONFIG_BT_MRVL_SDIO=m |
| 455 | 483 | # CONFIG_AF_RXRPC is not set |
| 456 | 484 | CONFIG_WIRELESS=y |
| 457 | −CONFIG_CFG80211=m | |
| 485 | +CONFIG_WIRELESS_EXT=y | |
| 486 | +CONFIG_WEXT_CORE=y | |
| 487 | +CONFIG_WEXT_PROC=y | |
| 488 | +CONFIG_WEXT_SPY=y | |
| 489 | +CONFIG_CFG80211=y | |
| 458 | 490 | # CONFIG_NL80211_TESTMODE is not set |
| 459 | 491 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set |
| 460 | 492 | # CONFIG_CFG80211_REG_DEBUG is not set |
| 461 | 493 | CONFIG_CFG80211_DEFAULT_PS=y |
| 462 | −CONFIG_CFG80211_DEFAULT_PS_VALUE=1 | |
| 463 | 494 | # CONFIG_WIRELESS_OLD_REGULATORY is not set |
| 464 | −CONFIG_WIRELESS_EXT=y | |
| 495 | +CONFIG_CFG80211_WEXT=y | |
| 465 | 496 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 466 | −CONFIG_LIB80211=m | |
| 467 | −CONFIG_LIB80211_CRYPT_WEP=m | |
| 468 | −CONFIG_LIB80211_CRYPT_CCMP=m | |
| 469 | −CONFIG_LIB80211_CRYPT_TKIP=m | |
| 497 | +CONFIG_LIB80211=y | |
| 470 | 498 | # CONFIG_LIB80211_DEBUG is not set |
| 471 | −CONFIG_MAC80211=m | |
| 499 | +CONFIG_MAC80211=y | |
| 472 | 500 | # CONFIG_MAC80211_RC_PID is not set |
| 473 | 501 | CONFIG_MAC80211_RC_MINSTREL=y |
| 474 | 502 | # CONFIG_MAC80211_RC_DEFAULT_PID is not set |
| @@ -500,12 +528,95 @@ CONFIG_EXTRA_FIRMWARE="" · 25 unmodified lines | ||
| 500 | 528 | # CONFIG_SYS_HYPERVISOR is not set |
| 501 | 529 | CONFIG_CONNECTOR=y |
| 502 | 530 | CONFIG_PROC_EVENTS=y |
| 503 | −# CONFIG_MTD is not set | |
| 531 | +CONFIG_MTD=y | |
| 532 | +# CONFIG_MTD_DEBUG is not set | |
| 533 | +# CONFIG_MTD_TESTS is not set | |
| 534 | +# CONFIG_MTD_CONCAT is not set | |
| 535 | +CONFIG_MTD_PARTITIONS=y | |
| 536 | +# CONFIG_MTD_REDBOOT_PARTS is not set | |
| 537 | +CONFIG_MTD_CMDLINE_PARTS=y | |
| 538 | +# CONFIG_MTD_AFS_PARTS is not set | |
| 539 | +# CONFIG_MTD_AR7_PARTS is not set | |
| 540 | + | |
| 541 | +# | |
| 542 | +# User Modules And Translation Layers | |
| 543 | +# | |
| 544 | +CONFIG_MTD_CHAR=y | |
| 545 | +CONFIG_MTD_BLKDEVS=y | |
| 546 | +CONFIG_MTD_BLOCK=y | |
| 547 | +# CONFIG_FTL is not set | |
| 548 | +# CONFIG_NFTL is not set | |
| 549 | +# CONFIG_INFTL is not set | |
| 550 | +# CONFIG_RFD_FTL is not set | |
| 551 | +# CONFIG_SSFDC is not set | |
| 552 | +# CONFIG_MTD_OOPS is not set | |
| 553 | + | |
| 554 | +# | |
| 555 | +# RAM/ROM/Flash chip drivers | |
| 556 | +# | |
| 557 | +# CONFIG_MTD_CFI is not set | |
| 558 | +# CONFIG_MTD_JEDECPROBE is not set | |
| 559 | +CONFIG_MTD_MAP_BANK_WIDTH_1=y | |
| 560 | +CONFIG_MTD_MAP_BANK_WIDTH_2=y | |
| 561 | +CONFIG_MTD_MAP_BANK_WIDTH_4=y | |
| 562 | +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | |
| 563 | +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | |
| 564 | +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | |
| 565 | +CONFIG_MTD_CFI_I1=y | |
| 566 | +CONFIG_MTD_CFI_I2=y | |
| 567 | +# CONFIG_MTD_CFI_I4 is not set | |
| 568 | +# CONFIG_MTD_CFI_I8 is not set | |
| 569 | +# CONFIG_MTD_RAM is not set | |
| 570 | +# CONFIG_MTD_ROM is not set | |
| 571 | +# CONFIG_MTD_ABSENT is not set | |
| 572 | + | |
| 573 | +# | |
| 574 | +# Mapping drivers for chip access | |
| 575 | +# | |
| 576 | +# CONFIG_MTD_COMPLEX_MAPPINGS is not set | |
| 577 | +# CONFIG_MTD_PLATRAM is not set | |
| 578 | + | |
| 579 | +# | |
| 580 | +# Self-contained MTD device drivers | |
| 581 | +# | |
| 582 | +# CONFIG_MTD_DATAFLASH is not set | |
| 583 | +# CONFIG_MTD_M25P80 is not set | |
| 584 | +# CONFIG_MTD_SST25L is not set | |
| 585 | +# CONFIG_MTD_SLRAM is not set | |
| 586 | +# CONFIG_MTD_PHRAM is not set | |
| 587 | +# CONFIG_MTD_MTDRAM is not set | |
| 588 | +# CONFIG_MTD_BLOCK2MTD is not set | |
| 589 | + | |
| 590 | +# | |
| 591 | +# Disk-On-Chip Device Drivers | |
| 592 | +# | |
| 593 | +# CONFIG_MTD_DOC2000 is not set | |
| 594 | +# CONFIG_MTD_DOC2001 is not set | |
| 595 | +# CONFIG_MTD_DOC2001PLUS is not set | |
| 596 | +# CONFIG_MTD_NAND is not set | |
| 597 | +CONFIG_MTD_ONENAND=y | |
| 598 | +# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set | |
| 599 | +# CONFIG_MTD_ONENAND_GENERIC is not set | |
| 600 | +CONFIG_MTD_ONENAND_OMAP2=y | |
| 601 | +# CONFIG_MTD_ONENAND_OTP is not set | |
| 602 | +CONFIG_MTD_ONENAND_2X_PROGRAM=y | |
| 603 | +# CONFIG_MTD_ONENAND_SIM is not set | |
| 604 | + | |
| 605 | +# | |
| 606 | +# LPDDR flash memory drivers | |
| 607 | +# | |
| 608 | +# CONFIG_MTD_LPDDR is not set | |
| 609 | + | |
| 610 | +# | |
| 611 | +# UBI - Unsorted block images | |
| 612 | +# | |
| 613 | +# CONFIG_MTD_UBI is not set | |
| 504 | 614 | # CONFIG_PARPORT is not set |
| 505 | 615 | CONFIG_BLK_DEV=y |
| 506 | 616 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 507 | 617 | CONFIG_BLK_DEV_LOOP=y |
| 508 | 618 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 619 | +# CONFIG_BLK_DEV_DRBD is not set | |
| 509 | 620 | # CONFIG_BLK_DEV_NBD is not set |
| 510 | 621 | # CONFIG_BLK_DEV_UB is not set |
| 511 | 622 | CONFIG_BLK_DEV_RAM=y |
| @@ -516,7 +627,6 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 · 4 unmodified lines | ||
| 516 | 627 | # CONFIG_ATA_OVER_ETH is not set |
| 517 | 628 | # CONFIG_MG_DISK is not set |
| 518 | 629 | # CONFIG_MISC_DEVICES is not set |
| 519 | −CONFIG_EEPROM_93CX6=m | |
| 520 | 630 | CONFIG_HAVE_IDE=y |
| 521 | 631 | # CONFIG_IDE is not set |
| 522 | 632 | |
| @@ -613,56 +723,26 @@ CONFIG_SMSC911X=y · 90 unmodified lines | ||
| 613 | 723 | # CONFIG_NETDEV_1000 is not set |
| 614 | 724 | # CONFIG_NETDEV_10000 is not set |
| 615 | 725 | CONFIG_WLAN=y |
| 616 | −# CONFIG_WLAN_PRE80211 is not set | |
| 617 | −CONFIG_WLAN_80211=y | |
| 618 | −CONFIG_LIBERTAS=m | |
| 619 | −CONFIG_LIBERTAS_USB=m | |
| 620 | −CONFIG_LIBERTAS_SDIO=m | |
| 621 | −# CONFIG_LIBERTAS_SPI is not set | |
| 622 | −# CONFIG_LIBERTAS_DEBUG is not set | |
| 623 | 726 | # CONFIG_LIBERTAS_THINFIRM is not set |
| 624 | −CONFIG_AT76C50X_USB=m | |
| 625 | −CONFIG_USB_ZD1201=m | |
| 626 | −CONFIG_USB_NET_RNDIS_WLAN=m | |
| 627 | −CONFIG_RTL8187=m | |
| 727 | +# CONFIG_AT76C50X_USB is not set | |
| 728 | +# CONFIG_USB_ZD1201 is not set | |
| 729 | +# CONFIG_USB_NET_RNDIS_WLAN is not set | |
| 730 | +# CONFIG_RTL8187 is not set | |
| 628 | 731 | # CONFIG_MAC80211_HWSIM is not set |
| 629 | −CONFIG_P54_COMMON=m | |
| 630 | −CONFIG_P54_USB=m | |
| 631 | −CONFIG_P54_SPI=m | |
| 632 | −CONFIG_ATH_COMMON=m | |
| 633 | −CONFIG_AR9170_USB=m | |
| 634 | −CONFIG_HOSTAP=m | |
| 635 | −CONFIG_HOSTAP_FIRMWARE=y | |
| 636 | −CONFIG_HOSTAP_FIRMWARE_NVRAM=y | |
| 637 | −CONFIG_B43=m | |
| 638 | −# CONFIG_B43_SDIO is not set | |
| 639 | −# CONFIG_B43_PHY_LP is not set | |
| 640 | −CONFIG_B43_HWRNG=y | |
| 641 | −# CONFIG_B43_DEBUG is not set | |
| 642 | −CONFIG_B43LEGACY=m | |
| 643 | −CONFIG_B43LEGACY_HWRNG=y | |
| 644 | −# CONFIG_B43LEGACY_DEBUG is not set | |
| 645 | −CONFIG_B43LEGACY_DMA=y | |
| 646 | −CONFIG_B43LEGACY_PIO=y | |
| 647 | −CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y | |
| 648 | −# CONFIG_B43LEGACY_DMA_MODE is not set | |
| 649 | −# CONFIG_B43LEGACY_PIO_MODE is not set | |
| 650 | −CONFIG_ZD1211RW=m | |
| 651 | −# CONFIG_ZD1211RW_DEBUG is not set | |
| 652 | −CONFIG_RT2X00=m | |
| 653 | −CONFIG_RT2500USB=m | |
| 654 | −CONFIG_RT73USB=m | |
| 655 | −CONFIG_RT2800USB=m | |
| 656 | −CONFIG_RT2X00_LIB_USB=m | |
| 657 | −CONFIG_RT2X00_LIB=m | |
| 658 | −CONFIG_RT2X00_LIB_HT=y | |
| 659 | −CONFIG_RT2X00_LIB_FIRMWARE=y | |
| 660 | −CONFIG_RT2X00_LIB_CRYPTO=y | |
| 661 | −# CONFIG_RT2X00_DEBUG is not set | |
| 662 | −CONFIG_WL12XX=m | |
| 663 | −# CONFIG_WL1251 is not set | |
| 664 | −# CONFIG_WL1271 is not set | |
| 732 | +# CONFIG_ATH_COMMON is not set | |
| 733 | +# CONFIG_B43 is not set | |
| 734 | +# CONFIG_B43LEGACY is not set | |
| 735 | +# CONFIG_HOSTAP is not set | |
| 665 | 736 | # CONFIG_IWM is not set |
| 737 | +CONFIG_LIBERTAS=y | |
| 738 | +# CONFIG_LIBERTAS_USB is not set | |
| 739 | +CONFIG_LIBERTAS_SDIO=y | |
| 740 | +# CONFIG_LIBERTAS_SPI is not set | |
| 741 | +# CONFIG_LIBERTAS_DEBUG is not set | |
| 742 | +# CONFIG_P54_COMMON is not set | |
| 743 | +# CONFIG_RT2X00 is not set | |
| 744 | +# CONFIG_WL12XX is not set | |
| 745 | +# CONFIG_ZD1211RW is not set | |
| 666 | 746 | |
| 667 | 747 | # |
| 668 | 748 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| @@ -672,29 +752,10 @@ CONFIG_WL12XX=m · 3 unmodified lines | ||
| 672 | 752 | # USB Network Adapters |
| 673 | 753 | # |
| 674 | 754 | # CONFIG_USB_CATC is not set |
| 675 | −CONFIG_USB_KAWETH=m | |
| 676 | −CONFIG_USB_PEGASUS=m | |
| 755 | +# CONFIG_USB_KAWETH is not set | |
| 756 | +# CONFIG_USB_PEGASUS is not set | |
| 677 | 757 | # CONFIG_USB_RTL8150 is not set |
| 678 | −CONFIG_USB_USBNET=m | |
| 679 | −CONFIG_USB_NET_AX8817X=m | |
| 680 | −CONFIG_USB_NET_CDCETHER=m | |
| 681 | −CONFIG_USB_NET_CDC_EEM=m | |
| 682 | −CONFIG_USB_NET_DM9601=m | |
| 683 | −CONFIG_USB_NET_SMSC95XX=m | |
| 684 | −CONFIG_USB_NET_GL620A=m | |
| 685 | −CONFIG_USB_NET_NET1080=m | |
| 686 | −CONFIG_USB_NET_PLUSB=m | |
| 687 | −CONFIG_USB_NET_MCS7830=m | |
| 688 | −CONFIG_USB_NET_RNDIS_HOST=m | |
| 689 | −CONFIG_USB_NET_CDC_SUBSET=m | |
| 690 | −# CONFIG_USB_ALI_M5632 is not set | |
| 691 | −# CONFIG_USB_AN2720 is not set | |
| 692 | −CONFIG_USB_BELKIN=y | |
| 693 | −CONFIG_USB_ARMLINUX=y | |
| 694 | −# CONFIG_USB_EPSON2888 is not set | |
| 695 | −# CONFIG_USB_KC2190 is not set | |
| 696 | −CONFIG_USB_NET_ZAURUS=m | |
| 697 | −# CONFIG_USB_NET_INT51X1 is not set | |
| 758 | +# CONFIG_USB_USBNET is not set | |
| 698 | 759 | # CONFIG_WAN is not set |
| 699 | 760 | # CONFIG_PPP is not set |
| 700 | 761 | # CONFIG_SLIP is not set |
| @@ -710,6 +771,7 @@ CONFIG_USB_NET_ZAURUS=m · 9 unmodified lines | ||
| 710 | 771 | CONFIG_INPUT=y |
| 711 | 772 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 712 | 773 | # CONFIG_INPUT_POLLDEV is not set |
| 774 | +# CONFIG_INPUT_SPARSEKMAP is not set | |
| 713 | 775 | |
| 714 | 776 | # |
| 715 | 777 | # Userland interfaces |
| @@ -809,7 +871,6 @@ CONFIG_I2C_OMAP=y · 93 unmodified lines | ||
| 809 | 871 | # |
| 810 | 872 | # Miscellaneous I2C Chip support |
| 811 | 873 | # |
| 812 | −# CONFIG_DS1682 is not set | |
| 813 | 874 | # CONFIG_SENSORS_TSL2550 is not set |
| 814 | 875 | # CONFIG_I2C_DEBUG_CORE is not set |
| 815 | 876 | # CONFIG_I2C_DEBUG_ALGO is not set |
| @@ -825,6 +886,8 @@ CONFIG_SPI_MASTER=y · 9 unmodified lines | ||
| 825 | 886 | # CONFIG_SPI_BITBANG is not set |
| 826 | 887 | # CONFIG_SPI_GPIO is not set |
| 827 | 888 | CONFIG_SPI_OMAP24XX=y |
| 889 | +# CONFIG_SPI_XILINX is not set | |
| 890 | +# CONFIG_SPI_DESIGNWARE is not set | |
| 828 | 891 | |
| 829 | 892 | # |
| 830 | 893 | # SPI Protocol Masters |
| @@ -892,7 +955,7 @@ CONFIG_SSB_SDIOHOST_POSSIBLE=y · 61 unmodified lines | ||
| 892 | 955 | # |
| 893 | 956 | # Multifunction device drivers |
| 894 | 957 | # |
| 895 | −# CONFIG_MFD_CORE is not set | |
| 958 | +CONFIG_MFD_CORE=y | |
| 896 | 959 | # CONFIG_MFD_SM501 is not set |
| 897 | 960 | # CONFIG_MFD_ASIC3 is not set |
| 898 | 961 | # CONFIG_HTC_EGPIO is not set |
| @@ -900,11 +963,13 @@ CONFIG_SSB_SDIOHOST_POSSIBLE=y · 1 unmodified line | ||
| 900 | 963 | # CONFIG_TPS65010 is not set |
| 901 | 964 | CONFIG_TWL4030_CORE=y |
| 902 | 965 | # CONFIG_TWL4030_POWER is not set |
| 966 | +CONFIG_TWL4030_CODEC=y | |
| 903 | 967 | # CONFIG_MFD_TMIO is not set |
| 904 | 968 | # CONFIG_MFD_T7L66XB is not set |
| 905 | 969 | # CONFIG_MFD_TC6387XB is not set |
| 906 | 970 | # CONFIG_MFD_TC6393XB is not set |
| 907 | 971 | # CONFIG_PMIC_DA903X is not set |
| 972 | +# CONFIG_PMIC_ADP5520 is not set | |
| 908 | 973 | # CONFIG_MFD_WM8400 is not set |
| 909 | 974 | # CONFIG_MFD_WM831X is not set |
| 910 | 975 | # CONFIG_MFD_WM8350_I2C is not set |
| @@ -912,6 +977,8 @@ CONFIG_TWL4030_CORE=y · 1 unmodified line | ||
| 912 | 977 | # CONFIG_MFD_MC13783 is not set |
| 913 | 978 | # CONFIG_AB3100_CORE is not set |
| 914 | 979 | # CONFIG_EZX_PCAP is not set |
| 980 | +# CONFIG_MFD_88PM8607 is not set | |
| 981 | +# CONFIG_AB4500_CORE is not set | |
| 915 | 982 | CONFIG_REGULATOR=y |
| 916 | 983 | # CONFIG_REGULATOR_DEBUG is not set |
| 917 | 984 | # CONFIG_REGULATOR_FIXED_VOLTAGE is not set |
| @@ -919,6 +986,7 @@ CONFIG_REGULATOR=y · 1 unmodified line | ||
| 919 | 986 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set |
| 920 | 987 | # CONFIG_REGULATOR_BQ24022 is not set |
| 921 | 988 | # CONFIG_REGULATOR_MAX1586 is not set |
| 989 | +# CONFIG_REGULATOR_MAX8660 is not set | |
| 922 | 990 | CONFIG_REGULATOR_TWL4030=y |
| 923 | 991 | # CONFIG_REGULATOR_LP3971 is not set |
| 924 | 992 | # CONFIG_REGULATOR_TPS65023 is not set |
| @@ -930,65 +998,129 @@ CONFIG_REGULATOR_TWL4030=y · 5 unmodified lines | ||
| 930 | 998 | # |
| 931 | 999 | # CONFIG_VGASTATE is not set |
| 932 | 1000 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set |
| 933 | −# CONFIG_FB is not set | |
| 1001 | +CONFIG_FB=y | |
| 1002 | +# CONFIG_FIRMWARE_EDID is not set | |
| 1003 | +# CONFIG_FB_DDC is not set | |
| 1004 | +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | |
| 1005 | +CONFIG_FB_CFB_FILLRECT=y | |
| 1006 | +CONFIG_FB_CFB_COPYAREA=y | |
| 1007 | +CONFIG_FB_CFB_IMAGEBLIT=y | |
| 1008 | +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | |
| 1009 | +# CONFIG_FB_SYS_FILLRECT is not set | |
| 1010 | +# CONFIG_FB_SYS_COPYAREA is not set | |
| 1011 | +# CONFIG_FB_SYS_IMAGEBLIT is not set | |
| 1012 | +# CONFIG_FB_FOREIGN_ENDIAN is not set | |
| 1013 | +# CONFIG_FB_SYS_FOPS is not set | |
| 1014 | +# CONFIG_FB_SVGALIB is not set | |
| 1015 | +# CONFIG_FB_MACMODES is not set | |
| 1016 | +# CONFIG_FB_BACKLIGHT is not set | |
| 1017 | +CONFIG_FB_MODE_HELPERS=y | |
| 1018 | +# CONFIG_FB_TILEBLITTING is not set | |
| 1019 | + | |
| 1020 | +# | |
| 1021 | +# Frame buffer hardware drivers | |
| 1022 | +# | |
| 1023 | +# CONFIG_FB_UVESA is not set | |
| 1024 | +# CONFIG_FB_S1D13XXX is not set | |
| 1025 | +# CONFIG_FB_TMIO is not set | |
| 1026 | +# CONFIG_FB_VIRTUAL is not set | |
| 1027 | +# CONFIG_FB_METRONOME is not set | |
| 1028 | +# CONFIG_FB_MB862XX is not set | |
| 1029 | +# CONFIG_FB_BROADSHEET is not set | |
| 1030 | +# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | |
| 1031 | +CONFIG_OMAP2_VRAM=y | |
| 1032 | +CONFIG_OMAP2_VRFB=y | |
| 1033 | +CONFIG_OMAP2_DSS=y | |
| 1034 | +CONFIG_OMAP2_VRAM_SIZE=14 | |
| 1035 | +# CONFIG_OMAP2_DSS_DEBUG_SUPPORT is not set | |
| 1036 | +# CONFIG_OMAP2_DSS_RFBI is not set | |
| 1037 | +# CONFIG_OMAP2_DSS_VENC is not set | |
| 1038 | +# CONFIG_OMAP2_DSS_SDI is not set | |
| 1039 | +CONFIG_OMAP2_DSS_DSI=y | |
| 1040 | +CONFIG_OMAP2_DSS_USE_DSI_PLL=y | |
| 1041 | +# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | |
| 1042 | +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 | |
| 1043 | +CONFIG_FB_OMAP2=y | |
| 1044 | +# CONFIG_FB_OMAP2_DEBUG_SUPPORT is not set | |
| 1045 | +# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set | |
| 1046 | +CONFIG_FB_OMAP2_NUM_FBS=3 | |
| 1047 | + | |
| 1048 | +# | |
| 1049 | +# OMAP2/3 Display Device Drivers | |
| 1050 | +# | |
| 1051 | +CONFIG_PANEL_GENERIC=y | |
| 1052 | +# CONFIG_PANEL_SHARP_LS037V7DW01 is not set | |
| 1053 | +# CONFIG_PANEL_TAAL is not set | |
| 934 | 1054 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
| 935 | 1055 | |
| 936 | 1056 | # |
| 937 | 1057 | # Display device support |
| 938 | 1058 | # |
| 939 | −# CONFIG_DISPLAY_SUPPORT is not set | |
| 1059 | +CONFIG_DISPLAY_SUPPORT=y | |
| 1060 | + | |
| 1061 | +# | |
| 1062 | +# Display hardware drivers | |
| 1063 | +# | |
| 940 | 1064 | |
| 941 | 1065 | # |
| 942 | 1066 | # Console display driver support |
| 943 | 1067 | # |
| 944 | 1068 | # CONFIG_VGA_CONSOLE is not set |
| 945 | 1069 | CONFIG_DUMMY_CONSOLE=y |
| 946 | −# CONFIG_SOUND is not set | |
| 947 | −CONFIG_HID_SUPPORT=y | |
| 948 | −CONFIG_HID=y | |
| 949 | −# CONFIG_HIDRAW is not set | |
| 950 | − | |
| 951 | −# | |
| 952 | −# USB Input Devices | |
| 953 | −# | |
| 954 | −CONFIG_USB_HID=y | |
| 955 | −# CONFIG_HID_PID is not set | |
| 956 | −# CONFIG_USB_HIDDEV is not set | |
| 957 | − | |
| 958 | −# | |
| 959 | −# Special HID drivers | |
| 960 | −# | |
| 961 | −# CONFIG_HID_A4TECH is not set | |
| 962 | −# CONFIG_HID_APPLE is not set | |
| 963 | −# CONFIG_HID_BELKIN is not set | |
| 964 | −# CONFIG_HID_CHERRY is not set | |
| 965 | −# CONFIG_HID_CHICONY is not set | |
| 966 | −# CONFIG_HID_CYPRESS is not set | |
| 967 | −# CONFIG_HID_DRAGONRISE is not set | |
| 968 | −# CONFIG_HID_EZKEY is not set | |
| 969 | −# CONFIG_HID_KYE is not set | |
| 970 | −# CONFIG_HID_GYRATION is not set | |
| 971 | −# CONFIG_HID_TWINHAN is not set | |
| 972 | −# CONFIG_HID_KENSINGTON is not set | |
| 973 | −# CONFIG_HID_LOGITECH is not set | |
| 974 | −# CONFIG_HID_MICROSOFT is not set | |
| 975 | −# CONFIG_HID_MONTEREY is not set | |
| 976 | −# CONFIG_HID_NTRIG is not set | |
| 977 | −# CONFIG_HID_PANTHERLORD is not set | |
| 978 | −# CONFIG_HID_PETALYNX is not set | |
| 979 | −# CONFIG_HID_SAMSUNG is not set | |
| 980 | −# CONFIG_HID_SONY is not set | |
| 981 | −# CONFIG_HID_SUNPLUS is not set | |
| 982 | −# CONFIG_HID_GREENASIA is not set | |
| 983 | −# CONFIG_HID_SMARTJOYPLUS is not set | |
| 984 | −# CONFIG_HID_TOPSEED is not set | |
| 985 | −# CONFIG_HID_THRUSTMASTER is not set | |
| 986 | −# CONFIG_HID_WACOM is not set | |
| 987 | −# CONFIG_HID_ZEROPLUS is not set | |
| 1070 | +CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 1071 | +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | |
| 1072 | +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | |
| 1073 | +# CONFIG_FONTS is not set | |
| 1074 | +CONFIG_FONT_8x8=y | |
| 1075 | +CONFIG_FONT_8x16=y | |
| 1076 | +CONFIG_LOGO=y | |
| 1077 | +# CONFIG_LOGO_LINUX_MONO is not set | |
| 1078 | +# CONFIG_LOGO_LINUX_VGA16 is not set | |
| 1079 | +CONFIG_LOGO_LINUX_CLUT224=y | |
| 1080 | +CONFIG_SOUND=y | |
| 1081 | +# CONFIG_SOUND_OSS_CORE is not set | |
| 1082 | +CONFIG_SND=y | |
| 1083 | +CONFIG_SND_TIMER=y | |
| 1084 | +CONFIG_SND_PCM=y | |
| 1085 | +CONFIG_SND_JACK=y | |
| 1086 | +# CONFIG_SND_SEQUENCER is not set | |
| 1087 | +# CONFIG_SND_MIXER_OSS is not set | |
| 1088 | +# CONFIG_SND_PCM_OSS is not set | |
| 1089 | +# CONFIG_SND_HRTIMER is not set | |
| 1090 | +# CONFIG_SND_DYNAMIC_MINORS is not set | |
| 1091 | +# CONFIG_SND_SUPPORT_OLD_API is not set | |
| 1092 | +# CONFIG_SND_VERBOSE_PROCFS is not set | |
| 1093 | +# CONFIG_SND_VERBOSE_PRINTK is not set | |
| 1094 | +# CONFIG_SND_DEBUG is not set | |
| 1095 | +# CONFIG_SND_RAWMIDI_SEQ is not set | |
| 1096 | +# CONFIG_SND_OPL3_LIB_SEQ is not set | |
| 1097 | +# CONFIG_SND_OPL4_LIB_SEQ is not set | |
| 1098 | +# CONFIG_SND_SBAWE_SEQ is not set | |
| 1099 | +# CONFIG_SND_EMU10K1_SEQ is not set | |
| 1100 | +CONFIG_SND_DRIVERS=y | |
| 1101 | +# CONFIG_SND_DUMMY is not set | |
| 1102 | +# CONFIG_SND_MTPAV is not set | |
| 1103 | +# CONFIG_SND_SERIAL_U16550 is not set | |
| 1104 | +# CONFIG_SND_MPU401 is not set | |
| 1105 | +CONFIG_SND_ARM=y | |
| 1106 | +CONFIG_SND_SPI=y | |
| 1107 | +CONFIG_SND_USB=y | |
| 1108 | +# CONFIG_SND_USB_AUDIO is not set | |
| 1109 | +# CONFIG_SND_USB_CAIAQ is not set | |
| 1110 | +CONFIG_SND_SOC=y | |
| 1111 | +CONFIG_SND_OMAP_SOC=y | |
| 1112 | +CONFIG_SND_OMAP_SOC_MCBSP=y | |
| 1113 | +CONFIG_SND_OMAP_SOC_IGEP0020=y | |
| 1114 | +CONFIG_SND_SOC_I2C_AND_SPI=y | |
| 1115 | +# CONFIG_SND_SOC_ALL_CODECS is not set | |
| 1116 | +CONFIG_SND_SOC_TWL4030=y | |
| 1117 | +# CONFIG_SOUND_PRIME is not set | |
| 1118 | +# CONFIG_HID_SUPPORT is not set | |
| 1119 | +CONFIG_HID=m | |
| 988 | 1120 | CONFIG_USB_SUPPORT=y |
| 989 | 1121 | CONFIG_USB_ARCH_HAS_HCD=y |
| 990 | 1122 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 991 | −# CONFIG_USB_ARCH_HAS_EHCI is not set | |
| 1123 | +CONFIG_USB_ARCH_HAS_EHCI=y | |
| 992 | 1124 | CONFIG_USB=y |
| 993 | 1125 | # CONFIG_USB_DEBUG is not set |
| 994 | 1126 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y |
| @@ -997,12 +1129,12 @@ CONFIG_USB_ANNOUNCE_NEW_DEVICES=y · 2 unmodified lines | ||
| 997 | 1129 | # Miscellaneous USB options |
| 998 | 1130 | # |
| 999 | 1131 | # CONFIG_USB_DEVICEFS is not set |
| 1000 | −# CONFIG_USB_DEVICE_CLASS is not set | |
| 1132 | +CONFIG_USB_DEVICE_CLASS=y | |
| 1001 | 1133 | # CONFIG_USB_DYNAMIC_MINORS is not set |
| 1002 | 1134 | # CONFIG_USB_OTG is not set |
| 1003 | 1135 | # CONFIG_USB_OTG_WHITELIST is not set |
| 1004 | 1136 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 1005 | −CONFIG_USB_MON=m | |
| 1137 | +# CONFIG_USB_MON is not set | |
| 1006 | 1138 | # CONFIG_USB_WUSB is not set |
| 1007 | 1139 | # CONFIG_USB_WUSB_CBAF is not set |
| 1008 | 1140 | |
| @@ -1010,29 +1142,21 @@ CONFIG_USB_MON=m · 1 unmodified line | ||
| 1010 | 1142 | # USB Host Controller Drivers |
| 1011 | 1143 | # |
| 1012 | 1144 | # CONFIG_USB_C67X00_HCD is not set |
| 1145 | +CONFIG_USB_EHCI_HCD=y | |
| 1146 | +CONFIG_USB_EHCI_ROOT_HUB_TT=y | |
| 1147 | +# CONFIG_USB_EHCI_TT_NEWSCHED is not set | |
| 1013 | 1148 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1014 | 1149 | # CONFIG_USB_ISP116X_HCD is not set |
| 1015 | 1150 | # CONFIG_USB_ISP1760_HCD is not set |
| 1016 | 1151 | # CONFIG_USB_ISP1362_HCD is not set |
| 1017 | −# CONFIG_USB_OHCI_HCD is not set | |
| 1152 | +CONFIG_USB_OHCI_HCD=y | |
| 1153 | +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | |
| 1154 | +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | |
| 1155 | +CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |
| 1018 | 1156 | # CONFIG_USB_SL811_HCD is not set |
| 1019 | 1157 | # CONFIG_USB_R8A66597_HCD is not set |
| 1020 | 1158 | # CONFIG_USB_HWA_HCD is not set |
| 1021 | −CONFIG_USB_MUSB_HDRC=y | |
| 1022 | −CONFIG_USB_MUSB_SOC=y | |
| 1023 | − | |
| 1024 | −# | |
| 1025 | −# OMAP 343x high speed USB support | |
| 1026 | −# | |
| 1027 | −CONFIG_USB_MUSB_HOST=y | |
| 1028 | −# CONFIG_USB_MUSB_PERIPHERAL is not set | |
| 1029 | −# CONFIG_USB_MUSB_OTG is not set | |
| 1030 | −# CONFIG_USB_GADGET_MUSB_HDRC is not set | |
| 1031 | −CONFIG_USB_MUSB_HDRC_HCD=y | |
| 1032 | −# CONFIG_MUSB_PIO_ONLY is not set | |
| 1033 | −CONFIG_USB_INVENTRA_DMA=y | |
| 1034 | −# CONFIG_USB_TI_CPPI_DMA is not set | |
| 1035 | −# CONFIG_USB_MUSB_DEBUG is not set | |
| 1159 | +# CONFIG_USB_MUSB_HDRC is not set | |
| 1036 | 1160 | |
| 1037 | 1161 | # |
| 1038 | 1162 | # USB Device Class drivers |
| @@ -1049,19 +1173,7 @@ CONFIG_USB_INVENTRA_DMA=y · 10 unmodified lines | ||
| 1049 | 1173 | # |
| 1050 | 1174 | # also be needed; see USB_STORAGE Help for more info |
| 1051 | 1175 | # |
| 1052 | −CONFIG_USB_STORAGE=m | |
| 1053 | −# CONFIG_USB_STORAGE_DEBUG is not set | |
| 1054 | −# CONFIG_USB_STORAGE_DATAFAB is not set | |
| 1055 | −# CONFIG_USB_STORAGE_FREECOM is not set | |
| 1056 | −# CONFIG_USB_STORAGE_ISD200 is not set | |
| 1057 | −# CONFIG_USB_STORAGE_USBAT is not set | |
| 1058 | −# CONFIG_USB_STORAGE_SDDR09 is not set | |
| 1059 | −# CONFIG_USB_STORAGE_SDDR55 is not set | |
| 1060 | −# CONFIG_USB_STORAGE_JUMPSHOT is not set | |
| 1061 | −# CONFIG_USB_STORAGE_ALAUDA is not set | |
| 1062 | −# CONFIG_USB_STORAGE_ONETOUCH is not set | |
| 1063 | −# CONFIG_USB_STORAGE_KARMA is not set | |
| 1064 | −# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | |
| 1176 | +# CONFIG_USB_STORAGE is not set | |
| 1065 | 1177 | # CONFIG_USB_LIBUSUAL is not set |
| 1066 | 1178 | |
| 1067 | 1179 | # |
| @@ -1099,41 +1211,7 @@ CONFIG_USB_STORAGE=m · 31 unmodified lines | ||
| 1099 | 1211 | # CONFIG_USB_TEST is not set |
| 1100 | 1212 | # CONFIG_USB_ISIGHTFW is not set |
| 1101 | 1213 | # CONFIG_USB_VST is not set |
| 1102 | −CONFIG_USB_GADGET=y | |
| 1103 | −CONFIG_USB_GADGET_DEBUG=y | |
| 1104 | −CONFIG_USB_GADGET_DEBUG_FILES=y | |
| 1105 | −CONFIG_USB_GADGET_VBUS_DRAW=2 | |
| 1106 | −CONFIG_USB_GADGET_SELECTED=y | |
| 1107 | −# CONFIG_USB_GADGET_AT91 is not set | |
| 1108 | −# CONFIG_USB_GADGET_ATMEL_USBA is not set | |
| 1109 | −# CONFIG_USB_GADGET_FSL_USB2 is not set | |
| 1110 | −# CONFIG_USB_GADGET_LH7A40X is not set | |
| 1111 | −CONFIG_USB_GADGET_OMAP=y | |
| 1112 | −CONFIG_USB_OMAP=y | |
| 1113 | −# CONFIG_USB_GADGET_PXA25X is not set | |
| 1114 | −# CONFIG_USB_GADGET_R8A66597 is not set | |
| 1115 | −# CONFIG_USB_GADGET_PXA27X is not set | |
| 1116 | −# CONFIG_USB_GADGET_S3C_HSOTG is not set | |
| 1117 | −# CONFIG_USB_GADGET_IMX is not set | |
| 1118 | −# CONFIG_USB_GADGET_S3C2410 is not set | |
| 1119 | −# CONFIG_USB_GADGET_M66592 is not set | |
| 1120 | −# CONFIG_USB_GADGET_AMD5536UDC is not set | |
| 1121 | −# CONFIG_USB_GADGET_FSL_QE is not set | |
| 1122 | −# CONFIG_USB_GADGET_CI13XXX is not set | |
| 1123 | −# CONFIG_USB_GADGET_NET2280 is not set | |
| 1124 | −# CONFIG_USB_GADGET_GOKU is not set | |
| 1125 | −# CONFIG_USB_GADGET_LANGWELL is not set | |
| 1126 | −# CONFIG_USB_GADGET_DUMMY_HCD is not set | |
| 1127 | −# CONFIG_USB_GADGET_DUALSPEED is not set | |
| 1128 | −CONFIG_USB_ZERO=m | |
| 1129 | −# CONFIG_USB_AUDIO is not set | |
| 1130 | −# CONFIG_USB_ETH is not set | |
| 1131 | −# CONFIG_USB_GADGETFS is not set | |
| 1132 | −# CONFIG_USB_FILE_STORAGE is not set | |
| 1133 | −# CONFIG_USB_G_SERIAL is not set | |
| 1134 | −# CONFIG_USB_MIDI_GADGET is not set | |
| 1135 | −# CONFIG_USB_G_PRINTER is not set | |
| 1136 | −# CONFIG_USB_CDC_COMPOSITE is not set | |
| 1214 | +# CONFIG_USB_GADGET is not set | |
| 1137 | 1215 | |
| 1138 | 1216 | # |
| 1139 | 1217 | # OTG and related infrastructure |
| @@ -1141,10 +1219,11 @@ CONFIG_USB_ZERO=m · 1 unmodified line | ||
| 1141 | 1219 | CONFIG_USB_OTG_UTILS=y |
| 1142 | 1220 | # CONFIG_USB_GPIO_VBUS is not set |
| 1143 | 1221 | # CONFIG_ISP1301_OMAP is not set |
| 1144 | −CONFIG_TWL4030_USB=y | |
| 1222 | +# CONFIG_USB_ULPI is not set | |
| 1223 | +# CONFIG_TWL4030_USB is not set | |
| 1145 | 1224 | # CONFIG_NOP_USB_XCEIV is not set |
| 1146 | 1225 | CONFIG_MMC=y |
| 1147 | −# CONFIG_MMC_DEBUG is not set | |
| 1226 | +CONFIG_MMC_DEBUG=y | |
| 1148 | 1227 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| 1149 | 1228 | |
| 1150 | 1229 | # |
| @@ -1158,7 +1237,8 @@ CONFIG_MMC_BLOCK_BOUNCE=y · 7 unmodified lines | ||
| 1158 | 1237 | # |
| 1159 | 1238 | # MMC/SD/SDIO Host Controller Drivers |
| 1160 | 1239 | # |
| 1161 | −# CONFIG_MMC_SDHCI is not set | |
| 1240 | +CONFIG_MMC_SDHCI=y | |
| 1241 | +# CONFIG_MMC_SDHCI_PLTFM is not set | |
| 1162 | 1242 | # CONFIG_MMC_OMAP is not set |
| 1163 | 1243 | CONFIG_MMC_OMAP_HS=y |
| 1164 | 1244 | # CONFIG_MMC_AT91 is not set |
| @@ -1178,6 +1258,11 @@ CONFIG_RTC_LIB=y · 13 unmodified lines | ||
| 1178 | 1258 | # |
| 1179 | 1259 | # CONFIG_STAGING is not set |
| 1180 | 1260 | |
| 1261 | +# | |
| 1262 | +# CBUS support | |
| 1263 | +# | |
| 1264 | +# CONFIG_CBUS is not set | |
| 1265 | + | |
| 1181 | 1266 | # |
| 1182 | 1267 | # File systems |
| 1183 | 1268 | # |
| @@ -1253,6 +1338,7 @@ CONFIG_MISC_FILESYSTEMS=y · 69 unmodified lines | ||
| 1253 | 1338 | # CONFIG_BEFS_FS is not set |
| 1254 | 1339 | # CONFIG_BFS_FS is not set |
| 1255 | 1340 | # CONFIG_EFS_FS is not set |
| 1341 | +# CONFIG_JFFS2_FS is not set | |
| 1256 | 1342 | # CONFIG_CRAMFS is not set |
| 1257 | 1343 | # CONFIG_SQUASHFS is not set |
| 1258 | 1344 | # CONFIG_VXFS_FS is not set |
| @@ -1401,6 +1487,7 @@ CONFIG_DEBUG_INFO=y · 142 unmodified lines | ||
| 1401 | 1487 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set |
| 1402 | 1488 | # CONFIG_FAULT_INJECTION is not set |
| 1403 | 1489 | # CONFIG_LATENCYTOP is not set |
| 1490 | +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | |
| 1404 | 1491 | # CONFIG_PAGE_POISONING is not set |
| 1405 | 1492 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1406 | 1493 | CONFIG_TRACING_SUPPORT=y |
| @@ -1425,7 +1512,9 @@ CONFIG_ARM_UNWIND=y · 18 unmodified lines | ||
| 1425 | 1512 | # CONFIG_DEBUG_ERRORS is not set |
| 1426 | 1513 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1427 | 1514 | CONFIG_DEBUG_LL=y |
| 1515 | +# CONFIG_EARLY_PRINTK is not set | |
| 1428 | 1516 | # CONFIG_DEBUG_ICEDCC is not set |
| 1517 | +# CONFIG_OC_ETM is not set | |
| 1429 | 1518 | |
| 1430 | 1519 | # |
| 1431 | 1520 | # Security options |
| @@ -1433,7 +1522,11 @@ CONFIG_DEBUG_LL=y · 1 unmodified line | ||
| 1433 | 1522 | # CONFIG_KEYS is not set |
| 1434 | 1523 | # CONFIG_SECURITY is not set |
| 1435 | 1524 | # CONFIG_SECURITYFS is not set |
| 1436 | −# CONFIG_SECURITY_FILE_CAPABILITIES is not set | |
| 1525 | +# CONFIG_DEFAULT_SECURITY_SELINUX is not set | |
| 1526 | +# CONFIG_DEFAULT_SECURITY_SMACK is not set | |
| 1527 | +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set | |
| 1528 | +CONFIG_DEFAULT_SECURITY_DAC=y | |
| 1529 | +CONFIG_DEFAULT_SECURITY="" | |
| 1437 | 1530 | CONFIG_CRYPTO=y |
| 1438 | 1531 | |
| 1439 | 1532 | # |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | # |
| 2 | 2 | # Automatically generated make config: don't edit |
| 3 | −# Linux kernel version: 2.6.32-rc8 | |
| 4 | −# Tue Dec 1 14:04:02 2009 | |
| 3 | +# Linux kernel version: 2.6.33-rc5 | |
| 4 | +# Tue Jan 26 11:05:31 2010 | |
| 5 | 5 | # |
| 6 | 6 | CONFIG_ARM=y |
| 7 | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| @@ -20,6 +20,8 @@ CONFIG_ARCH_HAS_CPUFREQ=y · 12 unmodified lines | ||
| 20 | 20 | CONFIG_GENERIC_HWEIGHT=y |
| 21 | 21 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 22 | 22 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 23 | +CONFIG_OPROFILE_ARMV6=y | |
| 24 | +CONFIG_OPROFILE_ARM11_CORE=y | |
| 23 | 25 | CONFIG_OPROFILE_ARMV7=y |
| 24 | 26 | CONFIG_VECTORS_BASE=0xffff0000 |
| 25 | 27 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| @@ -33,6 +35,12 @@ CONFIG_BROKEN_ON_SMP=y · 7 unmodified lines | ||
| 33 | 35 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 34 | 36 | CONFIG_LOCALVERSION="" |
| 35 | 37 | CONFIG_LOCALVERSION_AUTO=y |
| 38 | +CONFIG_HAVE_KERNEL_GZIP=y | |
| 39 | +CONFIG_HAVE_KERNEL_LZO=y | |
| 40 | +CONFIG_KERNEL_GZIP=y | |
| 41 | +# CONFIG_KERNEL_BZIP2 is not set | |
| 42 | +# CONFIG_KERNEL_LZMA is not set | |
| 43 | +# CONFIG_KERNEL_LZO is not set | |
| 36 | 44 | CONFIG_SWAP=y |
| 37 | 45 | CONFIG_SYSVIPC=y |
| 38 | 46 | CONFIG_SYSVIPC_SYSCTL=y |
| @@ -48,6 +56,7 @@ CONFIG_BSD_PROCESS_ACCT=y · 9 unmodified lines | ||
| 48 | 56 | # |
| 49 | 57 | CONFIG_TREE_RCU=y |
| 50 | 58 | # CONFIG_TREE_PREEMPT_RCU is not set |
| 59 | +# CONFIG_TINY_RCU is not set | |
| 51 | 60 | # CONFIG_RCU_TRACE is not set |
| 52 | 61 | CONFIG_RCU_FANOUT=32 |
| 53 | 62 | # CONFIG_RCU_FANOUT_EXACT is not set |
| @@ -69,6 +78,7 @@ CONFIG_INITRAMFS_SOURCE="" · 15 unmodified lines | ||
| 69 | 78 | CONFIG_RD_GZIP=y |
| 70 | 79 | # CONFIG_RD_BZIP2 is not set |
| 71 | 80 | # CONFIG_RD_LZMA is not set |
| 81 | +# CONFIG_RD_LZO is not set | |
| 72 | 82 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 73 | 83 | CONFIG_SYSCTL=y |
| 74 | 84 | CONFIG_ANON_INODES=y |
| @@ -133,14 +143,41 @@ CONFIG_LBDAF=y · 58 unmodified lines | ||
| 133 | 143 | # IO Schedulers |
| 134 | 144 | # |
| 135 | 145 | CONFIG_IOSCHED_NOOP=y |
| 136 | −CONFIG_IOSCHED_AS=y | |
| 137 | 146 | CONFIG_IOSCHED_DEADLINE=y |
| 138 | 147 | CONFIG_IOSCHED_CFQ=y |
| 139 | −# CONFIG_DEFAULT_AS is not set | |
| 140 | 148 | # CONFIG_DEFAULT_DEADLINE is not set |
| 141 | 149 | CONFIG_DEFAULT_CFQ=y |
| 142 | 150 | # CONFIG_DEFAULT_NOOP is not set |
| 143 | 151 | CONFIG_DEFAULT_IOSCHED="cfq" |
| 152 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | |
| 153 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | |
| 154 | +# CONFIG_INLINE_SPIN_LOCK is not set | |
| 155 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | |
| 156 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | |
| 157 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | |
| 158 | +# CONFIG_INLINE_SPIN_UNLOCK is not set | |
| 159 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | |
| 160 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set | |
| 161 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | |
| 162 | +# CONFIG_INLINE_READ_TRYLOCK is not set | |
| 163 | +# CONFIG_INLINE_READ_LOCK is not set | |
| 164 | +# CONFIG_INLINE_READ_LOCK_BH is not set | |
| 165 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | |
| 166 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | |
| 167 | +# CONFIG_INLINE_READ_UNLOCK is not set | |
| 168 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | |
| 169 | +# CONFIG_INLINE_READ_UNLOCK_IRQ is not set | |
| 170 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | |
| 171 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | |
| 172 | +# CONFIG_INLINE_WRITE_LOCK is not set | |
| 173 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | |
| 174 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | |
| 175 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | |
| 176 | +# CONFIG_INLINE_WRITE_UNLOCK is not set | |
| 177 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | |
| 178 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set | |
| 179 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | |
| 180 | +# CONFIG_MUTEX_SPIN_ON_OWNER is not set | |
| 144 | 181 | CONFIG_FREEZER=y |
| 145 | 182 | |
| 146 | 183 | # |
| @@ -169,6 +206,7 @@ CONFIG_MMU=y · 22 unmodified lines | ||
| 169 | 206 | # CONFIG_ARCH_IXP2000 is not set |
| 170 | 207 | # CONFIG_ARCH_IXP4XX is not set |
| 171 | 208 | # CONFIG_ARCH_L7200 is not set |
| 209 | +# CONFIG_ARCH_DOVE is not set | |
| 172 | 210 | # CONFIG_ARCH_KIRKWOOD is not set |
| 173 | 211 | # CONFIG_ARCH_LOKI is not set |
| 174 | 212 | # CONFIG_ARCH_MV78XX0 is not set |
| @@ -191,21 +229,23 @@ CONFIG_MMU=y · 16 unmodified lines | ||
| 191 | 229 | # CONFIG_ARCH_DAVINCI is not set |
| 192 | 230 | CONFIG_ARCH_OMAP=y |
| 193 | 231 | # CONFIG_ARCH_BCMRING is not set |
| 232 | +# CONFIG_ARCH_U8500 is not set | |
| 194 | 233 | |
| 195 | 234 | # |
| 196 | 235 | # TI OMAP Implementations |
| 197 | 236 | # |
| 198 | 237 | CONFIG_ARCH_OMAP_OTG=y |
| 199 | 238 | # CONFIG_ARCH_OMAP1 is not set |
| 200 | −# CONFIG_ARCH_OMAP2 is not set | |
| 239 | +CONFIG_ARCH_OMAP2PLUS=y | |
| 240 | +CONFIG_ARCH_OMAP2=y | |
| 201 | 241 | CONFIG_ARCH_OMAP3=y |
| 202 | −# CONFIG_ARCH_OMAP4 is not set | |
| 242 | +CONFIG_ARCH_OMAP4=y | |
| 203 | 243 | |
| 204 | 244 | # |
| 205 | 245 | # OMAP Feature Selections |
| 206 | 246 | # |
| 207 | −# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | |
| 208 | −# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | |
| 247 | +CONFIG_OMAP_DEBUG_DEVICES=y | |
| 248 | +CONFIG_OMAP_DEBUG_LEDS=y | |
| 209 | 249 | CONFIG_OMAP_RESET_CLOCKS=y |
| 210 | 250 | CONFIG_OMAP_MUX=y |
| 211 | 251 | CONFIG_OMAP_MUX_DEBUG=y |
| @@ -216,43 +256,66 @@ CONFIG_OMAP_MCBSP=y · 4 unmodified lines | ||
| 216 | 256 | CONFIG_OMAP_32K_TIMER=y |
| 217 | 257 | CONFIG_OMAP_32K_TIMER_HZ=128 |
| 218 | 258 | CONFIG_OMAP_DM_TIMER=y |
| 219 | −# CONFIG_OMAP_LL_DEBUG_UART1 is not set | |
| 220 | −# CONFIG_OMAP_LL_DEBUG_UART2 is not set | |
| 221 | −# CONFIG_OMAP_LL_DEBUG_UART3 is not set | |
| 222 | −CONFIG_OMAP_LL_DEBUG_NONE=y | |
| 223 | 259 | # CONFIG_OMAP_PM_NONE is not set |
| 224 | 260 | CONFIG_OMAP_PM_NOOP=y |
| 225 | −CONFIG_ARCH_OMAP34XX=y | |
| 261 | +CONFIG_MACH_OMAP_GENERIC=y | |
| 262 | + | |
| 263 | +# | |
| 264 | +# OMAP Core Type | |
| 265 | +# | |
| 266 | +CONFIG_ARCH_OMAP2420=y | |
| 267 | +# CONFIG_ARCH_OMAP2430 is not set | |
| 226 | 268 | CONFIG_ARCH_OMAP3430=y |
| 269 | +CONFIG_OMAP_PACKAGE_CBB=y | |
| 270 | +CONFIG_OMAP_PACKAGE_CUS=y | |
| 271 | +CONFIG_OMAP_PACKAGE_CBP=y | |
| 227 | 272 | |
| 228 | 273 | # |
| 229 | 274 | # OMAP Board Type |
| 230 | 275 | # |
| 276 | +CONFIG_MACH_OMAP2_TUSB6010=y | |
| 277 | +CONFIG_MACH_OMAP_H4=y | |
| 278 | +CONFIG_MACH_OMAP_APOLLON=y | |
| 279 | +# CONFIG_MACH_OMAP_2430SDP is not set | |
| 231 | 280 | CONFIG_MACH_OMAP3_BEAGLE=y |
| 232 | 281 | CONFIG_MACH_OMAP_LDP=y |
| 233 | 282 | CONFIG_MACH_OVERO=y |
| 234 | 283 | CONFIG_MACH_OMAP3EVM=y |
| 235 | 284 | CONFIG_MACH_OMAP3517EVM=y |
| 236 | 285 | CONFIG_MACH_OMAP3_PANDORA=y |
| 286 | +CONFIG_MACH_OMAP3_TOUCHBOOK=y | |
| 237 | 287 | CONFIG_MACH_OMAP_3430SDP=y |
| 288 | +CONFIG_MACH_NOKIA_N800=y | |
| 289 | +CONFIG_MACH_NOKIA_N810=y | |
| 290 | +CONFIG_MACH_NOKIA_N810_WIMAX=y | |
| 291 | +CONFIG_MACH_NOKIA_N8X0=y | |
| 238 | 292 | CONFIG_MACH_NOKIA_RX51=y |
| 239 | 293 | CONFIG_MACH_OMAP_ZOOM2=y |
| 240 | 294 | CONFIG_MACH_OMAP_ZOOM3=y |
| 241 | 295 | CONFIG_MACH_CM_T35=y |
| 242 | 296 | CONFIG_MACH_IGEP0020=y |
| 243 | 297 | CONFIG_MACH_OMAP_3630SDP=y |
| 298 | +CONFIG_MACH_OMAP_4430SDP=y | |
| 299 | +# CONFIG_OMAP3_EMU is not set | |
| 300 | +# CONFIG_OMAP3_SDRC_AC_TIMING is not set | |
| 244 | 301 | |
| 245 | 302 | # |
| 246 | 303 | # Processor Type |
| 247 | 304 | # |
| 248 | −CONFIG_CPU_32v6K=y | |
| 305 | +CONFIG_CPU_V6=y | |
| 306 | +# CONFIG_CPU_32v6K is not set | |
| 249 | 307 | CONFIG_CPU_V7=y |
| 308 | +CONFIG_CPU_32v6=y | |
| 250 | 309 | CONFIG_CPU_32v7=y |
| 310 | +CONFIG_CPU_ABRT_EV6=y | |
| 251 | 311 | CONFIG_CPU_ABRT_EV7=y |
| 312 | +CONFIG_CPU_PABRT_V6=y | |
| 252 | 313 | CONFIG_CPU_PABRT_V7=y |
| 314 | +CONFIG_CPU_CACHE_V6=y | |
| 253 | 315 | CONFIG_CPU_CACHE_V7=y |
| 254 | 316 | CONFIG_CPU_CACHE_VIPT=y |
| 255 | 317 | CONFIG_CPU_COPY_V6=y |
| 318 | +CONFIG_CPU_TLB_V6=y | |
| 256 | 319 | CONFIG_CPU_TLB_V7=y |
| 257 | 320 | CONFIG_CPU_HAS_ASID=y |
| 258 | 321 | CONFIG_CPU_CP15=y |
| @@ -268,9 +331,11 @@ CONFIG_ARM_THUMBEE=y · 9 unmodified lines | ||
| 268 | 331 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 269 | 332 | CONFIG_HAS_TLS_REG=y |
| 270 | 333 | CONFIG_ARM_L1_CACHE_SHIFT=6 |
| 334 | +# CONFIG_ARM_ERRATA_411920 is not set | |
| 271 | 335 | # CONFIG_ARM_ERRATA_430973 is not set |
| 272 | 336 | # CONFIG_ARM_ERRATA_458693 is not set |
| 273 | 337 | # CONFIG_ARM_ERRATA_460075 is not set |
| 338 | +CONFIG_ARM_GIC=y | |
| 274 | 339 | CONFIG_COMMON_CLKDEV=y |
| 275 | 340 | |
| 276 | 341 | # |
| @@ -287,6 +352,7 @@ CONFIG_TICK_ONESHOT=y · 10 unmodified lines | ||
| 287 | 352 | CONFIG_NO_HZ=y |
| 288 | 353 | CONFIG_HIGH_RES_TIMERS=y |
| 289 | 354 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y |
| 355 | +# CONFIG_SMP is not set | |
| 290 | 356 | CONFIG_VMSPLIT_3G=y |
| 291 | 357 | # CONFIG_VMSPLIT_2G is not set |
| 292 | 358 | # CONFIG_VMSPLIT_1G is not set |
| @@ -298,6 +364,7 @@ CONFIG_HZ=128 · 5 unmodified lines | ||
| 298 | 364 | # CONFIG_THUMB2_KERNEL is not set |
| 299 | 365 | CONFIG_AEABI=y |
| 300 | 366 | CONFIG_OABI_COMPAT=y |
| 367 | +CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y | |
| 301 | 368 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 302 | 369 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 303 | 370 | # CONFIG_HIGHMEM is not set |
| @@ -308,12 +375,10 @@ CONFIG_FLATMEM_MANUAL=y · 4 unmodified lines | ||
| 308 | 375 | CONFIG_FLATMEM=y |
| 309 | 376 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 310 | 377 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 311 | −CONFIG_SPLIT_PTLOCK_CPUS=4 | |
| 378 | +CONFIG_SPLIT_PTLOCK_CPUS=999999 | |
| 312 | 379 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 313 | 380 | CONFIG_ZONE_DMA_FLAG=0 |
| 314 | 381 | CONFIG_VIRT_TO_BUS=y |
| 315 | −CONFIG_HAVE_MLOCK=y | |
| 316 | −CONFIG_HAVE_MLOCKED_PAGE_BIT=y | |
| 317 | 382 | # CONFIG_KSM is not set |
| 318 | 383 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
| 319 | 384 | CONFIG_LEDS=y |
| @@ -509,15 +574,18 @@ CONFIG_BT_HCIBPA10X=y · 189 unmodified lines | ||
| 509 | 574 | # CONFIG_BT_MRVL is not set |
| 510 | 575 | # CONFIG_AF_RXRPC is not set |
| 511 | 576 | CONFIG_WIRELESS=y |
| 577 | +CONFIG_WIRELESS_EXT=y | |
| 578 | +CONFIG_WEXT_CORE=y | |
| 579 | +CONFIG_WEXT_PROC=y | |
| 580 | +CONFIG_WEXT_SPY=y | |
| 512 | 581 | CONFIG_CFG80211=y |
| 513 | 582 | # CONFIG_NL80211_TESTMODE is not set |
| 514 | 583 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set |
| 515 | 584 | # CONFIG_CFG80211_REG_DEBUG is not set |
| 516 | 585 | CONFIG_CFG80211_DEFAULT_PS=y |
| 517 | −CONFIG_CFG80211_DEFAULT_PS_VALUE=1 | |
| 518 | 586 | # CONFIG_CFG80211_DEBUGFS is not set |
| 519 | 587 | CONFIG_WIRELESS_OLD_REGULATORY=y |
| 520 | −CONFIG_WIRELESS_EXT=y | |
| 588 | +CONFIG_CFG80211_WEXT=y | |
| 521 | 589 | CONFIG_WIRELESS_EXT_SYSFS=y |
| 522 | 590 | CONFIG_LIB80211=y |
| 523 | 591 | # CONFIG_LIB80211_DEBUG is not set |
| @@ -671,6 +739,7 @@ CONFIG_BLK_DEV=y · 147 unmodified lines | ||
| 671 | 739 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 672 | 740 | CONFIG_BLK_DEV_LOOP=y |
| 673 | 741 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 742 | +# CONFIG_BLK_DEV_DRBD is not set | |
| 674 | 743 | # CONFIG_BLK_DEV_NBD is not set |
| 675 | 744 | # CONFIG_BLK_DEV_UB is not set |
| 676 | 745 | CONFIG_BLK_DEV_RAM=y |
| @@ -681,9 +750,12 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 · 4 unmodified lines | ||
| 681 | 750 | # CONFIG_ATA_OVER_ETH is not set |
| 682 | 751 | # CONFIG_MG_DISK is not set |
| 683 | 752 | CONFIG_MISC_DEVICES=y |
| 753 | +# CONFIG_AD525X_DPOT is not set | |
| 684 | 754 | # CONFIG_ICS932S401 is not set |
| 685 | 755 | # CONFIG_ENCLOSURE_SERVICES is not set |
| 686 | 756 | # CONFIG_ISL29003 is not set |
| 757 | +# CONFIG_DS1682 is not set | |
| 758 | +# CONFIG_TI_DAC7512 is not set | |
| 687 | 759 | # CONFIG_C2PORT is not set |
| 688 | 760 | |
| 689 | 761 | # |
| @@ -694,6 +766,7 @@ CONFIG_MISC_DEVICES=y · 4 unmodified lines | ||
| 694 | 766 | CONFIG_EEPROM_LEGACY=y |
| 695 | 767 | # CONFIG_EEPROM_MAX6875 is not set |
| 696 | 768 | # CONFIG_EEPROM_93CX6 is not set |
| 769 | +# CONFIG_IWMC3200TOP is not set | |
| 697 | 770 | CONFIG_HAVE_IDE=y |
| 698 | 771 | # CONFIG_IDE is not set |
| 699 | 772 | |
| @@ -792,28 +865,26 @@ CONFIG_SMSC911X=y · 92 unmodified lines | ||
| 792 | 865 | CONFIG_NETDEV_1000=y |
| 793 | 866 | CONFIG_NETDEV_10000=y |
| 794 | 867 | CONFIG_WLAN=y |
| 795 | −# CONFIG_WLAN_PRE80211 is not set | |
| 796 | −CONFIG_WLAN_80211=y | |
| 797 | −CONFIG_LIBERTAS=y | |
| 798 | −CONFIG_LIBERTAS_USB=y | |
| 799 | −CONFIG_LIBERTAS_SDIO=y | |
| 800 | −# CONFIG_LIBERTAS_SPI is not set | |
| 801 | −CONFIG_LIBERTAS_DEBUG=y | |
| 802 | 868 | # CONFIG_LIBERTAS_THINFIRM is not set |
| 803 | 869 | # CONFIG_AT76C50X_USB is not set |
| 804 | 870 | # CONFIG_USB_ZD1201 is not set |
| 805 | 871 | # CONFIG_USB_NET_RNDIS_WLAN is not set |
| 806 | 872 | # CONFIG_RTL8187 is not set |
| 807 | 873 | # CONFIG_MAC80211_HWSIM is not set |
| 808 | −# CONFIG_P54_COMMON is not set | |
| 809 | 874 | # CONFIG_ATH_COMMON is not set |
| 810 | −# CONFIG_HOSTAP is not set | |
| 811 | 875 | # CONFIG_B43 is not set |
| 812 | 876 | # CONFIG_B43LEGACY is not set |
| 813 | −# CONFIG_ZD1211RW is not set | |
| 877 | +# CONFIG_HOSTAP is not set | |
| 878 | +# CONFIG_IWM is not set | |
| 879 | +CONFIG_LIBERTAS=y | |
| 880 | +CONFIG_LIBERTAS_USB=y | |
| 881 | +CONFIG_LIBERTAS_SDIO=y | |
| 882 | +# CONFIG_LIBERTAS_SPI is not set | |
| 883 | +CONFIG_LIBERTAS_DEBUG=y | |
| 884 | +# CONFIG_P54_COMMON is not set | |
| 814 | 885 | # CONFIG_RT2X00 is not set |
| 815 | 886 | # CONFIG_WL12XX is not set |
| 816 | −# CONFIG_IWM is not set | |
| 887 | +# CONFIG_ZD1211RW is not set | |
| 817 | 888 | |
| 818 | 889 | # |
| 819 | 890 | # Enable WiMAX (Networking options) to see the WiMAX drivers |
| @@ -861,6 +932,7 @@ CONFIG_USB_NET_ZAURUS=y · 41 unmodified lines | ||
| 861 | 932 | CONFIG_INPUT=y |
| 862 | 933 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 863 | 934 | # CONFIG_INPUT_POLLDEV is not set |
| 935 | +# CONFIG_INPUT_SPARSEKMAP is not set | |
| 864 | 936 | |
| 865 | 937 | # |
| 866 | 938 | # Userland interfaces |
| @@ -889,6 +961,7 @@ CONFIG_KEYBOARD_GPIO=y · 22 unmodified lines | ||
| 889 | 961 | # CONFIG_KEYBOARD_OPENCORES is not set |
| 890 | 962 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 891 | 963 | # CONFIG_KEYBOARD_SUNKBD is not set |
| 964 | +# CONFIG_KEYBOARD_OMAP is not set | |
| 892 | 965 | CONFIG_KEYBOARD_TWL4030=y |
| 893 | 966 | # CONFIG_KEYBOARD_XTKBD is not set |
| 894 | 967 | CONFIG_INPUT_MOUSE=y |
| @@ -914,6 +987,7 @@ CONFIG_TOUCHSCREEN_ADS7846=y · 19 unmodified lines | ||
| 914 | 987 | # CONFIG_TOUCHSCREEN_AD7879_I2C is not set |
| 915 | 988 | # CONFIG_TOUCHSCREEN_AD7879_SPI is not set |
| 916 | 989 | # CONFIG_TOUCHSCREEN_AD7879 is not set |
| 990 | +# CONFIG_TOUCHSCREEN_DYNAPRO is not set | |
| 917 | 991 | # CONFIG_TOUCHSCREEN_EETI is not set |
| 918 | 992 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 919 | 993 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| @@ -948,6 +1022,7 @@ CONFIG_SERIO=y · 28 unmodified lines | ||
| 948 | 1022 | CONFIG_SERIO_SERPORT=y |
| 949 | 1023 | CONFIG_SERIO_LIBPS2=y |
| 950 | 1024 | # CONFIG_SERIO_RAW is not set |
| 1025 | +# CONFIG_SERIO_ALTERA_PS2 is not set | |
| 951 | 1026 | # CONFIG_GAMEPORT is not set |
| 952 | 1027 | |
| 953 | 1028 | # |
| @@ -986,6 +1061,7 @@ CONFIG_UNIX98_PTYS=y · 32 unmodified lines | ||
| 986 | 1061 | # CONFIG_IPMI_HANDLER is not set |
| 987 | 1062 | CONFIG_HW_RANDOM=y |
| 988 | 1063 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set |
| 1064 | +CONFIG_HW_RANDOM_OMAP=y | |
| 989 | 1065 | # CONFIG_R3964 is not set |
| 990 | 1066 | # CONFIG_RAW_DRIVER is not set |
| 991 | 1067 | # CONFIG_TCG_TPM is not set |
| @@ -1024,7 +1100,6 @@ CONFIG_I2C_OMAP=y · 32 unmodified lines | ||
| 1024 | 1100 | # |
| 1025 | 1101 | # Miscellaneous I2C Chip support |
| 1026 | 1102 | # |
| 1027 | −# CONFIG_DS1682 is not set | |
| 1028 | 1103 | # CONFIG_SENSORS_TSL2550 is not set |
| 1029 | 1104 | # CONFIG_I2C_DEBUG_CORE is not set |
| 1030 | 1105 | # CONFIG_I2C_DEBUG_ALGO is not set |
| @@ -1040,6 +1115,8 @@ CONFIG_SPI_MASTER=y · 9 unmodified lines | ||
| 1040 | 1115 | # CONFIG_SPI_BITBANG is not set |
| 1041 | 1116 | # CONFIG_SPI_GPIO is not set |
| 1042 | 1117 | CONFIG_SPI_OMAP24XX=y |
| 1118 | +# CONFIG_SPI_XILINX is not set | |
| 1119 | +# CONFIG_SPI_DESIGNWARE is not set | |
| 1043 | 1120 | |
| 1044 | 1121 | # |
| 1045 | 1122 | # SPI Protocol Masters |
| @@ -1067,6 +1144,7 @@ CONFIG_GPIO_SYSFS=y · 21 unmodified lines | ||
| 1067 | 1144 | # CONFIG_GPIO_PCA953X is not set |
| 1068 | 1145 | # CONFIG_GPIO_PCF857X is not set |
| 1069 | 1146 | CONFIG_GPIO_TWL4030=y |
| 1147 | +# CONFIG_GPIO_ADP5588 is not set | |
| 1070 | 1148 | |
| 1071 | 1149 | # |
| 1072 | 1150 | # PCI GPIO expanders: |
| @@ -1141,6 +1219,7 @@ CONFIG_HWMON=y · 68 unmodified lines | ||
| 1141 | 1219 | # CONFIG_SENSORS_IT87 is not set |
| 1142 | 1220 | # CONFIG_SENSORS_LM63 is not set |
| 1143 | 1221 | # CONFIG_SENSORS_LM70 is not set |
| 1222 | +# CONFIG_SENSORS_LM73 is not set | |
| 1144 | 1223 | # CONFIG_SENSORS_LM75 is not set |
| 1145 | 1224 | # CONFIG_SENSORS_LM77 is not set |
| 1146 | 1225 | # CONFIG_SENSORS_LM78 is not set |
| @@ -1166,6 +1245,7 @@ CONFIG_HWMON=y · 19 unmodified lines | ||
| 1166 | 1245 | # CONFIG_SENSORS_SMSC47M192 is not set |
| 1167 | 1246 | # CONFIG_SENSORS_SMSC47B397 is not set |
| 1168 | 1247 | # CONFIG_SENSORS_ADS7828 is not set |
| 1248 | +# CONFIG_SENSORS_AMC6821 is not set | |
| 1169 | 1249 | # CONFIG_SENSORS_THMC50 is not set |
| 1170 | 1250 | # CONFIG_SENSORS_TMP401 is not set |
| 1171 | 1251 | # CONFIG_SENSORS_TMP421 is not set |
| @@ -1179,6 +1259,7 @@ CONFIG_HWMON=y · 7 unmodified lines | ||
| 1179 | 1259 | # CONFIG_SENSORS_W83627HF is not set |
| 1180 | 1260 | # CONFIG_SENSORS_W83627EHF is not set |
| 1181 | 1261 | # CONFIG_SENSORS_LIS3_SPI is not set |
| 1262 | +# CONFIG_SENSORS_LIS3_I2C is not set | |
| 1182 | 1263 | # CONFIG_THERMAL is not set |
| 1183 | 1264 | CONFIG_WATCHDOG=y |
| 1184 | 1265 | CONFIG_WATCHDOG_NOWAYOUT=y |
| @@ -1204,20 +1285,22 @@ CONFIG_SSB_POSSIBLE=y · 19 unmodified lines | ||
| 1204 | 1285 | # |
| 1205 | 1286 | # Multifunction device drivers |
| 1206 | 1287 | # |
| 1207 | −# CONFIG_MFD_CORE is not set | |
| 1288 | +CONFIG_MFD_CORE=y | |
| 1208 | 1289 | # CONFIG_MFD_SM501 is not set |
| 1209 | 1290 | # CONFIG_MFD_ASIC3 is not set |
| 1210 | 1291 | # CONFIG_HTC_EGPIO is not set |
| 1211 | 1292 | # CONFIG_HTC_PASIC3 is not set |
| 1212 | 1293 | # CONFIG_TPS65010 is not set |
| 1294 | +# CONFIG_MENELAUS is not set | |
| 1213 | 1295 | CONFIG_TWL4030_CORE=y |
| 1214 | 1296 | # CONFIG_TWL4030_POWER is not set |
| 1215 | −# CONFIG_TWL4030_CODEC is not set | |
| 1297 | +CONFIG_TWL4030_CODEC=y | |
| 1216 | 1298 | # CONFIG_MFD_TMIO is not set |
| 1217 | 1299 | # CONFIG_MFD_T7L66XB is not set |
| 1218 | 1300 | # CONFIG_MFD_TC6387XB is not set |
| 1219 | 1301 | # CONFIG_MFD_TC6393XB is not set |
| 1220 | 1302 | # CONFIG_PMIC_DA903X is not set |
| 1303 | +# CONFIG_PMIC_ADP5520 is not set | |
| 1221 | 1304 | # CONFIG_MFD_WM8400 is not set |
| 1222 | 1305 | # CONFIG_MFD_WM831X is not set |
| 1223 | 1306 | # CONFIG_MFD_WM8350_I2C is not set |
| @@ -1225,6 +1308,8 @@ CONFIG_TWL4030_CORE=y · 1 unmodified line | ||
| 1225 | 1308 | # CONFIG_MFD_MC13783 is not set |
| 1226 | 1309 | # CONFIG_AB3100_CORE is not set |
| 1227 | 1310 | # CONFIG_EZX_PCAP is not set |
| 1311 | +# CONFIG_MFD_88PM8607 is not set | |
| 1312 | +# CONFIG_AB4500_CORE is not set | |
| 1228 | 1313 | CONFIG_REGULATOR=y |
| 1229 | 1314 | # CONFIG_REGULATOR_DEBUG is not set |
| 1230 | 1315 | CONFIG_REGULATOR_FIXED_VOLTAGE=y |
| @@ -1232,6 +1317,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y · 1 unmodified line | ||
| 1232 | 1317 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set |
| 1233 | 1318 | # CONFIG_REGULATOR_BQ24022 is not set |
| 1234 | 1319 | # CONFIG_REGULATOR_MAX1586 is not set |
| 1320 | +# CONFIG_REGULATOR_MAX8660 is not set | |
| 1235 | 1321 | CONFIG_REGULATOR_TWL4030=y |
| 1236 | 1322 | # CONFIG_REGULATOR_LP3971 is not set |
| 1237 | 1323 | # CONFIG_REGULATOR_TPS65023 is not set |
| @@ -1267,6 +1353,7 @@ CONFIG_FB_TILEBLITTING=y · 29 unmodified lines | ||
| 1267 | 1353 | # |
| 1268 | 1354 | # CONFIG_FB_UVESA is not set |
| 1269 | 1355 | # CONFIG_FB_S1D13XXX is not set |
| 1356 | +# CONFIG_FB_TMIO is not set | |
| 1270 | 1357 | # CONFIG_FB_VIRTUAL is not set |
| 1271 | 1358 | # CONFIG_FB_METRONOME is not set |
| 1272 | 1359 | # CONFIG_FB_MB862XX is not set |
| @@ -1281,6 +1368,7 @@ CONFIG_FB_OMAP_079M3R=y · 8 unmodified lines | ||
| 1281 | 1368 | # CONFIG_FB_OMAP_LCD_MIPID is not set |
| 1282 | 1369 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set |
| 1283 | 1370 | CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2 |
| 1371 | +# CONFIG_OMAP2_DSS is not set | |
| 1284 | 1372 | CONFIG_BACKLIGHT_LCD_SUPPORT=y |
| 1285 | 1373 | CONFIG_LCD_CLASS_DEVICE=y |
| 1286 | 1374 | # CONFIG_LCD_LMS283GF05 is not set |
| @@ -1364,12 +1452,15 @@ CONFIG_SND_USB_AUDIO=y · 77 unmodified lines | ||
| 1364 | 1452 | CONFIG_SND_SOC=y |
| 1365 | 1453 | CONFIG_SND_OMAP_SOC=y |
| 1366 | 1454 | CONFIG_SND_OMAP_SOC_MCBSP=y |
| 1455 | +# CONFIG_SND_OMAP_SOC_N810 is not set | |
| 1367 | 1456 | # CONFIG_SND_OMAP_SOC_OVERO is not set |
| 1368 | 1457 | # CONFIG_SND_OMAP_SOC_OMAP3EVM is not set |
| 1458 | +# CONFIG_SND_OMAP_SOC_AM3517EVM is not set | |
| 1369 | 1459 | # CONFIG_SND_OMAP_SOC_SDP3430 is not set |
| 1370 | 1460 | CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y |
| 1371 | 1461 | # CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE is not set |
| 1372 | 1462 | # CONFIG_SND_OMAP_SOC_ZOOM2 is not set |
| 1463 | +# CONFIG_SND_OMAP_SOC_IGEP0020 is not set | |
| 1373 | 1464 | CONFIG_SND_SOC_I2C_AND_SPI=y |
| 1374 | 1465 | # CONFIG_SND_SOC_ALL_CODECS is not set |
| 1375 | 1466 | CONFIG_SND_SOC_TWL4030=y |
| @@ -1418,7 +1509,7 @@ CONFIG_USB_HID=y · 42 unmodified lines | ||
| 1418 | 1509 | CONFIG_USB_SUPPORT=y |
| 1419 | 1510 | CONFIG_USB_ARCH_HAS_HCD=y |
| 1420 | 1511 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 1421 | −# CONFIG_USB_ARCH_HAS_EHCI is not set | |
| 1512 | +CONFIG_USB_ARCH_HAS_EHCI=y | |
| 1422 | 1513 | CONFIG_USB=y |
| 1423 | 1514 | CONFIG_USB_DEBUG=y |
| 1424 | 1515 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y |
| @@ -1441,6 +1532,7 @@ CONFIG_USB_MON=y · 16 unmodified lines | ||
| 1441 | 1532 | # USB Host Controller Drivers |
| 1442 | 1533 | # |
| 1443 | 1534 | # CONFIG_USB_C67X00_HCD is not set |
| 1535 | +# CONFIG_USB_EHCI_HCD is not set | |
| 1444 | 1536 | # CONFIG_USB_OXU210HP_HCD is not set |
| 1445 | 1537 | # CONFIG_USB_ISP116X_HCD is not set |
| 1446 | 1538 | # CONFIG_USB_ISP1760_HCD is not set |
| @@ -1556,16 +1648,18 @@ CONFIG_USB_GADGET_SELECTED=y · 109 unmodified lines | ||
| 1556 | 1648 | # CONFIG_USB_GADGET_LANGWELL is not set |
| 1557 | 1649 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 1558 | 1650 | CONFIG_USB_GADGET_DUALSPEED=y |
| 1559 | −CONFIG_USB_ZERO=y | |
| 1651 | +CONFIG_USB_ZERO=m | |
| 1560 | 1652 | # CONFIG_USB_ZERO_HNPTEST is not set |
| 1561 | 1653 | # CONFIG_USB_AUDIO is not set |
| 1562 | 1654 | # CONFIG_USB_ETH is not set |
| 1563 | 1655 | # CONFIG_USB_GADGETFS is not set |
| 1564 | 1656 | # CONFIG_USB_FILE_STORAGE is not set |
| 1657 | +# CONFIG_USB_MASS_STORAGE is not set | |
| 1565 | 1658 | # CONFIG_USB_G_SERIAL is not set |
| 1566 | 1659 | # CONFIG_USB_MIDI_GADGET is not set |
| 1567 | 1660 | # CONFIG_USB_G_PRINTER is not set |
| 1568 | 1661 | # CONFIG_USB_CDC_COMPOSITE is not set |
| 1662 | +# CONFIG_USB_G_MULTI is not set | |
| 1569 | 1663 | |
| 1570 | 1664 | # |
| 1571 | 1665 | # OTG and related infrastructure |
| @@ -1573,6 +1667,7 @@ CONFIG_USB_ZERO=y · 1 unmodified line | ||
| 1573 | 1667 | CONFIG_USB_OTG_UTILS=y |
| 1574 | 1668 | # CONFIG_USB_GPIO_VBUS is not set |
| 1575 | 1669 | # CONFIG_ISP1301_OMAP is not set |
| 1670 | +# CONFIG_USB_ULPI is not set | |
| 1576 | 1671 | CONFIG_TWL4030_USB=y |
| 1577 | 1672 | CONFIG_NOP_USB_XCEIV=y |
| 1578 | 1673 | CONFIG_MMC=y |
| @@ -1609,7 +1704,9 @@ CONFIG_LEDS_GPIO_PLATFORM=y · 30 unmodified lines | ||
| 1609 | 1704 | # CONFIG_LEDS_LP3944 is not set |
| 1610 | 1705 | # CONFIG_LEDS_PCA955X is not set |
| 1611 | 1706 | # CONFIG_LEDS_DAC124S085 is not set |
| 1707 | +# CONFIG_LEDS_REGULATOR is not set | |
| 1612 | 1708 | # CONFIG_LEDS_BD2802 is not set |
| 1709 | +# CONFIG_LEDS_LT3593 is not set | |
| 1613 | 1710 | |
| 1614 | 1711 | # |
| 1615 | 1712 | # LED Triggers |
| @@ -1653,6 +1750,7 @@ CONFIG_RTC_INTF_DEV=y · 37 unmodified lines | ||
| 1653 | 1750 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 1654 | 1751 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1655 | 1752 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1753 | +# CONFIG_RTC_DRV_BQ32K is not set | |
| 1656 | 1754 | CONFIG_RTC_DRV_TWL4030=y |
| 1657 | 1755 | # CONFIG_RTC_DRV_S35390A is not set |
| 1658 | 1756 | # CONFIG_RTC_DRV_FM3130 is not set |
| @@ -1683,7 +1781,9 @@ CONFIG_RTC_DRV_TWL4030=y · 24 unmodified lines | ||
| 1683 | 1781 | # CONFIG_RTC_DRV_M48T86 is not set |
| 1684 | 1782 | # CONFIG_RTC_DRV_M48T35 is not set |
| 1685 | 1783 | # CONFIG_RTC_DRV_M48T59 is not set |
| 1784 | +# CONFIG_RTC_DRV_MSM6242 is not set | |
| 1686 | 1785 | # CONFIG_RTC_DRV_BQ4802 is not set |
| 1786 | +# CONFIG_RTC_DRV_RP5C01 is not set | |
| 1687 | 1787 | # CONFIG_RTC_DRV_V3020 is not set |
| 1688 | 1788 | |
| 1689 | 1789 | # |
| @@ -1951,6 +2051,7 @@ CONFIG_DEBUG_INFO=y · 261 unmodified lines | ||
| 1951 | 2051 | # CONFIG_LKDTM is not set |
| 1952 | 2052 | # CONFIG_FAULT_INJECTION is not set |
| 1953 | 2053 | # CONFIG_LATENCYTOP is not set |
| 2054 | +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | |
| 1954 | 2055 | # CONFIG_PAGE_POISONING is not set |
| 1955 | 2056 | CONFIG_NOP_TRACER=y |
| 1956 | 2057 | CONFIG_HAVE_FUNCTION_TRACER=y |
| @@ -1983,7 +2084,9 @@ CONFIG_ARM_UNWIND=y · 26 unmodified lines | ||
| 1983 | 2084 | # CONFIG_DEBUG_ERRORS is not set |
| 1984 | 2085 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1985 | 2086 | CONFIG_DEBUG_LL=y |
| 2087 | +# CONFIG_EARLY_PRINTK is not set | |
| 1986 | 2088 | # CONFIG_DEBUG_ICEDCC is not set |
| 2089 | +# CONFIG_OC_ETM is not set | |
| 1987 | 2090 | |
| 1988 | 2091 | # |
| 1989 | 2092 | # Security options |
| @@ -1993,9 +2096,12 @@ CONFIG_SECURITY=y · 3 unmodified lines | ||
| 1993 | 2096 | # CONFIG_SECURITYFS is not set |
| 1994 | 2097 | # CONFIG_SECURITY_NETWORK is not set |
| 1995 | 2098 | # CONFIG_SECURITY_PATH is not set |
| 1996 | −# CONFIG_SECURITY_FILE_CAPABILITIES is not set | |
| 1997 | −# CONFIG_SECURITY_ROOTPLUG is not set | |
| 1998 | 2099 | # CONFIG_SECURITY_TOMOYO is not set |
| 2100 | +# CONFIG_DEFAULT_SECURITY_SELINUX is not set | |
| 2101 | +# CONFIG_DEFAULT_SECURITY_SMACK is not set | |
| 2102 | +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set | |
| 2103 | +CONFIG_DEFAULT_SECURITY_DAC=y | |
| 2104 | +CONFIG_DEFAULT_SECURITY="" | |
| 1999 | 2105 | CONFIG_CRYPTO=y |
| 2000 | 2106 | |
| 2001 | 2107 | # |
| @@ -187,6 +187,8 @@ CONFIG_ARCH_OMAP3=y · 186 unmodified lines | ||
| 187 | 187 | # |
| 188 | 188 | # OMAP Feature Selections |
| 189 | 189 | # |
| 190 | +CONFIG_OMAP_SMARTREFLEX=y | |
| 191 | +# CONFIG_OMAP_SMARTREFLEX_TESTING is not set | |
| 190 | 192 | # CONFIG_OMAP_DEBUG_POWERDOMAIN is not set |
| 191 | 193 | # CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set |
| 192 | 194 | CONFIG_OMAP_RESET_CLOCKS=y |
| @@ -333,7 +335,7 @@ CONFIG_BINFMT_MISC=y · 140 unmodified lines | ||
| 333 | 335 | # Power management options |
| 334 | 336 | # |
| 335 | 337 | CONFIG_PM=y |
| 336 | −# CONFIG_PM_DEBUG is not set | |
| 338 | +CONFIG_PM_DEBUG=y | |
| 337 | 339 | CONFIG_PM_SLEEP=y |
| 338 | 340 | CONFIG_SUSPEND=y |
| 339 | 341 | CONFIG_SUSPEND_FREEZER=y |
| @@ -1339,7 +1341,7 @@ CONFIG_ENABLE_MUST_CHECK=y · 999 unmodified lines | ||
| 1339 | 1341 | CONFIG_FRAME_WARN=1024 |
| 1340 | 1342 | CONFIG_MAGIC_SYSRQ=y |
| 1341 | 1343 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1342 | −# CONFIG_DEBUG_FS is not set | |
| 1344 | +CONFIG_DEBUG_FS=y | |
| 1343 | 1345 | # CONFIG_HEADERS_CHECK is not set |
| 1344 | 1346 | CONFIG_DEBUG_KERNEL=y |
| 1345 | 1347 | # CONFIG_DEBUG_SHIRQ is not set |
| @@ -1,15 +1,14 @@ | ||
| 1 | 1 | # |
| 2 | 2 | # Automatically generated make config: don't edit |
| 3 | −# Linux kernel version: 2.6.28-rc7 | |
| 4 | −# Fri Dec 5 11:54:09 2008 | |
| 3 | +# Linux kernel version: 2.6.33-rc6 | |
| 4 | +# Sat Feb 6 20:25:41 2010 | |
| 5 | 5 | # |
| 6 | 6 | CONFIG_ARM=y |
| 7 | 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y |
| 8 | 8 | CONFIG_GENERIC_GPIO=y |
| 9 | 9 | CONFIG_GENERIC_TIME=y |
| 10 | 10 | CONFIG_GENERIC_CLOCKEVENTS=y |
| 11 | −CONFIG_MMU=y | |
| 12 | −# CONFIG_NO_IOPORT is not set | |
| 11 | +CONFIG_HAVE_PROC_CPU=y | |
| 13 | 12 | CONFIG_GENERIC_HARDIRQS=y |
| 14 | 13 | CONFIG_STACKTRACE_SUPPORT=y |
| 15 | 14 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y |
| @@ -18,13 +17,13 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y · 2 unmodified lines | ||
| 18 | 17 | CONFIG_HARDIRQS_SW_RESEND=y |
| 19 | 18 | CONFIG_GENERIC_IRQ_PROBE=y |
| 20 | 19 | CONFIG_RWSEM_GENERIC_SPINLOCK=y |
| 21 | −# CONFIG_ARCH_HAS_ILOG2_U32 is not set | |
| 22 | −# CONFIG_ARCH_HAS_ILOG2_U64 is not set | |
| 20 | +CONFIG_ARCH_HAS_CPUFREQ=y | |
| 23 | 21 | CONFIG_GENERIC_HWEIGHT=y |
| 24 | 22 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
| 25 | 23 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
| 26 | 24 | CONFIG_VECTORS_BASE=0xffff0000 |
| 27 | 25 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" |
| 26 | +CONFIG_CONSTRUCTORS=y | |
| 28 | 27 | |
| 29 | 28 | # |
| 30 | 29 | # General setup |
| @@ -32,8 +31,15 @@ CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" · 1 unmodified line | ||
| 32 | 31 | CONFIG_EXPERIMENTAL=y |
| 33 | 32 | CONFIG_BROKEN_ON_SMP=y |
| 34 | 33 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
| 34 | +CONFIG_CROSS_COMPILE="" | |
| 35 | 35 | CONFIG_LOCALVERSION="" |
| 36 | 36 | CONFIG_LOCALVERSION_AUTO=y |
| 37 | +CONFIG_HAVE_KERNEL_GZIP=y | |
| 38 | +CONFIG_HAVE_KERNEL_LZO=y | |
| 39 | +CONFIG_KERNEL_GZIP=y | |
| 40 | +# CONFIG_KERNEL_BZIP2 is not set | |
| 41 | +# CONFIG_KERNEL_LZMA is not set | |
| 42 | +# CONFIG_KERNEL_LZO is not set | |
| 37 | 43 | CONFIG_SWAP=y |
| 38 | 44 | CONFIG_SYSVIPC=y |
| 39 | 45 | CONFIG_SYSVIPC_SYSCTL=y |
| @@ -42,24 +48,33 @@ CONFIG_BSD_PROCESS_ACCT=y · 2 unmodified lines | ||
| 42 | 48 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set |
| 43 | 49 | # CONFIG_TASKSTATS is not set |
| 44 | 50 | # CONFIG_AUDIT is not set |
| 51 | + | |
| 52 | +# | |
| 53 | +# RCU Subsystem | |
| 54 | +# | |
| 55 | +CONFIG_TREE_RCU=y | |
| 56 | +# CONFIG_TREE_PREEMPT_RCU is not set | |
| 57 | +# CONFIG_TINY_RCU is not set | |
| 58 | +# CONFIG_RCU_TRACE is not set | |
| 59 | +CONFIG_RCU_FANOUT=32 | |
| 60 | +# CONFIG_RCU_FANOUT_EXACT is not set | |
| 61 | +# CONFIG_TREE_RCU_TRACE is not set | |
| 45 | 62 | CONFIG_IKCONFIG=y |
| 46 | 63 | CONFIG_IKCONFIG_PROC=y |
| 47 | 64 | CONFIG_LOG_BUF_SHIFT=14 |
| 48 | 65 | # CONFIG_CGROUPS is not set |
| 49 | −CONFIG_GROUP_SCHED=y | |
| 50 | −CONFIG_FAIR_GROUP_SCHED=y | |
| 51 | −# CONFIG_RT_GROUP_SCHED is not set | |
| 52 | −CONFIG_USER_SCHED=y | |
| 53 | −# CONFIG_CGROUP_SCHED is not set | |
| 54 | −# CONFIG_SYSFS_DEPRECATED=y is not set | |
| 55 | −# CONFIG_SYSFS_DEPRECATED_V2=y is not set | |
| 56 | − | |
| 66 | +# CONFIG_SYSFS_DEPRECATED_V2 is not set | |
| 57 | 67 | # CONFIG_RELAY is not set |
| 58 | 68 | # CONFIG_NAMESPACES is not set |
| 59 | 69 | CONFIG_BLK_DEV_INITRD=y |
| 60 | 70 | CONFIG_INITRAMFS_SOURCE="" |
| 71 | +CONFIG_RD_GZIP=y | |
| 72 | +# CONFIG_RD_BZIP2 is not set | |
| 73 | +# CONFIG_RD_LZMA is not set | |
| 74 | +# CONFIG_RD_LZO is not set | |
| 61 | 75 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y |
| 62 | 76 | CONFIG_SYSCTL=y |
| 77 | +CONFIG_ANON_INODES=y | |
| 63 | 78 | CONFIG_EMBEDDED=y |
| 64 | 79 | CONFIG_UID16=y |
| 65 | 80 | # CONFIG_SYSCTL_SYSCALL is not set |
| @@ -70,31 +85,41 @@ CONFIG_HOTPLUG=y · 4 unmodified lines | ||
| 70 | 85 | CONFIG_PRINTK=y |
| 71 | 86 | CONFIG_BUG=y |
| 72 | 87 | CONFIG_ELF_CORE=y |
| 73 | −CONFIG_COMPAT_BRK=y | |
| 74 | 88 | CONFIG_BASE_FULL=y |
| 75 | 89 | CONFIG_FUTEX=y |
| 76 | −CONFIG_ANON_INODES=y | |
| 77 | 90 | CONFIG_EPOLL=y |
| 78 | 91 | CONFIG_SIGNALFD=y |
| 79 | 92 | CONFIG_TIMERFD=y |
| 80 | 93 | CONFIG_EVENTFD=y |
| 81 | 94 | CONFIG_SHMEM=y |
| 82 | 95 | CONFIG_AIO=y |
| 96 | +CONFIG_HAVE_PERF_EVENTS=y | |
| 97 | +CONFIG_PERF_USE_VMALLOC=y | |
| 98 | + | |
| 99 | +# | |
| 100 | +# Kernel Performance Events And Counters | |
| 101 | +# | |
| 102 | +# CONFIG_PERF_EVENTS is not set | |
| 103 | +# CONFIG_PERF_COUNTERS is not set | |
| 83 | 104 | CONFIG_VM_EVENT_COUNTERS=y |
| 105 | +CONFIG_COMPAT_BRK=y | |
| 84 | 106 | CONFIG_SLAB=y |
| 85 | 107 | # CONFIG_SLUB is not set |
| 86 | 108 | # CONFIG_SLOB is not set |
| 87 | 109 | # CONFIG_PROFILING is not set |
| 88 | −# CONFIG_MARKERS is not set | |
| 89 | 110 | CONFIG_HAVE_OPROFILE=y |
| 90 | 111 | # CONFIG_KPROBES is not set |
| 91 | 112 | CONFIG_HAVE_KPROBES=y |
| 92 | 113 | CONFIG_HAVE_KRETPROBES=y |
| 93 | 114 | CONFIG_HAVE_CLK=y |
| 115 | + | |
| 116 | +# | |
| 117 | +# GCOV-based kernel profiling | |
| 118 | +# | |
| 119 | +CONFIG_SLOW_WORK=y | |
| 94 | 120 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
| 95 | 121 | CONFIG_SLABINFO=y |
| 96 | 122 | CONFIG_RT_MUTEXES=y |
| 97 | −# CONFIG_TINY_SHMEM is not set | |
| 98 | 123 | CONFIG_BASE_SMALL=0 |
| 99 | 124 | CONFIG_MODULES=y |
| 100 | 125 | # CONFIG_MODULE_FORCE_LOAD is not set |
| @@ -102,11 +127,8 @@ CONFIG_MODULE_UNLOAD=y · 1 unmodified line | ||
| 102 | 127 | # CONFIG_MODULE_FORCE_UNLOAD is not set |
| 103 | 128 | CONFIG_MODVERSIONS=y |
| 104 | 129 | CONFIG_MODULE_SRCVERSION_ALL=y |
| 105 | −CONFIG_KMOD=y | |
| 106 | 130 | CONFIG_BLOCK=y |
| 107 | −# CONFIG_LBD is not set | |
| 108 | −# CONFIG_BLK_DEV_IO_TRACE is not set | |
| 109 | −# CONFIG_LSF is not set | |
| 131 | +CONFIG_LBDAF=y | |
| 110 | 132 | # CONFIG_BLK_DEV_BSG is not set |
| 111 | 133 | # CONFIG_BLK_DEV_INTEGRITY is not set |
| 112 | 134 | |
| @@ -114,33 +136,62 @@ CONFIG_BLOCK=y · 1 unmodified line | ||
| 114 | 136 | # IO Schedulers |
| 115 | 137 | # |
| 116 | 138 | CONFIG_IOSCHED_NOOP=y |
| 117 | −CONFIG_IOSCHED_AS=y | |
| 118 | 139 | CONFIG_IOSCHED_DEADLINE=y |
| 119 | 140 | CONFIG_IOSCHED_CFQ=y |
| 120 | −CONFIG_DEFAULT_AS=y | |
| 121 | 141 | # CONFIG_DEFAULT_DEADLINE is not set |
| 122 | −# CONFIG_DEFAULT_CFQ is not set | |
| 142 | +CONFIG_DEFAULT_CFQ=y | |
| 123 | 143 | # CONFIG_DEFAULT_NOOP is not set |
| 124 | −CONFIG_DEFAULT_IOSCHED="anticipatory" | |
| 125 | −CONFIG_CLASSIC_RCU=y | |
| 144 | +CONFIG_DEFAULT_IOSCHED="cfq" | |
| 145 | +# CONFIG_INLINE_SPIN_TRYLOCK is not set | |
| 146 | +# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | |
| 147 | +# CONFIG_INLINE_SPIN_LOCK is not set | |
| 148 | +# CONFIG_INLINE_SPIN_LOCK_BH is not set | |
| 149 | +# CONFIG_INLINE_SPIN_LOCK_IRQ is not set | |
| 150 | +# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | |
| 151 | +CONFIG_INLINE_SPIN_UNLOCK=y | |
| 152 | +# CONFIG_INLINE_SPIN_UNLOCK_BH is not set | |
| 153 | +CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | |
| 154 | +# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | |
| 155 | +# CONFIG_INLINE_READ_TRYLOCK is not set | |
| 156 | +# CONFIG_INLINE_READ_LOCK is not set | |
| 157 | +# CONFIG_INLINE_READ_LOCK_BH is not set | |
| 158 | +# CONFIG_INLINE_READ_LOCK_IRQ is not set | |
| 159 | +# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | |
| 160 | +CONFIG_INLINE_READ_UNLOCK=y | |
| 161 | +# CONFIG_INLINE_READ_UNLOCK_BH is not set | |
| 162 | +CONFIG_INLINE_READ_UNLOCK_IRQ=y | |
| 163 | +# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | |
| 164 | +# CONFIG_INLINE_WRITE_TRYLOCK is not set | |
| 165 | +# CONFIG_INLINE_WRITE_LOCK is not set | |
| 166 | +# CONFIG_INLINE_WRITE_LOCK_BH is not set | |
| 167 | +# CONFIG_INLINE_WRITE_LOCK_IRQ is not set | |
| 168 | +# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | |
| 169 | +CONFIG_INLINE_WRITE_UNLOCK=y | |
| 170 | +# CONFIG_INLINE_WRITE_UNLOCK_BH is not set | |
| 171 | +CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | |
| 172 | +# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | |
| 173 | +# CONFIG_MUTEX_SPIN_ON_OWNER is not set | |
| 126 | 174 | # CONFIG_FREEZER is not set |
| 127 | 175 | |
| 128 | 176 | # |
| 129 | 177 | # System Type |
| 130 | 178 | # |
| 179 | +CONFIG_MMU=y | |
| 131 | 180 | # CONFIG_ARCH_AAEC2000 is not set |
| 132 | 181 | # CONFIG_ARCH_INTEGRATOR is not set |
| 133 | 182 | # CONFIG_ARCH_REALVIEW is not set |
| 134 | 183 | # CONFIG_ARCH_VERSATILE is not set |
| 135 | 184 | # CONFIG_ARCH_AT91 is not set |
| 136 | −# CONFIG_ARCH_CLPS7500 is not set | |
| 137 | 185 | # CONFIG_ARCH_CLPS711X is not set |
| 186 | +# CONFIG_ARCH_GEMINI is not set | |
| 138 | 187 | # CONFIG_ARCH_EBSA110 is not set |
| 139 | 188 | # CONFIG_ARCH_EP93XX is not set |
| 140 | 189 | # CONFIG_ARCH_FOOTBRIDGE is not set |
| 190 | +# CONFIG_ARCH_MXC is not set | |
| 191 | +# CONFIG_ARCH_STMP3XXX is not set | |
| 141 | 192 | # CONFIG_ARCH_NETX is not set |
| 142 | 193 | # CONFIG_ARCH_H720X is not set |
| 143 | −# CONFIG_ARCH_IMX is not set | |
| 194 | +# CONFIG_ARCH_NOMADIK is not set | |
| 144 | 195 | # CONFIG_ARCH_IOP13XX is not set |
| 145 | 196 | # CONFIG_ARCH_IOP32X is not set |
| 146 | 197 | # CONFIG_ARCH_IOP33X is not set |
| @@ -148,49 +199,58 @@ CONFIG_CLASSIC_RCU=y · 1 unmodified line | ||
| 148 | 199 | # CONFIG_ARCH_IXP2000 is not set |
| 149 | 200 | # CONFIG_ARCH_IXP4XX is not set |
| 150 | 201 | # CONFIG_ARCH_L7200 is not set |
| 202 | +# CONFIG_ARCH_DOVE is not set | |
| 151 | 203 | # CONFIG_ARCH_KIRKWOOD is not set |
| 152 | −# CONFIG_ARCH_KS8695 is not set | |
| 153 | −# CONFIG_ARCH_NS9XXX is not set | |
| 154 | 204 | # CONFIG_ARCH_LOKI is not set |
| 155 | 205 | # CONFIG_ARCH_MV78XX0 is not set |
| 156 | −# CONFIG_ARCH_MXC is not set | |
| 157 | 206 | # CONFIG_ARCH_ORION5X is not set |
| 207 | +# CONFIG_ARCH_MMP is not set | |
| 208 | +# CONFIG_ARCH_KS8695 is not set | |
| 209 | +# CONFIG_ARCH_NS9XXX is not set | |
| 210 | +# CONFIG_ARCH_W90X900 is not set | |
| 211 | +# CONFIG_ARCH_NUC93X is not set | |
| 158 | 212 | # CONFIG_ARCH_PNX4008 is not set |
| 159 | 213 | # CONFIG_ARCH_PXA is not set |
| 214 | +# CONFIG_ARCH_MSM is not set | |
| 160 | 215 | # CONFIG_ARCH_RPC is not set |
| 161 | 216 | # CONFIG_ARCH_SA1100 is not set |
| 162 | 217 | # CONFIG_ARCH_S3C2410 is not set |
| 218 | +# CONFIG_ARCH_S3C64XX is not set | |
| 219 | +# CONFIG_ARCH_S5P6440 is not set | |
| 220 | +# CONFIG_ARCH_S5PC1XX is not set | |
| 163 | 221 | # CONFIG_ARCH_SHARK is not set |
| 164 | 222 | # CONFIG_ARCH_LH7A40X is not set |
| 223 | +# CONFIG_ARCH_U300 is not set | |
| 165 | 224 | # CONFIG_ARCH_DAVINCI is not set |
| 166 | 225 | CONFIG_ARCH_OMAP=y |
| 167 | −# CONFIG_ARCH_MSM is not set | |
| 226 | +# CONFIG_ARCH_BCMRING is not set | |
| 227 | +# CONFIG_ARCH_U8500 is not set | |
| 168 | 228 | |
| 169 | 229 | # |
| 170 | 230 | # TI OMAP Implementations |
| 171 | 231 | # |
| 172 | 232 | CONFIG_ARCH_OMAP_OTG=y |
| 173 | 233 | # CONFIG_ARCH_OMAP1 is not set |
| 234 | +CONFIG_ARCH_OMAP2PLUS=y | |
| 174 | 235 | # CONFIG_ARCH_OMAP2 is not set |
| 175 | 236 | CONFIG_ARCH_OMAP3=y |
| 237 | +# CONFIG_ARCH_OMAP4 is not set | |
| 176 | 238 | |
| 177 | 239 | # |
| 178 | 240 | # OMAP Feature Selections |
| 179 | 241 | # |
| 180 | −# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set | |
| 181 | −# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set | |
| 182 | 242 | # CONFIG_OMAP_RESET_CLOCKS is not set |
| 183 | 243 | # CONFIG_OMAP_MUX is not set |
| 184 | 244 | CONFIG_OMAP_MCBSP=y |
| 245 | +# CONFIG_OMAP_MBOX_FWK is not set | |
| 185 | 246 | # CONFIG_OMAP_MPU_TIMER is not set |
| 186 | 247 | CONFIG_OMAP_32K_TIMER=y |
| 187 | 248 | CONFIG_OMAP_32K_TIMER_HZ=128 |
| 188 | 249 | CONFIG_OMAP_DM_TIMER=y |
| 189 | −# CONFIG_OMAP_LL_DEBUG_UART1 is not set | |
| 190 | −# CONFIG_OMAP_LL_DEBUG_UART2 is not set | |
| 191 | −CONFIG_OMAP_LL_DEBUG_UART3=y | |
| 192 | −CONFIG_ARCH_OMAP34XX=y | |
| 250 | +# CONFIG_OMAP_PM_NONE is not set | |
| 251 | +CONFIG_OMAP_PM_NOOP=y | |
| 193 | 252 | CONFIG_ARCH_OMAP3430=y |
| 253 | +CONFIG_OMAP_PACKAGE_CBB=y | |
| 194 | 254 | |
| 195 | 255 | # |
| 196 | 256 | # OMAP Board Type |
| @@ -198,15 +258,19 @@ CONFIG_ARCH_OMAP3430=y · 1 unmodified line | ||
| 198 | 258 | # CONFIG_MACH_OMAP3_BEAGLE is not set |
| 199 | 259 | # CONFIG_MACH_OMAP_LDP is not set |
| 200 | 260 | # CONFIG_MACH_OVERO is not set |
| 261 | +# CONFIG_MACH_OMAP3EVM is not set | |
| 262 | +# CONFIG_MACH_OMAP3517EVM is not set | |
| 201 | 263 | CONFIG_MACH_OMAP3_PANDORA=y |
| 202 | − | |
| 203 | −# | |
| 204 | −# Boot options | |
| 205 | −# | |
| 206 | − | |
| 207 | −# | |
| 208 | −# Power management | |
| 209 | −# | |
| 264 | +# CONFIG_MACH_OMAP3_TOUCHBOOK is not set | |
| 265 | +# CONFIG_MACH_OMAP_3430SDP is not set | |
| 266 | +# CONFIG_MACH_NOKIA_RX51 is not set | |
| 267 | +# CONFIG_MACH_OMAP_ZOOM2 is not set | |
| 268 | +# CONFIG_MACH_OMAP_ZOOM3 is not set | |
| 269 | +# CONFIG_MACH_CM_T35 is not set | |
| 270 | +# CONFIG_MACH_IGEP0020 is not set | |
| 271 | +# CONFIG_MACH_OMAP_3630SDP is not set | |
| 272 | +# CONFIG_OMAP3_EMU is not set | |
| 273 | +# CONFIG_OMAP3_SDRC_AC_TIMING is not set | |
| 210 | 274 | |
| 211 | 275 | # |
| 212 | 276 | # Processor Type |
| @@ -215,7 +279,7 @@ CONFIG_CPU_32v6K=y · 2 unmodified lines | ||
| 215 | 279 | CONFIG_CPU_V7=y |
| 216 | 280 | CONFIG_CPU_32v7=y |
| 217 | 281 | CONFIG_CPU_ABRT_EV7=y |
| 218 | −CONFIG_CPU_PABRT_IFAR=y | |
| 282 | +CONFIG_CPU_PABRT_V7=y | |
| 219 | 283 | CONFIG_CPU_CACHE_V7=y |
| 220 | 284 | CONFIG_CPU_CACHE_VIPT=y |
| 221 | 285 | CONFIG_CPU_COPY_V6=y |
| @@ -233,7 +297,12 @@ CONFIG_ARM_THUMBEE=y · 11 unmodified lines | ||
| 233 | 297 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 234 | 298 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 235 | 299 | CONFIG_HAS_TLS_REG=y |
| 236 | −# CONFIG_OUTER_CACHE is not set | |
| 300 | +CONFIG_ARM_L1_CACHE_SHIFT=6 | |
| 301 | +CONFIG_CPU_HAS_PMU=y | |
| 302 | +# CONFIG_ARM_ERRATA_430973 is not set | |
| 303 | +# CONFIG_ARM_ERRATA_458693 is not set | |
| 304 | +# CONFIG_ARM_ERRATA_460075 is not set | |
| 305 | +CONFIG_COMMON_CLKDEV=y | |
| 237 | 306 | |
| 238 | 307 | # |
| 239 | 308 | # Bus support |
| @@ -253,13 +322,16 @@ CONFIG_VMSPLIT_3G=y · 13 unmodified lines | ||
| 253 | 322 | # CONFIG_VMSPLIT_2G is not set |
| 254 | 323 | # CONFIG_VMSPLIT_1G is not set |
| 255 | 324 | CONFIG_PAGE_OFFSET=0xC0000000 |
| 325 | +# CONFIG_PREEMPT_NONE is not set | |
| 326 | +CONFIG_PREEMPT_VOLUNTARY=y | |
| 256 | 327 | # CONFIG_PREEMPT is not set |
| 257 | 328 | CONFIG_HZ=128 |
| 329 | +# CONFIG_THUMB2_KERNEL is not set | |
| 258 | 330 | CONFIG_AEABI=y |
| 259 | 331 | CONFIG_OABI_COMPAT=y |
| 260 | −CONFIG_ARCH_FLATMEM_HAS_HOLES=y | |
| 261 | 332 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set |
| 262 | 333 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set |
| 334 | +# CONFIG_HIGHMEM is not set | |
| 263 | 335 | CONFIG_SELECT_MEMORY_MODEL=y |
| 264 | 336 | CONFIG_FLATMEM_MANUAL=y |
| 265 | 337 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
| @@ -268,13 +340,14 @@ CONFIG_FLATMEM=y · 2 unmodified lines | ||
| 268 | 340 | CONFIG_FLAT_NODE_MEM_MAP=y |
| 269 | 341 | CONFIG_PAGEFLAGS_EXTENDED=y |
| 270 | 342 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
| 271 | −# CONFIG_RESOURCES_64BIT is not set | |
| 272 | 343 | # CONFIG_PHYS_ADDR_T_64BIT is not set |
| 273 | 344 | CONFIG_ZONE_DMA_FLAG=0 |
| 274 | 345 | CONFIG_VIRT_TO_BUS=y |
| 275 | −CONFIG_UNEVICTABLE_LRU=y | |
| 346 | +# CONFIG_KSM is not set | |
| 347 | +CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | |
| 276 | 348 | # CONFIG_LEDS is not set |
| 277 | 349 | CONFIG_ALIGNMENT_TRAP=y |
| 350 | +# CONFIG_UACCESS_WITH_MEMCPY is not set | |
| 278 | 351 | |
| 279 | 352 | # |
| 280 | 353 | # Boot options |
| @@ -366,6 +439,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" · 85 unmodified lines | ||
| 366 | 439 | # CONFIG_NETFILTER is not set |
| 367 | 440 | # CONFIG_IP_DCCP is not set |
| 368 | 441 | # CONFIG_IP_SCTP is not set |
| 442 | +# CONFIG_RDS is not set | |
| 369 | 443 | # CONFIG_TIPC is not set |
| 370 | 444 | # CONFIG_ATM is not set |
| 371 | 445 | # CONFIG_BRIDGE is not set |
| @@ -379,7 +453,10 @@ CONFIG_DEFAULT_TCP_CONG="cubic" · 7 unmodified lines | ||
| 379 | 453 | # CONFIG_LAPB is not set |
| 380 | 454 | # CONFIG_ECONET is not set |
| 381 | 455 | # CONFIG_WAN_ROUTER is not set |
| 456 | +# CONFIG_PHONET is not set | |
| 457 | +# CONFIG_IEEE802154 is not set | |
| 382 | 458 | # CONFIG_NET_SCHED is not set |
| 459 | +# CONFIG_DCB is not set | |
| 383 | 460 | |
| 384 | 461 | # |
| 385 | 462 | # Network testing |
| @@ -390,8 +467,14 @@ CONFIG_DEFAULT_TCP_CONG="cubic" · 4 unmodified lines | ||
| 390 | 467 | # CONFIG_IRDA is not set |
| 391 | 468 | # CONFIG_BT is not set |
| 392 | 469 | # CONFIG_AF_RXRPC is not set |
| 393 | −# CONFIG_PHONET is not set | |
| 394 | −# CONFIG_WIRELESS is not set | |
| 470 | +CONFIG_WIRELESS=y | |
| 471 | +# CONFIG_CFG80211 is not set | |
| 472 | +# CONFIG_LIB80211 is not set | |
| 473 | + | |
| 474 | +# | |
| 475 | +# CFG80211 needs to be enabled for MAC80211 | |
| 476 | +# | |
| 477 | +# CONFIG_WIMAX is not set | |
| 395 | 478 | # CONFIG_RFKILL is not set |
| 396 | 479 | # CONFIG_NET_9P is not set |
| 397 | 480 | |
| @@ -403,6 +486,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic" · 5 unmodified lines | ||
| 403 | 486 | # Generic Driver Options |
| 404 | 487 | # |
| 405 | 488 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
| 489 | +CONFIG_DEVTMPFS=y | |
| 490 | +CONFIG_DEVTMPFS_MOUNT=y | |
| 406 | 491 | CONFIG_STANDALONE=y |
| 407 | 492 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
| 408 | 493 | # CONFIG_FW_LOADER is not set |
| @@ -412,6 +497,7 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y · 3 unmodified lines | ||
| 412 | 497 | # CONFIG_CONNECTOR is not set |
| 413 | 498 | CONFIG_MTD=y |
| 414 | 499 | # CONFIG_MTD_DEBUG is not set |
| 500 | +# CONFIG_MTD_TESTS is not set | |
| 415 | 501 | # CONFIG_MTD_CONCAT is not set |
| 416 | 502 | CONFIG_MTD_PARTITIONS=y |
| 417 | 503 | # CONFIG_MTD_REDBOOT_PARTS is not set |
| @@ -462,6 +548,7 @@ CONFIG_MTD_CFI_I2=y · 44 unmodified lines | ||
| 462 | 548 | # |
| 463 | 549 | # CONFIG_MTD_DATAFLASH is not set |
| 464 | 550 | # CONFIG_MTD_M25P80 is not set |
| 551 | +# CONFIG_MTD_SST25L is not set | |
| 465 | 552 | # CONFIG_MTD_SLRAM is not set |
| 466 | 553 | # CONFIG_MTD_PHRAM is not set |
| 467 | 554 | # CONFIG_MTD_MTDRAM is not set |
| @@ -478,6 +565,9 @@ CONFIG_MTD_NAND=y · 10 unmodified lines | ||
| 478 | 565 | # CONFIG_MTD_NAND_ECC_SMC is not set |
| 479 | 566 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set |
| 480 | 567 | # CONFIG_MTD_NAND_GPIO is not set |
| 568 | +CONFIG_MTD_NAND_OMAP2=y | |
| 569 | +CONFIG_MTD_NAND_OMAP_PREFETCH=y | |
| 570 | +# CONFIG_MTD_NAND_OMAP_PREFETCH_DMA is not set | |
| 481 | 571 | CONFIG_MTD_NAND_IDS=y |
| 482 | 572 | # CONFIG_MTD_NAND_DISKONCHIP is not set |
| 483 | 573 | # CONFIG_MTD_NAND_NANDSIM is not set |
| @@ -485,6 +575,11 @@ CONFIG_MTD_NAND_IDS=y · 1 unmodified line | ||
| 485 | 575 | # CONFIG_MTD_ALAUDA is not set |
| 486 | 576 | # CONFIG_MTD_ONENAND is not set |
| 487 | 577 | |
| 578 | +# | |
| 579 | +# LPDDR flash memory drivers | |
| 580 | +# | |
| 581 | +# CONFIG_MTD_LPDDR is not set | |
| 582 | + | |
| 488 | 583 | # |
| 489 | 584 | # UBI - Unsorted block images |
| 490 | 585 | # |
| @@ -494,6 +589,10 @@ CONFIG_BLK_DEV=y · 3 unmodified lines | ||
| 494 | 589 | # CONFIG_BLK_DEV_COW_COMMON is not set |
| 495 | 590 | CONFIG_BLK_DEV_LOOP=y |
| 496 | 591 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set |
| 592 | + | |
| 593 | +# | |
| 594 | +# DRBD disabled because PROC_FS, INET or CONNECTOR not selected | |
| 595 | +# | |
| 497 | 596 | # CONFIG_BLK_DEV_NBD is not set |
| 498 | 597 | # CONFIG_BLK_DEV_UB is not set |
| 499 | 598 | CONFIG_BLK_DEV_RAM=y |
| @@ -502,7 +601,25 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 · 2 unmodified lines | ||
| 502 | 601 | # CONFIG_BLK_DEV_XIP is not set |
| 503 | 602 | # CONFIG_CDROM_PKTCDVD is not set |
| 504 | 603 | # CONFIG_ATA_OVER_ETH is not set |
| 505 | −# CONFIG_MISC_DEVICES is not set | |
| 604 | +# CONFIG_MG_DISK is not set | |
| 605 | +CONFIG_MISC_DEVICES=y | |
| 606 | +# CONFIG_AD525X_DPOT is not set | |
| 607 | +# CONFIG_ICS932S401 is not set | |
| 608 | +# CONFIG_ENCLOSURE_SERVICES is not set | |
| 609 | +# CONFIG_ISL29003 is not set | |
| 610 | +# CONFIG_DS1682 is not set | |
| 611 | +# CONFIG_TI_DAC7512 is not set | |
| 612 | +# CONFIG_C2PORT is not set | |
| 613 | + | |
| 614 | +# | |
| 615 | +# EEPROM support | |
| 616 | +# | |
| 617 | +# CONFIG_EEPROM_AT24 is not set | |
| 618 | +# CONFIG_EEPROM_AT25 is not set | |
| 619 | +# CONFIG_EEPROM_LEGACY is not set | |
| 620 | +# CONFIG_EEPROM_MAX6875 is not set | |
| 621 | +# CONFIG_EEPROM_93CX6 is not set | |
| 622 | +# CONFIG_IWMC3200TOP is not set | |
| 506 | 623 | CONFIG_HAVE_IDE=y |
| 507 | 624 | # CONFIG_IDE is not set |
| 508 | 625 | |
| @@ -525,10 +642,6 @@ CONFIG_BLK_DEV_SD=y · 16 unmodified lines | ||
| 525 | 642 | # CONFIG_BLK_DEV_SR is not set |
| 526 | 643 | # CONFIG_CHR_DEV_SG is not set |
| 527 | 644 | # CONFIG_CHR_DEV_SCH is not set |
| 528 | − | |
| 529 | −# | |
| 530 | −# Some SCSI devices (e.g. CD jukebox) support multiple LUNs | |
| 531 | −# | |
| 532 | 645 | # CONFIG_SCSI_MULTI_LUN is not set |
| 533 | 646 | # CONFIG_SCSI_CONSTANTS is not set |
| 534 | 647 | # CONFIG_SCSI_LOGGING is not set |
| @@ -545,8 +658,11 @@ CONFIG_SCSI_WAIT_SCAN=m · 10 unmodified lines | ||
| 545 | 658 | # CONFIG_SCSI_SRP_ATTRS is not set |
| 546 | 659 | CONFIG_SCSI_LOWLEVEL=y |
| 547 | 660 | # CONFIG_ISCSI_TCP is not set |
| 661 | +# CONFIG_LIBFC is not set | |
| 662 | +# CONFIG_LIBFCOE is not set | |
| 548 | 663 | # CONFIG_SCSI_DEBUG is not set |
| 549 | 664 | # CONFIG_SCSI_DH is not set |
| 665 | +# CONFIG_SCSI_OSD_INITIATOR is not set | |
| 550 | 666 | # CONFIG_ATA is not set |
| 551 | 667 | # CONFIG_MD is not set |
| 552 | 668 | CONFIG_NETDEVICES=y |
| @@ -559,13 +675,13 @@ CONFIG_NETDEVICES=y · 6 unmodified lines | ||
| 559 | 675 | # CONFIG_NET_ETHERNET is not set |
| 560 | 676 | # CONFIG_NETDEV_1000 is not set |
| 561 | 677 | # CONFIG_NETDEV_10000 is not set |
| 678 | +CONFIG_WLAN=y | |
| 679 | +# CONFIG_USB_ZD1201 is not set | |
| 680 | +# CONFIG_HOSTAP is not set | |
| 562 | 681 | |
| 563 | 682 | # |
| 564 | −# Wireless LAN | |
| 683 | +# Enable WiMAX (Networking options) to see the WiMAX drivers | |
| 565 | 684 | # |
| 566 | −# CONFIG_WLAN_PRE80211 is not set | |
| 567 | −# CONFIG_WLAN_80211 is not set | |
| 568 | −# CONFIG_IWLWIFI_LEDS is not set | |
| 569 | 685 | |
| 570 | 686 | # |
| 571 | 687 | # USB Network Adapters |
| @@ -582,6 +698,7 @@ CONFIG_NETDEVICES=y · 10 unmodified lines | ||
| 582 | 698 | # CONFIG_NETPOLL is not set |
| 583 | 699 | # CONFIG_NET_POLL_CONTROLLER is not set |
| 584 | 700 | # CONFIG_ISDN is not set |
| 701 | +# CONFIG_PHONE is not set | |
| 585 | 702 | |
| 586 | 703 | # |
| 587 | 704 | # Input device support |
| @@ -589,6 +706,7 @@ CONFIG_NETDEVICES=y · 1 unmodified line | ||
| 589 | 706 | CONFIG_INPUT=y |
| 590 | 707 | # CONFIG_INPUT_FF_MEMLESS is not set |
| 591 | 708 | # CONFIG_INPUT_POLLDEV is not set |
| 709 | +# CONFIG_INPUT_SPARSEKMAP is not set | |
| 592 | 710 | |
| 593 | 711 | # |
| 594 | 712 | # Userland interfaces |
| @@ -605,13 +723,20 @@ CONFIG_INPUT_EVDEV=y · 10 unmodified lines | ||
| 605 | 723 | # Input Device Drivers |
| 606 | 724 | # |
| 607 | 725 | CONFIG_INPUT_KEYBOARD=y |
| 726 | +# CONFIG_KEYBOARD_ADP5588 is not set | |
| 608 | 727 | # CONFIG_KEYBOARD_ATKBD is not set |
| 609 | −# CONFIG_KEYBOARD_SUNKBD is not set | |
| 728 | +# CONFIG_QT2160 is not set | |
| 610 | 729 | # CONFIG_KEYBOARD_LKKBD is not set |
| 611 | −# CONFIG_KEYBOARD_XTKBD is not set | |
| 730 | +CONFIG_KEYBOARD_GPIO=y | |
| 731 | +# CONFIG_KEYBOARD_MATRIX is not set | |
| 732 | +# CONFIG_KEYBOARD_LM8323 is not set | |
| 733 | +# CONFIG_KEYBOARD_MAX7359 is not set | |
| 612 | 734 | # CONFIG_KEYBOARD_NEWTON is not set |
| 735 | +# CONFIG_KEYBOARD_OPENCORES is not set | |
| 613 | 736 | # CONFIG_KEYBOARD_STOWAWAY is not set |
| 614 | −CONFIG_KEYBOARD_GPIO=y | |
| 737 | +# CONFIG_KEYBOARD_SUNKBD is not set | |
| 738 | +CONFIG_KEYBOARD_TWL4030=y | |
| 739 | +# CONFIG_KEYBOARD_XTKBD is not set | |
| 615 | 740 | CONFIG_INPUT_MOUSE=y |
| 616 | 741 | # CONFIG_MOUSE_PS2 is not set |
| 617 | 742 | # CONFIG_MOUSE_SERIAL is not set |
| @@ -619,13 +744,22 @@ CONFIG_INPUT_MOUSE=y · 1 unmodified line | ||
| 619 | 744 | # CONFIG_MOUSE_BCM5974 is not set |
| 620 | 745 | # CONFIG_MOUSE_VSXXXAA is not set |
| 621 | 746 | # CONFIG_MOUSE_GPIO is not set |
| 747 | +# CONFIG_MOUSE_SYNAPTICS_I2C is not set | |
| 622 | 748 | # CONFIG_INPUT_JOYSTICK is not set |
| 623 | 749 | # CONFIG_INPUT_TABLET is not set |
| 624 | 750 | CONFIG_INPUT_TOUCHSCREEN=y |
| 625 | 751 | CONFIG_TOUCHSCREEN_ADS7846=y |
| 752 | +# CONFIG_TOUCHSCREEN_AD7877 is not set | |
| 753 | +# CONFIG_TOUCHSCREEN_AD7879_I2C is not set | |
| 754 | +# CONFIG_TOUCHSCREEN_AD7879_SPI is not set | |
| 755 | +# CONFIG_TOUCHSCREEN_AD7879 is not set | |
| 756 | +# CONFIG_TOUCHSCREEN_DYNAPRO is not set | |
| 757 | +# CONFIG_TOUCHSCREEN_EETI is not set | |
| 626 | 758 | # CONFIG_TOUCHSCREEN_FUJITSU is not set |
| 627 | 759 | # CONFIG_TOUCHSCREEN_GUNZE is not set |
| 628 | 760 | # CONFIG_TOUCHSCREEN_ELO is not set |
| 761 | +# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | |
| 762 | +# CONFIG_TOUCHSCREEN_MCS5000 is not set | |
| 629 | 763 | # CONFIG_TOUCHSCREEN_MTOUCH is not set |
| 630 | 764 | # CONFIG_TOUCHSCREEN_INEXIO is not set |
| 631 | 765 | # CONFIG_TOUCHSCREEN_MK712 is not set |
| @@ -634,8 +768,18 @@ CONFIG_TOUCHSCREEN_ADS7846=y · 2 unmodified lines | ||
| 634 | 768 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set |
| 635 | 769 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set |
| 636 | 770 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set |
| 771 | +# CONFIG_TOUCHSCREEN_TSC2007 is not set | |
| 772 | +# CONFIG_TOUCHSCREEN_W90X900 is not set | |
| 637 | 773 | CONFIG_INPUT_MISC=y |
| 774 | +# CONFIG_INPUT_ATI_REMOTE is not set | |
| 775 | +# CONFIG_INPUT_ATI_REMOTE2 is not set | |
| 776 | +# CONFIG_INPUT_KEYSPAN_REMOTE is not set | |
| 777 | +# CONFIG_INPUT_POWERMATE is not set | |
| 778 | +# CONFIG_INPUT_YEALINK is not set | |
| 779 | +# CONFIG_INPUT_CM109 is not set | |
| 638 | 780 | CONFIG_INPUT_TWL4030_PWRBUTTON=y |
| 781 | +# CONFIG_INPUT_UINPUT is not set | |
| 782 | +# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | |
| 639 | 783 | |
| 640 | 784 | # |
| 641 | 785 | # Hardware I/O ports |
| @@ -670,18 +814,21 @@ CONFIG_SERIAL_8250_RSA=y · 28 unmodified lines | ||
| 670 | 814 | # |
| 671 | 815 | # Non-8250 serial port support |
| 672 | 816 | # |
| 817 | +# CONFIG_SERIAL_MAX3100 is not set | |
| 673 | 818 | CONFIG_SERIAL_CORE=y |
| 674 | 819 | CONFIG_SERIAL_CORE_CONSOLE=y |
| 675 | 820 | CONFIG_UNIX98_PTYS=y |
| 821 | +# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | |
| 676 | 822 | # CONFIG_LEGACY_PTYS is not set |
| 677 | 823 | # CONFIG_IPMI_HANDLER is not set |
| 678 | 824 | CONFIG_HW_RANDOM=y |
| 679 | −# CONFIG_NVRAM is not set | |
| 825 | +# CONFIG_HW_RANDOM_TIMERIOMEM is not set | |
| 680 | 826 | # CONFIG_R3964 is not set |
| 681 | 827 | # CONFIG_RAW_DRIVER is not set |
| 682 | 828 | # CONFIG_TCG_TPM is not set |
| 683 | 829 | CONFIG_I2C=y |
| 684 | 830 | CONFIG_I2C_BOARDINFO=y |
| 831 | +CONFIG_I2C_COMPAT=y | |
| 685 | 832 | CONFIG_I2C_CHARDEV=y |
| 686 | 833 | CONFIG_I2C_HELPER_AUTO=y |
| 687 | 834 | |
| @@ -692,10 +839,12 @@ CONFIG_I2C_HELPER_AUTO=y · 4 unmodified lines | ||
| 692 | 839 | # |
| 693 | 840 | # I2C system bus drivers (mostly embedded / system-on-chip) |
| 694 | 841 | # |
| 842 | +# CONFIG_I2C_DESIGNWARE is not set | |
| 695 | 843 | # CONFIG_I2C_GPIO is not set |
| 696 | 844 | # CONFIG_I2C_OCORES is not set |
| 697 | 845 | CONFIG_I2C_OMAP=y |
| 698 | 846 | # CONFIG_I2C_SIMTEC is not set |
| 847 | +# CONFIG_I2C_XILINX is not set | |
| 699 | 848 | |
| 700 | 849 | # |
| 701 | 850 | # External I2C/SMBus adapter drivers |
| @@ -709,21 +858,6 @@ CONFIG_I2C_OMAP=y · 7 unmodified lines | ||
| 709 | 858 | # |
| 710 | 859 | # CONFIG_I2C_PCA_PLATFORM is not set |
| 711 | 860 | # CONFIG_I2C_STUB is not set |
| 712 | − | |
| 713 | −# | |
| 714 | −# Miscellaneous I2C Chip support | |
| 715 | −# | |
| 716 | −# CONFIG_DS1682 is not set | |
| 717 | −# CONFIG_EEPROM_AT24 is not set | |
| 718 | −# CONFIG_EEPROM_LEGACY is not set | |
| 719 | −# CONFIG_SENSORS_PCF8574 is not set | |
| 720 | −# CONFIG_PCF8575 is not set | |
| 721 | −# CONFIG_SENSORS_PCA9539 is not set | |
| 722 | −# CONFIG_SENSORS_PCF8591 is not set | |
| 723 | −# CONFIG_ISP1301_OMAP is not set | |
| 724 | −# CONFIG_TPS65010 is not set | |
| 725 | −# CONFIG_SENSORS_MAX6875 is not set | |
| 726 | −# CONFIG_SENSORS_TSL2550 is not set | |
| 727 | 861 | # CONFIG_I2C_DEBUG_CORE is not set |
| 728 | 862 | # CONFIG_I2C_DEBUG_ALGO is not set |
| 729 | 863 | # CONFIG_I2C_DEBUG_BUS is not set |
| @@ -736,14 +870,21 @@ CONFIG_SPI_MASTER=y · 6 unmodified lines | ||
| 736 | 870 | # SPI Master Controller Drivers |
| 737 | 871 | # |
| 738 | 872 | # CONFIG_SPI_BITBANG is not set |
| 873 | +# CONFIG_SPI_GPIO is not set | |
| 739 | 874 | CONFIG_SPI_OMAP24XX=y |
| 875 | +# CONFIG_SPI_XILINX is not set | |
| 876 | +# CONFIG_SPI_DESIGNWARE is not set | |
| 740 | 877 | |
| 741 | 878 | # |
| 742 | 879 | # SPI Protocol Masters |
| 743 | 880 | # |
| 744 | −# CONFIG_EEPROM_AT25 is not set | |
| 745 | 881 | # CONFIG_SPI_SPIDEV is not set |
| 746 | 882 | # CONFIG_SPI_TLE62X0 is not set |
| 883 | + | |
| 884 | +# | |
| 885 | +# PPS support | |
| 886 | +# | |
| 887 | +# CONFIG_PPS is not set | |
| 747 | 888 | CONFIG_ARCH_REQUIRE_GPIOLIB=y |
| 748 | 889 | CONFIG_GPIOLIB=y |
| 749 | 890 | # CONFIG_DEBUG_GPIO is not set |
| @@ -760,6 +901,7 @@ CONFIG_GPIOLIB=y · 10 unmodified lines | ||
| 760 | 901 | # CONFIG_GPIO_PCA953X is not set |
| 761 | 902 | # CONFIG_GPIO_PCF857X is not set |
| 762 | 903 | CONFIG_GPIO_TWL4030=y |
| 904 | +# CONFIG_GPIO_ADP5588 is not set | |
| 763 | 905 | |
| 764 | 906 | # |
| 765 | 907 | # PCI GPIO expanders: |
| @@ -770,11 +912,16 @@ CONFIG_GPIO_TWL4030=y · 4 unmodified lines | ||
| 770 | 912 | # |
| 771 | 913 | # CONFIG_GPIO_MAX7301 is not set |
| 772 | 914 | # CONFIG_GPIO_MCP23S08 is not set |
| 915 | +# CONFIG_GPIO_MC33880 is not set | |
| 916 | + | |
| 917 | +# | |
| 918 | +# AC97 GPIO expanders: | |
| 919 | +# | |
| 773 | 920 | # CONFIG_W1 is not set |
| 774 | 921 | # CONFIG_POWER_SUPPLY is not set |
| 775 | 922 | # CONFIG_HWMON is not set |
| 923 | +# CONFIG_ALS is not set | |
| 776 | 924 | # CONFIG_THERMAL is not set |
| 777 | −# CONFIG_THERMAL_HWMON is not set | |
| 778 | 925 | # CONFIG_WATCHDOG is not set |
| 779 | 926 | CONFIG_SSB_POSSIBLE=y |
| 780 | 927 | |
| @@ -786,44 +933,111 @@ CONFIG_SSB_POSSIBLE=y · 5 unmodified lines | ||
| 786 | 933 | # |
| 787 | 934 | # Multifunction device drivers |
| 788 | 935 | # |
| 789 | −# CONFIG_MFD_CORE is not set | |
| 936 | +CONFIG_MFD_CORE=y | |
| 937 | +# CONFIG_MFD_88PM860X is not set | |
| 790 | 938 | # CONFIG_MFD_SM501 is not set |
| 791 | 939 | # CONFIG_MFD_ASIC3 is not set |
| 792 | 940 | # CONFIG_HTC_EGPIO is not set |
| 793 | 941 | # CONFIG_HTC_PASIC3 is not set |
| 942 | +# CONFIG_HTC_I2CPLD is not set | |
| 943 | +# CONFIG_TPS65010 is not set | |
| 794 | 944 | CONFIG_TWL4030_CORE=y |
| 945 | +CONFIG_TWL4030_POWER=y | |
| 946 | +CONFIG_TWL4030_CODEC=y | |
| 795 | 947 | # CONFIG_MFD_TMIO is not set |
| 796 | 948 | # CONFIG_MFD_T7L66XB is not set |
| 797 | 949 | # CONFIG_MFD_TC6387XB is not set |
| 798 | 950 | # CONFIG_MFD_TC6393XB is not set |
| 799 | 951 | # CONFIG_PMIC_DA903X is not set |
| 952 | +# CONFIG_PMIC_ADP5520 is not set | |
| 953 | +# CONFIG_MFD_MAX8925 is not set | |
| 800 | 954 | # CONFIG_MFD_WM8400 is not set |
| 955 | +# CONFIG_MFD_WM831X is not set | |
| 801 | 956 | # CONFIG_MFD_WM8350_I2C is not set |
| 802 | − | |
| 803 | −# | |
| 804 | −# Multimedia devices | |
| 805 | −# | |
| 806 | − | |
| 807 | −# | |
| 808 | −# Multimedia core support | |
| 809 | −# | |
| 810 | −# CONFIG_VIDEO_DEV is not set | |
| 811 | −# CONFIG_DVB_CORE is not set | |
| 812 | −# CONFIG_VIDEO_MEDIA is not set | |
| 813 | − | |
| 814 | −# | |
| 815 | −# Multimedia drivers | |
| 816 | −# | |
| 817 | −CONFIG_DAB=y | |
| 818 | −# CONFIG_USB_DABUSB is not set | |
| 957 | +# CONFIG_MFD_WM8994 is not set | |
| 958 | +# CONFIG_MFD_PCF50633 is not set | |
| 959 | +# CONFIG_MFD_MC13783 is not set | |
| 960 | +# CONFIG_AB3100_CORE is not set | |
| 961 | +# CONFIG_EZX_PCAP is not set | |
| 962 | +# CONFIG_AB4500_CORE is not set | |
| 963 | +CONFIG_REGULATOR=y | |
| 964 | +CONFIG_REGULATOR_DEBUG=y | |
| 965 | +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set | |
| 966 | +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | |
| 967 | +# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | |
| 968 | +# CONFIG_REGULATOR_BQ24022 is not set | |
| 969 | +# CONFIG_REGULATOR_MAX1586 is not set | |
| 970 | +# CONFIG_REGULATOR_MAX8649 is not set | |
| 971 | +# CONFIG_REGULATOR_MAX8660 is not set | |
| 972 | +CONFIG_REGULATOR_TWL4030=y | |
| 973 | +# CONFIG_REGULATOR_LP3971 is not set | |
| 974 | +# CONFIG_REGULATOR_TPS65023 is not set | |
| 975 | +# CONFIG_REGULATOR_TPS6507X is not set | |
| 976 | +# CONFIG_MEDIA_SUPPORT is not set | |
| 819 | 977 | |
| 820 | 978 | # |
| 821 | 979 | # Graphics support |
| 822 | 980 | # |
| 823 | 981 | # CONFIG_VGASTATE is not set |
| 824 | −# CONFIG_VIDEO_OUTPUT_CONTROL is not set | |
| 825 | −# CONFIG_FB is not set | |
| 826 | −# CONFIG_BACKLIGHT_LCD_SUPPORT is not set | |
| 982 | +CONFIG_VIDEO_OUTPUT_CONTROL=y | |
| 983 | +CONFIG_FB=y | |
| 984 | +# CONFIG_FIRMWARE_EDID is not set | |
| 985 | +# CONFIG_FB_DDC is not set | |
| 986 | +# CONFIG_FB_BOOT_VESA_SUPPORT is not set | |
| 987 | +CONFIG_FB_CFB_FILLRECT=y | |
| 988 | +CONFIG_FB_CFB_COPYAREA=y | |
| 989 | +CONFIG_FB_CFB_IMAGEBLIT=y | |
| 990 | +# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | |
| 991 | +# CONFIG_FB_SYS_FILLRECT is not set | |
| 992 | +# CONFIG_FB_SYS_COPYAREA is not set | |
| 993 | +# CONFIG_FB_SYS_IMAGEBLIT is not set | |
| 994 | +# CONFIG_FB_FOREIGN_ENDIAN is not set | |
| 995 | +# CONFIG_FB_SYS_FOPS is not set | |
| 996 | +# CONFIG_FB_SVGALIB is not set | |
| 997 | +# CONFIG_FB_MACMODES is not set | |
| 998 | +# CONFIG_FB_BACKLIGHT is not set | |
| 999 | +# CONFIG_FB_MODE_HELPERS is not set | |
| 1000 | +# CONFIG_FB_TILEBLITTING is not set | |
| 1001 | + | |
| 1002 | +# | |
| 1003 | +# Frame buffer hardware drivers | |
| 1004 | +# | |
| 1005 | +# CONFIG_FB_S1D13XXX is not set | |
| 1006 | +# CONFIG_FB_TMIO is not set | |
| 1007 | +# CONFIG_FB_VIRTUAL is not set | |
| 1008 | +# CONFIG_FB_METRONOME is not set | |
| 1009 | +# CONFIG_FB_MB862XX is not set | |
| 1010 | +# CONFIG_FB_BROADSHEET is not set | |
| 1011 | +# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | |
| 1012 | +CONFIG_OMAP2_VRAM=y | |
| 1013 | +CONFIG_OMAP2_VRFB=y | |
| 1014 | +CONFIG_OMAP2_DSS=y | |
| 1015 | +CONFIG_OMAP2_VRAM_SIZE=0 | |
| 1016 | +CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y | |
| 1017 | +# CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set | |
| 1018 | +# CONFIG_OMAP2_DSS_RFBI is not set | |
| 1019 | +CONFIG_OMAP2_DSS_VENC=y | |
| 1020 | +# CONFIG_OMAP2_DSS_SDI is not set | |
| 1021 | +# CONFIG_OMAP2_DSS_DSI is not set | |
| 1022 | +# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | |
| 1023 | +CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 | |
| 1024 | +CONFIG_FB_OMAP2=y | |
| 1025 | +CONFIG_FB_OMAP2_DEBUG_SUPPORT=y | |
| 1026 | +# CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE is not set | |
| 1027 | +CONFIG_FB_OMAP2_NUM_FBS=3 | |
| 1028 | + | |
| 1029 | +# | |
| 1030 | +# OMAP2/3 Display Device Drivers | |
| 1031 | +# | |
| 1032 | +# CONFIG_PANEL_GENERIC is not set | |
| 1033 | +# CONFIG_PANEL_SHARP_LS037V7DW01 is not set | |
| 1034 | +# CONFIG_PANEL_SHARP_LQ043T1DG01 is not set | |
| 1035 | +# CONFIG_PANEL_TOPPOLY_TDO35S is not set | |
| 1036 | +CONFIG_PANEL_TPO_TD043MTEA1=y | |
| 1037 | +CONFIG_BACKLIGHT_LCD_SUPPORT=y | |
| 1038 | +# CONFIG_LCD_CLASS_DEVICE is not set | |
| 1039 | +CONFIG_BACKLIGHT_CLASS_DEVICE=y | |
| 1040 | +CONFIG_BACKLIGHT_GENERIC=y | |
| 827 | 1041 | |
| 828 | 1042 | # |
| 829 | 1043 | # Display device support |
| @@ -835,6 +1049,16 @@ CONFIG_DAB=y · 5 unmodified lines | ||
| 835 | 1049 | # |
| 836 | 1050 | # CONFIG_VGA_CONSOLE is not set |
| 837 | 1051 | CONFIG_DUMMY_CONSOLE=y |
| 1052 | +CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 1053 | +# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | |
| 1054 | +# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | |
| 1055 | +# CONFIG_FONTS is not set | |
| 1056 | +CONFIG_FONT_8x8=y | |
| 1057 | +CONFIG_FONT_8x16=y | |
| 1058 | +CONFIG_LOGO=y | |
| 1059 | +CONFIG_LOGO_LINUX_MONO=y | |
| 1060 | +CONFIG_LOGO_LINUX_VGA16=y | |
| 1061 | +CONFIG_LOGO_LINUX_CLUT224=y | |
| 838 | 1062 | CONFIG_SOUND=y |
| 839 | 1063 | CONFIG_SOUND_OSS_CORE=y |
| 840 | 1064 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y |
| @@ -842,25 +1066,43 @@ CONFIG_SND=y · 1 unmodified line | ||
| 842 | 1066 | CONFIG_SND_TIMER=y |
| 843 | 1067 | CONFIG_SND_PCM=y |
| 844 | 1068 | CONFIG_SND_JACK=y |
| 1069 | +# CONFIG_SND_SEQUENCER is not set | |
| 845 | 1070 | CONFIG_SND_OSSEMUL=y |
| 846 | 1071 | CONFIG_SND_MIXER_OSS=y |
| 847 | 1072 | CONFIG_SND_PCM_OSS=y |
| 848 | 1073 | CONFIG_SND_PCM_OSS_PLUGINS=y |
| 1074 | +# CONFIG_SND_HRTIMER is not set | |
| 1075 | +# CONFIG_SND_DYNAMIC_MINORS is not set | |
| 849 | 1076 | CONFIG_SND_SUPPORT_OLD_API=y |
| 850 | 1077 | CONFIG_SND_VERBOSE_PROCFS=y |
| 851 | 1078 | CONFIG_SND_VERBOSE_PRINTK=y |
| 1079 | +# CONFIG_SND_DEBUG is not set | |
| 1080 | +# CONFIG_SND_RAWMIDI_SEQ is not set | |
| 1081 | +# CONFIG_SND_OPL3_LIB_SEQ is not set | |
| 1082 | +# CONFIG_SND_OPL4_LIB_SEQ is not set | |
| 1083 | +# CONFIG_SND_SBAWE_SEQ is not set | |
| 1084 | +# CONFIG_SND_EMU10K1_SEQ is not set | |
| 852 | 1085 | CONFIG_SND_DRIVERS=y |
| 1086 | +# CONFIG_SND_DUMMY is not set | |
| 1087 | +# CONFIG_SND_MTPAV is not set | |
| 1088 | +# CONFIG_SND_SERIAL_U16550 is not set | |
| 1089 | +# CONFIG_SND_MPU401 is not set | |
| 1090 | +CONFIG_SND_ARM=y | |
| 1091 | +CONFIG_SND_SPI=y | |
| 853 | 1092 | CONFIG_SND_USB=y |
| 1093 | +# CONFIG_SND_USB_AUDIO is not set | |
| 1094 | +# CONFIG_SND_USB_UA101 is not set | |
| 1095 | +# CONFIG_SND_USB_CAIAQ is not set | |
| 854 | 1096 | CONFIG_SND_SOC=y |
| 855 | 1097 | CONFIG_SND_OMAP_SOC=y |
| 856 | 1098 | CONFIG_SND_OMAP_SOC_MCBSP=y |
| 857 | 1099 | CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y |
| 858 | 1100 | CONFIG_SND_SOC_I2C_AND_SPI=y |
| 1101 | +# CONFIG_SND_SOC_ALL_CODECS is not set | |
| 859 | 1102 | CONFIG_SND_SOC_TWL4030=y |
| 860 | − | |
| 1103 | +# CONFIG_SOUND_PRIME is not set | |
| 861 | 1104 | CONFIG_HID_SUPPORT=y |
| 862 | 1105 | CONFIG_HID=y |
| 863 | −# CONFIG_HID_DEBUG is not set | |
| 864 | 1106 | # CONFIG_HIDRAW is not set |
| 865 | 1107 | |
| 866 | 1108 | # |
| @@ -873,31 +1115,40 @@ CONFIG_USB_HID=y · 6 unmodified lines | ||
| 873 | 1115 | # |
| 874 | 1116 | # Special HID drivers |
| 875 | 1117 | # |
| 876 | −# CONFIG_HID_COMPAT is not set | |
| 1118 | +# CONFIG_HID_3M_PCT is not set | |
| 877 | 1119 | # CONFIG_HID_A4TECH is not set |
| 878 | 1120 | # CONFIG_HID_APPLE is not set |
| 879 | 1121 | # CONFIG_HID_BELKIN is not set |
| 880 | −# CONFIG_HID_BRIGHT is not set | |
| 881 | 1122 | # CONFIG_HID_CHERRY is not set |
| 882 | 1123 | # CONFIG_HID_CHICONY is not set |
| 883 | 1124 | # CONFIG_HID_CYPRESS is not set |
| 884 | −# CONFIG_HID_DELL is not set | |
| 1125 | +# CONFIG_HID_DRAGONRISE is not set | |
| 885 | 1126 | # CONFIG_HID_EZKEY is not set |
| 1127 | +# CONFIG_HID_KYE is not set | |
| 886 | 1128 | # CONFIG_HID_GYRATION is not set |
| 1129 | +# CONFIG_HID_TWINHAN is not set | |
| 1130 | +# CONFIG_HID_KENSINGTON is not set | |
| 887 | 1131 | # CONFIG_HID_LOGITECH is not set |
| 888 | 1132 | # CONFIG_HID_MICROSOFT is not set |
| 889 | 1133 | # CONFIG_HID_MONTEREY is not set |
| 1134 | +# CONFIG_HID_NTRIG is not set | |
| 1135 | +# CONFIG_HID_ORTEK is not set | |
| 890 | 1136 | # CONFIG_HID_PANTHERLORD is not set |
| 891 | 1137 | # CONFIG_HID_PETALYNX is not set |
| 1138 | +# CONFIG_HID_QUANTA is not set | |
| 892 | 1139 | # CONFIG_HID_SAMSUNG is not set |
| 893 | 1140 | # CONFIG_HID_SONY is not set |
| 1141 | +# CONFIG_HID_STANTUM is not set | |
| 894 | 1142 | # CONFIG_HID_SUNPLUS is not set |
| 895 | −# CONFIG_THRUSTMASTER_FF is not set | |
| 896 | −# CONFIG_ZEROPLUS_FF is not set | |
| 1143 | +# CONFIG_HID_GREENASIA is not set | |
| 1144 | +# CONFIG_HID_SMARTJOYPLUS is not set | |
| 1145 | +# CONFIG_HID_TOPSEED is not set | |
| 1146 | +# CONFIG_HID_THRUSTMASTER is not set | |
| 1147 | +# CONFIG_HID_ZEROPLUS is not set | |
| 897 | 1148 | CONFIG_USB_SUPPORT=y |
| 898 | 1149 | CONFIG_USB_ARCH_HAS_HCD=y |
| 899 | 1150 | CONFIG_USB_ARCH_HAS_OHCI=y |
| 900 | −# CONFIG_USB_ARCH_HAS_EHCI is not set | |
| 1151 | +CONFIG_USB_ARCH_HAS_EHCI=y | |
| 901 | 1152 | CONFIG_USB=y |
| 902 | 1153 | # CONFIG_USB_DEBUG is not set |
| 903 | 1154 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set |
| @@ -911,7 +1162,7 @@ CONFIG_USB_DEVICE_CLASS=y · 7 unmodified lines | ||
| 911 | 1162 | # CONFIG_USB_OTG is not set |
| 912 | 1163 | # CONFIG_USB_OTG_WHITELIST is not set |
| 913 | 1164 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set |
| 914 | −CONFIG_USB_MON=y | |
| 1165 | +# CONFIG_USB_MON is not set | |
| 915 | 1166 | # CONFIG_USB_WUSB is not set |
| 916 | 1167 | # CONFIG_USB_WUSB_CBAF is not set |
| 917 | 1168 | |
| @@ -919,7 +1170,13 @@ CONFIG_USB_MON=y · 1 unmodified line | ||
| 919 | 1170 | # USB Host Controller Drivers |
| 920 | 1171 | # |
| 921 | 1172 | # CONFIG_USB_C67X00_HCD is not set |
| 1173 | +CONFIG_USB_EHCI_HCD=y | |
| 1174 | +# CONFIG_USB_EHCI_ROOT_HUB_TT is not set | |
| 1175 | +# CONFIG_USB_EHCI_TT_NEWSCHED is not set | |
| 1176 | +# CONFIG_USB_OXU210HP_HCD is not set | |
| 922 | 1177 | # CONFIG_USB_ISP116X_HCD is not set |
| 1178 | +# CONFIG_USB_ISP1760_HCD is not set | |
| 1179 | +# CONFIG_USB_ISP1362_HCD is not set | |
| 923 | 1180 | # CONFIG_USB_OHCI_HCD is not set |
| 924 | 1181 | # CONFIG_USB_SL811_HCD is not set |
| 925 | 1182 | # CONFIG_USB_R8A66597_HCD is not set |
| @@ -930,11 +1187,10 @@ CONFIG_USB_MUSB_SOC=y · 4 unmodified lines | ||
| 930 | 1187 | # |
| 931 | 1188 | # OMAP 343x high speed USB support |
| 932 | 1189 | # |
| 933 | −CONFIG_USB_MUSB_HOST=y | |
| 934 | −# CONFIG_USB_MUSB_PERIPHERAL is not set | |
| 1190 | +# CONFIG_USB_MUSB_HOST is not set | |
| 1191 | +CONFIG_USB_MUSB_PERIPHERAL=y | |
| 935 | 1192 | # CONFIG_USB_MUSB_OTG is not set |
| 936 | −# CONFIG_USB_GADGET_MUSB_HDRC is not set | |
| 937 | −CONFIG_USB_MUSB_HDRC_HCD=y | |
| 1193 | +CONFIG_USB_GADGET_MUSB_HDRC=y | |
| 938 | 1194 | # CONFIG_MUSB_PIO_ONLY is not set |
| 939 | 1195 | CONFIG_USB_INVENTRA_DMA=y |
| 940 | 1196 | # CONFIG_USB_TI_CPPI_DMA is not set |
| @@ -949,11 +1205,11 @@ CONFIG_USB_INVENTRA_DMA=y · 8 unmodified lines | ||
| 949 | 1205 | # CONFIG_USB_TMC is not set |
| 950 | 1206 | |
| 951 | 1207 | # |
| 952 | −# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; | |
| 1208 | +# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | |
| 953 | 1209 | # |
| 954 | 1210 | |
| 955 | 1211 | # |
| 956 | −# see USB_STORAGE Help for more information | |
| 1212 | +# also be needed; see USB_STORAGE Help for more info | |
| 957 | 1213 | # |
| 958 | 1214 | # CONFIG_USB_STORAGE is not set |
| 959 | 1215 | # CONFIG_USB_LIBUSUAL is not set |
| @@ -979,14 +1235,13 @@ CONFIG_USB_INVENTRA_DMA=y · 19 unmodified lines | ||
| 979 | 1235 | # CONFIG_USB_RIO500 is not set |
| 980 | 1236 | # CONFIG_USB_LEGOTOWER is not set |
| 981 | 1237 | # CONFIG_USB_LCD is not set |
| 982 | −# CONFIG_USB_BERRY_CHARGE is not set | |
| 983 | 1238 | # CONFIG_USB_LED is not set |
| 984 | 1239 | # CONFIG_USB_CYPRESS_CY7C63 is not set |
| 985 | 1240 | # CONFIG_USB_CYTHERM is not set |
| 986 | −# CONFIG_USB_PHIDGET is not set | |
| 987 | 1241 | # CONFIG_USB_IDMOUSE is not set |
| 988 | 1242 | # CONFIG_USB_FTDI_ELAN is not set |
| 989 | 1243 | # CONFIG_USB_APPLEDISPLAY is not set |
| 1244 | +# CONFIG_USB_SISUSBVGA is not set | |
| 990 | 1245 | # CONFIG_USB_LD is not set |
| 991 | 1246 | # CONFIG_USB_TRANCEVIBRATOR is not set |
| 992 | 1247 | # CONFIG_USB_IOWARRIOR is not set |
| @@ -1002,27 +1257,46 @@ CONFIG_USB_GADGET_SELECTED=y · 9 unmodified lines | ||
| 1002 | 1257 | # CONFIG_USB_GADGET_ATMEL_USBA is not set |
| 1003 | 1258 | # CONFIG_USB_GADGET_FSL_USB2 is not set |
| 1004 | 1259 | # CONFIG_USB_GADGET_LH7A40X is not set |
| 1005 | −CONFIG_USB_GADGET_OMAP=y | |
| 1006 | −CONFIG_USB_OMAP=y | |
| 1260 | +# CONFIG_USB_GADGET_OMAP is not set | |
| 1007 | 1261 | # CONFIG_USB_GADGET_PXA25X is not set |
| 1262 | +# CONFIG_USB_GADGET_R8A66597 is not set | |
| 1008 | 1263 | # CONFIG_USB_GADGET_PXA27X is not set |
| 1264 | +# CONFIG_USB_GADGET_S3C_HSOTG is not set | |
| 1265 | +# CONFIG_USB_GADGET_IMX is not set | |
| 1009 | 1266 | # CONFIG_USB_GADGET_S3C2410 is not set |
| 1010 | 1267 | # CONFIG_USB_GADGET_M66592 is not set |
| 1011 | 1268 | # CONFIG_USB_GADGET_AMD5536UDC is not set |
| 1012 | 1269 | # CONFIG_USB_GADGET_FSL_QE is not set |
| 1270 | +# CONFIG_USB_GADGET_CI13XXX is not set | |
| 1013 | 1271 | # CONFIG_USB_GADGET_NET2280 is not set |
| 1014 | 1272 | # CONFIG_USB_GADGET_GOKU is not set |
| 1273 | +# CONFIG_USB_GADGET_LANGWELL is not set | |
| 1015 | 1274 | # CONFIG_USB_GADGET_DUMMY_HCD is not set |
| 1016 | −# CONFIG_USB_GADGET_DUALSPEED is not set | |
| 1275 | +CONFIG_USB_GADGET_DUALSPEED=y | |
| 1017 | 1276 | # CONFIG_USB_ZERO is not set |
| 1277 | +# CONFIG_USB_AUDIO is not set | |
| 1018 | 1278 | CONFIG_USB_ETH=y |
| 1019 | 1279 | CONFIG_USB_ETH_RNDIS=y |
| 1280 | +# CONFIG_USB_ETH_EEM is not set | |
| 1020 | 1281 | # CONFIG_USB_GADGETFS is not set |
| 1021 | 1282 | # CONFIG_USB_FILE_STORAGE is not set |
| 1283 | +# CONFIG_USB_MASS_STORAGE is not set | |
| 1022 | 1284 | # CONFIG_USB_G_SERIAL is not set |
| 1023 | 1285 | # CONFIG_USB_MIDI_GADGET is not set |
| 1024 | 1286 | # CONFIG_USB_G_PRINTER is not set |
| 1025 | 1287 | # CONFIG_USB_CDC_COMPOSITE is not set |
| 1288 | +# CONFIG_USB_G_NOKIA is not set | |
| 1289 | +# CONFIG_USB_G_MULTI is not set | |
| 1290 | + | |
| 1291 | +# | |
| 1292 | +# OTG and related infrastructure | |
| 1293 | +# | |
| 1294 | +CONFIG_USB_OTG_UTILS=y | |
| 1295 | +# CONFIG_USB_GPIO_VBUS is not set | |
| 1296 | +# CONFIG_ISP1301_OMAP is not set | |
| 1297 | +# CONFIG_USB_ULPI is not set | |
| 1298 | +CONFIG_TWL4030_USB=y | |
| 1299 | +# CONFIG_NOP_USB_XCEIV is not set | |
| 1026 | 1300 | CONFIG_MMC=y |
| 1027 | 1301 | # CONFIG_MMC_DEBUG is not set |
| 1028 | 1302 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| @@ -1040,16 +1314,41 @@ CONFIG_MMC_BLOCK_BOUNCE=y · 11 unmodified lines | ||
| 1040 | 1314 | # |
| 1041 | 1315 | # CONFIG_MMC_SDHCI is not set |
| 1042 | 1316 | # CONFIG_MMC_OMAP is not set |
| 1317 | +CONFIG_MMC_OMAP_HS=y | |
| 1318 | +# CONFIG_MMC_AT91 is not set | |
| 1319 | +# CONFIG_MMC_ATMELMCI is not set | |
| 1043 | 1320 | # CONFIG_MMC_SPI is not set |
| 1044 | 1321 | # CONFIG_MEMSTICK is not set |
| 1045 | −# CONFIG_ACCESSIBILITY is not set | |
| 1046 | 1322 | CONFIG_NEW_LEDS=y |
| 1047 | 1323 | CONFIG_LEDS_CLASS=y |
| 1324 | + | |
| 1325 | +# | |
| 1326 | +# LED drivers | |
| 1327 | +# | |
| 1328 | +# CONFIG_LEDS_PCA9532 is not set | |
| 1048 | 1329 | CONFIG_LEDS_GPIO=y |
| 1049 | 1330 | CONFIG_LEDS_GPIO_PLATFORM=y |
| 1331 | +# CONFIG_LEDS_LP3944 is not set | |
| 1332 | +# CONFIG_LEDS_PCA955X is not set | |
| 1333 | +# CONFIG_LEDS_DAC124S085 is not set | |
| 1334 | +# CONFIG_LEDS_REGULATOR is not set | |
| 1335 | +# CONFIG_LEDS_BD2802 is not set | |
| 1336 | +# CONFIG_LEDS_LT3593 is not set | |
| 1337 | + | |
| 1338 | +# | |
| 1339 | +# LED Triggers | |
| 1340 | +# | |
| 1050 | 1341 | CONFIG_LEDS_TRIGGERS=y |
| 1342 | +# CONFIG_LEDS_TRIGGER_TIMER is not set | |
| 1343 | +# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set | |
| 1344 | +# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | |
| 1345 | +# CONFIG_LEDS_TRIGGER_GPIO is not set | |
| 1051 | 1346 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y |
| 1052 | 1347 | |
| 1348 | +# | |
| 1349 | +# iptables trigger is under Netfilter config (LED target) | |
| 1350 | +# | |
| 1351 | +# CONFIG_ACCESSIBILITY is not set | |
| 1053 | 1352 | CONFIG_RTC_LIB=y |
| 1054 | 1353 | CONFIG_RTC_CLASS=y |
| 1055 | 1354 | CONFIG_RTC_HCTOSYS=y |
| @@ -1078,10 +1377,12 @@ CONFIG_RTC_INTF_DEV=y · 22 unmodified lines | ||
| 1078 | 1377 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 1079 | 1378 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1080 | 1379 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1380 | +# CONFIG_RTC_DRV_BQ32K is not set | |
| 1081 | 1381 | CONFIG_RTC_DRV_TWL4030=y |
| 1082 | 1382 | # CONFIG_RTC_DRV_S35390A is not set |
| 1083 | 1383 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1084 | 1384 | # CONFIG_RTC_DRV_RX8581 is not set |
| 1385 | +# CONFIG_RTC_DRV_RX8025 is not set | |
| 1085 | 1386 | |
| 1086 | 1387 | # |
| 1087 | 1388 | # SPI RTC drivers |
| @@ -1093,6 +1394,7 @@ CONFIG_RTC_DRV_TWL4030=y · 5 unmodified lines | ||
| 1093 | 1394 | # CONFIG_RTC_DRV_R9701 is not set |
| 1094 | 1395 | # CONFIG_RTC_DRV_RS5C348 is not set |
| 1095 | 1396 | # CONFIG_RTC_DRV_DS3234 is not set |
| 1397 | +# CONFIG_RTC_DRV_PCF2123 is not set | |
| 1096 | 1398 | |
| 1097 | 1399 | # |
| 1098 | 1400 | # Platform RTC drivers |
| @@ -1106,18 +1408,22 @@ CONFIG_RTC_DRV_TWL4030=y · 7 unmodified lines | ||
| 1106 | 1408 | # CONFIG_RTC_DRV_M48T86 is not set |
| 1107 | 1409 | # CONFIG_RTC_DRV_M48T35 is not set |
| 1108 | 1410 | # CONFIG_RTC_DRV_M48T59 is not set |
| 1411 | +# CONFIG_RTC_DRV_MSM6242 is not set | |
| 1109 | 1412 | # CONFIG_RTC_DRV_BQ4802 is not set |
| 1413 | +# CONFIG_RTC_DRV_RP5C01 is not set | |
| 1110 | 1414 | # CONFIG_RTC_DRV_V3020 is not set |
| 1111 | 1415 | |
| 1112 | 1416 | # |
| 1113 | 1417 | # on-CPU RTC drivers |
| 1114 | 1418 | # |
| 1115 | 1419 | # CONFIG_DMADEVICES is not set |
| 1420 | +# CONFIG_AUXDISPLAY is not set | |
| 1116 | 1421 | # CONFIG_UIO is not set |
| 1117 | 1422 | |
| 1118 | −CONFIG_REGULATOR=y | |
| 1119 | −CONFIG_REGULATOR_FIXED_VOLTAGE=y | |
| 1120 | −CONFIG_REGULATOR_TWL4030=y | |
| 1423 | +# | |
| 1424 | +# TI VLYNQ | |
| 1425 | +# | |
| 1426 | +# CONFIG_STAGING is not set | |
| 1121 | 1427 | |
| 1122 | 1428 | # |
| 1123 | 1429 | # File systems |
| @@ -1126,21 +1432,27 @@ CONFIG_EXT2_FS=y · 2 unmodified lines | ||
| 1126 | 1432 | # CONFIG_EXT2_FS_XATTR is not set |
| 1127 | 1433 | # CONFIG_EXT2_FS_XIP is not set |
| 1128 | 1434 | CONFIG_EXT3_FS=y |
| 1435 | +# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | |
| 1129 | 1436 | # CONFIG_EXT3_FS_XATTR is not set |
| 1130 | 1437 | # CONFIG_EXT4_FS is not set |
| 1131 | 1438 | CONFIG_JBD=y |
| 1132 | 1439 | # CONFIG_REISERFS_FS is not set |
| 1133 | 1440 | # CONFIG_JFS_FS is not set |
| 1134 | 1441 | # CONFIG_FS_POSIX_ACL is not set |
| 1135 | −CONFIG_FILE_LOCKING=y | |
| 1136 | 1442 | # CONFIG_XFS_FS is not set |
| 1443 | +# CONFIG_GFS2_FS is not set | |
| 1137 | 1444 | # CONFIG_OCFS2_FS is not set |
| 1445 | +# CONFIG_BTRFS_FS is not set | |
| 1446 | +# CONFIG_NILFS2_FS is not set | |
| 1447 | +CONFIG_FILE_LOCKING=y | |
| 1448 | +CONFIG_FSNOTIFY=y | |
| 1138 | 1449 | CONFIG_DNOTIFY=y |
| 1139 | −CONFIG_INOTIFY=y | |
| 1140 | 1450 | CONFIG_INOTIFY_USER=y |
| 1451 | +CONFIG_FANOTIFY=y | |
| 1141 | 1452 | CONFIG_QUOTA=y |
| 1142 | 1453 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set |
| 1143 | 1454 | CONFIG_PRINT_QUOTA_WARNING=y |
| 1455 | +CONFIG_QUOTA_TREE=y | |
| 1144 | 1456 | # CONFIG_QFMT_V1 is not set |
| 1145 | 1457 | CONFIG_QFMT_V2=y |
| 1146 | 1458 | CONFIG_QUOTACTL=y |
| @@ -1148,6 +1460,11 @@ CONFIG_QUOTACTL=y · 1 unmodified line | ||
| 1148 | 1460 | # CONFIG_AUTOFS4_FS is not set |
| 1149 | 1461 | # CONFIG_FUSE_FS is not set |
| 1150 | 1462 | |
| 1463 | +# | |
| 1464 | +# Caches | |
| 1465 | +# | |
| 1466 | +# CONFIG_FSCACHE is not set | |
| 1467 | + | |
| 1151 | 1468 | # |
| 1152 | 1469 | # CD-ROM/DVD Filesystems |
| 1153 | 1470 | # |
| @@ -1175,10 +1492,7 @@ CONFIG_TMPFS=y · 21 unmodified lines | ||
| 1175 | 1492 | # CONFIG_TMPFS_POSIX_ACL is not set |
| 1176 | 1493 | # CONFIG_HUGETLB_PAGE is not set |
| 1177 | 1494 | # CONFIG_CONFIGFS_FS is not set |
| 1178 | − | |
| 1179 | −# | |
| 1180 | −# Miscellaneous filesystems | |
| 1181 | −# | |
| 1495 | +CONFIG_MISC_FILESYSTEMS=y | |
| 1182 | 1496 | # CONFIG_ADFS_FS is not set |
| 1183 | 1497 | # CONFIG_AFFS_FS is not set |
| 1184 | 1498 | # CONFIG_HFS_FS is not set |
| @@ -1187,7 +1501,9 @@ CONFIG_TMPFS=y · 2 unmodified lines | ||
| 1187 | 1501 | # CONFIG_BFS_FS is not set |
| 1188 | 1502 | # CONFIG_EFS_FS is not set |
| 1189 | 1503 | # CONFIG_JFFS2_FS is not set |
| 1504 | +# CONFIG_LOGFS is not set | |
| 1190 | 1505 | # CONFIG_CRAMFS is not set |
| 1506 | +# CONFIG_SQUASHFS is not set | |
| 1191 | 1507 | # CONFIG_VXFS_FS is not set |
| 1192 | 1508 | # CONFIG_MINIX_FS is not set |
| 1193 | 1509 | # CONFIG_OMFS_FS is not set |
| @@ -1196,7 +1512,20 @@ CONFIG_TMPFS=y · 2 unmodified lines | ||
| 1196 | 1512 | # CONFIG_ROMFS_FS is not set |
| 1197 | 1513 | # CONFIG_SYSV_FS is not set |
| 1198 | 1514 | # CONFIG_UFS_FS is not set |
| 1199 | −# CONFIG_NETWORK_FILESYSTEMS is not set | |
| 1515 | +CONFIG_NETWORK_FILESYSTEMS=y | |
| 1516 | +# CONFIG_NFS_FS is not set | |
| 1517 | +# CONFIG_NFSD is not set | |
| 1518 | +# CONFIG_SMB_FS is not set | |
| 1519 | +# CONFIG_CEPH_FS is not set | |
| 1520 | +CONFIG_CIFS=y | |
| 1521 | +# CONFIG_CIFS_STATS is not set | |
| 1522 | +# CONFIG_CIFS_WEAK_PW_HASH is not set | |
| 1523 | +# CONFIG_CIFS_XATTR is not set | |
| 1524 | +# CONFIG_CIFS_DEBUG2 is not set | |
| 1525 | +# CONFIG_CIFS_EXPERIMENTAL is not set | |
| 1526 | +# CONFIG_NCP_FS is not set | |
| 1527 | +# CONFIG_CODA_FS is not set | |
| 1528 | +# CONFIG_AFS_FS is not set | |
| 1200 | 1529 | |
| 1201 | 1530 | # |
| 1202 | 1531 | # Partition Types |
| @@ -1269,6 +1598,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y · 66 unmodified lines | ||
| 1269 | 1598 | CONFIG_ENABLE_MUST_CHECK=y |
| 1270 | 1599 | CONFIG_FRAME_WARN=1024 |
| 1271 | 1600 | CONFIG_MAGIC_SYSRQ=y |
| 1601 | +# CONFIG_STRIP_ASM_SYMS is not set | |
| 1272 | 1602 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1273 | 1603 | # CONFIG_DEBUG_FS is not set |
| 1274 | 1604 | # CONFIG_HEADERS_CHECK is not set |
| @@ -1277,11 +1607,15 @@ CONFIG_DEBUG_KERNEL=y · 2 unmodified lines | ||
| 1277 | 1607 | CONFIG_DETECT_SOFTLOCKUP=y |
| 1278 | 1608 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set |
| 1279 | 1609 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 |
| 1610 | +CONFIG_DETECT_HUNG_TASK=y | |
| 1611 | +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | |
| 1612 | +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | |
| 1280 | 1613 | CONFIG_SCHED_DEBUG=y |
| 1281 | 1614 | # CONFIG_SCHEDSTATS is not set |
| 1282 | 1615 | # CONFIG_TIMER_STATS is not set |
| 1283 | 1616 | # CONFIG_DEBUG_OBJECTS is not set |
| 1284 | 1617 | # CONFIG_DEBUG_SLAB is not set |
| 1618 | +# CONFIG_DEBUG_KMEMLEAK is not set | |
| 1285 | 1619 | # CONFIG_DEBUG_RT_MUTEXES is not set |
| 1286 | 1620 | # CONFIG_RT_MUTEX_TESTER is not set |
| 1287 | 1621 | # CONFIG_DEBUG_SPINLOCK is not set |
| @@ -1299,33 +1633,42 @@ CONFIG_DEBUG_INFO=y · 11 unmodified lines | ||
| 1299 | 1633 | # CONFIG_DEBUG_MEMORY_INIT is not set |
| 1300 | 1634 | # CONFIG_DEBUG_LIST is not set |
| 1301 | 1635 | # CONFIG_DEBUG_SG is not set |
| 1302 | −CONFIG_FRAME_POINTER=y | |
| 1636 | +# CONFIG_DEBUG_NOTIFIERS is not set | |
| 1637 | +# CONFIG_DEBUG_CREDENTIALS is not set | |
| 1303 | 1638 | # CONFIG_BOOT_PRINTK_DELAY is not set |
| 1304 | 1639 | # CONFIG_RCU_TORTURE_TEST is not set |
| 1305 | 1640 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set |
| 1306 | 1641 | # CONFIG_BACKTRACE_SELF_TEST is not set |
| 1307 | 1642 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set |
| 1643 | +# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | |
| 1308 | 1644 | # CONFIG_FAULT_INJECTION is not set |
| 1309 | 1645 | # CONFIG_LATENCYTOP is not set |
| 1646 | +# CONFIG_SYSCTL_SYSCALL_CHECK is not set | |
| 1647 | +# CONFIG_PAGE_POISONING is not set | |
| 1310 | 1648 | CONFIG_HAVE_FUNCTION_TRACER=y |
| 1311 | − | |
| 1312 | −# | |
| 1313 | −# Tracers | |
| 1314 | −# | |
| 1649 | +CONFIG_TRACING_SUPPORT=y | |
| 1650 | +CONFIG_FTRACE=y | |
| 1315 | 1651 | # CONFIG_FUNCTION_TRACER is not set |
| 1316 | 1652 | # CONFIG_IRQSOFF_TRACER is not set |
| 1317 | 1653 | # CONFIG_SCHED_TRACER is not set |
| 1318 | −# CONFIG_CONTEXT_SWITCH_TRACER is not set | |
| 1654 | +# CONFIG_ENABLE_DEFAULT_TRACERS is not set | |
| 1319 | 1655 | # CONFIG_BOOT_TRACER is not set |
| 1656 | +CONFIG_BRANCH_PROFILE_NONE=y | |
| 1657 | +# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | |
| 1658 | +# CONFIG_PROFILE_ALL_BRANCHES is not set | |
| 1320 | 1659 | # CONFIG_STACK_TRACER is not set |
| 1321 | −# CONFIG_DYNAMIC_PRINTK_DEBUG is not set | |
| 1660 | +# CONFIG_KMEMTRACE is not set | |
| 1661 | +# CONFIG_WORKQUEUE_TRACER is not set | |
| 1662 | +# CONFIG_BLK_DEV_IO_TRACE is not set | |
| 1322 | 1663 | # CONFIG_SAMPLES is not set |
| 1323 | 1664 | CONFIG_HAVE_ARCH_KGDB=y |
| 1324 | 1665 | # CONFIG_KGDB is not set |
| 1666 | +CONFIG_ARM_UNWIND=y | |
| 1325 | 1667 | # CONFIG_DEBUG_USER is not set |
| 1326 | 1668 | # CONFIG_DEBUG_ERRORS is not set |
| 1327 | 1669 | # CONFIG_DEBUG_STACK_USAGE is not set |
| 1328 | 1670 | # CONFIG_DEBUG_LL is not set |
| 1671 | +# CONFIG_OC_ETM is not set | |
| 1329 | 1672 | |
| 1330 | 1673 | # |
| 1331 | 1674 | # Security options |
| @@ -1333,19 +1676,22 @@ CONFIG_HAVE_ARCH_KGDB=y · 1 unmodified line | ||
| 1333 | 1676 | # CONFIG_KEYS is not set |
| 1334 | 1677 | # CONFIG_SECURITY is not set |
| 1335 | 1678 | # CONFIG_SECURITYFS is not set |
| 1336 | −# CONFIG_SECURITY_FILE_CAPABILITIES is not set | |
| 1679 | +# CONFIG_DEFAULT_SECURITY_SELINUX is not set | |
| 1680 | +# CONFIG_DEFAULT_SECURITY_SMACK is not set | |
| 1681 | +# CONFIG_DEFAULT_SECURITY_TOMOYO is not set | |
| 1682 | +CONFIG_DEFAULT_SECURITY_DAC=y | |
| 1683 | +CONFIG_DEFAULT_SECURITY="" | |
| 1337 | 1684 | CONFIG_CRYPTO=y |
| 1338 | 1685 | |
| 1339 | 1686 | # |
| 1340 | 1687 | # Crypto core or helper |
| 1341 | 1688 | # |
| 1342 | −# CONFIG_CRYPTO_FIPS is not set | |
| 1343 | 1689 | CONFIG_CRYPTO_ALGAPI=y |
| 1344 | −CONFIG_CRYPTO_AEAD=y | |
| 1345 | −CONFIG_CRYPTO_BLKCIPHER=y | |
| 1690 | +CONFIG_CRYPTO_ALGAPI2=y | |
| 1346 | 1691 | CONFIG_CRYPTO_HASH=y |
| 1347 | −CONFIG_CRYPTO_RNG=y | |
| 1348 | −CONFIG_CRYPTO_MANAGER=y | |
| 1692 | +CONFIG_CRYPTO_HASH2=y | |
| 1693 | +# CONFIG_CRYPTO_MANAGER is not set | |
| 1694 | +# CONFIG_CRYPTO_MANAGER2 is not set | |
| 1349 | 1695 | # CONFIG_CRYPTO_GF128MUL is not set |
| 1350 | 1696 | # CONFIG_CRYPTO_NULL is not set |
| 1351 | 1697 | # CONFIG_CRYPTO_CRYPTD is not set |
| @@ -1362,12 +1708,12 @@ CONFIG_CRYPTO_MANAGER=y · 10 unmodified lines | ||
| 1362 | 1708 | # |
| 1363 | 1709 | # Block modes |
| 1364 | 1710 | # |
| 1365 | −CONFIG_CRYPTO_CBC=y | |
| 1711 | +# CONFIG_CRYPTO_CBC is not set | |
| 1366 | 1712 | # CONFIG_CRYPTO_CTR is not set |
| 1367 | 1713 | # CONFIG_CRYPTO_CTS is not set |
| 1368 | −CONFIG_CRYPTO_ECB=m | |
| 1714 | +# CONFIG_CRYPTO_ECB is not set | |
| 1369 | 1715 | # CONFIG_CRYPTO_LRW is not set |
| 1370 | −CONFIG_CRYPTO_PCBC=m | |
| 1716 | +# CONFIG_CRYPTO_PCBC is not set | |
| 1371 | 1717 | # CONFIG_CRYPTO_XTS is not set |
| 1372 | 1718 | |
| 1373 | 1719 | # |
| @@ -1375,13 +1721,15 @@ CONFIG_CRYPTO_PCBC=m · 1 unmodified line | ||
| 1375 | 1721 | # |
| 1376 | 1722 | # CONFIG_CRYPTO_HMAC is not set |
| 1377 | 1723 | # CONFIG_CRYPTO_XCBC is not set |
| 1724 | +# CONFIG_CRYPTO_VMAC is not set | |
| 1378 | 1725 | |
| 1379 | 1726 | # |
| 1380 | 1727 | # Digest |
| 1381 | 1728 | # |
| 1382 | −# CONFIG_CRYPTO_CRC32C is not set | |
| 1729 | +CONFIG_CRYPTO_CRC32C=y | |
| 1730 | +# CONFIG_CRYPTO_GHASH is not set | |
| 1383 | 1731 | # CONFIG_CRYPTO_MD4 is not set |
| 1384 | −CONFIG_CRYPTO_MD5=y | |
| 1732 | +# CONFIG_CRYPTO_MD5 is not set | |
| 1385 | 1733 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
| 1386 | 1734 | # CONFIG_CRYPTO_RMD128 is not set |
| 1387 | 1735 | # CONFIG_CRYPTO_RMD160 is not set |
| @@ -1403,7 +1751,7 @@ CONFIG_CRYPTO_MD5=y · 15 unmodified lines | ||
| 1403 | 1751 | # CONFIG_CRYPTO_CAMELLIA is not set |
| 1404 | 1752 | # CONFIG_CRYPTO_CAST5 is not set |
| 1405 | 1753 | # CONFIG_CRYPTO_CAST6 is not set |
| 1406 | −CONFIG_CRYPTO_DES=y | |
| 1754 | +# CONFIG_CRYPTO_DES is not set | |
| 1407 | 1755 | # CONFIG_CRYPTO_FCRYPT is not set |
| 1408 | 1756 | # CONFIG_CRYPTO_KHAZAD is not set |
| 1409 | 1757 | # CONFIG_CRYPTO_SALSA20 is not set |
| @@ -1416,33 +1764,33 @@ CONFIG_CRYPTO_DES=y · 6 unmodified lines | ||
| 1416 | 1764 | # Compression |
| 1417 | 1765 | # |
| 1418 | 1766 | # CONFIG_CRYPTO_DEFLATE is not set |
| 1767 | +# CONFIG_CRYPTO_ZLIB is not set | |
| 1419 | 1768 | # CONFIG_CRYPTO_LZO is not set |
| 1420 | 1769 | |
| 1421 | 1770 | # |
| 1422 | 1771 | # Random Number Generation |
| 1423 | 1772 | # |
| 1424 | 1773 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
| 1425 | −CONFIG_CRYPTO_HW=y | |
| 1774 | +# CONFIG_CRYPTO_HW is not set | |
| 1775 | +# CONFIG_BINARY_PRINTF is not set | |
| 1426 | 1776 | |
| 1427 | 1777 | # |
| 1428 | 1778 | # Library routines |
| 1429 | 1779 | # |
| 1430 | 1780 | CONFIG_BITREVERSE=y |
| 1781 | +CONFIG_GENERIC_FIND_LAST_BIT=y | |
| 1431 | 1782 | CONFIG_CRC_CCITT=y |
| 1432 | 1783 | # CONFIG_CRC16 is not set |
| 1433 | 1784 | # CONFIG_CRC_T10DIF is not set |
| 1434 | 1785 | # CONFIG_CRC_ITU_T is not set |
| 1435 | 1786 | CONFIG_CRC32=y |
| 1436 | 1787 | # CONFIG_CRC7 is not set |
| 1437 | −CONFIG_LIBCRC32C=y | |
| 1438 | −CONFIG_PLIST=y | |
| 1788 | +# CONFIG_LIBCRC32C is not set | |
| 1789 | +CONFIG_ZLIB_INFLATE=y | |
| 1790 | +CONFIG_DECOMPRESS_GZIP=y | |
| 1439 | 1791 | CONFIG_HAS_IOMEM=y |
| 1440 | 1792 | CONFIG_HAS_IOPORT=y |
| 1441 | 1793 | CONFIG_HAS_DMA=y |
| 1442 | − | |
| 1443 | −# added by hand for now | |
| 1444 | −CONFIG_KEYBOARD_TWL4030=y | |
| 1445 | −CONFIG_USB_OTG_UTILS=y | |
| 1446 | −CONFIG_TWL4030_USB=y | |
| 1447 | −CONFIG_MMC_OMAP_HS=y | |
| 1448 | − | |
| 1794 | +CONFIG_NLATTR=y | |
| 1795 | +# CONFIG_SHM_SIGNAL is not set | |
| 1796 | +# CONFIG_IOQ is not set | |
| @@ -199,7 +199,7 @@ CONFIG_ARCH_OMAP4=y · 198 unmodified lines | ||
| 199 | 199 | # |
| 200 | 200 | # CONFIG_OMAP_RESET_CLOCKS is not set |
| 201 | 201 | # CONFIG_OMAP_MUX is not set |
| 202 | −# CONFIG_OMAP_MCBSP is not set | |
| 202 | +CONFIG_OMAP_MCBSP=y | |
| 203 | 203 | # CONFIG_OMAP_MBOX_FWK is not set |
| 204 | 204 | # CONFIG_OMAP_MPU_TIMER is not set |
| 205 | 205 | CONFIG_OMAP_32K_TIMER=y |
| @@ -242,10 +242,13 @@ CONFIG_CPU_CP15_MMU=y · 36 unmodified lines | ||
| 242 | 242 | # CONFIG_CPU_DCACHE_DISABLE is not set |
| 243 | 243 | # CONFIG_CPU_BPREDICT_DISABLE is not set |
| 244 | 244 | CONFIG_HAS_TLS_REG=y |
| 245 | +CONFIG_OUTER_CACHE=y | |
| 246 | +CONFIG_CACHE_L2X0=y | |
| 245 | 247 | CONFIG_ARM_L1_CACHE_SHIFT=5 |
| 246 | 248 | # CONFIG_ARM_ERRATA_430973 is not set |
| 247 | 249 | # CONFIG_ARM_ERRATA_458693 is not set |
| 248 | 250 | # CONFIG_ARM_ERRATA_460075 is not set |
| 251 | +CONFIG_PL310_ERRATA_588369=y | |
| 249 | 252 | CONFIG_ARM_GIC=y |
| 250 | 253 | |
| 251 | 254 | # |
| @@ -304,7 +307,7 @@ CONFIG_ALIGNMENT_TRAP=y · 52 unmodified lines | ||
| 304 | 307 | # |
| 305 | 308 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
| 306 | 309 | CONFIG_ZBOOT_ROM_BSS=0x0 |
| 307 | −CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS0,115200n8 initrd=0x81600000,20M ramdisk_size=20480" | |
| 310 | +CONFIG_CMDLINE="root=/dev/ram0 rw mem=128M console=ttyS2,115200n8 initrd=0x81600000,20M ramdisk_size=20480" | |
| 308 | 311 | # CONFIG_XIP_KERNEL is not set |
| 309 | 312 | # CONFIG_KEXEC is not set |
| 310 | 313 | |
| @@ -488,7 +491,8 @@ CONFIG_GPIOLIB=y · 177 unmodified lines | ||
| 488 | 491 | # CONFIG_POWER_SUPPLY is not set |
| 489 | 492 | # CONFIG_HWMON is not set |
| 490 | 493 | # CONFIG_THERMAL is not set |
| 491 | −# CONFIG_WATCHDOG is not set | |
| 494 | +CONFIG_WATCHDOG=y | |
| 495 | +CONFIG_OMAP_WATCHDOG=y | |
| 492 | 496 | CONFIG_SSB_POSSIBLE=y |
| 493 | 497 | |
| 494 | 498 | # |
| @@ -1136,7 +1136,7 @@ CONFIG_TWL4030_USB=y · 1135 unmodified lines | ||
| 1136 | 1136 | # CONFIG_NOP_USB_XCEIV is not set |
| 1137 | 1137 | CONFIG_MMC=y |
| 1138 | 1138 | # CONFIG_MMC_DEBUG is not set |
| 1139 | −# CONFIG_MMC_UNSAFE_RESUME is not set | |
| 1139 | +CONFIG_MMC_UNSAFE_RESUME=y | |
| 1140 | 1140 | |
| 1141 | 1141 | # |
| 1142 | 1142 | # MMC/SD/SDIO Card Drivers |
| @@ -1186,7 +1186,7 @@ CONFIG_RTC_INTF_DEV=y · 43 unmodified lines | ||
| 1186 | 1186 | # CONFIG_RTC_DRV_PCF8563 is not set |
| 1187 | 1187 | # CONFIG_RTC_DRV_PCF8583 is not set |
| 1188 | 1188 | # CONFIG_RTC_DRV_M41T80 is not set |
| 1189 | −# CONFIG_RTC_DRV_TWL4030 is not set | |
| 1189 | +CONFIG_RTC_DRV_TWL4030=y | |
| 1190 | 1190 | # CONFIG_RTC_DRV_S35390A is not set |
| 1191 | 1191 | # CONFIG_RTC_DRV_FM3130 is not set |
| 1192 | 1192 | # CONFIG_RTC_DRV_RX8581 is not set |
| @@ -1416,7 +1416,7 @@ CONFIG_FRAME_WARN=1024 · 223 unmodified lines | ||
| 1416 | 1416 | CONFIG_MAGIC_SYSRQ=y |
| 1417 | 1417 | # CONFIG_STRIP_ASM_SYMS is not set |
| 1418 | 1418 | # CONFIG_UNUSED_SYMBOLS is not set |
| 1419 | −# CONFIG_DEBUG_FS is not set | |
| 1419 | +CONFIG_DEBUG_FS=y | |
| 1420 | 1420 | # CONFIG_HEADERS_CHECK is not set |
| 1421 | 1421 | CONFIG_DEBUG_KERNEL=y |
| 1422 | 1422 | # CONFIG_DEBUG_SHIRQ is not set |
| @@ -1354,7 +1354,7 @@ CONFIG_USB_OTG_UTILS=y · 1353 unmodified lines | ||
| 1354 | 1354 | # CONFIG_USB_GPIO_VBUS is not set |
| 1355 | 1355 | # CONFIG_ISP1301_OMAP is not set |
| 1356 | 1356 | CONFIG_TWL4030_USB=y |
| 1357 | −CONFIG_MMC=y | |
| 1357 | +CONFIG_MMC=m | |
| 1358 | 1358 | # CONFIG_MMC_DEBUG is not set |
| 1359 | 1359 | # CONFIG_MMC_UNSAFE_RESUME is not set |
| 1360 | 1360 | |
| @@ -1362,7 +1362,7 @@ CONFIG_MMC=y · 1 unmodified line | ||
| 1362 | 1362 | # MMC/SD/SDIO Card Drivers |
| 1363 | 1363 | # |
| 1364 | 1364 | CONFIG_MMC_BLOCK=m |
| 1365 | −CONFIG_MMC_BLOCK_BOUNCE=y | |
| 1365 | +# CONFIG_MMC_BLOCK_BOUNCE is not set | |
| 1366 | 1366 | # CONFIG_SDIO_UART is not set |
| 1367 | 1367 | # CONFIG_MMC_TEST is not set |
| 1368 | 1368 | |
| @@ -235,6 +235,234 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u) · 234 unmodified lines | ||
| 235 | 235 | #define smp_mb__before_atomic_inc() smp_mb() |
| 236 | 236 | #define smp_mb__after_atomic_inc() smp_mb() |
| 237 | 237 | |
| 238 | +#ifndef CONFIG_GENERIC_ATOMIC64 | |
| 239 | +typedef struct { | |
| 240 | + u64 __aligned(8) counter; | |
| 241 | +} atomic64_t; | |
| 242 | + | |
| 243 | +#define ATOMIC64_INIT(i) { (i) } | |
| 244 | + | |
| 245 | +static inline u64 atomic64_read(atomic64_t *v) | |
| 246 | +{ | |
| 247 | + u64 result; | |
| 248 | + | |
| 249 | + __asm__ __volatile__("@ atomic64_read\n" | |
| 250 | +" ldrexd %0, %H0, [%1]" | |
| 251 | + : "=&r" (result) | |
| 252 | + : "r" (&v->counter) | |
| 253 | + ); | |
| 254 | + | |
| 255 | + return result; | |
| 256 | +} | |
| 257 | + | |
| 258 | +static inline void atomic64_set(atomic64_t *v, u64 i) | |
| 259 | +{ | |
| 260 | + u64 tmp; | |
| 261 | + | |
| 262 | + __asm__ __volatile__("@ atomic64_set\n" | |
| 263 | +"1: ldrexd %0, %H0, [%1]\n" | |
| 264 | +" strexd %0, %2, %H2, [%1]\n" | |
| 265 | +" teq %0, #0\n" | |
| 266 | +" bne 1b" | |
| 267 | + : "=&r" (tmp) | |
| 268 | + : "r" (&v->counter), "r" (i) | |
| 269 | + : "cc"); | |
| 270 | +} | |
| 271 | + | |
| 272 | +static inline void atomic64_add(u64 i, atomic64_t *v) | |
| 273 | +{ | |
| 274 | + u64 result; | |
| 275 | + unsigned long tmp; | |
| 276 | + | |
| 277 | + __asm__ __volatile__("@ atomic64_add\n" | |
| 278 | +"1: ldrexd %0, %H0, [%2]\n" | |
| 279 | +" adds %0, %0, %3\n" | |
| 280 | +" adc %H0, %H0, %H3\n" | |
| 281 | +" strexd %1, %0, %H0, [%2]\n" | |
| 282 | +" teq %1, #0\n" | |
| 283 | +" bne 1b" | |
| 284 | + : "=&r" (result), "=&r" (tmp) | |
| 285 | + : "r" (&v->counter), "r" (i) | |
| 286 | + : "cc"); | |
| 287 | +} | |
| 288 | + | |
| 289 | +static inline u64 atomic64_add_return(u64 i, atomic64_t *v) | |
| 290 | +{ | |
| 291 | + u64 result; | |
| 292 | + unsigned long tmp; | |
| 293 | + | |
| 294 | + smp_mb(); | |
| 295 | + | |
| 296 | + __asm__ __volatile__("@ atomic64_add_return\n" | |
| 297 | +"1: ldrexd %0, %H0, [%2]\n" | |
| 298 | +" adds %0, %0, %3\n" | |
| 299 | +" adc %H0, %H0, %H3\n" | |
| 300 | +" strexd %1, %0, %H0, [%2]\n" | |
| 301 | +" teq %1, #0\n" | |
| 302 | +" bne 1b" | |
| 303 | + : "=&r" (result), "=&r" (tmp) | |
| 304 | + : "r" (&v->counter), "r" (i) | |
| 305 | + : "cc"); | |
| 306 | + | |
| 307 | + smp_mb(); | |
| 308 | + | |
| 309 | + return result; | |
| 310 | +} | |
| 311 | + | |
| 312 | +static inline void atomic64_sub(u64 i, atomic64_t *v) | |
| 313 | +{ | |
| 314 | + u64 result; | |
| 315 | + unsigned long tmp; | |
| 316 | + | |
| 317 | + __asm__ __volatile__("@ atomic64_sub\n" | |
| 318 | +"1: ldrexd %0, %H0, [%2]\n" | |
| 319 | +" subs %0, %0, %3\n" | |
| 320 | +" sbc %H0, %H0, %H3\n" | |
| 321 | +" strexd %1, %0, %H0, [%2]\n" | |
| 322 | +" teq %1, #0\n" | |
| 323 | +" bne 1b" | |
| 324 | + : "=&r" (result), "=&r" (tmp) | |
| 325 | + : "r" (&v->counter), "r" (i) | |
| 326 | + : "cc"); | |
| 327 | +} | |
| 328 | + | |
| 329 | +static inline u64 atomic64_sub_return(u64 i, atomic64_t *v) | |
| 330 | +{ | |
| 331 | + u64 result; | |
| 332 | + unsigned long tmp; | |
| 333 | + | |
| 334 | + smp_mb(); | |
| 335 | + | |
| 336 | + __asm__ __volatile__("@ atomic64_sub_return\n" | |
| 337 | +"1: ldrexd %0, %H0, [%2]\n" | |
| 338 | +" subs %0, %0, %3\n" | |
| 339 | +" sbc %H0, %H0, %H3\n" | |
| 340 | +" strexd %1, %0, %H0, [%2]\n" | |
| 341 | +" teq %1, #0\n" | |
| 342 | +" bne 1b" | |
| 343 | + : "=&r" (result), "=&r" (tmp) | |
| 344 | + : "r" (&v->counter), "r" (i) | |
| 345 | + : "cc"); | |
| 346 | + | |
| 347 | + smp_mb(); | |
| 348 | + | |
| 349 | + return result; | |
| 350 | +} | |
| 351 | + | |
| 352 | +static inline u64 atomic64_cmpxchg(atomic64_t *ptr, u64 old, u64 new) | |
| 353 | +{ | |
| 354 | + u64 oldval; | |
| 355 | + unsigned long res; | |
| 356 | + | |
| 357 | + smp_mb(); | |
| 358 | + | |
| 359 | + do { | |
| 360 | + __asm__ __volatile__("@ atomic64_cmpxchg\n" | |
| 361 | + "ldrexd %1, %H1, [%2]\n" | |
| 362 | + "mov %0, #0\n" | |
| 363 | + "teq %1, %3\n" | |
| 364 | + "teqeq %H1, %H3\n" | |
| 365 | + "strexdeq %0, %4, %H4, [%2]" | |
| 366 | + : "=&r" (res), "=&r" (oldval) | |
| 367 | + : "r" (&ptr->counter), "r" (old), "r" (new) | |
| 368 | + : "cc"); | |
| 369 | + } while (res); | |
| 370 | + | |
| 371 | + smp_mb(); | |
| 372 | + | |
| 373 | + return oldval; | |
| 374 | +} | |
| 375 | + | |
| 376 | +static inline u64 atomic64_xchg(atomic64_t *ptr, u64 new) | |
| 377 | +{ | |
| 378 | + u64 result; | |
| 379 | + unsigned long tmp; | |
| 380 | + | |
| 381 | + smp_mb(); | |
| 382 | + | |
| 383 | + __asm__ __volatile__("@ atomic64_xchg\n" | |
| 384 | +"1: ldrexd %0, %H0, [%2]\n" | |
| 385 | +" strexd %1, %3, %H3, [%2]\n" | |
| 386 | +" teq %1, #0\n" | |
| 387 | +" bne 1b" | |
| 388 | + : "=&r" (result), "=&r" (tmp) | |
| 389 | + : "r" (&ptr->counter), "r" (new) | |
| 390 | + : "cc"); | |
| 391 | + | |
| 392 | + smp_mb(); | |
| 393 | + | |
| 394 | + return result; | |
| 395 | +} | |
| 396 | + | |
| 397 | +static inline u64 atomic64_dec_if_positive(atomic64_t *v) | |
| 398 | +{ | |
| 399 | + u64 result; | |
| 400 | + unsigned long tmp; | |
| 401 | + | |
| 402 | + smp_mb(); | |
| 403 | + | |
| 404 | + __asm__ __volatile__("@ atomic64_dec_if_positive\n" | |
| 405 | +"1: ldrexd %0, %H0, [%2]\n" | |
| 406 | +" subs %0, %0, #1\n" | |
| 407 | +" sbc %H0, %H0, #0\n" | |
| 408 | +" teq %H0, #0\n" | |
| 409 | +" bmi 2f\n" | |
| 410 | +" strexd %1, %0, %H0, [%2]\n" | |
| 411 | +" teq %1, #0\n" | |
| 412 | +" bne 1b\n" | |
| 413 | +"2:" | |
| 414 | + : "=&r" (result), "=&r" (tmp) | |
| 415 | + : "r" (&v->counter) | |
| 416 | + : "cc"); | |
| 417 | + | |
| 418 | + smp_mb(); | |
| 419 | + | |
| 420 | + return result; | |
| 421 | +} | |
| 422 | + | |
| 423 | +static inline int atomic64_add_unless(atomic64_t *v, u64 a, u64 u) | |
| 424 | +{ | |
| 425 | + u64 val; | |
| 426 | + unsigned long tmp; | |
| 427 | + int ret = 1; | |
| 428 | + | |
| 429 | + smp_mb(); | |
| 430 | + | |
| 431 | + __asm__ __volatile__("@ atomic64_add_unless\n" | |
| 432 | +"1: ldrexd %0, %H0, [%3]\n" | |
| 433 | +" teq %0, %4\n" | |
| 434 | +" teqeq %H0, %H4\n" | |
| 435 | +" moveq %1, #0\n" | |
| 436 | +" beq 2f\n" | |
| 437 | +" adds %0, %0, %5\n" | |
| 438 | +" adc %H0, %H0, %H5\n" | |
| 439 | +" strexd %2, %0, %H0, [%3]\n" | |
| 440 | +" teq %2, #0\n" | |
| 441 | +" bne 1b\n" | |
| 442 | +"2:" | |
| 443 | + : "=&r" (val), "=&r" (ret), "=&r" (tmp) | |
| 444 | + : "r" (&v->counter), "r" (u), "r" (a) | |
| 445 | + : "cc"); | |
| 446 | + | |
| 447 | + if (ret) | |
| 448 | + smp_mb(); | |
| 449 | + | |
| 450 | + return ret; | |
| 451 | +} | |
| 452 | + | |
| 453 | +#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0) | |
| 454 | +#define atomic64_inc(v) atomic64_add(1LL, (v)) | |
| 455 | +#define atomic64_inc_return(v) atomic64_add_return(1LL, (v)) | |
| 456 | +#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) | |
| 457 | +#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0) | |
| 458 | +#define atomic64_dec(v) atomic64_sub(1LL, (v)) | |
| 459 | +#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v)) | |
| 460 | +#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0) | |
| 461 | +#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL) | |
| 462 | + | |
| 463 | +#else /* !CONFIG_GENERIC_ATOMIC64 */ | |
| 464 | +#include <asm-generic/atomic64.h> | |
| 465 | +#endif | |
| 238 | 466 | #include <asm-generic/atomic-long.h> |
| 239 | 467 | #endif |
| 240 | 468 | #endif |
| @@ -197,21 +197,6 @@ · 196 unmodified lines | ||
| 197 | 197 | * DMA Cache Coherency |
| 198 | 198 | * =================== |
| 199 | 199 | * |
| 200 | − * dma_inv_range(start, end) | |
| 201 | − * | |
| 202 | − * Invalidate (discard) the specified virtual address range. | |
| 203 | − * May not write back any entries. If 'start' or 'end' | |
| 204 | − * are not cache line aligned, those lines must be written | |
| 205 | − * back. | |
| 206 | − * - start - virtual start address | |
| 207 | − * - end - virtual end address | |
| 208 | − * | |
| 209 | − * dma_clean_range(start, end) | |
| 210 | − * | |
| 211 | − * Clean (write back) the specified virtual address range. | |
| 212 | − * - start - virtual start address | |
| 213 | − * - end - virtual end address | |
| 214 | − * | |
| 215 | 200 | * dma_flush_range(start, end) |
| 216 | 201 | * |
| 217 | 202 | * Clean and invalidate the specified virtual address range. |
| @@ -228,8 +213,9 @@ struct cpu_cache_fns { · 10 unmodified lines | ||
| 228 | 213 | void (*coherent_user_range)(unsigned long, unsigned long); |
| 229 | 214 | void (*flush_kern_dcache_area)(void *, size_t); |
| 230 | 215 | |
| 231 | − void (*dma_inv_range)(const void *, const void *); | |
| 232 | − void (*dma_clean_range)(const void *, const void *); | |
| 216 | + void (*dma_map_area)(const void *, size_t, int); | |
| 217 | + void (*dma_unmap_area)(const void *, size_t, int); | |
| 218 | + | |
| 233 | 219 | void (*dma_flush_range)(const void *, const void *); |
| 234 | 220 | }; |
| 235 | 221 | |
| @@ -259,8 +245,8 @@ extern struct cpu_cache_fns cpu_cache; · 23 unmodified lines | ||
| 259 | 245 | * is visible to DMA, or data written by DMA to system memory is |
| 260 | 246 | * visible to the CPU. |
| 261 | 247 | */ |
| 262 | −#define dmac_inv_range cpu_cache.dma_inv_range | |
| 263 | −#define dmac_clean_range cpu_cache.dma_clean_range | |
| 248 | +#define dmac_map_area cpu_cache.dma_map_area | |
| 249 | +#define dmac_unmap_area cpu_cache.dma_unmap_area | |
| 264 | 250 | #define dmac_flush_range cpu_cache.dma_flush_range |
| 265 | 251 | |
| 266 | 252 | #else |
| @@ -285,12 +271,12 @@ extern void __cpuc_flush_dcache_area(void *, size_t); · 18 unmodified lines | ||
| 285 | 271 | * is visible to DMA, or data written by DMA to system memory is |
| 286 | 272 | * visible to the CPU. |
| 287 | 273 | */ |
| 288 | −#define dmac_inv_range __glue(_CACHE,_dma_inv_range) | |
| 289 | −#define dmac_clean_range __glue(_CACHE,_dma_clean_range) | |
| 274 | +#define dmac_map_area __glue(_CACHE,_dma_map_area) | |
| 275 | +#define dmac_unmap_area __glue(_CACHE,_dma_unmap_area) | |
| 290 | 276 | #define dmac_flush_range __glue(_CACHE,_dma_flush_range) |
| 291 | 277 | |
| 292 | −extern void dmac_inv_range(const void *, const void *); | |
| 293 | −extern void dmac_clean_range(const void *, const void *); | |
| 278 | +extern void dmac_map_area(const void *, size_t, int); | |
| 279 | +extern void dmac_unmap_area(const void *, size_t, int); | |
| 294 | 280 | extern void dmac_flush_range(const void *, const void *); |
| 295 | 281 | |
| 296 | 282 | #endif |
| @@ -331,12 +317,8 @@ static inline void outer_flush_range(unsigned long start, unsigned long end) · 34 unmodified lines | ||
| 331 | 317 | * processes address space. Really, we want to allow our "user |
| 332 | 318 | * space" model to handle this. |
| 333 | 319 | */ |
| 334 | −#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ | |
| 335 | − do { \ | |
| 336 | − memcpy(dst, src, len); \ | |
| 337 | − flush_ptrace_access(vma, page, vaddr, dst, len, 1);\ | |
| 338 | − } while (0) | |
| 339 | − | |
| 320 | +extern void copy_to_user_page(struct vm_area_struct *, struct page *, | |
| 321 | + unsigned long, void *, const void *, unsigned long); | |
| 340 | 322 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
| 341 | 323 | do { \ |
| 342 | 324 | memcpy(dst, src, len); \ |
| @@ -370,17 +352,6 @@ vivt_flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsig · 27 unmodified lines | ||
| 370 | 352 | } |
| 371 | 353 | } |
| 372 | 354 | |
| 373 | −static inline void | |
| 374 | −vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |
| 375 | − unsigned long uaddr, void *kaddr, | |
| 376 | − unsigned long len, int write) | |
| 377 | −{ | |
| 378 | − if (cpumask_test_cpu(smp_processor_id(), mm_cpumask(vma->vm_mm))) { | |
| 379 | − unsigned long addr = (unsigned long)kaddr; | |
| 380 | − __cpuc_coherent_kern_range(addr, addr + len); | |
| 381 | − } | |
| 382 | −} | |
| 383 | − | |
| 384 | 355 | #ifndef CONFIG_CPU_CACHE_VIPT |
| 385 | 356 | #define flush_cache_mm(mm) \ |
| 386 | 357 | vivt_flush_cache_mm(mm) |
| @@ -388,15 +359,10 @@ vivt_flush_ptrace_access(struct vm_area_struct *vma, struct page *page, · 1 unmodified line | ||
| 388 | 359 | vivt_flush_cache_range(vma,start,end) |
| 389 | 360 | #define flush_cache_page(vma,addr,pfn) \ |
| 390 | 361 | vivt_flush_cache_page(vma,addr,pfn) |
| 391 | −#define flush_ptrace_access(vma,page,ua,ka,len,write) \ | |
| 392 | − vivt_flush_ptrace_access(vma,page,ua,ka,len,write) | |
| 393 | 362 | #else |
| 394 | 363 | extern void flush_cache_mm(struct mm_struct *mm); |
| 395 | 364 | extern void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end); |
| 396 | 365 | extern void flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr, unsigned long pfn); |
| 397 | −extern void flush_ptrace_access(struct vm_area_struct *vma, struct page *page, | |
| 398 | − unsigned long uaddr, void *kaddr, | |
| 399 | − unsigned long len, int write); | |
| 400 | 366 | #endif |
| 401 | 367 | |
| 402 | 368 | #define flush_cache_dup_mm(mm) flush_cache_mm(mm) |
| @@ -447,6 +413,16 @@ static inline void __flush_icache_all(void) · 44 unmodified lines | ||
| 447 | 413 | : "r" (0)); |
| 448 | 414 | #endif |
| 449 | 415 | } |
| 416 | +static inline void flush_kernel_vmap_range(void *addr, int size) | |
| 417 | +{ | |
| 418 | + if ((cache_is_vivt() || cache_is_vipt_aliasing())) | |
| 419 | + __cpuc_flush_dcache_area(addr, (size_t)size); | |
| 420 | +} | |
| 421 | +static inline void invalidate_kernel_vmap_range(void *addr, int size) | |
| 422 | +{ | |
| 423 | + if ((cache_is_vivt() || cache_is_vipt_aliasing())) | |
| 424 | + __cpuc_flush_dcache_area(addr, (size_t)size); | |
| 425 | +} | |
| 450 | 426 | |
| 451 | 427 | #define ARCH_HAS_FLUSH_ANON_PAGE |
| 452 | 428 | static inline void flush_anon_page(struct vm_area_struct *vma, |
| @@ -27,4 +27,7 @@ struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id, · 26 unmodified lines | ||
| 27 | 27 | void clkdev_add(struct clk_lookup *cl); |
| 28 | 28 | void clkdev_drop(struct clk_lookup *cl); |
| 29 | 29 | |
| 30 | +void clkdev_add_table(struct clk_lookup *, size_t); | |
| 31 | +int clk_add_alias(const char *, const char *, char *, struct device *); | |
| 32 | + | |
| 30 | 33 | #endif |
| @@ -57,18 +57,58 @@ static inline dma_addr_t virt_to_dma(struct device *dev, void *addr) · 56 unmodified lines | ||
| 57 | 57 | #endif |
| 58 | 58 | |
| 59 | 59 | /* |
| 60 | − * DMA-consistent mapping functions. These allocate/free a region of | |
| 61 | − * uncached, unwrite-buffered mapped memory space for use with DMA | |
| 62 | − * devices. This is the "generic" version. The PCI specific version | |
| 63 | − * is in pci.h | |
| 60 | + * The DMA API is built upon the notion of "buffer ownership". A buffer | |
| 61 | + * is either exclusively owned by the CPU (and therefore may be accessed | |
| 62 | + * by it) or exclusively owned by the DMA device. These helper functions | |
| 63 | + * represent the transitions between these two ownership states. | |
| 64 | 64 | * |
| 65 | − * Note: Drivers should NOT use this function directly, as it will break | |
| 66 | − * platforms with CONFIG_DMABOUNCE. | |
| 67 | − * Use the driver DMA support - see dma-mapping.h (dma_sync_*) | |
| 65 | + * Note, however, that on later ARMs, this notion does not work due to | |
| 66 | + * speculative prefetches. We model our approach on the assumption that | |
| 67 | + * the CPU does do speculative prefetches, which means we clean caches | |
| 68 | + * before transfers and delay cache invalidation until transfer completion. | |
| 69 | + * | |
| 70 | + * Private support functions: these are not part of the API and are | |
| 71 | + * liable to change. Drivers must not use these. | |
| 68 | 72 | */ |
| 69 | −extern void dma_cache_maint(const void *kaddr, size_t size, int rw); | |
| 70 | −extern void dma_cache_maint_page(struct page *page, unsigned long offset, | |
| 71 | − size_t size, int rw); | |
| 73 | +static inline void __dma_single_cpu_to_dev(const void *kaddr, size_t size, | |
| 74 | + enum dma_data_direction dir) | |
| 75 | +{ | |
| 76 | + extern void ___dma_single_cpu_to_dev(const void *, size_t, | |
| 77 | + enum dma_data_direction); | |
| 78 | + | |
| 79 | + if (!arch_is_coherent()) | |
| 80 | + ___dma_single_cpu_to_dev(kaddr, size, dir); | |
| 81 | +} | |
| 82 | + | |
| 83 | +static inline void __dma_single_dev_to_cpu(const void *kaddr, size_t size, | |
| 84 | + enum dma_data_direction dir) | |
| 85 | +{ | |
| 86 | + extern void ___dma_single_dev_to_cpu(const void *, size_t, | |
| 87 | + enum dma_data_direction); | |
| 88 | + | |
| 89 | + if (!arch_is_coherent()) | |
| 90 | + ___dma_single_dev_to_cpu(kaddr, size, dir); | |
| 91 | +} | |
| 92 | + | |
| 93 | +static inline void __dma_page_cpu_to_dev(struct page *page, unsigned long off, | |
| 94 | + size_t size, enum dma_data_direction dir) | |
| 95 | +{ | |
| 96 | + extern void ___dma_page_cpu_to_dev(struct page *, unsigned long, | |
| 97 | + size_t, enum dma_data_direction); | |
| 98 | + | |
| 99 | + if (!arch_is_coherent()) | |
| 100 | + ___dma_page_cpu_to_dev(page, off, size, dir); | |
| 101 | +} | |
| 102 | + | |
| 103 | +static inline void __dma_page_dev_to_cpu(struct page *page, unsigned long off, | |
| 104 | + size_t size, enum dma_data_direction dir) | |
| 105 | +{ | |
| 106 | + extern void ___dma_page_dev_to_cpu(struct page *, unsigned long, | |
| 107 | + size_t, enum dma_data_direction); | |
| 108 | + | |
| 109 | + if (!arch_is_coherent()) | |
| 110 | + ___dma_page_dev_to_cpu(page, off, size, dir); | |
| 111 | +} | |
| 72 | 112 | |
| 73 | 113 | /* |
| 74 | 114 | * Return whether the given device DMA address mask can be supported |
| @@ -304,8 +344,7 @@ static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, · 229 unmodified lines | ||
| 304 | 344 | { |
| 305 | 345 | BUG_ON(!valid_dma_direction(dir)); |
| 306 | 346 | |
| 307 | − if (!arch_is_coherent()) | |
| 308 | − dma_cache_maint(cpu_addr, size, dir); | |
| 347 | + __dma_single_cpu_to_dev(cpu_addr, size, dir); | |
| 309 | 348 | |
| 310 | 349 | return virt_to_dma(dev, cpu_addr); |
| 311 | 350 | } |
| @@ -329,8 +368,7 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, · 17 unmodified lines | ||
| 329 | 368 | { |
| 330 | 369 | BUG_ON(!valid_dma_direction(dir)); |
| 331 | 370 | |
| 332 | − if (!arch_is_coherent()) | |
| 333 | − dma_cache_maint_page(page, offset, size, dir); | |
| 371 | + __dma_page_cpu_to_dev(page, offset, size, dir); | |
| 334 | 372 | |
| 335 | 373 | return page_to_dma(dev, page) + offset; |
| 336 | 374 | } |
| @@ -352,7 +390,7 @@ static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, · 15 unmodified lines | ||
| 352 | 390 | static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, |
| 353 | 391 | size_t size, enum dma_data_direction dir) |
| 354 | 392 | { |
| 355 | − /* nothing to do */ | |
| 393 | + __dma_single_dev_to_cpu(dma_to_virt(dev, handle), size, dir); | |
| 356 | 394 | } |
| 357 | 395 | |
| 358 | 396 | /** |
| @@ -372,7 +410,8 @@ static inline void dma_unmap_single(struct device *dev, dma_addr_t handle, · 13 unmodified lines | ||
| 372 | 410 | static inline void dma_unmap_page(struct device *dev, dma_addr_t handle, |
| 373 | 411 | size_t size, enum dma_data_direction dir) |
| 374 | 412 | { |
| 375 | − /* nothing to do */ | |
| 413 | + __dma_page_dev_to_cpu(dma_to_page(dev, handle), handle & ~PAGE_MASK, | |
| 414 | + size, dir); | |
| 376 | 415 | } |
| 377 | 416 | #endif /* CONFIG_DMABOUNCE */ |
| 378 | 417 | |
| @@ -400,7 +439,10 @@ static inline void dma_sync_single_range_for_cpu(struct device *dev, · 21 unmodified lines | ||
| 400 | 439 | { |
| 401 | 440 | BUG_ON(!valid_dma_direction(dir)); |
| 402 | 441 | |
| 403 | − dmabounce_sync_for_cpu(dev, handle, offset, size, dir); | |
| 442 | + if (!dmabounce_sync_for_cpu(dev, handle, offset, size, dir)) | |
| 443 | + return; | |
| 444 | + | |
| 445 | + __dma_single_dev_to_cpu(dma_to_virt(dev, handle) + offset, size, dir); | |
| 404 | 446 | } |
| 405 | 447 | |
| 406 | 448 | static inline void dma_sync_single_range_for_device(struct device *dev, |
| @@ -412,8 +454,7 @@ static inline void dma_sync_single_range_for_device(struct device *dev, · 5 unmodified lines | ||
| 412 | 454 | if (!dmabounce_sync_for_device(dev, handle, offset, size, dir)) |
| 413 | 455 | return; |
| 414 | 456 | |
| 415 | − if (!arch_is_coherent()) | |
| 416 | − dma_cache_maint(dma_to_virt(dev, handle) + offset, size, dir); | |
| 457 | + __dma_single_cpu_to_dev(dma_to_virt(dev, handle) + offset, size, dir); | |
| 417 | 458 | } |
| 418 | 459 | |
| 419 | 460 | static inline void dma_sync_single_for_cpu(struct device *dev, |
| @@ -69,9 +69,16 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen); · 68 unmodified lines | ||
| 69 | 69 | /* |
| 70 | 70 | * __arm_ioremap takes CPU physical address. |
| 71 | 71 | * __arm_ioremap_pfn takes a Page Frame Number and an offset into that page |
| 72 | + * The _caller variety takes a __builtin_return_address(0) value for | |
| 73 | + * /proc/vmalloc to use - and should only be used in non-inline functions. | |
| 72 | 74 | */ |
| 73 | −extern void __iomem * __arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); | |
| 74 | −extern void __iomem * __arm_ioremap(unsigned long, size_t, unsigned int); | |
| 75 | +extern void __iomem *__arm_ioremap_pfn_caller(unsigned long, unsigned long, | |
| 76 | + size_t, unsigned int, void *); | |
| 77 | +extern void __iomem *__arm_ioremap_caller(unsigned long, size_t, unsigned int, | |
| 78 | + void *); | |
| 79 | + | |
| 80 | +extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, unsigned int); | |
| 81 | +extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int); | |
| 75 | 82 | extern void __iounmap(volatile void __iomem *addr); |
| 76 | 83 | |
| 77 | 84 | /* |
| @@ -46,12 +46,4 @@ struct sys_timer { · 45 unmodified lines | ||
| 46 | 46 | extern struct sys_timer *system_timer; |
| 47 | 47 | extern void timer_tick(void); |
| 48 | 48 | |
| 49 | −/* | |
| 50 | − * Kernel time keeping support. | |
| 51 | − */ | |
| 52 | −struct timespec; | |
| 53 | −extern int (*set_rtc)(void); | |
| 54 | −extern void save_time_delta(struct timespec *delta, struct timespec *rtc); | |
| 55 | −extern void restore_time_delta(struct timespec *delta, struct timespec *rtc); | |
| 56 | − | |
| 57 | 49 | #endif |
| @@ -76,6 +76,17 @@ · 75 unmodified lines | ||
| 76 | 76 | */ |
| 77 | 77 | #define IOREMAP_MAX_ORDER 24 |
| 78 | 78 | |
| 79 | +/* | |
| 80 | + * Size of DMA-consistent memory region. Must be multiple of 2M, | |
| 81 | + * between 2MB and 14MB inclusive. | |
| 82 | + */ | |
| 83 | +#ifndef CONSISTENT_DMA_SIZE | |
| 84 | +#define CONSISTENT_DMA_SIZE SZ_2M | |
| 85 | +#endif | |
| 86 | + | |
| 87 | +#define CONSISTENT_END (0xffe00000UL) | |
| 88 | +#define CONSISTENT_BASE (CONSISTENT_END - CONSISTENT_DMA_SIZE) | |
| 89 | + | |
| 79 | 90 | #else /* CONFIG_MMU */ |
| 80 | 91 | |
| 81 | 92 | /* |
| @@ -93,11 +104,11 @@ · 11 unmodified lines | ||
| 93 | 104 | #endif |
| 94 | 105 | |
| 95 | 106 | #ifndef PHYS_OFFSET |
| 96 | −#define PHYS_OFFSET (CONFIG_DRAM_BASE) | |
| 107 | +#define PHYS_OFFSET UL(CONFIG_DRAM_BASE) | |
| 97 | 108 | #endif |
| 98 | 109 | |
| 99 | 110 | #ifndef END_MEM |
| 100 | −#define END_MEM (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE) | |
| 111 | +#define END_MEM (UL(CONFIG_DRAM_BASE) + CONFIG_DRAM_SIZE) | |
| 101 | 112 | #endif |
| 102 | 113 | |
| 103 | 114 | #ifndef PAGE_OFFSET |
| @@ -112,14 +123,6 @@ · 8 unmodified lines | ||
| 112 | 123 | |
| 113 | 124 | #endif /* !CONFIG_MMU */ |
| 114 | 125 | |
| 115 | −/* | |
| 116 | − * Size of DMA-consistent memory region. Must be multiple of 2M, | |
| 117 | − * between 2MB and 14MB inclusive. | |
| 118 | − */ | |
| 119 | −#ifndef CONSISTENT_DMA_SIZE | |
| 120 | −#define CONSISTENT_DMA_SIZE SZ_2M | |
| 121 | −#endif | |
| 122 | − | |
| 123 | 126 | /* |
| 124 | 127 | * Physical vs virtual RAM address space conversion. These are |
| 125 | 128 | * private definitions which should NOT be used outside memory.h |
| @@ -6,6 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | typedef struct { |
| 7 | 7 | #ifdef CONFIG_CPU_HAS_ASID |
| 8 | 8 | unsigned int id; |
| 9 | + spinlock_t id_lock; | |
| 9 | 10 | #endif |
| 10 | 11 | unsigned int kvm_seq; |
| 11 | 12 | } mm_context_t; |
| @@ -43,12 +43,23 @@ void __check_kvm_seq(struct mm_struct *mm); · 42 unmodified lines | ||
| 43 | 43 | #define ASID_FIRST_VERSION (1 << ASID_BITS) |
| 44 | 44 | |
| 45 | 45 | extern unsigned int cpu_last_asid; |
| 46 | +#ifdef CONFIG_SMP | |
| 47 | +DECLARE_PER_CPU(struct mm_struct *, current_mm); | |
| 48 | +#endif | |
| 46 | 49 | |
| 47 | 50 | void __init_new_context(struct task_struct *tsk, struct mm_struct *mm); |
| 48 | 51 | void __new_context(struct mm_struct *mm); |
| 49 | 52 | |
| 50 | 53 | static inline void check_context(struct mm_struct *mm) |
| 51 | 54 | { |
| 55 | + /* | |
| 56 | + * This code is executed with interrupts enabled. Therefore, | |
| 57 | + * mm->context.id cannot be updated to the latest ASID version | |
| 58 | + * on a different CPU (and condition below not triggered) | |
| 59 | + * without first getting an IPI to reset the context. The | |
| 60 | + * alternative is to take a read_lock on mm->context.id_lock | |
| 61 | + * (after changing its type to rwlock_t). | |
| 62 | + */ | |
| 52 | 63 | if (unlikely((mm->context.id ^ cpu_last_asid) >> ASID_BITS)) |
| 53 | 64 | __new_context(mm); |
| 54 | 65 | |
| @@ -108,6 +119,10 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, · 53 unmodified lines | ||
| 108 | 119 | __flush_icache_all(); |
| 109 | 120 | #endif |
| 110 | 121 | if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) { |
| 122 | +#ifdef CONFIG_SMP | |
| 123 | + struct mm_struct **crt_mm = &per_cpu(current_mm, cpu); | |
| 124 | + *crt_mm = next; | |
| 125 | +#endif | |
| 111 | 126 | check_context(next); |
| 112 | 127 | cpu_switch_mm(next->pgd, next); |
| 113 | 128 | if (cache_is_vivt()) |
| @@ -117,11 +117,12 @@ · 116 unmodified lines | ||
| 117 | 117 | #endif |
| 118 | 118 | |
| 119 | 119 | struct page; |
| 120 | +struct vm_area_struct; | |
| 120 | 121 | |
| 121 | 122 | struct cpu_user_fns { |
| 122 | 123 | void (*cpu_clear_user_highpage)(struct page *page, unsigned long vaddr); |
| 123 | 124 | void (*cpu_copy_user_highpage)(struct page *to, struct page *from, |
| 124 | − unsigned long vaddr); | |
| 125 | + unsigned long vaddr, struct vm_area_struct *vma); | |
| 125 | 126 | }; |
| 126 | 127 | |
| 127 | 128 | #ifdef MULTI_USER |
| @@ -137,7 +138,7 @@ extern struct cpu_user_fns cpu_user; · 9 unmodified lines | ||
| 137 | 138 | |
| 138 | 139 | extern void __cpu_clear_user_highpage(struct page *page, unsigned long vaddr); |
| 139 | 140 | extern void __cpu_copy_user_highpage(struct page *to, struct page *from, |
| 140 | − unsigned long vaddr); | |
| 141 | + unsigned long vaddr, struct vm_area_struct *vma); | |
| 141 | 142 | #endif |
| 142 | 143 | |
| 143 | 144 | #define clear_user_highpage(page,vaddr) \ |
| @@ -145,7 +146,7 @@ extern void __cpu_copy_user_highpage(struct page *to, struct page *from, · 1 unmodified line | ||
| 145 | 146 | |
| 146 | 147 | #define __HAVE_ARCH_COPY_USER_HIGHPAGE |
| 147 | 148 | #define copy_user_highpage(to,from,vaddr,vma) \ |
| 148 | − __cpu_copy_user_highpage(to, from, vaddr) | |
| 149 | + __cpu_copy_user_highpage(to, from, vaddr, vma) | |
| 149 | 150 | |
| 150 | 151 | #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) |
| 151 | 152 | extern void copy_page(void *to, const void *from); |
| @@ -0,0 +1,31 @@ | ||
| 1 | +/* | |
| 2 | + * linux/arch/arm/include/asm/perf_event.h | |
| 3 | + * | |
| 4 | + * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + * | |
| 10 | + */ | |
| 11 | + | |
| 12 | +#ifndef __ARM_PERF_EVENT_H__ | |
| 13 | +#define __ARM_PERF_EVENT_H__ | |
| 14 | + | |
| 15 | +/* | |
| 16 | + * NOP: on *most* (read: all supported) ARM platforms, the performance | |
| 17 | + * counter interrupts are regular interrupts and not an NMI. This | |
| 18 | + * means that when we receive the interrupt we can call | |
| 19 | + * perf_event_do_pending() that handles all of the work with | |
| 20 | + * interrupts enabled. | |
| 21 | + */ | |
| 22 | +static inline void | |
| 23 | +set_perf_event_pending(void) | |
| 24 | +{ | |
| 25 | +} | |
| 26 | + | |
| 27 | +/* ARM performance counters start from 1 (in the cp15 accesses) so use the | |
| 28 | + * same indexes here for consistency. */ | |
| 29 | +#define PERF_EVENT_INDEX_OFFSET 1 | |
| 30 | + | |
| 31 | +#endif /* __ARM_PERF_EVENT_H__ */ | |
| @@ -86,8 +86,8 @@ extern unsigned int kobjsize(const void *objp); · 85 unmodified lines | ||
| 86 | 86 | * All 32bit addresses are effectively valid for vmalloc... |
| 87 | 87 | * Sort of meaningless for non-VM targets. |
| 88 | 88 | */ |
| 89 | −#define VMALLOC_START 0 | |
| 90 | −#define VMALLOC_END 0xffffffff | |
| 89 | +#define VMALLOC_START 0UL | |
| 90 | +#define VMALLOC_END 0xffffffffUL | |
| 91 | 91 | |
| 92 | 92 | #define FIRST_USER_ADDRESS (0) |
| 93 | 93 | |
| @@ -0,0 +1,75 @@ | ||
| 1 | +/* | |
| 2 | + * linux/arch/arm/include/asm/pmu.h | |
| 3 | + * | |
| 4 | + * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + * | |
| 10 | + */ | |
| 11 | + | |
| 12 | +#ifndef __ARM_PMU_H__ | |
| 13 | +#define __ARM_PMU_H__ | |
| 14 | + | |
| 15 | +#ifdef CONFIG_CPU_HAS_PMU | |
| 16 | + | |
| 17 | +struct pmu_irqs { | |
| 18 | + const int *irqs; | |
| 19 | + int num_irqs; | |
| 20 | +}; | |
| 21 | + | |
| 22 | +/** | |
| 23 | + * reserve_pmu() - reserve the hardware performance counters | |
| 24 | + * | |
| 25 | + * Reserve the hardware performance counters in the system for exclusive use. | |
| 26 | + * The 'struct pmu_irqs' for the system is returned on success, ERR_PTR() | |
| 27 | + * encoded error on failure. | |
| 28 | + */ | |
| 29 | +extern const struct pmu_irqs * | |
| 30 | +reserve_pmu(void); | |
| 31 | + | |
| 32 | +/** | |
| 33 | + * release_pmu() - Relinquish control of the performance counters | |
| 34 | + * | |
| 35 | + * Release the performance counters and allow someone else to use them. | |
| 36 | + * Callers must have disabled the counters and released IRQs before calling | |
| 37 | + * this. The 'struct pmu_irqs' returned from reserve_pmu() must be passed as | |
| 38 | + * a cookie. | |
| 39 | + */ | |
| 40 | +extern int | |
| 41 | +release_pmu(const struct pmu_irqs *irqs); | |
| 42 | + | |
| 43 | +/** | |
| 44 | + * init_pmu() - Initialise the PMU. | |
| 45 | + * | |
| 46 | + * Initialise the system ready for PMU enabling. This should typically set the | |
| 47 | + * IRQ affinity and nothing else. The users (oprofile/perf events etc) will do | |
| 48 | + * the actual hardware initialisation. | |
| 49 | + */ | |
| 50 | +extern int | |
| 51 | +init_pmu(void); | |
| 52 | + | |
| 53 | +#else /* CONFIG_CPU_HAS_PMU */ | |
| 54 | + | |
| 55 | +static inline const struct pmu_irqs * | |
| 56 | +reserve_pmu(void) | |
| 57 | +{ | |
| 58 | + return ERR_PTR(-ENODEV); | |
| 59 | +} | |
| 60 | + | |
| 61 | +static inline int | |
| 62 | +release_pmu(const struct pmu_irqs *irqs) | |
| 63 | +{ | |
| 64 | + return -ENODEV; | |
| 65 | +} | |
| 66 | + | |
| 67 | +static inline int | |
| 68 | +init_pmu(void) | |
| 69 | +{ | |
| 70 | + return -ENODEV; | |
| 71 | +} | |
| 72 | + | |
| 73 | +#endif /* CONFIG_CPU_HAS_PMU */ | |
| 74 | + | |
| 75 | +#endif /* __ARM_PMU_H__ */ | |
| @@ -223,18 +223,6 @@ extern struct meminfo meminfo; · 222 unmodified lines | ||
| 223 | 223 | #define bank_phys_end(bank) ((bank)->start + (bank)->size) |
| 224 | 224 | #define bank_phys_size(bank) (bank)->size |
| 225 | 225 | |
| 226 | −/* | |
| 227 | − * Early command line parameters. | |
| 228 | − */ | |
| 229 | −struct early_params { | |
| 230 | − const char *arg; | |
| 231 | − void (*fn)(char **p); | |
| 232 | −}; | |
| 233 | − | |
| 234 | −#define __early_param(name,fn) \ | |
| 235 | −static struct early_params __early_##fn __used \ | |
| 236 | −__attribute__((__section__(".early_param.init"))) = { name, fn } | |
| 237 | − | |
| 238 | 226 | #endif /* __KERNEL__ */ |
| 239 | 227 | |
| 240 | 228 | #endif |
| @@ -13,4 +13,9 @@ static inline int tlb_ops_need_broadcast(void) · 12 unmodified lines | ||
| 13 | 13 | return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; |
| 14 | 14 | } |
| 15 | 15 | |
| 16 | +static inline int cache_ops_need_broadcast(void) | |
| 17 | +{ | |
| 18 | + return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; | |
| 19 | +} | |
| 20 | + | |
| 16 | 21 | #endif |
| @@ -5,6 +5,22 @@ · 4 unmodified lines | ||
| 5 | 5 | #error SMP not supported on pre-ARMv6 CPUs |
| 6 | 6 | #endif |
| 7 | 7 | |
| 8 | +static inline void dsb_sev(void) | |
| 9 | +{ | |
| 10 | +#if __LINUX_ARM_ARCH__ >= 7 | |
| 11 | + __asm__ __volatile__ ( | |
| 12 | + "dsb\n" | |
| 13 | + "sev" | |
| 14 | + ); | |
| 15 | +#elif defined(CONFIG_CPU_32v6K) | |
| 16 | + __asm__ __volatile__ ( | |
| 17 | + "mcr p15, 0, %0, c7, c10, 4\n" | |
| 18 | + "sev" | |
| 19 | + : : "r" (0) | |
| 20 | + ); | |
| 21 | +#endif | |
| 22 | +} | |
| 23 | + | |
| 8 | 24 | /* |
| 9 | 25 | * ARMv6 Spin-locking. |
| 10 | 26 | * |
| @@ -69,13 +85,11 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock) · 58 unmodified lines | ||
| 69 | 85 | |
| 70 | 86 | __asm__ __volatile__( |
| 71 | 87 | " str %1, [%0]\n" |
| 72 | −#ifdef CONFIG_CPU_32v6K | |
| 73 | −" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ | |
| 74 | −" sev" | |
| 75 | −#endif | |
| 76 | 88 | : |
| 77 | 89 | : "r" (&lock->lock), "r" (0) |
| 78 | 90 | : "cc"); |
| 91 | + | |
| 92 | + dsb_sev(); | |
| 79 | 93 | } |
| 80 | 94 | |
| 81 | 95 | /* |
| @@ -132,13 +146,11 @@ static inline void arch_write_unlock(arch_rwlock_t *rw) · 50 unmodified lines | ||
| 132 | 146 | |
| 133 | 147 | __asm__ __volatile__( |
| 134 | 148 | "str %1, [%0]\n" |
| 135 | −#ifdef CONFIG_CPU_32v6K | |
| 136 | −" mcr p15, 0, %1, c7, c10, 4\n" /* DSB */ | |
| 137 | −" sev\n" | |
| 138 | −#endif | |
| 139 | 149 | : |
| 140 | 150 | : "r" (&rw->lock), "r" (0) |
| 141 | 151 | : "cc"); |
| 152 | + | |
| 153 | + dsb_sev(); | |
| 142 | 154 | } |
| 143 | 155 | |
| 144 | 156 | /* write_can_lock - would write_trylock() succeed? */ |
| @@ -188,14 +200,12 @@ static inline void arch_read_unlock(arch_rwlock_t *rw) · 43 unmodified lines | ||
| 188 | 200 | " strex %1, %0, [%2]\n" |
| 189 | 201 | " teq %1, #0\n" |
| 190 | 202 | " bne 1b" |
| 191 | −#ifdef CONFIG_CPU_32v6K | |
| 192 | −"\n cmp %0, #0\n" | |
| 193 | −" mcreq p15, 0, %0, c7, c10, 4\n" | |
| 194 | −" seveq" | |
| 195 | −#endif | |
| 196 | 203 | : "=&r" (tmp), "=&r" (tmp2) |
| 197 | 204 | : "r" (&rw->lock) |
| 198 | 205 | : "cc"); |
| 206 | + | |
| 207 | + if (tmp == 0) | |
| 208 | + dsb_sev(); | |
| 199 | 209 | } |
| 200 | 210 | |
| 201 | 211 | static inline int arch_read_trylock(arch_rwlock_t *rw) |
| @@ -73,8 +73,7 @@ extern unsigned int mem_fclk_21285; · 72 unmodified lines | ||
| 73 | 73 | |
| 74 | 74 | struct pt_regs; |
| 75 | 75 | |
| 76 | −void die(const char *msg, struct pt_regs *regs, int err) | |
| 77 | − __attribute__((noreturn)); | |
| 76 | +void die(const char *msg, struct pt_regs *regs, int err); | |
| 78 | 77 | |
| 79 | 78 | struct siginfo; |
| 80 | 79 | void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, |
| @@ -115,7 +115,8 @@ extern void iwmmxt_task_restore(struct thread_info *, void *); · 114 unmodified lines | ||
| 115 | 115 | extern void iwmmxt_task_release(struct thread_info *); |
| 116 | 116 | extern void iwmmxt_task_switch(struct thread_info *); |
| 117 | 117 | |
| 118 | −extern void vfp_sync_state(struct thread_info *thread); | |
| 118 | +extern void vfp_sync_hwstate(struct thread_info *); | |
| 119 | +extern void vfp_flush_hwstate(struct thread_info *); | |
| 119 | 120 | |
| 120 | 121 | #endif |
| 121 | 122 | |
| @@ -529,7 +529,8 @@ extern void flush_tlb_kernel_range(unsigned long start, unsigned long end); · 528 unmodified lines | ||
| 529 | 529 | * cache entries for the kernels virtual memory range are written |
| 530 | 530 | * back to the page. |
| 531 | 531 | */ |
| 532 | −extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte); | |
| 532 | +extern void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, | |
| 533 | + pte_t *ptep); | |
| 533 | 534 | |
| 534 | 535 | #endif |
| 535 | 536 | |
| @@ -17,6 +17,7 @@ obj-y := compat.o elf.o entry-armv.o entry-common.o irq.o \ · 16 unmodified lines | ||
| 17 | 17 | process.o ptrace.o return_address.o setup.o signal.o \ |
| 18 | 18 | sys_arm.o stacktrace.o time.o traps.o |
| 19 | 19 | |
| 20 | +obj-$(CONFIG_LEDS) += leds.o | |
| 20 | 21 | obj-$(CONFIG_OC_ETM) += etm.o |
| 21 | 22 | |
| 22 | 23 | obj-$(CONFIG_ISA_DMA_API) += dma.o |
| @@ -46,6 +47,8 @@ obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o · 23 unmodified lines | ||
| 46 | 47 | obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o |
| 47 | 48 | obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o |
| 48 | 49 | obj-$(CONFIG_IWMMXT) += iwmmxt.o |
| 50 | +obj-$(CONFIG_CPU_HAS_PMU) += pmu.o | |
| 51 | +obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o | |
| 49 | 52 | AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt |
| 50 | 53 | |
| 51 | 54 | ifneq ($(CONFIG_ARCH_EBSA110),y) |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | */ |
| 13 | 13 | #include <linux/sched.h> |
| 14 | 14 | #include <linux/mm.h> |
| 15 | +#include <linux/dma-mapping.h> | |
| 15 | 16 | #include <asm/mach/arch.h> |
| 16 | 17 | #include <asm/thread_info.h> |
| 17 | 18 | #include <asm/memory.h> |
| @@ -112,5 +113,9 @@ int main(void) · 94 unmodified lines | ||
| 112 | 113 | #ifdef MULTI_PABORT |
| 113 | 114 | DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort)); |
| 114 | 115 | #endif |
| 116 | + BLANK(); | |
| 117 | + DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); | |
| 118 | + DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); | |
| 119 | + DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE); | |
| 115 | 120 | return 0; |
| 116 | 121 | } |
| @@ -616,15 +616,17 @@ char * __init pcibios_setup(char *str) · 615 unmodified lines | ||
| 616 | 616 | * but we want to try to avoid allocating at 0x2900-0x2bff |
| 617 | 617 | * which might be mirrored at 0x0100-0x03ff.. |
| 618 | 618 | */ |
| 619 | −void pcibios_align_resource(void *data, struct resource *res, | |
| 620 | − resource_size_t size, resource_size_t align) | |
| 619 | +resource_size_t pcibios_align_resource(void *data, const struct resource *res, | |
| 620 | + resource_size_t size, resource_size_t align) | |
| 621 | 621 | { |
| 622 | 622 | resource_size_t start = res->start; |
| 623 | 623 | |
| 624 | 624 | if (res->flags & IORESOURCE_IO && start & 0x300) |
| 625 | 625 | start = (start + 0x3ff) & ~0x3ff; |
| 626 | 626 | |
| 627 | − res->start = (start + align - 1) & ~(align - 1); | |
| 627 | + start = (start + align - 1) & ~(align - 1); | |
| 628 | + | |
| 629 | + return start; | |
| 628 | 630 | } |
| 629 | 631 | |
| 630 | 632 | /** |
| @@ -24,7 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | #if defined(CONFIG_CPU_V6) |
| 26 | 26 | |
| 27 | − .macro addruart, rx | |
| 27 | + .macro addruart, rx, tmp | |
| 28 | 28 | .endm |
| 29 | 29 | |
| 30 | 30 | .macro senduart, rd, rx |
| @@ -51,7 +51,7 @@ · 20 unmodified lines | ||
| 51 | 51 | |
| 52 | 52 | #elif defined(CONFIG_CPU_V7) |
| 53 | 53 | |
| 54 | − .macro addruart, rx | |
| 54 | + .macro addruart, rx, tmp | |
| 55 | 55 | .endm |
| 56 | 56 | |
| 57 | 57 | .macro senduart, rd, rx |
| @@ -71,7 +71,7 @@ wait: mrc p14, 0, pc, c0, c1, 0 · 13 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | #elif defined(CONFIG_CPU_XSCALE) |
| 73 | 73 | |
| 74 | − .macro addruart, rx | |
| 74 | + .macro addruart, rx, tmp | |
| 75 | 75 | .endm |
| 76 | 76 | |
| 77 | 77 | .macro senduart, rd, rx |
| @@ -98,7 +98,7 @@ wait: mrc p14, 0, pc, c0, c1, 0 · 20 unmodified lines | ||
| 98 | 98 | |
| 99 | 99 | #else |
| 100 | 100 | |
| 101 | − .macro addruart, rx | |
| 101 | + .macro addruart, rx, tmp | |
| 102 | 102 | .endm |
| 103 | 103 | |
| 104 | 104 | .macro senduart, rd, rx |
| @@ -164,7 +164,7 @@ ENDPROC(printhex2) · 59 unmodified lines | ||
| 164 | 164 | .ltorg |
| 165 | 165 | |
| 166 | 166 | ENTRY(printascii) |
| 167 | − addruart r3 | |
| 167 | + addruart r3, r1 | |
| 168 | 168 | b 2f |
| 169 | 169 | 1: waituart r2, r3 |
| 170 | 170 | senduart r1, r3 |
| @@ -180,7 +180,7 @@ ENTRY(printascii) · 9 unmodified lines | ||
| 180 | 180 | ENDPROC(printascii) |
| 181 | 181 | |
| 182 | 182 | ENTRY(printch) |
| 183 | − addruart r3 | |
| 183 | + addruart r3, r1 | |
| 184 | 184 | mov r1, r0 |
| 185 | 185 | mov r0, #0 |
| 186 | 186 | b 1b |
| @@ -0,0 +1,115 @@ | ||
| 1 | +/* | |
| 2 | + * LED support code, ripped out of arch/arm/kernel/time.c | |
| 3 | + * | |
| 4 | + * Copyright (C) 1994-2001 Russell King | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + */ | |
| 10 | +#include <linux/module.h> | |
| 11 | +#include <linux/init.h> | |
| 12 | +#include <linux/sysdev.h> | |
| 13 | + | |
| 14 | +#include <asm/leds.h> | |
| 15 | + | |
| 16 | +static void dummy_leds_event(led_event_t evt) | |
| 17 | +{ | |
| 18 | +} | |
| 19 | + | |
| 20 | +void (*leds_event)(led_event_t) = dummy_leds_event; | |
| 21 | + | |
| 22 | +struct leds_evt_name { | |
| 23 | + const char name[8]; | |
| 24 | + int on; | |
| 25 | + int off; | |
| 26 | +}; | |
| 27 | + | |
| 28 | +static const struct leds_evt_name evt_names[] = { | |
| 29 | + { "amber", led_amber_on, led_amber_off }, | |
| 30 | + { "blue", led_blue_on, led_blue_off }, | |
| 31 | + { "green", led_green_on, led_green_off }, | |
| 32 | + { "red", led_red_on, led_red_off }, | |
| 33 | +}; | |
| 34 | + | |
| 35 | +static ssize_t leds_store(struct sys_device *dev, | |
| 36 | + struct sysdev_attribute *attr, | |
| 37 | + const char *buf, size_t size) | |
| 38 | +{ | |
| 39 | + int ret = -EINVAL, len = strcspn(buf, " "); | |
| 40 | + | |
| 41 | + if (len > 0 && buf[len] == '\0') | |
| 42 | + len--; | |
| 43 | + | |
| 44 | + if (strncmp(buf, "claim", len) == 0) { | |
| 45 | + leds_event(led_claim); | |
| 46 | + ret = size; | |
| 47 | + } else if (strncmp(buf, "release", len) == 0) { | |
| 48 | + leds_event(led_release); | |
| 49 | + ret = size; | |
| 50 | + } else { | |
| 51 | + int i; | |
| 52 | + | |
| 53 | + for (i = 0; i < ARRAY_SIZE(evt_names); i++) { | |
| 54 | + if (strlen(evt_names[i].name) != len || | |
| 55 | + strncmp(buf, evt_names[i].name, len) != 0) | |
| 56 | + continue; | |
| 57 | + if (strncmp(buf+len, " on", 3) == 0) { | |
| 58 | + leds_event(evt_names[i].on); | |
| 59 | + ret = size; | |
| 60 | + } else if (strncmp(buf+len, " off", 4) == 0) { | |
| 61 | + leds_event(evt_names[i].off); | |
| 62 | + ret = size; | |
| 63 | + } | |
| 64 | + break; | |
| 65 | + } | |
| 66 | + } | |
| 67 | + return ret; | |
| 68 | +} | |
| 69 | + | |
| 70 | +static SYSDEV_ATTR(event, 0200, NULL, leds_store); | |
| 71 | + | |
| 72 | +static int leds_suspend(struct sys_device *dev, pm_message_t state) | |
| 73 | +{ | |
| 74 | + leds_event(led_stop); | |
| 75 | + return 0; | |
| 76 | +} | |
| 77 | + | |
| 78 | +static int leds_resume(struct sys_device *dev) | |
| 79 | +{ | |
| 80 | + leds_event(led_start); | |
| 81 | + return 0; | |
| 82 | +} | |
| 83 | + | |
| 84 | +static int leds_shutdown(struct sys_device *dev) | |
| 85 | +{ | |
| 86 | + leds_event(led_halted); | |
| 87 | + return 0; | |
| 88 | +} | |
| 89 | + | |
| 90 | +static struct sysdev_class leds_sysclass = { | |
| 91 | + .name = "leds", | |
| 92 | + .shutdown = leds_shutdown, | |
| 93 | + .suspend = leds_suspend, | |
| 94 | + .resume = leds_resume, | |
| 95 | +}; | |
| 96 | + | |
| 97 | +static struct sys_device leds_device = { | |
| 98 | + .id = 0, | |
| 99 | + .cls = &leds_sysclass, | |
| 100 | +}; | |
| 101 | + | |
| 102 | +static int __init leds_init(void) | |
| 103 | +{ | |
| 104 | + int ret; | |
| 105 | + ret = sysdev_class_register(&leds_sysclass); | |
| 106 | + if (ret == 0) | |
| 107 | + ret = sysdev_register(&leds_device); | |
| 108 | + if (ret == 0) | |
| 109 | + ret = sysdev_create_file(&leds_device, &attr_event); | |
| 110 | + return ret; | |
| 111 | +} | |
| 112 | + | |
| 113 | +device_initcall(leds_init); | |
| 114 | + | |
| 115 | +EXPORT_SYMBOL(leds_event); | |
| @@ -0,0 +1,2276 @@ | ||
| 1 | +#undef DEBUG | |
| 2 | + | |
| 3 | +/* | |
| 4 | + * ARM performance counter support. | |
| 5 | + * | |
| 6 | + * Copyright (C) 2009 picoChip Designs, Ltd., Jamie Iles | |
| 7 | + * | |
| 8 | + * ARMv7 support: Jean Pihet <jpihet@mvista.com> | |
| 9 | + * 2010 (c) MontaVista Software, LLC. | |
| 10 | + * | |
| 11 | + * This code is based on the sparc64 perf event code, which is in turn based | |
| 12 | + * on the x86 code. Callchain code is based on the ARM OProfile backtrace | |
| 13 | + * code. | |
| 14 | + */ | |
| 15 | +#define pr_fmt(fmt) "hw perfevents: " fmt | |
| 16 | + | |
| 17 | +#include <linux/interrupt.h> | |
| 18 | +#include <linux/kernel.h> | |
| 19 | +#include <linux/perf_event.h> | |
| 20 | +#include <linux/spinlock.h> | |
| 21 | +#include <linux/uaccess.h> | |
| 22 | + | |
| 23 | +#include <asm/cputype.h> | |
| 24 | +#include <asm/irq.h> | |
| 25 | +#include <asm/irq_regs.h> | |
| 26 | +#include <asm/pmu.h> | |
| 27 | +#include <asm/stacktrace.h> | |
| 28 | + | |
| 29 | +static const struct pmu_irqs *pmu_irqs; | |
| 30 | + | |
| 31 | +/* | |
| 32 | + * Hardware lock to serialize accesses to PMU registers. Needed for the | |
| 33 | + * read/modify/write sequences. | |
| 34 | + */ | |
| 35 | +DEFINE_SPINLOCK(pmu_lock); | |
| 36 | + | |
| 37 | +/* | |
| 38 | + * ARMv6 supports a maximum of 3 events, starting from index 1. If we add | |
| 39 | + * another platform that supports more, we need to increase this to be the | |
| 40 | + * largest of all platforms. | |
| 41 | + * | |
| 42 | + * ARMv7 supports up to 32 events: | |
| 43 | + * cycle counter CCNT + 31 events counters CNT0..30. | |
| 44 | + * Cortex-A8 has 1+4 counters, Cortex-A9 has 1+6 counters. | |
| 45 | + */ | |
| 46 | +#define ARMPMU_MAX_HWEVENTS 33 | |
| 47 | + | |
| 48 | +/* The events for a given CPU. */ | |
| 49 | +struct cpu_hw_events { | |
| 50 | + /* | |
| 51 | + * The events that are active on the CPU for the given index. Index 0 | |
| 52 | + * is reserved. | |
| 53 | + */ | |
| 54 | + struct perf_event *events[ARMPMU_MAX_HWEVENTS]; | |
| 55 | + | |
| 56 | + /* | |
| 57 | + * A 1 bit for an index indicates that the counter is being used for | |
| 58 | + * an event. A 0 means that the counter can be used. | |
| 59 | + */ | |
| 60 | + unsigned long used_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; | |
| 61 | + | |
| 62 | + /* | |
| 63 | + * A 1 bit for an index indicates that the counter is actively being | |
| 64 | + * used. | |
| 65 | + */ | |
| 66 | + unsigned long active_mask[BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS)]; | |
| 67 | +}; | |
| 68 | +DEFINE_PER_CPU(struct cpu_hw_events, cpu_hw_events); | |
| 69 | + | |
| 70 | +struct arm_pmu { | |
| 71 | + char *name; | |
| 72 | + irqreturn_t (*handle_irq)(int irq_num, void *dev); | |
| 73 | + void (*enable)(struct hw_perf_event *evt, int idx); | |
| 74 | + void (*disable)(struct hw_perf_event *evt, int idx); | |
| 75 | + int (*event_map)(int evt); | |
| 76 | + u64 (*raw_event)(u64); | |
| 77 | + int (*get_event_idx)(struct cpu_hw_events *cpuc, | |
| 78 | + struct hw_perf_event *hwc); | |
| 79 | + u32 (*read_counter)(int idx); | |
| 80 | + void (*write_counter)(int idx, u32 val); | |
| 81 | + void (*start)(void); | |
| 82 | + void (*stop)(void); | |
| 83 | + int num_events; | |
| 84 | + u64 max_period; | |
| 85 | +}; | |
| 86 | + | |
| 87 | +/* Set at runtime when we know what CPU type we are. */ | |
| 88 | +static const struct arm_pmu *armpmu; | |
| 89 | + | |
| 90 | +#define HW_OP_UNSUPPORTED 0xFFFF | |
| 91 | + | |
| 92 | +#define C(_x) \ | |
| 93 | + PERF_COUNT_HW_CACHE_##_x | |
| 94 | + | |
| 95 | +#define CACHE_OP_UNSUPPORTED 0xFFFF | |
| 96 | + | |
| 97 | +static unsigned armpmu_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] | |
| 98 | + [PERF_COUNT_HW_CACHE_OP_MAX] | |
| 99 | + [PERF_COUNT_HW_CACHE_RESULT_MAX]; | |
| 100 | + | |
| 101 | +static int | |
| 102 | +armpmu_map_cache_event(u64 config) | |
| 103 | +{ | |
| 104 | + unsigned int cache_type, cache_op, cache_result, ret; | |
| 105 | + | |
| 106 | + cache_type = (config >> 0) & 0xff; | |
| 107 | + if (cache_type >= PERF_COUNT_HW_CACHE_MAX) | |
| 108 | + return -EINVAL; | |
| 109 | + | |
| 110 | + cache_op = (config >> 8) & 0xff; | |
| 111 | + if (cache_op >= PERF_COUNT_HW_CACHE_OP_MAX) | |
| 112 | + return -EINVAL; | |
| 113 | + | |
| 114 | + cache_result = (config >> 16) & 0xff; | |
| 115 | + if (cache_result >= PERF_COUNT_HW_CACHE_RESULT_MAX) | |
| 116 | + return -EINVAL; | |
| 117 | + | |
| 118 | + ret = (int)armpmu_perf_cache_map[cache_type][cache_op][cache_result]; | |
| 119 | + | |
| 120 | + if (ret == CACHE_OP_UNSUPPORTED) | |
| 121 | + return -ENOENT; | |
| 122 | + | |
| 123 | + return ret; | |
| 124 | +} | |
| 125 | + | |
| 126 | +static int | |
| 127 | +armpmu_event_set_period(struct perf_event *event, | |
| 128 | + struct hw_perf_event *hwc, | |
| 129 | + int idx) | |
| 130 | +{ | |
| 131 | + s64 left = atomic64_read(&hwc->period_left); | |
| 132 | + s64 period = hwc->sample_period; | |
| 133 | + int ret = 0; | |
| 134 | + | |
| 135 | + if (unlikely(left <= -period)) { | |
| 136 | + left = period; | |
| 137 | + atomic64_set(&hwc->period_left, left); | |
| 138 | + hwc->last_period = period; | |
| 139 | + ret = 1; | |
| 140 | + } | |
| 141 | + | |
| 142 | + if (unlikely(left <= 0)) { | |
| 143 | + left += period; | |
| 144 | + atomic64_set(&hwc->period_left, left); | |
| 145 | + hwc->last_period = period; | |
| 146 | + ret = 1; | |
| 147 | + } | |
| 148 | + | |
| 149 | + if (left > (s64)armpmu->max_period) | |
| 150 | + left = armpmu->max_period; | |
| 151 | + | |
| 152 | + atomic64_set(&hwc->prev_count, (u64)-left); | |
| 153 | + | |
| 154 | + armpmu->write_counter(idx, (u64)(-left) & 0xffffffff); | |
| 155 | + | |
| 156 | + perf_event_update_userpage(event); | |
| 157 | + | |
| 158 | + return ret; | |
| 159 | +} | |
| 160 | + | |
| 161 | +static u64 | |
| 162 | +armpmu_event_update(struct perf_event *event, | |
| 163 | + struct hw_perf_event *hwc, | |
| 164 | + int idx) | |
| 165 | +{ | |
| 166 | + int shift = 64 - 32; | |
| 167 | + s64 prev_raw_count, new_raw_count; | |
| 168 | + s64 delta; | |
| 169 | + | |
| 170 | +again: | |
| 171 | + prev_raw_count = atomic64_read(&hwc->prev_count); | |
| 172 | + new_raw_count = armpmu->read_counter(idx); | |
| 173 | + | |
| 174 | + if (atomic64_cmpxchg(&hwc->prev_count, prev_raw_count, | |
| 175 | + new_raw_count) != prev_raw_count) | |
| 176 | + goto again; | |
| 177 | + | |
| 178 | + delta = (new_raw_count << shift) - (prev_raw_count << shift); | |
| 179 | + delta >>= shift; | |
| 180 | + | |
| 181 | + atomic64_add(delta, &event->count); | |
| 182 | + atomic64_sub(delta, &hwc->period_left); | |
| 183 | + | |
| 184 | + return new_raw_count; | |
| 185 | +} | |
| 186 | + | |
| 187 | +static void | |
| 188 | +armpmu_disable(struct perf_event *event) | |
| 189 | +{ | |
| 190 | + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | |
| 191 | + struct hw_perf_event *hwc = &event->hw; | |
| 192 | + int idx = hwc->idx; | |
| 193 | + | |
| 194 | + WARN_ON(idx < 0); | |
| 195 | + | |
| 196 | + clear_bit(idx, cpuc->active_mask); | |
| 197 | + armpmu->disable(hwc, idx); | |
| 198 | + | |
| 199 | + barrier(); | |
| 200 | + | |
| 201 | + armpmu_event_update(event, hwc, idx); | |
| 202 | + cpuc->events[idx] = NULL; | |
| 203 | + clear_bit(idx, cpuc->used_mask); | |
| 204 | + | |
| 205 | + perf_event_update_userpage(event); | |
| 206 | +} | |
| 207 | + | |
| 208 | +static void | |
| 209 | +armpmu_read(struct perf_event *event) | |
| 210 | +{ | |
| 211 | + struct hw_perf_event *hwc = &event->hw; | |
| 212 | + | |
| 213 | + /* Don't read disabled counters! */ | |
| 214 | + if (hwc->idx < 0) | |
| 215 | + return; | |
| 216 | + | |
| 217 | + armpmu_event_update(event, hwc, hwc->idx); | |
| 218 | +} | |
| 219 | + | |
| 220 | +static void | |
| 221 | +armpmu_unthrottle(struct perf_event *event) | |
| 222 | +{ | |
| 223 | + struct hw_perf_event *hwc = &event->hw; | |
| 224 | + | |
| 225 | + /* | |
| 226 | + * Set the period again. Some counters can't be stopped, so when we | |
| 227 | + * were throttled we simply disabled the IRQ source and the counter | |
| 228 | + * may have been left counting. If we don't do this step then we may | |
| 229 | + * get an interrupt too soon or *way* too late if the overflow has | |
| 230 | + * happened since disabling. | |
| 231 | + */ | |
| 232 | + armpmu_event_set_period(event, hwc, hwc->idx); | |
| 233 | + armpmu->enable(hwc, hwc->idx); | |
| 234 | +} | |
| 235 | + | |
| 236 | +static int | |
| 237 | +armpmu_enable(struct perf_event *event) | |
| 238 | +{ | |
| 239 | + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | |
| 240 | + struct hw_perf_event *hwc = &event->hw; | |
| 241 | + int idx; | |
| 242 | + int err = 0; | |
| 243 | + | |
| 244 | + /* If we don't have a space for the counter then finish early. */ | |
| 245 | + idx = armpmu->get_event_idx(cpuc, hwc); | |
| 246 | + if (idx < 0) { | |
| 247 | + err = idx; | |
| 248 | + goto out; | |
| 249 | + } | |
| 250 | + | |
| 251 | + /* | |
| 252 | + * If there is an event in the counter we are going to use then make | |
| 253 | + * sure it is disabled. | |
| 254 | + */ | |
| 255 | + event->hw.idx = idx; | |
| 256 | + armpmu->disable(hwc, idx); | |
| 257 | + cpuc->events[idx] = event; | |
| 258 | + set_bit(idx, cpuc->active_mask); | |
| 259 | + | |
| 260 | + /* Set the period for the event. */ | |
| 261 | + armpmu_event_set_period(event, hwc, idx); | |
| 262 | + | |
| 263 | + /* Enable the event. */ | |
| 264 | + armpmu->enable(hwc, idx); | |
| 265 | + | |
| 266 | + /* Propagate our changes to the userspace mapping. */ | |
| 267 | + perf_event_update_userpage(event); | |
| 268 | + | |
| 269 | +out: | |
| 270 | + return err; | |
| 271 | +} | |
| 272 | + | |
| 273 | +static struct pmu pmu = { | |
| 274 | + .enable = armpmu_enable, | |
| 275 | + .disable = armpmu_disable, | |
| 276 | + .unthrottle = armpmu_unthrottle, | |
| 277 | + .read = armpmu_read, | |
| 278 | +}; | |
| 279 | + | |
| 280 | +static int | |
| 281 | +validate_event(struct cpu_hw_events *cpuc, | |
| 282 | + struct perf_event *event) | |
| 283 | +{ | |
| 284 | + struct hw_perf_event fake_event = event->hw; | |
| 285 | + | |
| 286 | + if (event->pmu && event->pmu != &pmu) | |
| 287 | + return 0; | |
| 288 | + | |
| 289 | + return armpmu->get_event_idx(cpuc, &fake_event) >= 0; | |
| 290 | +} | |
| 291 | + | |
| 292 | +static int | |
| 293 | +validate_group(struct perf_event *event) | |
| 294 | +{ | |
| 295 | + struct perf_event *sibling, *leader = event->group_leader; | |
| 296 | + struct cpu_hw_events fake_pmu; | |
| 297 | + | |
| 298 | + memset(&fake_pmu, 0, sizeof(fake_pmu)); | |
| 299 | + | |
| 300 | + if (!validate_event(&fake_pmu, leader)) | |
| 301 | + return -ENOSPC; | |
| 302 | + | |
| 303 | + list_for_each_entry(sibling, &leader->sibling_list, group_entry) { | |
| 304 | + if (!validate_event(&fake_pmu, sibling)) | |
| 305 | + return -ENOSPC; | |
| 306 | + } | |
| 307 | + | |
| 308 | + if (!validate_event(&fake_pmu, event)) | |
| 309 | + return -ENOSPC; | |
| 310 | + | |
| 311 | + return 0; | |
| 312 | +} | |
| 313 | + | |
| 314 | +static int | |
| 315 | +armpmu_reserve_hardware(void) | |
| 316 | +{ | |
| 317 | + int i; | |
| 318 | + int err; | |
| 319 | + | |
| 320 | + pmu_irqs = reserve_pmu(); | |
| 321 | + if (IS_ERR(pmu_irqs)) { | |
| 322 | + pr_warning("unable to reserve pmu\n"); | |
| 323 | + return PTR_ERR(pmu_irqs); | |
| 324 | + } | |
| 325 | + | |
| 326 | + init_pmu(); | |
| 327 | + | |
| 328 | + if (pmu_irqs->num_irqs < 1) { | |
| 329 | + pr_err("no irqs for PMUs defined\n"); | |
| 330 | + return -ENODEV; | |
| 331 | + } | |
| 332 | + | |
| 333 | + for (i = 0; i < pmu_irqs->num_irqs; ++i) { | |
| 334 | + err = request_irq(pmu_irqs->irqs[i], armpmu->handle_irq, | |
| 335 | + IRQF_DISABLED, "armpmu", NULL); | |
| 336 | + if (err) { | |
| 337 | + pr_warning("unable to request IRQ%d for ARM " | |
| 338 | + "perf counters\n", pmu_irqs->irqs[i]); | |
| 339 | + break; | |
| 340 | + } | |
| 341 | + } | |
| 342 | + | |
| 343 | + if (err) { | |
| 344 | + for (i = i - 1; i >= 0; --i) | |
| 345 | + free_irq(pmu_irqs->irqs[i], NULL); | |
| 346 | + release_pmu(pmu_irqs); | |
| 347 | + pmu_irqs = NULL; | |
| 348 | + } | |
| 349 | + | |
| 350 | + return err; | |
| 351 | +} | |
| 352 | + | |
| 353 | +static void | |
| 354 | +armpmu_release_hardware(void) | |
| 355 | +{ | |
| 356 | + int i; | |
| 357 | + | |
| 358 | + for (i = pmu_irqs->num_irqs - 1; i >= 0; --i) | |
| 359 | + free_irq(pmu_irqs->irqs[i], NULL); | |
| 360 | + armpmu->stop(); | |
| 361 | + | |
| 362 | + release_pmu(pmu_irqs); | |
| 363 | + pmu_irqs = NULL; | |
| 364 | +} | |
| 365 | + | |
| 366 | +static atomic_t active_events = ATOMIC_INIT(0); | |
| 367 | +static DEFINE_MUTEX(pmu_reserve_mutex); | |
| 368 | + | |
| 369 | +static void | |
| 370 | +hw_perf_event_destroy(struct perf_event *event) | |
| 371 | +{ | |
| 372 | + if (atomic_dec_and_mutex_lock(&active_events, &pmu_reserve_mutex)) { | |
| 373 | + armpmu_release_hardware(); | |
| 374 | + mutex_unlock(&pmu_reserve_mutex); | |
| 375 | + } | |
| 376 | +} | |
| 377 | + | |
| 378 | +static int | |
| 379 | +__hw_perf_event_init(struct perf_event *event) | |
| 380 | +{ | |
| 381 | + struct hw_perf_event *hwc = &event->hw; | |
| 382 | + int mapping, err; | |
| 383 | + | |
| 384 | + /* Decode the generic type into an ARM event identifier. */ | |
| 385 | + if (PERF_TYPE_HARDWARE == event->attr.type) { | |
| 386 | + mapping = armpmu->event_map(event->attr.config); | |
| 387 | + } else if (PERF_TYPE_HW_CACHE == event->attr.type) { | |
| 388 | + mapping = armpmu_map_cache_event(event->attr.config); | |
| 389 | + } else if (PERF_TYPE_RAW == event->attr.type) { | |
| 390 | + mapping = armpmu->raw_event(event->attr.config); | |
| 391 | + } else { | |
| 392 | + pr_debug("event type %x not supported\n", event->attr.type); | |
| 393 | + return -EOPNOTSUPP; | |
| 394 | + } | |
| 395 | + | |
| 396 | + if (mapping < 0) { | |
| 397 | + pr_debug("event %x:%llx not supported\n", event->attr.type, | |
| 398 | + event->attr.config); | |
| 399 | + return mapping; | |
| 400 | + } | |
| 401 | + | |
| 402 | + /* | |
| 403 | + * Check whether we need to exclude the counter from certain modes. | |
| 404 | + * The ARM performance counters are on all of the time so if someone | |
| 405 | + * has asked us for some excludes then we have to fail. | |
| 406 | + */ | |
| 407 | + if (event->attr.exclude_kernel || event->attr.exclude_user || | |
| 408 | + event->attr.exclude_hv || event->attr.exclude_idle) { | |
| 409 | + pr_debug("ARM performance counters do not support " | |
| 410 | + "mode exclusion\n"); | |
| 411 | + return -EPERM; | |
| 412 | + } | |
| 413 | + | |
| 414 | + /* | |
| 415 | + * We don't assign an index until we actually place the event onto | |
| 416 | + * hardware. Use -1 to signify that we haven't decided where to put it | |
| 417 | + * yet. For SMP systems, each core has it's own PMU so we can't do any | |
| 418 | + * clever allocation or constraints checking at this point. | |
| 419 | + */ | |
| 420 | + hwc->idx = -1; | |
| 421 | + | |
| 422 | + /* | |
| 423 | + * Store the event encoding into the config_base field. config and | |
| 424 | + * event_base are unused as the only 2 things we need to know are | |
| 425 | + * the event mapping and the counter to use. The counter to use is | |
| 426 | + * also the indx and the config_base is the event type. | |
| 427 | + */ | |
| 428 | + hwc->config_base = (unsigned long)mapping; | |
| 429 | + hwc->config = 0; | |
| 430 | + hwc->event_base = 0; | |
| 431 | + | |
| 432 | + if (!hwc->sample_period) { | |
| 433 | + hwc->sample_period = armpmu->max_period; | |
| 434 | + hwc->last_period = hwc->sample_period; | |
| 435 | + atomic64_set(&hwc->period_left, hwc->sample_period); | |
| 436 | + } | |
| 437 | + | |
| 438 | + err = 0; | |
| 439 | + if (event->group_leader != event) { | |
| 440 | + err = validate_group(event); | |
| 441 | + if (err) | |
| 442 | + return -EINVAL; | |
| 443 | + } | |
| 444 | + | |
| 445 | + return err; | |
| 446 | +} | |
| 447 | + | |
| 448 | +const struct pmu * | |
| 449 | +hw_perf_event_init(struct perf_event *event) | |
| 450 | +{ | |
| 451 | + int err = 0; | |
| 452 | + | |
| 453 | + if (!armpmu) | |
| 454 | + return ERR_PTR(-ENODEV); | |
| 455 | + | |
| 456 | + event->destroy = hw_perf_event_destroy; | |
| 457 | + | |
| 458 | + if (!atomic_inc_not_zero(&active_events)) { | |
| 459 | + if (atomic_read(&active_events) > perf_max_events) { | |
| 460 | + atomic_dec(&active_events); | |
| 461 | + return ERR_PTR(-ENOSPC); | |
| 462 | + } | |
| 463 | + | |
| 464 | + mutex_lock(&pmu_reserve_mutex); | |
| 465 | + if (atomic_read(&active_events) == 0) { | |
| 466 | + err = armpmu_reserve_hardware(); | |
| 467 | + } | |
| 468 | + | |
| 469 | + if (!err) | |
| 470 | + atomic_inc(&active_events); | |
| 471 | + mutex_unlock(&pmu_reserve_mutex); | |
| 472 | + } | |
| 473 | + | |
| 474 | + if (err) | |
| 475 | + return ERR_PTR(err); | |
| 476 | + | |
| 477 | + err = __hw_perf_event_init(event); | |
| 478 | + if (err) | |
| 479 | + hw_perf_event_destroy(event); | |
| 480 | + | |
| 481 | + return err ? ERR_PTR(err) : &pmu; | |
| 482 | +} | |
| 483 | + | |
| 484 | +void | |
| 485 | +hw_perf_enable(void) | |
| 486 | +{ | |
| 487 | + /* Enable all of the perf events on hardware. */ | |
| 488 | + int idx; | |
| 489 | + struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events); | |
| 490 | + | |
| 491 | + if (!armpmu) | |
| 492 | + return; | |
| 493 | + | |
| 494 | + for (idx = 0; idx <= armpmu->num_events; ++idx) { | |
| 495 | + struct perf_event *event = cpuc->events[idx]; | |
| 496 | + | |
| 497 | + if (!event) | |
| 498 | + continue; | |
| 499 | + | |
| 500 | + armpmu->enable(&event->hw, idx); | |
| 501 | + } | |
| 502 | + | |
| 503 | + armpmu->start(); | |
| 504 | +} | |
| 505 | + | |
| 506 | +void | |
| 507 | +hw_perf_disable(void) | |
| 508 | +{ | |
| 509 | + if (armpmu) | |
| 510 | + armpmu->stop(); | |
| 511 | +} | |
| 512 | + | |
| 513 | +/* | |
| 514 | + * ARMv6 Performance counter handling code. | |
| 515 | + * | |
| 516 | + * ARMv6 has 2 configurable performance counters and a single cycle counter. | |
| 517 | + * They all share a single reset bit but can be written to zero so we can use | |
| 518 | + * that for a reset. | |
| 519 | + * | |
| 520 | + * The counters can't be individually enabled or disabled so when we remove | |
| 521 | + * one event and replace it with another we could get spurious counts from the | |
| 522 | + * wrong event. However, we can take advantage of the fact that the | |
| 523 | + * performance counters can export events to the event bus, and the event bus | |
| 524 | + * itself can be monitored. This requires that we *don't* export the events to | |
| 525 | + * the event bus. The procedure for disabling a configurable counter is: | |
| 526 | + * - change the counter to count the ETMEXTOUT[0] signal (0x20). This | |
| 527 | + * effectively stops the counter from counting. | |
| 528 | + * - disable the counter's interrupt generation (each counter has it's | |
| 529 | + * own interrupt enable bit). | |
| 530 | + * Once stopped, the counter value can be written as 0 to reset. | |
| 531 | + * | |
| 532 | + * To enable a counter: | |
| 533 | + * - enable the counter's interrupt generation. | |
| 534 | + * - set the new event type. | |
| 535 | + * | |
| 536 | + * Note: the dedicated cycle counter only counts cycles and can't be | |
| 537 | + * enabled/disabled independently of the others. When we want to disable the | |
| 538 | + * cycle counter, we have to just disable the interrupt reporting and start | |
| 539 | + * ignoring that counter. When re-enabling, we have to reset the value and | |
| 540 | + * enable the interrupt. | |
| 541 | + */ | |
| 542 | + | |
| 543 | +enum armv6_perf_types { | |
| 544 | + ARMV6_PERFCTR_ICACHE_MISS = 0x0, | |
| 545 | + ARMV6_PERFCTR_IBUF_STALL = 0x1, | |
| 546 | + ARMV6_PERFCTR_DDEP_STALL = 0x2, | |
| 547 | + ARMV6_PERFCTR_ITLB_MISS = 0x3, | |
| 548 | + ARMV6_PERFCTR_DTLB_MISS = 0x4, | |
| 549 | + ARMV6_PERFCTR_BR_EXEC = 0x5, | |
| 550 | + ARMV6_PERFCTR_BR_MISPREDICT = 0x6, | |
| 551 | + ARMV6_PERFCTR_INSTR_EXEC = 0x7, | |
| 552 | + ARMV6_PERFCTR_DCACHE_HIT = 0x9, | |
| 553 | + ARMV6_PERFCTR_DCACHE_ACCESS = 0xA, | |
| 554 | + ARMV6_PERFCTR_DCACHE_MISS = 0xB, | |
| 555 | + ARMV6_PERFCTR_DCACHE_WBACK = 0xC, | |
| 556 | + ARMV6_PERFCTR_SW_PC_CHANGE = 0xD, | |
| 557 | + ARMV6_PERFCTR_MAIN_TLB_MISS = 0xF, | |
| 558 | + ARMV6_PERFCTR_EXPL_D_ACCESS = 0x10, | |
| 559 | + ARMV6_PERFCTR_LSU_FULL_STALL = 0x11, | |
| 560 | + ARMV6_PERFCTR_WBUF_DRAINED = 0x12, | |
| 561 | + ARMV6_PERFCTR_CPU_CYCLES = 0xFF, | |
| 562 | + ARMV6_PERFCTR_NOP = 0x20, | |
| 563 | +}; | |
| 564 | + | |
| 565 | +enum armv6_counters { | |
| 566 | + ARMV6_CYCLE_COUNTER = 1, | |
| 567 | + ARMV6_COUNTER0, | |
| 568 | + ARMV6_COUNTER1, | |
| 569 | +}; | |
| 570 | + | |
| 571 | +/* | |
| 572 | + * The hardware events that we support. We do support cache operations but | |
| 573 | + * we have harvard caches and no way to combine instruction and data | |
| 574 | + * accesses/misses in hardware. | |
| 575 | + */ | |
| 576 | +static const unsigned armv6_perf_map[PERF_COUNT_HW_MAX] = { | |
| 577 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV6_PERFCTR_CPU_CYCLES, | |
| 578 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6_PERFCTR_INSTR_EXEC, | |
| 579 | + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 580 | + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 581 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6_PERFCTR_BR_EXEC, | |
| 582 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6_PERFCTR_BR_MISPREDICT, | |
| 583 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 584 | +}; | |
| 585 | + | |
| 586 | +static const unsigned armv6_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] | |
| 587 | + [PERF_COUNT_HW_CACHE_OP_MAX] | |
| 588 | + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { | |
| 589 | + [C(L1D)] = { | |
| 590 | + /* | |
| 591 | + * The performance counters don't differentiate between read | |
| 592 | + * and write accesses/misses so this isn't strictly correct, | |
| 593 | + * but it's the best we can do. Writes and reads get | |
| 594 | + * combined. | |
| 595 | + */ | |
| 596 | + [C(OP_READ)] = { | |
| 597 | + [C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS, | |
| 598 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS, | |
| 599 | + }, | |
| 600 | + [C(OP_WRITE)] = { | |
| 601 | + [C(RESULT_ACCESS)] = ARMV6_PERFCTR_DCACHE_ACCESS, | |
| 602 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_DCACHE_MISS, | |
| 603 | + }, | |
| 604 | + [C(OP_PREFETCH)] = { | |
| 605 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 606 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 607 | + }, | |
| 608 | + }, | |
| 609 | + [C(L1I)] = { | |
| 610 | + [C(OP_READ)] = { | |
| 611 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 612 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS, | |
| 613 | + }, | |
| 614 | + [C(OP_WRITE)] = { | |
| 615 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 616 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_ICACHE_MISS, | |
| 617 | + }, | |
| 618 | + [C(OP_PREFETCH)] = { | |
| 619 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 620 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 621 | + }, | |
| 622 | + }, | |
| 623 | + [C(LL)] = { | |
| 624 | + [C(OP_READ)] = { | |
| 625 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 626 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 627 | + }, | |
| 628 | + [C(OP_WRITE)] = { | |
| 629 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 630 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 631 | + }, | |
| 632 | + [C(OP_PREFETCH)] = { | |
| 633 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 634 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 635 | + }, | |
| 636 | + }, | |
| 637 | + [C(DTLB)] = { | |
| 638 | + /* | |
| 639 | + * The ARM performance counters can count micro DTLB misses, | |
| 640 | + * micro ITLB misses and main TLB misses. There isn't an event | |
| 641 | + * for TLB misses, so use the micro misses here and if users | |
| 642 | + * want the main TLB misses they can use a raw counter. | |
| 643 | + */ | |
| 644 | + [C(OP_READ)] = { | |
| 645 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 646 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS, | |
| 647 | + }, | |
| 648 | + [C(OP_WRITE)] = { | |
| 649 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 650 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_DTLB_MISS, | |
| 651 | + }, | |
| 652 | + [C(OP_PREFETCH)] = { | |
| 653 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 654 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 655 | + }, | |
| 656 | + }, | |
| 657 | + [C(ITLB)] = { | |
| 658 | + [C(OP_READ)] = { | |
| 659 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 660 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS, | |
| 661 | + }, | |
| 662 | + [C(OP_WRITE)] = { | |
| 663 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 664 | + [C(RESULT_MISS)] = ARMV6_PERFCTR_ITLB_MISS, | |
| 665 | + }, | |
| 666 | + [C(OP_PREFETCH)] = { | |
| 667 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 668 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 669 | + }, | |
| 670 | + }, | |
| 671 | + [C(BPU)] = { | |
| 672 | + [C(OP_READ)] = { | |
| 673 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 674 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 675 | + }, | |
| 676 | + [C(OP_WRITE)] = { | |
| 677 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 678 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 679 | + }, | |
| 680 | + [C(OP_PREFETCH)] = { | |
| 681 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 682 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 683 | + }, | |
| 684 | + }, | |
| 685 | +}; | |
| 686 | + | |
| 687 | +enum armv6mpcore_perf_types { | |
| 688 | + ARMV6MPCORE_PERFCTR_ICACHE_MISS = 0x0, | |
| 689 | + ARMV6MPCORE_PERFCTR_IBUF_STALL = 0x1, | |
| 690 | + ARMV6MPCORE_PERFCTR_DDEP_STALL = 0x2, | |
| 691 | + ARMV6MPCORE_PERFCTR_ITLB_MISS = 0x3, | |
| 692 | + ARMV6MPCORE_PERFCTR_DTLB_MISS = 0x4, | |
| 693 | + ARMV6MPCORE_PERFCTR_BR_EXEC = 0x5, | |
| 694 | + ARMV6MPCORE_PERFCTR_BR_NOTPREDICT = 0x6, | |
| 695 | + ARMV6MPCORE_PERFCTR_BR_MISPREDICT = 0x7, | |
| 696 | + ARMV6MPCORE_PERFCTR_INSTR_EXEC = 0x8, | |
| 697 | + ARMV6MPCORE_PERFCTR_DCACHE_RDACCESS = 0xA, | |
| 698 | + ARMV6MPCORE_PERFCTR_DCACHE_RDMISS = 0xB, | |
| 699 | + ARMV6MPCORE_PERFCTR_DCACHE_WRACCESS = 0xC, | |
| 700 | + ARMV6MPCORE_PERFCTR_DCACHE_WRMISS = 0xD, | |
| 701 | + ARMV6MPCORE_PERFCTR_DCACHE_EVICTION = 0xE, | |
| 702 | + ARMV6MPCORE_PERFCTR_SW_PC_CHANGE = 0xF, | |
| 703 | + ARMV6MPCORE_PERFCTR_MAIN_TLB_MISS = 0x10, | |
| 704 | + ARMV6MPCORE_PERFCTR_EXPL_MEM_ACCESS = 0x11, | |
| 705 | + ARMV6MPCORE_PERFCTR_LSU_FULL_STALL = 0x12, | |
| 706 | + ARMV6MPCORE_PERFCTR_WBUF_DRAINED = 0x13, | |
| 707 | + ARMV6MPCORE_PERFCTR_CPU_CYCLES = 0xFF, | |
| 708 | +}; | |
| 709 | + | |
| 710 | +/* | |
| 711 | + * The hardware events that we support. We do support cache operations but | |
| 712 | + * we have harvard caches and no way to combine instruction and data | |
| 713 | + * accesses/misses in hardware. | |
| 714 | + */ | |
| 715 | +static const unsigned armv6mpcore_perf_map[PERF_COUNT_HW_MAX] = { | |
| 716 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV6MPCORE_PERFCTR_CPU_CYCLES, | |
| 717 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_INSTR_EXEC, | |
| 718 | + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 719 | + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 720 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV6MPCORE_PERFCTR_BR_EXEC, | |
| 721 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV6MPCORE_PERFCTR_BR_MISPREDICT, | |
| 722 | + [PERF_COUNT_HW_BUS_CYCLES] = HW_OP_UNSUPPORTED, | |
| 723 | +}; | |
| 724 | + | |
| 725 | +static const unsigned armv6mpcore_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] | |
| 726 | + [PERF_COUNT_HW_CACHE_OP_MAX] | |
| 727 | + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { | |
| 728 | + [C(L1D)] = { | |
| 729 | + [C(OP_READ)] = { | |
| 730 | + [C(RESULT_ACCESS)] = | |
| 731 | + ARMV6MPCORE_PERFCTR_DCACHE_RDACCESS, | |
| 732 | + [C(RESULT_MISS)] = | |
| 733 | + ARMV6MPCORE_PERFCTR_DCACHE_RDMISS, | |
| 734 | + }, | |
| 735 | + [C(OP_WRITE)] = { | |
| 736 | + [C(RESULT_ACCESS)] = | |
| 737 | + ARMV6MPCORE_PERFCTR_DCACHE_WRACCESS, | |
| 738 | + [C(RESULT_MISS)] = | |
| 739 | + ARMV6MPCORE_PERFCTR_DCACHE_WRMISS, | |
| 740 | + }, | |
| 741 | + [C(OP_PREFETCH)] = { | |
| 742 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 743 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 744 | + }, | |
| 745 | + }, | |
| 746 | + [C(L1I)] = { | |
| 747 | + [C(OP_READ)] = { | |
| 748 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 749 | + [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS, | |
| 750 | + }, | |
| 751 | + [C(OP_WRITE)] = { | |
| 752 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 753 | + [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ICACHE_MISS, | |
| 754 | + }, | |
| 755 | + [C(OP_PREFETCH)] = { | |
| 756 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 757 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 758 | + }, | |
| 759 | + }, | |
| 760 | + [C(LL)] = { | |
| 761 | + [C(OP_READ)] = { | |
| 762 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 763 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 764 | + }, | |
| 765 | + [C(OP_WRITE)] = { | |
| 766 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 767 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 768 | + }, | |
| 769 | + [C(OP_PREFETCH)] = { | |
| 770 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 771 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 772 | + }, | |
| 773 | + }, | |
| 774 | + [C(DTLB)] = { | |
| 775 | + /* | |
| 776 | + * The ARM performance counters can count micro DTLB misses, | |
| 777 | + * micro ITLB misses and main TLB misses. There isn't an event | |
| 778 | + * for TLB misses, so use the micro misses here and if users | |
| 779 | + * want the main TLB misses they can use a raw counter. | |
| 780 | + */ | |
| 781 | + [C(OP_READ)] = { | |
| 782 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 783 | + [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_DTLB_MISS, | |
| 784 | + }, | |
| 785 | + [C(OP_WRITE)] = { | |
| 786 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 787 | + [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_DTLB_MISS, | |
| 788 | + }, | |
| 789 | + [C(OP_PREFETCH)] = { | |
| 790 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 791 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 792 | + }, | |
| 793 | + }, | |
| 794 | + [C(ITLB)] = { | |
| 795 | + [C(OP_READ)] = { | |
| 796 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 797 | + [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ITLB_MISS, | |
| 798 | + }, | |
| 799 | + [C(OP_WRITE)] = { | |
| 800 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 801 | + [C(RESULT_MISS)] = ARMV6MPCORE_PERFCTR_ITLB_MISS, | |
| 802 | + }, | |
| 803 | + [C(OP_PREFETCH)] = { | |
| 804 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 805 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 806 | + }, | |
| 807 | + }, | |
| 808 | + [C(BPU)] = { | |
| 809 | + [C(OP_READ)] = { | |
| 810 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 811 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 812 | + }, | |
| 813 | + [C(OP_WRITE)] = { | |
| 814 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 815 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 816 | + }, | |
| 817 | + [C(OP_PREFETCH)] = { | |
| 818 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 819 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 820 | + }, | |
| 821 | + }, | |
| 822 | +}; | |
| 823 | + | |
| 824 | +static inline unsigned long | |
| 825 | +armv6_pmcr_read(void) | |
| 826 | +{ | |
| 827 | + u32 val; | |
| 828 | + asm volatile("mrc p15, 0, %0, c15, c12, 0" : "=r"(val)); | |
| 829 | + return val; | |
| 830 | +} | |
| 831 | + | |
| 832 | +static inline void | |
| 833 | +armv6_pmcr_write(unsigned long val) | |
| 834 | +{ | |
| 835 | + asm volatile("mcr p15, 0, %0, c15, c12, 0" : : "r"(val)); | |
| 836 | +} | |
| 837 | + | |
| 838 | +#define ARMV6_PMCR_ENABLE (1 << 0) | |
| 839 | +#define ARMV6_PMCR_CTR01_RESET (1 << 1) | |
| 840 | +#define ARMV6_PMCR_CCOUNT_RESET (1 << 2) | |
| 841 | +#define ARMV6_PMCR_CCOUNT_DIV (1 << 3) | |
| 842 | +#define ARMV6_PMCR_COUNT0_IEN (1 << 4) | |
| 843 | +#define ARMV6_PMCR_COUNT1_IEN (1 << 5) | |
| 844 | +#define ARMV6_PMCR_CCOUNT_IEN (1 << 6) | |
| 845 | +#define ARMV6_PMCR_COUNT0_OVERFLOW (1 << 8) | |
| 846 | +#define ARMV6_PMCR_COUNT1_OVERFLOW (1 << 9) | |
| 847 | +#define ARMV6_PMCR_CCOUNT_OVERFLOW (1 << 10) | |
| 848 | +#define ARMV6_PMCR_EVT_COUNT0_SHIFT 20 | |
| 849 | +#define ARMV6_PMCR_EVT_COUNT0_MASK (0xFF << ARMV6_PMCR_EVT_COUNT0_SHIFT) | |
| 850 | +#define ARMV6_PMCR_EVT_COUNT1_SHIFT 12 | |
| 851 | +#define ARMV6_PMCR_EVT_COUNT1_MASK (0xFF << ARMV6_PMCR_EVT_COUNT1_SHIFT) | |
| 852 | + | |
| 853 | +#define ARMV6_PMCR_OVERFLOWED_MASK \ | |
| 854 | + (ARMV6_PMCR_COUNT0_OVERFLOW | ARMV6_PMCR_COUNT1_OVERFLOW | \ | |
| 855 | + ARMV6_PMCR_CCOUNT_OVERFLOW) | |
| 856 | + | |
| 857 | +static inline int | |
| 858 | +armv6_pmcr_has_overflowed(unsigned long pmcr) | |
| 859 | +{ | |
| 860 | + return (pmcr & ARMV6_PMCR_OVERFLOWED_MASK); | |
| 861 | +} | |
| 862 | + | |
| 863 | +static inline int | |
| 864 | +armv6_pmcr_counter_has_overflowed(unsigned long pmcr, | |
| 865 | + enum armv6_counters counter) | |
| 866 | +{ | |
| 867 | + int ret = 0; | |
| 868 | + | |
| 869 | + if (ARMV6_CYCLE_COUNTER == counter) | |
| 870 | + ret = pmcr & ARMV6_PMCR_CCOUNT_OVERFLOW; | |
| 871 | + else if (ARMV6_COUNTER0 == counter) | |
| 872 | + ret = pmcr & ARMV6_PMCR_COUNT0_OVERFLOW; | |
| 873 | + else if (ARMV6_COUNTER1 == counter) | |
| 874 | + ret = pmcr & ARMV6_PMCR_COUNT1_OVERFLOW; | |
| 875 | + else | |
| 876 | + WARN_ONCE(1, "invalid counter number (%d)\n", counter); | |
| 877 | + | |
| 878 | + return ret; | |
| 879 | +} | |
| 880 | + | |
| 881 | +static inline u32 | |
| 882 | +armv6pmu_read_counter(int counter) | |
| 883 | +{ | |
| 884 | + unsigned long value = 0; | |
| 885 | + | |
| 886 | + if (ARMV6_CYCLE_COUNTER == counter) | |
| 887 | + asm volatile("mrc p15, 0, %0, c15, c12, 1" : "=r"(value)); | |
| 888 | + else if (ARMV6_COUNTER0 == counter) | |
| 889 | + asm volatile("mrc p15, 0, %0, c15, c12, 2" : "=r"(value)); | |
| 890 | + else if (ARMV6_COUNTER1 == counter) | |
| 891 | + asm volatile("mrc p15, 0, %0, c15, c12, 3" : "=r"(value)); | |
| 892 | + else | |
| 893 | + WARN_ONCE(1, "invalid counter number (%d)\n", counter); | |
| 894 | + | |
| 895 | + return value; | |
| 896 | +} | |
| 897 | + | |
| 898 | +static inline void | |
| 899 | +armv6pmu_write_counter(int counter, | |
| 900 | + u32 value) | |
| 901 | +{ | |
| 902 | + if (ARMV6_CYCLE_COUNTER == counter) | |
| 903 | + asm volatile("mcr p15, 0, %0, c15, c12, 1" : : "r"(value)); | |
| 904 | + else if (ARMV6_COUNTER0 == counter) | |
| 905 | + asm volatile("mcr p15, 0, %0, c15, c12, 2" : : "r"(value)); | |
| 906 | + else if (ARMV6_COUNTER1 == counter) | |
| 907 | + asm volatile("mcr p15, 0, %0, c15, c12, 3" : : "r"(value)); | |
| 908 | + else | |
| 909 | + WARN_ONCE(1, "invalid counter number (%d)\n", counter); | |
| 910 | +} | |
| 911 | + | |
| 912 | +void | |
| 913 | +armv6pmu_enable_event(struct hw_perf_event *hwc, | |
| 914 | + int idx) | |
| 915 | +{ | |
| 916 | + unsigned long val, mask, evt, flags; | |
| 917 | + | |
| 918 | + if (ARMV6_CYCLE_COUNTER == idx) { | |
| 919 | + mask = 0; | |
| 920 | + evt = ARMV6_PMCR_CCOUNT_IEN; | |
| 921 | + } else if (ARMV6_COUNTER0 == idx) { | |
| 922 | + mask = ARMV6_PMCR_EVT_COUNT0_MASK; | |
| 923 | + evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT0_SHIFT) | | |
| 924 | + ARMV6_PMCR_COUNT0_IEN; | |
| 925 | + } else if (ARMV6_COUNTER1 == idx) { | |
| 926 | + mask = ARMV6_PMCR_EVT_COUNT1_MASK; | |
| 927 | + evt = (hwc->config_base << ARMV6_PMCR_EVT_COUNT1_SHIFT) | | |
| 928 | + ARMV6_PMCR_COUNT1_IEN; | |
| 929 | + } else { | |
| 930 | + WARN_ONCE(1, "invalid counter number (%d)\n", idx); | |
| 931 | + return; | |
| 932 | + } | |
| 933 | + | |
| 934 | + /* | |
| 935 | + * Mask out the current event and set the counter to count the event | |
| 936 | + * that we're interested in. | |
| 937 | + */ | |
| 938 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 939 | + val = armv6_pmcr_read(); | |
| 940 | + val &= ~mask; | |
| 941 | + val |= evt; | |
| 942 | + armv6_pmcr_write(val); | |
| 943 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 944 | +} | |
| 945 | + | |
| 946 | +static irqreturn_t | |
| 947 | +armv6pmu_handle_irq(int irq_num, | |
| 948 | + void *dev) | |
| 949 | +{ | |
| 950 | + unsigned long pmcr = armv6_pmcr_read(); | |
| 951 | + struct perf_sample_data data; | |
| 952 | + struct cpu_hw_events *cpuc; | |
| 953 | + struct pt_regs *regs; | |
| 954 | + int idx; | |
| 955 | + | |
| 956 | + if (!armv6_pmcr_has_overflowed(pmcr)) | |
| 957 | + return IRQ_NONE; | |
| 958 | + | |
| 959 | + regs = get_irq_regs(); | |
| 960 | + | |
| 961 | + /* | |
| 962 | + * The interrupts are cleared by writing the overflow flags back to | |
| 963 | + * the control register. All of the other bits don't have any effect | |
| 964 | + * if they are rewritten, so write the whole value back. | |
| 965 | + */ | |
| 966 | + armv6_pmcr_write(pmcr); | |
| 967 | + | |
| 968 | + data.addr = 0; | |
| 969 | + | |
| 970 | + cpuc = &__get_cpu_var(cpu_hw_events); | |
| 971 | + for (idx = 0; idx <= armpmu->num_events; ++idx) { | |
| 972 | + struct perf_event *event = cpuc->events[idx]; | |
| 973 | + struct hw_perf_event *hwc; | |
| 974 | + | |
| 975 | + if (!test_bit(idx, cpuc->active_mask)) | |
| 976 | + continue; | |
| 977 | + | |
| 978 | + /* | |
| 979 | + * We have a single interrupt for all counters. Check that | |
| 980 | + * each counter has overflowed before we process it. | |
| 981 | + */ | |
| 982 | + if (!armv6_pmcr_counter_has_overflowed(pmcr, idx)) | |
| 983 | + continue; | |
| 984 | + | |
| 985 | + hwc = &event->hw; | |
| 986 | + armpmu_event_update(event, hwc, idx); | |
| 987 | + data.period = event->hw.last_period; | |
| 988 | + if (!armpmu_event_set_period(event, hwc, idx)) | |
| 989 | + continue; | |
| 990 | + | |
| 991 | + if (perf_event_overflow(event, 0, &data, regs)) | |
| 992 | + armpmu->disable(hwc, idx); | |
| 993 | + } | |
| 994 | + | |
| 995 | + /* | |
| 996 | + * Handle the pending perf events. | |
| 997 | + * | |
| 998 | + * Note: this call *must* be run with interrupts enabled. For | |
| 999 | + * platforms that can have the PMU interrupts raised as a PMI, this | |
| 1000 | + * will not work. | |
| 1001 | + */ | |
| 1002 | + perf_event_do_pending(); | |
| 1003 | + | |
| 1004 | + return IRQ_HANDLED; | |
| 1005 | +} | |
| 1006 | + | |
| 1007 | +static void | |
| 1008 | +armv6pmu_start(void) | |
| 1009 | +{ | |
| 1010 | + unsigned long flags, val; | |
| 1011 | + | |
| 1012 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1013 | + val = armv6_pmcr_read(); | |
| 1014 | + val |= ARMV6_PMCR_ENABLE; | |
| 1015 | + armv6_pmcr_write(val); | |
| 1016 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1017 | +} | |
| 1018 | + | |
| 1019 | +void | |
| 1020 | +armv6pmu_stop(void) | |
| 1021 | +{ | |
| 1022 | + unsigned long flags, val; | |
| 1023 | + | |
| 1024 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1025 | + val = armv6_pmcr_read(); | |
| 1026 | + val &= ~ARMV6_PMCR_ENABLE; | |
| 1027 | + armv6_pmcr_write(val); | |
| 1028 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1029 | +} | |
| 1030 | + | |
| 1031 | +static inline int | |
| 1032 | +armv6pmu_event_map(int config) | |
| 1033 | +{ | |
| 1034 | + int mapping = armv6_perf_map[config]; | |
| 1035 | + if (HW_OP_UNSUPPORTED == mapping) | |
| 1036 | + mapping = -EOPNOTSUPP; | |
| 1037 | + return mapping; | |
| 1038 | +} | |
| 1039 | + | |
| 1040 | +static inline int | |
| 1041 | +armv6mpcore_pmu_event_map(int config) | |
| 1042 | +{ | |
| 1043 | + int mapping = armv6mpcore_perf_map[config]; | |
| 1044 | + if (HW_OP_UNSUPPORTED == mapping) | |
| 1045 | + mapping = -EOPNOTSUPP; | |
| 1046 | + return mapping; | |
| 1047 | +} | |
| 1048 | + | |
| 1049 | +static u64 | |
| 1050 | +armv6pmu_raw_event(u64 config) | |
| 1051 | +{ | |
| 1052 | + return config & 0xff; | |
| 1053 | +} | |
| 1054 | + | |
| 1055 | +static int | |
| 1056 | +armv6pmu_get_event_idx(struct cpu_hw_events *cpuc, | |
| 1057 | + struct hw_perf_event *event) | |
| 1058 | +{ | |
| 1059 | + /* Always place a cycle counter into the cycle counter. */ | |
| 1060 | + if (ARMV6_PERFCTR_CPU_CYCLES == event->config_base) { | |
| 1061 | + if (test_and_set_bit(ARMV6_CYCLE_COUNTER, cpuc->used_mask)) | |
| 1062 | + return -EAGAIN; | |
| 1063 | + | |
| 1064 | + return ARMV6_CYCLE_COUNTER; | |
| 1065 | + } else { | |
| 1066 | + /* | |
| 1067 | + * For anything other than a cycle counter, try and use | |
| 1068 | + * counter0 and counter1. | |
| 1069 | + */ | |
| 1070 | + if (!test_and_set_bit(ARMV6_COUNTER1, cpuc->used_mask)) { | |
| 1071 | + return ARMV6_COUNTER1; | |
| 1072 | + } | |
| 1073 | + | |
| 1074 | + if (!test_and_set_bit(ARMV6_COUNTER0, cpuc->used_mask)) { | |
| 1075 | + return ARMV6_COUNTER0; | |
| 1076 | + } | |
| 1077 | + | |
| 1078 | + /* The counters are all in use. */ | |
| 1079 | + return -EAGAIN; | |
| 1080 | + } | |
| 1081 | +} | |
| 1082 | + | |
| 1083 | +static void | |
| 1084 | +armv6pmu_disable_event(struct hw_perf_event *hwc, | |
| 1085 | + int idx) | |
| 1086 | +{ | |
| 1087 | + unsigned long val, mask, evt, flags; | |
| 1088 | + | |
| 1089 | + if (ARMV6_CYCLE_COUNTER == idx) { | |
| 1090 | + mask = ARMV6_PMCR_CCOUNT_IEN; | |
| 1091 | + evt = 0; | |
| 1092 | + } else if (ARMV6_COUNTER0 == idx) { | |
| 1093 | + mask = ARMV6_PMCR_COUNT0_IEN | ARMV6_PMCR_EVT_COUNT0_MASK; | |
| 1094 | + evt = ARMV6_PERFCTR_NOP << ARMV6_PMCR_EVT_COUNT0_SHIFT; | |
| 1095 | + } else if (ARMV6_COUNTER1 == idx) { | |
| 1096 | + mask = ARMV6_PMCR_COUNT1_IEN | ARMV6_PMCR_EVT_COUNT1_MASK; | |
| 1097 | + evt = ARMV6_PERFCTR_NOP << ARMV6_PMCR_EVT_COUNT1_SHIFT; | |
| 1098 | + } else { | |
| 1099 | + WARN_ONCE(1, "invalid counter number (%d)\n", idx); | |
| 1100 | + return; | |
| 1101 | + } | |
| 1102 | + | |
| 1103 | + /* | |
| 1104 | + * Mask out the current event and set the counter to count the number | |
| 1105 | + * of ETM bus signal assertion cycles. The external reporting should | |
| 1106 | + * be disabled and so this should never increment. | |
| 1107 | + */ | |
| 1108 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1109 | + val = armv6_pmcr_read(); | |
| 1110 | + val &= ~mask; | |
| 1111 | + val |= evt; | |
| 1112 | + armv6_pmcr_write(val); | |
| 1113 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1114 | +} | |
| 1115 | + | |
| 1116 | +static void | |
| 1117 | +armv6mpcore_pmu_disable_event(struct hw_perf_event *hwc, | |
| 1118 | + int idx) | |
| 1119 | +{ | |
| 1120 | + unsigned long val, mask, flags, evt = 0; | |
| 1121 | + | |
| 1122 | + if (ARMV6_CYCLE_COUNTER == idx) { | |
| 1123 | + mask = ARMV6_PMCR_CCOUNT_IEN; | |
| 1124 | + } else if (ARMV6_COUNTER0 == idx) { | |
| 1125 | + mask = ARMV6_PMCR_COUNT0_IEN; | |
| 1126 | + } else if (ARMV6_COUNTER1 == idx) { | |
| 1127 | + mask = ARMV6_PMCR_COUNT1_IEN; | |
| 1128 | + } else { | |
| 1129 | + WARN_ONCE(1, "invalid counter number (%d)\n", idx); | |
| 1130 | + return; | |
| 1131 | + } | |
| 1132 | + | |
| 1133 | + /* | |
| 1134 | + * Unlike UP ARMv6, we don't have a way of stopping the counters. We | |
| 1135 | + * simply disable the interrupt reporting. | |
| 1136 | + */ | |
| 1137 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1138 | + val = armv6_pmcr_read(); | |
| 1139 | + val &= ~mask; | |
| 1140 | + val |= evt; | |
| 1141 | + armv6_pmcr_write(val); | |
| 1142 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1143 | +} | |
| 1144 | + | |
| 1145 | +static const struct arm_pmu armv6pmu = { | |
| 1146 | + .name = "v6", | |
| 1147 | + .handle_irq = armv6pmu_handle_irq, | |
| 1148 | + .enable = armv6pmu_enable_event, | |
| 1149 | + .disable = armv6pmu_disable_event, | |
| 1150 | + .event_map = armv6pmu_event_map, | |
| 1151 | + .raw_event = armv6pmu_raw_event, | |
| 1152 | + .read_counter = armv6pmu_read_counter, | |
| 1153 | + .write_counter = armv6pmu_write_counter, | |
| 1154 | + .get_event_idx = armv6pmu_get_event_idx, | |
| 1155 | + .start = armv6pmu_start, | |
| 1156 | + .stop = armv6pmu_stop, | |
| 1157 | + .num_events = 3, | |
| 1158 | + .max_period = (1LLU << 32) - 1, | |
| 1159 | +}; | |
| 1160 | + | |
| 1161 | +/* | |
| 1162 | + * ARMv6mpcore is almost identical to single core ARMv6 with the exception | |
| 1163 | + * that some of the events have different enumerations and that there is no | |
| 1164 | + * *hack* to stop the programmable counters. To stop the counters we simply | |
| 1165 | + * disable the interrupt reporting and update the event. When unthrottling we | |
| 1166 | + * reset the period and enable the interrupt reporting. | |
| 1167 | + */ | |
| 1168 | +static const struct arm_pmu armv6mpcore_pmu = { | |
| 1169 | + .name = "v6mpcore", | |
| 1170 | + .handle_irq = armv6pmu_handle_irq, | |
| 1171 | + .enable = armv6pmu_enable_event, | |
| 1172 | + .disable = armv6mpcore_pmu_disable_event, | |
| 1173 | + .event_map = armv6mpcore_pmu_event_map, | |
| 1174 | + .raw_event = armv6pmu_raw_event, | |
| 1175 | + .read_counter = armv6pmu_read_counter, | |
| 1176 | + .write_counter = armv6pmu_write_counter, | |
| 1177 | + .get_event_idx = armv6pmu_get_event_idx, | |
| 1178 | + .start = armv6pmu_start, | |
| 1179 | + .stop = armv6pmu_stop, | |
| 1180 | + .num_events = 3, | |
| 1181 | + .max_period = (1LLU << 32) - 1, | |
| 1182 | +}; | |
| 1183 | + | |
| 1184 | +/* | |
| 1185 | + * ARMv7 Cortex-A8 and Cortex-A9 Performance Events handling code. | |
| 1186 | + * | |
| 1187 | + * Copied from ARMv6 code, with the low level code inspired | |
| 1188 | + * by the ARMv7 Oprofile code. | |
| 1189 | + * | |
| 1190 | + * Cortex-A8 has up to 4 configurable performance counters and | |
| 1191 | + * a single cycle counter. | |
| 1192 | + * Cortex-A9 has up to 31 configurable performance counters and | |
| 1193 | + * a single cycle counter. | |
| 1194 | + * | |
| 1195 | + * All counters can be enabled/disabled and IRQ masked separately. The cycle | |
| 1196 | + * counter and all 4 performance counters together can be reset separately. | |
| 1197 | + */ | |
| 1198 | + | |
| 1199 | +#define ARMV7_PMU_CORTEX_A8_NAME "ARMv7 Cortex-A8" | |
| 1200 | + | |
| 1201 | +#define ARMV7_PMU_CORTEX_A9_NAME "ARMv7 Cortex-A9" | |
| 1202 | + | |
| 1203 | +/* Common ARMv7 event types */ | |
| 1204 | +enum armv7_perf_types { | |
| 1205 | + ARMV7_PERFCTR_PMNC_SW_INCR = 0x00, | |
| 1206 | + ARMV7_PERFCTR_IFETCH_MISS = 0x01, | |
| 1207 | + ARMV7_PERFCTR_ITLB_MISS = 0x02, | |
| 1208 | + ARMV7_PERFCTR_DCACHE_REFILL = 0x03, | |
| 1209 | + ARMV7_PERFCTR_DCACHE_ACCESS = 0x04, | |
| 1210 | + ARMV7_PERFCTR_DTLB_REFILL = 0x05, | |
| 1211 | + ARMV7_PERFCTR_DREAD = 0x06, | |
| 1212 | + ARMV7_PERFCTR_DWRITE = 0x07, | |
| 1213 | + | |
| 1214 | + ARMV7_PERFCTR_EXC_TAKEN = 0x09, | |
| 1215 | + ARMV7_PERFCTR_EXC_EXECUTED = 0x0A, | |
| 1216 | + ARMV7_PERFCTR_CID_WRITE = 0x0B, | |
| 1217 | + /* ARMV7_PERFCTR_PC_WRITE is equivalent to HW_BRANCH_INSTRUCTIONS. | |
| 1218 | + * It counts: | |
| 1219 | + * - all branch instructions, | |
| 1220 | + * - instructions that explicitly write the PC, | |
| 1221 | + * - exception generating instructions. | |
| 1222 | + */ | |
| 1223 | + ARMV7_PERFCTR_PC_WRITE = 0x0C, | |
| 1224 | + ARMV7_PERFCTR_PC_IMM_BRANCH = 0x0D, | |
| 1225 | + ARMV7_PERFCTR_UNALIGNED_ACCESS = 0x0F, | |
| 1226 | + ARMV7_PERFCTR_PC_BRANCH_MIS_PRED = 0x10, | |
| 1227 | + ARMV7_PERFCTR_CLOCK_CYCLES = 0x11, | |
| 1228 | + | |
| 1229 | + ARMV7_PERFCTR_PC_BRANCH_MIS_USED = 0x12, | |
| 1230 | + | |
| 1231 | + ARMV7_PERFCTR_CPU_CYCLES = 0xFF | |
| 1232 | +}; | |
| 1233 | + | |
| 1234 | +/* ARMv7 Cortex-A8 specific event types */ | |
| 1235 | +enum armv7_a8_perf_types { | |
| 1236 | + ARMV7_PERFCTR_INSTR_EXECUTED = 0x08, | |
| 1237 | + | |
| 1238 | + ARMV7_PERFCTR_PC_PROC_RETURN = 0x0E, | |
| 1239 | + | |
| 1240 | + ARMV7_PERFCTR_WRITE_BUFFER_FULL = 0x40, | |
| 1241 | + ARMV7_PERFCTR_L2_STORE_MERGED = 0x41, | |
| 1242 | + ARMV7_PERFCTR_L2_STORE_BUFF = 0x42, | |
| 1243 | + ARMV7_PERFCTR_L2_ACCESS = 0x43, | |
| 1244 | + ARMV7_PERFCTR_L2_CACH_MISS = 0x44, | |
| 1245 | + ARMV7_PERFCTR_AXI_READ_CYCLES = 0x45, | |
| 1246 | + ARMV7_PERFCTR_AXI_WRITE_CYCLES = 0x46, | |
| 1247 | + ARMV7_PERFCTR_MEMORY_REPLAY = 0x47, | |
| 1248 | + ARMV7_PERFCTR_UNALIGNED_ACCESS_REPLAY = 0x48, | |
| 1249 | + ARMV7_PERFCTR_L1_DATA_MISS = 0x49, | |
| 1250 | + ARMV7_PERFCTR_L1_INST_MISS = 0x4A, | |
| 1251 | + ARMV7_PERFCTR_L1_DATA_COLORING = 0x4B, | |
| 1252 | + ARMV7_PERFCTR_L1_NEON_DATA = 0x4C, | |
| 1253 | + ARMV7_PERFCTR_L1_NEON_CACH_DATA = 0x4D, | |
| 1254 | + ARMV7_PERFCTR_L2_NEON = 0x4E, | |
| 1255 | + ARMV7_PERFCTR_L2_NEON_HIT = 0x4F, | |
| 1256 | + ARMV7_PERFCTR_L1_INST = 0x50, | |
| 1257 | + ARMV7_PERFCTR_PC_RETURN_MIS_PRED = 0x51, | |
| 1258 | + ARMV7_PERFCTR_PC_BRANCH_FAILED = 0x52, | |
| 1259 | + ARMV7_PERFCTR_PC_BRANCH_TAKEN = 0x53, | |
| 1260 | + ARMV7_PERFCTR_PC_BRANCH_EXECUTED = 0x54, | |
| 1261 | + ARMV7_PERFCTR_OP_EXECUTED = 0x55, | |
| 1262 | + ARMV7_PERFCTR_CYCLES_INST_STALL = 0x56, | |
| 1263 | + ARMV7_PERFCTR_CYCLES_INST = 0x57, | |
| 1264 | + ARMV7_PERFCTR_CYCLES_NEON_DATA_STALL = 0x58, | |
| 1265 | + ARMV7_PERFCTR_CYCLES_NEON_INST_STALL = 0x59, | |
| 1266 | + ARMV7_PERFCTR_NEON_CYCLES = 0x5A, | |
| 1267 | + | |
| 1268 | + ARMV7_PERFCTR_PMU0_EVENTS = 0x70, | |
| 1269 | + ARMV7_PERFCTR_PMU1_EVENTS = 0x71, | |
| 1270 | + ARMV7_PERFCTR_PMU_EVENTS = 0x72, | |
| 1271 | +}; | |
| 1272 | + | |
| 1273 | +/* ARMv7 Cortex-A9 specific event types */ | |
| 1274 | +enum armv7_a9_perf_types { | |
| 1275 | + ARMV7_PERFCTR_JAVA_HW_BYTECODE_EXEC = 0x40, | |
| 1276 | + ARMV7_PERFCTR_JAVA_SW_BYTECODE_EXEC = 0x41, | |
| 1277 | + ARMV7_PERFCTR_JAZELLE_BRANCH_EXEC = 0x42, | |
| 1278 | + | |
| 1279 | + ARMV7_PERFCTR_COHERENT_LINE_MISS = 0x50, | |
| 1280 | + ARMV7_PERFCTR_COHERENT_LINE_HIT = 0x51, | |
| 1281 | + | |
| 1282 | + ARMV7_PERFCTR_ICACHE_DEP_STALL_CYCLES = 0x60, | |
| 1283 | + ARMV7_PERFCTR_DCACHE_DEP_STALL_CYCLES = 0x61, | |
| 1284 | + ARMV7_PERFCTR_TLB_MISS_DEP_STALL_CYCLES = 0x62, | |
| 1285 | + ARMV7_PERFCTR_STREX_EXECUTED_PASSED = 0x63, | |
| 1286 | + ARMV7_PERFCTR_STREX_EXECUTED_FAILED = 0x64, | |
| 1287 | + ARMV7_PERFCTR_DATA_EVICTION = 0x65, | |
| 1288 | + ARMV7_PERFCTR_ISSUE_STAGE_NO_INST = 0x66, | |
| 1289 | + ARMV7_PERFCTR_ISSUE_STAGE_EMPTY = 0x67, | |
| 1290 | + ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE = 0x68, | |
| 1291 | + | |
| 1292 | + ARMV7_PERFCTR_PREDICTABLE_FUNCT_RETURNS = 0x6E, | |
| 1293 | + | |
| 1294 | + ARMV7_PERFCTR_MAIN_UNIT_EXECUTED_INST = 0x70, | |
| 1295 | + ARMV7_PERFCTR_SECOND_UNIT_EXECUTED_INST = 0x71, | |
| 1296 | + ARMV7_PERFCTR_LD_ST_UNIT_EXECUTED_INST = 0x72, | |
| 1297 | + ARMV7_PERFCTR_FP_EXECUTED_INST = 0x73, | |
| 1298 | + ARMV7_PERFCTR_NEON_EXECUTED_INST = 0x74, | |
| 1299 | + | |
| 1300 | + ARMV7_PERFCTR_PLD_FULL_DEP_STALL_CYCLES = 0x80, | |
| 1301 | + ARMV7_PERFCTR_DATA_WR_DEP_STALL_CYCLES = 0x81, | |
| 1302 | + ARMV7_PERFCTR_ITLB_MISS_DEP_STALL_CYCLES = 0x82, | |
| 1303 | + ARMV7_PERFCTR_DTLB_MISS_DEP_STALL_CYCLES = 0x83, | |
| 1304 | + ARMV7_PERFCTR_MICRO_ITLB_MISS_DEP_STALL_CYCLES = 0x84, | |
| 1305 | + ARMV7_PERFCTR_MICRO_DTLB_MISS_DEP_STALL_CYCLES = 0x85, | |
| 1306 | + ARMV7_PERFCTR_DMB_DEP_STALL_CYCLES = 0x86, | |
| 1307 | + | |
| 1308 | + ARMV7_PERFCTR_INTGR_CLK_ENABLED_CYCLES = 0x8A, | |
| 1309 | + ARMV7_PERFCTR_DATA_ENGINE_CLK_EN_CYCLES = 0x8B, | |
| 1310 | + | |
| 1311 | + ARMV7_PERFCTR_ISB_INST = 0x90, | |
| 1312 | + ARMV7_PERFCTR_DSB_INST = 0x91, | |
| 1313 | + ARMV7_PERFCTR_DMB_INST = 0x92, | |
| 1314 | + ARMV7_PERFCTR_EXT_INTERRUPTS = 0x93, | |
| 1315 | + | |
| 1316 | + ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_COMPLETED = 0xA0, | |
| 1317 | + ARMV7_PERFCTR_PLE_CACHE_LINE_RQST_SKIPPED = 0xA1, | |
| 1318 | + ARMV7_PERFCTR_PLE_FIFO_FLUSH = 0xA2, | |
| 1319 | + ARMV7_PERFCTR_PLE_RQST_COMPLETED = 0xA3, | |
| 1320 | + ARMV7_PERFCTR_PLE_FIFO_OVERFLOW = 0xA4, | |
| 1321 | + ARMV7_PERFCTR_PLE_RQST_PROG = 0xA5 | |
| 1322 | +}; | |
| 1323 | + | |
| 1324 | +/* | |
| 1325 | + * Cortex-A8 HW events mapping | |
| 1326 | + * | |
| 1327 | + * The hardware events that we support. We do support cache operations but | |
| 1328 | + * we have harvard caches and no way to combine instruction and data | |
| 1329 | + * accesses/misses in hardware. | |
| 1330 | + */ | |
| 1331 | +static const unsigned armv7_a8_perf_map[PERF_COUNT_HW_MAX] = { | |
| 1332 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 1333 | + [PERF_COUNT_HW_INSTRUCTIONS] = ARMV7_PERFCTR_INSTR_EXECUTED, | |
| 1334 | + [PERF_COUNT_HW_CACHE_REFERENCES] = HW_OP_UNSUPPORTED, | |
| 1335 | + [PERF_COUNT_HW_CACHE_MISSES] = HW_OP_UNSUPPORTED, | |
| 1336 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 1337 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 1338 | + [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, | |
| 1339 | +}; | |
| 1340 | + | |
| 1341 | +static const unsigned armv7_a8_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] | |
| 1342 | + [PERF_COUNT_HW_CACHE_OP_MAX] | |
| 1343 | + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { | |
| 1344 | + [C(L1D)] = { | |
| 1345 | + /* | |
| 1346 | + * The performance counters don't differentiate between read | |
| 1347 | + * and write accesses/misses so this isn't strictly correct, | |
| 1348 | + * but it's the best we can do. Writes and reads get | |
| 1349 | + * combined. | |
| 1350 | + */ | |
| 1351 | + [C(OP_READ)] = { | |
| 1352 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 1353 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 1354 | + }, | |
| 1355 | + [C(OP_WRITE)] = { | |
| 1356 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 1357 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 1358 | + }, | |
| 1359 | + [C(OP_PREFETCH)] = { | |
| 1360 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1361 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1362 | + }, | |
| 1363 | + }, | |
| 1364 | + [C(L1I)] = { | |
| 1365 | + [C(OP_READ)] = { | |
| 1366 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, | |
| 1367 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, | |
| 1368 | + }, | |
| 1369 | + [C(OP_WRITE)] = { | |
| 1370 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L1_INST, | |
| 1371 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L1_INST_MISS, | |
| 1372 | + }, | |
| 1373 | + [C(OP_PREFETCH)] = { | |
| 1374 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1375 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1376 | + }, | |
| 1377 | + }, | |
| 1378 | + [C(LL)] = { | |
| 1379 | + [C(OP_READ)] = { | |
| 1380 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, | |
| 1381 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, | |
| 1382 | + }, | |
| 1383 | + [C(OP_WRITE)] = { | |
| 1384 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_L2_ACCESS, | |
| 1385 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_L2_CACH_MISS, | |
| 1386 | + }, | |
| 1387 | + [C(OP_PREFETCH)] = { | |
| 1388 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1389 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1390 | + }, | |
| 1391 | + }, | |
| 1392 | + [C(DTLB)] = { | |
| 1393 | + /* | |
| 1394 | + * Only ITLB misses and DTLB refills are supported. | |
| 1395 | + * If users want the DTLB refills misses a raw counter | |
| 1396 | + * must be used. | |
| 1397 | + */ | |
| 1398 | + [C(OP_READ)] = { | |
| 1399 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1400 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, | |
| 1401 | + }, | |
| 1402 | + [C(OP_WRITE)] = { | |
| 1403 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1404 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, | |
| 1405 | + }, | |
| 1406 | + [C(OP_PREFETCH)] = { | |
| 1407 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1408 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1409 | + }, | |
| 1410 | + }, | |
| 1411 | + [C(ITLB)] = { | |
| 1412 | + [C(OP_READ)] = { | |
| 1413 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1414 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 1415 | + }, | |
| 1416 | + [C(OP_WRITE)] = { | |
| 1417 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1418 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 1419 | + }, | |
| 1420 | + [C(OP_PREFETCH)] = { | |
| 1421 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1422 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1423 | + }, | |
| 1424 | + }, | |
| 1425 | + [C(BPU)] = { | |
| 1426 | + [C(OP_READ)] = { | |
| 1427 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 1428 | + [C(RESULT_MISS)] | |
| 1429 | + = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 1430 | + }, | |
| 1431 | + [C(OP_WRITE)] = { | |
| 1432 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 1433 | + [C(RESULT_MISS)] | |
| 1434 | + = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 1435 | + }, | |
| 1436 | + [C(OP_PREFETCH)] = { | |
| 1437 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1438 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1439 | + }, | |
| 1440 | + }, | |
| 1441 | +}; | |
| 1442 | + | |
| 1443 | +/* | |
| 1444 | + * Cortex-A9 HW events mapping | |
| 1445 | + */ | |
| 1446 | +static const unsigned armv7_a9_perf_map[PERF_COUNT_HW_MAX] = { | |
| 1447 | + [PERF_COUNT_HW_CPU_CYCLES] = ARMV7_PERFCTR_CPU_CYCLES, | |
| 1448 | + [PERF_COUNT_HW_INSTRUCTIONS] = | |
| 1449 | + ARMV7_PERFCTR_INST_OUT_OF_RENAME_STAGE, | |
| 1450 | + [PERF_COUNT_HW_CACHE_REFERENCES] = ARMV7_PERFCTR_COHERENT_LINE_HIT, | |
| 1451 | + [PERF_COUNT_HW_CACHE_MISSES] = ARMV7_PERFCTR_COHERENT_LINE_MISS, | |
| 1452 | + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = ARMV7_PERFCTR_PC_WRITE, | |
| 1453 | + [PERF_COUNT_HW_BRANCH_MISSES] = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 1454 | + [PERF_COUNT_HW_BUS_CYCLES] = ARMV7_PERFCTR_CLOCK_CYCLES, | |
| 1455 | +}; | |
| 1456 | + | |
| 1457 | +static const unsigned armv7_a9_perf_cache_map[PERF_COUNT_HW_CACHE_MAX] | |
| 1458 | + [PERF_COUNT_HW_CACHE_OP_MAX] | |
| 1459 | + [PERF_COUNT_HW_CACHE_RESULT_MAX] = { | |
| 1460 | + [C(L1D)] = { | |
| 1461 | + /* | |
| 1462 | + * The performance counters don't differentiate between read | |
| 1463 | + * and write accesses/misses so this isn't strictly correct, | |
| 1464 | + * but it's the best we can do. Writes and reads get | |
| 1465 | + * combined. | |
| 1466 | + */ | |
| 1467 | + [C(OP_READ)] = { | |
| 1468 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 1469 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 1470 | + }, | |
| 1471 | + [C(OP_WRITE)] = { | |
| 1472 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_DCACHE_ACCESS, | |
| 1473 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DCACHE_REFILL, | |
| 1474 | + }, | |
| 1475 | + [C(OP_PREFETCH)] = { | |
| 1476 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1477 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1478 | + }, | |
| 1479 | + }, | |
| 1480 | + [C(L1I)] = { | |
| 1481 | + [C(OP_READ)] = { | |
| 1482 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1483 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 1484 | + }, | |
| 1485 | + [C(OP_WRITE)] = { | |
| 1486 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1487 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_IFETCH_MISS, | |
| 1488 | + }, | |
| 1489 | + [C(OP_PREFETCH)] = { | |
| 1490 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1491 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1492 | + }, | |
| 1493 | + }, | |
| 1494 | + [C(LL)] = { | |
| 1495 | + [C(OP_READ)] = { | |
| 1496 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1497 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1498 | + }, | |
| 1499 | + [C(OP_WRITE)] = { | |
| 1500 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1501 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1502 | + }, | |
| 1503 | + [C(OP_PREFETCH)] = { | |
| 1504 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1505 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1506 | + }, | |
| 1507 | + }, | |
| 1508 | + [C(DTLB)] = { | |
| 1509 | + /* | |
| 1510 | + * Only ITLB misses and DTLB refills are supported. | |
| 1511 | + * If users want the DTLB refills misses a raw counter | |
| 1512 | + * must be used. | |
| 1513 | + */ | |
| 1514 | + [C(OP_READ)] = { | |
| 1515 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1516 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, | |
| 1517 | + }, | |
| 1518 | + [C(OP_WRITE)] = { | |
| 1519 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1520 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_DTLB_REFILL, | |
| 1521 | + }, | |
| 1522 | + [C(OP_PREFETCH)] = { | |
| 1523 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1524 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1525 | + }, | |
| 1526 | + }, | |
| 1527 | + [C(ITLB)] = { | |
| 1528 | + [C(OP_READ)] = { | |
| 1529 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1530 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 1531 | + }, | |
| 1532 | + [C(OP_WRITE)] = { | |
| 1533 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1534 | + [C(RESULT_MISS)] = ARMV7_PERFCTR_ITLB_MISS, | |
| 1535 | + }, | |
| 1536 | + [C(OP_PREFETCH)] = { | |
| 1537 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1538 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1539 | + }, | |
| 1540 | + }, | |
| 1541 | + [C(BPU)] = { | |
| 1542 | + [C(OP_READ)] = { | |
| 1543 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 1544 | + [C(RESULT_MISS)] | |
| 1545 | + = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 1546 | + }, | |
| 1547 | + [C(OP_WRITE)] = { | |
| 1548 | + [C(RESULT_ACCESS)] = ARMV7_PERFCTR_PC_WRITE, | |
| 1549 | + [C(RESULT_MISS)] | |
| 1550 | + = ARMV7_PERFCTR_PC_BRANCH_MIS_PRED, | |
| 1551 | + }, | |
| 1552 | + [C(OP_PREFETCH)] = { | |
| 1553 | + [C(RESULT_ACCESS)] = CACHE_OP_UNSUPPORTED, | |
| 1554 | + [C(RESULT_MISS)] = CACHE_OP_UNSUPPORTED, | |
| 1555 | + }, | |
| 1556 | + }, | |
| 1557 | +}; | |
| 1558 | + | |
| 1559 | +/* | |
| 1560 | + * Perf Events counters | |
| 1561 | + */ | |
| 1562 | +enum armv7_counters { | |
| 1563 | + ARMV7_CYCLE_COUNTER = 1, /* Cycle counter */ | |
| 1564 | + ARMV7_COUNTER0 = 2, /* First event counter */ | |
| 1565 | +}; | |
| 1566 | + | |
| 1567 | +/* | |
| 1568 | + * The cycle counter is ARMV7_CYCLE_COUNTER. | |
| 1569 | + * The first event counter is ARMV7_COUNTER0. | |
| 1570 | + * The last event counter is (ARMV7_COUNTER0 + armpmu->num_events - 1). | |
| 1571 | + */ | |
| 1572 | +#define ARMV7_COUNTER_LAST (ARMV7_COUNTER0 + armpmu->num_events - 1) | |
| 1573 | + | |
| 1574 | +/* | |
| 1575 | + * ARMv7 low level PMNC access | |
| 1576 | + */ | |
| 1577 | + | |
| 1578 | +/* | |
| 1579 | + * Per-CPU PMNC: config reg | |
| 1580 | + */ | |
| 1581 | +#define ARMV7_PMNC_E (1 << 0) /* Enable all counters */ | |
| 1582 | +#define ARMV7_PMNC_P (1 << 1) /* Reset all counters */ | |
| 1583 | +#define ARMV7_PMNC_C (1 << 2) /* Cycle counter reset */ | |
| 1584 | +#define ARMV7_PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */ | |
| 1585 | +#define ARMV7_PMNC_X (1 << 4) /* Export to ETM */ | |
| 1586 | +#define ARMV7_PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/ | |
| 1587 | +#define ARMV7_PMNC_N_SHIFT 11 /* Number of counters supported */ | |
| 1588 | +#define ARMV7_PMNC_N_MASK 0x1f | |
| 1589 | +#define ARMV7_PMNC_MASK 0x3f /* Mask for writable bits */ | |
| 1590 | + | |
| 1591 | +/* | |
| 1592 | + * Available counters | |
| 1593 | + */ | |
| 1594 | +#define ARMV7_CNT0 0 /* First event counter */ | |
| 1595 | +#define ARMV7_CCNT 31 /* Cycle counter */ | |
| 1596 | + | |
| 1597 | +/* Perf Event to low level counters mapping */ | |
| 1598 | +#define ARMV7_EVENT_CNT_TO_CNTx (ARMV7_COUNTER0 - ARMV7_CNT0) | |
| 1599 | + | |
| 1600 | +/* | |
| 1601 | + * CNTENS: counters enable reg | |
| 1602 | + */ | |
| 1603 | +#define ARMV7_CNTENS_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) | |
| 1604 | +#define ARMV7_CNTENS_C (1 << ARMV7_CCNT) | |
| 1605 | + | |
| 1606 | +/* | |
| 1607 | + * CNTENC: counters disable reg | |
| 1608 | + */ | |
| 1609 | +#define ARMV7_CNTENC_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) | |
| 1610 | +#define ARMV7_CNTENC_C (1 << ARMV7_CCNT) | |
| 1611 | + | |
| 1612 | +/* | |
| 1613 | + * INTENS: counters overflow interrupt enable reg | |
| 1614 | + */ | |
| 1615 | +#define ARMV7_INTENS_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) | |
| 1616 | +#define ARMV7_INTENS_C (1 << ARMV7_CCNT) | |
| 1617 | + | |
| 1618 | +/* | |
| 1619 | + * INTENC: counters overflow interrupt disable reg | |
| 1620 | + */ | |
| 1621 | +#define ARMV7_INTENC_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) | |
| 1622 | +#define ARMV7_INTENC_C (1 << ARMV7_CCNT) | |
| 1623 | + | |
| 1624 | +/* | |
| 1625 | + * EVTSEL: Event selection reg | |
| 1626 | + */ | |
| 1627 | +#define ARMV7_EVTSEL_MASK 0x7f /* Mask for writable bits */ | |
| 1628 | + | |
| 1629 | +/* | |
| 1630 | + * SELECT: Counter selection reg | |
| 1631 | + */ | |
| 1632 | +#define ARMV7_SELECT_MASK 0x1f /* Mask for writable bits */ | |
| 1633 | + | |
| 1634 | +/* | |
| 1635 | + * FLAG: counters overflow flag status reg | |
| 1636 | + */ | |
| 1637 | +#define ARMV7_FLAG_P(idx) (1 << (idx - ARMV7_EVENT_CNT_TO_CNTx)) | |
| 1638 | +#define ARMV7_FLAG_C (1 << ARMV7_CCNT) | |
| 1639 | +#define ARMV7_FLAG_MASK 0xffffffff /* Mask for writable bits */ | |
| 1640 | +#define ARMV7_OVERFLOWED_MASK ARMV7_FLAG_MASK | |
| 1641 | + | |
| 1642 | +static inline unsigned long armv7_pmnc_read(void) | |
| 1643 | +{ | |
| 1644 | + u32 val; | |
| 1645 | + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val)); | |
| 1646 | + return val; | |
| 1647 | +} | |
| 1648 | + | |
| 1649 | +static inline void armv7_pmnc_write(unsigned long val) | |
| 1650 | +{ | |
| 1651 | + val &= ARMV7_PMNC_MASK; | |
| 1652 | + asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val)); | |
| 1653 | +} | |
| 1654 | + | |
| 1655 | +static inline int armv7_pmnc_has_overflowed(unsigned long pmnc) | |
| 1656 | +{ | |
| 1657 | + return pmnc & ARMV7_OVERFLOWED_MASK; | |
| 1658 | +} | |
| 1659 | + | |
| 1660 | +static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, | |
| 1661 | + enum armv7_counters counter) | |
| 1662 | +{ | |
| 1663 | + int ret; | |
| 1664 | + | |
| 1665 | + if (counter == ARMV7_CYCLE_COUNTER) | |
| 1666 | + ret = pmnc & ARMV7_FLAG_C; | |
| 1667 | + else if ((counter >= ARMV7_COUNTER0) && (counter <= ARMV7_COUNTER_LAST)) | |
| 1668 | + ret = pmnc & ARMV7_FLAG_P(counter); | |
| 1669 | + else | |
| 1670 | + pr_err("CPU%u checking wrong counter %d overflow status\n", | |
| 1671 | + smp_processor_id(), counter); | |
| 1672 | + | |
| 1673 | + return ret; | |
| 1674 | +} | |
| 1675 | + | |
| 1676 | +static inline int armv7_pmnc_select_counter(unsigned int idx) | |
| 1677 | +{ | |
| 1678 | + u32 val; | |
| 1679 | + | |
| 1680 | + if ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST)) { | |
| 1681 | + pr_err("CPU%u selecting wrong PMNC counter" | |
| 1682 | + " %d\n", smp_processor_id(), idx); | |
| 1683 | + return -1; | |
| 1684 | + } | |
| 1685 | + | |
| 1686 | + val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK; | |
| 1687 | + asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val)); | |
| 1688 | + | |
| 1689 | + return idx; | |
| 1690 | +} | |
| 1691 | + | |
| 1692 | +static inline u32 armv7pmu_read_counter(int idx) | |
| 1693 | +{ | |
| 1694 | + unsigned long value = 0; | |
| 1695 | + | |
| 1696 | + if (idx == ARMV7_CYCLE_COUNTER) | |
| 1697 | + asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (value)); | |
| 1698 | + else if ((idx >= ARMV7_COUNTER0) && (idx <= ARMV7_COUNTER_LAST)) { | |
| 1699 | + if (armv7_pmnc_select_counter(idx) == idx) | |
| 1700 | + asm volatile("mrc p15, 0, %0, c9, c13, 2" | |
| 1701 | + : "=r" (value)); | |
| 1702 | + } else | |
| 1703 | + pr_err("CPU%u reading wrong counter %d\n", | |
| 1704 | + smp_processor_id(), idx); | |
| 1705 | + | |
| 1706 | + return value; | |
| 1707 | +} | |
| 1708 | + | |
| 1709 | +static inline void armv7pmu_write_counter(int idx, u32 value) | |
| 1710 | +{ | |
| 1711 | + if (idx == ARMV7_CYCLE_COUNTER) | |
| 1712 | + asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (value)); | |
| 1713 | + else if ((idx >= ARMV7_COUNTER0) && (idx <= ARMV7_COUNTER_LAST)) { | |
| 1714 | + if (armv7_pmnc_select_counter(idx) == idx) | |
| 1715 | + asm volatile("mcr p15, 0, %0, c9, c13, 2" | |
| 1716 | + : : "r" (value)); | |
| 1717 | + } else | |
| 1718 | + pr_err("CPU%u writing wrong counter %d\n", | |
| 1719 | + smp_processor_id(), idx); | |
| 1720 | +} | |
| 1721 | + | |
| 1722 | +static inline void armv7_pmnc_write_evtsel(unsigned int idx, u32 val) | |
| 1723 | +{ | |
| 1724 | + if (armv7_pmnc_select_counter(idx) == idx) { | |
| 1725 | + val &= ARMV7_EVTSEL_MASK; | |
| 1726 | + asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val)); | |
| 1727 | + } | |
| 1728 | +} | |
| 1729 | + | |
| 1730 | +static inline u32 armv7_pmnc_enable_counter(unsigned int idx) | |
| 1731 | +{ | |
| 1732 | + u32 val; | |
| 1733 | + | |
| 1734 | + if ((idx != ARMV7_CYCLE_COUNTER) && | |
| 1735 | + ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { | |
| 1736 | + pr_err("CPU%u enabling wrong PMNC counter" | |
| 1737 | + " %d\n", smp_processor_id(), idx); | |
| 1738 | + return -1; | |
| 1739 | + } | |
| 1740 | + | |
| 1741 | + if (idx == ARMV7_CYCLE_COUNTER) | |
| 1742 | + val = ARMV7_CNTENS_C; | |
| 1743 | + else | |
| 1744 | + val = ARMV7_CNTENS_P(idx); | |
| 1745 | + | |
| 1746 | + asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val)); | |
| 1747 | + | |
| 1748 | + return idx; | |
| 1749 | +} | |
| 1750 | + | |
| 1751 | +static inline u32 armv7_pmnc_disable_counter(unsigned int idx) | |
| 1752 | +{ | |
| 1753 | + u32 val; | |
| 1754 | + | |
| 1755 | + | |
| 1756 | + if ((idx != ARMV7_CYCLE_COUNTER) && | |
| 1757 | + ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { | |
| 1758 | + pr_err("CPU%u disabling wrong PMNC counter" | |
| 1759 | + " %d\n", smp_processor_id(), idx); | |
| 1760 | + return -1; | |
| 1761 | + } | |
| 1762 | + | |
| 1763 | + if (idx == ARMV7_CYCLE_COUNTER) | |
| 1764 | + val = ARMV7_CNTENC_C; | |
| 1765 | + else | |
| 1766 | + val = ARMV7_CNTENC_P(idx); | |
| 1767 | + | |
| 1768 | + asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val)); | |
| 1769 | + | |
| 1770 | + return idx; | |
| 1771 | +} | |
| 1772 | + | |
| 1773 | +static inline u32 armv7_pmnc_enable_intens(unsigned int idx) | |
| 1774 | +{ | |
| 1775 | + u32 val; | |
| 1776 | + | |
| 1777 | + if ((idx != ARMV7_CYCLE_COUNTER) && | |
| 1778 | + ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { | |
| 1779 | + pr_err("CPU%u enabling wrong PMNC counter" | |
| 1780 | + " interrupt enable %d\n", smp_processor_id(), idx); | |
| 1781 | + return -1; | |
| 1782 | + } | |
| 1783 | + | |
| 1784 | + if (idx == ARMV7_CYCLE_COUNTER) | |
| 1785 | + val = ARMV7_INTENS_C; | |
| 1786 | + else | |
| 1787 | + val = ARMV7_INTENS_P(idx); | |
| 1788 | + | |
| 1789 | + asm volatile("mcr p15, 0, %0, c9, c14, 1" : : "r" (val)); | |
| 1790 | + | |
| 1791 | + return idx; | |
| 1792 | +} | |
| 1793 | + | |
| 1794 | +static inline u32 armv7_pmnc_disable_intens(unsigned int idx) | |
| 1795 | +{ | |
| 1796 | + u32 val; | |
| 1797 | + | |
| 1798 | + if ((idx != ARMV7_CYCLE_COUNTER) && | |
| 1799 | + ((idx < ARMV7_COUNTER0) || (idx > ARMV7_COUNTER_LAST))) { | |
| 1800 | + pr_err("CPU%u disabling wrong PMNC counter" | |
| 1801 | + " interrupt enable %d\n", smp_processor_id(), idx); | |
| 1802 | + return -1; | |
| 1803 | + } | |
| 1804 | + | |
| 1805 | + if (idx == ARMV7_CYCLE_COUNTER) | |
| 1806 | + val = ARMV7_INTENC_C; | |
| 1807 | + else | |
| 1808 | + val = ARMV7_INTENC_P(idx); | |
| 1809 | + | |
| 1810 | + asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (val)); | |
| 1811 | + | |
| 1812 | + return idx; | |
| 1813 | +} | |
| 1814 | + | |
| 1815 | +static inline u32 armv7_pmnc_getreset_flags(void) | |
| 1816 | +{ | |
| 1817 | + u32 val; | |
| 1818 | + | |
| 1819 | + /* Read */ | |
| 1820 | + asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); | |
| 1821 | + | |
| 1822 | + /* Write to clear flags */ | |
| 1823 | + val &= ARMV7_FLAG_MASK; | |
| 1824 | + asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (val)); | |
| 1825 | + | |
| 1826 | + return val; | |
| 1827 | +} | |
| 1828 | + | |
| 1829 | +#ifdef DEBUG | |
| 1830 | +static void armv7_pmnc_dump_regs(void) | |
| 1831 | +{ | |
| 1832 | + u32 val; | |
| 1833 | + unsigned int cnt; | |
| 1834 | + | |
| 1835 | + printk(KERN_INFO "PMNC registers dump:\n"); | |
| 1836 | + | |
| 1837 | + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val)); | |
| 1838 | + printk(KERN_INFO "PMNC =0x%08x\n", val); | |
| 1839 | + | |
| 1840 | + asm volatile("mrc p15, 0, %0, c9, c12, 1" : "=r" (val)); | |
| 1841 | + printk(KERN_INFO "CNTENS=0x%08x\n", val); | |
| 1842 | + | |
| 1843 | + asm volatile("mrc p15, 0, %0, c9, c14, 1" : "=r" (val)); | |
| 1844 | + printk(KERN_INFO "INTENS=0x%08x\n", val); | |
| 1845 | + | |
| 1846 | + asm volatile("mrc p15, 0, %0, c9, c12, 3" : "=r" (val)); | |
| 1847 | + printk(KERN_INFO "FLAGS =0x%08x\n", val); | |
| 1848 | + | |
| 1849 | + asm volatile("mrc p15, 0, %0, c9, c12, 5" : "=r" (val)); | |
| 1850 | + printk(KERN_INFO "SELECT=0x%08x\n", val); | |
| 1851 | + | |
| 1852 | + asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val)); | |
| 1853 | + printk(KERN_INFO "CCNT =0x%08x\n", val); | |
| 1854 | + | |
| 1855 | + for (cnt = ARMV7_COUNTER0; cnt < ARMV7_COUNTER_LAST; cnt++) { | |
| 1856 | + armv7_pmnc_select_counter(cnt); | |
| 1857 | + asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val)); | |
| 1858 | + printk(KERN_INFO "CNT[%d] count =0x%08x\n", | |
| 1859 | + cnt-ARMV7_EVENT_CNT_TO_CNTx, val); | |
| 1860 | + asm volatile("mrc p15, 0, %0, c9, c13, 1" : "=r" (val)); | |
| 1861 | + printk(KERN_INFO "CNT[%d] evtsel=0x%08x\n", | |
| 1862 | + cnt-ARMV7_EVENT_CNT_TO_CNTx, val); | |
| 1863 | + } | |
| 1864 | +} | |
| 1865 | +#endif | |
| 1866 | + | |
| 1867 | +void armv7pmu_enable_event(struct hw_perf_event *hwc, int idx) | |
| 1868 | +{ | |
| 1869 | + unsigned long flags; | |
| 1870 | + | |
| 1871 | + /* | |
| 1872 | + * Enable counter and interrupt, and set the counter to count | |
| 1873 | + * the event that we're interested in. | |
| 1874 | + */ | |
| 1875 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1876 | + | |
| 1877 | + /* | |
| 1878 | + * Disable counter | |
| 1879 | + */ | |
| 1880 | + armv7_pmnc_disable_counter(idx); | |
| 1881 | + | |
| 1882 | + /* | |
| 1883 | + * Set event (if destined for PMNx counters) | |
| 1884 | + * We don't need to set the event if it's a cycle count | |
| 1885 | + */ | |
| 1886 | + if (idx != ARMV7_CYCLE_COUNTER) | |
| 1887 | + armv7_pmnc_write_evtsel(idx, hwc->config_base); | |
| 1888 | + | |
| 1889 | + /* | |
| 1890 | + * Enable interrupt for this counter | |
| 1891 | + */ | |
| 1892 | + armv7_pmnc_enable_intens(idx); | |
| 1893 | + | |
| 1894 | + /* | |
| 1895 | + * Enable counter | |
| 1896 | + */ | |
| 1897 | + armv7_pmnc_enable_counter(idx); | |
| 1898 | + | |
| 1899 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1900 | +} | |
| 1901 | + | |
| 1902 | +static void armv7pmu_disable_event(struct hw_perf_event *hwc, int idx) | |
| 1903 | +{ | |
| 1904 | + unsigned long flags; | |
| 1905 | + | |
| 1906 | + /* | |
| 1907 | + * Disable counter and interrupt | |
| 1908 | + */ | |
| 1909 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1910 | + | |
| 1911 | + /* | |
| 1912 | + * Disable counter | |
| 1913 | + */ | |
| 1914 | + armv7_pmnc_disable_counter(idx); | |
| 1915 | + | |
| 1916 | + /* | |
| 1917 | + * Disable interrupt for this counter | |
| 1918 | + */ | |
| 1919 | + armv7_pmnc_disable_intens(idx); | |
| 1920 | + | |
| 1921 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1922 | +} | |
| 1923 | + | |
| 1924 | +static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) | |
| 1925 | +{ | |
| 1926 | + unsigned long pmnc; | |
| 1927 | + struct perf_sample_data data; | |
| 1928 | + struct cpu_hw_events *cpuc; | |
| 1929 | + struct pt_regs *regs; | |
| 1930 | + int idx; | |
| 1931 | + | |
| 1932 | + /* | |
| 1933 | + * Get and reset the IRQ flags | |
| 1934 | + */ | |
| 1935 | + pmnc = armv7_pmnc_getreset_flags(); | |
| 1936 | + | |
| 1937 | + /* | |
| 1938 | + * Did an overflow occur? | |
| 1939 | + */ | |
| 1940 | + if (!armv7_pmnc_has_overflowed(pmnc)) | |
| 1941 | + return IRQ_NONE; | |
| 1942 | + | |
| 1943 | + /* | |
| 1944 | + * Handle the counter(s) overflow(s) | |
| 1945 | + */ | |
| 1946 | + regs = get_irq_regs(); | |
| 1947 | + | |
| 1948 | + data.addr = 0; | |
| 1949 | + | |
| 1950 | + cpuc = &__get_cpu_var(cpu_hw_events); | |
| 1951 | + for (idx = 0; idx <= armpmu->num_events; ++idx) { | |
| 1952 | + struct perf_event *event = cpuc->events[idx]; | |
| 1953 | + struct hw_perf_event *hwc; | |
| 1954 | + | |
| 1955 | + if (!test_bit(idx, cpuc->active_mask)) | |
| 1956 | + continue; | |
| 1957 | + | |
| 1958 | + /* | |
| 1959 | + * We have a single interrupt for all counters. Check that | |
| 1960 | + * each counter has overflowed before we process it. | |
| 1961 | + */ | |
| 1962 | + if (!armv7_pmnc_counter_has_overflowed(pmnc, idx)) | |
| 1963 | + continue; | |
| 1964 | + | |
| 1965 | + hwc = &event->hw; | |
| 1966 | + armpmu_event_update(event, hwc, idx); | |
| 1967 | + data.period = event->hw.last_period; | |
| 1968 | + if (!armpmu_event_set_period(event, hwc, idx)) | |
| 1969 | + continue; | |
| 1970 | + | |
| 1971 | + if (perf_event_overflow(event, 0, &data, regs)) | |
| 1972 | + armpmu->disable(hwc, idx); | |
| 1973 | + } | |
| 1974 | + | |
| 1975 | + /* | |
| 1976 | + * Handle the pending perf events. | |
| 1977 | + * | |
| 1978 | + * Note: this call *must* be run with interrupts enabled. For | |
| 1979 | + * platforms that can have the PMU interrupts raised as a PMI, this | |
| 1980 | + * will not work. | |
| 1981 | + */ | |
| 1982 | + perf_event_do_pending(); | |
| 1983 | + | |
| 1984 | + return IRQ_HANDLED; | |
| 1985 | +} | |
| 1986 | + | |
| 1987 | +static void armv7pmu_start(void) | |
| 1988 | +{ | |
| 1989 | + unsigned long flags; | |
| 1990 | + | |
| 1991 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 1992 | + /* Enable all counters */ | |
| 1993 | + armv7_pmnc_write(armv7_pmnc_read() | ARMV7_PMNC_E); | |
| 1994 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 1995 | +} | |
| 1996 | + | |
| 1997 | +static void armv7pmu_stop(void) | |
| 1998 | +{ | |
| 1999 | + unsigned long flags; | |
| 2000 | + | |
| 2001 | + spin_lock_irqsave(&pmu_lock, flags); | |
| 2002 | + /* Disable all counters */ | |
| 2003 | + armv7_pmnc_write(armv7_pmnc_read() & ~ARMV7_PMNC_E); | |
| 2004 | + spin_unlock_irqrestore(&pmu_lock, flags); | |
| 2005 | +} | |
| 2006 | + | |
| 2007 | +static inline int armv7_a8_pmu_event_map(int config) | |
| 2008 | +{ | |
| 2009 | + int mapping = armv7_a8_perf_map[config]; | |
| 2010 | + if (HW_OP_UNSUPPORTED == mapping) | |
| 2011 | + mapping = -EOPNOTSUPP; | |
| 2012 | + return mapping; | |
| 2013 | +} | |
| 2014 | + | |
| 2015 | +static inline int armv7_a9_pmu_event_map(int config) | |
| 2016 | +{ | |
| 2017 | + int mapping = armv7_a9_perf_map[config]; | |
| 2018 | + if (HW_OP_UNSUPPORTED == mapping) | |
| 2019 | + mapping = -EOPNOTSUPP; | |
| 2020 | + return mapping; | |
| 2021 | +} | |
| 2022 | + | |
| 2023 | +static u64 armv7pmu_raw_event(u64 config) | |
| 2024 | +{ | |
| 2025 | + return config & 0xff; | |
| 2026 | +} | |
| 2027 | + | |
| 2028 | +static int armv7pmu_get_event_idx(struct cpu_hw_events *cpuc, | |
| 2029 | + struct hw_perf_event *event) | |
| 2030 | +{ | |
| 2031 | + int idx; | |
| 2032 | + | |
| 2033 | + /* Always place a cycle counter into the cycle counter. */ | |
| 2034 | + if (event->config_base == ARMV7_PERFCTR_CPU_CYCLES) { | |
| 2035 | + if (test_and_set_bit(ARMV7_CYCLE_COUNTER, cpuc->used_mask)) | |
| 2036 | + return -EAGAIN; | |
| 2037 | + | |
| 2038 | + return ARMV7_CYCLE_COUNTER; | |
| 2039 | + } else { | |
| 2040 | + /* | |
| 2041 | + * For anything other than a cycle counter, try and use | |
| 2042 | + * the events counters | |
| 2043 | + */ | |
| 2044 | + for (idx = ARMV7_COUNTER0; idx <= armpmu->num_events; ++idx) { | |
| 2045 | + if (!test_and_set_bit(idx, cpuc->used_mask)) | |
| 2046 | + return idx; | |
| 2047 | + } | |
| 2048 | + | |
| 2049 | + /* The counters are all in use. */ | |
| 2050 | + return -EAGAIN; | |
| 2051 | + } | |
| 2052 | +} | |
| 2053 | + | |
| 2054 | +static struct arm_pmu armv7pmu = { | |
| 2055 | + .handle_irq = armv7pmu_handle_irq, | |
| 2056 | + .enable = armv7pmu_enable_event, | |
| 2057 | + .disable = armv7pmu_disable_event, | |
| 2058 | + .raw_event = armv7pmu_raw_event, | |
| 2059 | + .read_counter = armv7pmu_read_counter, | |
| 2060 | + .write_counter = armv7pmu_write_counter, | |
| 2061 | + .get_event_idx = armv7pmu_get_event_idx, | |
| 2062 | + .start = armv7pmu_start, | |
| 2063 | + .stop = armv7pmu_stop, | |
| 2064 | + .max_period = (1LLU << 32) - 1, | |
| 2065 | +}; | |
| 2066 | + | |
| 2067 | +static u32 __init armv7_reset_read_pmnc(void) | |
| 2068 | +{ | |
| 2069 | + u32 nb_cnt; | |
| 2070 | + | |
| 2071 | + /* Initialize & Reset PMNC: C and P bits */ | |
| 2072 | + armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C); | |
| 2073 | + | |
| 2074 | + /* Read the nb of CNTx counters supported from PMNC */ | |
| 2075 | + nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK; | |
| 2076 | + | |
| 2077 | + /* Add the CPU cycles counter and return */ | |
| 2078 | + return nb_cnt + 1; | |
| 2079 | +} | |
| 2080 | + | |
| 2081 | +static int __init | |
| 2082 | +init_hw_perf_events(void) | |
| 2083 | +{ | |
| 2084 | + unsigned long cpuid = read_cpuid_id(); | |
| 2085 | + unsigned long implementor = (cpuid & 0xFF000000) >> 24; | |
| 2086 | + unsigned long part_number = (cpuid & 0xFFF0); | |
| 2087 | + | |
| 2088 | + /* We only support ARM CPUs implemented by ARM at the moment. */ | |
| 2089 | + if (0x41 == implementor) { | |
| 2090 | + switch (part_number) { | |
| 2091 | + case 0xB360: /* ARM1136 */ | |
| 2092 | + case 0xB560: /* ARM1156 */ | |
| 2093 | + case 0xB760: /* ARM1176 */ | |
| 2094 | + armpmu = &armv6pmu; | |
| 2095 | + memcpy(armpmu_perf_cache_map, armv6_perf_cache_map, | |
| 2096 | + sizeof(armv6_perf_cache_map)); | |
| 2097 | + perf_max_events = armv6pmu.num_events; | |
| 2098 | + break; | |
| 2099 | + case 0xB020: /* ARM11mpcore */ | |
| 2100 | + armpmu = &armv6mpcore_pmu; | |
| 2101 | + memcpy(armpmu_perf_cache_map, | |
| 2102 | + armv6mpcore_perf_cache_map, | |
| 2103 | + sizeof(armv6mpcore_perf_cache_map)); | |
| 2104 | + perf_max_events = armv6mpcore_pmu.num_events; | |
| 2105 | + break; | |
| 2106 | + case 0xC080: /* Cortex-A8 */ | |
| 2107 | + armv7pmu.name = ARMV7_PMU_CORTEX_A8_NAME; | |
| 2108 | + memcpy(armpmu_perf_cache_map, armv7_a8_perf_cache_map, | |
| 2109 | + sizeof(armv7_a8_perf_cache_map)); | |
| 2110 | + armv7pmu.event_map = armv7_a8_pmu_event_map; | |
| 2111 | + armpmu = &armv7pmu; | |
| 2112 | + | |
| 2113 | + /* Reset PMNC and read the nb of CNTx counters | |
| 2114 | + supported */ | |
| 2115 | + armv7pmu.num_events = armv7_reset_read_pmnc(); | |
| 2116 | + perf_max_events = armv7pmu.num_events; | |
| 2117 | + break; | |
| 2118 | + case 0xC090: /* Cortex-A9 */ | |
| 2119 | + armv7pmu.name = ARMV7_PMU_CORTEX_A9_NAME; | |
| 2120 | + memcpy(armpmu_perf_cache_map, armv7_a9_perf_cache_map, | |
| 2121 | + sizeof(armv7_a9_perf_cache_map)); | |
| 2122 | + armv7pmu.event_map = armv7_a9_pmu_event_map; | |
| 2123 | + armpmu = &armv7pmu; | |
| 2124 | + | |
| 2125 | + /* Reset PMNC and read the nb of CNTx counters | |
| 2126 | + supported */ | |
| 2127 | + armv7pmu.num_events = armv7_reset_read_pmnc(); | |
| 2128 | + perf_max_events = armv7pmu.num_events; | |
| 2129 | + break; | |
| 2130 | + default: | |
| 2131 | + pr_info("no hardware support available\n"); | |
| 2132 | + perf_max_events = -1; | |
| 2133 | + } | |
| 2134 | + } | |
| 2135 | + | |
| 2136 | + if (armpmu) | |
| 2137 | + pr_info("enabled with %s PMU driver, %d counters available\n", | |
| 2138 | + armpmu->name, armpmu->num_events); | |
| 2139 | + | |
| 2140 | + return 0; | |
| 2141 | +} | |
| 2142 | +arch_initcall(init_hw_perf_events); | |
| 2143 | + | |
| 2144 | +/* | |
| 2145 | + * Callchain handling code. | |
| 2146 | + */ | |
| 2147 | +static inline void | |
| 2148 | +callchain_store(struct perf_callchain_entry *entry, | |
| 2149 | + u64 ip) | |
| 2150 | +{ | |
| 2151 | + if (entry->nr < PERF_MAX_STACK_DEPTH) | |
| 2152 | + entry->ip[entry->nr++] = ip; | |
| 2153 | +} | |
| 2154 | + | |
| 2155 | +/* | |
| 2156 | + * The registers we're interested in are at the end of the variable | |
| 2157 | + * length saved register structure. The fp points at the end of this | |
| 2158 | + * structure so the address of this struct is: | |
| 2159 | + * (struct frame_tail *)(xxx->fp)-1 | |
| 2160 | + * | |
| 2161 | + * This code has been adapted from the ARM OProfile support. | |
| 2162 | + */ | |
| 2163 | +struct frame_tail { | |
| 2164 | + struct frame_tail *fp; | |
| 2165 | + unsigned long sp; | |
| 2166 | + unsigned long lr; | |
| 2167 | +} __attribute__((packed)); | |
| 2168 | + | |
| 2169 | +/* | |
| 2170 | + * Get the return address for a single stackframe and return a pointer to the | |
| 2171 | + * next frame tail. | |
| 2172 | + */ | |
| 2173 | +static struct frame_tail * | |
| 2174 | +user_backtrace(struct frame_tail *tail, | |
| 2175 | + struct perf_callchain_entry *entry) | |
| 2176 | +{ | |
| 2177 | + struct frame_tail buftail; | |
| 2178 | + | |
| 2179 | + /* Also check accessibility of one struct frame_tail beyond */ | |
| 2180 | + if (!access_ok(VERIFY_READ, tail, sizeof(buftail))) | |
| 2181 | + return NULL; | |
| 2182 | + if (__copy_from_user_inatomic(&buftail, tail, sizeof(buftail))) | |
| 2183 | + return NULL; | |
| 2184 | + | |
| 2185 | + callchain_store(entry, buftail.lr); | |
| 2186 | + | |
| 2187 | + /* | |
| 2188 | + * Frame pointers should strictly progress back up the stack | |
| 2189 | + * (towards higher addresses). | |
| 2190 | + */ | |
| 2191 | + if (tail >= buftail.fp) | |
| 2192 | + return NULL; | |
| 2193 | + | |
| 2194 | + return buftail.fp - 1; | |
| 2195 | +} | |
| 2196 | + | |
| 2197 | +static void | |
| 2198 | +perf_callchain_user(struct pt_regs *regs, | |
| 2199 | + struct perf_callchain_entry *entry) | |
| 2200 | +{ | |
| 2201 | + struct frame_tail *tail; | |
| 2202 | + | |
| 2203 | + callchain_store(entry, PERF_CONTEXT_USER); | |
| 2204 | + | |
| 2205 | + if (!user_mode(regs)) | |
| 2206 | + regs = task_pt_regs(current); | |
| 2207 | + | |
| 2208 | + tail = (struct frame_tail *)regs->ARM_fp - 1; | |
| 2209 | + | |
| 2210 | + while (tail && !((unsigned long)tail & 0x3)) | |
| 2211 | + tail = user_backtrace(tail, entry); | |
| 2212 | +} | |
| 2213 | + | |
| 2214 | +/* | |
| 2215 | + * Gets called by walk_stackframe() for every stackframe. This will be called | |
| 2216 | + * whist unwinding the stackframe and is like a subroutine return so we use | |
| 2217 | + * the PC. | |
| 2218 | + */ | |
| 2219 | +static int | |
| 2220 | +callchain_trace(struct stackframe *fr, | |
| 2221 | + void *data) | |
| 2222 | +{ | |
| 2223 | + struct perf_callchain_entry *entry = data; | |
| 2224 | + callchain_store(entry, fr->pc); | |
| 2225 | + return 0; | |
| 2226 | +} | |
| 2227 | + | |
| 2228 | +static void | |
| 2229 | +perf_callchain_kernel(struct pt_regs *regs, | |
| 2230 | + struct perf_callchain_entry *entry) | |
| 2231 | +{ | |
| 2232 | + struct stackframe fr; | |
| 2233 | + | |
| 2234 | + callchain_store(entry, PERF_CONTEXT_KERNEL); | |
| 2235 | + fr.fp = regs->ARM_fp; | |
| 2236 | + fr.sp = regs->ARM_sp; | |
| 2237 | + fr.lr = regs->ARM_lr; | |
| 2238 | + fr.pc = regs->ARM_pc; | |
| 2239 | + walk_stackframe(&fr, callchain_trace, entry); | |
| 2240 | +} | |
| 2241 | + | |
| 2242 | +static void | |
| 2243 | +perf_do_callchain(struct pt_regs *regs, | |
| 2244 | + struct perf_callchain_entry *entry) | |
| 2245 | +{ | |
| 2246 | + int is_user; | |
| 2247 | + | |
| 2248 | + if (!regs) | |
| 2249 | + return; | |
| 2250 | + | |
| 2251 | + is_user = user_mode(regs); | |
| 2252 | + | |
| 2253 | + if (!current || !current->pid) | |
| 2254 | + return; | |
| 2255 | + | |
| 2256 | + if (is_user && current->state != TASK_RUNNING) | |
| 2257 | + return; | |
| 2258 | + | |
| 2259 | + if (!is_user) | |
| 2260 | + perf_callchain_kernel(regs, entry); | |
| 2261 | + | |
| 2262 | + if (current->mm) | |
| 2263 | + perf_callchain_user(regs, entry); | |
| 2264 | +} | |
| 2265 | + | |
| 2266 | +static DEFINE_PER_CPU(struct perf_callchain_entry, pmc_irq_entry); | |
| 2267 | + | |
| 2268 | +struct perf_callchain_entry * | |
| 2269 | +perf_callchain(struct pt_regs *regs) | |
| 2270 | +{ | |
| 2271 | + struct perf_callchain_entry *entry = &__get_cpu_var(pmc_irq_entry); | |
| 2272 | + | |
| 2273 | + entry->nr = 0; | |
| 2274 | + perf_do_callchain(regs, entry); | |
| 2275 | + return entry; | |
| 2276 | +} | |
| @@ -0,0 +1,103 @@ | ||
| 1 | +/* | |
| 2 | + * linux/arch/arm/kernel/pmu.c | |
| 3 | + * | |
| 4 | + * Copyright (C) 2009 picoChip Designs Ltd, Jamie Iles | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + * | |
| 10 | + */ | |
| 11 | + | |
| 12 | +#include <linux/cpumask.h> | |
| 13 | +#include <linux/err.h> | |
| 14 | +#include <linux/interrupt.h> | |
| 15 | +#include <linux/kernel.h> | |
| 16 | +#include <linux/module.h> | |
| 17 | + | |
| 18 | +#include <asm/pmu.h> | |
| 19 | + | |
| 20 | +/* | |
| 21 | + * Define the IRQs for the system. We could use something like a platform | |
| 22 | + * device but that seems fairly heavyweight for this. Also, the performance | |
| 23 | + * counters can't be removed or hotplugged. | |
| 24 | + * | |
| 25 | + * Ordering is important: init_pmu() will use the ordering to set the affinity | |
| 26 | + * to the corresponding core. e.g. the first interrupt will go to cpu 0, the | |
| 27 | + * second goes to cpu 1 etc. | |
| 28 | + */ | |
| 29 | +static const int irqs[] = { | |
| 30 | +#if defined(CONFIG_ARCH_OMAP2) | |
| 31 | + 3, | |
| 32 | +#elif defined(CONFIG_ARCH_BCMRING) | |
| 33 | + IRQ_PMUIRQ, | |
| 34 | +#elif defined(CONFIG_MACH_REALVIEW_EB) | |
| 35 | + IRQ_EB11MP_PMU_CPU0, | |
| 36 | + IRQ_EB11MP_PMU_CPU1, | |
| 37 | + IRQ_EB11MP_PMU_CPU2, | |
| 38 | + IRQ_EB11MP_PMU_CPU3, | |
| 39 | +#elif defined(CONFIG_ARCH_OMAP3) | |
| 40 | + INT_34XX_BENCH_MPU_EMUL, | |
| 41 | +#elif defined(CONFIG_ARCH_IOP32X) | |
| 42 | + IRQ_IOP32X_CORE_PMU, | |
| 43 | +#elif defined(CONFIG_ARCH_IOP33X) | |
| 44 | + IRQ_IOP33X_CORE_PMU, | |
| 45 | +#elif defined(CONFIG_ARCH_PXA) | |
| 46 | + IRQ_PMU, | |
| 47 | +#endif | |
| 48 | +}; | |
| 49 | + | |
| 50 | +static const struct pmu_irqs pmu_irqs = { | |
| 51 | + .irqs = irqs, | |
| 52 | + .num_irqs = ARRAY_SIZE(irqs), | |
| 53 | +}; | |
| 54 | + | |
| 55 | +static volatile long pmu_lock; | |
| 56 | + | |
| 57 | +const struct pmu_irqs * | |
| 58 | +reserve_pmu(void) | |
| 59 | +{ | |
| 60 | + return test_and_set_bit_lock(0, &pmu_lock) ? ERR_PTR(-EBUSY) : | |
| 61 | + &pmu_irqs; | |
| 62 | +} | |
| 63 | +EXPORT_SYMBOL_GPL(reserve_pmu); | |
| 64 | + | |
| 65 | +int | |
| 66 | +release_pmu(const struct pmu_irqs *irqs) | |
| 67 | +{ | |
| 68 | + if (WARN_ON(irqs != &pmu_irqs)) | |
| 69 | + return -EINVAL; | |
| 70 | + clear_bit_unlock(0, &pmu_lock); | |
| 71 | + return 0; | |
| 72 | +} | |
| 73 | +EXPORT_SYMBOL_GPL(release_pmu); | |
| 74 | + | |
| 75 | +static int | |
| 76 | +set_irq_affinity(int irq, | |
| 77 | + unsigned int cpu) | |
| 78 | +{ | |
| 79 | +#ifdef CONFIG_SMP | |
| 80 | + int err = irq_set_affinity(irq, cpumask_of(cpu)); | |
| 81 | + if (err) | |
| 82 | + pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n", | |
| 83 | + irq, cpu); | |
| 84 | + return err; | |
| 85 | +#else | |
| 86 | + return 0; | |
| 87 | +#endif | |
| 88 | +} | |
| 89 | + | |
| 90 | +int | |
| 91 | +init_pmu(void) | |
| 92 | +{ | |
| 93 | + int i, err = 0; | |
| 94 | + | |
| 95 | + for (i = 0; i < pmu_irqs.num_irqs; ++i) { | |
| 96 | + err = set_irq_affinity(pmu_irqs.irqs[i], i); | |
| 97 | + if (err) | |
| 98 | + break; | |
| 99 | + } | |
| 100 | + | |
| 101 | + return err; | |
| 102 | +} | |
| 103 | +EXPORT_SYMBOL_GPL(init_pmu); | |
| @@ -499,10 +499,41 @@ static struct undef_hook thumb_break_hook = { · 498 unmodified lines | ||
| 499 | 499 | .fn = break_trap, |
| 500 | 500 | }; |
| 501 | 501 | |
| 502 | +static int thumb2_break_trap(struct pt_regs *regs, unsigned int instr) | |
| 503 | +{ | |
| 504 | + unsigned int instr2; | |
| 505 | + void __user *pc; | |
| 506 | + | |
| 507 | + /* Check the second half of the instruction. */ | |
| 508 | + pc = (void __user *)(instruction_pointer(regs) + 2); | |
| 509 | + | |
| 510 | + if (processor_mode(regs) == SVC_MODE) { | |
| 511 | + instr2 = *(u16 *) pc; | |
| 512 | + } else { | |
| 513 | + get_user(instr2, (u16 __user *)pc); | |
| 514 | + } | |
| 515 | + | |
| 516 | + if (instr2 == 0xa000) { | |
| 517 | + ptrace_break(current, regs); | |
| 518 | + return 0; | |
| 519 | + } else { | |
| 520 | + return 1; | |
| 521 | + } | |
| 522 | +} | |
| 523 | + | |
| 524 | +static struct undef_hook thumb2_break_hook = { | |
| 525 | + .instr_mask = 0xffff, | |
| 526 | + .instr_val = 0xf7f0, | |
| 527 | + .cpsr_mask = PSR_T_BIT, | |
| 528 | + .cpsr_val = PSR_T_BIT, | |
| 529 | + .fn = thumb2_break_trap, | |
| 530 | +}; | |
| 531 | + | |
| 502 | 532 | static int __init ptrace_break_init(void) |
| 503 | 533 | { |
| 504 | 534 | register_undef_hook(&arm_break_hook); |
| 505 | 535 | register_undef_hook(&thumb_break_hook); |
| 536 | + register_undef_hook(&thumb2_break_hook); | |
| 506 | 537 | return 0; |
| 507 | 538 | } |
| 508 | 539 | |
| @@ -669,7 +700,7 @@ static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data) · 160 unmodified lines | ||
| 669 | 700 | union vfp_state *vfp = &thread->vfpstate; |
| 670 | 701 | struct user_vfp __user *ufp = data; |
| 671 | 702 | |
| 672 | − vfp_sync_state(thread); | |
| 703 | + vfp_sync_hwstate(thread); | |
| 673 | 704 | |
| 674 | 705 | /* copy the floating point registers */ |
| 675 | 706 | if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs, |
| @@ -692,7 +723,7 @@ static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) · 16 unmodified lines | ||
| 692 | 723 | union vfp_state *vfp = &thread->vfpstate; |
| 693 | 724 | struct user_vfp __user *ufp = data; |
| 694 | 725 | |
| 695 | − vfp_sync_state(thread); | |
| 726 | + vfp_sync_hwstate(thread); | |
| 696 | 727 | |
| 697 | 728 | /* copy the floating point registers */ |
| 698 | 729 | if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs, |
| @@ -703,6 +734,8 @@ static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) · 4 unmodified lines | ||
| 703 | 734 | if (get_user(vfp->hard.fpscr, &ufp->fpscr)) |
| 704 | 735 | return -EFAULT; |
| 705 | 736 | |
| 737 | + vfp_flush_hwstate(thread); | |
| 738 | + | |
| 706 | 739 | return 0; |
| 707 | 740 | } |
| 708 | 741 | #endif |
| @@ -712,26 +745,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) · 3 unmodified lines | ||
| 712 | 745 | int ret; |
| 713 | 746 | |
| 714 | 747 | switch (request) { |
| 715 | − /* | |
| 716 | − * read word at location "addr" in the child process. | |
| 717 | − */ | |
| 718 | − case PTRACE_PEEKTEXT: | |
| 719 | − case PTRACE_PEEKDATA: | |
| 720 | − ret = generic_ptrace_peekdata(child, addr, data); | |
| 721 | − break; | |
| 722 | − | |
| 723 | 748 | case PTRACE_PEEKUSR: |
| 724 | 749 | ret = ptrace_read_user(child, addr, (unsigned long __user *)data); |
| 725 | 750 | break; |
| 726 | 751 | |
| 727 | − /* | |
| 728 | − * write the word at location addr. | |
| 729 | − */ | |
| 730 | − case PTRACE_POKETEXT: | |
| 731 | − case PTRACE_POKEDATA: | |
| 732 | − ret = generic_ptrace_pokedata(child, addr, data); | |
| 733 | − break; | |
| 734 | − | |
| 735 | 752 | case PTRACE_POKEUSR: |
| 736 | 753 | ret = ptrace_write_user(child, addr, data); |
| 737 | 754 | break; |
| @@ -24,6 +24,7 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/interrupt.h> |
| 25 | 25 | #include <linux/smp.h> |
| 26 | 26 | #include <linux/fs.h> |
| 27 | +#include <linux/proc_fs.h> | |
| 27 | 28 | |
| 28 | 29 | #include <asm/unified.h> |
| 29 | 30 | #include <asm/cpu.h> |
| @@ -118,7 +119,7 @@ EXPORT_SYMBOL(elf_platform); · 88 unmodified lines | ||
| 118 | 119 | |
| 119 | 120 | static const char *cpu_name; |
| 120 | 121 | static const char *machine_name; |
| 121 | −static char __initdata command_line[COMMAND_LINE_SIZE]; | |
| 122 | +static char __initdata cmd_line[COMMAND_LINE_SIZE]; | |
| 122 | 123 | |
| 123 | 124 | static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE; |
| 124 | 125 | static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } }; |
| @@ -418,10 +419,11 @@ static int __init arm_add_memory(unsigned long start, unsigned long size) · 293 unmodified lines | ||
| 418 | 419 | * Pick out the memory size. We look for mem=size@start, |
| 419 | 420 | * where start and size are "size[KkMm]" |
| 420 | 421 | */ |
| 421 | −static void __init early_mem(char **p) | |
| 422 | +static int __init early_mem(char *p) | |
| 422 | 423 | { |
| 423 | 424 | static int usermem __initdata = 0; |
| 424 | 425 | unsigned long size, start; |
| 426 | + char *endp; | |
| 425 | 427 | |
| 426 | 428 | /* |
| 427 | 429 | * If the user specifies memory size, we |
| @@ -434,52 +436,15 @@ static void __init early_mem(char **p) · 6 unmodified lines | ||
| 434 | 436 | } |
| 435 | 437 | |
| 436 | 438 | start = PHYS_OFFSET; |
| 437 | − size = memparse(*p, p); | |
| 438 | − if (**p == '@') | |
| 439 | − start = memparse(*p + 1, p); | |
| 439 | + size = memparse(p, &endp); | |
| 440 | + if (*endp == '@') | |
| 441 | + start = memparse(endp + 1, NULL); | |
| 440 | 442 | |
| 441 | 443 | arm_add_memory(start, size); |
| 442 | −} | |
| 443 | −__early_param("mem=", early_mem); | |
| 444 | 444 | |
| 445 | −/* | |
| 446 | − * Initial parsing of the command line. | |
| 447 | − */ | |
| 448 | −static void __init parse_cmdline(char **cmdline_p, char *from) | |
| 449 | −{ | |
| 450 | − char c = ' ', *to = command_line; | |
| 451 | − int len = 0; | |
| 452 | − | |
| 453 | − for (;;) { | |
| 454 | − if (c == ' ') { | |
| 455 | − extern struct early_params __early_begin, __early_end; | |
| 456 | − struct early_params *p; | |
| 457 | − | |
| 458 | − for (p = &__early_begin; p < &__early_end; p++) { | |
| 459 | − int arglen = strlen(p->arg); | |
| 460 | − | |
| 461 | − if (memcmp(from, p->arg, arglen) == 0) { | |
| 462 | − if (to != command_line) | |
| 463 | − to -= 1; | |
| 464 | − from += arglen; | |
| 465 | − p->fn(&from); | |
| 466 | − | |
| 467 | − while (*from != ' ' && *from != '\0') | |
| 468 | − from++; | |
| 469 | − break; | |
| 470 | − } | |
| 471 | − } | |
| 472 | − } | |
| 473 | − c = *from++; | |
| 474 | − if (!c) | |
| 475 | − break; | |
| 476 | − if (COMMAND_LINE_SIZE <= ++len) | |
| 477 | − break; | |
| 478 | − *to++ = c; | |
| 479 | − } | |
| 480 | − *to = '\0'; | |
| 481 | − *cmdline_p = command_line; | |
| 445 | + return 0; | |
| 482 | 446 | } |
| 447 | +early_param("mem", early_mem); | |
| 483 | 448 | |
| 484 | 449 | static void __init |
| 485 | 450 | setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz) |
| @@ -740,9 +705,15 @@ void __init setup_arch(char **cmdline_p) · 254 unmodified lines | ||
| 740 | 705 | init_mm.end_data = (unsigned long) _edata; |
| 741 | 706 | init_mm.brk = (unsigned long) _end; |
| 742 | 707 | |
| 743 | − memcpy(boot_command_line, from, COMMAND_LINE_SIZE); | |
| 744 | − boot_command_line[COMMAND_LINE_SIZE-1] = '\0'; | |
| 745 | − parse_cmdline(cmdline_p, from); | |
| 708 | + /* parse_early_param needs a boot_command_line */ | |
| 709 | + strlcpy(boot_command_line, from, COMMAND_LINE_SIZE); | |
| 710 | + | |
| 711 | + /* populate cmd_line too for later use, preserving boot_command_line */ | |
| 712 | + strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE); | |
| 713 | + *cmdline_p = cmd_line; | |
| 714 | + | |
| 715 | + parse_early_param(); | |
| 716 | + | |
| 746 | 717 | paging_init(mdesc); |
| 747 | 718 | request_standard_resources(&meminfo, mdesc); |
| 748 | 719 | |
| @@ -783,9 +754,21 @@ static int __init topology_init(void) · 34 unmodified lines | ||
| 783 | 754 | |
| 784 | 755 | return 0; |
| 785 | 756 | } |
| 786 | − | |
| 787 | 757 | subsys_initcall(topology_init); |
| 788 | 758 | |
| 759 | +#ifdef CONFIG_HAVE_PROC_CPU | |
| 760 | +static int __init proc_cpu_init(void) | |
| 761 | +{ | |
| 762 | + struct proc_dir_entry *res; | |
| 763 | + | |
| 764 | + res = proc_mkdir("cpu", NULL); | |
| 765 | + if (!res) | |
| 766 | + return -ENOMEM; | |
| 767 | + return 0; | |
| 768 | +} | |
| 769 | +fs_initcall(proc_cpu_init); | |
| 770 | +#endif | |
| 771 | + | |
| 789 | 772 | static const char *hwcap_str[] = { |
| 790 | 773 | "swp", |
| 791 | 774 | "half", |
| @@ -10,11 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | * |
| 11 | 11 | * This file contains the ARM-specific time handling details: |
| 12 | 12 | * reading the RTC at bootup, etc... |
| 13 | − * | |
| 14 | − * 1994-07-02 Alan Modra | |
| 15 | − * fixed set_rtc_mmss, fixed time.year for >= 2000, new mktime | |
| 16 | − * 1998-12-20 Updated NTP code according to technical memorandum Jan '96 | |
| 17 | − * "A Kernel Model for Precision Timekeeping" by Dave Mills | |
| 18 | 13 | */ |
| 19 | 14 | #include <linux/module.h> |
| 20 | 15 | #include <linux/kernel.h> |
| @@ -77,11 +72,6 @@ unsigned long profile_pc(struct pt_regs *regs) · 56 unmodified lines | ||
| 77 | 72 | EXPORT_SYMBOL(profile_pc); |
| 78 | 73 | #endif |
| 79 | 74 | |
| 80 | −/* | |
| 81 | − * hook for setting the RTC's idea of the current time. | |
| 82 | − */ | |
| 83 | −int (*set_rtc)(void); | |
| 84 | − | |
| 85 | 75 | #ifndef CONFIG_GENERIC_TIME |
| 86 | 76 | static unsigned long dummy_gettimeoffset(void) |
| 87 | 77 | { |
| @@ -89,140 +79,6 @@ static unsigned long dummy_gettimeoffset(void) · 1 unmodified line | ||
| 89 | 79 | } |
| 90 | 80 | #endif |
| 91 | 81 | |
| 92 | −static unsigned long next_rtc_update; | |
| 93 | − | |
| 94 | −/* | |
| 95 | − * If we have an externally synchronized linux clock, then update | |
| 96 | − * CMOS clock accordingly every ~11 minutes. set_rtc() has to be | |
| 97 | − * called as close as possible to 500 ms before the new second | |
| 98 | − * starts. | |
| 99 | − */ | |
| 100 | −static inline void do_set_rtc(void) | |
| 101 | −{ | |
| 102 | − if (!ntp_synced() || set_rtc == NULL) | |
| 103 | − return; | |
| 104 | − | |
| 105 | − if (next_rtc_update && | |
| 106 | − time_before((unsigned long)xtime.tv_sec, next_rtc_update)) | |
| 107 | − return; | |
| 108 | − | |
| 109 | − if (xtime.tv_nsec < 500000000 - ((unsigned) tick_nsec >> 1) && | |
| 110 | − xtime.tv_nsec >= 500000000 + ((unsigned) tick_nsec >> 1)) | |
| 111 | − return; | |
| 112 | − | |
| 113 | − if (set_rtc()) | |
| 114 | − /* | |
| 115 | − * rtc update failed. Try again in 60s | |
| 116 | − */ | |
| 117 | − next_rtc_update = xtime.tv_sec + 60; | |
| 118 | − else | |
| 119 | − next_rtc_update = xtime.tv_sec + 660; | |
| 120 | −} | |
| 121 | − | |
| 122 | −#ifdef CONFIG_LEDS | |
| 123 | − | |
| 124 | −static void dummy_leds_event(led_event_t evt) | |
| 125 | −{ | |
| 126 | −} | |
| 127 | − | |
| 128 | −void (*leds_event)(led_event_t) = dummy_leds_event; | |
| 129 | − | |
| 130 | −struct leds_evt_name { | |
| 131 | − const char name[8]; | |
| 132 | − int on; | |
| 133 | − int off; | |
| 134 | −}; | |
| 135 | − | |
| 136 | −static const struct leds_evt_name evt_names[] = { | |
| 137 | − { "amber", led_amber_on, led_amber_off }, | |
| 138 | − { "blue", led_blue_on, led_blue_off }, | |
| 139 | − { "green", led_green_on, led_green_off }, | |
| 140 | − { "red", led_red_on, led_red_off }, | |
| 141 | −}; | |
| 142 | − | |
| 143 | −static ssize_t leds_store(struct sys_device *dev, | |
| 144 | − struct sysdev_attribute *attr, | |
| 145 | − const char *buf, size_t size) | |
| 146 | −{ | |
| 147 | − int ret = -EINVAL, len = strcspn(buf, " "); | |
| 148 | − | |
| 149 | − if (len > 0 && buf[len] == '\0') | |
| 150 | − len--; | |
| 151 | − | |
| 152 | − if (strncmp(buf, "claim", len) == 0) { | |
| 153 | − leds_event(led_claim); | |
| 154 | − ret = size; | |
| 155 | − } else if (strncmp(buf, "release", len) == 0) { | |
| 156 | − leds_event(led_release); | |
| 157 | − ret = size; | |
| 158 | − } else { | |
| 159 | − int i; | |
| 160 | − | |
| 161 | − for (i = 0; i < ARRAY_SIZE(evt_names); i++) { | |
| 162 | − if (strlen(evt_names[i].name) != len || | |
| 163 | − strncmp(buf, evt_names[i].name, len) != 0) | |
| 164 | − continue; | |
| 165 | − if (strncmp(buf+len, " on", 3) == 0) { | |
| 166 | − leds_event(evt_names[i].on); | |
| 167 | − ret = size; | |
| 168 | − } else if (strncmp(buf+len, " off", 4) == 0) { | |
| 169 | − leds_event(evt_names[i].off); | |
| 170 | − ret = size; | |
| 171 | − } | |
| 172 | − break; | |
| 173 | − } | |
| 174 | − } | |
| 175 | − return ret; | |
| 176 | −} | |
| 177 | − | |
| 178 | −static SYSDEV_ATTR(event, 0200, NULL, leds_store); | |
| 179 | − | |
| 180 | −static int leds_suspend(struct sys_device *dev, pm_message_t state) | |
| 181 | −{ | |
| 182 | − leds_event(led_stop); | |
| 183 | − return 0; | |
| 184 | −} | |
| 185 | − | |
| 186 | −static int leds_resume(struct sys_device *dev) | |
| 187 | −{ | |
| 188 | − leds_event(led_start); | |
| 189 | − return 0; | |
| 190 | −} | |
| 191 | − | |
| 192 | −static int leds_shutdown(struct sys_device *dev) | |
| 193 | −{ | |
| 194 | − leds_event(led_halted); | |
| 195 | − return 0; | |
| 196 | −} | |
| 197 | − | |
| 198 | −static struct sysdev_class leds_sysclass = { | |
| 199 | − .name = "leds", | |
| 200 | − .shutdown = leds_shutdown, | |
| 201 | − .suspend = leds_suspend, | |
| 202 | − .resume = leds_resume, | |
| 203 | −}; | |
| 204 | − | |
| 205 | −static struct sys_device leds_device = { | |
| 206 | − .id = 0, | |
| 207 | − .cls = &leds_sysclass, | |
| 208 | −}; | |
| 209 | − | |
| 210 | −static int __init leds_init(void) | |
| 211 | −{ | |
| 212 | − int ret; | |
| 213 | − ret = sysdev_class_register(&leds_sysclass); | |
| 214 | − if (ret == 0) | |
| 215 | − ret = sysdev_register(&leds_device); | |
| 216 | − if (ret == 0) | |
| 217 | − ret = sysdev_create_file(&leds_device, &attr_event); | |
| 218 | − return ret; | |
| 219 | −} | |
| 220 | − | |
| 221 | −device_initcall(leds_init); | |
| 222 | − | |
| 223 | −EXPORT_SYMBOL(leds_event); | |
| 224 | −#endif | |
| 225 | − | |
| 226 | 82 | #ifdef CONFIG_LEDS_TIMER |
| 227 | 83 | static inline void do_leds(void) |
| 228 | 84 | { |
| @@ -295,39 +151,6 @@ int do_settimeofday(struct timespec *tv) · 66 unmodified lines | ||
| 295 | 151 | EXPORT_SYMBOL(do_settimeofday); |
| 296 | 152 | #endif /* !CONFIG_GENERIC_TIME */ |
| 297 | 153 | |
| 298 | −/** | |
| 299 | − * save_time_delta - Save the offset between system time and RTC time | |
| 300 | − * @delta: pointer to timespec to store delta | |
| 301 | − * @rtc: pointer to timespec for current RTC time | |
| 302 | − * | |
| 303 | − * Return a delta between the system time and the RTC time, such | |
| 304 | − * that system time can be restored later with restore_time_delta() | |
| 305 | − */ | |
| 306 | −void save_time_delta(struct timespec *delta, struct timespec *rtc) | |
| 307 | −{ | |
| 308 | − set_normalized_timespec(delta, | |
| 309 | − xtime.tv_sec - rtc->tv_sec, | |
| 310 | − xtime.tv_nsec - rtc->tv_nsec); | |
| 311 | −} | |
| 312 | −EXPORT_SYMBOL(save_time_delta); | |
| 313 | − | |
| 314 | −/** | |
| 315 | − * restore_time_delta - Restore the current system time | |
| 316 | − * @delta: delta returned by save_time_delta() | |
| 317 | − * @rtc: pointer to timespec for current RTC time | |
| 318 | − */ | |
| 319 | −void restore_time_delta(struct timespec *delta, struct timespec *rtc) | |
| 320 | −{ | |
| 321 | − struct timespec ts; | |
| 322 | − | |
| 323 | − set_normalized_timespec(&ts, | |
| 324 | − delta->tv_sec + rtc->tv_sec, | |
| 325 | − delta->tv_nsec + rtc->tv_nsec); | |
| 326 | − | |
| 327 | − do_settimeofday(&ts); | |
| 328 | −} | |
| 329 | −EXPORT_SYMBOL(restore_time_delta); | |
| 330 | − | |
| 331 | 154 | #ifndef CONFIG_GENERIC_CLOCKEVENTS |
| 332 | 155 | /* |
| 333 | 156 | * Kernel system timer support. |
| @@ -336,7 +159,6 @@ void timer_tick(void) · 2 unmodified lines | ||
| 336 | 159 | { |
| 337 | 160 | profile_tick(CPU_PROFILING); |
| 338 | 161 | do_leds(); |
| 339 | − do_set_rtc(); | |
| 340 | 162 | write_seqlock(&xtime_lock); |
| 341 | 163 | do_timer(1); |
| 342 | 164 | write_sequnlock(&xtime_lock); |
| @@ -12,15 +12,17 @@ · 11 unmodified lines | ||
| 12 | 12 | * 'linux/arch/arm/lib/traps.S'. Mostly a debugging aid, but will probably |
| 13 | 13 | * kill the offending process. |
| 14 | 14 | */ |
| 15 | −#include <linux/module.h> | |
| 16 | 15 | #include <linux/signal.h> |
| 17 | −#include <linux/spinlock.h> | |
| 18 | 16 | #include <linux/personality.h> |
| 19 | 17 | #include <linux/kallsyms.h> |
| 20 | −#include <linux/delay.h> | |
| 18 | +#include <linux/spinlock.h> | |
| 19 | +#include <linux/uaccess.h> | |
| 21 | 20 | #include <linux/hardirq.h> |
| 21 | +#include <linux/kdebug.h> | |
| 22 | +#include <linux/module.h> | |
| 23 | +#include <linux/kexec.h> | |
| 24 | +#include <linux/delay.h> | |
| 22 | 25 | #include <linux/init.h> |
| 23 | −#include <linux/uaccess.h> | |
| 24 | 26 | |
| 25 | 27 | #include <asm/atomic.h> |
| 26 | 28 | #include <asm/cacheflush.h> |
| @@ -224,14 +226,21 @@ void show_stack(struct task_struct *tsk, unsigned long *sp) · 197 unmodified lines | ||
| 224 | 226 | #define S_SMP "" |
| 225 | 227 | #endif |
| 226 | 228 | |
| 227 | −static void __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs) | |
| 229 | +static int __die(const char *str, int err, struct thread_info *thread, struct pt_regs *regs) | |
| 228 | 230 | { |
| 229 | 231 | struct task_struct *tsk = thread->task; |
| 230 | 232 | static int die_counter; |
| 233 | + int ret; | |
| 231 | 234 | |
| 232 | 235 | printk(KERN_EMERG "Internal error: %s: %x [#%d]" S_PREEMPT S_SMP "\n", |
| 233 | 236 | str, err, ++die_counter); |
| 234 | 237 | sysfs_printk_last_file(); |
| 238 | + | |
| 239 | + /* trap and error numbers are mostly meaningless on ARM */ | |
| 240 | + ret = notify_die(DIE_OOPS, str, regs, err, tsk->thread.trap_no, SIGSEGV); | |
| 241 | + if (ret == NOTIFY_STOP) | |
| 242 | + return ret; | |
| 243 | + | |
| 235 | 244 | print_modules(); |
| 236 | 245 | __show_regs(regs); |
| 237 | 246 | printk(KERN_EMERG "Process %.*s (pid: %d, stack limit = 0x%p)\n", |
| @@ -243,6 +252,8 @@ static void __die(const char *str, int err, struct thread_info *thread, struct p · 5 unmodified lines | ||
| 243 | 252 | dump_backtrace(regs, tsk); |
| 244 | 253 | dump_instr(KERN_EMERG, regs); |
| 245 | 254 | } |
| 255 | + | |
| 256 | + return ret; | |
| 246 | 257 | } |
| 247 | 258 | |
| 248 | 259 | DEFINE_SPINLOCK(die_lock); |
| @@ -250,16 +261,21 @@ DEFINE_SPINLOCK(die_lock); · 1 unmodified line | ||
| 250 | 261 | /* |
| 251 | 262 | * This function is protected against re-entrancy. |
| 252 | 263 | */ |
| 253 | −NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) | |
| 264 | +void die(const char *str, struct pt_regs *regs, int err) | |
| 254 | 265 | { |
| 255 | 266 | struct thread_info *thread = current_thread_info(); |
| 267 | + int ret; | |
| 256 | 268 | |
| 257 | 269 | oops_enter(); |
| 258 | 270 | |
| 259 | 271 | spin_lock_irq(&die_lock); |
| 260 | 272 | console_verbose(); |
| 261 | 273 | bust_spinlocks(1); |
| 262 | − __die(str, err, thread, regs); | |
| 274 | + ret = __die(str, err, thread, regs); | |
| 275 | + | |
| 276 | + if (regs && kexec_should_crash(thread->task)) | |
| 277 | + crash_kexec(regs); | |
| 278 | + | |
| 263 | 279 | bust_spinlocks(0); |
| 264 | 280 | add_taint(TAINT_DIE); |
| 265 | 281 | spin_unlock_irq(&die_lock); |
| @@ -267,11 +283,10 @@ NORET_TYPE void die(const char *str, struct pt_regs *regs, int err) · 1 unmodified line | ||
| 267 | 283 | |
| 268 | 284 | if (in_interrupt()) |
| 269 | 285 | panic("Fatal exception in interrupt"); |
| 270 | − | |
| 271 | 286 | if (panic_on_oops) |
| 272 | 287 | panic("Fatal exception"); |
| 273 | − | |
| 274 | − do_exit(SIGSEGV); | |
| 288 | + if (ret != NOTIFY_STOP) | |
| 289 | + do_exit(SIGSEGV); | |
| 275 | 290 | } |
| 276 | 291 | |
| 277 | 292 | void arm_notify_die(const char *str, struct pt_regs *regs, |
| @@ -43,10 +43,6 @@ SECTIONS · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | INIT_SETUP(16) |
| 45 | 45 | |
| 46 | − __early_begin = .; | |
| 47 | − *(.early_param.init) | |
| 48 | − __early_end = .; | |
| 49 | − | |
| 50 | 46 | INIT_CALLS |
| 51 | 47 | CON_INITCALL |
| 52 | 48 | SECURITY_INITCALL |
| @@ -10,7 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | */ |
| 11 | 11 | |
| 12 | 12 | #include "hardware.h" |
| 13 | − .macro addruart,rx | |
| 13 | + .macro addruart, rx, tmp | |
| 14 | 14 | mrc p15, 0, \rx, c1, c0 |
| 15 | 15 | tst \rx, #1 @ MMU enabled? |
| 16 | 16 | moveq \rx, #0x80000000 @ physical |
| @@ -89,6 +89,12 @@ config ARCH_AT91CAP9 · 88 unmodified lines | ||
| 89 | 89 | select GENERIC_CLOCKEVENTS |
| 90 | 90 | select HAVE_FB_ATMEL |
| 91 | 91 | |
| 92 | +config ARCH_AT572D940HF | |
| 93 | + bool "AT572D940HF" | |
| 94 | + select CPU_ARM926T | |
| 95 | + select GENERIC_TIME | |
| 96 | + select GENERIC_CLOCKEVENTS | |
| 97 | + | |
| 92 | 98 | config ARCH_AT91X40 |
| 93 | 99 | bool "AT91x40" |
| 94 | 100 | |
| @@ -390,6 +396,23 @@ endif · 295 unmodified lines | ||
| 390 | 396 | |
| 391 | 397 | # ---------------------------------------------------------- |
| 392 | 398 | |
| 399 | +if ARCH_AT572D940HF | |
| 400 | + | |
| 401 | +comment "AT572D940HF Board Type" | |
| 402 | + | |
| 403 | +config MACH_AT572D940HFEB | |
| 404 | + bool "AT572D940HF-EK" | |
| 405 | + depends on ARCH_AT572D940HF | |
| 406 | + select HAVE_AT91_DATAFLASH_CARD | |
| 407 | + select HAVE_NAND_ATMEL_BUSWIDTH_16 | |
| 408 | + help | |
| 409 | + Select this if you are using Atmel's AT572D940HF-EK evaluation kit. | |
| 410 | + <http://www.atmel.com/products/diopsis/default.asp> | |
| 411 | + | |
| 412 | +endif | |
| 413 | + | |
| 414 | +# ---------------------------------------------------------- | |
| 415 | + | |
| 393 | 416 | if ARCH_AT91X40 |
| 394 | 417 | |
| 395 | 418 | comment "AT91X40 Board Type" |
| @@ -19,6 +19,7 @@ obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devi · 18 unmodified lines | ||
| 19 | 19 | obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o |
| 20 | 20 | obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o |
| 21 | 21 | obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o |
| 22 | +obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o | |
| 22 | 23 | obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o |
| 23 | 24 | |
| 24 | 25 | # AT91RM9200 board-specific support |
| @@ -69,6 +70,9 @@ obj-$(CONFIG_MACH_AT91SAM9G45EKES) += board-sam9m10g45ek.o · 44 unmodified lines | ||
| 69 | 70 | # AT91CAP9 board-specific support |
| 70 | 71 | obj-$(CONFIG_MACH_AT91CAP9ADK) += board-cap9adk.o |
| 71 | 72 | |
| 73 | +# AT572D940HF board-specific support | |
| 74 | +obj-$(CONFIG_MACH_AT572D940HFEB) += board-at572d940hf_ek.o | |
| 75 | + | |
| 72 | 76 | # AT91X40 board-specific support |
| 73 | 77 | obj-$(CONFIG_MACH_AT91EB01) += board-eb01.o |
| 74 | 78 | |
| @@ -0,0 +1,377 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/mach-at91/at572d940hf.c | |
| 3 | + * | |
| 4 | + * Antonio R. Costa <costa.antonior@gmail.com> | |
| 5 | + * Copyright (C) 2008 Atmel | |
| 6 | + * | |
| 7 | + * Copyright (C) 2005 SAN People | |
| 8 | + * | |
| 9 | + * This program is free software; you can redistribute it and/or modify | |
| 10 | + * it under the terms of the GNU General Public License as published by | |
| 11 | + * the Free Software Foundation; either version 2 of the License, or | |
| 12 | + * (at your option) any later version. | |
| 13 | + * | |
| 14 | + * This program is distributed in the hope that it will be useful, | |
| 15 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | + * GNU General Public License for more details. | |
| 18 | + * | |
| 19 | + * You should have received a copy of the GNU General Public License | |
| 20 | + * along with this program; if not, write to the Free Software | |
| 21 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | + * | |
| 23 | + */ | |
| 24 | + | |
| 25 | +#include <linux/module.h> | |
| 26 | + | |
| 27 | +#include <asm/mach/irq.h> | |
| 28 | +#include <asm/mach/arch.h> | |
| 29 | +#include <asm/mach/map.h> | |
| 30 | +#include <mach/at572d940hf.h> | |
| 31 | +#include <mach/at91_pmc.h> | |
| 32 | +#include <mach/at91_rstc.h> | |
| 33 | + | |
| 34 | +#include "generic.h" | |
| 35 | +#include "clock.h" | |
| 36 | + | |
| 37 | +static struct map_desc at572d940hf_io_desc[] __initdata = { | |
| 38 | + { | |
| 39 | + .virtual = AT91_VA_BASE_SYS, | |
| 40 | + .pfn = __phys_to_pfn(AT91_BASE_SYS), | |
| 41 | + .length = SZ_16K, | |
| 42 | + .type = MT_DEVICE, | |
| 43 | + }, { | |
| 44 | + .virtual = AT91_IO_VIRT_BASE - AT572D940HF_SRAM_SIZE, | |
| 45 | + .pfn = __phys_to_pfn(AT572D940HF_SRAM_BASE), | |
| 46 | + .length = AT572D940HF_SRAM_SIZE, | |
| 47 | + .type = MT_DEVICE, | |
| 48 | + }, | |
| 49 | +}; | |
| 50 | + | |
| 51 | +/* -------------------------------------------------------------------- | |
| 52 | + * Clocks | |
| 53 | + * -------------------------------------------------------------------- */ | |
| 54 | + | |
| 55 | +/* | |
| 56 | + * The peripheral clocks. | |
| 57 | + */ | |
| 58 | +static struct clk pioA_clk = { | |
| 59 | + .name = "pioA_clk", | |
| 60 | + .pmc_mask = 1 << AT572D940HF_ID_PIOA, | |
| 61 | + .type = CLK_TYPE_PERIPHERAL, | |
| 62 | +}; | |
| 63 | +static struct clk pioB_clk = { | |
| 64 | + .name = "pioB_clk", | |
| 65 | + .pmc_mask = 1 << AT572D940HF_ID_PIOB, | |
| 66 | + .type = CLK_TYPE_PERIPHERAL, | |
| 67 | +}; | |
| 68 | +static struct clk pioC_clk = { | |
| 69 | + .name = "pioC_clk", | |
| 70 | + .pmc_mask = 1 << AT572D940HF_ID_PIOC, | |
| 71 | + .type = CLK_TYPE_PERIPHERAL, | |
| 72 | +}; | |
| 73 | +static struct clk macb_clk = { | |
| 74 | + .name = "macb_clk", | |
| 75 | + .pmc_mask = 1 << AT572D940HF_ID_EMAC, | |
| 76 | + .type = CLK_TYPE_PERIPHERAL, | |
| 77 | +}; | |
| 78 | +static struct clk usart0_clk = { | |
| 79 | + .name = "usart0_clk", | |
| 80 | + .pmc_mask = 1 << AT572D940HF_ID_US0, | |
| 81 | + .type = CLK_TYPE_PERIPHERAL, | |
| 82 | +}; | |
| 83 | +static struct clk usart1_clk = { | |
| 84 | + .name = "usart1_clk", | |
| 85 | + .pmc_mask = 1 << AT572D940HF_ID_US1, | |
| 86 | + .type = CLK_TYPE_PERIPHERAL, | |
| 87 | +}; | |
| 88 | +static struct clk usart2_clk = { | |
| 89 | + .name = "usart2_clk", | |
| 90 | + .pmc_mask = 1 << AT572D940HF_ID_US2, | |
| 91 | + .type = CLK_TYPE_PERIPHERAL, | |
| 92 | +}; | |
| 93 | +static struct clk mmc_clk = { | |
| 94 | + .name = "mci_clk", | |
| 95 | + .pmc_mask = 1 << AT572D940HF_ID_MCI, | |
| 96 | + .type = CLK_TYPE_PERIPHERAL, | |
| 97 | +}; | |
| 98 | +static struct clk udc_clk = { | |
| 99 | + .name = "udc_clk", | |
| 100 | + .pmc_mask = 1 << AT572D940HF_ID_UDP, | |
| 101 | + .type = CLK_TYPE_PERIPHERAL, | |
| 102 | +}; | |
| 103 | +static struct clk twi0_clk = { | |
| 104 | + .name = "twi0_clk", | |
| 105 | + .pmc_mask = 1 << AT572D940HF_ID_TWI0, | |
| 106 | + .type = CLK_TYPE_PERIPHERAL, | |
| 107 | +}; | |
| 108 | +static struct clk spi0_clk = { | |
| 109 | + .name = "spi0_clk", | |
| 110 | + .pmc_mask = 1 << AT572D940HF_ID_SPI0, | |
| 111 | + .type = CLK_TYPE_PERIPHERAL, | |
| 112 | +}; | |
| 113 | +static struct clk spi1_clk = { | |
| 114 | + .name = "spi1_clk", | |
| 115 | + .pmc_mask = 1 << AT572D940HF_ID_SPI1, | |
| 116 | + .type = CLK_TYPE_PERIPHERAL, | |
| 117 | +}; | |
| 118 | +static struct clk ssc0_clk = { | |
| 119 | + .name = "ssc0_clk", | |
| 120 | + .pmc_mask = 1 << AT572D940HF_ID_SSC0, | |
| 121 | + .type = CLK_TYPE_PERIPHERAL, | |
| 122 | +}; | |
| 123 | +static struct clk ssc1_clk = { | |
| 124 | + .name = "ssc1_clk", | |
| 125 | + .pmc_mask = 1 << AT572D940HF_ID_SSC1, | |
| 126 | + .type = CLK_TYPE_PERIPHERAL, | |
| 127 | +}; | |
| 128 | +static struct clk ssc2_clk = { | |
| 129 | + .name = "ssc2_clk", | |
| 130 | + .pmc_mask = 1 << AT572D940HF_ID_SSC2, | |
| 131 | + .type = CLK_TYPE_PERIPHERAL, | |
| 132 | +}; | |
| 133 | +static struct clk tc0_clk = { | |
| 134 | + .name = "tc0_clk", | |
| 135 | + .pmc_mask = 1 << AT572D940HF_ID_TC0, | |
| 136 | + .type = CLK_TYPE_PERIPHERAL, | |
| 137 | +}; | |
| 138 | +static struct clk tc1_clk = { | |
| 139 | + .name = "tc1_clk", | |
| 140 | + .pmc_mask = 1 << AT572D940HF_ID_TC1, | |
| 141 | + .type = CLK_TYPE_PERIPHERAL, | |
| 142 | +}; | |
| 143 | +static struct clk tc2_clk = { | |
| 144 | + .name = "tc2_clk", | |
| 145 | + .pmc_mask = 1 << AT572D940HF_ID_TC2, | |
| 146 | + .type = CLK_TYPE_PERIPHERAL, | |
| 147 | +}; | |
| 148 | +static struct clk ohci_clk = { | |
| 149 | + .name = "ohci_clk", | |
| 150 | + .pmc_mask = 1 << AT572D940HF_ID_UHP, | |
| 151 | + .type = CLK_TYPE_PERIPHERAL, | |
| 152 | +}; | |
| 153 | +static struct clk ssc3_clk = { | |
| 154 | + .name = "ssc3_clk", | |
| 155 | + .pmc_mask = 1 << AT572D940HF_ID_SSC3, | |
| 156 | + .type = CLK_TYPE_PERIPHERAL, | |
| 157 | +}; | |
| 158 | +static struct clk twi1_clk = { | |
| 159 | + .name = "twi1_clk", | |
| 160 | + .pmc_mask = 1 << AT572D940HF_ID_TWI1, | |
| 161 | + .type = CLK_TYPE_PERIPHERAL, | |
| 162 | +}; | |
| 163 | +static struct clk can0_clk = { | |
| 164 | + .name = "can0_clk", | |
| 165 | + .pmc_mask = 1 << AT572D940HF_ID_CAN0, | |
| 166 | + .type = CLK_TYPE_PERIPHERAL, | |
| 167 | +}; | |
| 168 | +static struct clk can1_clk = { | |
| 169 | + .name = "can1_clk", | |
| 170 | + .pmc_mask = 1 << AT572D940HF_ID_CAN1, | |
| 171 | + .type = CLK_TYPE_PERIPHERAL, | |
| 172 | +}; | |
| 173 | +static struct clk mAgicV_clk = { | |
| 174 | + .name = "mAgicV_clk", | |
| 175 | + .pmc_mask = 1 << AT572D940HF_ID_MSIRQ0, | |
| 176 | + .type = CLK_TYPE_PERIPHERAL, | |
| 177 | +}; | |
| 178 | + | |
| 179 | + | |
| 180 | +static struct clk *periph_clocks[] __initdata = { | |
| 181 | + &pioA_clk, | |
| 182 | + &pioB_clk, | |
| 183 | + &pioC_clk, | |
| 184 | + &macb_clk, | |
| 185 | + &usart0_clk, | |
| 186 | + &usart1_clk, | |
| 187 | + &usart2_clk, | |
| 188 | + &mmc_clk, | |
| 189 | + &udc_clk, | |
| 190 | + &twi0_clk, | |
| 191 | + &spi0_clk, | |
| 192 | + &spi1_clk, | |
| 193 | + &ssc0_clk, | |
| 194 | + &ssc1_clk, | |
| 195 | + &ssc2_clk, | |
| 196 | + &tc0_clk, | |
| 197 | + &tc1_clk, | |
| 198 | + &tc2_clk, | |
| 199 | + &ohci_clk, | |
| 200 | + &ssc3_clk, | |
| 201 | + &twi1_clk, | |
| 202 | + &can0_clk, | |
| 203 | + &can1_clk, | |
| 204 | + &mAgicV_clk, | |
| 205 | + /* irq0 .. irq2 */ | |
| 206 | +}; | |
| 207 | + | |
| 208 | +/* | |
| 209 | + * The five programmable clocks. | |
| 210 | + * You must configure pin multiplexing to bring these signals out. | |
| 211 | + */ | |
| 212 | +static struct clk pck0 = { | |
| 213 | + .name = "pck0", | |
| 214 | + .pmc_mask = AT91_PMC_PCK0, | |
| 215 | + .type = CLK_TYPE_PROGRAMMABLE, | |
| 216 | + .id = 0, | |
| 217 | +}; | |
| 218 | +static struct clk pck1 = { | |
| 219 | + .name = "pck1", | |
| 220 | + .pmc_mask = AT91_PMC_PCK1, | |
| 221 | + .type = CLK_TYPE_PROGRAMMABLE, | |
| 222 | + .id = 1, | |
| 223 | +}; | |
| 224 | +static struct clk pck2 = { | |
| 225 | + .name = "pck2", | |
| 226 | + .pmc_mask = AT91_PMC_PCK2, | |
| 227 | + .type = CLK_TYPE_PROGRAMMABLE, | |
| 228 | + .id = 2, | |
| 229 | +}; | |
| 230 | +static struct clk pck3 = { | |
| 231 | + .name = "pck3", | |
| 232 | + .pmc_mask = AT91_PMC_PCK3, | |
| 233 | + .type = CLK_TYPE_PROGRAMMABLE, | |
| 234 | + .id = 3, | |
| 235 | +}; | |
| 236 | + | |
| 237 | +static struct clk mAgicV_mem_clk = { | |
| 238 | + .name = "mAgicV_mem_clk", | |
| 239 | + .pmc_mask = AT91_PMC_PCK4, | |
| 240 | + .type = CLK_TYPE_PROGRAMMABLE, | |
| 241 | + .id = 4, | |
| 242 | +}; | |
| 243 | + | |
| 244 | +/* HClocks */ | |
| 245 | +static struct clk hck0 = { | |
| 246 | + .name = "hck0", | |
| 247 | + .pmc_mask = AT91_PMC_HCK0, | |
| 248 | + .type = CLK_TYPE_SYSTEM, | |
| 249 | + .id = 0, | |
| 250 | +}; | |
| 251 | +static struct clk hck1 = { | |
| 252 | + .name = "hck1", | |
| 253 | + .pmc_mask = AT91_PMC_HCK1, | |
| 254 | + .type = CLK_TYPE_SYSTEM, | |
| 255 | + .id = 1, | |
| 256 | +}; | |
| 257 | + | |
| 258 | +static void __init at572d940hf_register_clocks(void) | |
| 259 | +{ | |
| 260 | + int i; | |
| 261 | + | |
| 262 | + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) | |
| 263 | + clk_register(periph_clocks[i]); | |
| 264 | + | |
| 265 | + clk_register(&pck0); | |
| 266 | + clk_register(&pck1); | |
| 267 | + clk_register(&pck2); | |
| 268 | + clk_register(&pck3); | |
| 269 | + clk_register(&mAgicV_mem_clk); | |
| 270 | + | |
| 271 | + clk_register(&hck0); | |
| 272 | + clk_register(&hck1); | |
| 273 | +} | |
| 274 | + | |
| 275 | +/* -------------------------------------------------------------------- | |
| 276 | + * GPIO | |
| 277 | + * -------------------------------------------------------------------- */ | |
| 278 | + | |
| 279 | +static struct at91_gpio_bank at572d940hf_gpio[] = { | |
| 280 | + { | |
| 281 | + .id = AT572D940HF_ID_PIOA, | |
| 282 | + .offset = AT91_PIOA, | |
| 283 | + .clock = &pioA_clk, | |
| 284 | + }, { | |
| 285 | + .id = AT572D940HF_ID_PIOB, | |
| 286 | + .offset = AT91_PIOB, | |
| 287 | + .clock = &pioB_clk, | |
| 288 | + }, { | |
| 289 | + .id = AT572D940HF_ID_PIOC, | |
| 290 | + .offset = AT91_PIOC, | |
| 291 | + .clock = &pioC_clk, | |
| 292 | + } | |
| 293 | +}; | |
| 294 | + | |
| 295 | +static void at572d940hf_reset(void) | |
| 296 | +{ | |
| 297 | + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); | |
| 298 | +} | |
| 299 | + | |
| 300 | + | |
| 301 | +/* -------------------------------------------------------------------- | |
| 302 | + * AT572D940HF processor initialization | |
| 303 | + * -------------------------------------------------------------------- */ | |
| 304 | + | |
| 305 | +void __init at572d940hf_initialize(unsigned long main_clock) | |
| 306 | +{ | |
| 307 | + /* Map peripherals */ | |
| 308 | + iotable_init(at572d940hf_io_desc, ARRAY_SIZE(at572d940hf_io_desc)); | |
| 309 | + | |
| 310 | + at91_arch_reset = at572d940hf_reset; | |
| 311 | + at91_extern_irq = (1 << AT572D940HF_ID_IRQ0) | (1 << AT572D940HF_ID_IRQ1) | |
| 312 | + | (1 << AT572D940HF_ID_IRQ2); | |
| 313 | + | |
| 314 | + /* Init clock subsystem */ | |
| 315 | + at91_clock_init(main_clock); | |
| 316 | + | |
| 317 | + /* Register the processor-specific clocks */ | |
| 318 | + at572d940hf_register_clocks(); | |
| 319 | + | |
| 320 | + /* Register GPIO subsystem */ | |
| 321 | + at91_gpio_init(at572d940hf_gpio, 3); | |
| 322 | +} | |
| 323 | + | |
| 324 | +/* -------------------------------------------------------------------- | |
| 325 | + * Interrupt initialization | |
| 326 | + * -------------------------------------------------------------------- */ | |
| 327 | + | |
| 328 | +/* | |
| 329 | + * The default interrupt priority levels (0 = lowest, 7 = highest). | |
| 330 | + */ | |
| 331 | +static unsigned int at572d940hf_default_irq_priority[NR_AIC_IRQS] __initdata = { | |
| 332 | + 7, /* Advanced Interrupt Controller */ | |
| 333 | + 7, /* System Peripherals */ | |
| 334 | + 0, /* Parallel IO Controller A */ | |
| 335 | + 0, /* Parallel IO Controller B */ | |
| 336 | + 0, /* Parallel IO Controller C */ | |
| 337 | + 3, /* Ethernet */ | |
| 338 | + 6, /* USART 0 */ | |
| 339 | + 6, /* USART 1 */ | |
| 340 | + 6, /* USART 2 */ | |
| 341 | + 0, /* Multimedia Card Interface */ | |
| 342 | + 4, /* USB Device Port */ | |
| 343 | + 0, /* Two-Wire Interface 0 */ | |
| 344 | + 6, /* Serial Peripheral Interface 0 */ | |
| 345 | + 6, /* Serial Peripheral Interface 1 */ | |
| 346 | + 5, /* Serial Synchronous Controller 0 */ | |
| 347 | + 5, /* Serial Synchronous Controller 1 */ | |
| 348 | + 5, /* Serial Synchronous Controller 2 */ | |
| 349 | + 0, /* Timer Counter 0 */ | |
| 350 | + 0, /* Timer Counter 1 */ | |
| 351 | + 0, /* Timer Counter 2 */ | |
| 352 | + 3, /* USB Host port */ | |
| 353 | + 3, /* Serial Synchronous Controller 3 */ | |
| 354 | + 0, /* Two-Wire Interface 1 */ | |
| 355 | + 0, /* CAN Controller 0 */ | |
| 356 | + 0, /* CAN Controller 1 */ | |
| 357 | + 0, /* mAgicV HALT line */ | |
| 358 | + 0, /* mAgicV SIRQ0 line */ | |
| 359 | + 0, /* mAgicV exception line */ | |
| 360 | + 0, /* mAgicV end of DMA line */ | |
| 361 | + 0, /* Advanced Interrupt Controller */ | |
| 362 | + 0, /* Advanced Interrupt Controller */ | |
| 363 | + 0, /* Advanced Interrupt Controller */ | |
| 364 | +}; | |
| 365 | + | |
| 366 | +void __init at572d940hf_init_interrupts(unsigned int priority[NR_AIC_IRQS]) | |
| 367 | +{ | |
| 368 | + if (!priority) | |
| 369 | + priority = at572d940hf_default_irq_priority; | |
| 370 | + | |
| 371 | + /* Initialize the AIC interrupt controller */ | |
| 372 | + at91_aic_init(priority); | |
| 373 | + | |
| 374 | + /* Enable GPIO interrupts */ | |
| 375 | + at91_gpio_irq_setup(); | |
| 376 | +} | |
| 377 | + | |
| @@ -0,0 +1,970 @@ | ||
| 1 | +/* | |
| 2 | + * arch/arm/mach-at91/at572d940hf_devices.c | |
| 3 | + * | |
| 4 | + * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com> | |
| 5 | + * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org> | |
| 6 | + * Copyright (C) 2005 David Brownell | |
| 7 | + * | |
| 8 | + * This program is free software; you can redistribute it and/or modify | |
| 9 | + * it under the terms of the GNU General Public License as published by | |
| 10 | + * the Free Software Foundation; either version 2 of the License, or | |
| 11 | + * (at your option) any later version. | |
| 12 | + * | |
| 13 | + * This program is distributed in the hope that it will be useful, | |
| 14 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 15 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 16 | + * GNU General Public License for more details. | |
| 17 | + * | |
| 18 | + * You should have received a copy of the GNU General Public License | |
| 19 | + * along with this program; if not, write to the Free Software | |
| 20 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 21 | + * | |
| 22 | + */ | |
| 23 | + | |
| 24 | +#include <asm/mach/arch.h> | |
| 25 | +#include <asm/mach/map.h> | |
| 26 | + | |
| 27 | +#include <linux/dma-mapping.h> | |
| 28 | +#include <linux/platform_device.h> | |
| 29 | + | |
| 30 | +#include <mach/board.h> | |
| 31 | +#include <mach/gpio.h> | |
| 32 | +#include <mach/at572d940hf.h> | |
| 33 | +#include <mach/at572d940hf_matrix.h> | |
| 34 | +#include <mach/at91sam9_smc.h> | |
| 35 | + | |
| 36 | +#include "generic.h" | |
| 37 | +#include "sam9_smc.h" | |
| 38 | + | |
| 39 | + | |
| 40 | +/* -------------------------------------------------------------------- | |
| 41 | + * USB Host | |
| 42 | + * -------------------------------------------------------------------- */ | |
| 43 | + | |
| 44 | +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) | |
| 45 | +static u64 ohci_dmamask = DMA_BIT_MASK(32); | |
| 46 | +static struct at91_usbh_data usbh_data; | |
| 47 | + | |
| 48 | +static struct resource usbh_resources[] = { | |
| 49 | + [0] = { | |
| 50 | + .start = AT572D940HF_UHP_BASE, | |
| 51 | + .end = AT572D940HF_UHP_BASE + SZ_1M - 1, | |
| 52 | + .flags = IORESOURCE_MEM, | |
| 53 | + }, | |
| 54 | + [1] = { | |
| 55 | + .start = AT572D940HF_ID_UHP, | |
| 56 | + .end = AT572D940HF_ID_UHP, | |
| 57 | + .flags = IORESOURCE_IRQ, | |
| 58 | + }, | |
| 59 | +}; | |
| 60 | + | |
| 61 | +static struct platform_device at572d940hf_usbh_device = { | |
| 62 | + .name = "at91_ohci", | |
| 63 | + .id = -1, | |
| 64 | + .dev = { | |
| 65 | + .dma_mask = &ohci_dmamask, | |
| 66 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 67 | + .platform_data = &usbh_data, | |
| 68 | + }, | |
| 69 | + .resource = usbh_resources, | |
| 70 | + .num_resources = ARRAY_SIZE(usbh_resources), | |
| 71 | +}; | |
| 72 | + | |
| 73 | +void __init at91_add_device_usbh(struct at91_usbh_data *data) | |
| 74 | +{ | |
| 75 | + if (!data) | |
| 76 | + return; | |
| 77 | + | |
| 78 | + usbh_data = *data; | |
| 79 | + platform_device_register(&at572d940hf_usbh_device); | |
| 80 | + | |
| 81 | +} | |
| 82 | +#else | |
| 83 | +void __init at91_add_device_usbh(struct at91_usbh_data *data) {} | |
| 84 | +#endif | |
| 85 | + | |
| 86 | + | |
| 87 | +/* -------------------------------------------------------------------- | |
| 88 | + * USB Device (Gadget) | |
| 89 | + * -------------------------------------------------------------------- */ | |
| 90 | + | |
| 91 | +#ifdef CONFIG_USB_GADGET_AT91 | |
| 92 | +static struct at91_udc_data udc_data; | |
| 93 | + | |
| 94 | +static struct resource udc_resources[] = { | |
| 95 | + [0] = { | |
| 96 | + .start = AT572D940HF_BASE_UDP, | |
| 97 | + .end = AT572D940HF_BASE_UDP + SZ_16K - 1, | |
| 98 | + .flags = IORESOURCE_MEM, | |
| 99 | + }, | |
| 100 | + [1] = { | |
| 101 | + .start = AT572D940HF_ID_UDP, | |
| 102 | + .end = AT572D940HF_ID_UDP, | |
| 103 | + .flags = IORESOURCE_IRQ, | |
| 104 | + }, | |
| 105 | +}; | |
| 106 | + | |
| 107 | +static struct platform_device at572d940hf_udc_device = { | |
| 108 | + .name = "at91_udc", | |
| 109 | + .id = -1, | |
| 110 | + .dev = { | |
| 111 | + .platform_data = &udc_data, | |
| 112 | + }, | |
| 113 | + .resource = udc_resources, | |
| 114 | + .num_resources = ARRAY_SIZE(udc_resources), | |
| 115 | +}; | |
| 116 | + | |
| 117 | +void __init at91_add_device_udc(struct at91_udc_data *data) | |
| 118 | +{ | |
| 119 | + if (!data) | |
| 120 | + return; | |
| 121 | + | |
| 122 | + if (data->vbus_pin) { | |
| 123 | + at91_set_gpio_input(data->vbus_pin, 0); | |
| 124 | + at91_set_deglitch(data->vbus_pin, 1); | |
| 125 | + } | |
| 126 | + | |
| 127 | + /* Pullup pin is handled internally */ | |
| 128 | + | |
| 129 | + udc_data = *data; | |
| 130 | + platform_device_register(&at572d940hf_udc_device); | |
| 131 | +} | |
| 132 | +#else | |
| 133 | +void __init at91_add_device_udc(struct at91_udc_data *data) {} | |
| 134 | +#endif | |
| 135 | + | |
| 136 | + | |
| 137 | +/* -------------------------------------------------------------------- | |
| 138 | + * Ethernet | |
| 139 | + * -------------------------------------------------------------------- */ | |
| 140 | + | |
| 141 | +#if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE) | |
| 142 | +static u64 eth_dmamask = DMA_BIT_MASK(32); | |
| 143 | +static struct at91_eth_data eth_data; | |
| 144 | + | |
| 145 | +static struct resource eth_resources[] = { | |
| 146 | + [0] = { | |
| 147 | + .start = AT572D940HF_BASE_EMAC, | |
| 148 | + .end = AT572D940HF_BASE_EMAC + SZ_16K - 1, | |
| 149 | + .flags = IORESOURCE_MEM, | |
| 150 | + }, | |
| 151 | + [1] = { | |
| 152 | + .start = AT572D940HF_ID_EMAC, | |
| 153 | + .end = AT572D940HF_ID_EMAC, | |
| 154 | + .flags = IORESOURCE_IRQ, | |
| 155 | + }, | |
| 156 | +}; | |
| 157 | + | |
| 158 | +static struct platform_device at572d940hf_eth_device = { | |
| 159 | + .name = "macb", | |
| 160 | + .id = -1, | |
| 161 | + .dev = { | |
| 162 | + .dma_mask = ð_dmamask, | |
| 163 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 164 | + .platform_data = ð_data, | |
| 165 | + }, | |
| 166 | + .resource = eth_resources, | |
| 167 | + .num_resources = ARRAY_SIZE(eth_resources), | |
| 168 | +}; | |
| 169 | + | |
| 170 | +void __init at91_add_device_eth(struct at91_eth_data *data) | |
| 171 | +{ | |
| 172 | + if (!data) | |
| 173 | + return; | |
| 174 | + | |
| 175 | + if (data->phy_irq_pin) { | |
| 176 | + at91_set_gpio_input(data->phy_irq_pin, 0); | |
| 177 | + at91_set_deglitch(data->phy_irq_pin, 1); | |
| 178 | + } | |
| 179 | + | |
| 180 | + /* Only RMII is supported */ | |
| 181 | + data->is_rmii = 1; | |
| 182 | + | |
| 183 | + /* Pins used for RMII */ | |
| 184 | + at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXCK_EREFCK */ | |
| 185 | + at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */ | |
| 186 | + at91_set_A_periph(AT91_PIN_PA18, 0); /* ERX0 */ | |
| 187 | + at91_set_A_periph(AT91_PIN_PA19, 0); /* ERX1 */ | |
| 188 | + at91_set_A_periph(AT91_PIN_PA20, 0); /* ERXER */ | |
| 189 | + at91_set_A_periph(AT91_PIN_PA23, 0); /* ETXEN */ | |
| 190 | + at91_set_A_periph(AT91_PIN_PA21, 0); /* ETX0 */ | |
| 191 | + at91_set_A_periph(AT91_PIN_PA22, 0); /* ETX1 */ | |
| 192 | + at91_set_A_periph(AT91_PIN_PA13, 0); /* EMDIO */ | |
| 193 | + at91_set_A_periph(AT91_PIN_PA14, 0); /* EMDC */ | |
| 194 | + | |
| 195 | + eth_data = *data; | |
| 196 | + platform_device_register(&at572d940hf_eth_device); | |
| 197 | +} | |
| 198 | +#else | |
| 199 | +void __init at91_add_device_eth(struct at91_eth_data *data) {} | |
| 200 | +#endif | |
| 201 | + | |
| 202 | + | |
| 203 | +/* -------------------------------------------------------------------- | |
| 204 | + * MMC / SD | |
| 205 | + * -------------------------------------------------------------------- */ | |
| 206 | + | |
| 207 | +#if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE) | |
| 208 | +static u64 mmc_dmamask = DMA_BIT_MASK(32); | |
| 209 | +static struct at91_mmc_data mmc_data; | |
| 210 | + | |
| 211 | +static struct resource mmc_resources[] = { | |
| 212 | + [0] = { | |
| 213 | + .start = AT572D940HF_BASE_MCI, | |
| 214 | + .end = AT572D940HF_BASE_MCI + SZ_16K - 1, | |
| 215 | + .flags = IORESOURCE_MEM, | |
| 216 | + }, | |
| 217 | + [1] = { | |
| 218 | + .start = AT572D940HF_ID_MCI, | |
| 219 | + .end = AT572D940HF_ID_MCI, | |
| 220 | + .flags = IORESOURCE_IRQ, | |
| 221 | + }, | |
| 222 | +}; | |
| 223 | + | |
| 224 | +static struct platform_device at572d940hf_mmc_device = { | |
| 225 | + .name = "at91_mci", | |
| 226 | + .id = -1, | |
| 227 | + .dev = { | |
| 228 | + .dma_mask = &mmc_dmamask, | |
| 229 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 230 | + .platform_data = &mmc_data, | |
| 231 | + }, | |
| 232 | + .resource = mmc_resources, | |
| 233 | + .num_resources = ARRAY_SIZE(mmc_resources), | |
| 234 | +}; | |
| 235 | + | |
| 236 | +void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) | |
| 237 | +{ | |
| 238 | + if (!data) | |
| 239 | + return; | |
| 240 | + | |
| 241 | + /* input/irq */ | |
| 242 | + if (data->det_pin) { | |
| 243 | + at91_set_gpio_input(data->det_pin, 1); | |
| 244 | + at91_set_deglitch(data->det_pin, 1); | |
| 245 | + } | |
| 246 | + if (data->wp_pin) | |
| 247 | + at91_set_gpio_input(data->wp_pin, 1); | |
| 248 | + if (data->vcc_pin) | |
| 249 | + at91_set_gpio_output(data->vcc_pin, 0); | |
| 250 | + | |
| 251 | + /* CLK */ | |
| 252 | + at91_set_A_periph(AT91_PIN_PC22, 0); | |
| 253 | + | |
| 254 | + /* CMD */ | |
| 255 | + at91_set_A_periph(AT91_PIN_PC23, 1); | |
| 256 | + | |
| 257 | + /* DAT0, maybe DAT1..DAT3 */ | |
| 258 | + at91_set_A_periph(AT91_PIN_PC24, 1); | |
| 259 | + if (data->wire4) { | |
| 260 | + at91_set_A_periph(AT91_PIN_PC25, 1); | |
| 261 | + at91_set_A_periph(AT91_PIN_PC26, 1); | |
| 262 | + at91_set_A_periph(AT91_PIN_PC27, 1); | |
| 263 | + } | |
| 264 | + | |
| 265 | + mmc_data = *data; | |
| 266 | + platform_device_register(&at572d940hf_mmc_device); | |
| 267 | +} | |
| 268 | +#else | |
| 269 | +void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} | |
| 270 | +#endif | |
| 271 | + | |
| 272 | + | |
| 273 | +/* -------------------------------------------------------------------- | |
| 274 | + * NAND / SmartMedia | |
| 275 | + * -------------------------------------------------------------------- */ | |
| 276 | + | |
| 277 | +#if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE) | |
| 278 | +static struct atmel_nand_data nand_data; | |
| 279 | + | |
| 280 | +#define NAND_BASE AT91_CHIPSELECT_3 | |
| 281 | + | |
| 282 | +static struct resource nand_resources[] = { | |
| 283 | + { | |
| 284 | + .start = NAND_BASE, | |
| 285 | + .end = NAND_BASE + SZ_256M - 1, | |
| 286 | + .flags = IORESOURCE_MEM, | |
| 287 | + } | |
| 288 | +}; | |
| 289 | + | |
| 290 | +static struct platform_device at572d940hf_nand_device = { | |
| 291 | + .name = "atmel_nand", | |
| 292 | + .id = -1, | |
| 293 | + .dev = { | |
| 294 | + .platform_data = &nand_data, | |
| 295 | + }, | |
| 296 | + .resource = nand_resources, | |
| 297 | + .num_resources = ARRAY_SIZE(nand_resources), | |
| 298 | +}; | |
| 299 | + | |
| 300 | +void __init at91_add_device_nand(struct atmel_nand_data *data) | |
| 301 | +{ | |
| 302 | + unsigned long csa; | |
| 303 | + | |
| 304 | + if (!data) | |
| 305 | + return; | |
| 306 | + | |
| 307 | + csa = at91_sys_read(AT91_MATRIX_EBICSA); | |
| 308 | + at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); | |
| 309 | + | |
| 310 | + /* enable pin */ | |
| 311 | + if (data->enable_pin) | |
| 312 | + at91_set_gpio_output(data->enable_pin, 1); | |
| 313 | + | |
| 314 | + /* ready/busy pin */ | |
| 315 | + if (data->rdy_pin) | |
| 316 | + at91_set_gpio_input(data->rdy_pin, 1); | |
| 317 | + | |
| 318 | + /* card detect pin */ | |
| 319 | + if (data->det_pin) | |
| 320 | + at91_set_gpio_input(data->det_pin, 1); | |
| 321 | + | |
| 322 | + at91_set_A_periph(AT91_PIN_PB28, 0); /* A[22] */ | |
| 323 | + at91_set_B_periph(AT91_PIN_PA28, 0); /* NANDOE */ | |
| 324 | + at91_set_B_periph(AT91_PIN_PA29, 0); /* NANDWE */ | |
| 325 | + | |
| 326 | + nand_data = *data; | |
| 327 | + platform_device_register(&at572d940hf_nand_device); | |
| 328 | +} | |
| 329 | + | |
| 330 | +#else | |
| 331 | +void __init at91_add_device_nand(struct atmel_nand_data *data) {} | |
| 332 | +#endif | |
| 333 | + | |
| 334 | + | |
| 335 | +/* -------------------------------------------------------------------- | |
| 336 | + * TWI (i2c) | |
| 337 | + * -------------------------------------------------------------------- */ | |
| 338 | + | |
| 339 | +/* | |
| 340 | + * Prefer the GPIO code since the TWI controller isn't robust | |
| 341 | + * (gets overruns and underruns under load) and can only issue | |
| 342 | + * repeated STARTs in one scenario (the driver doesn't yet handle them). | |
| 343 | + */ | |
| 344 | + | |
| 345 | +#if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE) | |
| 346 | + | |
| 347 | +static struct i2c_gpio_platform_data pdata = { | |
| 348 | + .sda_pin = AT91_PIN_PC7, | |
| 349 | + .sda_is_open_drain = 1, | |
| 350 | + .scl_pin = AT91_PIN_PC8, | |
| 351 | + .scl_is_open_drain = 1, | |
| 352 | + .udelay = 2, /* ~100 kHz */ | |
| 353 | +}; | |
| 354 | + | |
| 355 | +static struct platform_device at572d940hf_twi_device { | |
| 356 | + .name = "i2c-gpio", | |
| 357 | + .id = -1, | |
| 358 | + .dev.platform_data = &pdata, | |
| 359 | +}; | |
| 360 | + | |
| 361 | +void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |
| 362 | +{ | |
| 363 | + at91_set_GPIO_periph(AT91_PIN_PC7, 1); /* TWD (SDA) */ | |
| 364 | + at91_set_multi_drive(AT91_PIN_PC7, 1); | |
| 365 | + | |
| 366 | + at91_set_GPIO_periph(AT91_PIN_PA8, 1); /* TWCK (SCL) */ | |
| 367 | + at91_set_multi_drive(AT91_PIN_PC8, 1); | |
| 368 | + | |
| 369 | + i2c_register_board_info(0, devices, nr_devices); | |
| 370 | + platform_device_register(&at572d940hf_twi_device); | |
| 371 | +} | |
| 372 | + | |
| 373 | +#elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE) | |
| 374 | + | |
| 375 | +static struct resource twi0_resources[] = { | |
| 376 | + [0] = { | |
| 377 | + .start = AT572D940HF_BASE_TWI0, | |
| 378 | + .end = AT572D940HF_BASE_TWI0 + SZ_16K - 1, | |
| 379 | + .flags = IORESOURCE_MEM, | |
| 380 | + }, | |
| 381 | + [1] = { | |
| 382 | + .start = AT572D940HF_ID_TWI0, | |
| 383 | + .end = AT572D940HF_ID_TWI0, | |
| 384 | + .flags = IORESOURCE_IRQ, | |
| 385 | + }, | |
| 386 | +}; | |
| 387 | + | |
| 388 | +static struct platform_device at572d940hf_twi0_device = { | |
| 389 | + .name = "at91_i2c", | |
| 390 | + .id = 0, | |
| 391 | + .resource = twi0_resources, | |
| 392 | + .num_resources = ARRAY_SIZE(twi0_resources), | |
| 393 | +}; | |
| 394 | + | |
| 395 | +static struct resource twi1_resources[] = { | |
| 396 | + [0] = { | |
| 397 | + .start = AT572D940HF_BASE_TWI1, | |
| 398 | + .end = AT572D940HF_BASE_TWI1 + SZ_16K - 1, | |
| 399 | + .flags = IORESOURCE_MEM, | |
| 400 | + }, | |
| 401 | + [1] = { | |
| 402 | + .start = AT572D940HF_ID_TWI1, | |
| 403 | + .end = AT572D940HF_ID_TWI1, | |
| 404 | + .flags = IORESOURCE_IRQ, | |
| 405 | + }, | |
| 406 | +}; | |
| 407 | + | |
| 408 | +static struct platform_device at572d940hf_twi1_device = { | |
| 409 | + .name = "at91_i2c", | |
| 410 | + .id = 1, | |
| 411 | + .resource = twi1_resources, | |
| 412 | + .num_resources = ARRAY_SIZE(twi1_resources), | |
| 413 | +}; | |
| 414 | + | |
| 415 | +void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) | |
| 416 | +{ | |
| 417 | + /* pins used for TWI0 interface */ | |
| 418 | + at91_set_A_periph(AT91_PIN_PC7, 0); /* TWD */ | |
| 419 | + at91_set_multi_drive(AT91_PIN_PC7, 1); | |
| 420 | + | |
| 421 | + at91_set_A_periph(AT91_PIN_PC8, 0); /* TWCK */ | |
| 422 | + at91_set_multi_drive(AT91_PIN_PC8, 1); | |
| 423 | + | |
| 424 | + /* pins used for TWI1 interface */ | |
| 425 | + at91_set_A_periph(AT91_PIN_PC20, 0); /* TWD */ | |
| 426 | + at91_set_multi_drive(AT91_PIN_PC20, 1); | |
| 427 | + | |
| 428 | + at91_set_A_periph(AT91_PIN_PC21, 0); /* TWCK */ | |
| 429 | + at91_set_multi_drive(AT91_PIN_PC21, 1); | |
| 430 | + | |
| 431 | + i2c_register_board_info(0, devices, nr_devices); | |
| 432 | + platform_device_register(&at572d940hf_twi0_device); | |
| 433 | + platform_device_register(&at572d940hf_twi1_device); | |
| 434 | +} | |
| 435 | +#else | |
| 436 | +void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {} | |
| 437 | +#endif | |
| 438 | + | |
| 439 | + | |
| 440 | +/* -------------------------------------------------------------------- | |
| 441 | + * SPI | |
| 442 | + * -------------------------------------------------------------------- */ | |
| 443 | + | |
| 444 | +#if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE) | |
| 445 | +static u64 spi_dmamask = DMA_BIT_MASK(32); | |
| 446 | + | |
| 447 | +static struct resource spi0_resources[] = { | |
| 448 | + [0] = { | |
| 449 | + .start = AT572D940HF_BASE_SPI0, | |
| 450 | + .end = AT572D940HF_BASE_SPI0 + SZ_16K - 1, | |
| 451 | + .flags = IORESOURCE_MEM, | |
| 452 | + }, | |
| 453 | + [1] = { | |
| 454 | + .start = AT572D940HF_ID_SPI0, | |
| 455 | + .end = AT572D940HF_ID_SPI0, | |
| 456 | + .flags = IORESOURCE_IRQ, | |
| 457 | + }, | |
| 458 | +}; | |
| 459 | + | |
| 460 | +static struct platform_device at572d940hf_spi0_device = { | |
| 461 | + .name = "atmel_spi", | |
| 462 | + .id = 0, | |
| 463 | + .dev = { | |
| 464 | + .dma_mask = &spi_dmamask, | |
| 465 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 466 | + }, | |
| 467 | + .resource = spi0_resources, | |
| 468 | + .num_resources = ARRAY_SIZE(spi0_resources), | |
| 469 | +}; | |
| 470 | + | |
| 471 | +static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 }; | |
| 472 | + | |
| 473 | +static struct resource spi1_resources[] = { | |
| 474 | + [0] = { | |
| 475 | + .start = AT572D940HF_BASE_SPI1, | |
| 476 | + .end = AT572D940HF_BASE_SPI1 + SZ_16K - 1, | |
| 477 | + .flags = IORESOURCE_MEM, | |
| 478 | + }, | |
| 479 | + [1] = { | |
| 480 | + .start = AT572D940HF_ID_SPI1, | |
| 481 | + .end = AT572D940HF_ID_SPI1, | |
| 482 | + .flags = IORESOURCE_IRQ, | |
| 483 | + }, | |
| 484 | +}; | |
| 485 | + | |
| 486 | +static struct platform_device at572d940hf_spi1_device = { | |
| 487 | + .name = "atmel_spi", | |
| 488 | + .id = 1, | |
| 489 | + .dev = { | |
| 490 | + .dma_mask = &spi_dmamask, | |
| 491 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 492 | + }, | |
| 493 | + .resource = spi1_resources, | |
| 494 | + .num_resources = ARRAY_SIZE(spi1_resources), | |
| 495 | +}; | |
| 496 | + | |
| 497 | +static const unsigned spi1_standard_cs[4] = { AT91_PIN_PC3, AT91_PIN_PC4, AT91_PIN_PC5, AT91_PIN_PC6 }; | |
| 498 | + | |
| 499 | +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) | |
| 500 | +{ | |
| 501 | + int i; | |
| 502 | + unsigned long cs_pin; | |
| 503 | + short enable_spi0 = 0; | |
| 504 | + short enable_spi1 = 0; | |
| 505 | + | |
| 506 | + /* Choose SPI chip-selects */ | |
| 507 | + for (i = 0; i < nr_devices; i++) { | |
| 508 | + if (devices[i].controller_data) | |
| 509 | + cs_pin = (unsigned long) devices[i].controller_data; | |
| 510 | + else if (devices[i].bus_num == 0) | |
| 511 | + cs_pin = spi0_standard_cs[devices[i].chip_select]; | |
| 512 | + else | |
| 513 | + cs_pin = spi1_standard_cs[devices[i].chip_select]; | |
| 514 | + | |
| 515 | + if (devices[i].bus_num == 0) | |
| 516 | + enable_spi0 = 1; | |
| 517 | + else | |
| 518 | + enable_spi1 = 1; | |
| 519 | + | |
| 520 | + /* enable chip-select pin */ | |
| 521 | + at91_set_gpio_output(cs_pin, 1); | |
| 522 | + | |
| 523 | + /* pass chip-select pin to driver */ | |
| 524 | + devices[i].controller_data = (void *) cs_pin; | |
| 525 | + } | |
| 526 | + | |
| 527 | + spi_register_board_info(devices, nr_devices); | |
| 528 | + | |
| 529 | + /* Configure SPI bus(es) */ | |
| 530 | + if (enable_spi0) { | |
| 531 | + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ | |
| 532 | + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ | |
| 533 | + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ | |
| 534 | + | |
| 535 | + at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk"); | |
| 536 | + platform_device_register(&at572d940hf_spi0_device); | |
| 537 | + } | |
| 538 | + if (enable_spi1) { | |
| 539 | + at91_set_A_periph(AT91_PIN_PC0, 0); /* SPI1_MISO */ | |
| 540 | + at91_set_A_periph(AT91_PIN_PC1, 0); /* SPI1_MOSI */ | |
| 541 | + at91_set_A_periph(AT91_PIN_PC2, 0); /* SPI1_SPCK */ | |
| 542 | + | |
| 543 | + at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk"); | |
| 544 | + platform_device_register(&at572d940hf_spi1_device); | |
| 545 | + } | |
| 546 | +} | |
| 547 | +#else | |
| 548 | +void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {} | |
| 549 | +#endif | |
| 550 | + | |
| 551 | + | |
| 552 | +/* -------------------------------------------------------------------- | |
| 553 | + * Timer/Counter blocks | |
| 554 | + * -------------------------------------------------------------------- */ | |
| 555 | + | |
| 556 | +#ifdef CONFIG_ATMEL_TCLIB | |
| 557 | + | |
| 558 | +static struct resource tcb_resources[] = { | |
| 559 | + [0] = { | |
| 560 | + .start = AT572D940HF_BASE_TCB, | |
| 561 | + .end = AT572D940HF_BASE_TCB + SZ_16K - 1, | |
| 562 | + .flags = IORESOURCE_MEM, | |
| 563 | + }, | |
| 564 | + [1] = { | |
| 565 | + .start = AT572D940HF_ID_TC0, | |
| 566 | + .end = AT572D940HF_ID_TC0, | |
| 567 | + .flags = IORESOURCE_IRQ, | |
| 568 | + }, | |
| 569 | + [2] = { | |
| 570 | + .start = AT572D940HF_ID_TC1, | |
| 571 | + .end = AT572D940HF_ID_TC1, | |
| 572 | + .flags = IORESOURCE_IRQ, | |
| 573 | + }, | |
| 574 | + [3] = { | |
| 575 | + .start = AT572D940HF_ID_TC2, | |
| 576 | + .end = AT572D940HF_ID_TC2, | |
| 577 | + .flags = IORESOURCE_IRQ, | |
| 578 | + }, | |
| 579 | +}; | |
| 580 | + | |
| 581 | +static struct platform_device at572d940hf_tcb_device = { | |
| 582 | + .name = "atmel_tcb", | |
| 583 | + .id = 0, | |
| 584 | + .resource = tcb_resources, | |
| 585 | + .num_resources = ARRAY_SIZE(tcb_resources), | |
| 586 | +}; | |
| 587 | + | |
| 588 | +static void __init at91_add_device_tc(void) | |
| 589 | +{ | |
| 590 | + /* this chip has a separate clock and irq for each TC channel */ | |
| 591 | + at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk"); | |
| 592 | + at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk"); | |
| 593 | + at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk"); | |
| 594 | + platform_device_register(&at572d940hf_tcb_device); | |
| 595 | +} | |
| 596 | +#else | |
| 597 | +static void __init at91_add_device_tc(void) { } | |
| 598 | +#endif | |
| 599 | + | |
| 600 | + | |
| 601 | +/* -------------------------------------------------------------------- | |
| 602 | + * RTT | |
| 603 | + * -------------------------------------------------------------------- */ | |
| 604 | + | |
| 605 | +static struct resource rtt_resources[] = { | |
| 606 | + { | |
| 607 | + .start = AT91_BASE_SYS + AT91_RTT, | |
| 608 | + .end = AT91_BASE_SYS + AT91_RTT + SZ_16 - 1, | |
| 609 | + .flags = IORESOURCE_MEM, | |
| 610 | + } | |
| 611 | +}; | |
| 612 | + | |
| 613 | +static struct platform_device at572d940hf_rtt_device = { | |
| 614 | + .name = "at91_rtt", | |
| 615 | + .id = 0, | |
| 616 | + .resource = rtt_resources, | |
| 617 | + .num_resources = ARRAY_SIZE(rtt_resources), | |
| 618 | +}; | |
| 619 | + | |
| 620 | +static void __init at91_add_device_rtt(void) | |
| 621 | +{ | |
| 622 | + platform_device_register(&at572d940hf_rtt_device); | |
| 623 | +} | |
| 624 | + | |
| 625 | + | |
| 626 | +/* -------------------------------------------------------------------- | |
| 627 | + * Watchdog | |
| 628 | + * -------------------------------------------------------------------- */ | |
| 629 | + | |
| 630 | +#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) | |
| 631 | +static struct platform_device at572d940hf_wdt_device = { | |
| 632 | + .name = "at91_wdt", | |
| 633 | + .id = -1, | |
| 634 | + .num_resources = 0, | |
| 635 | +}; | |
| 636 | + | |
| 637 | +static void __init at91_add_device_watchdog(void) | |
| 638 | +{ | |
| 639 | + platform_device_register(&at572d940hf_wdt_device); | |
| 640 | +} | |
| 641 | +#else | |
| 642 | +static void __init at91_add_device_watchdog(void) {} | |
| 643 | +#endif | |
| 644 | + | |
| 645 | + | |
| 646 | +/* -------------------------------------------------------------------- | |
| 647 | + * UART | |
| 648 | + * -------------------------------------------------------------------- */ | |
| 649 | + | |
| 650 | +#if defined(CONFIG_SERIAL_ATMEL) | |
| 651 | +static struct resource dbgu_resources[] = { | |
| 652 | + [0] = { | |
| 653 | + .start = AT91_VA_BASE_SYS + AT91_DBGU, | |
| 654 | + .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1, | |
| 655 | + .flags = IORESOURCE_MEM, | |
| 656 | + }, | |
| 657 | + [1] = { | |
| 658 | + .start = AT91_ID_SYS, | |
| 659 | + .end = AT91_ID_SYS, | |
| 660 | + .flags = IORESOURCE_IRQ, | |
| 661 | + }, | |
| 662 | +}; | |
| 663 | + | |
| 664 | +static struct atmel_uart_data dbgu_data = { | |
| 665 | + .use_dma_tx = 0, | |
| 666 | + .use_dma_rx = 0, /* DBGU not capable of receive DMA */ | |
| 667 | + .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU), | |
| 668 | +}; | |
| 669 | + | |
| 670 | +static u64 dbgu_dmamask = DMA_BIT_MASK(32); | |
| 671 | + | |
| 672 | +static struct platform_device at572d940hf_dbgu_device = { | |
| 673 | + .name = "atmel_usart", | |
| 674 | + .id = 0, | |
| 675 | + .dev = { | |
| 676 | + .dma_mask = &dbgu_dmamask, | |
| 677 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 678 | + .platform_data = &dbgu_data, | |
| 679 | + }, | |
| 680 | + .resource = dbgu_resources, | |
| 681 | + .num_resources = ARRAY_SIZE(dbgu_resources), | |
| 682 | +}; | |
| 683 | + | |
| 684 | +static inline void configure_dbgu_pins(void) | |
| 685 | +{ | |
| 686 | + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ | |
| 687 | + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ | |
| 688 | +} | |
| 689 | + | |
| 690 | +static struct resource uart0_resources[] = { | |
| 691 | + [0] = { | |
| 692 | + .start = AT572D940HF_BASE_US0, | |
| 693 | + .end = AT572D940HF_BASE_US0 + SZ_16K - 1, | |
| 694 | + .flags = IORESOURCE_MEM, | |
| 695 | + }, | |
| 696 | + [1] = { | |
| 697 | + .start = AT572D940HF_ID_US0, | |
| 698 | + .end = AT572D940HF_ID_US0, | |
| 699 | + .flags = IORESOURCE_IRQ, | |
| 700 | + }, | |
| 701 | +}; | |
| 702 | + | |
| 703 | +static struct atmel_uart_data uart0_data = { | |
| 704 | + .use_dma_tx = 1, | |
| 705 | + .use_dma_rx = 1, | |
| 706 | +}; | |
| 707 | + | |
| 708 | +static u64 uart0_dmamask = DMA_BIT_MASK(32); | |
| 709 | + | |
| 710 | +static struct platform_device at572d940hf_uart0_device = { | |
| 711 | + .name = "atmel_usart", | |
| 712 | + .id = 1, | |
| 713 | + .dev = { | |
| 714 | + .dma_mask = &uart0_dmamask, | |
| 715 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 716 | + .platform_data = &uart0_data, | |
| 717 | + }, | |
| 718 | + .resource = uart0_resources, | |
| 719 | + .num_resources = ARRAY_SIZE(uart0_resources), | |
| 720 | +}; | |
| 721 | + | |
| 722 | +static inline void configure_usart0_pins(unsigned pins) | |
| 723 | +{ | |
| 724 | + at91_set_A_periph(AT91_PIN_PA8, 1); /* TXD0 */ | |
| 725 | + at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ | |
| 726 | + | |
| 727 | + if (pins & ATMEL_UART_RTS) | |
| 728 | + at91_set_A_periph(AT91_PIN_PA10, 0); /* RTS0 */ | |
| 729 | + if (pins & ATMEL_UART_CTS) | |
| 730 | + at91_set_A_periph(AT91_PIN_PA9, 0); /* CTS0 */ | |
| 731 | +} | |
| 732 | + | |
| 733 | +static struct resource uart1_resources[] = { | |
| 734 | + [0] = { | |
| 735 | + .start = AT572D940HF_BASE_US1, | |
| 736 | + .end = AT572D940HF_BASE_US1 + SZ_16K - 1, | |
| 737 | + .flags = IORESOURCE_MEM, | |
| 738 | + }, | |
| 739 | + [1] = { | |
| 740 | + .start = AT572D940HF_ID_US1, | |
| 741 | + .end = AT572D940HF_ID_US1, | |
| 742 | + .flags = IORESOURCE_IRQ, | |
| 743 | + }, | |
| 744 | +}; | |
| 745 | + | |
| 746 | +static struct atmel_uart_data uart1_data = { | |
| 747 | + .use_dma_tx = 1, | |
| 748 | + .use_dma_rx = 1, | |
| 749 | +}; | |
| 750 | + | |
| 751 | +static u64 uart1_dmamask = DMA_BIT_MASK(32); | |
| 752 | + | |
| 753 | +static struct platform_device at572d940hf_uart1_device = { | |
| 754 | + .name = "atmel_usart", | |
| 755 | + .id = 2, | |
| 756 | + .dev = { | |
| 757 | + .dma_mask = &uart1_dmamask, | |
| 758 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 759 | + .platform_data = &uart1_data, | |
| 760 | + }, | |
| 761 | + .resource = uart1_resources, | |
| 762 | + .num_resources = ARRAY_SIZE(uart1_resources), | |
| 763 | +}; | |
| 764 | + | |
| 765 | +static inline void configure_usart1_pins(unsigned pins) | |
| 766 | +{ | |
| 767 | + at91_set_A_periph(AT91_PIN_PC10, 1); /* TXD1 */ | |
| 768 | + at91_set_A_periph(AT91_PIN_PC9 , 0); /* RXD1 */ | |
| 769 | + | |
| 770 | + if (pins & ATMEL_UART_RTS) | |
| 771 | + at91_set_A_periph(AT91_PIN_PC12, 0); /* RTS1 */ | |
| 772 | + if (pins & ATMEL_UART_CTS) | |
| 773 | + at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS1 */ | |
| 774 | +} | |
| 775 | + | |
| 776 | +static struct resource uart2_resources[] = { | |
| 777 | + [0] = { | |
| 778 | + .start = AT572D940HF_BASE_US2, | |
| 779 | + .end = AT572D940HF_BASE_US2 + SZ_16K - 1, | |
| 780 | + .flags = IORESOURCE_MEM, | |
| 781 | + }, | |
| 782 | + [1] = { | |
| 783 | + .start = AT572D940HF_ID_US2, | |
| 784 | + .end = AT572D940HF_ID_US2, | |
| 785 | + .flags = IORESOURCE_IRQ, | |
| 786 | + }, | |
| 787 | +}; | |
| 788 | + | |
| 789 | +static struct atmel_uart_data uart2_data = { | |
| 790 | + .use_dma_tx = 1, | |
| 791 | + .use_dma_rx = 1, | |
| 792 | +}; | |
| 793 | + | |
| 794 | +static u64 uart2_dmamask = DMA_BIT_MASK(32); | |
| 795 | + | |
| 796 | +static struct platform_device at572d940hf_uart2_device = { | |
| 797 | + .name = "atmel_usart", | |
| 798 | + .id = 3, | |
| 799 | + .dev = { | |
| 800 | + .dma_mask = &uart2_dmamask, | |
| 801 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 802 | + .platform_data = &uart2_data, | |
| 803 | + }, | |
| 804 | + .resource = uart2_resources, | |
| 805 | + .num_resources = ARRAY_SIZE(uart2_resources), | |
| 806 | +}; | |
| 807 | + | |
| 808 | +static inline void configure_usart2_pins(unsigned pins) | |
| 809 | +{ | |
| 810 | + at91_set_A_periph(AT91_PIN_PC15, 1); /* TXD2 */ | |
| 811 | + at91_set_A_periph(AT91_PIN_PC14, 0); /* RXD2 */ | |
| 812 | + | |
| 813 | + if (pins & ATMEL_UART_RTS) | |
| 814 | + at91_set_A_periph(AT91_PIN_PC17, 0); /* RTS2 */ | |
| 815 | + if (pins & ATMEL_UART_CTS) | |
| 816 | + at91_set_A_periph(AT91_PIN_PC16, 0); /* CTS2 */ | |
| 817 | +} | |
| 818 | + | |
| 819 | +static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ | |
| 820 | +struct platform_device *atmel_default_console_device; /* the serial console device */ | |
| 821 | + | |
| 822 | +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) | |
| 823 | +{ | |
| 824 | + struct platform_device *pdev; | |
| 825 | + | |
| 826 | + switch (id) { | |
| 827 | + case 0: /* DBGU */ | |
| 828 | + pdev = &at572d940hf_dbgu_device; | |
| 829 | + configure_dbgu_pins(); | |
| 830 | + at91_clock_associate("mck", &pdev->dev, "usart"); | |
| 831 | + break; | |
| 832 | + case AT572D940HF_ID_US0: | |
| 833 | + pdev = &at572d940hf_uart0_device; | |
| 834 | + configure_usart0_pins(pins); | |
| 835 | + at91_clock_associate("usart0_clk", &pdev->dev, "usart"); | |
| 836 | + break; | |
| 837 | + case AT572D940HF_ID_US1: | |
| 838 | + pdev = &at572d940hf_uart1_device; | |
| 839 | + configure_usart1_pins(pins); | |
| 840 | + at91_clock_associate("usart1_clk", &pdev->dev, "usart"); | |
| 841 | + break; | |
| 842 | + case AT572D940HF_ID_US2: | |
| 843 | + pdev = &at572d940hf_uart2_device; | |
| 844 | + configure_usart2_pins(pins); | |
| 845 | + at91_clock_associate("usart2_clk", &pdev->dev, "usart"); | |
| 846 | + break; | |
| 847 | + default: | |
| 848 | + return; | |
| 849 | + } | |
| 850 | + pdev->id = portnr; /* update to mapped ID */ | |
| 851 | + | |
| 852 | + if (portnr < ATMEL_MAX_UART) | |
| 853 | + at91_uarts[portnr] = pdev; | |
| 854 | +} | |
| 855 | + | |
| 856 | +void __init at91_set_serial_console(unsigned portnr) | |
| 857 | +{ | |
| 858 | + if (portnr < ATMEL_MAX_UART) | |
| 859 | + atmel_default_console_device = at91_uarts[portnr]; | |
| 860 | +} | |
| 861 | + | |
| 862 | +void __init at91_add_device_serial(void) | |
| 863 | +{ | |
| 864 | + int i; | |
| 865 | + | |
| 866 | + for (i = 0; i < ATMEL_MAX_UART; i++) { | |
| 867 | + if (at91_uarts[i]) | |
| 868 | + platform_device_register(at91_uarts[i]); | |
| 869 | + } | |
| 870 | + | |
| 871 | + if (!atmel_default_console_device) | |
| 872 | + printk(KERN_INFO "AT91: No default serial console defined.\n"); | |
| 873 | +} | |
| 874 | + | |
| 875 | +#else | |
| 876 | +void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {} | |
| 877 | +void __init at91_set_serial_console(unsigned portnr) {} | |
| 878 | +void __init at91_add_device_serial(void) {} | |
| 879 | +#endif | |
| 880 | + | |
| 881 | + | |
| 882 | +/* -------------------------------------------------------------------- | |
| 883 | + * mAgic | |
| 884 | + * -------------------------------------------------------------------- */ | |
| 885 | + | |
| 886 | +#ifdef CONFIG_MAGICV | |
| 887 | +static struct resource mAgic_resources[] = { | |
| 888 | + { | |
| 889 | + .start = AT91_MAGIC_PM_BASE, | |
| 890 | + .end = AT91_MAGIC_PM_BASE + AT91_MAGIC_PM_SIZE - 1, | |
| 891 | + .flags = IORESOURCE_MEM, | |
| 892 | + }, | |
| 893 | + { | |
| 894 | + .start = AT91_MAGIC_DM_I_BASE, | |
| 895 | + .end = AT91_MAGIC_DM_I_BASE + AT91_MAGIC_DM_I_SIZE - 1, | |
| 896 | + .flags = IORESOURCE_MEM, | |
| 897 | + }, | |
| 898 | + { | |
| 899 | + .start = AT91_MAGIC_DM_F_BASE, | |
| 900 | + .end = AT91_MAGIC_DM_F_BASE + AT91_MAGIC_DM_F_SIZE - 1, | |
| 901 | + .flags = IORESOURCE_MEM, | |
| 902 | + }, | |
| 903 | + { | |
| 904 | + .start = AT91_MAGIC_DM_DB_BASE, | |
| 905 | + .end = AT91_MAGIC_DM_DB_BASE + AT91_MAGIC_DM_DB_SIZE - 1, | |
| 906 | + .flags = IORESOURCE_MEM, | |
| 907 | + }, | |
| 908 | + { | |
| 909 | + .start = AT91_MAGIC_REGS_BASE, | |
| 910 | + .end = AT91_MAGIC_REGS_BASE + AT91_MAGIC_REGS_SIZE - 1, | |
| 911 | + .flags = IORESOURCE_MEM, | |
| 912 | + }, | |
| 913 | + { | |
| 914 | + .start = AT91_MAGIC_EXTPAGE_BASE, | |
| 915 | + .end = AT91_MAGIC_EXTPAGE_BASE + AT91_MAGIC_EXTPAGE_SIZE - 1, | |
| 916 | + .flags = IORESOURCE_MEM, | |
| 917 | + }, | |
| 918 | + { | |
| 919 | + .start = AT572D940HF_ID_MSIRQ0, | |
| 920 | + .end = AT572D940HF_ID_MSIRQ0, | |
| 921 | + .flags = IORESOURCE_IRQ, | |
| 922 | + }, | |
| 923 | + { | |
| 924 | + .start = AT572D940HF_ID_MHALT, | |
| 925 | + .end = AT572D940HF_ID_MHALT, | |
| 926 | + .flags = IORESOURCE_IRQ, | |
| 927 | + }, | |
| 928 | + { | |
| 929 | + .start = AT572D940HF_ID_MEXC, | |
| 930 | + .end = AT572D940HF_ID_MEXC, | |
| 931 | + .flags = IORESOURCE_IRQ, | |
| 932 | + }, | |
| 933 | + { | |
| 934 | + .start = AT572D940HF_ID_MEDMA, | |
| 935 | + .end = AT572D940HF_ID_MEDMA, | |
| 936 | + .flags = IORESOURCE_IRQ, | |
| 937 | + }, | |
| 938 | +}; | |
| 939 | + | |
| 940 | +static struct platform_device mAgic_device = { | |
| 941 | + .name = "mAgic", | |
| 942 | + .id = -1, | |
| 943 | + .num_resources = ARRAY_SIZE(mAgic_resources), | |
| 944 | + .resource = mAgic_resources, | |
| 945 | +}; | |
| 946 | + | |
| 947 | +void __init at91_add_device_mAgic(void) | |
| 948 | +{ | |
| 949 | + platform_device_register(&mAgic_device); | |
| 950 | +} | |
| 951 | +#else | |
| 952 | +void __init at91_add_device_mAgic(void) {} | |
| 953 | +#endif | |
| 954 | + | |
| 955 | + | |
| 956 | +/* -------------------------------------------------------------------- */ | |
| 957 | + | |
| 958 | +/* | |
| 959 | + * These devices are always present and don't need any board-specific | |
| 960 | + * setup. | |
| 961 | + */ | |
| 962 | +static int __init at91_add_standard_devices(void) | |
| 963 | +{ | |
| 964 | + at91_add_device_rtt(); | |
| 965 | + at91_add_device_watchdog(); | |
| 966 | + at91_add_device_tc(); | |
| 967 | + return 0; | |
| 968 | +} | |
| 969 | + | |
| 970 | +arch_initcall(at91_add_standard_devices); | |
| @@ -0,0 +1,328 @@ | ||
| 1 | +/* | |
| 2 | + * linux/arch/arm/mach-at91/board-at572d940hf_ek.c | |
| 3 | + * | |
| 4 | + * Copyright (C) 2008 Atmel Antonio R. Costa <costa.antonior@gmail.com> | |
| 5 | + * Copyright (C) 2005 SAN People | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or modify | |
| 8 | + * it under the terms of the GNU General Public License as published by | |
| 9 | + * the Free Software Foundation; either version 2 of the License, or | |
| 10 | + * (at your option) any later version. | |
| 11 | + * | |
| 12 | + * This program is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | + * GNU General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU General Public License | |
| 18 | + * along with this program; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | + */ | |
| 21 | + | |
| 22 | +#include <linux/types.h> | |
| 23 | +#include <linux/init.h> | |
| 24 | +#include <linux/mm.h> | |
| 25 | +#include <linux/module.h> | |
| 26 | +#include <linux/platform_device.h> | |
| 27 | +#include <linux/spi/spi.h> | |
| 28 | +#include <linux/spi/ds1305.h> | |
| 29 | +#include <linux/irq.h> | |
| 30 | +#include <linux/mtd/physmap.h> | |
| 31 | + | |
| 32 | +#include <mach/hardware.h> | |
| 33 | +#include <asm/setup.h> | |
| 34 | +#include <asm/mach-types.h> | |
| 35 | +#include <asm/irq.h> | |
| 36 | + | |
| 37 | +#include <asm/mach/arch.h> | |
| 38 | +#include <asm/mach/map.h> | |
| 39 | +#include <asm/mach/irq.h> | |
| 40 | + | |
| 41 | +#include <mach/board.h> | |
| 42 | +#include <mach/gpio.h> | |
| 43 | +#include <mach/at91sam9_smc.h> | |
| 44 | + | |
| 45 | +#include "sam9_smc.h" | |
| 46 | +#include "generic.h" | |
| 47 | + | |
| 48 | + | |
| 49 | +static void __init eb_map_io(void) | |
| 50 | +{ | |
| 51 | + /* Initialize processor: 12.500 MHz crystal */ | |
| 52 | + at572d940hf_initialize(12000000); | |
| 53 | + | |
| 54 | + /* DBGU on ttyS0. (Rx & Tx only) */ | |
| 55 | + at91_register_uart(0, 0, 0); | |
| 56 | + | |
| 57 | + /* USART0 on ttyS1. (Rx & Tx only) */ | |
| 58 | + at91_register_uart(AT572D940HF_ID_US0, 1, 0); | |
| 59 | + | |
| 60 | + /* USART1 on ttyS2. (Rx & Tx only) */ | |
| 61 | + at91_register_uart(AT572D940HF_ID_US1, 2, 0); | |
| 62 | + | |
| 63 | + /* USART2 on ttyS3. (Tx & Rx only */ | |
| 64 | + at91_register_uart(AT572D940HF_ID_US2, 3, 0); | |
| 65 | + | |
| 66 | + /* set serial console to ttyS0 (ie, DBGU) */ | |
| 67 | + at91_set_serial_console(0); | |
| 68 | +} | |
| 69 | + | |
| 70 | +static void __init eb_init_irq(void) | |
| 71 | +{ | |
| 72 | + at572d940hf_init_interrupts(NULL); | |
| 73 | +} | |
| 74 | + | |
| 75 | + | |
| 76 | +/* | |
| 77 | + * USB Host Port | |
| 78 | + */ | |
| 79 | +static struct at91_usbh_data __initdata eb_usbh_data = { | |
| 80 | + .ports = 2, | |
| 81 | +}; | |
| 82 | + | |
| 83 | + | |
| 84 | +/* | |
| 85 | + * USB Device Port | |
| 86 | + */ | |
| 87 | +static struct at91_udc_data __initdata eb_udc_data = { | |
| 88 | + .vbus_pin = 0, /* no VBUS detection,UDC always on */ | |
| 89 | + .pullup_pin = 0, /* pull-up driven by UDC */ | |
| 90 | +}; | |
| 91 | + | |
| 92 | + | |
| 93 | +/* | |
| 94 | + * MCI (SD/MMC) | |
| 95 | + */ | |
| 96 | +static struct at91_mmc_data __initdata eb_mmc_data = { | |
| 97 | + .wire4 = 1, | |
| 98 | +/* .det_pin = ... not connected */ | |
| 99 | +/* .wp_pin = ... not connected */ | |
| 100 | +/* .vcc_pin = ... not connected */ | |
| 101 | +}; | |
| 102 | + | |
| 103 | + | |
| 104 | +/* | |
| 105 | + * MACB Ethernet device | |
| 106 | + */ | |
| 107 | +static struct at91_eth_data __initdata eb_eth_data = { | |
| 108 | + .phy_irq_pin = AT91_PIN_PB25, | |
| 109 | + .is_rmii = 1, | |
| 110 | +}; | |
| 111 | + | |
| 112 | +/* | |
| 113 | + * NOR flash | |
| 114 | + */ | |
| 115 | + | |
| 116 | +static struct mtd_partition eb_nor_partitions[] = { | |
| 117 | + { | |
| 118 | + .name = "Raw Environment", | |
| 119 | + .offset = 0, | |
| 120 | + .size = SZ_4M, | |
| 121 | + .mask_flags = 0, | |
| 122 | + }, | |
| 123 | + { | |
| 124 | + .name = "OS FS", | |
| 125 | + .offset = MTDPART_OFS_APPEND, | |
| 126 | + .size = 3 * SZ_1M, | |
| 127 | + .mask_flags = 0, | |
| 128 | + }, | |
| 129 | + { | |
| 130 | + .name = "APP FS", | |
| 131 | + .offset = MTDPART_OFS_APPEND, | |
| 132 | + .size = MTDPART_SIZ_FULL, | |
| 133 | + .mask_flags = 0, | |
| 134 | + }, | |
| 135 | +}; | |
| 136 | + | |
| 137 | +static void nor_flash_set_vpp(struct map_info* mi, int i) { | |
| 138 | +}; | |
| 139 | + | |
| 140 | +static struct physmap_flash_data nor_flash_data = { | |
| 141 | + .width = 4, | |
| 142 | + .parts = eb_nor_partitions, | |
| 143 | + .nr_parts = ARRAY_SIZE(eb_nor_partitions), | |
| 144 | + .set_vpp = nor_flash_set_vpp, | |
| 145 | +}; | |
| 146 | + | |
| 147 | +static struct resource nor_flash_resources[] = { | |
| 148 | + { | |
| 149 | + .start = AT91_CHIPSELECT_0, | |
| 150 | + .end = AT91_CHIPSELECT_0 + SZ_16M - 1, | |
| 151 | + .flags = IORESOURCE_MEM, | |
| 152 | + }, | |
| 153 | +}; | |
| 154 | + | |
| 155 | +static struct platform_device nor_flash = { | |
| 156 | + .name = "physmap-flash", | |
| 157 | + .id = 0, | |
| 158 | + .dev = { | |
| 159 | + .platform_data = &nor_flash_data, | |
| 160 | + }, | |
| 161 | + .resource = nor_flash_resources, | |
| 162 | + .num_resources = ARRAY_SIZE(nor_flash_resources), | |
| 163 | +}; | |
| 164 | + | |
| 165 | +static struct sam9_smc_config __initdata eb_nor_smc_config = { | |
| 166 | + .ncs_read_setup = 1, | |
| 167 | + .nrd_setup = 1, | |
| 168 | + .ncs_write_setup = 1, | |
| 169 | + .nwe_setup = 1, | |
| 170 | + | |
| 171 | + .ncs_read_pulse = 7, | |
| 172 | + .nrd_pulse = 7, | |
| 173 | + .ncs_write_pulse = 7, | |
| 174 | + .nwe_pulse = 7, | |
| 175 | + | |
| 176 | + .read_cycle = 9, | |
| 177 | + .write_cycle = 9, | |
| 178 | + | |
| 179 | + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | AT91_SMC_DBW_32, | |
| 180 | + .tdf_cycles = 1, | |
| 181 | +}; | |
| 182 | + | |
| 183 | +static void __init eb_add_device_nor(void) | |
| 184 | +{ | |
| 185 | + /* configure chip-select 0 (NOR) */ | |
| 186 | + sam9_smc_configure(0, &eb_nor_smc_config); | |
| 187 | + platform_device_register(&nor_flash); | |
| 188 | +} | |
| 189 | + | |
| 190 | +/* | |
| 191 | + * NAND flash | |
| 192 | + */ | |
| 193 | +static struct mtd_partition __initdata eb_nand_partition[] = { | |
| 194 | + { | |
| 195 | + .name = "Partition 1", | |
| 196 | + .offset = 0, | |
| 197 | + .size = SZ_16M, | |
| 198 | + }, | |
| 199 | + { | |
| 200 | + .name = "Partition 2", | |
| 201 | + .offset = MTDPART_OFS_NXTBLK, | |
| 202 | + .size = MTDPART_SIZ_FULL, | |
| 203 | + } | |
| 204 | +}; | |
| 205 | + | |
| 206 | +static struct mtd_partition * __init nand_partitions(int size, int *num_partitions) | |
| 207 | +{ | |
| 208 | + *num_partitions = ARRAY_SIZE(eb_nand_partition); | |
| 209 | + return eb_nand_partition; | |
| 210 | +} | |
| 211 | + | |
| 212 | +static struct atmel_nand_data __initdata eb_nand_data = { | |
| 213 | + .ale = 22, | |
| 214 | + .cle = 21, | |
| 215 | +/* .det_pin = ... not connected */ | |
| 216 | +/* .rdy_pin = AT91_PIN_PC16, */ | |
| 217 | + .enable_pin = AT91_PIN_PA15, | |
| 218 | + .partition_info = nand_partitions, | |
| 219 | +#if defined(CONFIG_MTD_NAND_AT91_BUSWIDTH_16) | |
| 220 | + .bus_width_16 = 1, | |
| 221 | +#else | |
| 222 | + .bus_width_16 = 0, | |
| 223 | +#endif | |
| 224 | +}; | |
| 225 | + | |
| 226 | +static struct sam9_smc_config __initdata eb_nand_smc_config = { | |
| 227 | + .ncs_read_setup = 0, | |
| 228 | + .nrd_setup = 0, | |
| 229 | + .ncs_write_setup = 1, | |
| 230 | + .nwe_setup = 1, | |
| 231 | + | |
| 232 | + .ncs_read_pulse = 3, | |
| 233 | + .nrd_pulse = 3, | |
| 234 | + .ncs_write_pulse = 3, | |
| 235 | + .nwe_pulse = 3, | |
| 236 | + | |
| 237 | + .read_cycle = 5, | |
| 238 | + .write_cycle = 5, | |
| 239 | + | |
| 240 | + .mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE, | |
| 241 | + .tdf_cycles = 12, | |
| 242 | +}; | |
| 243 | + | |
| 244 | +static void __init eb_add_device_nand(void) | |
| 245 | +{ | |
| 246 | + /* setup bus-width (8 or 16) */ | |
| 247 | + if (eb_nand_data.bus_width_16) | |
| 248 | + eb_nand_smc_config.mode |= AT91_SMC_DBW_16; | |
| 249 | + else | |
| 250 | + eb_nand_smc_config.mode |= AT91_SMC_DBW_8; | |
| 251 | + | |
| 252 | + /* configure chip-select 3 (NAND) */ | |
| 253 | + sam9_smc_configure(3, &eb_nand_smc_config); | |
| 254 | + | |
| 255 | + at91_add_device_nand(&eb_nand_data); | |
| 256 | +} | |
| 257 | + | |
| 258 | + | |
| 259 | +/* | |
| 260 | + * SPI devices | |
| 261 | + */ | |
| 262 | +static struct resource rtc_resources[] = { | |
| 263 | + [0] = { | |
| 264 | + .start = AT572D940HF_ID_IRQ1, | |
| 265 | + .end = AT572D940HF_ID_IRQ1, | |
| 266 | + .flags = IORESOURCE_IRQ, | |
| 267 | + }, | |
| 268 | +}; | |
| 269 | + | |
| 270 | +static struct ds1305_platform_data ds1306_data = { | |
| 271 | + .is_ds1306 = true, | |
| 272 | + .en_1hz = false, | |
| 273 | +}; | |
| 274 | + | |
| 275 | +static struct spi_board_info eb_spi_devices[] = { | |
| 276 | + { /* RTC Dallas DS1306 */ | |
| 277 | + .modalias = "rtc-ds1305", | |
| 278 | + .chip_select = 3, | |
| 279 | + .mode = SPI_CS_HIGH | SPI_CPOL | SPI_CPHA, | |
| 280 | + .max_speed_hz = 500000, | |
| 281 | + .bus_num = 0, | |
| 282 | + .irq = AT572D940HF_ID_IRQ1, | |
| 283 | + .platform_data = (void *) &ds1306_data, | |
| 284 | + }, | |
| 285 | +#if defined(CONFIG_MTD_AT91_DATAFLASH_CARD) | |
| 286 | + { /* Dataflash card */ | |
| 287 | + .modalias = "mtd_dataflash", | |
| 288 | + .chip_select = 0, | |
| 289 | + .max_speed_hz = 15 * 1000 * 1000, | |
| 290 | + .bus_num = 0, | |
| 291 | + }, | |
| 292 | +#endif | |
| 293 | +}; | |
| 294 | + | |
| 295 | +static void __init eb_board_init(void) | |
| 296 | +{ | |
| 297 | + /* Serial */ | |
| 298 | + at91_add_device_serial(); | |
| 299 | + /* USB Host */ | |
| 300 | + at91_add_device_usbh(&eb_usbh_data); | |
| 301 | + /* USB Device */ | |
| 302 | + at91_add_device_udc(&eb_udc_data); | |
| 303 | + /* I2C */ | |
| 304 | + at91_add_device_i2c(NULL, 0); | |
| 305 | + /* NOR */ | |
| 306 | + eb_add_device_nor(); | |
| 307 | + /* NAND */ | |
| 308 | + eb_add_device_nand(); | |
| 309 | + /* SPI */ | |
| 310 | + at91_add_device_spi(eb_spi_devices, ARRAY_SIZE(eb_spi_devices)); | |
| 311 | + /* MMC */ | |
| 312 | + at91_add_device_mmc(0, &eb_mmc_data); | |
| 313 | + /* Ethernet */ | |
| 314 | + at91_add_device_eth(&eb_eth_data); | |
| 315 | + /* mAgic */ | |
| 316 | + at91_add_device_mAgic(); | |
| 317 | +} | |
| 318 | + | |
| 319 | +MACHINE_START(AT572D940HFEB, "Atmel AT91D940HF-EB") | |
| 320 | + /* Maintainer: Atmel <costa.antonior@gmail.com> */ | |
| 321 | + .phys_io = AT91_BASE_SYS, | |
| 322 | + .io_pg_offst = (AT91_VA_BASE_SYS >> 18) & 0xfffc, | |
| 323 | + .boot_params = AT91_SDRAM_BASE + 0x100, | |
| 324 | + .timer = &at91sam926x_timer, | |
| 325 | + .map_io = eb_map_io, | |
| 326 | + .init_irq = eb_init_irq, | |
| 327 | + .init_machine = eb_board_init, | |
| 328 | +MACHINE_END | |
| @@ -29,6 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | #include <mach/cpu.h> |
| 30 | 30 | |
| 31 | 31 | #include "clock.h" |
| 32 | +#include "generic.h" | |
| 32 | 33 | |
| 33 | 34 | |
| 34 | 35 | /* |
| @@ -628,7 +629,7 @@ static void __init at91_pllb_usbfs_clock_init(unsigned long main_clock) · 593 unmodified lines | ||
| 628 | 629 | at91_sys_write(AT91_PMC_SCER, AT91RM9200_PMC_MCKUDP); |
| 629 | 630 | } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || |
| 630 | 631 | cpu_is_at91sam9263() || cpu_is_at91sam9g20() || |
| 631 | − cpu_is_at91sam9g10()) { | |
| 632 | + cpu_is_at91sam9g10() || cpu_is_at572d940hf()) { | |
| 632 | 633 | uhpck.pmc_mask = AT91SAM926x_PMC_UHP; |
| 633 | 634 | udpck.pmc_mask = AT91SAM926x_PMC_UDP; |
| 634 | 635 | } else if (cpu_is_at91cap9()) { |
| @@ -711,12 +712,13 @@ int __init at91_clock_init(unsigned long main_clock) · 76 unmodified lines | ||
| 711 | 712 | /* |
| 712 | 713 | * USB HS clock init |
| 713 | 714 | */ |
| 714 | − if (cpu_has_utmi()) | |
| 715 | + if (cpu_has_utmi()) { | |
| 715 | 716 | /* |
| 716 | 717 | * multiplier is hard-wired to 40 |
| 717 | 718 | * (obtain the USB High Speed 480 MHz when input is 12 MHz) |
| 718 | 719 | */ |
| 719 | 720 | utmi_clk.rate_hz = 40 * utmi_clk.parent->rate_hz; |
| 721 | + } | |
| 720 | 722 | |
| 721 | 723 | /* |
| 722 | 724 | * USB FS clock init |
| @@ -746,7 +748,7 @@ int __init at91_clock_init(unsigned long main_clock) · 23 unmodified lines | ||
| 746 | 748 | mck.rate_hz = (mckr & AT91_PMC_MDIV) == AT91SAM9_PMC_MDIV_3 ? |
| 747 | 749 | freq / 3 : freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ |
| 748 | 750 | } else { |
| 749 | − mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ | |
| 751 | + mck.rate_hz = freq / (1 << ((mckr & AT91_PMC_MDIV) >> 8)); /* mdiv */ | |
| 750 | 752 | } |
| 751 | 753 | |
| 752 | 754 | /* Register the PMC's standard clocks */ |
| @@ -22,7 +22,7 @@ struct clk { · 21 unmodified lines | ||
| 22 | 22 | struct clk *parent; |
| 23 | 23 | u32 pmc_mask; |
| 24 | 24 | void (*mode)(struct clk *, int); |
| 25 | − unsigned id:2; /* PCK0..3, or 32k/main/a/b */ | |
| 25 | + unsigned id:3; /* PCK0..4, or 32k/main/a/b */ | |
| 26 | 26 | unsigned type; /* clock type */ |
| 27 | 27 | u16 users; |
| 28 | 28 | }; |
| @@ -17,6 +17,7 @@ extern void __init at91sam9rl_initialize(unsigned long main_clock); · 16 unmodified lines | ||
| 17 | 17 | extern void __init at91sam9g45_initialize(unsigned long main_clock); |
| 18 | 18 | extern void __init at91x40_initialize(unsigned long main_clock); |
| 19 | 19 | extern void __init at91cap9_initialize(unsigned long main_clock); |
| 20 | +extern void __init at572d940hf_initialize(unsigned long main_clock); | |
| 20 | 21 | |
| 21 | 22 | /* Interrupts */ |
| 22 | 23 | extern void __init at91rm9200_init_interrupts(unsigned int priority[]); |
| @@ -27,6 +28,7 @@ extern void __init at91sam9rl_init_interrupts(unsigned int priority[]); · 4 unmodified lines | ||
| 27 | 28 | extern void __init at91sam9g45_init_interrupts(unsigned int priority[]); |
| 28 | 29 | extern void __init at91x40_init_interrupts(unsigned int priority[]); |
| 29 | 30 | extern void __init at91cap9_init_interrupts(unsigned int priority[]); |
| 31 | +extern void __init at572d940hf_init_interrupts(unsigned int priority[]); | |
| 30 | 32 | extern void __init at91_aic_init(unsigned int priority[]); |
| 31 | 33 | |
| 32 | 34 | /* Timer */ |
| @@ -0,0 +1,123 @@ | ||
| 1 | +/* | |
| 2 | + * include/mach/at572d940hf.h | |
| 3 | + * | |
| 4 | + * Antonio R. Costa <costa.antonior@gmail.com> | |
| 5 | + * Copyright (C) 2008 Atmel | |
| 6 | + * | |
| 7 | + * This program is free software; you can redistribute it and/or modify | |
| 8 | + * it under the terms of the GNU General Public License as published by | |
| 9 | + * the Free Software Foundation; either version 2 of the License, or | |
| 10 | + * (at your option) any later version. | |
| 11 | + * | |
| 12 | + * This program is distributed in the hope that it will be useful, | |
| 13 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | + * GNU General Public License for more details. | |
| 16 | + * | |
| 17 | + * You should have received a copy of the GNU General Public License | |
| 18 | + * along with this program; if not, write to the Free Software | |
| 19 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 20 | + * | |
| 21 | + */ | |
| 22 | + | |
| 23 | +#ifndef AT572D940HF_H | |
| 24 | +#define AT572D940HF_H | |
| 25 | + | |
| 26 | +/* | |
| 27 | + * Peripheral identifiers/interrupts. | |
| 28 | + */ | |
| 29 | +#define AT91_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ | |
| 30 | +#define AT91_ID_SYS 1 /* System Peripherals */ | |
| 31 | +#define AT572D940HF_ID_PIOA 2 /* Parallel IO Controller A */ | |
| 32 | +#define AT572D940HF_ID_PIOB 3 /* Parallel IO Controller B */ | |
| 33 | +#define AT572D940HF_ID_PIOC 4 /* Parallel IO Controller C */ | |
| 34 | +#define AT572D940HF_ID_EMAC 5 /* MACB ethernet controller */ | |
| 35 | +#define AT572D940HF_ID_US0 6 /* USART 0 */ | |
| 36 | +#define AT572D940HF_ID_US1 7 /* USART 1 */ | |
| 37 | +#define AT572D940HF_ID_US2 8 /* USART 2 */ | |
| 38 | +#define AT572D940HF_ID_MCI 9 /* Multimedia Card Interface */ | |
| 39 | +#define AT572D940HF_ID_UDP 10 /* USB Device Port */ | |
| 40 | +#define AT572D940HF_ID_TWI0 11 /* Two-Wire Interface 0 */ | |
| 41 | +#define AT572D940HF_ID_SPI0 12 /* Serial Peripheral Interface 0 */ | |
| 42 | +#define AT572D940HF_ID_SPI1 13 /* Serial Peripheral Interface 1 */ | |
| 43 | +#define AT572D940HF_ID_SSC0 14 /* Serial Synchronous Controller 0 */ | |
| 44 | +#define AT572D940HF_ID_SSC1 15 /* Serial Synchronous Controller 1 */ | |
| 45 | +#define AT572D940HF_ID_SSC2 16 /* Serial Synchronous Controller 2 */ | |
| 46 | +#define AT572D940HF_ID_TC0 17 /* Timer Counter 0 */ | |
| 47 | +#define AT572D940HF_ID_TC1 18 /* Timer Counter 1 */ | |
| 48 | +#define AT572D940HF_ID_TC2 19 /* Timer Counter 2 */ | |
| 49 | +#define AT572D940HF_ID_UHP 20 /* USB Host port */ | |
| 50 | +#define AT572D940HF_ID_SSC3 21 /* Serial Synchronous Controller 3 */ | |
| 51 | +#define AT572D940HF_ID_TWI1 22 /* Two-Wire Interface 1 */ | |
| 52 | +#define AT572D940HF_ID_CAN0 23 /* CAN Controller 0 */ | |
| 53 | +#define AT572D940HF_ID_CAN1 24 /* CAN Controller 1 */ | |
| 54 | +#define AT572D940HF_ID_MHALT 25 /* mAgicV HALT line */ | |
| 55 | +#define AT572D940HF_ID_MSIRQ0 26 /* mAgicV SIRQ0 line */ | |
| 56 | +#define AT572D940HF_ID_MEXC 27 /* mAgicV exception line */ | |
| 57 | +#define AT572D940HF_ID_MEDMA 28 /* mAgicV end of DMA line */ | |
| 58 | +#define AT572D940HF_ID_IRQ0 29 /* External Interrupt Source (IRQ0) */ | |
| 59 | +#define AT572D940HF_ID_IRQ1 30 /* External Interrupt Source (IRQ1) */ | |
| 60 | +#define AT572D940HF_ID_IRQ2 31 /* External Interrupt Source (IRQ2) */ | |
| 61 | + | |
| 62 | + | |
| 63 | +/* | |
| 64 | + * User Peripheral physical base addresses. | |
| 65 | + */ | |
| 66 | +#define AT572D940HF_BASE_TCB 0xfffa0000 | |
| 67 | +#define AT572D940HF_BASE_TC0 0xfffa0000 | |
| 68 | +#define AT572D940HF_BASE_TC1 0xfffa0040 | |
| 69 | +#define AT572D940HF_BASE_TC2 0xfffa0080 | |
| 70 | +#define AT572D940HF_BASE_UDP 0xfffa4000 | |
| 71 | +#define AT572D940HF_BASE_MCI 0xfffa8000 | |
| 72 | +#define AT572D940HF_BASE_TWI0 0xfffac000 | |
| 73 | +#define AT572D940HF_BASE_US0 0xfffb0000 | |
| 74 | +#define AT572D940HF_BASE_US1 0xfffb4000 | |
| 75 | +#define AT572D940HF_BASE_US2 0xfffb8000 | |
| 76 | +#define AT572D940HF_BASE_SSC0 0xfffbc000 | |
| 77 | +#define AT572D940HF_BASE_SSC1 0xfffc0000 | |
| 78 | +#define AT572D940HF_BASE_SSC2 0xfffc4000 | |
| 79 | +#define AT572D940HF_BASE_SPI0 0xfffc8000 | |
| 80 | +#define AT572D940HF_BASE_SPI1 0xfffcc000 | |
| 81 | +#define AT572D940HF_BASE_SSC3 0xfffd0000 | |
| 82 | +#define AT572D940HF_BASE_TWI1 0xfffd4000 | |
| 83 | +#define AT572D940HF_BASE_EMAC 0xfffd8000 | |
| 84 | +#define AT572D940HF_BASE_CAN0 0xfffdc000 | |
| 85 | +#define AT572D940HF_BASE_CAN1 0xfffe0000 | |
| 86 | +#define AT91_BASE_SYS 0xffffea00 | |
| 87 | + | |
| 88 | + | |
| 89 | +/* | |
| 90 | + * System Peripherals (offset from AT91_BASE_SYS) | |
| 91 | + */ | |
| 92 | +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) | |
| 93 | +#define AT91_SMC (0xffffec00 - AT91_BASE_SYS) | |
| 94 | +#define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) | |
| 95 | +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) | |
| 96 | +#define AT91_DBGU (0xfffff200 - AT91_BASE_SYS) | |
| 97 | +#define AT91_PIOA (0xfffff400 - AT91_BASE_SYS) | |
| 98 | +#define AT91_PIOB (0xfffff600 - AT91_BASE_SYS) | |
| 99 | +#define AT91_PIOC (0xfffff800 - AT91_BASE_SYS) | |
| 100 | +#define AT91_PMC (0xfffffc00 - AT91_BASE_SYS) | |
| 101 | +#define AT91_RSTC (0xfffffd00 - AT91_BASE_SYS) | |
| 102 | +#define AT91_RTT (0xfffffd20 - AT91_BASE_SYS) | |
| 103 | +#define AT91_PIT (0xfffffd30 - AT91_BASE_SYS) | |
| 104 | +#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) | |
| 105 | + | |
| 106 | +#define AT91_USART0 AT572D940HF_ID_US0 | |
| 107 | +#define AT91_USART1 AT572D940HF_ID_US1 | |
| 108 | +#define AT91_USART2 AT572D940HF_ID_US2 | |
| 109 | + | |
| 110 | + | |
| 111 | +/* | |
| 112 | + * Internal Memory. | |
| 113 | + */ | |
| 114 | +#define AT572D940HF_SRAM_BASE 0x00300000 /* Internal SRAM base address */ | |
| 115 | +#define AT572D940HF_SRAM_SIZE (48 * SZ_1K) /* Internal SRAM size (48Kb) */ | |
| 116 | + | |
| 117 | +#define AT572D940HF_ROM_BASE 0x00400000 /* Internal ROM base address */ | |
| 118 | +#define AT572D940HF_ROM_SIZE SZ_32K /* Internal ROM size (32Kb) */ | |
| 119 | + | |
| 120 | +#define AT572D940HF_UHP_BASE 0x00500000 /* USB Host controller */ | |
| 121 | + | |
| 122 | + | |
| 123 | +#endif | |
| @@ -0,0 +1,123 @@ | ||
| 1 | +/* | |
| 2 | + * include/mach//at572d940hf_matrix.h | |
| 3 | + * | |
| 4 | + * Antonio R. Costa <costa.antonior@gmail.com> | |
| 5 | + * Copyright (C) 2008 Atmel | |
| 6 | + * | |
| 7 | + * Copyright (C) 2005 SAN People | |
| 8 | + * | |
| 9 | + * This program is free software; you can redistribute it and/or modify | |
| 10 | + * it under the terms of the GNU General Public License as published by | |
| 11 | + * the Free Software Foundation; either version 2 of the License, or | |
| 12 | + * (at your option) any later version. | |
| 13 | + * | |
| 14 | + * This program is distributed in the hope that it will be useful, | |
| 15 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | + * GNU General Public License for more details. | |
| 18 | + * | |
| 19 | + * You should have received a copy of the GNU General Public License | |
| 20 | + * along with this program; if not, write to the Free Software | |
| 21 | + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 22 | + */ | |
| 23 | + | |
| 24 | +#ifndef AT572D940HF_MATRIX_H | |
| 25 | +#define AT572D940HF_MATRIX_H | |
| 26 | + | |
| 27 | +#define AT91_MATRIX_MCFG0 (AT91_MATRIX + 0x00) /* Master Configuration Register 0 */ | |
| 28 | +#define AT91_MATRIX_MCFG1 (AT91_MATRIX + 0x04) /* Master Configuration Register 1 */ | |
| 29 | +#define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ | |
| 30 | +#define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ | |
| 31 | +#define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ | |
| 32 | +#define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ | |
| 33 | + | |
| 34 | +#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ | |
| 35 | +#define AT91_MATRIX_ULBT_INFINITE (0 << 0) | |
| 36 | +#define AT91_MATRIX_ULBT_SINGLE (1 << 0) | |
| 37 | +#define AT91_MATRIX_ULBT_FOUR (2 << 0) | |
| 38 | +#define AT91_MATRIX_ULBT_EIGHT (3 << 0) | |
| 39 | +#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0) | |
| 40 | + | |
| 41 | +#define AT91_MATRIX_SCFG0 (AT91_MATRIX + 0x40) /* Slave Configuration Register 0 */ | |
| 42 | +#define AT91_MATRIX_SCFG1 (AT91_MATRIX + 0x44) /* Slave Configuration Register 1 */ | |
| 43 | +#define AT91_MATRIX_SCFG2 (AT91_MATRIX + 0x48) /* Slave Configuration Register 2 */ | |
| 44 | +#define AT91_MATRIX_SCFG3 (AT91_MATRIX + 0x4C) /* Slave Configuration Register 3 */ | |
| 45 | +#define AT91_MATRIX_SCFG4 (AT91_MATRIX + 0x50) /* Slave Configuration Register 4 */ | |
| 46 | +#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */ | |
| 47 | +#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */ | |
| 48 | +#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16) | |
| 49 | +#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16) | |
| 50 | +#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16) | |
| 51 | +#define AT91_MATRIX_FIXED_DEFMSTR (0x7 << 18) /* Fixed Index of Default Master */ | |
| 52 | +#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */ | |
| 53 | +#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24) | |
| 54 | +#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24) | |
| 55 | + | |
| 56 | +#define AT91_MATRIX_PRAS0 (AT91_MATRIX + 0x80) /* Priority Register A for Slave 0 */ | |
| 57 | +#define AT91_MATRIX_PRAS1 (AT91_MATRIX + 0x88) /* Priority Register A for Slave 1 */ | |
| 58 | +#define AT91_MATRIX_PRAS2 (AT91_MATRIX + 0x90) /* Priority Register A for Slave 2 */ | |
| 59 | +#define AT91_MATRIX_PRAS3 (AT91_MATRIX + 0x98) /* Priority Register A for Slave 3 */ | |
| 60 | +#define AT91_MATRIX_PRAS4 (AT91_MATRIX + 0xA0) /* Priority Register A for Slave 4 */ | |
| 61 | + | |
| 62 | +#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */ | |
| 63 | +#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */ | |
| 64 | +#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */ | |
| 65 | +#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */ | |
| 66 | +#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */ | |
| 67 | +#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */ | |
| 68 | +#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */ | |
| 69 | + | |
| 70 | +#define AT91_MATRIX_MRCR (AT91_MATRIX + 0x100) /* Master Remap Control Register */ | |
| 71 | +#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */ | |
| 72 | +#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */ | |
| 73 | + | |
| 74 | +#define AT91_MATRIX_SFR0 (AT91_MATRIX + 0x110) /* Special Function Register 0 */ | |
| 75 | +#define AT91_MATRIX_SFR1 (AT91_MATRIX + 0x114) /* Special Function Register 1 */ | |
| 76 | +#define AT91_MATRIX_SFR2 (AT91_MATRIX + 0x118) /* Special Function Register 2 */ | |
| 77 | +#define AT91_MATRIX_SFR3 (AT91_MATRIX + 0x11C) /* Special Function Register 3 */ | |
| 78 | +#define AT91_MATRIX_SFR4 (AT91_MATRIX + 0x120) /* Special Function Register 4 */ | |
| 79 | +#define AT91_MATRIX_SFR5 (AT91_MATRIX + 0x124) /* Special Function Register 5 */ | |
| 80 | +#define AT91_MATRIX_SFR6 (AT91_MATRIX + 0x128) /* Special Function Register 6 */ | |
| 81 | +#define AT91_MATRIX_SFR7 (AT91_MATRIX + 0x12C) /* Special Function Register 7 */ | |
| 82 | +#define AT91_MATRIX_SFR8 (AT91_MATRIX + 0x130) /* Special Function Register 8 */ | |
| 83 | +#define AT91_MATRIX_SFR9 (AT91_MATRIX + 0x134) /* Special Function Register 9 */ | |
| 84 | +#define AT91_MATRIX_SFR10 (AT91_MATRIX + 0x138) /* Special Function Register 10 */ | |
| 85 | +#define AT91_MATRIX_SFR11 (AT91_MATRIX + 0x13C) /* Special Function Register 11 */ | |
| 86 | +#define AT91_MATRIX_SFR12 (AT91_MATRIX + 0x140) /* Special Function Register 12 */ | |
| 87 | +#define AT91_MATRIX_SFR13 (AT91_MATRIX + 0x144) /* Special Function Register 13 */ | |
| 88 | +#define AT91_MATRIX_SFR14 (AT91_MATRIX + 0x148) /* Special Function Register 14 */ | |
| 89 | +#define AT91_MATRIX_SFR15 (AT91_MATRIX + 0x14C) /* Special Function Register 15 */ | |
| 90 | + | |
| 91 | + | |
| 92 | +/* | |
| 93 | + * The following registers / bits are not defined in the Datasheet (Revision A) | |
| 94 | + */ | |
| 95 | + | |
| 96 | +#define AT91_MATRIX_TCR (AT91_MATRIX + 0x100) /* TCM Configuration Register */ | |
| 97 | +#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */ | |
| 98 | +#define AT91_MATRIX_ITCM_0 (0 << 0) | |
| 99 | +#define AT91_MATRIX_ITCM_16 (5 << 0) | |
| 100 | +#define AT91_MATRIX_ITCM_32 (6 << 0) | |
| 101 | +#define AT91_MATRIX_ITCM_64 (7 << 0) | |
| 102 | +#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */ | |
| 103 | +#define AT91_MATRIX_DTCM_0 (0 << 4) | |
| 104 | +#define AT91_MATRIX_DTCM_16 (5 << 4) | |
| 105 | +#define AT91_MATRIX_DTCM_32 (6 << 4) | |
| 106 | +#define AT91_MATRIX_DTCM_64 (7 << 4) | |
| 107 | + | |
| 108 | +#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x11C) /* EBI Chip Select Assignment Register */ | |
| 109 | +#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */ | |
| 110 | +#define AT91_MATRIX_CS1A_SMC (0 << 1) | |
| 111 | +#define AT91_MATRIX_CS1A_SDRAMC (1 << 1) | |
| 112 | +#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */ | |
| 113 | +#define AT91_MATRIX_CS3A_SMC (0 << 3) | |
| 114 | +#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3) | |
| 115 | +#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */ | |
| 116 | +#define AT91_MATRIX_CS4A_SMC (0 << 4) | |
| 117 | +#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4) | |
| 118 | +#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */ | |
| 119 | +#define AT91_MATRIX_CS5A_SMC (0 << 5) | |
| 120 | +#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5) | |
| 121 | +#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */ | |
| 122 | + | |
| 123 | +#endif | |
| @@ -32,6 +32,7 @@ · 31 unmodified lines | ||
| 32 | 32 | #define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ |
| 33 | 33 | #define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ |
| 34 | 34 | #define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ |
| 35 | +#define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */ | |
| 35 | 36 | #define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ |
| 36 | 37 | #define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ |
| 37 | 38 | |
| @@ -87,7 +87,7 @@ struct at91_eth_data { · 86 unmodified lines | ||
| 87 | 87 | extern void __init at91_add_device_eth(struct at91_eth_data *data); |
| 88 | 88 | |
| 89 | 89 | #if defined(CONFIG_ARCH_AT91SAM9260) || defined(CONFIG_ARCH_AT91SAM9263) || defined(CONFIG_ARCH_AT91SAM9G20) || defined(CONFIG_ARCH_AT91CAP9) \ |
| 90 | − || defined(CONFIG_ARCH_AT91SAM9G45) | |
| 90 | + || defined(CONFIG_ARCH_AT91SAM9G45) || defined(CONFIG_ARCH_AT572D940HF) | |
| 91 | 91 | #define eth_platform_data at91_eth_data |
| 92 | 92 | #endif |
| 93 | 93 | |
| @@ -205,6 +205,9 @@ extern void __init at91_init_leds(u8 cpu_led, u8 timer_led); · 111 unmodified lines | ||
| 205 | 205 | extern void __init at91_gpio_leds(struct gpio_led *leds, int nr); |
| 206 | 206 | extern void __init at91_pwm_leds(struct gpio_led *leds, int nr); |
| 207 | 207 | |
| 208 | + /* AT572D940HF DSP */ | |
| 209 | +extern void __init at91_add_device_mAgic(void); | |
| 210 | + | |
| 208 | 211 | /* FIXME: this needs a better location, but gets stuff building again */ |
| 209 | 212 | extern int at91_suspend_entering_slow_clock(void); |
| 210 | 213 | |
| @@ -33,6 +33,8 @@ · 32 unmodified lines | ||
| 33 | 33 | #define ARCH_ID_AT91SAM9XE256 0x329a93a0 |
| 34 | 34 | #define ARCH_ID_AT91SAM9XE512 0x329aa3a0 |
| 35 | 35 | |
| 36 | +#define ARCH_ID_AT572D940HF 0x0e0303e0 | |
| 37 | + | |
| 36 | 38 | #define ARCH_ID_AT91M40800 0x14080044 |
| 37 | 39 | #define ARCH_ID_AT91R40807 0x44080746 |
| 38 | 40 | #define ARCH_ID_AT91M40807 0x14080745 |
| @@ -141,6 +143,12 @@ static inline unsigned long at91cap9_rev_identify(void) · 102 unmodified lines | ||
| 141 | 143 | #define cpu_is_at91cap9_revC() (0) |
| 142 | 144 | #endif |
| 143 | 145 | |
| 146 | +#ifdef CONFIG_ARCH_AT572D940HF | |
| 147 | +#define cpu_is_at572d940hf() (at91_cpu_identify() == ARCH_ID_AT572D940HF) | |
| 148 | +#else | |
| 149 | +#define cpu_is_at572d940hf() (0) | |
| 150 | +#endif | |
| 151 | + | |
| 144 | 152 | /* |
| 145 | 153 | * Since this is ARM, we will never run on any AVR32 CPU. But these |
| 146 | 154 | * definitions may reduce clutter in common drivers. |
| @@ -14,7 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <mach/hardware.h> |
| 15 | 15 | #include <mach/at91_dbgu.h> |
| 16 | 16 | |
| 17 | − .macro addruart,rx | |
| 17 | + .macro addruart, rx, tmp | |
| 18 | 18 | mrc p15, 0, \rx, c1, c0 |
| 19 | 19 | tst \rx, #1 @ MMU enabled? |
| 20 | 20 | ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) |
| @@ -32,6 +32,8 @@ · 31 unmodified lines | ||
| 32 | 32 | #include <mach/at91cap9.h> |
| 33 | 33 | #elif defined(CONFIG_ARCH_AT91X40) |
| 34 | 34 | #include <mach/at91x40.h> |
| 35 | +#elif defined(CONFIG_ARCH_AT572D940HF) | |
| 36 | +#include <mach/at572d940hf.h> | |
| 35 | 37 | #else |
| 36 | 38 | #error "Unsupported AT91 processor" |
| 37 | 39 | #endif |
| @@ -82,6 +82,11 @@ · 81 unmodified lines | ||
| 82 | 82 | #define AT91X40_MASTER_CLOCK 40000000 |
| 83 | 83 | #define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) |
| 84 | 84 | |
| 85 | +#elif defined(CONFIG_ARCH_AT572D940HF) | |
| 86 | + | |
| 87 | +#define AT572D940HF_MASTER_CLOCK 80000000 | |
| 88 | +#define CLOCK_TICK_RATE (AT572D940HF_MASTER_CLOCK/16) | |
| 89 | + | |
| 85 | 90 | #endif |
| 86 | 91 | |
| 87 | 92 | #endif |
| @@ -142,8 +142,7 @@ void __init bcmring_amba_init(void) · 141 unmodified lines | ||
| 142 | 142 | |
| 143 | 143 | chipcHw_busInterfaceClockEnable(bus_clock); |
| 144 | 144 | |
| 145 | − for (i = 0; i < ARRAY_SIZE(lookups); i++) | |
| 146 | − clkdev_add(&lookups[i]); | |
| 145 | + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | |
| 147 | 146 | |
| 148 | 147 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 149 | 148 | struct amba_device *d = amba_devs[i]; |
| @@ -13,7 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | #include <asm/hardware/clps7111.h> |
| 15 | 15 | |
| 16 | − .macro addruart,rx | |
| 16 | + .macro addruart, rx, tmp | |
| 17 | 17 | mrc p15, 0, \rx, c1, c0 |
| 18 | 18 | tst \rx, #1 @ MMU enabled? |
| 19 | 19 | moveq \rx, #CLPS7111_PHYS_BASE |
| @@ -91,10 +91,14 @@ config MACH_DAVINCI_DM6467_EVM · 90 unmodified lines | ||
| 91 | 91 | bool "TI DM6467 EVM" |
| 92 | 92 | default ARCH_DAVINCI_DM646x |
| 93 | 93 | depends on ARCH_DAVINCI_DM646x |
| 94 | + select MACH_DAVINCI_DM6467TEVM | |
| 94 | 95 | help |
| 95 | 96 | Configure this option to specify the whether the board used |
| 96 | 97 | for development is a DM6467 EVM |
| 97 | 98 | |
| 99 | +config MACH_DAVINCI_DM6467TEVM | |
| 100 | + bool | |
| 101 | + | |
| 98 | 102 | config MACH_DAVINCI_DM365_EVM |
| 99 | 103 | bool "TI DM365 EVM" |
| 100 | 104 | default ARCH_DAVINCI_DM365 |
| @@ -26,7 +26,7 @@ obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o · 25 unmodified lines | ||
| 26 | 26 | obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o |
| 27 | 27 | obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o |
| 28 | 28 | obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o |
| 29 | −obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o | |
| 29 | +obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o cdce949.o | |
| 30 | 30 | obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o |
| 31 | 31 | obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o |
| 32 | 32 | obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o |
| @@ -34,3 +34,4 @@ obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o · 1 unmodified line | ||
| 34 | 34 | # Power Management |
| 35 | 35 | obj-$(CONFIG_CPU_FREQ) += cpufreq.o |
| 36 | 36 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
| 37 | +obj-$(CONFIG_SUSPEND) += pm.o sleep.o | |
| @@ -112,7 +112,7 @@ static __init void da830_evm_usb_init(void) · 111 unmodified lines | ||
| 112 | 112 | * Set up USB clock/mode in the CFGCHIP2 register. |
| 113 | 113 | * FYI: CFGCHIP2 is 0x0000ef00 initially. |
| 114 | 114 | */ |
| 115 | − cfgchip2 = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG)); | |
| 115 | + cfgchip2 = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); | |
| 116 | 116 | |
| 117 | 117 | /* USB2.0 PHY reference clock is 24 MHz */ |
| 118 | 118 | cfgchip2 &= ~CFGCHIP2_REFFREQ; |
| @@ -139,7 +139,7 @@ static __init void da830_evm_usb_init(void) · 20 unmodified lines | ||
| 139 | 139 | cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN; |
| 140 | 140 | #endif |
| 141 | 141 | |
| 142 | − __raw_writel(cfgchip2, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP2_REG)); | |
| 142 | + __raw_writel(cfgchip2, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP2_REG)); | |
| 143 | 143 | |
| 144 | 144 | /* USB_REFCLKIN is not used. */ |
| 145 | 145 | ret = davinci_cfg_reg(DA830_USB0_DRVVBUS); |
| @@ -46,8 +46,20 @@ · 45 unmodified lines | ||
| 46 | 46 | |
| 47 | 47 | static struct mtd_partition da850_evm_norflash_partition[] = { |
| 48 | 48 | { |
| 49 | − .name = "NOR filesystem", | |
| 49 | + .name = "bootloaders + env", | |
| 50 | 50 | .offset = 0, |
| 51 | + .size = SZ_512K, | |
| 52 | + .mask_flags = MTD_WRITEABLE, | |
| 53 | + }, | |
| 54 | + { | |
| 55 | + .name = "kernel", | |
| 56 | + .offset = MTDPART_OFS_APPEND, | |
| 57 | + .size = SZ_2M, | |
| 58 | + .mask_flags = 0, | |
| 59 | + }, | |
| 60 | + { | |
| 61 | + .name = "filesystem", | |
| 62 | + .offset = MTDPART_OFS_APPEND, | |
| 51 | 63 | .size = MTDPART_SIZ_FULL, |
| 52 | 64 | .mask_flags = 0, |
| 53 | 65 | }, |
| @@ -77,6 +89,18 @@ static struct platform_device da850_evm_norflash_device = { · 23 unmodified lines | ||
| 77 | 89 | .resource = da850_evm_norflash_resource, |
| 78 | 90 | }; |
| 79 | 91 | |
| 92 | +static struct davinci_pm_config da850_pm_pdata = { | |
| 93 | + .sleepcount = 128, | |
| 94 | +}; | |
| 95 | + | |
| 96 | +static struct platform_device da850_pm_device = { | |
| 97 | + .name = "pm-davinci", | |
| 98 | + .dev = { | |
| 99 | + .platform_data = &da850_pm_pdata, | |
| 100 | + }, | |
| 101 | + .id = -1, | |
| 102 | +}; | |
| 103 | + | |
| 80 | 104 | /* DA850/OMAP-L138 EVM includes a 512 MByte large-page NAND flash |
| 81 | 105 | * (128K blocks). It may be used instead of the (default) SPI flash |
| 82 | 106 | * to boot, using TI's tools to install the secondary boot loader |
| @@ -119,6 +143,7 @@ static struct davinci_nand_pdata da850_evm_nandflash_data = { · 36 unmodified lines | ||
| 119 | 143 | .parts = da850_evm_nandflash_partition, |
| 120 | 144 | .nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition), |
| 121 | 145 | .ecc_mode = NAND_ECC_HW, |
| 146 | + .ecc_bits = 4, | |
| 122 | 147 | .options = NAND_USE_FLASH_BBT, |
| 123 | 148 | }; |
| 124 | 149 | |
| @@ -537,7 +562,7 @@ static int __init da850_evm_config_emac(void) · 412 unmodified lines | ||
| 537 | 562 | if (!machine_is_davinci_da850_evm()) |
| 538 | 563 | return 0; |
| 539 | 564 | |
| 540 | − cfg_chip3_base = DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG); | |
| 565 | + cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG); | |
| 541 | 566 | |
| 542 | 567 | val = __raw_readl(cfg_chip3_base); |
| 543 | 568 | |
| @@ -696,6 +721,11 @@ static __init void da850_evm_init(void) · 152 unmodified lines | ||
| 696 | 721 | if (ret) |
| 697 | 722 | pr_warning("da850_evm_init: cpuidle registration failed: %d\n", |
| 698 | 723 | ret); |
| 724 | + | |
| 725 | + ret = da850_register_pm(&da850_pm_device); | |
| 726 | + if (ret) | |
| 727 | + pr_warning("da850_evm_init: suspend registration failed: %d\n", | |
| 728 | + ret); | |
| 699 | 729 | } |
| 700 | 730 | |
| 701 | 731 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
| @@ -111,6 +111,8 @@ static struct platform_device davinci_nand_device = { · 110 unmodified lines | ||
| 111 | 111 | static struct davinci_i2c_platform_data i2c_pdata = { |
| 112 | 112 | .bus_freq = 400 /* kHz */, |
| 113 | 113 | .bus_delay = 0 /* usec */, |
| 114 | + .sda_pin = 15, | |
| 115 | + .scl_pin = 14, | |
| 114 | 116 | }; |
| 115 | 117 | |
| 116 | 118 | static struct snd_platform_data dm355_evm_snd_data; |
| @@ -24,6 +24,8 @@ · 23 unmodified lines | ||
| 24 | 24 | #include <linux/mtd/partitions.h> |
| 25 | 25 | #include <linux/mtd/nand.h> |
| 26 | 26 | #include <linux/input.h> |
| 27 | +#include <linux/spi/spi.h> | |
| 28 | +#include <linux/spi/eeprom.h> | |
| 27 | 29 | |
| 28 | 30 | #include <asm/mach-types.h> |
| 29 | 31 | #include <asm/mach/arch.h> |
| @@ -37,6 +39,8 @@ · 7 unmodified lines | ||
| 37 | 39 | #include <mach/nand.h> |
| 38 | 40 | #include <mach/keyscan.h> |
| 39 | 41 | |
| 42 | +#include <media/tvp514x.h> | |
| 43 | + | |
| 40 | 44 | static inline int have_imager(void) |
| 41 | 45 | { |
| 42 | 46 | /* REVISIT when it's supported, trigger via Kconfig */ |
| @@ -306,6 +310,73 @@ static void dm365evm_mmc_configure(void) · 263 unmodified lines | ||
| 306 | 310 | davinci_cfg_reg(DM365_SD1_DATA0); |
| 307 | 311 | } |
| 308 | 312 | |
| 313 | +static struct tvp514x_platform_data tvp5146_pdata = { | |
| 314 | + .clk_polarity = 0, | |
| 315 | + .hs_polarity = 1, | |
| 316 | + .vs_polarity = 1 | |
| 317 | +}; | |
| 318 | + | |
| 319 | +#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL) | |
| 320 | +/* Inputs available at the TVP5146 */ | |
| 321 | +static struct v4l2_input tvp5146_inputs[] = { | |
| 322 | + { | |
| 323 | + .index = 0, | |
| 324 | + .name = "Composite", | |
| 325 | + .type = V4L2_INPUT_TYPE_CAMERA, | |
| 326 | + .std = TVP514X_STD_ALL, | |
| 327 | + }, | |
| 328 | + { | |
| 329 | + .index = 1, | |
| 330 | + .name = "S-Video", | |
| 331 | + .type = V4L2_INPUT_TYPE_CAMERA, | |
| 332 | + .std = TVP514X_STD_ALL, | |
| 333 | + }, | |
| 334 | +}; | |
| 335 | + | |
| 336 | +/* | |
| 337 | + * this is the route info for connecting each input to decoder | |
| 338 | + * ouput that goes to vpfe. There is a one to one correspondence | |
| 339 | + * with tvp5146_inputs | |
| 340 | + */ | |
| 341 | +static struct vpfe_route tvp5146_routes[] = { | |
| 342 | + { | |
| 343 | + .input = INPUT_CVBS_VI2B, | |
| 344 | + .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
| 345 | + }, | |
| 346 | +{ | |
| 347 | + .input = INPUT_SVIDEO_VI2C_VI1C, | |
| 348 | + .output = OUTPUT_10BIT_422_EMBEDDED_SYNC, | |
| 349 | + }, | |
| 350 | +}; | |
| 351 | + | |
| 352 | +static struct vpfe_subdev_info vpfe_sub_devs[] = { | |
| 353 | + { | |
| 354 | + .name = "tvp5146", | |
| 355 | + .grp_id = 0, | |
| 356 | + .num_inputs = ARRAY_SIZE(tvp5146_inputs), | |
| 357 | + .inputs = tvp5146_inputs, | |
| 358 | + .routes = tvp5146_routes, | |
| 359 | + .can_route = 1, | |
| 360 | + .ccdc_if_params = { | |
| 361 | + .if_type = VPFE_BT656, | |
| 362 | + .hdpol = VPFE_PINPOL_POSITIVE, | |
| 363 | + .vdpol = VPFE_PINPOL_POSITIVE, | |
| 364 | + }, | |
| 365 | + .board_info = { | |
| 366 | + I2C_BOARD_INFO("tvp5146", 0x5d), | |
| 367 | + .platform_data = &tvp5146_pdata, | |
| 368 | + }, | |
| 369 | + }, | |
| 370 | +}; | |
| 371 | + | |
| 372 | +static struct vpfe_config vpfe_cfg = { | |
| 373 | + .num_subdevs = ARRAY_SIZE(vpfe_sub_devs), | |
| 374 | + .sub_devs = vpfe_sub_devs, | |
| 375 | + .i2c_adapter_id = 1, | |
| 376 | + .card_name = "DM365 EVM", | |
| 377 | + .ccdc = "ISIF", | |
| 378 | +}; | |
| 379 | + | |
| 309 | 380 | static void __init evm_init_i2c(void) |
| 310 | 381 | { |
| 311 | 382 | davinci_init_i2c(&i2c_pdata); |
| @@ -497,9 +568,29 @@ static struct davinci_uart_config uart_config __initdata = { · 185 unmodified lines | ||
| 497 | 568 | |
| 498 | 569 | static void __init dm365_evm_map_io(void) |
| 499 | 570 | { |
| 571 | + /* setup input configuration for VPFE input devices */ | |
| 572 | + dm365_set_vpfe_config(&vpfe_cfg); | |
| 500 | 573 | dm365_init(); |
| 501 | 574 | } |
| 502 | 575 | |
| 576 | +static struct spi_eeprom at25640 = { | |
| 577 | + .byte_len = SZ_64K / 8, | |
| 578 | + .name = "at25640", | |
| 579 | + .page_size = 32, | |
| 580 | + .flags = EE_ADDR2, | |
| 581 | +}; | |
| 582 | + | |
| 583 | +static struct spi_board_info dm365_evm_spi_info[] __initconst = { | |
| 584 | + { | |
| 585 | + .modalias = "at25", | |
| 586 | + .platform_data = &at25640, | |
| 587 | + .max_speed_hz = 10 * 1000 * 1000, | |
| 588 | + .bus_num = 0, | |
| 589 | + .chip_select = 0, | |
| 590 | + .mode = SPI_MODE_0, | |
| 591 | + }, | |
| 592 | +}; | |
| 593 | + | |
| 503 | 594 | static __init void dm365_evm_init(void) |
| 504 | 595 | { |
| 505 | 596 | evm_init_i2c(); |
| @@ -516,6 +607,9 @@ static __init void dm365_evm_init(void) · 10 unmodified lines | ||
| 516 | 607 | dm365_init_asp(&dm365_evm_snd_data); |
| 517 | 608 | dm365_init_rtc(); |
| 518 | 609 | dm365_init_ks(&dm365evm_ks_data); |
| 610 | + | |
| 611 | + dm365_init_spi0(BIT(0), dm365_evm_spi_info, | |
| 612 | + ARRAY_SIZE(dm365_evm_spi_info)); | |
| 519 | 613 | } |
| 520 | 614 | |
| 521 | 615 | static __init void dm365_evm_irq_init(void) |
| @@ -629,6 +629,8 @@ static struct i2c_board_info __initdata i2c_info[] = { · 628 unmodified lines | ||
| 629 | 629 | static struct davinci_i2c_platform_data i2c_pdata = { |
| 630 | 630 | .bus_freq = 20 /* kHz */, |
| 631 | 631 | .bus_delay = 100 /* usec */, |
| 632 | + .sda_pin = 44, | |
| 633 | + .scl_pin = 43, | |
| 632 | 634 | }; |
| 633 | 635 | |
| 634 | 636 | static void __init evm_init_i2c(void) |
| @@ -30,6 +30,7 @@ · 29 unmodified lines | ||
| 30 | 30 | #include <linux/mtd/mtd.h> |
| 31 | 31 | #include <linux/mtd/nand.h> |
| 32 | 32 | #include <linux/mtd/partitions.h> |
| 33 | +#include <linux/clk.h> | |
| 33 | 34 | |
| 34 | 35 | #include <asm/mach-types.h> |
| 35 | 36 | #include <asm/mach/arch.h> |
| @@ -39,54 +40,13 @@ · 3 unmodified lines | ||
| 39 | 40 | #include <mach/serial.h> |
| 40 | 41 | #include <mach/i2c.h> |
| 41 | 42 | #include <mach/nand.h> |
| 43 | +#include <mach/clock.h> | |
| 44 | +#include <mach/cdce949.h> | |
| 42 | 45 | |
| 43 | −#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ | |
| 44 | − defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | |
| 45 | −#define HAS_ATA 1 | |
| 46 | −#else | |
| 47 | −#define HAS_ATA 0 | |
| 48 | −#endif | |
| 49 | − | |
| 50 | −#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000 | |
| 51 | −#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 | |
| 46 | +#include "clock.h" | |
| 52 | 47 | |
| 53 | 48 | #define NAND_BLOCK_SIZE SZ_128K |
| 54 | 49 | |
| 55 | −/* CPLD Register 0 bits to control ATA */ | |
| 56 | −#define DM646X_EVM_ATA_RST BIT(0) | |
| 57 | −#define DM646X_EVM_ATA_PWD BIT(1) | |
| 58 | − | |
| 59 | −#define DM646X_EVM_PHY_MASK (0x2) | |
| 60 | −#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | |
| 61 | − | |
| 62 | −#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) | |
| 63 | −#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) | |
| 64 | −#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) | |
| 65 | −#define VCH2CLK_SYSCLK8 (BIT(9)) | |
| 66 | −#define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) | |
| 67 | −#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12)) | |
| 68 | −#define VCH3CLK_SYSCLK8 (BIT(13)) | |
| 69 | −#define VCH3CLK_AUXCLK (BIT(14) | BIT(13)) | |
| 70 | − | |
| 71 | −#define VIDCH2CLK (BIT(10)) | |
| 72 | −#define VIDCH3CLK (BIT(11)) | |
| 73 | −#define VIDCH1CLK (BIT(4)) | |
| 74 | −#define TVP7002_INPUT (BIT(4)) | |
| 75 | −#define TVP5147_INPUT (~BIT(4)) | |
| 76 | −#define VPIF_INPUT_ONE_CHANNEL (BIT(5)) | |
| 77 | −#define VPIF_INPUT_TWO_CHANNEL (~BIT(5)) | |
| 78 | −#define TVP5147_CH0 "tvp514x-0" | |
| 79 | −#define TVP5147_CH1 "tvp514x-1" | |
| 80 | − | |
| 81 | −static void __iomem *vpif_vidclkctl_reg; | |
| 82 | −static void __iomem *vpif_vsclkdis_reg; | |
| 83 | −/* spin lock for updating above registers */ | |
| 84 | −static spinlock_t vpif_reg_lock; | |
| 85 | − | |
| 86 | −static struct davinci_uart_config uart_config __initdata = { | |
| 87 | − .enabled_uarts = (1 << 0), | |
| 88 | −}; | |
| 89 | − | |
| 90 | 50 | /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot |
| 91 | 51 | * and U-Boot environment this avoids dependency on any particular combination |
| 92 | 52 | * of UBL, U-Boot or flashing tools etc. |
| @@ -120,6 +80,9 @@ static struct davinci_nand_pdata davinci_nand_data = { · 27 unmodified lines | ||
| 120 | 80 | .options = 0, |
| 121 | 81 | }; |
| 122 | 82 | |
| 83 | +#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x20008000 | |
| 84 | +#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x42000000 | |
| 85 | + | |
| 123 | 86 | static struct resource davinci_nand_resources[] = { |
| 124 | 87 | { |
| 125 | 88 | .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, |
| @@ -144,6 +107,17 @@ static struct platform_device davinci_nand_device = { · 18 unmodified lines | ||
| 144 | 107 | }, |
| 145 | 108 | }; |
| 146 | 109 | |
| 110 | +#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ | |
| 111 | + defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) | |
| 112 | +#define HAS_ATA 1 | |
| 113 | +#else | |
| 114 | +#define HAS_ATA 0 | |
| 115 | +#endif | |
| 116 | + | |
| 117 | +/* CPLD Register 0 bits to control ATA */ | |
| 118 | +#define DM646X_EVM_ATA_RST BIT(0) | |
| 119 | +#define DM646X_EVM_ATA_PWD BIT(1) | |
| 120 | + | |
| 147 | 121 | /* CPLD Register 0 Client: used for I/O Control */ |
| 148 | 122 | static int cpld_reg0_probe(struct i2c_client *client, |
| 149 | 123 | const struct i2c_device_id *id) |
| @@ -417,6 +391,9 @@ static struct i2c_board_info __initdata i2c_info[] = { · 267 unmodified lines | ||
| 417 | 391 | { |
| 418 | 392 | I2C_BOARD_INFO("cpld_video", 0x3b), |
| 419 | 393 | }, |
| 394 | + { | |
| 395 | + I2C_BOARD_INFO("cdce949", 0x6c), | |
| 396 | + }, | |
| 420 | 397 | }; |
| 421 | 398 | |
| 422 | 399 | static struct davinci_i2c_platform_data i2c_pdata = { |
| @@ -424,6 +401,30 @@ static struct davinci_i2c_platform_data i2c_pdata = { · 1 unmodified line | ||
| 424 | 401 | .bus_delay = 0 /* usec */, |
| 425 | 402 | }; |
| 426 | 403 | |
| 404 | +#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38) | |
| 405 | +#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c) | |
| 406 | +#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8)) | |
| 407 | +#define VCH2CLK_SYSCLK8 (BIT(9)) | |
| 408 | +#define VCH2CLK_AUXCLK (BIT(9) | BIT(8)) | |
| 409 | +#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12)) | |
| 410 | +#define VCH3CLK_SYSCLK8 (BIT(13)) | |
| 411 | +#define VCH3CLK_AUXCLK (BIT(14) | BIT(13)) | |
| 412 | + | |
| 413 | +#define VIDCH2CLK (BIT(10)) | |
| 414 | +#define VIDCH3CLK (BIT(11)) | |
| 415 | +#define VIDCH1CLK (BIT(4)) | |
| 416 | +#define TVP7002_INPUT (BIT(4)) | |
| 417 | +#define TVP5147_INPUT (~BIT(4)) | |
| 418 | +#define VPIF_INPUT_ONE_CHANNEL (BIT(5)) | |
| 419 | +#define VPIF_INPUT_TWO_CHANNEL (~BIT(5)) | |
| 420 | +#define TVP5147_CH0 "tvp514x-0" | |
| 421 | +#define TVP5147_CH1 "tvp514x-1" | |
| 422 | + | |
| 423 | +static void __iomem *vpif_vidclkctl_reg; | |
| 424 | +static void __iomem *vpif_vsclkdis_reg; | |
| 425 | +/* spin lock for updating above registers */ | |
| 426 | +static spinlock_t vpif_reg_lock; | |
| 427 | + | |
| 427 | 428 | static int set_vpif_clock(int mux_mode, int hd) |
| 428 | 429 | { |
| 429 | 430 | unsigned long flags; |
| @@ -685,11 +686,44 @@ static void __init evm_init_i2c(void) · 255 unmodified lines | ||
| 685 | 686 | evm_init_video(); |
| 686 | 687 | } |
| 687 | 688 | |
| 689 | +#define CDCE949_XIN_RATE 27000000 | |
| 690 | + | |
| 691 | +/* CDCE949 support - "lpsc" field is overridden to work as clock number */ | |
| 692 | +static struct clk cdce_clk_in = { | |
| 693 | + .name = "cdce_xin", | |
| 694 | + .rate = CDCE949_XIN_RATE, | |
| 695 | +}; | |
| 696 | + | |
| 697 | +static struct clk_lookup cdce_clks[] = { | |
| 698 | + CLK(NULL, "xin", &cdce_clk_in), | |
| 699 | + CLK(NULL, NULL, NULL), | |
| 700 | +}; | |
| 701 | + | |
| 702 | +static void __init cdce_clk_init(void) | |
| 703 | +{ | |
| 704 | + struct clk_lookup *c; | |
| 705 | + struct clk *clk; | |
| 706 | + | |
| 707 | + for (c = cdce_clks; c->clk; c++) { | |
| 708 | + clk = c->clk; | |
| 709 | + clkdev_add(c); | |
| 710 | + clk_register(clk); | |
| 711 | + } | |
| 712 | +} | |
| 713 | + | |
| 688 | 714 | static void __init davinci_map_io(void) |
| 689 | 715 | { |
| 690 | 716 | dm646x_init(); |
| 717 | + cdce_clk_init(); | |
| 691 | 718 | } |
| 692 | 719 | |
| 720 | +static struct davinci_uart_config uart_config __initdata = { | |
| 721 | + .enabled_uarts = (1 << 0), | |
| 722 | +}; | |
| 723 | + | |
| 724 | +#define DM646X_EVM_PHY_MASK (0x2) | |
| 725 | +#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */ | |
| 726 | + | |
| 693 | 727 | static __init void evm_init(void) |
| 694 | 728 | { |
| 695 | 729 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
| @@ -713,6 +747,17 @@ static __init void davinci_dm646x_evm_irq_init(void) · 17 unmodified lines | ||
| 713 | 747 | davinci_irq_init(); |
| 714 | 748 | } |
| 715 | 749 | |
| 750 | +#define DM646X_EVM_REF_FREQ 27000000 | |
| 751 | +#define DM6467T_EVM_REF_FREQ 33000000 | |
| 752 | + | |
| 753 | +void __init dm646x_board_setup_refclk(struct clk *clk) | |
| 754 | +{ | |
| 755 | + if (machine_is_davinci_dm6467tevm()) | |
| 756 | + clk->rate = DM6467T_EVM_REF_FREQ; | |
| 757 | + else | |
| 758 | + clk->rate = DM646X_EVM_REF_FREQ; | |
| 759 | +} | |
| 760 | + | |
| 716 | 761 | MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") |
| 717 | 762 | .phys_io = IO_PHYS, |
| 718 | 763 | .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, |
| @@ -723,3 +768,13 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM") · 4 unmodified lines | ||
| 723 | 768 | .init_machine = evm_init, |
| 724 | 769 | MACHINE_END |
| 725 | 770 | |
| 771 | +MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM") | |
| 772 | + .phys_io = IO_PHYS, | |
| 773 | + .io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc, | |
| 774 | + .boot_params = (0x80000100), | |
| 775 | + .map_io = davinci_map_io, | |
| 776 | + .init_irq = davinci_dm646x_evm_irq_init, | |
| 777 | + .timer = &davinci_timer, | |
| 778 | + .init_machine = evm_init, | |
| 779 | +MACHINE_END | |
| 780 | + | |
| @@ -0,0 +1,293 @@ | ||
| 1 | +/* | |
| 2 | + * TI CDCE949 clock synthesizer driver | |
| 3 | + * | |
| 4 | + * Note: This implementation assumes an input of 27MHz to the CDCE. | |
| 5 | + * This is by no means constrained by CDCE hardware although the datasheet | |
| 6 | + * does use this as an example for all illustrations and more importantly: | |
| 7 | + * that is the crystal input on boards it is currently used on. | |
| 8 | + * | |
| 9 | + * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/ | |
| 10 | + * | |
| 11 | + * This program is free software; you can redistribute it and/or modify | |
| 12 | + * it under the terms of the GNU General Public License version 2 as | |
| 13 | + * published by the Free Software Foundation. | |
| 14 | + * | |
| 15 | + */ | |
| 16 | +#include <linux/kernel.h> | |
| 17 | +#include <linux/clk.h> | |
| 18 | +#include <linux/platform_device.h> | |
| 19 | +#include <linux/i2c.h> | |
| 20 | + | |
| 21 | +#include <mach/clock.h> | |
| 22 | + | |
| 23 | +#include "clock.h" | |
| 24 | + | |
| 25 | +static struct i2c_client *cdce_i2c_client; | |
| 26 | +static DEFINE_MUTEX(cdce_mutex); | |
| 27 | + | |
| 28 | +/* CDCE register descriptor */ | |
| 29 | +struct cdce_reg { | |
| 30 | + u8 addr; | |
| 31 | + u8 val; | |
| 32 | +}; | |
| 33 | + | |
| 34 | +/* Per-Output (Y1, Y2 etc.) frequency descriptor */ | |
| 35 | +struct cdce_freq { | |
| 36 | + /* Frequency in KHz */ | |
| 37 | + unsigned long frequency; | |
| 38 | + /* | |
| 39 | + * List of registers to program to obtain a particular frequency. | |
| 40 | + * 0x0 in register address and value is the end of list marker. | |
| 41 | + */ | |
| 42 | + struct cdce_reg *reglist; | |
| 43 | +}; | |
| 44 | + | |
| 45 | +#define CDCE_FREQ_TABLE_ENTRY(line, out) \ | |
| 46 | +{ \ | |
| 47 | + .reglist = cdce_y ##line## _ ##out, \ | |
| 48 | + .frequency = out, \ | |
| 49 | +} | |
| 50 | + | |
| 51 | +/* List of CDCE outputs */ | |
| 52 | +struct cdce_output { | |
| 53 | + /* List of frequencies on this output */ | |
| 54 | + struct cdce_freq *freq_table; | |
| 55 | + /* Number of possible frequencies */ | |
| 56 | + int size; | |
| 57 | +}; | |
| 58 | + | |
| 59 | +/* | |
| 60 | + * Finding out the values to program into CDCE949 registers for a particular | |
| 61 | + * frequency output is not a simple calculation. Have a look at the datasheet | |
| 62 | + * for the details. There is desktop software available to help users with | |
| 63 | + * the calculations. Here, we just depend on the output of that software | |
| 64 | + * (or hand calculations) instead trying to runtime calculate the register | |
| 65 | + * values and inflicting misery on ourselves. | |
| 66 | + */ | |
| 67 | +static struct cdce_reg cdce_y1_148500[] = { | |
| 68 | + { 0x13, 0x00 }, | |
| 69 | + /* program PLL1_0 multiplier */ | |
| 70 | + { 0x18, 0xaf }, | |
| 71 | + { 0x19, 0x50 }, | |
| 72 | + { 0x1a, 0x02 }, | |
| 73 | + { 0x1b, 0xc9 }, | |
| 74 | + /* program PLL1_11 multiplier */ | |
| 75 | + { 0x1c, 0x00 }, | |
| 76 | + { 0x1d, 0x40 }, | |
| 77 | + { 0x1e, 0x02 }, | |
| 78 | + { 0x1f, 0xc9 }, | |
| 79 | + /* output state selection */ | |
| 80 | + { 0x15, 0x00 }, | |
| 81 | + { 0x14, 0xef }, | |
| 82 | + /* switch MUX to PLL1 output */ | |
| 83 | + { 0x14, 0x6f }, | |
| 84 | + { 0x16, 0x06 }, | |
| 85 | + /* set P2DIV divider, P3DIV and input crystal */ | |
| 86 | + { 0x17, 0x06 }, | |
| 87 | + { 0x01, 0x00 }, | |
| 88 | + { 0x05, 0x48 }, | |
| 89 | + { 0x02, 0x80 }, | |
| 90 | + /* enable and disable PLL */ | |
| 91 | + { 0x02, 0xbc }, | |
| 92 | + { 0x03, 0x01 }, | |
| 93 | + { }, | |
| 94 | +}; | |
| 95 | + | |
| 96 | +static struct cdce_reg cdce_y1_74250[] = { | |
| 97 | + { 0x13, 0x00 }, | |
| 98 | + { 0x18, 0xaf }, | |
| 99 | + { 0x19, 0x50 }, | |
| 100 | + { 0x1a, 0x02 }, | |
| 101 | + { 0x1b, 0xc9 }, | |
| 102 | + { 0x1c, 0x00 }, | |
| 103 | + { 0x1d, 0x40 }, | |
| 104 | + { 0x1e, 0x02 }, | |
| 105 | + { 0x1f, 0xc9 }, | |
| 106 | + /* output state selection */ | |
| 107 | + { 0x15, 0x00 }, | |
| 108 | + { 0x14, 0xef }, | |
| 109 | + /* switch MUX to PLL1 output */ | |
| 110 | + { 0x14, 0x6f }, | |
| 111 | + { 0x16, 0x06 }, | |
| 112 | + /* set P2DIV divider, P3DIV and input crystal */ | |
| 113 | + { 0x17, 0x06 }, | |
| 114 | + { 0x01, 0x00 }, | |
| 115 | + { 0x05, 0x48 }, | |
| 116 | + { 0x02, 0x80 }, | |
| 117 | + /* enable and disable PLL */ | |
| 118 | + { 0x02, 0xbc }, | |
| 119 | + { 0x03, 0x02 }, | |
| 120 | + { }, | |
| 121 | +}; | |
| 122 | + | |
| 123 | +static struct cdce_reg cdce_y1_27000[] = { | |
| 124 | + { 0x13, 0x00 }, | |
| 125 | + { 0x18, 0x00 }, | |
| 126 | + { 0x19, 0x40 }, | |
| 127 | + { 0x1a, 0x02 }, | |
| 128 | + { 0x1b, 0x08 }, | |
| 129 | + { 0x1c, 0x00 }, | |
| 130 | + { 0x1d, 0x40 }, | |
| 131 | + { 0x1e, 0x02 }, | |
| 132 | + { 0x1f, 0x08 }, | |
| 133 | + { 0x15, 0x02 }, | |
| 134 | + { 0x14, 0xed }, | |
| 135 | + { 0x16, 0x01 }, | |
| 136 | + { 0x17, 0x01 }, | |
| 137 | + { 0x01, 0x00 }, | |
| 138 | + { 0x05, 0x50 }, | |
| 139 | + { 0x02, 0xb4 }, | |
| 140 | + { 0x03, 0x01 }, | |
| 141 | + { }, | |
| 142 | +}; | |
| 143 | + | |
| 144 | +static struct cdce_freq cdce_y1_freqs[] = { | |
| 145 | + CDCE_FREQ_TABLE_ENTRY(1, 148500), | |
| 146 | + CDCE_FREQ_TABLE_ENTRY(1, 74250), | |
| 147 | + CDCE_FREQ_TABLE_ENTRY(1, 27000), | |
| 148 | +}; | |
| 149 | + | |
| 150 | +static struct cdce_reg cdce_y5_13500[] = { | |
| 151 | + { 0x27, 0x08 }, | |
| 152 | + { 0x28, 0x00 }, | |
| 153 | + { 0x29, 0x40 }, | |
| 154 | + { 0x2a, 0x02 }, | |
| 155 | + { 0x2b, 0x08 }, | |
| 156 | + { 0x24, 0x6f }, | |
| 157 | + { }, | |
| 158 | +}; | |
| 159 | + | |
| 160 | +static struct cdce_reg cdce_y5_16875[] = { | |
| 161 | + { 0x27, 0x08 }, | |
| 162 | + { 0x28, 0x9f }, | |
| 163 | + { 0x29, 0xb0 }, | |
| 164 | + { 0x2a, 0x02 }, | |
| 165 | + { 0x2b, 0x89 }, | |
| 166 | + { 0x24, 0x6f }, | |
| 167 | + { }, | |
| 168 | +}; | |
| 169 | + | |
| 170 | +static struct cdce_reg cdce_y5_27000[] = { | |
| 171 | + { 0x27, 0x04 }, | |
| 172 | + { 0x28, 0x00 }, | |
| 173 | + { 0x29, 0x40 }, | |
| 174 | + { 0x2a, 0x02 }, | |
| 175 | + { 0x2b, 0x08 }, | |
| 176 | + { 0x24, 0x6f }, | |
| 177 | + { }, | |
| 178 | +}; | |
| 179 | +static struct cdce_reg cdce_y5_54000[] = { | |
| 180 | + { 0x27, 0x04 }, | |
| 181 | + { 0x28, 0xff }, | |
| 182 | + { 0x29, 0x80 }, | |
| 183 | + { 0x2a, 0x02 }, | |
| 184 | + { 0x2b, 0x07 }, | |
| 185 | + { 0x24, 0x6f }, | |
| 186 | + { }, | |
| 187 | +}; | |
| 188 | + | |
| 189 | +static struct cdce_reg cdce_y5_81000[] = { | |
| 190 | + { 0x27, 0x02 }, | |
| 191 | + { 0x28, 0xbf }, | |
| 192 | + { 0x29, 0xa0 }, | |
| 193 | + { 0x2a, 0x03 }, | |
| 194 | + { 0x2b, 0x0a }, | |
| 195 | + { 0x24, 0x6f }, | |
| 196 | + { }, | |
| 197 | +}; | |
| 198 | + | |
| 199 | +static struct cdce_freq cdce_y5_freqs[] = { | |
| 200 | + CDCE_FREQ_TABLE_ENTRY(5, 13500), | |
| 201 | + CDCE_FREQ_TABLE_ENTRY(5, 16875), | |
| 202 | + CDCE_FREQ_TABLE_ENTRY(5, 27000), | |
| 203 | + CDCE_FREQ_TABLE_ENTRY(5, 54000), | |
| 204 | + CDCE_FREQ_TABLE_ENTRY(5, 81000), | |
| 205 | +}; | |
| 206 | + | |
| 207 | + | |
| 208 | +static struct cdce_output output_list[] = { | |
| 209 | + [1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) }, | |
| 210 | + [5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) }, | |
| 211 | +}; | |
| 212 | + | |
| 213 | +int cdce_set_rate(struct clk *clk, unsigned long rate) | |
| 214 | +{ | |
| 215 | + int i, ret = 0; | |
| 216 | + struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table; | |
| 217 | + struct cdce_reg *regs = NULL; | |
| 218 | + | |
| 219 | + if (!cdce_i2c_client) | |
| 220 | + return -ENODEV; | |
| 221 | + | |
| 222 | + if (!freq_table) | |
| 223 | + return -EINVAL; | |
| 224 | + | |
| 225 | + for (i = 0; i < output_list[clk->lpsc].size; i++) { | |
| 226 | + if (freq_table[i].frequency == rate / 1000) { | |
| 227 | + regs = freq_table[i].reglist; | |
| 228 | + break; | |
| 229 | + } | |
| 230 | + } | |
| 231 | + | |
| 232 | + if (!regs) | |
| 233 | + return -EINVAL; | |
| 234 | + | |
| 235 | + mutex_lock(&cdce_mutex); | |
| 236 | + for (i = 0; regs[i].addr; i++) { | |
| 237 | + ret = i2c_smbus_write_byte_data(cdce_i2c_client, | |
| 238 | + regs[i].addr | 0x80, regs[i].val); | |
| 239 | + if (ret) | |
| 240 | + break; | |
| 241 | + } | |
| 242 | + mutex_unlock(&cdce_mutex); | |
| 243 | + | |
| 244 | + if (!ret) | |
| 245 | + clk->rate = rate; | |
| 246 | + | |
| 247 | + return ret; | |
| 248 | +} | |
| 249 | + | |
| 250 | +static int cdce_probe(struct i2c_client *client, | |
| 251 | + const struct i2c_device_id *id) | |
| 252 | +{ | |
| 253 | + cdce_i2c_client = client; | |
| 254 | + return 0; | |
| 255 | +} | |
| 256 | + | |
| 257 | +static int __devexit cdce_remove(struct i2c_client *client) | |
| 258 | +{ | |
| 259 | + cdce_i2c_client = NULL; | |
| 260 | + return 0; | |
| 261 | +} | |
| 262 | + | |
| 263 | +static const struct i2c_device_id cdce_id[] = { | |
| 264 | + {"cdce949", 0}, | |
| 265 | + {}, | |
| 266 | +}; | |
| 267 | +MODULE_DEVICE_TABLE(i2c, cdce_id); | |
| 268 | + | |
| 269 | +static struct i2c_driver cdce_driver = { | |
| 270 | + .driver = { | |
| 271 | + .owner = THIS_MODULE, | |
| 272 | + .name = "cdce949", | |
| 273 | + }, | |
| 274 | + .probe = cdce_probe, | |
| 275 | + .remove = __devexit_p(cdce_remove), | |
| 276 | + .id_table = cdce_id, | |
| 277 | +}; | |
| 278 | + | |
| 279 | +static int __init cdce_init(void) | |
| 280 | +{ | |
| 281 | + return i2c_add_driver(&cdce_driver); | |
| 282 | +} | |
| 283 | +subsys_initcall(cdce_init); | |
| 284 | + | |
| 285 | +static void __exit cdce_exit(void) | |
| 286 | +{ | |
| 287 | + i2c_del_driver(&cdce_driver); | |
| 288 | +} | |
| 289 | +module_exit(cdce_exit); | |
| 290 | + | |
| 291 | +MODULE_AUTHOR("Texas Instruments"); | |
| 292 | +MODULE_DESCRIPTION("CDCE949 clock synthesizer driver"); | |
| 293 | +MODULE_LICENSE("GPL v2"); | |
| @@ -49,7 +49,8 @@ static void __clk_disable(struct clk *clk) · 48 unmodified lines | ||
| 49 | 49 | { |
| 50 | 50 | if (WARN_ON(clk->usecount == 0)) |
| 51 | 51 | return; |
| 52 | − if (--clk->usecount == 0 && !(clk->flags & CLK_PLL)) | |
| 52 | + if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && | |
| 53 | + (clk->flags & CLK_PSC)) | |
| 53 | 54 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0); |
| 54 | 55 | if (clk->parent) |
| 55 | 56 | __clk_disable(clk->parent); |
| @@ -124,9 +125,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate) · 68 unmodified lines | ||
| 124 | 125 | if (clk == NULL || IS_ERR(clk)) |
| 125 | 126 | return ret; |
| 126 | 127 | |
| 127 | − spin_lock_irqsave(&clockfw_lock, flags); | |
| 128 | 128 | if (clk->set_rate) |
| 129 | 129 | ret = clk->set_rate(clk, rate); |
| 130 | + | |
| 131 | + spin_lock_irqsave(&clockfw_lock, flags); | |
| 130 | 132 | if (ret == 0) { |
| 131 | 133 | if (clk->recalc) |
| 132 | 134 | clk->rate = clk->recalc(clk); |
| @@ -363,6 +365,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, · 230 unmodified lines | ||
| 363 | 365 | { |
| 364 | 366 | u32 ctrl; |
| 365 | 367 | unsigned int locktime; |
| 368 | + unsigned long flags; | |
| 366 | 369 | |
| 367 | 370 | if (pll->base == NULL) |
| 368 | 371 | return -EINVAL; |
| @@ -376,25 +379,23 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, · 7 unmodified lines | ||
| 376 | 379 | locktime = ((2000 * prediv) / 100); |
| 377 | 380 | prediv = (prediv - 1) | PLLDIV_EN; |
| 378 | 381 | } else { |
| 379 | − locktime = 20; | |
| 382 | + locktime = PLL_LOCK_TIME; | |
| 380 | 383 | } |
| 381 | 384 | if (postdiv) |
| 382 | 385 | postdiv = (postdiv - 1) | PLLDIV_EN; |
| 383 | 386 | if (mult) |
| 384 | 387 | mult = mult - 1; |
| 385 | 388 | |
| 389 | + /* Protect against simultaneous calls to PLL setting seqeunce */ | |
| 390 | + spin_lock_irqsave(&clockfw_lock, flags); | |
| 391 | + | |
| 386 | 392 | ctrl = __raw_readl(pll->base + PLLCTL); |
| 387 | 393 | |
| 388 | 394 | /* Switch the PLL to bypass mode */ |
| 389 | 395 | ctrl &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); |
| 390 | 396 | __raw_writel(ctrl, pll->base + PLLCTL); |
| 391 | 397 | |
| 392 | − /* | |
| 393 | − * Wait for 4 OSCIN/CLKIN cycles to ensure that the PLLC has switched | |
| 394 | − * to bypass mode. Delay of 1us ensures we are good for all > 4MHz | |
| 395 | − * OSCIN/CLKIN inputs. Typically the input is ~25MHz. | |
| 396 | − */ | |
| 397 | − udelay(1); | |
| 398 | + udelay(PLL_BYPASS_TIME); | |
| 398 | 399 | |
| 399 | 400 | /* Reset and enable PLL */ |
| 400 | 401 | ctrl &= ~(PLLCTL_PLLRST | PLLCTL_PLLDIS); |
| @@ -408,11 +409,7 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, · 7 unmodified lines | ||
| 408 | 409 | if (pll->flags & PLL_HAS_POSTDIV) |
| 409 | 410 | __raw_writel(postdiv, pll->base + POSTDIV); |
| 410 | 411 | |
| 411 | − /* | |
| 412 | − * Wait for PLL to reset properly, OMAP-L138 datasheet says | |
| 413 | − * 'min' time = 125ns | |
| 414 | − */ | |
| 415 | − udelay(1); | |
| 412 | + udelay(PLL_RESET_TIME); | |
| 416 | 413 | |
| 417 | 414 | /* Bring PLL out of reset */ |
| 418 | 415 | ctrl |= PLLCTL_PLLRST; |
| @@ -424,17 +421,20 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, · 5 unmodified lines | ||
| 424 | 421 | ctrl |= PLLCTL_PLLEN; |
| 425 | 422 | __raw_writel(ctrl, pll->base + PLLCTL); |
| 426 | 423 | |
| 424 | + spin_unlock_irqrestore(&clockfw_lock, flags); | |
| 425 | + | |
| 427 | 426 | return 0; |
| 428 | 427 | } |
| 429 | 428 | EXPORT_SYMBOL(davinci_set_pllrate); |
| 430 | 429 | |
| 431 | −int __init davinci_clk_init(struct davinci_clk *clocks) | |
| 430 | +int __init davinci_clk_init(struct clk_lookup *clocks) | |
| 432 | 431 | { |
| 433 | − struct davinci_clk *c; | |
| 432 | + struct clk_lookup *c; | |
| 434 | 433 | struct clk *clk; |
| 434 | + size_t num_clocks = 0; | |
| 435 | 435 | |
| 436 | − for (c = clocks; c->lk.clk; c++) { | |
| 437 | − clk = c->lk.clk; | |
| 436 | + for (c = clocks; c->clk; c++) { | |
| 437 | + clk = c->clk; | |
| 438 | 438 | |
| 439 | 439 | if (!clk->recalc) { |
| 440 | 440 | |
| @@ -457,35 +457,23 @@ int __init davinci_clk_init(struct davinci_clk *clocks) · 16 unmodified lines | ||
| 457 | 457 | if (clk->lpsc) |
| 458 | 458 | clk->flags |= CLK_PSC; |
| 459 | 459 | |
| 460 | − clkdev_add(&c->lk); | |
| 461 | 460 | clk_register(clk); |
| 461 | + num_clocks++; | |
| 462 | 462 | |
| 463 | 463 | /* Turn on clocks that Linux doesn't otherwise manage */ |
| 464 | 464 | if (clk->flags & ALWAYS_ENABLED) |
| 465 | 465 | clk_enable(clk); |
| 466 | 466 | } |
| 467 | 467 | |
| 468 | − return 0; | |
| 469 | −} | |
| 470 | − | |
| 471 | −#ifdef CONFIG_PROC_FS | |
| 472 | −#include <linux/proc_fs.h> | |
| 473 | −#include <linux/seq_file.h> | |
| 468 | + clkdev_add_table(clocks, num_clocks); | |
| 474 | 469 | |
| 475 | −static void *davinci_ck_start(struct seq_file *m, loff_t *pos) | |
| 476 | −{ | |
| 477 | − return *pos < 1 ? (void *)1 : NULL; | |
| 470 | + return 0; | |
| 478 | 471 | } |
| 479 | 472 | |
| 480 | −static void *davinci_ck_next(struct seq_file *m, void *v, loff_t *pos) | |
| 481 | −{ | |
| 482 | − ++*pos; | |
| 483 | − return NULL; | |
| 484 | −} | |
| 473 | +#ifdef CONFIG_DEBUG_FS | |
| 485 | 474 | |
| 486 | −static void davinci_ck_stop(struct seq_file *m, void *v) | |
| 487 | −{ | |
| 488 | −} | |
| 475 | +#include <linux/debugfs.h> | |
| 476 | +#include <linux/seq_file.h> | |
| 489 | 477 | |
| 490 | 478 | #define CLKNAME_MAX 10 /* longest clock name */ |
| 491 | 479 | #define NEST_DELTA 2 |
| @@ -525,41 +513,38 @@ dump_clock(struct seq_file *s, unsigned nest, struct clk *parent) · 33 unmodified lines | ||
| 525 | 513 | |
| 526 | 514 | static int davinci_ck_show(struct seq_file *m, void *v) |
| 527 | 515 | { |
| 528 | − /* Show clock tree; we know the main oscillator is first. | |
| 529 | − * We trust nonzero usecounts equate to PSC enables... | |
| 516 | + struct clk *clk; | |
| 517 | + | |
| 518 | + /* | |
| 519 | + * Show clock tree; We trust nonzero usecounts equate to PSC enables... | |
| 530 | 520 | */ |
| 531 | 521 | mutex_lock(&clocks_mutex); |
| 532 | − if (!list_empty(&clocks)) | |
| 533 | − dump_clock(m, 0, list_first_entry(&clocks, struct clk, node)); | |
| 522 | + list_for_each_entry(clk, &clocks, node) | |
| 523 | + if (!clk->parent) | |
| 524 | + dump_clock(m, 0, clk); | |
| 534 | 525 | mutex_unlock(&clocks_mutex); |
| 535 | 526 | |
| 536 | 527 | return 0; |
| 537 | 528 | } |
| 538 | 529 | |
| 539 | −static const struct seq_operations davinci_ck_op = { | |
| 540 | − .start = davinci_ck_start, | |
| 541 | − .next = davinci_ck_next, | |
| 542 | − .stop = davinci_ck_stop, | |
| 543 | − .show = davinci_ck_show | |
| 544 | −}; | |
| 545 | − | |
| 546 | 530 | static int davinci_ck_open(struct inode *inode, struct file *file) |
| 547 | 531 | { |
| 548 | − return seq_open(file, &davinci_ck_op); | |
| 532 | + return single_open(file, davinci_ck_show, NULL); | |
| 549 | 533 | } |
| 550 | 534 | |
| 551 | −static const struct file_operations proc_davinci_ck_operations = { | |
| 535 | +static const struct file_operations davinci_ck_operations = { | |
| 552 | 536 | .open = davinci_ck_open, |
| 553 | 537 | .read = seq_read, |
| 554 | 538 | .llseek = seq_lseek, |
| 555 | − .release = seq_release, | |
| 539 | + .release = single_release, | |
| 556 | 540 | }; |
| 557 | 541 | |
| 558 | −static int __init davinci_ck_proc_init(void) | |
| 542 | +static int __init davinci_clk_debugfs_init(void) | |
| 559 | 543 | { |
| 560 | − proc_create("davinci_clocks", 0, NULL, &proc_davinci_ck_operations); | |
| 544 | + debugfs_create_file("davinci_clocks", S_IFREG | S_IRUGO, NULL, NULL, | |
| 545 | + &davinci_ck_operations); | |
| 561 | 546 | return 0; |
| 562 | 547 | |
| 563 | 548 | } |
| 564 | −__initcall(davinci_ck_proc_init); | |
| 565 | −#endif /* CONFIG_DEBUG_PROC_FS */ | |
| 549 | +device_initcall(davinci_clk_debugfs_init); | |
| 550 | +#endif /* CONFIG_DEBUG_FS */ | |
| @@ -12,9 +12,6 @@ · 11 unmodified lines | ||
| 12 | 12 | #ifndef __ARCH_ARM_DAVINCI_CLOCK_H |
| 13 | 13 | #define __ARCH_ARM_DAVINCI_CLOCK_H |
| 14 | 14 | |
| 15 | −#include <linux/list.h> | |
| 16 | −#include <asm/clkdev.h> | |
| 17 | − | |
| 18 | 15 | #define DAVINCI_PLL1_BASE 0x01c40800 |
| 19 | 16 | #define DAVINCI_PLL2_BASE 0x01c40c00 |
| 20 | 17 | #define MAX_PLL 2 |
| @@ -53,6 +50,26 @@ · 32 unmodified lines | ||
| 53 | 50 | #define PLLDIV_EN BIT(15) |
| 54 | 51 | #define PLLDIV_RATIO_MASK 0x1f |
| 55 | 52 | |
| 53 | +/* | |
| 54 | + * OMAP-L138 system reference guide recommends a wait for 4 OSCIN/CLKIN | |
| 55 | + * cycles to ensure that the PLLC has switched to bypass mode. Delay of 1us | |
| 56 | + * ensures we are good for all > 4MHz OSCIN/CLKIN inputs. Typically the input | |
| 57 | + * is ~25MHz. Units are micro seconds. | |
| 58 | + */ | |
| 59 | +#define PLL_BYPASS_TIME 1 | |
| 60 | +/* From OMAP-L138 datasheet table 6-4. Units are micro seconds */ | |
| 61 | +#define PLL_RESET_TIME 1 | |
| 62 | +/* | |
| 63 | + * From OMAP-L138 datasheet table 6-4; assuming prediv = 1, sqrt(pllm) = 4 | |
| 64 | + * Units are micro seconds. | |
| 65 | + */ | |
| 66 | +#define PLL_LOCK_TIME 20 | |
| 67 | + | |
| 68 | +#ifndef __ASSEMBLER__ | |
| 69 | + | |
| 70 | +#include <linux/list.h> | |
| 71 | +#include <asm/clkdev.h> | |
| 72 | + | |
| 56 | 73 | struct pll_data { |
| 57 | 74 | u32 phys_base; |
| 58 | 75 | void __iomem *base; |
| @@ -89,23 +106,19 @@ struct clk { · 30 unmodified lines | ||
| 89 | 106 | #define CLK_PLL BIT(4) /* PLL-derived clock */ |
| 90 | 107 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ |
| 91 | 108 | |
| 92 | −struct davinci_clk { | |
| 93 | − struct clk_lookup lk; | |
| 94 | −}; | |
| 95 | − | |
| 96 | −#define CLK(dev, con, ck) \ | |
| 97 | − { \ | |
| 98 | − .lk = { \ | |
| 99 | − .dev_id = dev, \ | |
| 100 | − .con_id = con, \ | |
| 101 | − .clk = ck, \ | |
| 102 | − }, \ | |
| 103 | − } | |
| 109 | +#define CLK(dev, con, ck) \ | |
| 110 | + { \ | |
| 111 | + .dev_id = dev, \ | |
| 112 | + .con_id = con, \ | |
| 113 | + .clk = ck, \ | |
| 114 | + } \ | |
| 104 | 115 | |
| 105 | −int davinci_clk_init(struct davinci_clk *clocks); | |
| 116 | +int davinci_clk_init(struct clk_lookup *clocks); | |
| 106 | 117 | int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv, |
| 107 | 118 | unsigned int mult, unsigned int postdiv); |
| 108 | 119 | |
| 109 | 120 | extern struct platform_device davinci_wdt_device; |
| 110 | 121 | |
| 111 | 122 | #endif |
| 123 | + | |
| 124 | +#endif | |
| @@ -11,13 +11,13 @@ · 10 unmodified lines | ||
| 11 | 11 | #include <linux/module.h> |
| 12 | 12 | #include <linux/io.h> |
| 13 | 13 | #include <linux/etherdevice.h> |
| 14 | +#include <linux/davinci_emac.h> | |
| 14 | 15 | |
| 15 | 16 | #include <asm/tlb.h> |
| 16 | 17 | #include <asm/mach/map.h> |
| 17 | 18 | |
| 18 | 19 | #include <mach/common.h> |
| 19 | 20 | #include <mach/cputype.h> |
| 20 | −#include <mach/emac.h> | |
| 21 | 21 | |
| 22 | 22 | #include "clock.h" |
| 23 | 23 | |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <asm/proc-fns.h> |
| 20 | 20 | |
| 21 | 21 | #include <mach/cpuidle.h> |
| 22 | +#include <mach/memory.h> | |
| 22 | 23 | |
| 23 | 24 | #define DAVINCI_CPUIDLE_MAX_STATES 2 |
| 24 | 25 | |
| @@ -39,10 +40,6 @@ static struct cpuidle_driver davinci_idle_driver = { · 14 unmodified lines | ||
| 39 | 40 | static DEFINE_PER_CPU(struct cpuidle_device, davinci_cpuidle_device); |
| 40 | 41 | static void __iomem *ddr2_reg_base; |
| 41 | 42 | |
| 42 | −#define DDR2_SDRCR_OFFSET 0xc | |
| 43 | −#define DDR2_SRPD_BIT BIT(23) | |
| 44 | −#define DDR2_LPMODEN_BIT BIT(31) | |
| 45 | − | |
| 46 | 43 | static void davinci_save_ddr_power(int enter, bool pdown) |
| 47 | 44 | { |
| 48 | 45 | u32 val; |
| @@ -109,8 +106,6 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) · 60 unmodified lines | ||
| 109 | 106 | int ret; |
| 110 | 107 | struct cpuidle_device *device; |
| 111 | 108 | struct davinci_cpuidle_config *pdata = pdev->dev.platform_data; |
| 112 | − struct resource *ddr2_regs; | |
| 113 | − resource_size_t len; | |
| 114 | 109 | |
| 115 | 110 | device = &per_cpu(davinci_cpuidle_device, smp_processor_id()); |
| 116 | 111 | |
| @@ -119,28 +114,12 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) · 2 unmodified lines | ||
| 119 | 114 | return -ENOENT; |
| 120 | 115 | } |
| 121 | 116 | |
| 122 | − ddr2_regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
| 123 | − if (!ddr2_regs) { | |
| 124 | − dev_err(&pdev->dev, "cannot get DDR2 controller register base"); | |
| 125 | − return -ENODEV; | |
| 126 | − } | |
| 127 | − | |
| 128 | − len = resource_size(ddr2_regs); | |
| 129 | − | |
| 130 | − ddr2_regs = request_mem_region(ddr2_regs->start, len, ddr2_regs->name); | |
| 131 | − if (!ddr2_regs) | |
| 132 | − return -EBUSY; | |
| 133 | − | |
| 134 | − ddr2_reg_base = ioremap(ddr2_regs->start, len); | |
| 135 | − if (!ddr2_reg_base) { | |
| 136 | − ret = -ENOMEM; | |
| 137 | − goto ioremap_fail; | |
| 138 | − } | |
| 117 | + ddr2_reg_base = pdata->ddr2_ctlr_base; | |
| 139 | 118 | |
| 140 | 119 | ret = cpuidle_register_driver(&davinci_idle_driver); |
| 141 | 120 | if (ret) { |
| 142 | 121 | dev_err(&pdev->dev, "failed to register driver\n"); |
| 143 | − goto driver_register_fail; | |
| 122 | + return ret; | |
| 144 | 123 | } |
| 145 | 124 | |
| 146 | 125 | /* Wait for interrupt state */ |
| @@ -167,18 +146,11 @@ static int __init davinci_cpuidle_probe(struct platform_device *pdev) · 20 unmodified lines | ||
| 167 | 146 | ret = cpuidle_register_device(device); |
| 168 | 147 | if (ret) { |
| 169 | 148 | dev_err(&pdev->dev, "failed to register device\n"); |
| 170 | − goto device_register_fail; | |
| 149 | + cpuidle_unregister_driver(&davinci_idle_driver); | |
| 150 | + return ret; | |
| 171 | 151 | } |
| 172 | 152 | |
| 173 | 153 | return 0; |
| 174 | − | |
| 175 | −device_register_fail: | |
| 176 | − cpuidle_unregister_driver(&davinci_idle_driver); | |
| 177 | −driver_register_fail: | |
| 178 | − iounmap(ddr2_reg_base); | |
| 179 | −ioremap_fail: | |
| 180 | − release_mem_region(ddr2_regs->start, len); | |
| 181 | − return ret; | |
| 182 | 154 | } |
| 183 | 155 | |
| 184 | 156 | static struct platform_driver davinci_cpuidle_driver = { |
| @@ -371,7 +371,7 @@ static struct clk rmii_clk = { · 370 unmodified lines | ||
| 371 | 371 | .parent = &pll0_sysclk7, |
| 372 | 372 | }; |
| 373 | 373 | |
| 374 | −static struct davinci_clk da830_clks[] = { | |
| 374 | +static struct clk_lookup da830_clks[] = { | |
| 375 | 375 | CLK(NULL, "ref", &ref_clk), |
| 376 | 376 | CLK(NULL, "pll0", &pll0_clk), |
| 377 | 377 | CLK(NULL, "pll0_aux", &pll0_aux_clk), |
| @@ -1208,13 +1208,13 @@ static struct davinci_soc_info davinci_soc_info_da830 = { · 830 unmodified lines | ||
| 1208 | 1208 | |
| 1209 | 1209 | void __init da830_init(void) |
| 1210 | 1210 | { |
| 1211 | − da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K); | |
| 1212 | − if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) | |
| 1211 | + da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); | |
| 1212 | + if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) | |
| 1213 | 1213 | return; |
| 1214 | 1214 | |
| 1215 | 1215 | davinci_soc_info_da830.jtag_id_base = |
| 1216 | − DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG); | |
| 1217 | − davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); | |
| 1216 | + DA8XX_SYSCFG0_VIRT(DA8XX_JTAG_ID_REG); | |
| 1217 | + davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); | |
| 1218 | 1218 | |
| 1219 | 1219 | davinci_common_init(&davinci_soc_info_da830); |
| 1220 | 1220 | } |
| @@ -26,6 +26,7 @@ · 25 unmodified lines | ||
| 26 | 26 | #include <mach/time.h> |
| 27 | 27 | #include <mach/da8xx.h> |
| 28 | 28 | #include <mach/cpufreq.h> |
| 29 | +#include <mach/pm.h> | |
| 29 | 30 | |
| 30 | 31 | #include "clock.h" |
| 31 | 32 | #include "mux.h" |
| @@ -40,6 +41,7 @@ · 8 unmodified lines | ||
| 40 | 41 | #define DA850_REF_FREQ 24000000 |
| 41 | 42 | |
| 42 | 43 | #define CFGCHIP3_ASYNC3_CLKSRC BIT(4) |
| 44 | +#define CFGCHIP3_PLL1_MASTER_LOCK BIT(5) | |
| 43 | 45 | #define CFGCHIP0_PLL_MASTER_LOCK BIT(4) |
| 44 | 46 | |
| 45 | 47 | static int da850_set_armrate(struct clk *clk, unsigned long rate); |
| @@ -333,7 +335,7 @@ static struct clk aemif_clk = { · 287 unmodified lines | ||
| 333 | 335 | .flags = ALWAYS_ENABLED, |
| 334 | 336 | }; |
| 335 | 337 | |
| 336 | −static struct davinci_clk da850_clks[] = { | |
| 338 | +static struct clk_lookup da850_clks[] = { | |
| 337 | 339 | CLK(NULL, "ref", &ref_clk), |
| 338 | 340 | CLK(NULL, "pll0", &pll0_clk), |
| 339 | 341 | CLK(NULL, "pll0_aux", &pll0_aux_clk), |
| @@ -535,6 +537,7 @@ static const struct mux_config da850_pins[] = { · 195 unmodified lines | ||
| 535 | 537 | MUX_CFG(DA850, GPIO2_15, 5, 0, 15, 8, false) |
| 536 | 538 | MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) |
| 537 | 539 | MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) |
| 540 | + MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) | |
| 538 | 541 | #endif |
| 539 | 542 | }; |
| 540 | 543 | |
| @@ -770,6 +773,12 @@ static struct map_desc da850_io_desc[] = { · 229 unmodified lines | ||
| 770 | 773 | .length = DA8XX_CP_INTC_SIZE, |
| 771 | 774 | .type = MT_DEVICE |
| 772 | 775 | }, |
| 776 | + { | |
| 777 | + .virtual = SRAM_VIRT, | |
| 778 | + .pfn = __phys_to_pfn(DA8XX_ARM_RAM_BASE), | |
| 779 | + .length = SZ_8K, | |
| 780 | + .type = MT_DEVICE | |
| 781 | + }, | |
| 773 | 782 | }; |
| 774 | 783 | |
| 775 | 784 | static void __iomem *da850_psc_bases[] = { |
| @@ -825,12 +834,12 @@ static struct davinci_timer_info da850_timer_info = { · 49 unmodified lines | ||
| 825 | 834 | static void da850_set_async3_src(int pllnum) |
| 826 | 835 | { |
| 827 | 836 | struct clk *clk, *newparent = pllnum ? &pll1_sysclk2 : &pll0_sysclk2; |
| 828 | − struct davinci_clk *c; | |
| 837 | + struct clk_lookup *c; | |
| 829 | 838 | unsigned int v; |
| 830 | 839 | int ret; |
| 831 | 840 | |
| 832 | − for (c = da850_clks; c->lk.clk; c++) { | |
| 833 | − clk = c->lk.clk; | |
| 841 | + for (c = da850_clks; c->clk; c++) { | |
| 842 | + clk = c->clk; | |
| 834 | 843 | if (clk->flags & DA850_CLK_ASYNC3) { |
| 835 | 844 | ret = clk_set_parent(clk, newparent); |
| 836 | 845 | WARN(ret, "DA850: unable to re-parent clock %s", |
| @@ -838,12 +847,12 @@ static void da850_set_async3_src(int pllnum) · 1 unmodified line | ||
| 838 | 847 | } |
| 839 | 848 | } |
| 840 | 849 | |
| 841 | − v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG)); | |
| 850 | + v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); | |
| 842 | 851 | if (pllnum) |
| 843 | 852 | v |= CFGCHIP3_ASYNC3_CLKSRC; |
| 844 | 853 | else |
| 845 | 854 | v &= ~CFGCHIP3_ASYNC3_CLKSRC; |
| 846 | − __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP3_REG)); | |
| 855 | + __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); | |
| 847 | 856 | } |
| 848 | 857 | |
| 849 | 858 | #ifdef CONFIG_CPU_FREQ |
| @@ -987,7 +996,6 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) · 137 unmodified lines | ||
| 987 | 996 | unsigned int prediv, mult, postdiv; |
| 988 | 997 | struct da850_opp *opp; |
| 989 | 998 | struct pll_data *pll = clk->pll_data; |
| 990 | − unsigned int v; | |
| 991 | 999 | int ret; |
| 992 | 1000 | |
| 993 | 1001 | opp = (struct da850_opp *) da850_freq_table[index].index; |
| @@ -995,11 +1003,6 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index) · 1 unmodified line | ||
| 995 | 1003 | mult = opp->mult; |
| 996 | 1004 | postdiv = opp->postdiv; |
| 997 | 1005 | |
| 998 | − /* Unlock writing to PLL registers */ | |
| 999 | − v = __raw_readl(DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP0_REG)); | |
| 1000 | − v &= ~CFGCHIP0_PLL_MASTER_LOCK; | |
| 1001 | − __raw_writel(v, DA8XX_SYSCFG_VIRT(DA8XX_CFGCHIP0_REG)); | |
| 1002 | − | |
| 1003 | 1006 | ret = davinci_set_pllrate(pll, prediv, mult, postdiv); |
| 1004 | 1007 | if (WARN_ON(ret)) |
| 1005 | 1008 | return ret; |
| @@ -1028,6 +1031,43 @@ static int da850_round_armrate(struct clk *clk, unsigned long rate) · 22 unmodified lines | ||
| 1028 | 1031 | } |
| 1029 | 1032 | #endif |
| 1030 | 1033 | |
| 1034 | +int da850_register_pm(struct platform_device *pdev) | |
| 1035 | +{ | |
| 1036 | + int ret; | |
| 1037 | + struct davinci_pm_config *pdata = pdev->dev.platform_data; | |
| 1038 | + | |
| 1039 | + ret = davinci_cfg_reg(DA850_RTC_ALARM); | |
| 1040 | + if (ret) | |
| 1041 | + return ret; | |
| 1042 | + | |
| 1043 | + pdata->ddr2_ctlr_base = da8xx_get_mem_ctlr(); | |
| 1044 | + pdata->deepsleep_reg = DA8XX_SYSCFG1_VIRT(DA8XX_DEEPSLEEP_REG); | |
| 1045 | + pdata->ddrpsc_num = DA8XX_LPSC1_EMIF3C; | |
| 1046 | + | |
| 1047 | + pdata->cpupll_reg_base = ioremap(DA8XX_PLL0_BASE, SZ_4K); | |
| 1048 | + if (!pdata->cpupll_reg_base) | |
| 1049 | + return -ENOMEM; | |
| 1050 | + | |
| 1051 | + pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K); | |
| 1052 | + if (!pdata->ddrpll_reg_base) { | |
| 1053 | + ret = -ENOMEM; | |
| 1054 | + goto no_ddrpll_mem; | |
| 1055 | + } | |
| 1056 | + | |
| 1057 | + pdata->ddrpsc_reg_base = ioremap(DA8XX_PSC1_BASE, SZ_4K); | |
| 1058 | + if (!pdata->ddrpsc_reg_base) { | |
| 1059 | + ret = -ENOMEM; | |
| 1060 | + goto no_ddrpsc_mem; | |
| 1061 | + } | |
| 1062 | + | |
| 1063 | + return platform_device_register(pdev); | |
| 1064 | + | |
| 1065 | +no_ddrpsc_mem: | |
| 1066 | + iounmap(pdata->ddrpll_reg_base); | |
| 1067 | +no_ddrpll_mem: | |
| 1068 | + iounmap(pdata->cpupll_reg_base); | |
| 1069 | + return ret; | |
| 1070 | +} | |
| 1031 | 1071 | |
| 1032 | 1072 | static struct davinci_soc_info davinci_soc_info_da850 = { |
| 1033 | 1073 | .io_desc = da850_io_desc, |
| @@ -1049,17 +1089,25 @@ static struct davinci_soc_info davinci_soc_info_da850 = { · 15 unmodified lines | ||
| 1049 | 1089 | .gpio_irq = IRQ_DA8XX_GPIO0, |
| 1050 | 1090 | .serial_dev = &da8xx_serial_device, |
| 1051 | 1091 | .emac_pdata = &da8xx_emac_pdata, |
| 1092 | + .sram_dma = DA8XX_ARM_RAM_BASE, | |
| 1093 | + .sram_len = SZ_8K, | |
| 1052 | 1094 | }; |
| 1053 | 1095 | |
| 1054 | 1096 | void __init da850_init(void) |
| 1055 | 1097 | { |
| 1056 | − da8xx_syscfg_base = ioremap(DA8XX_SYSCFG_BASE, SZ_4K); | |
| 1057 | − if (WARN(!da8xx_syscfg_base, "Unable to map syscfg module")) | |
| 1098 | + unsigned int v; | |
| 1099 | + | |
| 1100 | + da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K); | |
| 1101 | + if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module")) | |
| 1102 | + return; | |
| 1103 | + | |
| 1104 | + da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K); | |
| 1105 | + if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module")) | |
| 1058 | 1106 | return; |
| 1059 | 1107 | |
| 1060 | 1108 | davinci_soc_info_da850.jtag_id_base = |
| 1061 | − DA8XX_SYSCFG_VIRT(DA8XX_JTAG_ID_REG); | |
| 1062 | − davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG_VIRT(0x120); | |
| 1109 | + DA8XX_SYSCFG0_VIRT(DA8XX_JTAG_ID_REG); | |
| 1110 | + davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120); | |
| 1063 | 1111 | |
| 1064 | 1112 | davinci_common_init(&davinci_soc_info_da850); |
| 1065 | 1113 | |
| @@ -1071,4 +1119,14 @@ void __init da850_init(void) · 5 unmodified lines | ||
| 1071 | 1119 | * be any noticible change even in non-DVFS use cases. |
| 1072 | 1120 | */ |
| 1073 | 1121 | da850_set_async3_src(1); |
| 1122 | + | |
| 1123 | + /* Unlock writing to PLL0 registers */ | |
| 1124 | + v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG)); | |
| 1125 | + v &= ~CFGCHIP0_PLL_MASTER_LOCK; | |
| 1126 | + __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP0_REG)); | |
| 1127 | + | |
| 1128 | + /* Unlock writing to PLL1 registers */ | |
| 1129 | + v = __raw_readl(DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); | |
| 1130 | + v &= ~CFGCHIP3_PLL1_MASTER_LOCK; | |
| 1131 | + __raw_writel(v, DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG)); | |
| 1074 | 1132 | } |
| @@ -24,8 +24,10 @@ · 23 unmodified lines | ||
| 24 | 24 | #include "clock.h" |
| 25 | 25 | |
| 26 | 26 | #define DA8XX_TPCC_BASE 0x01c00000 |
| 27 | +#define DA850_TPCC1_BASE 0x01e30000 | |
| 27 | 28 | #define DA8XX_TPTC0_BASE 0x01c08000 |
| 28 | 29 | #define DA8XX_TPTC1_BASE 0x01c08400 |
| 30 | +#define DA850_TPTC2_BASE 0x01e38000 | |
| 29 | 31 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ |
| 30 | 32 | #define DA8XX_I2C0_BASE 0x01c22000 |
| 31 | 33 | #define DA8XX_RTC_BASE 0x01C23000 |
| @@ -42,7 +44,8 @@ · 10 unmodified lines | ||
| 42 | 44 | #define DA8XX_MDIO_REG_OFFSET 0x4000 |
| 43 | 45 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K |
| 44 | 46 | |
| 45 | −void __iomem *da8xx_syscfg_base; | |
| 47 | +void __iomem *da8xx_syscfg0_base; | |
| 48 | +void __iomem *da8xx_syscfg1_base; | |
| 46 | 49 | |
| 47 | 50 | static struct plat_serial8250_port da8xx_serial_pdata[] = { |
| 48 | 51 | { |
| @@ -82,11 +85,6 @@ struct platform_device da8xx_serial_device = { · 33 unmodified lines | ||
| 82 | 85 | }, |
| 83 | 86 | }; |
| 84 | 87 | |
| 85 | −static const s8 da8xx_dma_chan_no_event[] = { | |
| 86 | − 20, 21, | |
| 87 | − -1 | |
| 88 | −}; | |
| 89 | − | |
| 90 | 88 | static const s8 da8xx_queue_tc_mapping[][2] = { |
| 91 | 89 | /* {event queue no, TC no} */ |
| 92 | 90 | {0, 0}, |
| @@ -101,20 +99,52 @@ static const s8 da8xx_queue_priority_mapping[][2] = { · 8 unmodified lines | ||
| 101 | 99 | {-1, -1} |
| 102 | 100 | }; |
| 103 | 101 | |
| 104 | −static struct edma_soc_info da8xx_edma_info[] = { | |
| 102 | +static const s8 da850_queue_tc_mapping[][2] = { | |
| 103 | + /* {event queue no, TC no} */ | |
| 104 | + {0, 0}, | |
| 105 | + {-1, -1} | |
| 106 | +}; | |
| 107 | + | |
| 108 | +static const s8 da850_queue_priority_mapping[][2] = { | |
| 109 | + /* {event queue no, Priority} */ | |
| 110 | + {0, 3}, | |
| 111 | + {-1, -1} | |
| 112 | +}; | |
| 113 | + | |
| 114 | +static struct edma_soc_info da830_edma_info[] = { | |
| 105 | 115 | { |
| 106 | 116 | .n_channel = 32, |
| 107 | 117 | .n_region = 4, |
| 108 | 118 | .n_slot = 128, |
| 109 | 119 | .n_tc = 2, |
| 110 | 120 | .n_cc = 1, |
| 111 | − .noevent = da8xx_dma_chan_no_event, | |
| 112 | 121 | .queue_tc_mapping = da8xx_queue_tc_mapping, |
| 113 | 122 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
| 114 | 123 | }, |
| 115 | 124 | }; |
| 116 | 125 | |
| 117 | −static struct resource da8xx_edma_resources[] = { | |
| 126 | +static struct edma_soc_info da850_edma_info[] = { | |
| 127 | + { | |
| 128 | + .n_channel = 32, | |
| 129 | + .n_region = 4, | |
| 130 | + .n_slot = 128, | |
| 131 | + .n_tc = 2, | |
| 132 | + .n_cc = 1, | |
| 133 | + .queue_tc_mapping = da8xx_queue_tc_mapping, | |
| 134 | + .queue_priority_mapping = da8xx_queue_priority_mapping, | |
| 135 | + }, | |
| 136 | + { | |
| 137 | + .n_channel = 32, | |
| 138 | + .n_region = 4, | |
| 139 | + .n_slot = 128, | |
| 140 | + .n_tc = 1, | |
| 141 | + .n_cc = 1, | |
| 142 | + .queue_tc_mapping = da850_queue_tc_mapping, | |
| 143 | + .queue_priority_mapping = da850_queue_priority_mapping, | |
| 144 | + }, | |
| 145 | +}; | |
| 146 | + | |
| 147 | +static struct resource da830_edma_resources[] = { | |
| 118 | 148 | { |
| 119 | 149 | .name = "edma_cc0", |
| 120 | 150 | .start = DA8XX_TPCC_BASE, |
| @@ -145,19 +175,91 @@ static struct resource da8xx_edma_resources[] = { · 24 unmodified lines | ||
| 145 | 175 | }, |
| 146 | 176 | }; |
| 147 | 177 | |
| 148 | −static struct platform_device da8xx_edma_device = { | |
| 178 | +static struct resource da850_edma_resources[] = { | |
| 179 | + { | |
| 180 | + .name = "edma_cc0", | |
| 181 | + .start = DA8XX_TPCC_BASE, | |
| 182 | + .end = DA8XX_TPCC_BASE + SZ_32K - 1, | |
| 183 | + .flags = IORESOURCE_MEM, | |
| 184 | + }, | |
| 185 | + { | |
| 186 | + .name = "edma_tc0", | |
| 187 | + .start = DA8XX_TPTC0_BASE, | |
| 188 | + .end = DA8XX_TPTC0_BASE + SZ_1K - 1, | |
| 189 | + .flags = IORESOURCE_MEM, | |
| 190 | + }, | |
| 191 | + { | |
| 192 | + .name = "edma_tc1", | |
| 193 | + .start = DA8XX_TPTC1_BASE, | |
| 194 | + .end = DA8XX_TPTC1_BASE + SZ_1K - 1, | |
| 195 | + .flags = IORESOURCE_MEM, | |
| 196 | + }, | |
| 197 | + { | |
| 198 | + .name = "edma_cc1", | |
| 199 | + .start = DA850_TPCC1_BASE, | |
| 200 | + .end = DA850_TPCC1_BASE + SZ_32K - 1, | |
| 201 | + .flags = IORESOURCE_MEM, | |
| 202 | + }, | |
| 203 | + { | |
| 204 | + .name = "edma_tc2", | |
| 205 | + .start = DA850_TPTC2_BASE, | |
| 206 | + .end = DA850_TPTC2_BASE + SZ_1K - 1, | |
| 207 | + .flags = IORESOURCE_MEM, | |
| 208 | + }, | |
| 209 | + { | |
| 210 | + .name = "edma0", | |
| 211 | + .start = IRQ_DA8XX_CCINT0, | |
| 212 | + .flags = IORESOURCE_IRQ, | |
| 213 | + }, | |
| 214 | + { | |
| 215 | + .name = "edma0_err", | |
| 216 | + .start = IRQ_DA8XX_CCERRINT, | |
| 217 | + .flags = IORESOURCE_IRQ, | |
| 218 | + }, | |
| 219 | + { | |
| 220 | + .name = "edma1", | |
| 221 | + .start = IRQ_DA850_CCINT1, | |
| 222 | + .flags = IORESOURCE_IRQ, | |
| 223 | + }, | |
| 224 | + { | |
| 225 | + .name = "edma1_err", | |
| 226 | + .start = IRQ_DA850_CCERRINT1, | |
| 227 | + .flags = IORESOURCE_IRQ, | |
| 228 | + }, | |
| 229 | +}; | |
| 230 | + | |
| 231 | +static struct platform_device da830_edma_device = { | |
| 149 | 232 | .name = "edma", |
| 150 | 233 | .id = -1, |
| 151 | 234 | .dev = { |
| 152 | − .platform_data = da8xx_edma_info, | |
| 235 | + .platform_data = da830_edma_info, | |
| 153 | 236 | }, |
| 154 | − .num_resources = ARRAY_SIZE(da8xx_edma_resources), | |
| 155 | − .resource = da8xx_edma_resources, | |
| 237 | + .num_resources = ARRAY_SIZE(da830_edma_resources), | |
| 238 | + .resource = da830_edma_resources, | |
| 239 | +}; | |
| 240 | + | |
| 241 | +static struct platform_device da850_edma_device = { | |
| 242 | + .name = "edma", | |
| 243 | + .id = -1, | |
| 244 | + .dev = { | |
| 245 | + .platform_data = da850_edma_info, | |
| 246 | + }, | |
| 247 | + .num_resources = ARRAY_SIZE(da850_edma_resources), | |
| 248 | + .resource = da850_edma_resources, | |
| 156 | 249 | }; |
| 157 | 250 | |
| 158 | 251 | int __init da8xx_register_edma(void) |
| 159 | 252 | { |
| 160 | − return platform_device_register(&da8xx_edma_device); | |
| 253 | + struct platform_device *pdev; | |
| 254 | + | |
| 255 | + if (cpu_is_davinci_da830()) | |
| 256 | + pdev = &da830_edma_device; | |
| 257 | + else if (cpu_is_davinci_da850()) | |
| 258 | + pdev = &da850_edma_device; | |
| 259 | + else | |
| 260 | + return -ENODEV; | |
| 261 | + | |
| 262 | + return platform_device_register(pdev); | |
| 161 | 263 | } |
| 162 | 264 | |
| 163 | 265 | static struct resource da8xx_i2c_resources0[] = { |
| @@ -495,6 +597,19 @@ int da8xx_register_rtc(void) · 331 unmodified lines | ||
| 495 | 597 | return ret; |
| 496 | 598 | } |
| 497 | 599 | |
| 600 | +static void __iomem *da8xx_ddr2_ctlr_base; | |
| 601 | +void __iomem * __init da8xx_get_mem_ctlr(void) | |
| 602 | +{ | |
| 603 | + if (da8xx_ddr2_ctlr_base) | |
| 604 | + return da8xx_ddr2_ctlr_base; | |
| 605 | + | |
| 606 | + da8xx_ddr2_ctlr_base = ioremap(DA8XX_DDR2_CTL_BASE, SZ_32K); | |
| 607 | + if (!da8xx_ddr2_ctlr_base) | |
| 608 | + pr_warning("%s: Unable to map DDR2 controller", __func__); | |
| 609 | + | |
| 610 | + return da8xx_ddr2_ctlr_base; | |
| 611 | +} | |
| 612 | + | |
| 498 | 613 | static struct resource da8xx_cpuidle_resources[] = { |
| 499 | 614 | { |
| 500 | 615 | .start = DA8XX_DDR2_CTL_BASE, |
| @@ -520,6 +635,7 @@ static struct platform_device da8xx_cpuidle_device = { · 19 unmodified lines | ||
| 520 | 635 | |
| 521 | 636 | int __init da8xx_register_cpuidle(void) |
| 522 | 637 | { |
| 638 | + da8xx_cpuidle_pdata.ddr2_ctlr_base = da8xx_get_mem_ctlr(); | |
| 639 | + | |
| 523 | 640 | return platform_device_register(&da8xx_cpuidle_device); |
| 524 | 641 | } |
| 525 | − | |
| @@ -29,6 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | #include <mach/serial.h> |
| 30 | 30 | #include <mach/common.h> |
| 31 | 31 | #include <mach/asp.h> |
| 32 | +#include <mach/spi.h> | |
| 32 | 33 | |
| 33 | 34 | #include "clock.h" |
| 34 | 35 | #include "mux.h" |
| @@ -125,7 +126,6 @@ static struct clk vpss_slave_clk = { · 90 unmodified lines | ||
| 125 | 126 | .lpsc = DAVINCI_LPSC_VPSSSLV, |
| 126 | 127 | }; |
| 127 | 128 | |
| 128 | − | |
| 129 | 129 | static struct clk clkout1_clk = { |
| 130 | 130 | .name = "clkout1", |
| 131 | 131 | .parent = &pll1_aux_clk, |
| @@ -335,7 +335,7 @@ static struct clk usb_clk = { · 203 unmodified lines | ||
| 335 | 335 | .lpsc = DAVINCI_LPSC_USB, |
| 336 | 336 | }; |
| 337 | 337 | |
| 338 | −static struct davinci_clk dm355_clks[] = { | |
| 338 | +static struct clk_lookup dm355_clks[] = { | |
| 339 | 339 | CLK(NULL, "ref", &ref_clk), |
| 340 | 340 | CLK(NULL, "pll1", &pll1_clk), |
| 341 | 341 | CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), |
| @@ -363,9 +363,9 @@ static struct davinci_clk dm355_clks[] = { · 21 unmodified lines | ||
| 363 | 363 | CLK("davinci-asp.1", NULL, &asp1_clk), |
| 364 | 364 | CLK("davinci_mmc.0", NULL, &mmcsd0_clk), |
| 365 | 365 | CLK("davinci_mmc.1", NULL, &mmcsd1_clk), |
| 366 | − CLK(NULL, "spi0", &spi0_clk), | |
| 367 | − CLK(NULL, "spi1", &spi1_clk), | |
| 368 | − CLK(NULL, "spi2", &spi2_clk), | |
| 366 | + CLK("spi_davinci.0", NULL, &spi0_clk), | |
| 367 | + CLK("spi_davinci.1", NULL, &spi1_clk), | |
| 368 | + CLK("spi_davinci.2", NULL, &spi2_clk), | |
| 369 | 369 | CLK(NULL, "gpio", &gpio_clk), |
| 370 | 370 | CLK(NULL, "aemif", &aemif_clk), |
| 371 | 371 | CLK(NULL, "pwm0", &pwm0_clk), |
| @@ -392,24 +392,40 @@ static struct resource dm355_spi0_resources[] = { · 20 unmodified lines | ||
| 392 | 392 | .flags = IORESOURCE_MEM, |
| 393 | 393 | }, |
| 394 | 394 | { |
| 395 | − .start = IRQ_DM355_SPINT0_1, | |
| 395 | + .start = IRQ_DM355_SPINT0_0, | |
| 396 | 396 | .flags = IORESOURCE_IRQ, |
| 397 | 397 | }, |
| 398 | − /* Not yet used, so not included: | |
| 399 | − * IORESOURCE_IRQ: | |
| 400 | − * - IRQ_DM355_SPINT0_0 | |
| 401 | − * IORESOURCE_DMA: | |
| 402 | − * - DAVINCI_DMA_SPI_SPIX | |
| 403 | − * - DAVINCI_DMA_SPI_SPIR | |
| 404 | − */ | |
| 398 | + { | |
| 399 | + .start = 17, | |
| 400 | + .flags = IORESOURCE_DMA, | |
| 401 | + }, | |
| 402 | + { | |
| 403 | + .start = 16, | |
| 404 | + .flags = IORESOURCE_DMA, | |
| 405 | + }, | |
| 406 | + { | |
| 407 | + .start = EVENTQ_1, | |
| 408 | + .flags = IORESOURCE_DMA, | |
| 409 | + }, | |
| 405 | 410 | }; |
| 406 | 411 | |
| 412 | +static struct davinci_spi_platform_data dm355_spi0_pdata = { | |
| 413 | + .version = SPI_VERSION_1, | |
| 414 | + .num_chipselect = 2, | |
| 415 | + .clk_internal = 1, | |
| 416 | + .cs_hold = 1, | |
| 417 | + .intr_level = 0, | |
| 418 | + .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ | |
| 419 | + .c2tdelay = 0, | |
| 420 | + .t2cdelay = 0, | |
| 421 | +}; | |
| 407 | 422 | static struct platform_device dm355_spi0_device = { |
| 408 | 423 | .name = "spi_davinci", |
| 409 | 424 | .id = 0, |
| 410 | 425 | .dev = { |
| 411 | 426 | .dma_mask = &dm355_spi0_dma_mask, |
| 412 | 427 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 428 | + .platform_data = &dm355_spi0_pdata, | |
| 413 | 429 | }, |
| 414 | 430 | .num_resources = ARRAY_SIZE(dm355_spi0_resources), |
| 415 | 431 | .resource = dm355_spi0_resources, |
| @@ -564,13 +580,6 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = { · 148 unmodified lines | ||
| 564 | 580 | |
| 565 | 581 | /*----------------------------------------------------------------------*/ |
| 566 | 582 | |
| 567 | −static const s8 dma_chan_dm355_no_event[] = { | |
| 568 | − 12, 13, 24, 56, 57, | |
| 569 | − 58, 59, 60, 61, 62, | |
| 570 | − 63, | |
| 571 | − -1 | |
| 572 | −}; | |
| 573 | − | |
| 574 | 583 | static const s8 |
| 575 | 584 | queue_tc_mapping[][2] = { |
| 576 | 585 | /* {event queue no, TC no} */ |
| @@ -594,7 +603,6 @@ static struct edma_soc_info dm355_edma_info[] = { · 17 unmodified lines | ||
| 594 | 603 | .n_slot = 128, |
| 595 | 604 | .n_tc = 2, |
| 596 | 605 | .n_cc = 1, |
| 597 | − .noevent = dma_chan_dm355_no_event, | |
| 598 | 606 | .queue_tc_mapping = queue_tc_mapping, |
| 599 | 607 | .queue_priority_mapping = queue_priority_mapping, |
| 600 | 608 | }, |
| @@ -665,6 +673,17 @@ static struct platform_device dm355_asp1_device = { · 64 unmodified lines | ||
| 665 | 673 | .resource = dm355_asp1_resources, |
| 666 | 674 | }; |
| 667 | 675 | |
| 676 | +static void dm355_ccdc_setup_pinmux(void) | |
| 677 | +{ | |
| 678 | + davinci_cfg_reg(DM355_VIN_PCLK); | |
| 679 | + davinci_cfg_reg(DM355_VIN_CAM_WEN); | |
| 680 | + davinci_cfg_reg(DM355_VIN_CAM_VD); | |
| 681 | + davinci_cfg_reg(DM355_VIN_CAM_HD); | |
| 682 | + davinci_cfg_reg(DM355_VIN_YIN_EN); | |
| 683 | + davinci_cfg_reg(DM355_VIN_CINL_EN); | |
| 684 | + davinci_cfg_reg(DM355_VIN_CINH_EN); | |
| 685 | +} | |
| 686 | + | |
| 668 | 687 | static struct resource dm355_vpss_resources[] = { |
| 669 | 688 | { |
| 670 | 689 | /* VPSS BL Base address */ |
| @@ -701,6 +720,10 @@ static struct resource vpfe_resources[] = { · 30 unmodified lines | ||
| 701 | 720 | .end = IRQ_VDINT1, |
| 702 | 721 | .flags = IORESOURCE_IRQ, |
| 703 | 722 | }, |
| 723 | +}; | |
| 724 | + | |
| 725 | +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | |
| 726 | +static struct resource dm355_ccdc_resource[] = { | |
| 704 | 727 | /* CCDC Base address */ |
| 705 | 728 | { |
| 706 | 729 | .flags = IORESOURCE_MEM, |
| @@ -708,8 +731,18 @@ static struct resource vpfe_resources[] = { · 1 unmodified line | ||
| 708 | 731 | .end = 0x01c70600 + 0x1ff, |
| 709 | 732 | }, |
| 710 | 733 | }; |
| 734 | +static struct platform_device dm355_ccdc_dev = { | |
| 735 | + .name = "dm355_ccdc", | |
| 736 | + .id = -1, | |
| 737 | + .num_resources = ARRAY_SIZE(dm355_ccdc_resource), | |
| 738 | + .resource = dm355_ccdc_resource, | |
| 739 | + .dev = { | |
| 740 | + .dma_mask = &vpfe_capture_dma_mask, | |
| 741 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 742 | + .platform_data = dm355_ccdc_setup_pinmux, | |
| 743 | + }, | |
| 744 | +}; | |
| 711 | 745 | |
| 712 | −static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | |
| 713 | 746 | static struct platform_device vpfe_capture_dev = { |
| 714 | 747 | .name = CAPTURE_DRV_NAME, |
| 715 | 748 | .id = -1, |
| @@ -857,20 +890,13 @@ static int __init dm355_init_devices(void) · 141 unmodified lines | ||
| 857 | 890 | if (!cpu_is_davinci_dm355()) |
| 858 | 891 | return 0; |
| 859 | 892 | |
| 893 | + /* Add ccdc clock aliases */ | |
| 894 | + clk_add_alias("master", dm355_ccdc_dev.name, "vpss_master", NULL); | |
| 895 | + clk_add_alias("slave", dm355_ccdc_dev.name, "vpss_master", NULL); | |
| 860 | 896 | davinci_cfg_reg(DM355_INT_EDMA_CC); |
| 861 | 897 | platform_device_register(&dm355_edma_device); |
| 862 | 898 | platform_device_register(&dm355_vpss_device); |
| 863 | − /* | |
| 864 | − * setup Mux configuration for vpfe input and register | |
| 865 | − * vpfe capture platform device | |
| 866 | − */ | |
| 867 | − davinci_cfg_reg(DM355_VIN_PCLK); | |
| 868 | − davinci_cfg_reg(DM355_VIN_CAM_WEN); | |
| 869 | − davinci_cfg_reg(DM355_VIN_CAM_VD); | |
| 870 | − davinci_cfg_reg(DM355_VIN_CAM_HD); | |
| 871 | − davinci_cfg_reg(DM355_VIN_YIN_EN); | |
| 872 | − davinci_cfg_reg(DM355_VIN_CINL_EN); | |
| 873 | − davinci_cfg_reg(DM355_VIN_CINH_EN); | |
| 899 | + platform_device_register(&dm355_ccdc_dev); | |
| 874 | 900 | platform_device_register(&vpfe_capture_dev); |
| 875 | 901 | |
| 876 | 902 | return 0; |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | #include <linux/platform_device.h> |
| 19 | 19 | #include <linux/dma-mapping.h> |
| 20 | 20 | #include <linux/gpio.h> |
| 21 | +#include <linux/spi/spi.h> | |
| 21 | 22 | |
| 22 | 23 | #include <asm/mach/map.h> |
| 23 | 24 | |
| @@ -32,6 +33,8 @@ · 8 unmodified lines | ||
| 32 | 33 | #include <mach/common.h> |
| 33 | 34 | #include <mach/asp.h> |
| 34 | 35 | #include <mach/keyscan.h> |
| 36 | +#include <mach/spi.h> | |
| 37 | + | |
| 35 | 38 | |
| 36 | 39 | #include "clock.h" |
| 37 | 40 | #include "mux.h" |
| @@ -403,7 +406,7 @@ static struct clk mjcp_clk = { · 365 unmodified lines | ||
| 403 | 406 | .lpsc = DM365_LPSC_MJCP, |
| 404 | 407 | }; |
| 405 | 408 | |
| 406 | −static struct davinci_clk dm365_clks[] = { | |
| 409 | +static struct clk_lookup dm365_clks[] = { | |
| 407 | 410 | CLK(NULL, "ref", &ref_clk), |
| 408 | 411 | CLK(NULL, "pll1", &pll1_clk), |
| 409 | 412 | CLK(NULL, "pll1_aux", &pll1_aux_clk), |
| @@ -455,7 +458,7 @@ static struct davinci_clk dm365_clks[] = { · 45 unmodified lines | ||
| 455 | 458 | CLK(NULL, "timer3", &timer3_clk), |
| 456 | 459 | CLK(NULL, "usb", &usb_clk), |
| 457 | 460 | CLK("davinci_emac.1", NULL, &emac_clk), |
| 458 | − CLK("voice_codec", NULL, &voicecodec_clk), | |
| 461 | + CLK("davinci_voicecodec", NULL, &voicecodec_clk), | |
| 459 | 462 | CLK("davinci-asp.0", NULL, &asp0_clk), |
| 460 | 463 | CLK(NULL, "rto", &rto_clk), |
| 461 | 464 | CLK(NULL, "mjcp", &mjcp_clk), |
| @@ -606,9 +609,78 @@ INT_CFG(DM365, INT_NSF_DISABLE, 25, 1, 0, false) · 144 unmodified lines | ||
| 606 | 609 | |
| 607 | 610 | EVT_CFG(DM365, EVT2_ASP_TX, 0, 1, 0, false) |
| 608 | 611 | EVT_CFG(DM365, EVT3_ASP_RX, 1, 1, 0, false) |
| 612 | +EVT_CFG(DM365, EVT2_VC_TX, 0, 1, 1, false) | |
| 613 | +EVT_CFG(DM365, EVT3_VC_RX, 1, 1, 1, false) | |
| 609 | 614 | #endif |
| 610 | 615 | }; |
| 611 | 616 | |
| 617 | +static u64 dm365_spi0_dma_mask = DMA_BIT_MASK(32); | |
| 618 | + | |
| 619 | +static struct davinci_spi_platform_data dm365_spi0_pdata = { | |
| 620 | + .version = SPI_VERSION_1, | |
| 621 | + .num_chipselect = 2, | |
| 622 | + .clk_internal = 1, | |
| 623 | + .cs_hold = 1, | |
| 624 | + .intr_level = 0, | |
| 625 | + .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */ | |
| 626 | + .c2tdelay = 0, | |
| 627 | + .t2cdelay = 0, | |
| 628 | +}; | |
| 629 | + | |
| 630 | +static struct resource dm365_spi0_resources[] = { | |
| 631 | + { | |
| 632 | + .start = 0x01c66000, | |
| 633 | + .end = 0x01c667ff, | |
| 634 | + .flags = IORESOURCE_MEM, | |
| 635 | + }, | |
| 636 | + { | |
| 637 | + .start = IRQ_DM365_SPIINT0_0, | |
| 638 | + .flags = IORESOURCE_IRQ, | |
| 639 | + }, | |
| 640 | + { | |
| 641 | + .start = 17, | |
| 642 | + .flags = IORESOURCE_DMA, | |
| 643 | + }, | |
| 644 | + { | |
| 645 | + .start = 16, | |
| 646 | + .flags = IORESOURCE_DMA, | |
| 647 | + }, | |
| 648 | + { | |
| 649 | + .start = EVENTQ_3, | |
| 650 | + .flags = IORESOURCE_DMA, | |
| 651 | + }, | |
| 652 | +}; | |
| 653 | + | |
| 654 | +static struct platform_device dm365_spi0_device = { | |
| 655 | + .name = "spi_davinci", | |
| 656 | + .id = 0, | |
| 657 | + .dev = { | |
| 658 | + .dma_mask = &dm365_spi0_dma_mask, | |
| 659 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 660 | + .platform_data = &dm365_spi0_pdata, | |
| 661 | + }, | |
| 662 | + .num_resources = ARRAY_SIZE(dm365_spi0_resources), | |
| 663 | + .resource = dm365_spi0_resources, | |
| 664 | +}; | |
| 665 | + | |
| 666 | +void __init dm365_init_spi0(unsigned chipselect_mask, | |
| 667 | + struct spi_board_info *info, unsigned len) | |
| 668 | +{ | |
| 669 | + davinci_cfg_reg(DM365_SPI0_SCLK); | |
| 670 | + davinci_cfg_reg(DM365_SPI0_SDI); | |
| 671 | + davinci_cfg_reg(DM365_SPI0_SDO); | |
| 672 | + | |
| 673 | + /* not all slaves will be wired up */ | |
| 674 | + if (chipselect_mask & BIT(0)) | |
| 675 | + davinci_cfg_reg(DM365_SPI0_SDENA0); | |
| 676 | + if (chipselect_mask & BIT(1)) | |
| 677 | + davinci_cfg_reg(DM365_SPI0_SDENA1); | |
| 678 | + | |
| 679 | + spi_register_board_info(info, len); | |
| 680 | + | |
| 681 | + platform_device_register(&dm365_spi0_device); | |
| 682 | +} | |
| 683 | + | |
| 612 | 684 | static struct emac_platform_data dm365_emac_pdata = { |
| 613 | 685 | .ctrl_reg_offset = DM365_EMAC_CNTRL_OFFSET, |
| 614 | 686 | .ctrl_mod_reg_offset = DM365_EMAC_CNTRL_MOD_OFFSET, |
| @@ -754,7 +826,7 @@ static struct edma_soc_info dm365_edma_info[] = { · 139 unmodified lines | ||
| 754 | 826 | .n_cc = 1, |
| 755 | 827 | .queue_tc_mapping = dm365_queue_tc_mapping, |
| 756 | 828 | .queue_priority_mapping = dm365_queue_priority_mapping, |
| 757 | − .default_queue = EVENTQ_2, | |
| 829 | + .default_queue = EVENTQ_3, | |
| 758 | 830 | }, |
| 759 | 831 | }; |
| 760 | 832 | |
| @@ -835,6 +907,31 @@ static struct platform_device dm365_asp_device = { · 74 unmodified lines | ||
| 835 | 907 | .resource = dm365_asp_resources, |
| 836 | 908 | }; |
| 837 | 909 | |
| 910 | +static struct resource dm365_vc_resources[] = { | |
| 911 | + { | |
| 912 | + .start = DAVINCI_DM365_VC_BASE, | |
| 913 | + .end = DAVINCI_DM365_VC_BASE + SZ_1K - 1, | |
| 914 | + .flags = IORESOURCE_MEM, | |
| 915 | + }, | |
| 916 | + { | |
| 917 | + .start = DAVINCI_DMA_VC_TX, | |
| 918 | + .end = DAVINCI_DMA_VC_TX, | |
| 919 | + .flags = IORESOURCE_DMA, | |
| 920 | + }, | |
| 921 | + { | |
| 922 | + .start = DAVINCI_DMA_VC_RX, | |
| 923 | + .end = DAVINCI_DMA_VC_RX, | |
| 924 | + .flags = IORESOURCE_DMA, | |
| 925 | + }, | |
| 926 | +}; | |
| 927 | + | |
| 928 | +static struct platform_device dm365_vc_device = { | |
| 929 | + .name = "davinci_voicecodec", | |
| 930 | + .id = -1, | |
| 931 | + .num_resources = ARRAY_SIZE(dm365_vc_resources), | |
| 932 | + .resource = dm365_vc_resources, | |
| 933 | +}; | |
| 934 | + | |
| 838 | 935 | static struct resource dm365_rtc_resources[] = { |
| 839 | 936 | { |
| 840 | 937 | .start = DM365_RTC_BASE, |
| @@ -991,6 +1088,14 @@ void __init dm365_init_asp(struct snd_platform_data *pdata) · 150 unmodified lines | ||
| 991 | 1088 | platform_device_register(&dm365_asp_device); |
| 992 | 1089 | } |
| 993 | 1090 | |
| 1091 | +void __init dm365_init_vc(struct snd_platform_data *pdata) | |
| 1092 | +{ | |
| 1093 | + davinci_cfg_reg(DM365_EVT2_VC_TX); | |
| 1094 | + davinci_cfg_reg(DM365_EVT3_VC_RX); | |
| 1095 | + dm365_vc_device.dev.platform_data = pdata; | |
| 1096 | + platform_device_register(&dm365_vc_device); | |
| 1097 | +} | |
| 1098 | + | |
| 994 | 1099 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata) |
| 995 | 1100 | { |
| 996 | 1101 | dm365_ks_device.dev.platform_data = pdata; |
| @@ -1008,6 +1113,97 @@ void __init dm365_init(void) · 11 unmodified lines | ||
| 1008 | 1113 | davinci_common_init(&davinci_soc_info_dm365); |
| 1009 | 1114 | } |
| 1010 | 1115 | |
| 1116 | +static struct resource dm365_vpss_resources[] = { | |
| 1117 | + { | |
| 1118 | + /* VPSS ISP5 Base address */ | |
| 1119 | + .name = "isp5", | |
| 1120 | + .start = 0x01c70000, | |
| 1121 | + .end = 0x01c70000 + 0xff, | |
| 1122 | + .flags = IORESOURCE_MEM, | |
| 1123 | + }, | |
| 1124 | + { | |
| 1125 | + /* VPSS CLK Base address */ | |
| 1126 | + .name = "vpss", | |
| 1127 | + .start = 0x01c70200, | |
| 1128 | + .end = 0x01c70200 + 0xff, | |
| 1129 | + .flags = IORESOURCE_MEM, | |
| 1130 | + }, | |
| 1131 | +}; | |
| 1132 | + | |
| 1133 | +static struct platform_device dm365_vpss_device = { | |
| 1134 | + .name = "vpss", | |
| 1135 | + .id = -1, | |
| 1136 | + .dev.platform_data = "dm365_vpss", | |
| 1137 | + .num_resources = ARRAY_SIZE(dm365_vpss_resources), | |
| 1138 | + .resource = dm365_vpss_resources, | |
| 1139 | +}; | |
| 1140 | + | |
| 1141 | +static struct resource vpfe_resources[] = { | |
| 1142 | + { | |
| 1143 | + .start = IRQ_VDINT0, | |
| 1144 | + .end = IRQ_VDINT0, | |
| 1145 | + .flags = IORESOURCE_IRQ, | |
| 1146 | + }, | |
| 1147 | + { | |
| 1148 | + .start = IRQ_VDINT1, | |
| 1149 | + .end = IRQ_VDINT1, | |
| 1150 | + .flags = IORESOURCE_IRQ, | |
| 1151 | + }, | |
| 1152 | +}; | |
| 1153 | + | |
| 1154 | +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | |
| 1155 | +static struct platform_device vpfe_capture_dev = { | |
| 1156 | + .name = CAPTURE_DRV_NAME, | |
| 1157 | + .id = -1, | |
| 1158 | + .num_resources = ARRAY_SIZE(vpfe_resources), | |
| 1159 | + .resource = vpfe_resources, | |
| 1160 | + .dev = { | |
| 1161 | + .dma_mask = &vpfe_capture_dma_mask, | |
| 1162 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 1163 | + }, | |
| 1164 | +}; | |
| 1165 | + | |
| 1166 | +static void dm365_isif_setup_pinmux(void) | |
| 1167 | +{ | |
| 1168 | + davinci_cfg_reg(DM365_VIN_CAM_WEN); | |
| 1169 | + davinci_cfg_reg(DM365_VIN_CAM_VD); | |
| 1170 | + davinci_cfg_reg(DM365_VIN_CAM_HD); | |
| 1171 | + davinci_cfg_reg(DM365_VIN_YIN4_7_EN); | |
| 1172 | + davinci_cfg_reg(DM365_VIN_YIN0_3_EN); | |
| 1173 | +} | |
| 1174 | + | |
| 1175 | +static struct resource isif_resource[] = { | |
| 1176 | + /* ISIF Base address */ | |
| 1177 | + { | |
| 1178 | + .start = 0x01c71000, | |
| 1179 | + .end = 0x01c71000 + 0x1ff, | |
| 1180 | + .flags = IORESOURCE_MEM, | |
| 1181 | + }, | |
| 1182 | + /* ISIF Linearization table 0 */ | |
| 1183 | + { | |
| 1184 | + .start = 0x1C7C000, | |
| 1185 | + .end = 0x1C7C000 + 0x2ff, | |
| 1186 | + .flags = IORESOURCE_MEM, | |
| 1187 | + }, | |
| 1188 | + /* ISIF Linearization table 1 */ | |
| 1189 | + { | |
| 1190 | + .start = 0x1C7C400, | |
| 1191 | + .end = 0x1C7C400 + 0x2ff, | |
| 1192 | + .flags = IORESOURCE_MEM, | |
| 1193 | + }, | |
| 1194 | +}; | |
| 1195 | +static struct platform_device dm365_isif_dev = { | |
| 1196 | + .name = "isif", | |
| 1197 | + .id = -1, | |
| 1198 | + .num_resources = ARRAY_SIZE(isif_resource), | |
| 1199 | + .resource = isif_resource, | |
| 1200 | + .dev = { | |
| 1201 | + .dma_mask = &vpfe_capture_dma_mask, | |
| 1202 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 1203 | + .platform_data = dm365_isif_setup_pinmux, | |
| 1204 | + }, | |
| 1205 | +}; | |
| 1206 | + | |
| 1011 | 1207 | static int __init dm365_init_devices(void) |
| 1012 | 1208 | { |
| 1013 | 1209 | if (!cpu_is_davinci_dm365()) |
| @@ -1016,7 +1212,16 @@ static int __init dm365_init_devices(void) · 2 unmodified lines | ||
| 1016 | 1212 | davinci_cfg_reg(DM365_INT_EDMA_CC); |
| 1017 | 1213 | platform_device_register(&dm365_edma_device); |
| 1018 | 1214 | platform_device_register(&dm365_emac_device); |
| 1019 | − | |
| 1215 | + /* Add isif clock alias */ | |
| 1216 | + clk_add_alias("master", dm365_isif_dev.name, "vpss_master", NULL); | |
| 1217 | + platform_device_register(&dm365_vpss_device); | |
| 1218 | + platform_device_register(&dm365_isif_dev); | |
| 1219 | + platform_device_register(&vpfe_capture_dev); | |
| 1020 | 1220 | return 0; |
| 1021 | 1221 | } |
| 1022 | 1222 | postcore_initcall(dm365_init_devices); |
| 1223 | + | |
| 1224 | +void dm365_set_vpfe_config(struct vpfe_config *cfg) | |
| 1225 | +{ | |
| 1226 | + vpfe_capture_dev.dev.platform_data = cfg; | |
| 1227 | +} | |
| @@ -277,7 +277,7 @@ static struct clk timer2_clk = { · 276 unmodified lines | ||
| 277 | 277 | .usecount = 1, /* REVISIT: why cant' this be disabled? */ |
| 278 | 278 | }; |
| 279 | 279 | |
| 280 | −struct davinci_clk dm644x_clks[] = { | |
| 280 | +struct clk_lookup dm644x_clks[] = { | |
| 281 | 281 | CLK(NULL, "ref", &ref_clk), |
| 282 | 282 | CLK(NULL, "pll1", &pll1_clk), |
| 283 | 283 | CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), |
| @@ -479,15 +479,6 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = { · 195 unmodified lines | ||
| 479 | 479 | |
| 480 | 480 | /*----------------------------------------------------------------------*/ |
| 481 | 481 | |
| 482 | −static const s8 dma_chan_dm644x_no_event[] = { | |
| 483 | − 0, 1, 12, 13, 14, | |
| 484 | − 15, 25, 30, 31, 45, | |
| 485 | − 46, 47, 55, 56, 57, | |
| 486 | − 58, 59, 60, 61, 62, | |
| 487 | − 63, | |
| 488 | − -1 | |
| 489 | −}; | |
| 490 | − | |
| 491 | 482 | static const s8 |
| 492 | 483 | queue_tc_mapping[][2] = { |
| 493 | 484 | /* {event queue no, TC no} */ |
| @@ -511,7 +502,6 @@ static struct edma_soc_info dm644x_edma_info[] = { · 17 unmodified lines | ||
| 511 | 502 | .n_slot = 128, |
| 512 | 503 | .n_tc = 2, |
| 513 | 504 | .n_cc = 1, |
| 514 | − .noevent = dma_chan_dm644x_no_event, | |
| 515 | 505 | .queue_tc_mapping = queue_tc_mapping, |
| 516 | 506 | .queue_priority_mapping = queue_priority_mapping, |
| 517 | 507 | }, |
| @@ -612,6 +602,11 @@ static struct resource vpfe_resources[] = { · 94 unmodified lines | ||
| 612 | 602 | .end = IRQ_VDINT1, |
| 613 | 603 | .flags = IORESOURCE_IRQ, |
| 614 | 604 | }, |
| 605 | +}; | |
| 606 | + | |
| 607 | +static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | |
| 608 | +static struct resource dm644x_ccdc_resource[] = { | |
| 609 | + /* CCDC Base address */ | |
| 615 | 610 | { |
| 616 | 611 | .start = 0x01c70400, |
| 617 | 612 | .end = 0x01c70400 + 0xff, |
| @@ -619,7 +614,17 @@ static struct resource vpfe_resources[] = { · 1 unmodified line | ||
| 619 | 614 | }, |
| 620 | 615 | }; |
| 621 | 616 | |
| 622 | −static u64 vpfe_capture_dma_mask = DMA_BIT_MASK(32); | |
| 617 | +static struct platform_device dm644x_ccdc_dev = { | |
| 618 | + .name = "dm644x_ccdc", | |
| 619 | + .id = -1, | |
| 620 | + .num_resources = ARRAY_SIZE(dm644x_ccdc_resource), | |
| 621 | + .resource = dm644x_ccdc_resource, | |
| 622 | + .dev = { | |
| 623 | + .dma_mask = &vpfe_capture_dma_mask, | |
| 624 | + .coherent_dma_mask = DMA_BIT_MASK(32), | |
| 625 | + }, | |
| 626 | +}; | |
| 627 | + | |
| 623 | 628 | static struct platform_device vpfe_capture_dev = { |
| 624 | 629 | .name = CAPTURE_DRV_NAME, |
| 625 | 630 | .id = -1, |
| @@ -769,9 +774,13 @@ static int __init dm644x_init_devices(void) · 143 unmodified lines | ||
| 769 | 774 | if (!cpu_is_davinci_dm644x()) |
| 770 | 775 | return 0; |
| 771 | 776 | |
| 777 | + /* Add ccdc clock aliases */ | |
| 778 | + clk_add_alias("master", dm644x_ccdc_dev.name, "vpss_master", NULL); | |
| 779 | + clk_add_alias("slave", dm644x_ccdc_dev.name, "vpss_slave", NULL); | |
| 772 | 780 | platform_device_register(&dm644x_edma_device); |
| 773 | 781 | platform_device_register(&dm644x_emac_device); |
| 774 | 782 | platform_device_register(&dm644x_vpss_device); |
| 783 | + platform_device_register(&dm644x_ccdc_dev); | |
| 775 | 784 | platform_device_register(&vpfe_capture_dev); |
| 776 | 785 | |
| 777 | 786 | return 0; |
| @@ -42,7 +42,6 @@ · 41 unmodified lines | ||
| 42 | 42 | /* |
| 43 | 43 | * Device specific clocks |
| 44 | 44 | */ |
| 45 | −#define DM646X_REF_FREQ 27000000 | |
| 46 | 45 | #define DM646X_AUX_FREQ 24000000 |
| 47 | 46 | |
| 48 | 47 | static struct pll_data pll1_data = { |
| @@ -57,7 +56,6 @@ static struct pll_data pll2_data = { · 8 unmodified lines | ||
| 57 | 56 | |
| 58 | 57 | static struct clk ref_clk = { |
| 59 | 58 | .name = "ref_clk", |
| 60 | − .rate = DM646X_REF_FREQ, | |
| 61 | 59 | }; |
| 62 | 60 | |
| 63 | 61 | static struct clk aux_clkin = { |
| @@ -313,7 +311,7 @@ static struct clk vpif1_clk = { · 249 unmodified lines | ||
| 313 | 311 | .flags = ALWAYS_ENABLED, |
| 314 | 312 | }; |
| 315 | 313 | |
| 316 | −struct davinci_clk dm646x_clks[] = { | |
| 314 | +struct clk_lookup dm646x_clks[] = { | |
| 317 | 315 | CLK(NULL, "ref", &ref_clk), |
| 318 | 316 | CLK(NULL, "aux", &aux_clkin), |
| 319 | 317 | CLK(NULL, "pll1", &pll1_clk), |
| @@ -513,14 +511,6 @@ static u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = { · 193 unmodified lines | ||
| 513 | 511 | |
| 514 | 512 | /*----------------------------------------------------------------------*/ |
| 515 | 513 | |
| 516 | −static const s8 dma_chan_dm646x_no_event[] = { | |
| 517 | − 0, 1, 2, 3, 13, | |
| 518 | − 14, 15, 24, 25, 26, | |
| 519 | − 27, 30, 31, 54, 55, | |
| 520 | − 56, | |
| 521 | − -1 | |
| 522 | −}; | |
| 523 | − | |
| 524 | 514 | /* Four Transfer Controllers on DM646x */ |
| 525 | 515 | static const s8 |
| 526 | 516 | dm646x_queue_tc_mapping[][2] = { |
| @@ -549,7 +539,6 @@ static struct edma_soc_info dm646x_edma_info[] = { · 22 unmodified lines | ||
| 549 | 539 | .n_slot = 512, |
| 550 | 540 | .n_tc = 4, |
| 551 | 541 | .n_cc = 1, |
| 552 | − .noevent = dma_chan_dm646x_no_event, | |
| 553 | 542 | .queue_tc_mapping = dm646x_queue_tc_mapping, |
| 554 | 543 | .queue_priority_mapping = dm646x_queue_priority_mapping, |
| 555 | 544 | }, |
| @@ -925,6 +914,7 @@ void dm646x_setup_vpif(struct vpif_display_config *display_config, · 369 unmodified lines | ||
| 925 | 914 | |
| 926 | 915 | void __init dm646x_init(void) |
| 927 | 916 | { |
| 917 | + dm646x_board_setup_refclk(&ref_clk); | |
| 928 | 918 | davinci_common_init(&davinci_soc_info_dm646x); |
| 929 | 919 | } |
| 930 | 920 | |
| @@ -226,11 +226,11 @@ struct edma { · 225 unmodified lines | ||
| 226 | 226 | */ |
| 227 | 227 | DECLARE_BITMAP(edma_inuse, EDMA_MAX_PARAMENTRY); |
| 228 | 228 | |
| 229 | − /* The edma_noevent bit for each channel is clear unless | |
| 230 | − * it doesn't trigger DMA events on this platform. It uses a | |
| 231 | − * bit of SOC-specific initialization code. | |
| 229 | + /* The edma_unused bit for each channel is clear unless | |
| 230 | + * it is not being used on this platform. It uses a bit | |
| 231 | + * of SOC-specific initialization code. | |
| 232 | 232 | */ |
| 233 | − DECLARE_BITMAP(edma_noevent, EDMA_MAX_DMACH); | |
| 233 | + DECLARE_BITMAP(edma_unused, EDMA_MAX_DMACH); | |
| 234 | 234 | |
| 235 | 235 | unsigned irq_res_start; |
| 236 | 236 | unsigned irq_res_end; |
| @@ -243,6 +243,7 @@ struct edma { · 6 unmodified lines | ||
| 243 | 243 | }; |
| 244 | 244 | |
| 245 | 245 | static struct edma *edma_info[EDMA_MAX_CC]; |
| 246 | +static int arch_num_cc; | |
| 246 | 247 | |
| 247 | 248 | /* dummy param set used to (re)initialize parameter RAM slots */ |
| 248 | 249 | static const struct edmacc_param dummy_paramset = { |
| @@ -555,8 +556,27 @@ static int reserve_contiguous_slots(int ctlr, unsigned int id, · 306 unmodified lines | ||
| 555 | 556 | return EDMA_CTLR_CHAN(ctlr, i - num_slots + 1); |
| 556 | 557 | } |
| 557 | 558 | |
| 559 | +static int prepare_unused_channel_list(struct device *dev, void *data) | |
| 560 | +{ | |
| 561 | + struct platform_device *pdev = to_platform_device(dev); | |
| 562 | + int i, ctlr; | |
| 563 | + | |
| 564 | + for (i = 0; i < pdev->num_resources; i++) { | |
| 565 | + if ((pdev->resource[i].flags & IORESOURCE_DMA) && | |
| 566 | + (int)pdev->resource[i].start >= 0) { | |
| 567 | + ctlr = EDMA_CTLR(pdev->resource[i].start); | |
| 568 | + clear_bit(EDMA_CHAN_SLOT(pdev->resource[i].start), | |
| 569 | + edma_info[ctlr]->edma_unused); | |
| 570 | + } | |
| 571 | + } | |
| 572 | + | |
| 573 | + return 0; | |
| 574 | +} | |
| 575 | + | |
| 558 | 576 | /*-----------------------------------------------------------------------*/ |
| 559 | 577 | |
| 578 | +static bool unused_chan_list_done; | |
| 579 | + | |
| 560 | 580 | /* Resource alloc/free: dma channels, parameter RAM slots */ |
| 561 | 581 | |
| 562 | 582 | /** |
| @@ -594,7 +614,22 @@ int edma_alloc_channel(int channel, · 31 unmodified lines | ||
| 594 | 614 | void *data, |
| 595 | 615 | enum dma_event_q eventq_no) |
| 596 | 616 | { |
| 597 | − unsigned i, done, ctlr = 0; | |
| 617 | + unsigned i, done = 0, ctlr = 0; | |
| 618 | + int ret = 0; | |
| 619 | + | |
| 620 | + if (!unused_chan_list_done) { | |
| 621 | + /* | |
| 622 | + * Scan all the platform devices to find out the EDMA channels | |
| 623 | + * used and clear them in the unused list, making the rest | |
| 624 | + * available for ARM usage. | |
| 625 | + */ | |
| 626 | + ret = bus_for_each_dev(&platform_bus_type, NULL, NULL, | |
| 627 | + prepare_unused_channel_list); | |
| 628 | + if (ret < 0) | |
| 629 | + return ret; | |
| 630 | + | |
| 631 | + unused_chan_list_done = true; | |
| 632 | + } | |
| 598 | 633 | |
| 599 | 634 | if (channel >= 0) { |
| 600 | 635 | ctlr = EDMA_CTLR(channel); |
| @@ -602,15 +637,15 @@ int edma_alloc_channel(int channel, · 1 unmodified line | ||
| 602 | 637 | } |
| 603 | 638 | |
| 604 | 639 | if (channel < 0) { |
| 605 | − for (i = 0; i < EDMA_MAX_CC; i++) { | |
| 640 | + for (i = 0; i < arch_num_cc; i++) { | |
| 606 | 641 | channel = 0; |
| 607 | 642 | for (;;) { |
| 608 | 643 | channel = find_next_bit(edma_info[i]-> |
| 609 | − edma_noevent, | |
| 644 | + edma_unused, | |
| 610 | 645 | edma_info[i]->num_channels, |
| 611 | 646 | channel); |
| 612 | 647 | if (channel == edma_info[i]->num_channels) |
| 613 | − return -ENOMEM; | |
| 648 | + break; | |
| 614 | 649 | if (!test_and_set_bit(channel, |
| 615 | 650 | edma_info[i]->edma_inuse)) { |
| 616 | 651 | done = 1; |
| @@ -622,6 +657,8 @@ int edma_alloc_channel(int channel, · 5 unmodified lines | ||
| 622 | 657 | if (done) |
| 623 | 658 | break; |
| 624 | 659 | } |
| 660 | + if (!done) | |
| 661 | + return -ENOMEM; | |
| 625 | 662 | } else if (channel >= edma_info[ctlr]->num_channels) { |
| 626 | 663 | return -EINVAL; |
| 627 | 664 | } else if (test_and_set_bit(channel, edma_info[ctlr]->edma_inuse)) { |
| @@ -642,7 +679,7 @@ int edma_alloc_channel(int channel, · 14 unmodified lines | ||
| 642 | 679 | |
| 643 | 680 | map_dmach_queue(ctlr, channel, eventq_no); |
| 644 | 681 | |
| 645 | − return channel; | |
| 682 | + return EDMA_CTLR_CHAN(ctlr, channel); | |
| 646 | 683 | } |
| 647 | 684 | EXPORT_SYMBOL(edma_alloc_channel); |
| 648 | 685 | |
| @@ -1219,7 +1256,7 @@ int edma_start(unsigned channel) · 570 unmodified lines | ||
| 1219 | 1256 | unsigned int mask = (1 << (channel & 0x1f)); |
| 1220 | 1257 | |
| 1221 | 1258 | /* EDMA channels without event association */ |
| 1222 | − if (test_bit(channel, edma_info[ctlr]->edma_noevent)) { | |
| 1259 | + if (test_bit(channel, edma_info[ctlr]->edma_unused)) { | |
| 1223 | 1260 | pr_debug("EDMA: ESR%d %08x\n", j, |
| 1224 | 1261 | edma_shadow0_read_array(ctlr, SH_ESR, j)); |
| 1225 | 1262 | edma_shadow0_write_array(ctlr, SH_ESR, j, mask); |
| @@ -1344,7 +1381,6 @@ static int __init edma_probe(struct platform_device *pdev) · 118 unmodified lines | ||
| 1344 | 1381 | const s8 (*queue_tc_mapping)[2]; |
| 1345 | 1382 | int i, j, found = 0; |
| 1346 | 1383 | int status = -1; |
| 1347 | − const s8 *noevent; | |
| 1348 | 1384 | int irq[EDMA_MAX_CC] = {0, 0}; |
| 1349 | 1385 | int err_irq[EDMA_MAX_CC] = {0, 0}; |
| 1350 | 1386 | struct resource *r[EDMA_MAX_CC] = {NULL}; |
| @@ -1407,11 +1443,9 @@ static int __init edma_probe(struct platform_device *pdev) · 56 unmodified lines | ||
| 1407 | 1443 | memcpy_toio(edmacc_regs_base[j] + PARM_OFFSET(i), |
| 1408 | 1444 | &dummy_paramset, PARM_SIZE); |
| 1409 | 1445 | |
| 1410 | − noevent = info[j].noevent; | |
| 1411 | − if (noevent) { | |
| 1412 | − while (*noevent != -1) | |
| 1413 | − set_bit(*noevent++, edma_info[j]->edma_noevent); | |
| 1414 | − } | |
| 1446 | + /* Mark all channels as unused */ | |
| 1447 | + memset(edma_info[j]->edma_unused, 0xff, | |
| 1448 | + sizeof(edma_info[j]->edma_unused)); | |
| 1415 | 1449 | |
| 1416 | 1450 | sprintf(irq_name, "edma%d", j); |
| 1417 | 1451 | irq[j] = platform_get_irq_byname(pdev, irq_name); |
| @@ -1467,6 +1501,7 @@ static int __init edma_probe(struct platform_device *pdev) · 49 unmodified lines | ||
| 1467 | 1501 | edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); |
| 1468 | 1502 | edma_write_array(j, EDMA_QRAE, i, 0x0); |
| 1469 | 1503 | } |
| 1504 | + arch_num_cc++; | |
| 1470 | 1505 | } |
| 1471 | 1506 | |
| 1472 | 1507 | if (tc_errs_handled) { |
| @@ -0,0 +1,19 @@ | ||
| 1 | +/* | |
| 2 | + * TI CDCE949 off-chip clock synthesizer support | |
| 3 | + * | |
| 4 | + * 2009 (C) Texas Instruments, Inc. http://www.ti.com/ | |
| 5 | + * | |
| 6 | + * This file is licensed under the terms of the GNU General Public License | |
| 7 | + * version 2. This program is licensed "as is" without any warranty of any | |
| 8 | + * kind, whether express or implied. | |
| 9 | + */ | |
| 10 | +#ifndef _MACH_DAVINCI_CDCE949_H | |
| 11 | +#define _MACH_DAVINCI_CDCE949_H | |
| 12 | + | |
| 13 | +#include <linux/clk.h> | |
| 14 | + | |
| 15 | +#include <mach/clock.h> | |
| 16 | + | |
| 17 | +int cdce_set_rate(struct clk *clk, unsigned long rate); | |
| 18 | + | |
| 19 | +#endif | |
| @@ -43,7 +43,7 @@ struct davinci_soc_info { · 42 unmodified lines | ||
| 43 | 43 | void __iomem *jtag_id_base; |
| 44 | 44 | struct davinci_id *ids; |
| 45 | 45 | unsigned long ids_num; |
| 46 | − struct davinci_clk *cpu_clks; | |
| 46 | + struct clk_lookup *cpu_clks; | |
| 47 | 47 | void __iomem **psc_bases; |
| 48 | 48 | unsigned long psc_bases_num; |
| 49 | 49 | void __iomem *pinmux_base; |
| @@ -12,6 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | |
| 13 | 13 | struct davinci_cpuidle_config { |
| 14 | 14 | u32 ddr2_pdown; |
| 15 | + void __iomem *ddr2_ctlr_base; | |
| 15 | 16 | }; |
| 16 | 17 | |
| 17 | 18 | #endif |
| @@ -13,15 +13,17 @@ · 12 unmodified lines | ||
| 13 | 13 | |
| 14 | 14 | #include <video/da8xx-fb.h> |
| 15 | 15 | |
| 16 | +#include <linux/davinci_emac.h> | |
| 16 | 17 | #include <mach/serial.h> |
| 17 | 18 | #include <mach/edma.h> |
| 18 | 19 | #include <mach/i2c.h> |
| 19 | −#include <mach/emac.h> | |
| 20 | 20 | #include <mach/asp.h> |
| 21 | 21 | #include <mach/mmc.h> |
| 22 | 22 | #include <mach/usb.h> |
| 23 | +#include <mach/pm.h> | |
| 23 | 24 | |
| 24 | −extern void __iomem *da8xx_syscfg_base; | |
| 25 | +extern void __iomem *da8xx_syscfg0_base; | |
| 26 | +extern void __iomem *da8xx_syscfg1_base; | |
| 25 | 27 | |
| 26 | 28 | /* |
| 27 | 29 | * The cp_intc interrupt controller for the da8xx isn't in the same |
| @@ -34,13 +36,17 @@ extern void __iomem *da8xx_syscfg_base; · 6 unmodified lines | ||
| 34 | 36 | #define DA8XX_CP_INTC_SIZE SZ_8K |
| 35 | 37 | #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) |
| 36 | 38 | |
| 37 | −#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) | |
| 38 | −#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) | |
| 39 | +#define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000) | |
| 40 | +#define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) | |
| 39 | 41 | #define DA8XX_JTAG_ID_REG 0x18 |
| 40 | 42 | #define DA8XX_CFGCHIP0_REG 0x17c |
| 41 | 43 | #define DA8XX_CFGCHIP2_REG 0x184 |
| 42 | 44 | #define DA8XX_CFGCHIP3_REG 0x188 |
| 43 | 45 | |
| 46 | +#define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) | |
| 47 | +#define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) | |
| 48 | +#define DA8XX_DEEPSLEEP_REG 0x8 | |
| 49 | + | |
| 44 | 50 | #define DA8XX_PSC0_BASE 0x01c10000 |
| 45 | 51 | #define DA8XX_PLL0_BASE 0x01c11000 |
| 46 | 52 | #define DA8XX_TIMER64P0_BASE 0x01c20000 |
| @@ -48,11 +54,13 @@ extern void __iomem *da8xx_syscfg_base; · 1 unmodified line | ||
| 48 | 54 | #define DA8XX_GPIO_BASE 0x01e26000 |
| 49 | 55 | #define DA8XX_PSC1_BASE 0x01e27000 |
| 50 | 56 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 |
| 57 | +#define DA8XX_PLL1_BASE 0x01e1a000 | |
| 51 | 58 | #define DA8XX_MMCSD0_BASE 0x01c40000 |
| 52 | 59 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 |
| 53 | 60 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 |
| 54 | 61 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 |
| 55 | 62 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 |
| 63 | +#define DA8XX_ARM_RAM_BASE 0xffff0000 | |
| 56 | 64 | |
| 57 | 65 | #define PINMUX0 0x00 |
| 58 | 66 | #define PINMUX1 0x04 |
| @@ -90,6 +98,8 @@ void __init da8xx_register_mcasp(int id, struct snd_platform_data *pdata); · 31 unmodified lines | ||
| 90 | 98 | int da8xx_register_rtc(void); |
| 91 | 99 | int da850_register_cpufreq(void); |
| 92 | 100 | int da8xx_register_cpuidle(void); |
| 101 | +void __iomem * __init da8xx_get_mem_ctlr(void); | |
| 102 | +int da850_register_pm(struct platform_device *pdev); | |
| 93 | 103 | |
| 94 | 104 | extern struct platform_device da8xx_serial_device; |
| 95 | 105 | extern struct emac_platform_data da8xx_emac_pdata; |
| @@ -19,7 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/serial_reg.h> |
| 20 | 20 | #define UART_SHIFT 2 |
| 21 | 21 | |
| 22 | − .macro addruart, rx | |
| 22 | + .macro addruart, rx, tmp | |
| 23 | 23 | mrc p15, 0, \rx, c1, c0 |
| 24 | 24 | tst \rx, #1 @ MMU enabled? |
| 25 | 25 | moveq \rx, #0x01000000 @ physical base address |
| @@ -14,10 +14,11 @@ · 13 unmodified lines | ||
| 14 | 14 | #define __ASM_ARCH_DM665_H |
| 15 | 15 | |
| 16 | 16 | #include <linux/platform_device.h> |
| 17 | +#include <linux/davinci_emac.h> | |
| 17 | 18 | #include <mach/hardware.h> |
| 18 | −#include <mach/emac.h> | |
| 19 | 19 | #include <mach/asp.h> |
| 20 | 20 | #include <mach/keyscan.h> |
| 21 | +#include <media/davinci/vpfe_capture.h> | |
| 21 | 22 | |
| 22 | 23 | #define DM365_EMAC_BASE (0x01D07000) |
| 23 | 24 | #define DM365_EMAC_CNTRL_OFFSET (0x0000) |
| @@ -31,9 +32,17 @@ · 7 unmodified lines | ||
| 31 | 32 | |
| 32 | 33 | #define DM365_RTC_BASE (0x01C69000) |
| 33 | 34 | |
| 35 | +#define DAVINCI_DM365_VC_BASE (0x01D0C000) | |
| 36 | +#define DAVINCI_DMA_VC_TX 2 | |
| 37 | +#define DAVINCI_DMA_VC_RX 3 | |
| 38 | + | |
| 34 | 39 | void __init dm365_init(void); |
| 35 | 40 | void __init dm365_init_asp(struct snd_platform_data *pdata); |
| 41 | +void __init dm365_init_vc(struct snd_platform_data *pdata); | |
| 36 | 42 | void __init dm365_init_ks(struct davinci_ks_platform_data *pdata); |
| 37 | 43 | void __init dm365_init_rtc(void); |
| 44 | +void dm365_init_spi0(unsigned chipselect_mask, | |
| 45 | + struct spi_board_info *info, unsigned len); | |
| 38 | 46 | |
| 47 | +void dm365_set_vpfe_config(struct vpfe_config *cfg); | |
| 39 | 48 | #endif /* __ASM_ARCH_DM365_H */ |
| @@ -22,8 +22,8 @@ · 21 unmodified lines | ||
| 22 | 22 | #ifndef __ASM_ARCH_DM644X_H |
| 23 | 23 | #define __ASM_ARCH_DM644X_H |
| 24 | 24 | |
| 25 | +#include <linux/davinci_emac.h> | |
| 25 | 26 | #include <mach/hardware.h> |
| 26 | −#include <mach/emac.h> | |
| 27 | 27 | #include <mach/asp.h> |
| 28 | 28 | #include <media/davinci/vpfe_capture.h> |
| 29 | 29 | |
| @@ -12,10 +12,11 @@ · 11 unmodified lines | ||
| 12 | 12 | #define __ASM_ARCH_DM646X_H |
| 13 | 13 | |
| 14 | 14 | #include <mach/hardware.h> |
| 15 | −#include <mach/emac.h> | |
| 16 | 15 | #include <mach/asp.h> |
| 17 | 16 | #include <linux/i2c.h> |
| 18 | 17 | #include <linux/videodev2.h> |
| 18 | +#include <linux/clk.h> | |
| 19 | +#include <linux/davinci_emac.h> | |
| 19 | 20 | |
| 20 | 21 | #define DM646X_EMAC_BASE (0x01C80000) |
| 21 | 22 | #define DM646X_EMAC_CNTRL_OFFSET (0x0000) |
| @@ -30,6 +31,7 @@ void __init dm646x_init(void); · 8 unmodified lines | ||
| 30 | 31 | void __init dm646x_init_ide(void); |
| 31 | 32 | void __init dm646x_init_mcasp0(struct snd_platform_data *pdata); |
| 32 | 33 | void __init dm646x_init_mcasp1(struct snd_platform_data *pdata); |
| 34 | +void __init dm646x_board_setup_refclk(struct clk *clk); | |
| 33 | 35 | |
| 34 | 36 | void dm646x_video_init(void); |
| 35 | 37 | |
| @@ -280,8 +280,6 @@ struct edma_soc_info { · 279 unmodified lines | ||
| 280 | 280 | unsigned n_cc; |
| 281 | 281 | enum dma_event_q default_queue; |
| 282 | 282 | |
| 283 | − /* list of channels with no even trigger; terminated by "-1" */ | |
| 284 | − const s8 *noevent; | |
| 285 | 283 | const s8 (*queue_tc_mapping)[2]; |
| 286 | 284 | const s8 (*queue_priority_mapping)[2]; |
| 287 | 285 | }; |
| @@ -27,7 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | /* |
| 28 | 28 | * I/O mapping |
| 29 | 29 | */ |
| 30 | −#define IO_PHYS 0x01c00000 | |
| 30 | +#define IO_PHYS 0x01c00000UL | |
| 31 | 31 | #define IO_OFFSET 0xfd000000 /* Virtual IO = 0xfec00000 */ |
| 32 | 32 | #define IO_SIZE 0x00400000 |
| 33 | 33 | #define IO_VIRT (IO_PHYS + IO_OFFSET) |
| @@ -16,6 +16,8 @@ · 15 unmodified lines | ||
| 16 | 16 | struct davinci_i2c_platform_data { |
| 17 | 17 | unsigned int bus_freq; /* standard bus frequency (kHz) */ |
| 18 | 18 | unsigned int bus_delay; /* post-transaction delay (usec) */ |
| 19 | + unsigned int sda_pin; /* GPIO pin ID to use for SDA */ | |
| 20 | + unsigned int scl_pin; /* GPIO pin ID to use for SCL */ | |
| 19 | 21 | }; |
| 20 | 22 | |
| 21 | 23 | /* for board setup code */ |
| @@ -31,6 +31,11 @@ · 30 unmodified lines | ||
| 31 | 31 | #define PHYS_OFFSET DAVINCI_DDR_BASE |
| 32 | 32 | #endif |
| 33 | 33 | |
| 34 | +#define DDR2_SDRCR_OFFSET 0xc | |
| 35 | +#define DDR2_SRPD_BIT BIT(23) | |
| 36 | +#define DDR2_MCLKSTOPEN_BIT BIT(30) | |
| 37 | +#define DDR2_LPMODEN_BIT BIT(31) | |
| 38 | + | |
| 34 | 39 | /* |
| 35 | 40 | * Increase size of DMA-consistent memory region |
| 36 | 41 | */ |
| @@ -327,6 +327,8 @@ enum davinci_dm365_index { · 326 unmodified lines | ||
| 327 | 327 | /* EDMA event muxing */ |
| 328 | 328 | DM365_EVT2_ASP_TX, |
| 329 | 329 | DM365_EVT3_ASP_RX, |
| 330 | + DM365_EVT2_VC_TX, | |
| 331 | + DM365_EVT3_VC_RX, | |
| 330 | 332 | DM365_EVT26_MMC0_RX, |
| 331 | 333 | }; |
| 332 | 334 | |
| @@ -899,6 +901,7 @@ enum davinci_da850_index { · 566 unmodified lines | ||
| 899 | 901 | DA850_GPIO2_15, |
| 900 | 902 | DA850_GPIO4_0, |
| 901 | 903 | DA850_GPIO4_1, |
| 904 | + DA850_RTC_ALARM, | |
| 902 | 905 | }; |
| 903 | 906 | |
| 904 | 907 | #ifdef CONFIG_DAVINCI_MUX |
| @@ -0,0 +1,54 @@ | ||
| 1 | +/* | |
| 2 | + * TI DaVinci platform support for power management. | |
| 3 | + * | |
| 4 | + * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/ | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or | |
| 7 | + * modify it under the terms of the GNU General Public License as | |
| 8 | + * published by the Free Software Foundation version 2. | |
| 9 | + * | |
| 10 | + * This program is distributed "as is" WITHOUT ANY WARRANTY of any | |
| 11 | + * kind, whether express or implied; without even the implied warranty | |
| 12 | + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | + * GNU General Public License for more details. | |
| 14 | + */ | |
| 15 | +#ifndef _MACH_DAVINCI_PM_H | |
| 16 | +#define _MACH_DAVINCI_PM_H | |
| 17 | + | |
| 18 | +/* | |
| 19 | + * Caution: Assembly code in sleep.S makes assumtion on the order | |
| 20 | + * of the members of this structure. | |
| 21 | + */ | |
| 22 | +struct davinci_pm_config { | |
| 23 | + void __iomem *ddr2_ctlr_base; | |
| 24 | + void __iomem *ddrpsc_reg_base; | |
| 25 | + int ddrpsc_num; | |
| 26 | + void __iomem *ddrpll_reg_base; | |
| 27 | + void __iomem *deepsleep_reg; | |
| 28 | + void __iomem *cpupll_reg_base; | |
| 29 | + /* | |
| 30 | + * Note on SLEEPCOUNT: | |
| 31 | + * The SLEEPCOUNT feature is mainly intended for cases in which | |
| 32 | + * the internal oscillator is used. The internal oscillator is | |
| 33 | + * fully disabled in deep sleep mode. When you exist deep sleep | |
| 34 | + * mode, the oscillator will be turned on and will generate very | |
| 35 | + * small oscillations which will not be detected by the deep sleep | |
| 36 | + * counter. Eventually those oscillations will grow to an amplitude | |
| 37 | + * large enough to start incrementing the deep sleep counter. | |
| 38 | + * In this case recommendation from hardware engineers is that the | |
| 39 | + * SLEEPCOUNT be set to 4096. This means that 4096 valid clock cycles | |
| 40 | + * must be detected before the clock is passed to the rest of the | |
| 41 | + * system. | |
| 42 | + * In the case that the internal oscillator is not used and the | |
| 43 | + * clock is generated externally, the SLEEPCOUNT value can be very | |
| 44 | + * small since the clock input is assumed to be stable before SoC | |
| 45 | + * is taken out of deepsleep mode. A value of 128 would be more than | |
| 46 | + * adequate. | |
| 47 | + */ | |
| 48 | + int sleepcount; | |
| 49 | +}; | |
| 50 | + | |
| 51 | +extern unsigned int davinci_cpu_suspend_sz; | |
| 52 | +extern void davinci_cpu_suspend(struct davinci_pm_config *); | |
| 53 | + | |
| 54 | +#endif | |
| @@ -180,8 +180,23 @@ · 179 unmodified lines | ||
| 180 | 180 | #define DA8XX_LPSC1_CR_P3_SS 26 |
| 181 | 181 | #define DA8XX_LPSC1_L3_CBA_RAM 31 |
| 182 | 182 | |
| 183 | +/* PSC register offsets */ | |
| 184 | +#define EPCPR 0x070 | |
| 185 | +#define PTCMD 0x120 | |
| 186 | +#define PTSTAT 0x128 | |
| 187 | +#define PDSTAT 0x200 | |
| 188 | +#define PDCTL1 0x304 | |
| 189 | +#define MDSTAT 0x800 | |
| 190 | +#define MDCTL 0xA00 | |
| 191 | + | |
| 192 | +#define MDSTAT_STATE_MASK 0x1f | |
| 193 | + | |
| 194 | +#ifndef __ASSEMBLER__ | |
| 195 | + | |
| 183 | 196 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); |
| 184 | 197 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
| 185 | 198 | unsigned int id, char enable); |
| 186 | 199 | |
| 200 | +#endif | |
| 201 | + | |
| 187 | 202 | #endif /* __ASM_ARCH_PSC_H */ |
| @@ -0,0 +1,44 @@ | ||
| 1 | +/* | |
| 2 | + * Copyright 2009 Texas Instruments. | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License as published by | |
| 6 | + * the Free Software Foundation; either version 2 of the License, or | |
| 7 | + * (at your option) any later version. | |
| 8 | + * | |
| 9 | + * This program is distributed in the hope that it will be useful, | |
| 10 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 12 | + * GNU General Public License for more details. | |
| 13 | + * | |
| 14 | + * You should have received a copy of the GNU General Public License | |
| 15 | + * along with this program; if not, write to the Free Software | |
| 16 | + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
| 17 | + */ | |
| 18 | + | |
| 19 | +#ifndef __ARCH_ARM_DAVINCI_SPI_H | |
| 20 | +#define __ARCH_ARM_DAVINCI_SPI_H | |
| 21 | + | |
| 22 | +enum { | |
| 23 | + SPI_VERSION_1, /* For DM355/DM365/DM6467 */ | |
| 24 | + SPI_VERSION_2, /* For DA8xx */ | |
| 25 | +}; | |
| 26 | + | |
| 27 | +struct davinci_spi_platform_data { | |
| 28 | + u8 version; | |
| 29 | + u8 num_chipselect; | |
| 30 | + u8 wdelay; | |
| 31 | + u8 odd_parity; | |
| 32 | + u8 parity_enable; | |
| 33 | + u8 wait_enable; | |
| 34 | + u8 timer_disable; | |
| 35 | + u8 clk_internal; | |
| 36 | + u8 cs_hold; | |
| 37 | + u8 intr_level; | |
| 38 | + u8 poll_mode; | |
| 39 | + u8 use_dma; | |
| 40 | + u8 c2tdelay; | |
| 41 | + u8 t2cdelay; | |
| 42 | +}; | |
| 43 | + | |
| 44 | +#endif /* __ARCH_ARM_DAVINCI_SPI_H */ | |
| @@ -11,7 +11,12 @@ · 10 unmodified lines | ||
| 11 | 11 | #ifndef __ASM_ARCH_TIMEX_H |
| 12 | 12 | #define __ASM_ARCH_TIMEX_H |
| 13 | 13 | |
| 14 | −/* The source frequency for the timers is the 27MHz clock */ | |
| 14 | +/* | |
| 15 | + * Alert: Not all timers of the DaVinci family run at a frequency of 27MHz, | |
| 16 | + * but we should be fine as long as CLOCK_TICK_RATE or LATCH (see include/ | |
| 17 | + * linux/jiffies.h) are not used directly in code. Currently none of the | |
| 18 | + * code relevant to DaVinci platform depends on these values directly. | |
| 19 | + */ | |
| 15 | 20 | #define CLOCK_TICK_RATE 27000000 |
| 16 | 21 | |
| 17 | 22 | #endif /* __ASM_ARCH_TIMEX_H__ */ |
| @@ -24,7 +24,7 @@ void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type) · 23 unmodified lines | ||
| 24 | 24 | if (BETWEEN(p, IO_PHYS, IO_SIZE)) |
| 25 | 25 | return XLATE(p, IO_PHYS, IO_VIRT); |
| 26 | 26 | |
| 27 | − return __arm_ioremap(p, size, type); | |
| 27 | + return __arm_ioremap_caller(p, size, type, __builtin_return_address(0)); | |
| 28 | 28 | } |
| 29 | 29 | EXPORT_SYMBOL(davinci_ioremap); |
| 30 | 30 | |
| @@ -0,0 +1,158 @@ | ||
| 1 | +/* | |
| 2 | + * DaVinci Power Management Routines | |
| 3 | + * | |
| 4 | + * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/ | |
| 5 | + * | |
| 6 | + * This program is free software; you can redistribute it and/or modify | |
| 7 | + * it under the terms of the GNU General Public License version 2 as | |
| 8 | + * published by the Free Software Foundation. | |
| 9 | + */ | |
| 10 | + | |
| 11 | +#include <linux/pm.h> | |
| 12 | +#include <linux/suspend.h> | |
| 13 | +#include <linux/module.h> | |
| 14 | +#include <linux/platform_device.h> | |
| 15 | +#include <linux/clk.h> | |
| 16 | +#include <linux/spinlock.h> | |
| 17 | + | |
| 18 | +#include <asm/cacheflush.h> | |
| 19 | +#include <asm/delay.h> | |
| 20 | + | |
| 21 | +#include <mach/da8xx.h> | |
| 22 | +#include <mach/sram.h> | |
| 23 | +#include <mach/pm.h> | |
| 24 | + | |
| 25 | +#include "clock.h" | |
| 26 | + | |
| 27 | +#define DEEPSLEEP_SLEEPCOUNT_MASK 0xFFFF | |
| 28 | + | |
| 29 | +static void (*davinci_sram_suspend) (struct davinci_pm_config *); | |
| 30 | +static struct davinci_pm_config *pdata; | |
| 31 | + | |
| 32 | +static void davinci_sram_push(void *dest, void *src, unsigned int size) | |
| 33 | +{ | |
| 34 | + memcpy(dest, src, size); | |
| 35 | + flush_icache_range((unsigned long)dest, (unsigned long)(dest + size)); | |
| 36 | +} | |
| 37 | + | |
| 38 | +static void davinci_pm_suspend(void) | |
| 39 | +{ | |
| 40 | + unsigned val; | |
| 41 | + | |
| 42 | + if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) { | |
| 43 | + | |
| 44 | + /* Switch CPU PLL to bypass mode */ | |
| 45 | + val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); | |
| 46 | + val &= ~(PLLCTL_PLLENSRC | PLLCTL_PLLEN); | |
| 47 | + __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); | |
| 48 | + | |
| 49 | + udelay(PLL_BYPASS_TIME); | |
| 50 | + | |
| 51 | + /* Powerdown CPU PLL */ | |
| 52 | + val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); | |
| 53 | + val |= PLLCTL_PLLPWRDN; | |
| 54 | + __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); | |
| 55 | + } | |
| 56 | + | |
| 57 | + /* Configure sleep count in deep sleep register */ | |
| 58 | + val = __raw_readl(pdata->deepsleep_reg); | |
| 59 | + val &= ~DEEPSLEEP_SLEEPCOUNT_MASK, | |
| 60 | + val |= pdata->sleepcount; | |
| 61 | + __raw_writel(val, pdata->deepsleep_reg); | |
| 62 | + | |
| 63 | + /* System goes to sleep in this call */ | |
| 64 | + davinci_sram_suspend(pdata); | |
| 65 | + | |
| 66 | + if (pdata->cpupll_reg_base != pdata->ddrpll_reg_base) { | |
| 67 | + | |
| 68 | + /* put CPU PLL in reset */ | |
| 69 | + val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); | |
| 70 | + val &= ~PLLCTL_PLLRST; | |
| 71 | + __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); | |
| 72 | + | |
| 73 | + /* put CPU PLL in power down */ | |
| 74 | + val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); | |
| 75 | + val &= ~PLLCTL_PLLPWRDN; | |
| 76 | + __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); | |
| 77 | + | |
| 78 | + /* wait for CPU PLL reset */ | |
| 79 | + udelay(PLL_RESET_TIME); | |
| 80 | + | |
| 81 | + /* bring CPU PLL out of reset */ | |
| 82 | + val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); | |
| 83 | + val |= PLLCTL_PLLRST; | |
| 84 | + __raw_writel(val, pdata->cpupll_reg_base + PLLCTL); | |
| 85 | + | |
| 86 | + /* Wait for CPU PLL to lock */ | |
| 87 | + udelay(PLL_LOCK_TIME); | |
| 88 | + | |
| 89 | + /* Remove CPU PLL from bypass mode */ | |
| 90 | + val = __raw_readl(pdata->cpupll_reg_base + PLLCTL); | |
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