History

Merge branch 'ena-dynamic-queue-sizes'

Sameeh Jubran says: ==================== Support for dynamic queue size changes This patchset introduces the following: * add new admin command for supporting different queue size for Tx/Rx * add support for Tx/Rx queues size modification through ethtool * allow queues allocation backoff when low on memory * update driver version Difference from v2: * Dropped superfluous range checks which are already done in ethtool. [patch 5/7] * Dropped inline keyword from function. [patch 4/7] * Added a new patch which drops inline keyword all *.c files. [patch 6/7] Difference from v1: * Changed ena_update_queue_sizes() signature to use u32 instead of int type for the size arguments. [patch 5/7] ====================

David S. Miller committed 7 years ago

Commit e0ffbd32 parents f2dec9a dbbc6e67 files · +403 −143Browse files

Unified · Split

7 files
  1. drivers/net/ethernet/amazon/ena/ena_admin_defs.h +54 −2
  2. drivers/net/ethernet/amazon/ena/ena_com.c +51 −31
  3. drivers/net/ethernet/amazon/ena/ena_com.h +3 −0
  4. drivers/net/ethernet/amazon/ena/ena_eth_com.c +13 −13
  5. drivers/net/ethernet/amazon/ena/ena_ethtool.c +26 −6
  6. drivers/net/ethernet/amazon/ena/ena_netdev.c +232 −87
  7. drivers/net/ethernet/amazon/ena/ena_netdev.h +24 −4
drivers/net/ethernet/amazon/ena/ena_admin_defs.h+54−2
@@ -64,6 +64,7 @@ enum ena_admin_aq_feature_id { · 63 unmodified lines
64 ENA_ADMIN_LLQ = 4,64 ENA_ADMIN_LLQ = 4,
65 ENA_ADMIN_EXTRA_PROPERTIES_STRINGS = 5,65 ENA_ADMIN_EXTRA_PROPERTIES_STRINGS = 5,
66 ENA_ADMIN_EXTRA_PROPERTIES_FLAGS = 6,66 ENA_ADMIN_EXTRA_PROPERTIES_FLAGS = 6,
67 ENA_ADMIN_MAX_QUEUES_EXT = 7,
67 ENA_ADMIN_RSS_HASH_FUNCTION = 10,68 ENA_ADMIN_RSS_HASH_FUNCTION = 10,
68 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG = 11,69 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG = 11,
69 ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG = 12,70 ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG = 12,
@@ -425,7 +426,13 @@ struct ena_admin_get_set_feature_common_desc { · 355 unmodified lines
425 /* as appears in ena_admin_aq_feature_id */426 /* as appears in ena_admin_aq_feature_id */
426 u8 feature_id;427 u8 feature_id;
427 428
428 u16 reserved16;429 /* The driver specifies the max feature version it supports and the
430 * device responds with the currently supported feature version. The
431 * field is zero based
432 */
433 u8 feature_version;
434
435 u8 reserved8;
429};436};
430 437
431struct ena_admin_device_attr_feature_desc {438struct ena_admin_device_attr_feature_desc {
@@ -535,6 +542,34 @@ struct ena_admin_feature_llq_desc { · 103 unmodified lines
535 u32 max_tx_burst_size;542 u32 max_tx_burst_size;
536};543};
537 544
545struct ena_admin_queue_ext_feature_fields {
546 u32 max_tx_sq_num;
547
548 u32 max_tx_cq_num;
549
550 u32 max_rx_sq_num;
551
552 u32 max_rx_cq_num;
553
554 u32 max_tx_sq_depth;
555
556 u32 max_tx_cq_depth;
557
558 u32 max_rx_sq_depth;
559
560 u32 max_rx_cq_depth;
561
562 u32 max_tx_header_size;
563
564 /* Maximum Descriptors number, including meta descriptor, allowed for
565 * a single Tx packet
566 */
567 u16 max_per_packet_tx_descs;
568
569 /* Maximum Descriptors number allowed for a single Rx packet */
570 u16 max_per_packet_rx_descs;
571};
572
538struct ena_admin_queue_feature_desc {573struct ena_admin_queue_feature_desc {
539 u32 max_sq_num;574 u32 max_sq_num;
540 575
@@ -849,6 +884,19 @@ struct ena_admin_get_feat_cmd { · 308 unmodified lines
849 u32 raw[11];884 u32 raw[11];
850};885};
851 886
887struct ena_admin_queue_ext_feature_desc {
888 /* version */
889 u8 version;
890
891 u8 reserved1[3];
892
893 union {
894 struct ena_admin_queue_ext_feature_fields max_queue_ext;
895
896 u32 raw[10];
897 };
898};
899
852struct ena_admin_get_feat_resp {900struct ena_admin_get_feat_resp {
853 struct ena_admin_acq_common_desc acq_common_desc;901 struct ena_admin_acq_common_desc acq_common_desc;
854 902
@@ -861,6 +909,8 @@ struct ena_admin_get_feat_resp { · 6 unmodified lines
861 909
862 struct ena_admin_queue_feature_desc max_queue;910 struct ena_admin_queue_feature_desc max_queue;
863 911
912 struct ena_admin_queue_ext_feature_desc max_queue_ext;
913
864 struct ena_admin_feature_aenq_desc aenq;914 struct ena_admin_feature_aenq_desc aenq;
865 915
866 struct ena_admin_get_feature_link_desc link;916 struct ena_admin_get_feature_link_desc link;
@@ -929,7 +979,9 @@ struct ena_admin_aenq_common_desc { · 62 unmodified lines
929 979
930 u16 syndrom;980 u16 syndrom;
931 981
932 /* 0 : phase */982 /* 0 : phase
983 * 7:1 : reserved - MBZ
984 */
933 u8 flags;985 u8 flags;
934 986
935 u8 reserved1[3];987 u8 reserved1[3];
drivers/net/ethernet/amazon/ena/ena_com.c+51−31
@@ -91,7 +91,7 @@ struct ena_com_stats_ctx { · 90 unmodified lines
91 struct ena_admin_acq_get_stats_resp get_resp;91 struct ena_admin_acq_get_stats_resp get_resp;
92};92};
93 93
94static inline int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,94static int ena_com_mem_addr_set(struct ena_com_dev *ena_dev,
95 struct ena_common_mem_addr *ena_addr,95 struct ena_common_mem_addr *ena_addr,
96 dma_addr_t addr)96 dma_addr_t addr)
97{97{
@@ -190,7 +190,7 @@ static int ena_com_admin_init_aenq(struct ena_com_dev *dev, · 92 unmodified lines
190 return 0;190 return 0;
191}191}
192 192
193static inline void comp_ctxt_release(struct ena_com_admin_queue *queue,193static void comp_ctxt_release(struct ena_com_admin_queue *queue,
194 struct ena_comp_ctx *comp_ctx)194 struct ena_comp_ctx *comp_ctx)
195{195{
196 comp_ctx->occupied = false;196 comp_ctx->occupied = false;
@@ -277,7 +277,7 @@ static struct ena_comp_ctx *__ena_com_submit_admin_cmd(struct ena_com_admin_queu · 80 unmodified lines
277 return comp_ctx;277 return comp_ctx;
278}278}
279 279
280static inline int ena_com_init_comp_ctxt(struct ena_com_admin_queue *queue)280static int ena_com_init_comp_ctxt(struct ena_com_admin_queue *queue)
281{281{
282 size_t size = queue->q_depth * sizeof(struct ena_comp_ctx);282 size_t size = queue->q_depth * sizeof(struct ena_comp_ctx);
283 struct ena_comp_ctx *comp_ctx;283 struct ena_comp_ctx *comp_ctx;
@@ -978,7 +978,8 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, · 694 unmodified lines
978 struct ena_admin_get_feat_resp *get_resp,978 struct ena_admin_get_feat_resp *get_resp,
979 enum ena_admin_aq_feature_id feature_id,979 enum ena_admin_aq_feature_id feature_id,
980 dma_addr_t control_buf_dma_addr,980 dma_addr_t control_buf_dma_addr,
981 u32 control_buff_size)981 u32 control_buff_size,
982 u8 feature_ver)
982{983{
983 struct ena_com_admin_queue *admin_queue;984 struct ena_com_admin_queue *admin_queue;
984 struct ena_admin_get_feat_cmd get_cmd;985 struct ena_admin_get_feat_cmd get_cmd;
@@ -1009,7 +1010,7 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, · 24 unmodified lines
1009 }1010 }
1010 1011
1011 get_cmd.control_buffer.length = control_buff_size;1012 get_cmd.control_buffer.length = control_buff_size;
1012 1013 get_cmd.feat_common.feature_version = feature_ver;
1013 get_cmd.feat_common.feature_id = feature_id;1014 get_cmd.feat_common.feature_id = feature_id;
1014 1015
1015 ret = ena_com_execute_admin_command(admin_queue,1016 ret = ena_com_execute_admin_command(admin_queue,
@@ -1029,13 +1030,15 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev, · 13 unmodified lines
1029 1030
1030static int ena_com_get_feature(struct ena_com_dev *ena_dev,1031static int ena_com_get_feature(struct ena_com_dev *ena_dev,
1031 struct ena_admin_get_feat_resp *get_resp,1032 struct ena_admin_get_feat_resp *get_resp,
1032 enum ena_admin_aq_feature_id feature_id)1033 enum ena_admin_aq_feature_id feature_id,
1034 u8 feature_ver)
1033{1035{
1034 return ena_com_get_feature_ex(ena_dev,1036 return ena_com_get_feature_ex(ena_dev,
1035 get_resp,1037 get_resp,
1036 feature_id,1038 feature_id,
1037 0,1039 0,
1038 0);1040 0,
1041 feature_ver);
1039}1042}
1040 1043
1041static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev)1044static int ena_com_hash_key_allocate(struct ena_com_dev *ena_dev)
@@ -1095,7 +1098,7 @@ static int ena_com_indirect_table_allocate(struct ena_com_dev *ena_dev, · 53 unmodified lines
1095 int ret;1098 int ret;
1096 1099
1097 ret = ena_com_get_feature(ena_dev, &get_resp,1100 ret = ena_com_get_feature(ena_dev, &get_resp,
1098 ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG);1101 ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG, 0);
1099 if (unlikely(ret))1102 if (unlikely(ret))
1100 return ret;1103 return ret;
1101 1104
@@ -1515,7 +1518,7 @@ int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag) · 413 unmodified lines
1515 struct ena_admin_get_feat_resp get_resp;1518 struct ena_admin_get_feat_resp get_resp;
1516 int ret;1519 int ret;
1517 1520
1518 ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG);1521 ret = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_AENQ_CONFIG, 0);
1519 if (ret) {1522 if (ret) {
1520 pr_info("Can't get aenq configuration\n");1523 pr_info("Can't get aenq configuration\n");
1521 return ret;1524 return ret;
@@ -1890,7 +1893,7 @@ void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid) · 368 unmodified lines
1890int ena_com_get_link_params(struct ena_com_dev *ena_dev,1893int ena_com_get_link_params(struct ena_com_dev *ena_dev,
1891 struct ena_admin_get_feat_resp *resp)1894 struct ena_admin_get_feat_resp *resp)
1892{1895{
1893 return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG);1896 return ena_com_get_feature(ena_dev, resp, ENA_ADMIN_LINK_CONFIG, 0);
1894}1897}
1895 1898
1896int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev)1899int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev)
@@ -1916,7 +1919,7 @@ int ena_com_extra_properties_strings_init(struct ena_com_dev *ena_dev) · 19 unmodified lines
1916 rc = ena_com_get_feature_ex(ena_dev, &resp,1919 rc = ena_com_get_feature_ex(ena_dev, &resp,
1917 ENA_ADMIN_EXTRA_PROPERTIES_STRINGS,1920 ENA_ADMIN_EXTRA_PROPERTIES_STRINGS,
1918 extra_properties_strings->dma_addr,1921 extra_properties_strings->dma_addr,
1919 extra_properties_strings->size);1922 extra_properties_strings->size, 0);
1920 if (rc) {1923 if (rc) {
1921 pr_debug("Failed to get extra properties strings\n");1924 pr_debug("Failed to get extra properties strings\n");
1922 goto err;1925 goto err;
@@ -1946,7 +1949,7 @@ int ena_com_get_extra_properties_flags(struct ena_com_dev *ena_dev, · 23 unmodified lines
1946 struct ena_admin_get_feat_resp *resp)1949 struct ena_admin_get_feat_resp *resp)
1947{1950{
1948 return ena_com_get_feature(ena_dev, resp,1951 return ena_com_get_feature(ena_dev, resp,
1949 ENA_ADMIN_EXTRA_PROPERTIES_FLAGS);1952 ENA_ADMIN_EXTRA_PROPERTIES_FLAGS, 0);
1950}1953}
1951 1954
1952int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,1955int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
@@ -1956,7 +1959,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, · 3 unmodified lines
1956 int rc;1959 int rc;
1957 1960
1958 rc = ena_com_get_feature(ena_dev, &get_resp,1961 rc = ena_com_get_feature(ena_dev, &get_resp,
1959 ENA_ADMIN_DEVICE_ATTRIBUTES);1962 ENA_ADMIN_DEVICE_ATTRIBUTES, 0);
1960 if (rc)1963 if (rc)
1961 return rc;1964 return rc;
1962 1965
@@ -1964,17 +1967,34 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, · 1 unmodified line
1964 sizeof(get_resp.u.dev_attr));1967 sizeof(get_resp.u.dev_attr));
1965 ena_dev->supported_features = get_resp.u.dev_attr.supported_features;1968 ena_dev->supported_features = get_resp.u.dev_attr.supported_features;
1966 1969
1967 rc = ena_com_get_feature(ena_dev, &get_resp,1970 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
1968 ENA_ADMIN_MAX_QUEUES_NUM);1971 rc = ena_com_get_feature(ena_dev, &get_resp,
1969 if (rc)1972 ENA_ADMIN_MAX_QUEUES_EXT,
1970 return rc;1973 ENA_FEATURE_MAX_QUEUE_EXT_VER);
1974 if (rc)
1975 return rc;
1971 1976
1972 memcpy(&get_feat_ctx->max_queues, &get_resp.u.max_queue,1977 if (get_resp.u.max_queue_ext.version != ENA_FEATURE_MAX_QUEUE_EXT_VER)
1973 sizeof(get_resp.u.max_queue));1978 return -EINVAL;
1974 ena_dev->tx_max_header_size = get_resp.u.max_queue.max_header_size;1979
1980 memcpy(&get_feat_ctx->max_queue_ext, &get_resp.u.max_queue_ext,
1981 sizeof(get_resp.u.max_queue_ext));
1982 ena_dev->tx_max_header_size =
1983 get_resp.u.max_queue_ext.max_queue_ext.max_tx_header_size;
1984 } else {
1985 rc = ena_com_get_feature(ena_dev, &get_resp,
1986 ENA_ADMIN_MAX_QUEUES_NUM, 0);
1987 memcpy(&get_feat_ctx->max_queues, &get_resp.u.max_queue,
1988 sizeof(get_resp.u.max_queue));
1989 ena_dev->tx_max_header_size =
1990 get_resp.u.max_queue.max_header_size;
1991
1992 if (rc)
1993 return rc;
1994 }
1975 1995
1976 rc = ena_com_get_feature(ena_dev, &get_resp,1996 rc = ena_com_get_feature(ena_dev, &get_resp,
1977 ENA_ADMIN_AENQ_CONFIG);1997 ENA_ADMIN_AENQ_CONFIG, 0);
1978 if (rc)1998 if (rc)
1979 return rc;1999 return rc;
1980 2000
@@ -1982,7 +2002,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, · 1 unmodified line
1982 sizeof(get_resp.u.aenq));2002 sizeof(get_resp.u.aenq));
1983 2003
1984 rc = ena_com_get_feature(ena_dev, &get_resp,2004 rc = ena_com_get_feature(ena_dev, &get_resp,
1985 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG);2005 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG, 0);
1986 if (rc)2006 if (rc)
1987 return rc;2007 return rc;
1988 2008
@@ -1992,7 +2012,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, · 3 unmodified lines
1992 /* Driver hints isn't mandatory admin command. So in case the2012 /* Driver hints isn't mandatory admin command. So in case the
1993 * command isn't supported set driver hints to 02013 * command isn't supported set driver hints to 0
1994 */2014 */
1995 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS);2015 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_HW_HINTS, 0);
1996 2016
1997 if (!rc)2017 if (!rc)
1998 memcpy(&get_feat_ctx->hw_hints, &get_resp.u.hw_hints,2018 memcpy(&get_feat_ctx->hw_hints, &get_resp.u.hw_hints,
@@ -2003,7 +2023,7 @@ int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev, · 4 unmodified lines
2003 else2023 else
2004 return rc;2024 return rc;
2005 2025
2006 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ);2026 rc = ena_com_get_feature(ena_dev, &get_resp, ENA_ADMIN_LLQ, 0);
2007 if (!rc)2027 if (!rc)
2008 memcpy(&get_feat_ctx->llq, &get_resp.u.llq,2028 memcpy(&get_feat_ctx->llq, &get_resp.u.llq,
2009 sizeof(get_resp.u.llq));2029 sizeof(get_resp.u.llq));
@@ -2240,7 +2260,7 @@ int ena_com_get_offload_settings(struct ena_com_dev *ena_dev, · 230 unmodified lines
2240 struct ena_admin_get_feat_resp resp;2260 struct ena_admin_get_feat_resp resp;
2241 2261
2242 ret = ena_com_get_feature(ena_dev, &resp,2262 ret = ena_com_get_feature(ena_dev, &resp,
2243 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG);2263 ENA_ADMIN_STATELESS_OFFLOAD_CONFIG, 0);
2244 if (unlikely(ret)) {2264 if (unlikely(ret)) {
2245 pr_err("Failed to get offload capabilities %d\n", ret);2265 pr_err("Failed to get offload capabilities %d\n", ret);
2246 return ret;2266 return ret;
@@ -2269,7 +2289,7 @@ int ena_com_set_hash_function(struct ena_com_dev *ena_dev) · 22 unmodified lines
2269 2289
2270 /* Validate hash function is supported */2290 /* Validate hash function is supported */
2271 ret = ena_com_get_feature(ena_dev, &get_resp,2291 ret = ena_com_get_feature(ena_dev, &get_resp,
2272 ENA_ADMIN_RSS_HASH_FUNCTION);2292 ENA_ADMIN_RSS_HASH_FUNCTION, 0);
2273 if (unlikely(ret))2293 if (unlikely(ret))
2274 return ret;2294 return ret;
2275 2295
@@ -2329,7 +2349,7 @@ int ena_com_fill_hash_function(struct ena_com_dev *ena_dev, · 53 unmodified lines
2329 rc = ena_com_get_feature_ex(ena_dev, &get_resp,2349 rc = ena_com_get_feature_ex(ena_dev, &get_resp,
2330 ENA_ADMIN_RSS_HASH_FUNCTION,2350 ENA_ADMIN_RSS_HASH_FUNCTION,
2331 rss->hash_key_dma_addr,2351 rss->hash_key_dma_addr,
2332 sizeof(*rss->hash_key));2352 sizeof(*rss->hash_key), 0);
2333 if (unlikely(rc))2353 if (unlikely(rc))
2334 return rc;2354 return rc;
2335 2355
@@ -2381,7 +2401,7 @@ int ena_com_get_hash_function(struct ena_com_dev *ena_dev, · 45 unmodified lines
2381 rc = ena_com_get_feature_ex(ena_dev, &get_resp,2401 rc = ena_com_get_feature_ex(ena_dev, &get_resp,
2382 ENA_ADMIN_RSS_HASH_FUNCTION,2402 ENA_ADMIN_RSS_HASH_FUNCTION,
2383 rss->hash_key_dma_addr,2403 rss->hash_key_dma_addr,
2384 sizeof(*rss->hash_key));2404 sizeof(*rss->hash_key), 0);
2385 if (unlikely(rc))2405 if (unlikely(rc))
2386 return rc;2406 return rc;
2387 2407
@@ -2406,7 +2426,7 @@ int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev, · 18 unmodified lines
2406 rc = ena_com_get_feature_ex(ena_dev, &get_resp,2426 rc = ena_com_get_feature_ex(ena_dev, &get_resp,
2407 ENA_ADMIN_RSS_HASH_INPUT,2427 ENA_ADMIN_RSS_HASH_INPUT,
2408 rss->hash_ctrl_dma_addr,2428 rss->hash_ctrl_dma_addr,
2409 sizeof(*rss->hash_ctrl));2429 sizeof(*rss->hash_ctrl), 0);
2410 if (unlikely(rc))2430 if (unlikely(rc))
2411 return rc;2431 return rc;
2412 2432
@@ -2642,7 +2662,7 @@ int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl) · 229 unmodified lines
2642 rc = ena_com_get_feature_ex(ena_dev, &get_resp,2662 rc = ena_com_get_feature_ex(ena_dev, &get_resp,
2643 ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG,2663 ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG,
2644 rss->rss_ind_tbl_dma_addr,2664 rss->rss_ind_tbl_dma_addr,
2645 tbl_size);2665 tbl_size, 0);
2646 if (unlikely(rc))2666 if (unlikely(rc))
2647 return rc;2667 return rc;
2648 2668
@@ -2857,7 +2877,7 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev) · 208 unmodified lines
2857 int rc;2877 int rc;
2858 2878
2859 rc = ena_com_get_feature(ena_dev, &get_resp,2879 rc = ena_com_get_feature(ena_dev, &get_resp,
2860 ENA_ADMIN_INTERRUPT_MODERATION);2880 ENA_ADMIN_INTERRUPT_MODERATION, 0);
2861 2881
2862 if (rc) {2882 if (rc) {
2863 if (rc == -EOPNOTSUPP) {2883 if (rc == -EOPNOTSUPP) {
drivers/net/ethernet/amazon/ena/ena_com.h+3−0
@@ -101,6 +101,8 @@ · 100 unmodified lines
101 101
102#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF102#define ENA_HW_HINTS_NO_TIMEOUT 0xFFFF
103 103
104#define ENA_FEATURE_MAX_QUEUE_EXT_VER 1
105
104enum ena_intr_moder_level {106enum ena_intr_moder_level {
105 ENA_INTR_MODER_LOWEST = 0,107 ENA_INTR_MODER_LOWEST = 0,
106 ENA_INTR_MODER_LOW,108 ENA_INTR_MODER_LOW,
@@ -389,6 +391,7 @@ struct ena_com_dev { · 282 unmodified lines
389 391
390struct ena_com_dev_get_features_ctx {392struct ena_com_dev_get_features_ctx {
391 struct ena_admin_queue_feature_desc max_queues;393 struct ena_admin_queue_feature_desc max_queues;
394 struct ena_admin_queue_ext_feature_desc max_queue_ext;
392 struct ena_admin_device_attr_feature_desc dev_attr;395 struct ena_admin_device_attr_feature_desc dev_attr;
393 struct ena_admin_feature_aenq_desc aenq;396 struct ena_admin_feature_aenq_desc aenq;
394 struct ena_admin_feature_offload_desc offload;397 struct ena_admin_feature_offload_desc offload;
drivers/net/ethernet/amazon/ena/ena_eth_com.c+13−13
@@ -32,7 +32,7 @@ · 31 unmodified lines
32 32
33#include "ena_eth_com.h"33#include "ena_eth_com.h"
34 34
35static inline struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(35static struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(
36 struct ena_com_io_cq *io_cq)36 struct ena_com_io_cq *io_cq)
37{37{
38 struct ena_eth_io_rx_cdesc_base *cdesc;38 struct ena_eth_io_rx_cdesc_base *cdesc;
@@ -59,7 +59,7 @@ static inline struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc( · 20 unmodified lines
59 return cdesc;59 return cdesc;
60}60}
61 61
62static inline void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq)62static void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq)
63{63{
64 u16 tail_masked;64 u16 tail_masked;
65 u32 offset;65 u32 offset;
@@ -71,7 +71,7 @@ static inline void *get_sq_desc_regular_queue(struct ena_com_io_sq *io_sq) · 5 unmodified lines
71 return (void *)((uintptr_t)io_sq->desc_addr.virt_addr + offset);71 return (void *)((uintptr_t)io_sq->desc_addr.virt_addr + offset);
72}72}
73 73
74static inline int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq,74static int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq,
75 u8 *bounce_buffer)75 u8 *bounce_buffer)
76{76{
77 struct ena_com_llq_info *llq_info = &io_sq->llq_info;77 struct ena_com_llq_info *llq_info = &io_sq->llq_info;
@@ -111,7 +111,7 @@ static inline int ena_com_write_bounce_buffer_to_dev(struct ena_com_io_sq *io_sq · 33 unmodified lines
111 return 0;111 return 0;
112}112}
113 113
114static inline int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq,114static int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq,
115 u8 *header_src,115 u8 *header_src,
116 u16 header_len)116 u16 header_len)
117{117{
@@ -142,7 +142,7 @@ static inline int ena_com_write_header_to_bounce(struct ena_com_io_sq *io_sq, · 24 unmodified lines
142 return 0;142 return 0;
143}143}
144 144
145static inline void *get_sq_desc_llq(struct ena_com_io_sq *io_sq)145static void *get_sq_desc_llq(struct ena_com_io_sq *io_sq)
146{146{
147 struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;147 struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;
148 u8 *bounce_buffer;148 u8 *bounce_buffer;
@@ -162,7 +162,7 @@ static inline void *get_sq_desc_llq(struct ena_com_io_sq *io_sq) · 13 unmodified lines
162 return sq_desc;162 return sq_desc;
163}163}
164 164
165static inline int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)165static int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq)
166{166{
167 struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;167 struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;
168 struct ena_com_llq_info *llq_info = &io_sq->llq_info;168 struct ena_com_llq_info *llq_info = &io_sq->llq_info;
@@ -189,7 +189,7 @@ static inline int ena_com_close_bounce_buffer(struct ena_com_io_sq *io_sq) · 20 unmodified lines
189 return 0;189 return 0;
190}190}
191 191
192static inline void *get_sq_desc(struct ena_com_io_sq *io_sq)192static void *get_sq_desc(struct ena_com_io_sq *io_sq)
193{193{
194 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)194 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
195 return get_sq_desc_llq(io_sq);195 return get_sq_desc_llq(io_sq);
@@ -197,7 +197,7 @@ static inline void *get_sq_desc(struct ena_com_io_sq *io_sq) · 1 unmodified line
197 return get_sq_desc_regular_queue(io_sq);197 return get_sq_desc_regular_queue(io_sq);
198}198}
199 199
200static inline int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)200static int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq)
201{201{
202 struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;202 struct ena_com_llq_pkt_ctrl *pkt_ctrl = &io_sq->llq_buf_ctrl;
203 struct ena_com_llq_info *llq_info = &io_sq->llq_info;203 struct ena_com_llq_info *llq_info = &io_sq->llq_info;
@@ -225,7 +225,7 @@ static inline int ena_com_sq_update_llq_tail(struct ena_com_io_sq *io_sq) · 21 unmodified lines
225 return 0;225 return 0;
226}226}
227 227
228static inline int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq)228static int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq)
229{229{
230 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)230 if (io_sq->mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
231 return ena_com_sq_update_llq_tail(io_sq);231 return ena_com_sq_update_llq_tail(io_sq);
@@ -239,7 +239,7 @@ static inline int ena_com_sq_update_tail(struct ena_com_io_sq *io_sq) · 7 unmodified lines
239 return 0;239 return 0;
240}240}
241 241
242static inline struct ena_eth_io_rx_cdesc_base *242static struct ena_eth_io_rx_cdesc_base *
243 ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)243 ena_com_rx_cdesc_idx_to_ptr(struct ena_com_io_cq *io_cq, u16 idx)
244{244{
245 idx &= (io_cq->q_depth - 1);245 idx &= (io_cq->q_depth - 1);
@@ -248,7 +248,7 @@ static inline struct ena_eth_io_rx_cdesc_base * · 2 unmodified lines
248 idx * io_cq->cdesc_entry_size_in_bytes);248 idx * io_cq->cdesc_entry_size_in_bytes);
249}249}
250 250
251static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,251static u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
252 u16 *first_cdesc_idx)252 u16 *first_cdesc_idx)
253{253{
254 struct ena_eth_io_rx_cdesc_base *cdesc;254 struct ena_eth_io_rx_cdesc_base *cdesc;
@@ -285,7 +285,7 @@ static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq, · 30 unmodified lines
285 return count;285 return count;
286}286}
287 287
288static inline int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,288static int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io_sq,
289 struct ena_com_tx_ctx *ena_tx_ctx)289 struct ena_com_tx_ctx *ena_tx_ctx)
290{290{
291 struct ena_eth_io_tx_meta_desc *meta_desc = NULL;291 struct ena_eth_io_tx_meta_desc *meta_desc = NULL;
@@ -334,7 +334,7 @@ static inline int ena_com_create_and_store_tx_meta_desc(struct ena_com_io_sq *io · 42 unmodified lines
334 return ena_com_sq_update_tail(io_sq);334 return ena_com_sq_update_tail(io_sq);
335}335}
336 336
337static inline void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,337static void ena_com_rx_set_flags(struct ena_com_rx_ctx *ena_rx_ctx,
338 struct ena_eth_io_rx_cdesc_base *cdesc)338 struct ena_eth_io_rx_cdesc_base *cdesc)
339{339{
340 ena_rx_ctx->l3_proto = cdesc->status &340 ena_rx_ctx->l3_proto = cdesc->status &
drivers/net/ethernet/amazon/ena/ena_ethtool.c+26−6
@@ -486,13 +486,32 @@ static void ena_get_ringparam(struct net_device *netdev, · 485 unmodified lines
486 struct ethtool_ringparam *ring)486 struct ethtool_ringparam *ring)
487{487{
488 struct ena_adapter *adapter = netdev_priv(netdev);488 struct ena_adapter *adapter = netdev_priv(netdev);
489 struct ena_ring *tx_ring = &adapter->tx_ring[0];
490 struct ena_ring *rx_ring = &adapter->rx_ring[0];
491 489
492 ring->rx_max_pending = rx_ring->ring_size;490 ring->tx_max_pending = adapter->max_tx_ring_size;
493 ring->tx_max_pending = tx_ring->ring_size;491 ring->rx_max_pending = adapter->max_rx_ring_size;
494 ring->rx_pending = rx_ring->ring_size;492 ring->tx_pending = adapter->tx_ring[0].ring_size;
495 ring->tx_pending = tx_ring->ring_size;493 ring->rx_pending = adapter->rx_ring[0].ring_size;
494}
495
496static int ena_set_ringparam(struct net_device *netdev,
497 struct ethtool_ringparam *ring)
498{
499 struct ena_adapter *adapter = netdev_priv(netdev);
500 u32 new_tx_size, new_rx_size;
501
502 new_tx_size = ring->tx_pending < ENA_MIN_RING_SIZE ?
503 ENA_MIN_RING_SIZE : ring->tx_pending;
504 new_tx_size = rounddown_pow_of_two(new_tx_size);
505
506 new_rx_size = ring->rx_pending < ENA_MIN_RING_SIZE ?
507 ENA_MIN_RING_SIZE : ring->rx_pending;
508 new_rx_size = rounddown_pow_of_two(new_rx_size);
509
510 if (new_tx_size == adapter->requested_tx_ring_size &&
511 new_rx_size == adapter->requested_rx_ring_size)
512 return 0;
513
514 return ena_update_queue_sizes(adapter, new_tx_size, new_rx_size);
496}515}
497 516
498static u32 ena_flow_hash_to_flow_type(u16 hash_fields)517static u32 ena_flow_hash_to_flow_type(u16 hash_fields)
@@ -860,6 +879,7 @@ static const struct ethtool_ops ena_ethtool_ops = { · 361 unmodified lines
860 .get_coalesce = ena_get_coalesce,879 .get_coalesce = ena_get_coalesce,
861 .set_coalesce = ena_set_coalesce,880 .set_coalesce = ena_set_coalesce,
862 .get_ringparam = ena_get_ringparam,881 .get_ringparam = ena_get_ringparam,
882 .set_ringparam = ena_set_ringparam,
863 .get_sset_count = ena_get_sset_count,883 .get_sset_count = ena_get_sset_count,
864 .get_strings = ena_get_strings,884 .get_strings = ena_get_strings,
865 .get_ethtool_stats = ena_get_ethtool_stats,885 .get_ethtool_stats = ena_get_ethtool_stats,
drivers/net/ethernet/amazon/ena/ena_netdev.c+232−87
@@ -182,7 +182,7 @@ static void ena_init_io_rings(struct ena_adapter *adapter) · 181 unmodified lines
182 ena_init_io_rings_common(adapter, rxr, i);182 ena_init_io_rings_common(adapter, rxr, i);
183 183
184 /* TX specific ring state */184 /* TX specific ring state */
185 txr->ring_size = adapter->tx_ring_size;185 txr->ring_size = adapter->requested_tx_ring_size;
186 txr->tx_max_header_size = ena_dev->tx_max_header_size;186 txr->tx_max_header_size = ena_dev->tx_max_header_size;
187 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;187 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
188 txr->sgl_size = adapter->max_tx_sgl_size;188 txr->sgl_size = adapter->max_tx_sgl_size;
@@ -190,7 +190,7 @@ static void ena_init_io_rings(struct ena_adapter *adapter) · 1 unmodified line
190 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);190 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
191 191
192 /* RX specific ring state */192 /* RX specific ring state */
193 rxr->ring_size = adapter->rx_ring_size;193 rxr->ring_size = adapter->requested_rx_ring_size;
194 rxr->rx_copybreak = adapter->rx_copybreak;194 rxr->rx_copybreak = adapter->rx_copybreak;
195 rxr->sgl_size = adapter->max_rx_sgl_size;195 rxr->sgl_size = adapter->max_rx_sgl_size;
196 rxr->smoothed_interval =196 rxr->smoothed_interval =
@@ -326,7 +326,7 @@ static void ena_free_all_io_tx_resources(struct ena_adapter *adapter) · 129 unmodified lines
326 ena_free_tx_resources(adapter, i);326 ena_free_tx_resources(adapter, i);
327}327}
328 328
329static inline int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)329static int validate_rx_req_id(struct ena_ring *rx_ring, u16 req_id)
330{330{
331 if (likely(req_id < rx_ring->ring_size))331 if (likely(req_id < rx_ring->ring_size))
332 return 0;332 return 0;
@@ -460,7 +460,7 @@ static void ena_free_all_io_rx_resources(struct ena_adapter *adapter) · 127 unmodified lines
460 ena_free_rx_resources(adapter, i);460 ena_free_rx_resources(adapter, i);
461}461}
462 462
463static inline int ena_alloc_rx_page(struct ena_ring *rx_ring,463static int ena_alloc_rx_page(struct ena_ring *rx_ring,
464 struct ena_rx_buffer *rx_info, gfp_t gfp)464 struct ena_rx_buffer *rx_info, gfp_t gfp)
465{465{
466 struct ena_com_buf *ena_buf;466 struct ena_com_buf *ena_buf;
@@ -594,7 +594,6 @@ static void ena_free_rx_bufs(struct ena_adapter *adapter, · 127 unmodified lines
594 594
595/* ena_refill_all_rx_bufs - allocate all queues Rx buffers595/* ena_refill_all_rx_bufs - allocate all queues Rx buffers
596 * @adapter: board private structure596 * @adapter: board private structure
597 *
598 */597 */
599static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)598static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
600{599{
@@ -621,7 +620,7 @@ static void ena_free_all_rx_bufs(struct ena_adapter *adapter) · 20 unmodified lines
621 ena_free_rx_bufs(adapter, i);620 ena_free_rx_bufs(adapter, i);
622}621}
623 622
624static inline void ena_unmap_tx_skb(struct ena_ring *tx_ring,623static void ena_unmap_tx_skb(struct ena_ring *tx_ring,
625 struct ena_tx_buffer *tx_info)624 struct ena_tx_buffer *tx_info)
626{625{
627 struct ena_com_buf *ena_buf;626 struct ena_com_buf *ena_buf;
@@ -956,7 +955,7 @@ static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring, · 328 unmodified lines
956 * @ena_rx_ctx: received packet context/metadata955 * @ena_rx_ctx: received packet context/metadata
957 * @skb: skb currently being received and modified956 * @skb: skb currently being received and modified
958 */957 */
959static inline void ena_rx_checksum(struct ena_ring *rx_ring,958static void ena_rx_checksum(struct ena_ring *rx_ring,
960 struct ena_com_rx_ctx *ena_rx_ctx,959 struct ena_com_rx_ctx *ena_rx_ctx,
961 struct sk_buff *skb)960 struct sk_buff *skb)
962{961{
@@ -1156,7 +1155,7 @@ error: · 193 unmodified lines
1156 return 0;1155 return 0;
1157}1156}
1158 1157
1159inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring,1158void ena_adjust_intr_moderation(struct ena_ring *rx_ring,
1160 struct ena_ring *tx_ring)1159 struct ena_ring *tx_ring)
1161{1160{
1162 /* We apply adaptive moderation on Rx path only.1161 /* We apply adaptive moderation on Rx path only.
@@ -1175,7 +1174,7 @@ inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring, · 12 unmodified lines
1175 rx_ring->per_napi_bytes = 0;1174 rx_ring->per_napi_bytes = 0;
1176}1175}
1177 1176
1178static inline void ena_unmask_interrupt(struct ena_ring *tx_ring,1177static void ena_unmask_interrupt(struct ena_ring *tx_ring,
1179 struct ena_ring *rx_ring)1178 struct ena_ring *rx_ring)
1180{1179{
1181 struct ena_eth_io_intr_reg intr_reg;1180 struct ena_eth_io_intr_reg intr_reg;
@@ -1195,7 +1194,7 @@ static inline void ena_unmask_interrupt(struct ena_ring *tx_ring, · 13 unmodified lines
1195 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);1194 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1196}1195}
1197 1196
1198static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring,1197static void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1199 struct ena_ring *rx_ring)1198 struct ena_ring *rx_ring)
1200{1199{
1201 int cpu = get_cpu();1200 int cpu = get_cpu();
@@ -1638,7 +1637,7 @@ static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid) · 436 unmodified lines
1638 ctx.qid = ena_qid;1637 ctx.qid = ena_qid;
1639 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;1638 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1640 ctx.msix_vector = msix_vector;1639 ctx.msix_vector = msix_vector;
1641 ctx.queue_size = adapter->tx_ring_size;1640 ctx.queue_size = tx_ring->ring_size;
1642 ctx.numa_node = cpu_to_node(tx_ring->cpu);1641 ctx.numa_node = cpu_to_node(tx_ring->cpu);
1643 1642
1644 rc = ena_com_create_io_queue(ena_dev, &ctx);1643 rc = ena_com_create_io_queue(ena_dev, &ctx);
@@ -1705,7 +1704,7 @@ static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid) · 60 unmodified lines
1705 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;1704 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1706 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;1705 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1707 ctx.msix_vector = msix_vector;1706 ctx.msix_vector = msix_vector;
1708 ctx.queue_size = adapter->rx_ring_size;1707 ctx.queue_size = rx_ring->ring_size;
1709 ctx.numa_node = cpu_to_node(rx_ring->cpu);1708 ctx.numa_node = cpu_to_node(rx_ring->cpu);
1710 1709
1711 rc = ena_com_create_io_queue(ena_dev, &ctx);1710 rc = ena_com_create_io_queue(ena_dev, &ctx);
@@ -1752,6 +1751,112 @@ create_err: · 40 unmodified lines
1752 return rc;1751 return rc;
1753}1752}
1754 1753
1754static void set_io_rings_size(struct ena_adapter *adapter,
1755 int new_tx_size, int new_rx_size)
1756{
1757 int i;
1758
1759 for (i = 0; i < adapter->num_queues; i++) {
1760 adapter->tx_ring[i].ring_size = new_tx_size;
1761 adapter->rx_ring[i].ring_size = new_rx_size;
1762 }
1763}
1764
1765/* This function allows queue allocation to backoff when the system is
1766 * low on memory. If there is not enough memory to allocate io queues
1767 * the driver will try to allocate smaller queues.
1768 *
1769 * The backoff algorithm is as follows:
1770 * 1. Try to allocate TX and RX and if successful.
1771 * 1.1. return success
1772 *
1773 * 2. Divide by 2 the size of the larger of RX and TX queues (or both if their size is the same).
1774 *
1775 * 3. If TX or RX is smaller than 256
1776 * 3.1. return failure.
1777 * 4. else
1778 * 4.1. go back to 1.
1779 */
1780static int create_queues_with_size_backoff(struct ena_adapter *adapter)
1781{
1782 int rc, cur_rx_ring_size, cur_tx_ring_size;
1783 int new_rx_ring_size, new_tx_ring_size;
1784
1785 /* current queue sizes might be set to smaller than the requested
1786 * ones due to past queue allocation failures.
1787 */
1788 set_io_rings_size(adapter, adapter->requested_tx_ring_size,
1789 adapter->requested_rx_ring_size);
1790
1791 while (1) {
1792 rc = ena_setup_all_tx_resources(adapter);
1793 if (rc)
1794 goto err_setup_tx;
1795
1796 rc = ena_create_all_io_tx_queues(adapter);
1797 if (rc)
1798 goto err_create_tx_queues;
1799
1800 rc = ena_setup_all_rx_resources(adapter);
1801 if (rc)
1802 goto err_setup_rx;
1803
1804 rc = ena_create_all_io_rx_queues(adapter);
1805 if (rc)
1806 goto err_create_rx_queues;
1807
1808 return 0;
1809
1810err_create_rx_queues:
1811 ena_free_all_io_rx_resources(adapter);
1812err_setup_rx:
1813 ena_destroy_all_tx_queues(adapter);
1814err_create_tx_queues:
1815 ena_free_all_io_tx_resources(adapter);
1816err_setup_tx:
1817 if (rc != -ENOMEM) {
1818 netif_err(adapter, ifup, adapter->netdev,
1819 "Queue creation failed with error code %d\n",
1820 rc);
1821 return rc;
1822 }
1823
1824 cur_tx_ring_size = adapter->tx_ring[0].ring_size;
1825 cur_rx_ring_size = adapter->rx_ring[0].ring_size;
1826
1827 netif_err(adapter, ifup, adapter->netdev,
1828 "Not enough memory to create queues with sizes TX=%d, RX=%d\n",
1829 cur_tx_ring_size, cur_rx_ring_size);
1830
1831 new_tx_ring_size = cur_tx_ring_size;
1832 new_rx_ring_size = cur_rx_ring_size;
1833
1834 /* Decrease the size of the larger queue, or
1835 * decrease both if they are the same size.
1836 */
1837 if (cur_rx_ring_size <= cur_tx_ring_size)
1838 new_tx_ring_size = cur_tx_ring_size / 2;
1839 if (cur_rx_ring_size >= cur_tx_ring_size)
1840 new_rx_ring_size = cur_rx_ring_size / 2;
1841
1842 if (cur_tx_ring_size < ENA_MIN_RING_SIZE ||
1843 cur_rx_ring_size < ENA_MIN_RING_SIZE) {
1844 netif_err(adapter, ifup, adapter->netdev,
1845 "Queue creation failed with the smallest possible queue size of %d for both queues. Not retrying with smaller queues\n",
1846 ENA_MIN_RING_SIZE);
1847 return rc;
1848 }
1849
1850 netif_err(adapter, ifup, adapter->netdev,
1851 "Retrying queue creation with sizes TX=%d, RX=%d\n",
1852 new_tx_ring_size,
1853 new_rx_ring_size);
1854
1855 set_io_rings_size(adapter, new_tx_ring_size,
1856 new_rx_ring_size);
1857 }
1858}
1859
1755static int ena_up(struct ena_adapter *adapter)1860static int ena_up(struct ena_adapter *adapter)
1756{1861{
1757 int rc, i;1862 int rc, i;
@@ -1771,25 +1876,9 @@ static int ena_up(struct ena_adapter *adapter) · 13 unmodified lines
1771 if (rc)1876 if (rc)
1772 goto err_req_irq;1877 goto err_req_irq;
1773 1878
1774 /* allocate transmit descriptors */1879 rc = create_queues_with_size_backoff(adapter);
1775 rc = ena_setup_all_tx_resources(adapter);
1776 if (rc)
1777 goto err_setup_tx;
1778
1779 /* allocate receive descriptors */
1780 rc = ena_setup_all_rx_resources(adapter);
1781 if (rc)
1782 goto err_setup_rx;
1783
1784 /* Create TX queues */
1785 rc = ena_create_all_io_tx_queues(adapter);
1786 if (rc)1880 if (rc)
1787 goto err_create_tx_queues;1881 goto err_create_queues_with_backoff;
1788
1789 /* Create RX queues */
1790 rc = ena_create_all_io_rx_queues(adapter);
1791 if (rc)
1792 goto err_create_rx_queues;
1793 1882
1794 rc = ena_up_complete(adapter);1883 rc = ena_up_complete(adapter);
1795 if (rc)1884 if (rc)
@@ -1818,14 +1907,11 @@ static int ena_up(struct ena_adapter *adapter) · 22 unmodified lines
1818 return rc;1907 return rc;
1819 1908
1820err_up:1909err_up:
1821 ena_destroy_all_rx_queues(adapter);
1822err_create_rx_queues:
1823 ena_destroy_all_tx_queues(adapter);1910 ena_destroy_all_tx_queues(adapter);
1824err_create_tx_queues:
1825 ena_free_all_io_rx_resources(adapter);
1826err_setup_rx:
1827 ena_free_all_io_tx_resources(adapter);1911 ena_free_all_io_tx_resources(adapter);
1828err_setup_tx:1912 ena_destroy_all_rx_queues(adapter);
1913 ena_free_all_io_rx_resources(adapter);
1914err_create_queues_with_backoff:
1829 ena_free_io_irq(adapter);1915 ena_free_io_irq(adapter);
1830err_req_irq:1916err_req_irq:
1831 ena_del_napi(adapter);1917 ena_del_napi(adapter);
@@ -1945,6 +2031,20 @@ static int ena_close(struct net_device *netdev) · 113 unmodified lines
1945 return 0;2031 return 0;
1946}2032}
1947 2033
2034int ena_update_queue_sizes(struct ena_adapter *adapter,
2035 u32 new_tx_size,
2036 u32 new_rx_size)
2037{
2038 bool dev_up;
2039
2040 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2041 ena_close(adapter->netdev);
2042 adapter->requested_tx_ring_size = new_tx_size;
2043 adapter->requested_rx_ring_size = new_rx_size;
2044 ena_init_io_rings(adapter);
2045 return dev_up ? ena_up(adapter) : 0;
2046}
2047
1948static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)2048static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
1949{2049{
1950 u32 mss = skb_shinfo(skb)->gso_size;2050 u32 mss = skb_shinfo(skb)->gso_size;
@@ -2465,13 +2565,6 @@ static int ena_device_validate_params(struct ena_adapter *adapter, · 514 unmodified lines
2465 return -EINVAL;2565 return -EINVAL;
2466 }2566 }
2467 2567
2468 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
2469 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
2470 netif_err(adapter, drv, netdev,
2471 "Error, device doesn't support enough queues\n");
2472 return -EINVAL;
2473 }
2474
2475 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {2568 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2476 netif_err(adapter, drv, netdev,2569 netif_err(adapter, drv, netdev,
2477 "Error, device max mtu is smaller than netdev MTU\n");2570 "Error, device max mtu is smaller than netdev MTU\n");
@@ -3045,18 +3138,32 @@ static int ena_calc_io_queue_num(struct pci_dev *pdev, · 567 unmodified lines
3045 struct ena_com_dev *ena_dev,3138 struct ena_com_dev *ena_dev,
3046 struct ena_com_dev_get_features_ctx *get_feat_ctx)3139 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3047{3140{
3048 int io_sq_num, io_queue_num;3141 int io_tx_sq_num, io_tx_cq_num, io_rx_num, io_queue_num;
3142
3143 if (ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3144 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3145 &get_feat_ctx->max_queue_ext.max_queue_ext;
3146 io_rx_num = min_t(int, max_queue_ext->max_rx_sq_num,
3147 max_queue_ext->max_rx_cq_num);
3148
3149 io_tx_sq_num = max_queue_ext->max_tx_sq_num;
3150 io_tx_cq_num = max_queue_ext->max_tx_cq_num;
3151 } else {
3152 struct ena_admin_queue_feature_desc *max_queues =
3153 &get_feat_ctx->max_queues;
3154 io_tx_sq_num = max_queues->max_sq_num;
3155 io_tx_cq_num = max_queues->max_cq_num;
3156 io_rx_num = min_t(int, io_tx_sq_num, io_tx_cq_num);
3157 }
3049 3158
3050 /* In case of LLQ use the llq number in the get feature cmd */3159 /* In case of LLQ use the llq fields for the tx SQ/CQ */
3051 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)3160 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3052 io_sq_num = get_feat_ctx->llq.max_llq_num;3161 io_tx_sq_num = get_feat_ctx->llq.max_llq_num;
3053 else
3054 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
3055 3162
3056 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);3163 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
3057 io_queue_num = min_t(int, io_queue_num, io_sq_num);3164 io_queue_num = min_t(int, io_queue_num, io_rx_num);
3058 io_queue_num = min_t(int, io_queue_num,3165 io_queue_num = min_t(int, io_queue_num, io_tx_sq_num);
3059 get_feat_ctx->max_queues.max_cq_num);3166 io_queue_num = min_t(int, io_queue_num, io_tx_cq_num);
3060 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */3167 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
3061 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);3168 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
3062 if (unlikely(!io_queue_num)) {3169 if (unlikely(!io_queue_num)) {
@@ -3230,7 +3337,7 @@ static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev) · 167 unmodified lines
3230 pci_release_selected_regions(pdev, release_bars);3337 pci_release_selected_regions(pdev, release_bars);
3231}3338}
3232 3339
3233static inline void set_default_llq_configurations(struct ena_llq_configurations *llq_config)3340static void set_default_llq_configurations(struct ena_llq_configurations *llq_config)
3234{3341{
3235 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;3342 llq_config->llq_header_location = ENA_ADMIN_INLINE_HEADER;
3236 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;3343 llq_config->llq_ring_entry_size = ENA_ADMIN_LIST_ENTRY_SIZE_128B;
@@ -3239,36 +3346,70 @@ static inline void set_default_llq_configurations(struct ena_llq_configurations · 2 unmodified lines
3239 llq_config->llq_ring_entry_size_value = 128;3346 llq_config->llq_ring_entry_size_value = 128;
3240}3347}
3241 3348
3242static int ena_calc_queue_size(struct pci_dev *pdev,3349static int ena_calc_queue_size(struct ena_calc_queue_size_ctx *ctx)
3243 struct ena_com_dev *ena_dev,
3244 u16 *max_tx_sgl_size,
3245 u16 *max_rx_sgl_size,
3246 struct ena_com_dev_get_features_ctx *get_feat_ctx)
3247{3350{
3248 u32 queue_size = ENA_DEFAULT_RING_SIZE;3351 struct ena_admin_feature_llq_desc *llq = &ctx->get_feat_ctx->llq;
3352 struct ena_com_dev *ena_dev = ctx->ena_dev;
3353 u32 tx_queue_size = ENA_DEFAULT_RING_SIZE;
3354 u32 rx_queue_size = ENA_DEFAULT_RING_SIZE;
3355 u32 max_tx_queue_size;
3356 u32 max_rx_queue_size;
3249 3357
3250 queue_size = min_t(u32, queue_size,3358 if (ctx->ena_dev->supported_features & BIT(ENA_ADMIN_MAX_QUEUES_EXT)) {
3251 get_feat_ctx->max_queues.max_cq_depth);3359 struct ena_admin_queue_ext_feature_fields *max_queue_ext =
3252 queue_size = min_t(u32, queue_size,3360 &ctx->get_feat_ctx->max_queue_ext.max_queue_ext;
3253 get_feat_ctx->max_queues.max_sq_depth);3361 max_rx_queue_size = min_t(u32, max_queue_ext->max_rx_cq_depth,
3362 max_queue_ext->max_rx_sq_depth);
3363 max_tx_queue_size = max_queue_ext->max_tx_cq_depth;
3254 3364
3255 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)3365 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3256 queue_size = min_t(u32, queue_size,3366 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3257 get_feat_ctx->llq.max_llq_depth);3367 llq->max_llq_depth);
3368 else
3369 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3370 max_queue_ext->max_tx_sq_depth);
3258 3371
3259 queue_size = rounddown_pow_of_two(queue_size);3372 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3373 max_queue_ext->max_per_packet_tx_descs);
3374 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3375 max_queue_ext->max_per_packet_rx_descs);
3376 } else {
3377 struct ena_admin_queue_feature_desc *max_queues =
3378 &ctx->get_feat_ctx->max_queues;
3379 max_rx_queue_size = min_t(u32, max_queues->max_cq_depth,
3380 max_queues->max_sq_depth);
3381 max_tx_queue_size = max_queues->max_cq_depth;
3382
3383 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
3384 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3385 llq->max_llq_depth);
3386 else
3387 max_tx_queue_size = min_t(u32, max_tx_queue_size,
3388 max_queues->max_sq_depth);
3260 3389
3261 if (unlikely(!queue_size)) {3390 ctx->max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3262 dev_err(&pdev->dev, "Invalid queue size\n");3391 max_queues->max_packet_tx_descs);
3263 return -EFAULT;3392 ctx->max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
3393 max_queues->max_packet_rx_descs);
3264 }3394 }
3265 3395
3266 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,3396 max_tx_queue_size = rounddown_pow_of_two(max_tx_queue_size);
3267 get_feat_ctx->max_queues.max_packet_tx_descs);3397 max_rx_queue_size = rounddown_pow_of_two(max_rx_queue_size);
3268 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,3398
3269 get_feat_ctx->max_queues.max_packet_rx_descs);3399 tx_queue_size = clamp_val(tx_queue_size, ENA_MIN_RING_SIZE,
3400 max_tx_queue_size);
3401 rx_queue_size = clamp_val(rx_queue_size, ENA_MIN_RING_SIZE,
3402 max_rx_queue_size);
3270 3403
3271 return queue_size;3404 tx_queue_size = rounddown_pow_of_two(tx_queue_size);
3405 rx_queue_size = rounddown_pow_of_two(rx_queue_size);
3406
3407 ctx->max_tx_queue_size = max_tx_queue_size;
3408 ctx->max_rx_queue_size = max_rx_queue_size;
3409 ctx->tx_queue_size = tx_queue_size;
3410 ctx->rx_queue_size = rx_queue_size;
3411
3412 return 0;
3272}3413}
3273 3414
3274/* ena_probe - Device Initialization Routine3415/* ena_probe - Device Initialization Routine
@@ -3284,6 +3425,7 @@ static int ena_calc_queue_size(struct pci_dev *pdev, · 9 unmodified lines
3284static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)3425static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3285{3426{
3286 struct ena_com_dev_get_features_ctx get_feat_ctx;3427 struct ena_com_dev_get_features_ctx get_feat_ctx;
3428 struct ena_calc_queue_size_ctx calc_queue_ctx = { 0 };
3287 struct ena_llq_configurations llq_config;3429 struct ena_llq_configurations llq_config;
3288 struct ena_com_dev *ena_dev = NULL;3430 struct ena_com_dev *ena_dev = NULL;
3289 struct ena_adapter *adapter;3431 struct ena_adapter *adapter;
@@ -3291,9 +3433,6 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 1 unmodified line
3291 struct net_device *netdev;3433 struct net_device *netdev;
3292 static int adapters_found;3434 static int adapters_found;
3293 char *queue_type_str;3435 char *queue_type_str;
3294 u16 tx_sgl_size = 0;
3295 u16 rx_sgl_size = 0;
3296 int queue_size;
3297 bool wd_state;3436 bool wd_state;
3298 3437
3299 dev_dbg(&pdev->dev, "%s\n", __func__);3438 dev_dbg(&pdev->dev, "%s\n", __func__);
@@ -3350,20 +3489,25 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 50 unmodified lines
3350 goto err_device_destroy;3489 goto err_device_destroy;
3351 }3490 }
3352 3491
3492 calc_queue_ctx.ena_dev = ena_dev;
3493 calc_queue_ctx.get_feat_ctx = &get_feat_ctx;
3494 calc_queue_ctx.pdev = pdev;
3495
3353 /* initial Tx interrupt delay, Assumes 1 usec granularity.3496 /* initial Tx interrupt delay, Assumes 1 usec granularity.
3354 * Updated during device initialization with the real granularity3497 * Updated during device initialization with the real granularity
3355 */3498 */
3356 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;3499 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
3357 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);3500 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
3358 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,3501 rc = ena_calc_queue_size(&calc_queue_ctx);
3359 &rx_sgl_size, &get_feat_ctx);3502 if (rc || io_queue_num <= 0) {
3360 if ((queue_size <= 0) || (io_queue_num <= 0)) {
3361 rc = -EFAULT;3503 rc = -EFAULT;
3362 goto err_device_destroy;3504 goto err_device_destroy;
3363 }3505 }
3364 3506
3365 dev_info(&pdev->dev, "creating %d io queues. queue size: %d. LLQ is %s\n",3507 dev_info(&pdev->dev, "creating %d io queues. rx queue size: %d tx queue size. %d LLQ is %s\n",
3366 io_queue_num, queue_size,3508 io_queue_num,
3509 calc_queue_ctx.rx_queue_size,
3510 calc_queue_ctx.tx_queue_size,
3367 (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?3511 (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) ?
3368 "ENABLED" : "DISABLED");3512 "ENABLED" : "DISABLED");
3369 3513
@@ -3389,11 +3533,12 @@ static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 19 unmodified lines
3389 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);3533 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3390 adapter->reset_reason = ENA_REGS_RESET_NORMAL;3534 adapter->reset_reason = ENA_REGS_RESET_NORMAL;
3391 3535
3392 adapter->tx_ring_size = queue_size;3536 adapter->requested_tx_ring_size = calc_queue_ctx.tx_queue_size;
3393 adapter->rx_ring_size = queue_size;3537 adapter->requested_rx_ring_size = calc_queue_ctx.rx_queue_size;
3394 3538 adapter->max_tx_ring_size = calc_queue_ctx.max_tx_queue_size;
3395 adapter->max_tx_sgl_size = tx_sgl_size;3539 adapter->max_rx_ring_size = calc_queue_ctx.max_rx_queue_size;
3396 adapter->max_rx_sgl_size = rx_sgl_size;3540 adapter->max_tx_sgl_size = calc_queue_ctx.max_tx_sgl_size;
3541 adapter->max_rx_sgl_size = calc_queue_ctx.max_rx_sgl_size;
3397 3542
3398 adapter->num_queues = io_queue_num;3543 adapter->num_queues = io_queue_num;
3399 adapter->last_monitored_tx_qid = 0;3544 adapter->last_monitored_tx_qid = 0;
drivers/net/ethernet/amazon/ena/ena_netdev.h+24−4
@@ -44,8 +44,8 @@ · 43 unmodified lines
44#include "ena_eth_com.h"44#include "ena_eth_com.h"
45 45
46#define DRV_MODULE_VER_MAJOR 246#define DRV_MODULE_VER_MAJOR 2
47#define DRV_MODULE_VER_MINOR 047#define DRV_MODULE_VER_MINOR 1
48#define DRV_MODULE_VER_SUBMINOR 348#define DRV_MODULE_VER_SUBMINOR 0
49 49
50#define DRV_MODULE_NAME "ena"50#define DRV_MODULE_NAME "ena"
51#ifndef DRV_MODULE_VERSION51#ifndef DRV_MODULE_VERSION
@@ -79,6 +79,7 @@ · 27 unmodified lines
79#define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))79#define ENA_BAR_MASK (BIT(ENA_REG_BAR) | BIT(ENA_MEM_BAR))
80 80
81#define ENA_DEFAULT_RING_SIZE (1024)81#define ENA_DEFAULT_RING_SIZE (1024)
82#define ENA_MIN_RING_SIZE (256)
82 83
83#define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2)84#define ENA_TX_WAKEUP_THRESH (MAX_SKB_FRAGS + 2)
84#define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN)85#define ENA_DEFAULT_RX_COPYBREAK (256 - NET_IP_ALIGN)
@@ -154,6 +155,18 @@ struct ena_napi { · 69 unmodified lines
154 u32 qid;155 u32 qid;
155};156};
156 157
158struct ena_calc_queue_size_ctx {
159 struct ena_com_dev_get_features_ctx *get_feat_ctx;
160 struct ena_com_dev *ena_dev;
161 struct pci_dev *pdev;
162 u16 tx_queue_size;
163 u16 rx_queue_size;
164 u16 max_tx_queue_size;
165 u16 max_rx_queue_size;
166 u16 max_tx_sgl_size;
167 u16 max_rx_sgl_size;
168};
169
157struct ena_tx_buffer {170struct ena_tx_buffer {
158 struct sk_buff *skb;171 struct sk_buff *skb;
159 /* num of ena desc for this specific skb172 /* num of ena desc for this specific skb
@@ -319,8 +332,11 @@ struct ena_adapter { · 159 unmodified lines
319 u32 tx_usecs, rx_usecs; /* interrupt moderation */332 u32 tx_usecs, rx_usecs; /* interrupt moderation */
320 u32 tx_frames, rx_frames; /* interrupt moderation */333 u32 tx_frames, rx_frames; /* interrupt moderation */
321 334
322 u32 tx_ring_size;335 u32 requested_tx_ring_size;
323 u32 rx_ring_size;336 u32 requested_rx_ring_size;
337
338 u32 max_tx_ring_size;
339 u32 max_rx_ring_size;
324 340
325 u32 msg_enable;341 u32 msg_enable;
326 342
@@ -372,6 +388,10 @@ void ena_dump_stats_to_dmesg(struct ena_adapter *adapter); · 45 unmodified lines
372 388
373void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);389void ena_dump_stats_to_buf(struct ena_adapter *adapter, u8 *buf);
374 390
391int ena_update_queue_sizes(struct ena_adapter *adapter,
392 u32 new_tx_size,
393 u32 new_rx_size);
394
375int ena_get_sset_count(struct net_device *netdev, int sset);395int ena_get_sset_count(struct net_device *netdev, int sset);
376 396
377#endif /* !(ENA_H) */397#endif /* !(ENA_H) */