Add driver for MEN's 16z135 High Speed UART. The 16z135 is a memory mapped UART Core on an MCB FPGA and has 1024 byte deep FIFO buffers for the RX and TX path. It also has configurable FIFO fill level IRQs and data copied to and from the hardware has to be acknowledged.
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| @@ -238,4 +238,7 @@ · 237 unmodified lines | |||
| 238 | /* Tilera TILE-Gx UART */ | 238 | /* Tilera TILE-Gx UART */ |
| 239 | #define PORT_TILEGX 106 | 239 | #define PORT_TILEGX 106 |
| 240 | 240 | ||
| 241 | /* MEN 16z135 UART */ | ||
| 242 | #define PORT_MEN_Z135 107 | ||
| 243 | |||
| 241 | #endif /* _UAPILINUX_SERIAL_CORE_H */ | 244 | #endif /* _UAPILINUX_SERIAL_CORE_H */ |