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drm/i915: Expose RPCS (SSEU) configuration to userspace (Gen11 only)

We want to allow userspace to reconfigure the subslice configuration on a per context basis. This is required for the functional requirement of shutting down non-VME enabled sub-slices on Gen11 parts. To do so, we expose a context parameter to allow adjustment of the RPCS register stored within the context image (and currently not accessible via LRI). If the context is adjusted before first use or whilst idle, the adjustment is for "free"; otherwise if the context is active we queue a request to do so (using the kernel context), following all other activity by that context, which is also marked as barrier for all following submission against the same context. Since the overhead of device re-configuration during context switching can be significant, especially in multi-context workloads, we limit this new uAPI to only support the Gen11 VME use case. In this use case either the device is fully enabled, and exactly one slice and half of the subslices are enabled. Example usage: struct drm_i915_gem_context_param_sseu sseu = { }; struct drm_i915_gem_context_param arg = { .param = I915_CONTEXT_PARAM_SSEU, .ctx_id = gem_context_create(fd), .size = sizeof(sseu), .value = to_user_pointer(&sseu) }; /* Query device defaults. */ gem_context_get_param(fd, &arg); /* Set VME configuration on a 1x6x8 part. */ sseu.slice_mask = 0x1; sseu.subslice_mask = 0xe0; gem_context_set_param(fd, &arg); v2: Fix offset of CTX_R_PWR_CLK_STATE in intel_lr_context_set_sseu() (Lionel) v3: Add ability to program this per engine (Chris) v4: Move most get_sseu() into i915_gem_context.c (Lionel) v5: Validate sseu configuration against the device's capabilities (Lionel) v6: Change context powergating settings through MI_SDM on kernel context (Chris) v7: Synchronize the requests following a powergating setting change using a global dependency (Chris) Iterate timelines through dev_priv.gt.active_rings (Tvrtko) Disable RPCS configuration setting for non capable users (Lionel/Tvrtko) v8: s/union intel_sseu/struct intel_sseu/ (Lionel) s/dev_priv/i915/ (Tvrtko) Change uapi class/instance fields to u16 (Tvrtko) Bump mask fields to 64bits (Lionel) Don't return EPERM when dynamic sseu is disabled (Tvrtko) v9: Import context image into kernel context's ppgtt only when reconfiguring powergated slice/subslices (Chris) Use aliasing ppgtt when needed (Michel) Tvrtko Ursulin: v10: * Update for upstream changes. * Request submit needs a RPM reference. * Reject on !FULL_PPGTT for simplicity. * Pull out get/set param to helpers for readability and less indent. * Use i915_request_await_dma_fence in add_global_barrier to skip waits on the same timeline and avoid GEM_BUG_ON. * No need to explicitly assign a NULL pointer to engine in legacy mode. * No need to move gen8_make_rpcs up. * Factored out global barrier as prep patch. * Allow to only CAP_SYS_ADMIN if !Gen11. v11: * Remove engine vfunc in favour of local helper. (Chris Wilson) * Stop retiring requests before updates since it is not needed (Chris Wilson) * Implement direct CPU update path for idle contexts. (Chris Wilson) * Left side dependency needs only be on the same context timeline. (Chris Wilson) * It is sufficient to order the timeline. (Chris Wilson) * Reject !RCS configuration attempts with -ENODEV for now. v12: * Rebase for make_rpcs. v13: * Centralize SSEU normalization to make_rpcs. * Type width checking (uAPI <-> implementation). * Gen11 restrictions uAPI checks. * Gen11 subslice count differences handling. Chris Wilson: * args->size handling fixes. * Update context image from GGTT. * Postpone context image update to pinning. * Use i915_gem_active_raw instead of last_request_on_engine. v14: * Add activity tracker on intel_context to fix the lifetime issues and simplify the code. (Chris Wilson) v15: * Fix context pin leak if no space in ring by simplifying the context pinning sequence. v16: * Rebase for context get/set param locking changes. * Just -ENODEV on !Gen11. (Joonas) v17: * Fix one Gen11 subslice enablement rule. * Handle error from i915_sw_fence_await_sw_fence_gfp. (Chris Wilson) v18: * Update commit message. (Joonas) * Restrict uAPI to VME use case. (Joonas) v19: * Rebase. v20: * Rebase for ce->active_tracker. v21: * Rebase for IS_GEN changes. v22: * Reserve uAPI for flags straight away. (Chris Wilson) v23: * Rebase for RUNTIME_INFO. v24: * Added some headline docs for the uapi usage. (Joonas/Chris) v25: * Renamed class/instance to engine_class/engine_instance to avoid clash with C++ keyword. (Tony Ye) v26: * Rebased for runtime pm api changes. v27: * Rebased for intel_context_init. * Wrap commit msg to 75. v28: (Chris Wilson) * Use i915_gem_ggtt. * Use i915_request_await_dma_fence to show a better example. v29: * i915_timeline_set_barrier can now fail. (Chris Wilson) v30: * Capture some acks. v31: * Drop the WARN_ON from use controllable paths. (Chris Wilson) * Use overflows_type for all checks.

Tvrtko Ursulin committed 7 years ago

Commit e46c2e91 parent 78108584 files · +411 −3Browse files

Showing the changes to include/uapi (1 of 4 files). Show all

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include/uapi/drm/i915_drm.h+64−0
@@ -1486,9 +1486,73 @@ struct drm_i915_gem_context_param { · 1485 unmodified lines
1486#define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */1486#define I915_CONTEXT_MAX_USER_PRIORITY 1023 /* inclusive */
1487#define I915_CONTEXT_DEFAULT_PRIORITY 01487#define I915_CONTEXT_DEFAULT_PRIORITY 0
1488#define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */1488#define I915_CONTEXT_MIN_USER_PRIORITY -1023 /* inclusive */
1489 /*
1490 * When using the following param, value should be a pointer to
1491 * drm_i915_gem_context_param_sseu.
1492 */
1493#define I915_CONTEXT_PARAM_SSEU 0x7
1489 __u64 value;1494 __u64 value;
1490};1495};
1491 1496
1497/**
1498 * Context SSEU programming
1499 *
1500 * It may be necessary for either functional or performance reason to configure
1501 * a context to run with a reduced number of SSEU (where SSEU stands for Slice/
1502 * Sub-slice/EU).
1503 *
1504 * This is done by configuring SSEU configuration using the below
1505 * @struct drm_i915_gem_context_param_sseu for every supported engine which
1506 * userspace intends to use.
1507 *
1508 * Not all GPUs or engines support this functionality in which case an error
1509 * code -ENODEV will be returned.
1510 *
1511 * Also, flexibility of possible SSEU configuration permutations varies between
1512 * GPU generations and software imposed limitations. Requesting such a
1513 * combination will return an error code of -EINVAL.
1514 *
1515 * NOTE: When perf/OA is active the context's SSEU configuration is ignored in
1516 * favour of a single global setting.
1517 */
1518struct drm_i915_gem_context_param_sseu {
1519 /*
1520 * Engine class & instance to be configured or queried.
1521 */
1522 __u16 engine_class;
1523 __u16 engine_instance;
1524
1525 /*
1526 * Unused for now. Must be cleared to zero.
1527 */
1528 __u32 flags;
1529
1530 /*
1531 * Mask of slices to enable for the context. Valid values are a subset
1532 * of the bitmask value returned for I915_PARAM_SLICE_MASK.
1533 */
1534 __u64 slice_mask;
1535
1536 /*
1537 * Mask of subslices to enable for the context. Valid values are a
1538 * subset of the bitmask value return by I915_PARAM_SUBSLICE_MASK.
1539 */
1540 __u64 subslice_mask;
1541
1542 /*
1543 * Minimum/Maximum number of EUs to enable per subslice for the
1544 * context. min_eus_per_subslice must be inferior or equal to
1545 * max_eus_per_subslice.
1546 */
1547 __u16 min_eus_per_subslice;
1548 __u16 max_eus_per_subslice;
1549
1550 /*
1551 * Unused for now. Must be cleared to zero.
1552 */
1553 __u32 rsvd;
1554};
1555
1492enum drm_i915_oa_format {1556enum drm_i915_oa_format {
1493 I915_OA_FORMAT_A13 = 1, /* HSW only */1557 I915_OA_FORMAT_A13 = 1, /* HSW only */
1494 I915_OA_FORMAT_A29, /* HSW only */1558 I915_OA_FORMAT_A29, /* HSW only */

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