* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: libata: Initialize nbytes for internal sg commands libata: Fix ata_busy_wait() kernel docs pata_via: Correct missing comments pata_atiixp: propogate cable detection hack from drivers/ide to the new driver ahci/pata_jmicron: fix JMicron quirk
Unified · Split
| @@ -1250,6 +1250,7 @@ unsigned ata_exec_internal_sg(struct ata_device *dev, · 1249 unmodified lines | ||
| 1250 | 1250 | |
| 1251 | 1251 | ata_sg_init(qc, sg, n_elem); |
| 1252 | 1252 | qc->nsect = buflen / ATA_SECT_SIZE; |
| 1253 | + qc->nbytes = buflen; | |
| 1253 | 1254 | } |
| 1254 | 1255 | |
| 1255 | 1256 | qc->private_data = &wait; |
| @@ -36,15 +36,22 @@ enum { · 35 unmodified lines | ||
| 36 | 36 | static int atiixp_pre_reset(struct ata_port *ap) |
| 37 | 37 | { |
| 38 | 38 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 39 | − static struct pci_bits atiixp_enable_bits[] = { | |
| 39 | + static const struct pci_bits atiixp_enable_bits[] = { | |
| 40 | 40 | { 0x48, 1, 0x01, 0x00 }, |
| 41 | 41 | { 0x48, 1, 0x08, 0x00 } |
| 42 | 42 | }; |
| 43 | + u8 udma; | |
| 43 | 44 | |
| 44 | 45 | if (!pci_test_config_bits(pdev, &atiixp_enable_bits[ap->port_no])) |
| 45 | 46 | return -ENOENT; |
| 46 | 47 | |
| 47 | − ap->cbl = ATA_CBL_PATA80; | |
| 48 | + /* Hack from drivers/ide/pci. Really we want to know how to do the | |
| 49 | + raw detection not play follow the bios mode guess */ | |
| 50 | + pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma); | |
| 51 | + if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40) | |
| 52 | + ap->cbl = ATA_CBL_PATA80; | |
| 53 | + else | |
| 54 | + ap->cbl = ATA_CBL_PATA40; | |
| 48 | 55 | return ata_std_prereset(ap); |
| 49 | 56 | } |
| 50 | 57 | |
| @@ -204,20 +204,12 @@ static int jmicron_init_one (struct pci_dev *pdev, const struct pci_device_id *i · 203 unmodified lines | ||
| 204 | 204 | |
| 205 | 205 | u32 reg; |
| 206 | 206 | |
| 207 | − if (id->driver_data != 368) { | |
| 208 | − /* Put the controller into AHCI mode in case the AHCI driver | |
| 209 | − has not yet been loaded. This can be done with either | |
| 210 | − function present */ | |
| 207 | + /* PATA controller is fn 1, AHCI is fn 0 */ | |
| 208 | + if (id->driver_data != 368 && PCI_FUNC(pdev->devfn) != 1) | |
| 209 | + return -ENODEV; | |
| 211 | 210 | |
| 212 | − /* FIXME: We may want a way to override this in future */ | |
| 213 | − pci_write_config_byte(pdev, 0x41, 0xa1); | |
| 214 | − | |
| 215 | − /* PATA controller is fn 1, AHCI is fn 0 */ | |
| 216 | − if (PCI_FUNC(pdev->devfn) != 1) | |
| 217 | − return -ENODEV; | |
| 218 | − } | |
| 219 | − if ( id->driver_data == 365 || id->driver_data == 366) { | |
| 220 | − /* The 365/66 have two PATA channels, redirect the second */ | |
| 211 | + /* The 365/66 have two PATA channels, redirect the second */ | |
| 212 | + if (id->driver_data == 365 || id->driver_data == 366) { | |
| 221 | 213 | pci_read_config_dword(pdev, 0x80, ®); |
| 222 | 214 | reg |= (1 << 24); /* IDE1 to PATA IDE secondary */ |
| 223 | 215 | pci_write_config_dword(pdev, 0x80, reg); |
| @@ -23,6 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | * VIA VT8233c - UDMA100 |
| 24 | 24 | * VIA VT8235 - UDMA133 |
| 25 | 25 | * VIA VT8237 - UDMA133 |
| 26 | + * VIA VT8237S - UDMA133 | |
| 26 | 27 | * VIA VT8251 - UDMA133 |
| 27 | 28 | * |
| 28 | 29 | * Most registers remain compatible across chips. Others start reserved |
| @@ -61,7 +62,7 @@ · 32 unmodified lines | ||
| 61 | 62 | #include <linux/libata.h> |
| 62 | 63 | |
| 63 | 64 | #define DRV_NAME "pata_via" |
| 64 | −#define DRV_VERSION "0.2.0" | |
| 65 | +#define DRV_VERSION "0.2.1" | |
| 65 | 66 | |
| 66 | 67 | /* |
| 67 | 68 | * The following comes directly from Vojtech Pavlik's ide/pci/via82cxxx |
| @@ -1262,8 +1262,8 @@ static void quirk_jmicron_dualfn(struct pci_dev *pdev) · 1261 unmodified lines | ||
| 1262 | 1262 | pci_read_config_dword(pdev, 0x40, &conf); |
| 1263 | 1263 | /* Enable dual function mode, AHCI on fn 0, IDE fn1 */ |
| 1264 | 1264 | /* Set the class codes correctly and then direct IDE 0 */ |
| 1265 | − conf &= ~0x000F0200; /* Clear bit 9 and 16-19 */ | |
| 1266 | − conf |= 0x00C20002; /* Set bit 1, 17, 22, 23 */ | |
| 1265 | + conf &= ~0x000FF200; /* Clear bit 9 and 12-19 */ | |
| 1266 | + conf |= 0x00C2A102; /* Set 1, 8, 13, 15, 17, 22, 23 */ | |
| 1267 | 1267 | pci_write_config_dword(pdev, 0x40, conf); |
| 1268 | 1268 | |
| 1269 | 1269 | /* Reconfigure so that the PCI scanner discovers the |
| @@ -1054,6 +1054,8 @@ static inline void ata_pause(struct ata_port *ap) · 1053 unmodified lines | ||
| 1054 | 1054 | /** |
| 1055 | 1055 | * ata_busy_wait - Wait for a port status register |
| 1056 | 1056 | * @ap: Port to wait for. |
| 1057 | + * @bits: bits that must be clear | |
| 1058 | + * @max: number of 10uS waits to perform | |
| 1057 | 1059 | * |
| 1058 | 1060 | * Waits up to max*10 microseconds for the selected bits in the port's |
| 1059 | 1061 | * status register to be cleared. |