On AM654, McSPI can only support 4K - 1 bytes per transfer when DMA is enabled. Therefore populate master->max_transfer_size callback to inform client drivers of this restriction when DMA channels are available.
Unified · Split
| @@ -130,6 +130,7 @@ struct omap2_mcspi { · 129 unmodified lines | |||
| 130 | int fifo_depth; | 130 | int fifo_depth; |
| 131 | bool slave_aborted; | 131 | bool slave_aborted; |
| 132 | unsigned int pin_dir:1; | 132 | unsigned int pin_dir:1; |
| 133 | size_t max_xfer_len; | ||
| 133 | }; | 134 | }; |
| 134 | 135 | ||
| 135 | struct omap2_mcspi_cs { | 136 | struct omap2_mcspi_cs { |
| @@ -1305,6 +1306,18 @@ static bool omap2_mcspi_can_dma(struct spi_master *master, · 1169 unmodified lines | |||
| 1305 | return (xfer->len >= DMA_MIN_BYTES); | 1306 | return (xfer->len >= DMA_MIN_BYTES); |
| 1306 | } | 1307 | } |
| 1307 | 1308 | ||
| 1309 | static size_t omap2_mcspi_max_xfer_size(struct spi_device *spi) | ||
| 1310 | { | ||
| 1311 | struct omap2_mcspi *mcspi = spi_master_get_devdata(spi->master); | ||
| 1312 | struct omap2_mcspi_dma *mcspi_dma = | ||
| 1313 | &mcspi->dma_channels[spi->chip_select]; | ||
| 1314 | |||
| 1315 | if (mcspi->max_xfer_len && mcspi_dma->dma_rx) | ||
| 1316 | return mcspi->max_xfer_len; | ||
| 1317 | |||
| 1318 | return SIZE_MAX; | ||
| 1319 | } | ||
| 1320 | |||
| 1308 | static int omap2_mcspi_controller_setup(struct omap2_mcspi *mcspi) | 1321 | static int omap2_mcspi_controller_setup(struct omap2_mcspi *mcspi) |
| 1309 | { | 1322 | { |
| 1310 | struct spi_master *master = mcspi->master; | 1323 | struct spi_master *master = mcspi->master; |
| @@ -1373,6 +1386,11 @@ static struct omap2_mcspi_platform_config omap4_pdata = { · 62 unmodified lines | |||
| 1373 | .regs_offset = OMAP4_MCSPI_REG_OFFSET, | 1386 | .regs_offset = OMAP4_MCSPI_REG_OFFSET, |
| 1374 | }; | 1387 | }; |
| 1375 | 1388 | ||
| 1389 | static struct omap2_mcspi_platform_config am654_pdata = { | ||
| 1390 | .regs_offset = OMAP4_MCSPI_REG_OFFSET, | ||
| 1391 | .max_xfer_len = SZ_4K - 1, | ||
| 1392 | }; | ||
| 1393 | |||
| 1376 | static const struct of_device_id omap_mcspi_of_match[] = { | 1394 | static const struct of_device_id omap_mcspi_of_match[] = { |
| 1377 | { | 1395 | { |
| 1378 | .compatible = "ti,omap2-mcspi", | 1396 | .compatible = "ti,omap2-mcspi", |
| @@ -1382,6 +1400,10 @@ static const struct of_device_id omap_mcspi_of_match[] = { · 3 unmodified lines | |||
| 1382 | .compatible = "ti,omap4-mcspi", | 1400 | .compatible = "ti,omap4-mcspi", |
| 1383 | .data = &omap4_pdata, | 1401 | .data = &omap4_pdata, |
| 1384 | }, | 1402 | }, |
| 1403 | { | ||
| 1404 | .compatible = "ti,am654-mcspi", | ||
| 1405 | .data = &am654_pdata, | ||
| 1406 | }, | ||
| 1385 | { }, | 1407 | { }, |
| 1386 | }; | 1408 | }; |
| 1387 | MODULE_DEVICE_TABLE(of, omap_mcspi_of_match); | 1409 | MODULE_DEVICE_TABLE(of, omap_mcspi_of_match); |
| @@ -1439,6 +1461,10 @@ static int omap2_mcspi_probe(struct platform_device *pdev) · 51 unmodified lines | |||
| 1439 | mcspi->pin_dir = pdata->pin_dir; | 1461 | mcspi->pin_dir = pdata->pin_dir; |
| 1440 | } | 1462 | } |
| 1441 | regs_offset = pdata->regs_offset; | 1463 | regs_offset = pdata->regs_offset; |
| 1464 | if (pdata->max_xfer_len) { | ||
| 1465 | mcspi->max_xfer_len = pdata->max_xfer_len; | ||
| 1466 | master->max_transfer_size = omap2_mcspi_max_xfer_size; | ||
| 1467 | } | ||
| 1442 | 1468 | ||
| 1443 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1469 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1444 | mcspi->base = devm_ioremap_resource(&pdev->dev, r); | 1470 | mcspi->base = devm_ioremap_resource(&pdev->dev, r); |
| @@ -11,6 +11,7 @@ struct omap2_mcspi_platform_config { · 10 unmodified lines | |||
| 11 | unsigned short num_cs; | 11 | unsigned short num_cs; |
| 12 | unsigned int regs_offset; | 12 | unsigned int regs_offset; |
| 13 | unsigned int pin_dir:1; | 13 | unsigned int pin_dir:1; |
| 14 | size_t max_xfer_len; | ||
| 14 | }; | 15 | }; |
| 15 | 16 | ||
| 16 | struct omap2_mcspi_device_config { | 17 | struct omap2_mcspi_device_config { |