The PRG Response PASID Required bit in the PRI Capability is read-only. Read it once when we enumerate the device and cache the value so we don't need to read it again.
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| @@ -456,6 +456,7 @@ struct pci_dev { · 455 unmodified lines | |||
| 456 | #ifdef CONFIG_PCI_PRI | 456 | #ifdef CONFIG_PCI_PRI |
| 457 | u16 pri_cap; /* PRI Capability offset */ | 457 | u16 pri_cap; /* PRI Capability offset */ |
| 458 | u32 pri_reqs_alloc; /* Number of PRI requests allocated */ | 458 | u32 pri_reqs_alloc; /* Number of PRI requests allocated */ |
| 459 | unsigned int pasid_required:1; /* PRG Response PASID Required */ | ||
| 459 | #endif | 460 | #endif |
| 460 | #ifdef CONFIG_PCI_PASID | 461 | #ifdef CONFIG_PCI_PASID |
| 461 | u16 pasid_cap; /* PASID Capability offset */ | 462 | u16 pasid_cap; /* PASID Capability offset */ |