Pull ARC fixes from Vineet Gupta: - mmap handler for dma ops as generic handler no longer works for us [Alexey] - Fixes for EZChip platform [Noam] - Fix RTC clocksource driver build issue - ARC IRQ handling fixes [Yuriy] - Revert a recent makefile change which doesn't go well with oldish tools out in the wild * tag 'arc-4.9-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARCv2: MCIP: Use IDU_M_DISTRI_DEST mode if there is only 1 destination core ARC: IRQ: Do not use hwirq as virq and vice versa ARC: [plat-eznps] set default baud for early console ARC: [plat-eznps] remove IPI clear from SMP operations Revert "ARC: build: retire old toggles" ARC: timer: rtc: implement read loop in "C" vs. inline asm ARC: change return value of userspace cmpxchg assist syscall arc: Implement arch-specific dma_map_ops.mmap ARC: [SMP] avoid overriding present cpumask ARC: Enable PERF_EVENTS in nSIM driven platforms
Unified · Split
| @@ -50,6 +50,9 @@ atleast_gcc44 := $(call cc-ifversion, -ge, 0404, y) · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | cflags-$(atleast_gcc44) += -fsection-anchors |
| 52 | 52 | |
| 53 | +cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock | |
| 54 | +cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape | |
| 55 | + | |
| 53 | 56 | ifdef CONFIG_ISA_ARCV2 |
| 54 | 57 | |
| 55 | 58 | ifndef CONFIG_ARC_HAS_LL64 |
| @@ -71,7 +71,7 @@ · 70 unmodified lines | ||
| 71 | 71 | reg-io-width = <4>; |
| 72 | 72 | }; |
| 73 | 73 | |
| 74 | − arcpmu0: pmu { | |
| 74 | + arcpct0: pct { | |
| 75 | 75 | compatible = "snps,arc700-pct"; |
| 76 | 76 | }; |
| 77 | 77 | }; |
| @@ -69,7 +69,7 @@ · 68 unmodified lines | ||
| 69 | 69 | }; |
| 70 | 70 | }; |
| 71 | 71 | |
| 72 | − arcpmu0: pmu { | |
| 72 | + arcpct0: pct { | |
| 73 | 73 | compatible = "snps,arc700-pct"; |
| 74 | 74 | }; |
| 75 | 75 | }; |
| @@ -83,5 +83,9 @@ · 82 unmodified lines | ||
| 83 | 83 | reg = <0xf0003000 0x44>; |
| 84 | 84 | interrupts = <7>; |
| 85 | 85 | }; |
| 86 | + | |
| 87 | + arcpct0: pct { | |
| 88 | + compatible = "snps,arc700-pct"; | |
| 89 | + }; | |
| 86 | 90 | }; |
| 87 | 91 | }; |
| @@ -14,6 +14,7 @@ CONFIG_BLK_DEV_INITRD=y · 13 unmodified lines | ||
| 14 | 14 | CONFIG_INITRAMFS_SOURCE="../arc_initramfs/" |
| 15 | 15 | CONFIG_KALLSYMS_ALL=y |
| 16 | 16 | CONFIG_EMBEDDED=y |
| 17 | +CONFIG_PERF_EVENTS=y | |
| 17 | 18 | # CONFIG_SLUB_DEBUG is not set |
| 18 | 19 | # CONFIG_COMPAT_BRK is not set |
| 19 | 20 | CONFIG_KPROBES=y |
| @@ -14,6 +14,7 @@ CONFIG_BLK_DEV_INITRD=y · 13 unmodified lines | ||
| 14 | 14 | CONFIG_INITRAMFS_SOURCE="../../arc_initramfs_hs/" |
| 15 | 15 | CONFIG_KALLSYMS_ALL=y |
| 16 | 16 | CONFIG_EMBEDDED=y |
| 17 | +CONFIG_PERF_EVENTS=y | |
| 17 | 18 | # CONFIG_SLUB_DEBUG is not set |
| 18 | 19 | # CONFIG_COMPAT_BRK is not set |
| 19 | 20 | CONFIG_KPROBES=y |
| @@ -12,6 +12,7 @@ CONFIG_BLK_DEV_INITRD=y · 11 unmodified lines | ||
| 12 | 12 | CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/" |
| 13 | 13 | CONFIG_KALLSYMS_ALL=y |
| 14 | 14 | CONFIG_EMBEDDED=y |
| 15 | +CONFIG_PERF_EVENTS=y | |
| 15 | 16 | # CONFIG_SLUB_DEBUG is not set |
| 16 | 17 | # CONFIG_COMPAT_BRK is not set |
| 17 | 18 | CONFIG_KPROBES=y |
| @@ -14,6 +14,7 @@ CONFIG_BLK_DEV_INITRD=y · 13 unmodified lines | ||
| 14 | 14 | CONFIG_INITRAMFS_SOURCE="../arc_initramfs/" |
| 15 | 15 | CONFIG_KALLSYMS_ALL=y |
| 16 | 16 | CONFIG_EMBEDDED=y |
| 17 | +CONFIG_PERF_EVENTS=y | |
| 17 | 18 | # CONFIG_SLUB_DEBUG is not set |
| 18 | 19 | # CONFIG_COMPAT_BRK is not set |
| 19 | 20 | CONFIG_KPROBES=y |
| @@ -14,6 +14,7 @@ CONFIG_BLK_DEV_INITRD=y · 13 unmodified lines | ||
| 14 | 14 | CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/" |
| 15 | 15 | CONFIG_KALLSYMS_ALL=y |
| 16 | 16 | CONFIG_EMBEDDED=y |
| 17 | +CONFIG_PERF_EVENTS=y | |
| 17 | 18 | # CONFIG_SLUB_DEBUG is not set |
| 18 | 19 | # CONFIG_COMPAT_BRK is not set |
| 19 | 20 | CONFIG_KPROBES=y |
| @@ -10,6 +10,7 @@ CONFIG_IKCONFIG_PROC=y · 9 unmodified lines | ||
| 10 | 10 | # CONFIG_PID_NS is not set |
| 11 | 11 | CONFIG_BLK_DEV_INITRD=y |
| 12 | 12 | CONFIG_INITRAMFS_SOURCE="../arc_initramfs_hs/" |
| 13 | +CONFIG_PERF_EVENTS=y | |
| 13 | 14 | # CONFIG_COMPAT_BRK is not set |
| 14 | 15 | CONFIG_KPROBES=y |
| 15 | 16 | CONFIG_MODULES=y |
| @@ -34,7 +35,6 @@ CONFIG_INET=y · 18 unmodified lines | ||
| 34 | 35 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
| 35 | 36 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
| 36 | 37 | # CONFIG_INET_XFRM_MODE_BEET is not set |
| 37 | −# CONFIG_INET_LRO is not set | |
| 38 | 38 | # CONFIG_IPV6 is not set |
| 39 | 39 | # CONFIG_WIRELESS is not set |
| 40 | 40 | CONFIG_DEVTMPFS=y |
| @@ -72,7 +72,6 @@ CONFIG_SERIAL_OF_PLATFORM=y · 31 unmodified lines | ||
| 72 | 72 | # CONFIG_HWMON is not set |
| 73 | 73 | CONFIG_DRM=y |
| 74 | 74 | CONFIG_DRM_ARCPGU=y |
| 75 | −CONFIG_FRAMEBUFFER_CONSOLE=y | |
| 76 | 75 | CONFIG_LOGO=y |
| 77 | 76 | # CONFIG_HID is not set |
| 78 | 77 | # CONFIG_USB_SUPPORT is not set |
| @@ -43,12 +43,14 @@ · 42 unmodified lines | ||
| 43 | 43 | #define STATUS_AE_BIT 5 /* Exception active */ |
| 44 | 44 | #define STATUS_DE_BIT 6 /* PC is in delay slot */ |
| 45 | 45 | #define STATUS_U_BIT 7 /* User/Kernel mode */ |
| 46 | +#define STATUS_Z_BIT 11 | |
| 46 | 47 | #define STATUS_L_BIT 12 /* Loop inhibit */ |
| 47 | 48 | |
| 48 | 49 | /* These masks correspond to the status word(STATUS_32) bits */ |
| 49 | 50 | #define STATUS_AE_MASK (1<<STATUS_AE_BIT) |
| 50 | 51 | #define STATUS_DE_MASK (1<<STATUS_DE_BIT) |
| 51 | 52 | #define STATUS_U_MASK (1<<STATUS_U_BIT) |
| 53 | +#define STATUS_Z_MASK (1<<STATUS_Z_BIT) | |
| 52 | 54 | #define STATUS_L_MASK (1<<STATUS_L_BIT) |
| 53 | 55 | |
| 54 | 56 | /* |
| @@ -37,9 +37,9 @@ extern const char *arc_platform_smp_cpuinfo(void); · 36 unmodified lines | ||
| 37 | 37 | * API expected BY platform smp code (FROM arch smp code) |
| 38 | 38 | * |
| 39 | 39 | * smp_ipi_irq_setup: |
| 40 | − * Takes @cpu and @irq to which the arch-common ISR is hooked up | |
| 40 | + * Takes @cpu and @hwirq to which the arch-common ISR is hooked up | |
| 41 | 41 | */ |
| 42 | −extern int smp_ipi_irq_setup(int cpu, int irq); | |
| 42 | +extern int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq); | |
| 43 | 43 | |
| 44 | 44 | /* |
| 45 | 45 | * struct plat_smp_ops - SMP callbacks provided by platform to ARC SMP |
| @@ -31,6 +31,8 @@ static void __init arc_set_early_base_baud(unsigned long dt_root) · 30 unmodified lines | ||
| 31 | 31 | arc_base_baud = 166666666; /* Fixed 166.6MHz clk (TB10x) */ |
| 32 | 32 | else if (of_flat_dt_is_compatible(dt_root, "snps,arc-sdp")) |
| 33 | 33 | arc_base_baud = 33333333; /* Fixed 33MHz clk (AXS10x) */ |
| 34 | + else if (of_flat_dt_is_compatible(dt_root, "ezchip,arc-nps")) | |
| 35 | + arc_base_baud = 800000000; /* Fixed 800MHz clk (NPS) */ | |
| 34 | 36 | else |
| 35 | 37 | arc_base_baud = 50000000; /* Fixed default 50MHz */ |
| 36 | 38 | } |
| @@ -181,6 +181,8 @@ idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask, · 180 unmodified lines | ||
| 181 | 181 | { |
| 182 | 182 | unsigned long flags; |
| 183 | 183 | cpumask_t online; |
| 184 | + unsigned int destination_bits; | |
| 185 | + unsigned int distribution_mode; | |
| 184 | 186 | |
| 185 | 187 | /* errout if no online cpu per @cpumask */ |
| 186 | 188 | if (!cpumask_and(&online, cpumask, cpu_online_mask)) |
| @@ -188,8 +190,15 @@ idu_irq_set_affinity(struct irq_data *data, const struct cpumask *cpumask, · 1 unmodified line | ||
| 188 | 190 | |
| 189 | 191 | raw_spin_lock_irqsave(&mcip_lock, flags); |
| 190 | 192 | |
| 191 | − idu_set_dest(data->hwirq, cpumask_bits(&online)[0]); | |
| 192 | − idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR); | |
| 193 | + destination_bits = cpumask_bits(&online)[0]; | |
| 194 | + idu_set_dest(data->hwirq, destination_bits); | |
| 195 | + | |
| 196 | + if (ffs(destination_bits) == fls(destination_bits)) | |
| 197 | + distribution_mode = IDU_M_DISTRI_DEST; | |
| 198 | + else | |
| 199 | + distribution_mode = IDU_M_DISTRI_RR; | |
| 200 | + | |
| 201 | + idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, distribution_mode); | |
| 193 | 202 | |
| 194 | 203 | raw_spin_unlock_irqrestore(&mcip_lock, flags); |
| 195 | 204 | |
| @@ -207,16 +216,15 @@ static struct irq_chip idu_irq_chip = { · 11 unmodified lines | ||
| 207 | 216 | |
| 208 | 217 | }; |
| 209 | 218 | |
| 210 | −static int idu_first_irq; | |
| 219 | +static irq_hw_number_t idu_first_hwirq; | |
| 211 | 220 | |
| 212 | 221 | static void idu_cascade_isr(struct irq_desc *desc) |
| 213 | 222 | { |
| 214 | − struct irq_domain *domain = irq_desc_get_handler_data(desc); | |
| 215 | − unsigned int core_irq = irq_desc_get_irq(desc); | |
| 216 | − unsigned int idu_irq; | |
| 223 | + struct irq_domain *idu_domain = irq_desc_get_handler_data(desc); | |
| 224 | + irq_hw_number_t core_hwirq = irqd_to_hwirq(irq_desc_get_irq_data(desc)); | |
| 225 | + irq_hw_number_t idu_hwirq = core_hwirq - idu_first_hwirq; | |
| 217 | 226 | |
| 218 | − idu_irq = core_irq - idu_first_irq; | |
| 219 | − generic_handle_irq(irq_find_mapping(domain, idu_irq)); | |
| 227 | + generic_handle_irq(irq_find_mapping(idu_domain, idu_hwirq)); | |
| 220 | 228 | } |
| 221 | 229 | |
| 222 | 230 | static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) |
| @@ -282,7 +290,7 @@ idu_of_init(struct device_node *intc, struct device_node *parent) · 59 unmodified lines | ||
| 282 | 290 | struct irq_domain *domain; |
| 283 | 291 | /* Read IDU BCR to confirm nr_irqs */ |
| 284 | 292 | int nr_irqs = of_irq_count(intc); |
| 285 | − int i, irq; | |
| 293 | + int i, virq; | |
| 286 | 294 | struct mcip_bcr mp; |
| 287 | 295 | |
| 288 | 296 | READ_BCR(ARC_REG_MCIP_BCR, mp); |
| @@ -303,11 +311,11 @@ idu_of_init(struct device_node *intc, struct device_node *parent) · 14 unmodified lines | ||
| 303 | 311 | * however we need it to get the parent virq and set IDU handler |
| 304 | 312 | * as first level isr |
| 305 | 313 | */ |
| 306 | − irq = irq_of_parse_and_map(intc, i); | |
| 314 | + virq = irq_of_parse_and_map(intc, i); | |
| 307 | 315 | if (!i) |
| 308 | − idu_first_irq = irq; | |
| 316 | + idu_first_hwirq = irqd_to_hwirq(irq_get_irq_data(virq)); | |
| 309 | 317 | |
| 310 | − irq_set_chained_handler_and_data(irq, idu_cascade_isr, domain); | |
| 318 | + irq_set_chained_handler_and_data(virq, idu_cascade_isr, domain); | |
| 311 | 319 | } |
| 312 | 320 | |
| 313 | 321 | __mcip_cmd(CMD_IDU_ENABLE, 0); |
| @@ -43,8 +43,8 @@ SYSCALL_DEFINE0(arc_gettls) · 42 unmodified lines | ||
| 43 | 43 | |
| 44 | 44 | SYSCALL_DEFINE3(arc_usr_cmpxchg, int *, uaddr, int, expected, int, new) |
| 45 | 45 | { |
| 46 | − int uval; | |
| 47 | − int ret; | |
| 46 | + struct pt_regs *regs = current_pt_regs(); | |
| 47 | + int uval = -EFAULT; | |
| 48 | 48 | |
| 49 | 49 | /* |
| 50 | 50 | * This is only for old cores lacking LLOCK/SCOND, which by defintion |
| @@ -54,24 +54,26 @@ SYSCALL_DEFINE3(arc_usr_cmpxchg, int *, uaddr, int, expected, int, new) · 3 unmodified lines | ||
| 54 | 54 | */ |
| 55 | 55 | WARN_ON_ONCE(IS_ENABLED(CONFIG_SMP)); |
| 56 | 56 | |
| 57 | + /* Z indicates to userspace if operation succeded */ | |
| 58 | + regs->status32 &= ~STATUS_Z_MASK; | |
| 59 | + | |
| 57 | 60 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) |
| 58 | 61 | return -EFAULT; |
| 59 | 62 | |
| 60 | 63 | preempt_disable(); |
| 61 | 64 | |
| 62 | − ret = __get_user(uval, uaddr); | |
| 63 | − if (ret) | |
| 65 | + if (__get_user(uval, uaddr)) | |
| 64 | 66 | goto done; |
| 65 | 67 | |
| 66 | − if (uval != expected) | |
| 67 | − ret = -EAGAIN; | |
| 68 | − else | |
| 69 | − ret = __put_user(new, uaddr); | |
| 68 | + if (uval == expected) { | |
| 69 | + if (!__put_user(new, uaddr)) | |
| 70 | + regs->status32 |= STATUS_Z_MASK; | |
| 71 | + } | |
| 70 | 72 | |
| 71 | 73 | done: |
| 72 | 74 | preempt_enable(); |
| 73 | 75 | |
| 74 | − return ret; | |
| 76 | + return uval; | |
| 75 | 77 | } |
| 76 | 78 | |
| 77 | 79 | void arch_cpu_idle(void) |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #include <linux/atomic.h> |
| 23 | 23 | #include <linux/cpumask.h> |
| 24 | 24 | #include <linux/reboot.h> |
| 25 | +#include <linux/irqdomain.h> | |
| 25 | 26 | #include <asm/processor.h> |
| 26 | 27 | #include <asm/setup.h> |
| 27 | 28 | #include <asm/mach_desc.h> |
| @@ -67,11 +68,13 @@ void __init smp_prepare_cpus(unsigned int max_cpus) · 39 unmodified lines | ||
| 67 | 68 | int i; |
| 68 | 69 | |
| 69 | 70 | /* |
| 70 | − * Initialise the present map, which describes the set of CPUs | |
| 71 | − * actually populated at the present time. | |
| 71 | + * if platform didn't set the present map already, do it now | |
| 72 | + * boot cpu is set to present already by init/main.c | |
| 72 | 73 | */ |
| 73 | − for (i = 0; i < max_cpus; i++) | |
| 74 | − set_cpu_present(i, true); | |
| 74 | + if (num_present_cpus() <= 1) { | |
| 75 | + for (i = 0; i < max_cpus; i++) | |
| 76 | + set_cpu_present(i, true); | |
| 77 | + } | |
| 75 | 78 | } |
| 76 | 79 | |
| 77 | 80 | void __init smp_cpus_done(unsigned int max_cpus) |
| @@ -351,20 +354,24 @@ irqreturn_t do_IPI(int irq, void *dev_id) · 273 unmodified lines | ||
| 351 | 354 | */ |
| 352 | 355 | static DEFINE_PER_CPU(int, ipi_dev); |
| 353 | 356 | |
| 354 | −int smp_ipi_irq_setup(int cpu, int irq) | |
| 357 | +int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq) | |
| 355 | 358 | { |
| 356 | 359 | int *dev = per_cpu_ptr(&ipi_dev, cpu); |
| 360 | + unsigned int virq = irq_find_mapping(NULL, hwirq); | |
| 361 | + | |
| 362 | + if (!virq) | |
| 363 | + panic("Cannot find virq for root domain and hwirq=%lu", hwirq); | |
| 357 | 364 | |
| 358 | 365 | /* Boot cpu calls request, all call enable */ |
| 359 | 366 | if (!cpu) { |
| 360 | 367 | int rc; |
| 361 | 368 | |
| 362 | − rc = request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev); | |
| 369 | + rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev); | |
| 363 | 370 | if (rc) |
| 364 | − panic("Percpu IRQ request failed for %d\n", irq); | |
| 371 | + panic("Percpu IRQ request failed for %u\n", virq); | |
| 365 | 372 | } |
| 366 | 373 | |
| 367 | − enable_percpu_irq(irq, 0); | |
| 374 | + enable_percpu_irq(virq, 0); | |
| 368 | 375 | |
| 369 | 376 | return 0; |
| 370 | 377 | } |
| @@ -152,14 +152,17 @@ static cycle_t arc_read_rtc(struct clocksource *cs) · 151 unmodified lines | ||
| 152 | 152 | cycle_t full; |
| 153 | 153 | } stamp; |
| 154 | 154 | |
| 155 | − | |
| 156 | − __asm__ __volatile( | |
| 157 | − "1: \n" | |
| 158 | − " lr %0, [AUX_RTC_LOW] \n" | |
| 159 | − " lr %1, [AUX_RTC_HIGH] \n" | |
| 160 | − " lr %2, [AUX_RTC_CTRL] \n" | |
| 161 | − " bbit0.nt %2, 31, 1b \n" | |
| 162 | − : "=r" (stamp.low), "=r" (stamp.high), "=r" (status)); | |
| 155 | + /* | |
| 156 | + * hardware has an internal state machine which tracks readout of | |
| 157 | + * low/high and updates the CTRL.status if | |
| 158 | + * - interrupt/exception taken between the two reads | |
| 159 | + * - high increments after low has been read | |
| 160 | + */ | |
| 161 | + do { | |
| 162 | + stamp.low = read_aux_reg(AUX_RTC_LOW); | |
| 163 | + stamp.high = read_aux_reg(AUX_RTC_HIGH); | |
| 164 | + status = read_aux_reg(AUX_RTC_CTRL); | |
| 165 | + } while (!(status & _BITUL(31))); | |
| 163 | 166 | |
| 164 | 167 | return stamp.full; |
| 165 | 168 | } |
| @@ -105,6 +105,31 @@ static void arc_dma_free(struct device *dev, size_t size, void *vaddr, · 104 unmodified lines | ||
| 105 | 105 | __free_pages(page, get_order(size)); |
| 106 | 106 | } |
| 107 | 107 | |
| 108 | +static int arc_dma_mmap(struct device *dev, struct vm_area_struct *vma, | |
| 109 | + void *cpu_addr, dma_addr_t dma_addr, size_t size, | |
| 110 | + unsigned long attrs) | |
| 111 | +{ | |
| 112 | + unsigned long user_count = vma_pages(vma); | |
| 113 | + unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT; | |
| 114 | + unsigned long pfn = __phys_to_pfn(plat_dma_to_phys(dev, dma_addr)); | |
| 115 | + unsigned long off = vma->vm_pgoff; | |
| 116 | + int ret = -ENXIO; | |
| 117 | + | |
| 118 | + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
| 119 | + | |
| 120 | + if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret)) | |
| 121 | + return ret; | |
| 122 | + | |
| 123 | + if (off < count && user_count <= (count - off)) { | |
| 124 | + ret = remap_pfn_range(vma, vma->vm_start, | |
| 125 | + pfn + off, | |
| 126 | + user_count << PAGE_SHIFT, | |
| 127 | + vma->vm_page_prot); | |
| 128 | + } | |
| 129 | + | |
| 130 | + return ret; | |
| 131 | +} | |
| 132 | + | |
| 108 | 133 | /* |
| 109 | 134 | * streaming DMA Mapping API... |
| 110 | 135 | * CPU accesses page via normal paddr, thus needs to explicitly made |
| @@ -193,6 +218,7 @@ static int arc_dma_supported(struct device *dev, u64 dma_mask) · 82 unmodified lines | ||
| 193 | 218 | struct dma_map_ops arc_dma_ops = { |
| 194 | 219 | .alloc = arc_dma_alloc, |
| 195 | 220 | .free = arc_dma_free, |
| 221 | + .mmap = arc_dma_mmap, | |
| 196 | 222 | .map_page = arc_dma_map_page, |
| 197 | 223 | .map_sg = arc_dma_map_sg, |
| 198 | 224 | .sync_single_for_device = arc_dma_sync_single_for_device, |
| @@ -140,16 +140,10 @@ static void eznps_init_per_cpu(int cpu) · 139 unmodified lines | ||
| 140 | 140 | mtm_enable_core(cpu); |
| 141 | 141 | } |
| 142 | 142 | |
| 143 | −static void eznps_ipi_clear(int irq) | |
| 144 | −{ | |
| 145 | − write_aux_reg(CTOP_AUX_IACK, 1 << irq); | |
| 146 | −} | |
| 147 | − | |
| 148 | 143 | struct plat_smp_ops plat_smp_ops = { |
| 149 | 144 | .info = smp_cpuinfo_buf, |
| 150 | 145 | .init_early_smp = eznps_init_cpumasks, |
| 151 | 146 | .cpu_kick = eznps_smp_wakeup_cpu, |
| 152 | 147 | .ipi_send = eznps_ipi_send, |
| 153 | 148 | .init_per_cpu = eznps_init_per_cpu, |
| 154 | − .ipi_clear = eznps_ipi_clear, | |
| 155 | 149 | }; |