This device shares the PCI ID with the Samsung 970 Evo Plus that does not need or want the quirks. Move the the quirk entry to the core table based on the model number instead.
Unified · Split
| @@ -2546,6 +2546,20 @@ static const struct nvme_core_quirk_entry core_quirks[] = { · 2545 unmodified lines | |||
| 2546 | .vid = 0x1e0f, | 2546 | .vid = 0x1e0f, |
| 2547 | .mn = "KCD6XVUL6T40", | 2547 | .mn = "KCD6XVUL6T40", |
| 2548 | .quirks = NVME_QUIRK_NO_APST, | 2548 | .quirks = NVME_QUIRK_NO_APST, |
| 2549 | }, | ||
| 2550 | { | ||
| 2551 | /* | ||
| 2552 | * The external Samsung X5 SSD fails initialization without a | ||
| 2553 | * delay before checking if it is ready and has a whole set of | ||
| 2554 | * other problems. To make this even more interesting, it | ||
| 2555 | * shares the PCI ID with internal Samsung 970 Evo Plus that | ||
| 2556 | * does not need or want these quirks. | ||
| 2557 | */ | ||
| 2558 | .vid = 0x144d, | ||
| 2559 | .mn = "Samsung Portable SSD X5", | ||
| 2560 | .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY | | ||
| 2561 | NVME_QUIRK_NO_DEEPEST_PS | | ||
| 2562 | NVME_QUIRK_IGNORE_DEV_SUBNQN, | ||
| 2549 | } | 2563 | } |
| 2550 | }; | 2564 | }; |
| 2551 | 2565 | ||
| @@ -3526,10 +3526,6 @@ static const struct pci_device_id nvme_id_table[] = { · 3525 unmodified lines | |||
| 3526 | NVME_QUIRK_128_BYTES_SQES | | 3526 | NVME_QUIRK_128_BYTES_SQES | |
| 3527 | NVME_QUIRK_SHARED_TAGS | | 3527 | NVME_QUIRK_SHARED_TAGS | |
| 3528 | NVME_QUIRK_SKIP_CID_GEN }, | 3528 | NVME_QUIRK_SKIP_CID_GEN }, |
| 3529 | { PCI_DEVICE(0x144d, 0xa808), /* Samsung X5 */ | ||
| 3530 | .driver_data = NVME_QUIRK_DELAY_BEFORE_CHK_RDY| | ||
| 3531 | NVME_QUIRK_NO_DEEPEST_PS | | ||
| 3532 | NVME_QUIRK_IGNORE_DEV_SUBNQN, }, | ||
| 3533 | { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, | 3529 | { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) }, |
| 3534 | { 0, } | 3530 | { 0, } |
| 3535 | }; | 3531 | }; |