Oded writes: This tag contains the following fixes: - Fix the code that checks whether we can use 2MB page size when mapping memory in the ASIC's MMU. The current code had a "hole" which happened in architectures other then x86-64. - Fix the debugfs interface to read/write from/to the device using device virtual addresses. There was a bug in the translation regarding addresses that were mapped using 2MB page size. - Fix a bug in the debug/profiling code, where the code didn't read the full address but only the lower 32-bits of the address. * tag 'misc-habanalabs-fixes-2019-06-06' of git://people.freedesktop.org/~gabbayo/linux: habanalabs: Read upper bits of trace buffer from RWPHI habanalabs: Fix virtual address access via debugfs for 2MB pages habanalabs: fix bug in checking huge page optimization
Unified · Split
| @@ -500,6 +500,7 @@ static int device_va_to_pa(struct hl_device *hdev, u64 virt_addr, · 499 unmodified lines | ||
| 500 | 500 | { |
| 501 | 501 | struct hl_ctx *ctx = hdev->user_ctx; |
| 502 | 502 | u64 hop_addr, hop_pte_addr, hop_pte; |
| 503 | + u64 offset_mask = HOP4_MASK | OFFSET_MASK; | |
| 503 | 504 | int rc = 0; |
| 504 | 505 | |
| 505 | 506 | if (!ctx) { |
| @@ -542,12 +543,14 @@ static int device_va_to_pa(struct hl_device *hdev, u64 virt_addr, · 36 unmodified lines | ||
| 542 | 543 | goto not_mapped; |
| 543 | 544 | hop_pte_addr = get_hop4_pte_addr(ctx, hop_addr, virt_addr); |
| 544 | 545 | hop_pte = hdev->asic_funcs->read_pte(hdev, hop_pte_addr); |
| 546 | + | |
| 547 | + offset_mask = OFFSET_MASK; | |
| 545 | 548 | } |
| 546 | 549 | |
| 547 | 550 | if (!(hop_pte & PAGE_PRESENT_MASK)) |
| 548 | 551 | goto not_mapped; |
| 549 | 552 | |
| 550 | − *phys_addr = (hop_pte & PTE_PHYS_ADDR_MASK) | (virt_addr & OFFSET_MASK); | |
| 553 | + *phys_addr = (hop_pte & ~offset_mask) | (virt_addr & offset_mask); | |
| 551 | 554 | |
| 552 | 555 | goto out; |
| 553 | 556 | |
| @@ -425,8 +425,18 @@ static int goya_config_etr(struct hl_device *hdev, · 424 unmodified lines | ||
| 425 | 425 | WREG32(base_reg + 0x28, 0); |
| 426 | 426 | WREG32(base_reg + 0x304, 0); |
| 427 | 427 | |
| 428 | − if (params->output_size >= sizeof(u32)) | |
| 429 | − *(u32 *) params->output = RREG32(base_reg + 0x18); | |
| 428 | + if (params->output_size >= sizeof(u64)) { | |
| 429 | + u32 rwp, rwphi; | |
| 430 | + | |
| 431 | + /* | |
| 432 | + * The trace buffer address is 40 bits wide. The end of | |
| 433 | + * the buffer is set in the RWP register (lower 32 | |
| 434 | + * bits), and in the RWPHI register (upper 8 bits). | |
| 435 | + */ | |
| 436 | + rwp = RREG32(base_reg + 0x18); | |
| 437 | + rwphi = RREG32(base_reg + 0x3c) & 0xff; | |
| 438 | + *(u64 *) params->output = ((u64) rwphi << 32) | rwp; | |
| 439 | + } | |
| 430 | 440 | } |
| 431 | 441 | |
| 432 | 442 | return 0; |
| @@ -675,11 +675,6 @@ static int init_phys_pg_pack_from_userptr(struct hl_ctx *ctx, · 674 unmodified lines | ||
| 675 | 675 | |
| 676 | 676 | total_npages += npages; |
| 677 | 677 | |
| 678 | − if (first) { | |
| 679 | − first = false; | |
| 680 | − dma_addr &= PAGE_MASK_2MB; | |
| 681 | − } | |
| 682 | − | |
| 683 | 678 | if ((npages % PGS_IN_2MB_PAGE) || |
| 684 | 679 | (dma_addr & (PAGE_SIZE_2MB - 1))) |
| 685 | 680 | is_huge_page_opt = false; |
| @@ -704,7 +699,6 @@ static int init_phys_pg_pack_from_userptr(struct hl_ctx *ctx, · 18 unmodified lines | ||
| 704 | 699 | phys_pg_pack->total_size = total_npages * page_size; |
| 705 | 700 | |
| 706 | 701 | j = 0; |
| 707 | − first = true; | |
| 708 | 702 | for_each_sg(userptr->sgt->sgl, sg, userptr->sgt->nents, i) { |
| 709 | 703 | npages = get_sg_info(sg, &dma_addr); |
| 710 | 704 | |