Pull dmaengine fixes from Vinod Koul: "A bunch of driver fixes for: - dma mask fix for mmp pdma driver - Xilinx regmap max register, uninitialized addr_width fix - device leak fix for bunch of drivers in the subsystem - stm32 dmamux, TI crossbar driver fixes for device & of node leak and route allocation cleanup - Tegra use afer free fix - Memory leak fix in Qualcomm gpi and omap-dma driver - compatible fix for apple driver" * tag 'dmaengine-fix-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (25 commits) dmaengine: apple-admac: Add "apple,t8103-admac" compatible dmaengine: omap-dma: fix dma_pool resource leak in error paths dmaengine: qcom: gpi: Fix memory leak in gpi_peripheral_config() dmaengine: sh: rz-dmac: Fix rz_dmac_terminate_all() dmaengine: xilinx_dma: Fix uninitialized addr_width when "xlnx,addrwidth" property is missing dmaengine: tegra-adma: Fix use-after-free dmaengine: fsl-edma: Fix clk leak on alloc_chan_resources failure dmaengine: mmp_pdma: Fix race condition in mmp_pdma_residue() dmaengine: ti: k3-udma: fix device leak on udma lookup dmaengine: ti: dma-crossbar: clean up dra7x route allocation error paths dmaengine: ti: dma-crossbar: fix device leak on am335x route allocation dmaengine: ti: dma-crossbar: fix device leak on dra7x route allocation dmaengine: stm32: dmamux: clean up route allocation error labels dmaengine: stm32: dmamux: fix OF node leak on route allocation failure dmaengine: stm32: dmamux: fix device leak on route allocation dmaengine: sh: rz-dmac: fix device leak on probe failure dmaengine: lpc32xx-dmamux: fix device leak on route allocation dmaengine: lpc18xx-dmamux: fix device leak on route allocation dmaengine: idxd: fix device leaks on compat bind and unbind dmaengine: dw: dmamux: fix OF node leak on route allocation failure ...
Unified · Split
| @@ -936,6 +936,7 @@ static void admac_remove(struct platform_device *pdev) · 935 unmodified lines | ||
| 936 | 936 | } |
| 937 | 937 | |
| 938 | 938 | static const struct of_device_id admac_of_match[] = { |
| 939 | + { .compatible = "apple,t8103-admac", }, | |
| 939 | 940 | { .compatible = "apple,admac", }, |
| 940 | 941 | { } |
| 941 | 942 | }; |
| @@ -1765,6 +1765,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan) · 1764 unmodified lines | ||
| 1765 | 1765 | static void atc_free_chan_resources(struct dma_chan *chan) |
| 1766 | 1766 | { |
| 1767 | 1767 | struct at_dma_chan *atchan = to_at_dma_chan(chan); |
| 1768 | + struct at_dma_slave *atslave; | |
| 1768 | 1769 | |
| 1769 | 1770 | BUG_ON(atc_chan_is_enabled(atchan)); |
| 1770 | 1771 | |
| @@ -1774,8 +1775,12 @@ static void atc_free_chan_resources(struct dma_chan *chan) · 3 unmodified lines | ||
| 1774 | 1775 | /* |
| 1775 | 1776 | * Free atslave allocated in at_dma_xlate() |
| 1776 | 1777 | */ |
| 1777 | − kfree(chan->private); | |
| 1778 | − chan->private = NULL; | |
| 1778 | + atslave = chan->private; | |
| 1779 | + if (atslave) { | |
| 1780 | + put_device(atslave->dma_dev); | |
| 1781 | + kfree(atslave); | |
| 1782 | + chan->private = NULL; | |
| 1783 | + } | |
| 1779 | 1784 | |
| 1780 | 1785 | dev_vdbg(chan2dev(chan), "free_chan_resources: done\n"); |
| 1781 | 1786 | } |
| @@ -1699,7 +1699,7 @@ static int sba_probe(struct platform_device *pdev) · 1698 unmodified lines | ||
| 1699 | 1699 | /* Prealloc channel resource */ |
| 1700 | 1700 | ret = sba_prealloc_channel_resources(sba); |
| 1701 | 1701 | if (ret) |
| 1702 | − goto fail_free_mchan; | |
| 1702 | + goto fail_put_mbox; | |
| 1703 | 1703 | |
| 1704 | 1704 | /* Check availability of debugfs */ |
| 1705 | 1705 | if (!debugfs_initialized()) |
| @@ -1729,6 +1729,8 @@ skip_debugfs: · 23 unmodified lines | ||
| 1729 | 1729 | fail_free_resources: |
| 1730 | 1730 | debugfs_remove_recursive(sba->root); |
| 1731 | 1731 | sba_freeup_channel_resources(sba); |
| 1732 | +fail_put_mbox: | |
| 1733 | + put_device(sba->mbox_dev); | |
| 1732 | 1734 | fail_free_mchan: |
| 1733 | 1735 | mbox_free_channel(sba->mchan); |
| 1734 | 1736 | return ret; |
| @@ -1744,6 +1746,8 @@ static void sba_remove(struct platform_device *pdev) · 9 unmodified lines | ||
| 1744 | 1746 | |
| 1745 | 1747 | sba_freeup_channel_resources(sba); |
| 1746 | 1748 | |
| 1749 | + put_device(sba->mbox_dev); | |
| 1750 | + | |
| 1747 | 1751 | mbox_free_channel(sba->mchan); |
| 1748 | 1752 | } |
| 1749 | 1753 | |
| @@ -102,11 +102,11 @@ static void *cv1800_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 101 unmodified lines | ||
| 102 | 102 | struct llist_node *node; |
| 103 | 103 | unsigned long flags; |
| 104 | 104 | unsigned int chid, devid, cpuid; |
| 105 | − int ret; | |
| 105 | + int ret = -EINVAL; | |
| 106 | 106 | |
| 107 | 107 | if (dma_spec->args_count != DMAMUX_NCELLS) { |
| 108 | 108 | dev_err(&pdev->dev, "invalid number of dma mux args\n"); |
| 109 | − return ERR_PTR(-EINVAL); | |
| 109 | + goto err_put_pdev; | |
| 110 | 110 | } |
| 111 | 111 | |
| 112 | 112 | devid = dma_spec->args[0]; |
| @@ -115,18 +115,18 @@ static void *cv1800_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 2 unmodified lines | ||
| 115 | 115 | |
| 116 | 116 | if (devid > MAX_DMA_MAPPING_ID) { |
| 117 | 117 | dev_err(&pdev->dev, "invalid device id: %u\n", devid); |
| 118 | − return ERR_PTR(-EINVAL); | |
| 118 | + goto err_put_pdev; | |
| 119 | 119 | } |
| 120 | 120 | |
| 121 | 121 | if (cpuid > MAX_DMA_CPU_ID) { |
| 122 | 122 | dev_err(&pdev->dev, "invalid cpu id: %u\n", cpuid); |
| 123 | − return ERR_PTR(-EINVAL); | |
| 123 | + goto err_put_pdev; | |
| 124 | 124 | } |
| 125 | 125 | |
| 126 | 126 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); |
| 127 | 127 | if (!dma_spec->np) { |
| 128 | 128 | dev_err(&pdev->dev, "can't get dma master\n"); |
| 129 | − return ERR_PTR(-EINVAL); | |
| 129 | + goto err_put_pdev; | |
| 130 | 130 | } |
| 131 | 131 | |
| 132 | 132 | spin_lock_irqsave(&dmamux->lock, flags); |
| @@ -136,8 +136,6 @@ static void *cv1800_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 3 unmodified lines | ||
| 136 | 136 | if (map->peripheral == devid && map->cpu == cpuid) |
| 137 | 137 | goto found; |
| 138 | 138 | } |
| 139 | − | |
| 140 | − ret = -EINVAL; | |
| 141 | 139 | goto failed; |
| 142 | 140 | } else { |
| 143 | 141 | node = llist_del_first(&dmamux->free_maps); |
| @@ -171,12 +169,17 @@ found: · 27 unmodified lines | ||
| 171 | 169 | dev_dbg(&pdev->dev, "register channel %u for req %u (cpu %u)\n", |
| 172 | 170 | chid, devid, cpuid); |
| 173 | 171 | |
| 172 | + put_device(&pdev->dev); | |
| 173 | + | |
| 174 | 174 | return map; |
| 175 | 175 | |
| 176 | 176 | failed: |
| 177 | 177 | spin_unlock_irqrestore(&dmamux->lock, flags); |
| 178 | 178 | of_node_put(dma_spec->np); |
| 179 | 179 | dev_err(&pdev->dev, "errno %d\n", ret); |
| 180 | +err_put_pdev: | |
| 181 | + put_device(&pdev->dev); | |
| 182 | + | |
| 180 | 183 | return ERR_PTR(ret); |
| 181 | 184 | } |
| 182 | 185 | |
| @@ -90,7 +90,7 @@ static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 89 unmodified lines | ||
| 90 | 90 | |
| 91 | 91 | if (test_and_set_bit(map->req_idx, dmamux->used_chans)) { |
| 92 | 92 | ret = -EBUSY; |
| 93 | − goto free_map; | |
| 93 | + goto put_dma_spec_np; | |
| 94 | 94 | } |
| 95 | 95 | |
| 96 | 96 | mask = BIT(map->req_idx); |
| @@ -103,6 +103,8 @@ static void *rzn1_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 6 unmodified lines | ||
| 103 | 103 | |
| 104 | 104 | clear_bitmap: |
| 105 | 105 | clear_bit(map->req_idx, dmamux->used_chans); |
| 106 | +put_dma_spec_np: | |
| 107 | + of_node_put(dma_spec->np); | |
| 106 | 108 | free_map: |
| 107 | 109 | kfree(map); |
| 108 | 110 | put_device: |
| @@ -873,6 +873,7 @@ err_errirq: · 872 unmodified lines | ||
| 873 | 873 | free_irq(fsl_chan->txirq, fsl_chan); |
| 874 | 874 | err_txirq: |
| 875 | 875 | dma_pool_destroy(fsl_chan->tcd_pool); |
| 876 | + clk_disable_unprepare(fsl_chan->clk); | |
| 876 | 877 | |
| 877 | 878 | return ret; |
| 878 | 879 | } |
| @@ -20,11 +20,16 @@ static ssize_t unbind_store(struct device_driver *drv, const char *buf, size_t c · 19 unmodified lines | ||
| 20 | 20 | int rc = -ENODEV; |
| 21 | 21 | |
| 22 | 22 | dev = bus_find_device_by_name(bus, NULL, buf); |
| 23 | − if (dev && dev->driver) { | |
| 23 | + if (!dev) | |
| 24 | + return -ENODEV; | |
| 25 | + | |
| 26 | + if (dev->driver) { | |
| 24 | 27 | device_driver_detach(dev); |
| 25 | 28 | rc = count; |
| 26 | 29 | } |
| 27 | 30 | |
| 31 | + put_device(dev); | |
| 32 | + | |
| 28 | 33 | return rc; |
| 29 | 34 | } |
| 30 | 35 | static DRIVER_ATTR_IGNORE_LOCKDEP(unbind, 0200, NULL, unbind_store); |
| @@ -38,9 +43,12 @@ static ssize_t bind_store(struct device_driver *drv, const char *buf, size_t cou · 7 unmodified lines | ||
| 38 | 43 | struct idxd_dev *idxd_dev; |
| 39 | 44 | |
| 40 | 45 | dev = bus_find_device_by_name(bus, NULL, buf); |
| 41 | − if (!dev || dev->driver || drv != &dsa_drv.drv) | |
| 46 | + if (!dev) | |
| 42 | 47 | return -ENODEV; |
| 43 | 48 | |
| 49 | + if (dev->driver || drv != &dsa_drv.drv) | |
| 50 | + goto err_put_dev; | |
| 51 | + | |
| 44 | 52 | idxd_dev = confdev_to_idxd_dev(dev); |
| 45 | 53 | if (is_idxd_dev(idxd_dev)) { |
| 46 | 54 | alt_drv = driver_find("idxd", bus); |
| @@ -53,13 +61,20 @@ static ssize_t bind_store(struct device_driver *drv, const char *buf, size_t cou · 6 unmodified lines | ||
| 53 | 61 | alt_drv = driver_find("user", bus); |
| 54 | 62 | } |
| 55 | 63 | if (!alt_drv) |
| 56 | − return -ENODEV; | |
| 64 | + goto err_put_dev; | |
| 57 | 65 | |
| 58 | 66 | rc = device_driver_attach(alt_drv, dev); |
| 59 | 67 | if (rc < 0) |
| 60 | − return rc; | |
| 68 | + goto err_put_dev; | |
| 69 | + | |
| 70 | + put_device(dev); | |
| 61 | 71 | |
| 62 | 72 | return count; |
| 73 | + | |
| 74 | +err_put_dev: | |
| 75 | + put_device(dev); | |
| 76 | + | |
| 77 | + return rc; | |
| 63 | 78 | } |
| 64 | 79 | static DRIVER_ATTR_IGNORE_LOCKDEP(bind, 0200, NULL, bind_store); |
| 65 | 80 | |
| @@ -57,30 +57,31 @@ static void *lpc18xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 56 unmodified lines | ||
| 57 | 57 | struct lpc18xx_dmamux_data *dmamux = platform_get_drvdata(pdev); |
| 58 | 58 | unsigned long flags; |
| 59 | 59 | unsigned mux; |
| 60 | + int ret = -EINVAL; | |
| 60 | 61 | |
| 61 | 62 | if (dma_spec->args_count != 3) { |
| 62 | 63 | dev_err(&pdev->dev, "invalid number of dma mux args\n"); |
| 63 | − return ERR_PTR(-EINVAL); | |
| 64 | + goto err_put_pdev; | |
| 64 | 65 | } |
| 65 | 66 | |
| 66 | 67 | mux = dma_spec->args[0]; |
| 67 | 68 | if (mux >= dmamux->dma_master_requests) { |
| 68 | 69 | dev_err(&pdev->dev, "invalid mux number: %d\n", |
| 69 | 70 | dma_spec->args[0]); |
| 70 | − return ERR_PTR(-EINVAL); | |
| 71 | + goto err_put_pdev; | |
| 71 | 72 | } |
| 72 | 73 | |
| 73 | 74 | if (dma_spec->args[1] > LPC18XX_DMAMUX_MAX_VAL) { |
| 74 | 75 | dev_err(&pdev->dev, "invalid dma mux value: %d\n", |
| 75 | 76 | dma_spec->args[1]); |
| 76 | − return ERR_PTR(-EINVAL); | |
| 77 | + goto err_put_pdev; | |
| 77 | 78 | } |
| 78 | 79 | |
| 79 | 80 | /* The of_node_put() will be done in the core for the node */ |
| 80 | 81 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); |
| 81 | 82 | if (!dma_spec->np) { |
| 82 | 83 | dev_err(&pdev->dev, "can't get dma master\n"); |
| 83 | − return ERR_PTR(-EINVAL); | |
| 84 | + goto err_put_pdev; | |
| 84 | 85 | } |
| 85 | 86 | |
| 86 | 87 | spin_lock_irqsave(&dmamux->lock, flags); |
| @@ -89,7 +90,8 @@ static void *lpc18xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 2 unmodified lines | ||
| 89 | 90 | dev_err(&pdev->dev, "dma request %u busy with %u.%u\n", |
| 90 | 91 | mux, mux, dmamux->muxes[mux].value); |
| 91 | 92 | of_node_put(dma_spec->np); |
| 92 | − return ERR_PTR(-EBUSY); | |
| 93 | + ret = -EBUSY; | |
| 94 | + goto err_put_pdev; | |
| 93 | 95 | } |
| 94 | 96 | |
| 95 | 97 | dmamux->muxes[mux].busy = true; |
| @@ -106,7 +108,14 @@ static void *lpc18xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 10 unmodified lines | ||
| 106 | 108 | dev_dbg(&pdev->dev, "mapping dmamux %u.%u to dma request %u\n", mux, |
| 107 | 109 | dmamux->muxes[mux].value, mux); |
| 108 | 110 | |
| 111 | + put_device(&pdev->dev); | |
| 112 | + | |
| 109 | 113 | return &dmamux->muxes[mux]; |
| 114 | + | |
| 115 | +err_put_pdev: | |
| 116 | + put_device(&pdev->dev); | |
| 117 | + | |
| 118 | + return ERR_PTR(ret); | |
| 110 | 119 | } |
| 111 | 120 | |
| 112 | 121 | static int lpc18xx_dmamux_probe(struct platform_device *pdev) |
| @@ -95,11 +95,12 @@ static void *lpc32xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 94 unmodified lines | ||
| 95 | 95 | struct lpc32xx_dmamux_data *dmamux = platform_get_drvdata(pdev); |
| 96 | 96 | unsigned long flags; |
| 97 | 97 | struct lpc32xx_dmamux *mux = NULL; |
| 98 | + int ret = -EINVAL; | |
| 98 | 99 | int i; |
| 99 | 100 | |
| 100 | 101 | if (dma_spec->args_count != 3) { |
| 101 | 102 | dev_err(&pdev->dev, "invalid number of dma mux args\n"); |
| 102 | − return ERR_PTR(-EINVAL); | |
| 103 | + goto err_put_pdev; | |
| 103 | 104 | } |
| 104 | 105 | |
| 105 | 106 | for (i = 0; i < ARRAY_SIZE(lpc32xx_muxes); i++) { |
| @@ -111,20 +112,20 @@ static void *lpc32xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 5 unmodified lines | ||
| 111 | 112 | if (!mux) { |
| 112 | 113 | dev_err(&pdev->dev, "invalid mux request number: %d\n", |
| 113 | 114 | dma_spec->args[0]); |
| 114 | − return ERR_PTR(-EINVAL); | |
| 115 | + goto err_put_pdev; | |
| 115 | 116 | } |
| 116 | 117 | |
| 117 | 118 | if (dma_spec->args[2] > 1) { |
| 118 | 119 | dev_err(&pdev->dev, "invalid dma mux value: %d\n", |
| 119 | 120 | dma_spec->args[1]); |
| 120 | − return ERR_PTR(-EINVAL); | |
| 121 | + goto err_put_pdev; | |
| 121 | 122 | } |
| 122 | 123 | |
| 123 | 124 | /* The of_node_put() will be done in the core for the node */ |
| 124 | 125 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); |
| 125 | 126 | if (!dma_spec->np) { |
| 126 | 127 | dev_err(&pdev->dev, "can't get dma master\n"); |
| 127 | − return ERR_PTR(-EINVAL); | |
| 128 | + goto err_put_pdev; | |
| 128 | 129 | } |
| 129 | 130 | |
| 130 | 131 | spin_lock_irqsave(&dmamux->lock, flags); |
| @@ -133,7 +134,8 @@ static void *lpc32xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 2 unmodified lines | ||
| 133 | 134 | dev_err(dev, "dma request signal %d busy, routed to %s\n", |
| 134 | 135 | mux->signal, mux->muxval ? mux->name_sel1 : mux->name_sel1); |
| 135 | 136 | of_node_put(dma_spec->np); |
| 136 | − return ERR_PTR(-EBUSY); | |
| 137 | + ret = -EBUSY; | |
| 138 | + goto err_put_pdev; | |
| 137 | 139 | } |
| 138 | 140 | |
| 139 | 141 | mux->busy = true; |
| @@ -148,7 +150,14 @@ static void *lpc32xx_dmamux_reserve(struct of_phandle_args *dma_spec, · 8 unmodified lines | ||
| 148 | 150 | dev_dbg(dev, "dma request signal %d routed to %s\n", |
| 149 | 151 | mux->signal, mux->muxval ? mux->name_sel1 : mux->name_sel1); |
| 150 | 152 | |
| 153 | + put_device(&pdev->dev); | |
| 154 | + | |
| 151 | 155 | return mux; |
| 156 | + | |
| 157 | +err_put_pdev: | |
| 158 | + put_device(&pdev->dev); | |
| 159 | + | |
| 160 | + return ERR_PTR(ret); | |
| 152 | 161 | } |
| 153 | 162 | |
| 154 | 163 | static int lpc32xx_dmamux_probe(struct platform_device *pdev) |
| @@ -152,8 +152,8 @@ struct mmp_pdma_phy { · 151 unmodified lines | ||
| 152 | 152 | * |
| 153 | 153 | * Controller Configuration: |
| 154 | 154 | * @run_bits: Control bits in DCSR register for channel start/stop |
| 155 | − * @dma_mask: DMA addressing capability of controller. 0 to use OF/platform | |
| 156 | − * settings, or explicit mask like DMA_BIT_MASK(32/64) | |
| 155 | + * @dma_width: DMA addressing width in bits (32 or 64). Determines the | |
| 156 | + * DMA mask capability of the controller hardware. | |
| 157 | 157 | */ |
| 158 | 158 | struct mmp_pdma_ops { |
| 159 | 159 | /* Hardware Register Operations */ |
| @@ -173,7 +173,7 @@ struct mmp_pdma_ops { · 13 unmodified lines | ||
| 173 | 173 | |
| 174 | 174 | /* Controller Configuration */ |
| 175 | 175 | u32 run_bits; |
| 176 | − u64 dma_mask; | |
| 176 | + u32 dma_width; | |
| 177 | 177 | }; |
| 178 | 178 | |
| 179 | 179 | struct mmp_pdma_device { |
| @@ -928,6 +928,7 @@ static unsigned int mmp_pdma_residue(struct mmp_pdma_chan *chan, · 748 unmodified lines | ||
| 928 | 928 | { |
| 929 | 929 | struct mmp_pdma_desc_sw *sw; |
| 930 | 930 | struct mmp_pdma_device *pdev = to_mmp_pdma_dev(chan->chan.device); |
| 931 | + unsigned long flags; | |
| 931 | 932 | u64 curr; |
| 932 | 933 | u32 residue = 0; |
| 933 | 934 | bool passed = false; |
| @@ -945,6 +946,8 @@ static unsigned int mmp_pdma_residue(struct mmp_pdma_chan *chan, · 11 unmodified lines | ||
| 945 | 946 | else |
| 946 | 947 | curr = pdev->ops->read_src_addr(chan->phy); |
| 947 | 948 | |
| 949 | + spin_lock_irqsave(&chan->desc_lock, flags); | |
| 950 | + | |
| 948 | 951 | list_for_each_entry(sw, &chan->chain_running, node) { |
| 949 | 952 | u64 start, end; |
| 950 | 953 | u32 len; |
| @@ -989,6 +992,7 @@ static unsigned int mmp_pdma_residue(struct mmp_pdma_chan *chan, · 38 unmodified lines | ||
| 989 | 992 | continue; |
| 990 | 993 | |
| 991 | 994 | if (sw->async_tx.cookie == cookie) { |
| 995 | + spin_unlock_irqrestore(&chan->desc_lock, flags); | |
| 992 | 996 | return residue; |
| 993 | 997 | } else { |
| 994 | 998 | residue = 0; |
| @@ -996,6 +1000,8 @@ static unsigned int mmp_pdma_residue(struct mmp_pdma_chan *chan, · 1 unmodified line | ||
| 996 | 1000 | } |
| 997 | 1001 | } |
| 998 | 1002 | |
| 1003 | + spin_unlock_irqrestore(&chan->desc_lock, flags); | |
| 1004 | + | |
| 999 | 1005 | /* We should only get here in case of cyclic transactions */ |
| 1000 | 1006 | return residue; |
| 1001 | 1007 | } |
| @@ -1172,7 +1178,7 @@ static const struct mmp_pdma_ops marvell_pdma_v1_ops = { · 170 unmodified lines | ||
| 1172 | 1178 | .get_desc_src_addr = get_desc_src_addr_32, |
| 1173 | 1179 | .get_desc_dst_addr = get_desc_dst_addr_32, |
| 1174 | 1180 | .run_bits = (DCSR_RUN), |
| 1175 | − .dma_mask = 0, /* let OF/platform set DMA mask */ | |
| 1181 | + .dma_width = 32, | |
| 1176 | 1182 | }; |
| 1177 | 1183 | |
| 1178 | 1184 | static const struct mmp_pdma_ops spacemit_k1_pdma_ops = { |
| @@ -1185,7 +1191,7 @@ static const struct mmp_pdma_ops spacemit_k1_pdma_ops = { · 6 unmodified lines | ||
| 1185 | 1191 | .get_desc_src_addr = get_desc_src_addr_64, |
| 1186 | 1192 | .get_desc_dst_addr = get_desc_dst_addr_64, |
| 1187 | 1193 | .run_bits = (DCSR_RUN | DCSR_LPAEEN), |
| 1188 | − .dma_mask = DMA_BIT_MASK(64), /* force 64-bit DMA addr capability */ | |
| 1194 | + .dma_width = 64, | |
| 1189 | 1195 | }; |
| 1190 | 1196 | |
| 1191 | 1197 | static const struct of_device_id mmp_pdma_dt_ids[] = { |
| @@ -1314,13 +1320,9 @@ static int mmp_pdma_probe(struct platform_device *op) · 122 unmodified lines | ||
| 1314 | 1320 | pdev->device.directions = BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM); |
| 1315 | 1321 | pdev->device.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR; |
| 1316 | 1322 | |
| 1317 | − /* Set DMA mask based on ops->dma_mask, or OF/platform */ | |
| 1318 | − if (pdev->ops->dma_mask) | |
| 1319 | − dma_set_mask(pdev->dev, pdev->ops->dma_mask); | |
| 1320 | − else if (pdev->dev->coherent_dma_mask) | |
| 1321 | − dma_set_mask(pdev->dev, pdev->dev->coherent_dma_mask); | |
| 1322 | − else | |
| 1323 | − dma_set_mask(pdev->dev, DMA_BIT_MASK(64)); | |
| 1323 | + /* Set DMA mask based on controller hardware capabilities */ | |
| 1324 | + dma_set_mask_and_coherent(pdev->dev, | |
| 1325 | + DMA_BIT_MASK(pdev->ops->dma_width)); | |
| 1324 | 1326 | |
| 1325 | 1327 | ret = dma_async_device_register(&pdev->device); |
| 1326 | 1328 | if (ret) { |
| @@ -1605,14 +1605,16 @@ static int · 1604 unmodified lines | ||
| 1605 | 1605 | gpi_peripheral_config(struct dma_chan *chan, struct dma_slave_config *config) |
| 1606 | 1606 | { |
| 1607 | 1607 | struct gchan *gchan = to_gchan(chan); |
| 1608 | + void *new_config; | |
| 1608 | 1609 | |
| 1609 | 1610 | if (!config->peripheral_config) |
| 1610 | 1611 | return -EINVAL; |
| 1611 | 1612 | |
| 1612 | − gchan->config = krealloc(gchan->config, config->peripheral_size, GFP_NOWAIT); | |
| 1613 | − if (!gchan->config) | |
| 1613 | + new_config = krealloc(gchan->config, config->peripheral_size, GFP_NOWAIT); | |
| 1614 | + if (!new_config) | |
| 1614 | 1615 | return -ENOMEM; |
| 1615 | 1616 | |
| 1617 | + gchan->config = new_config; | |
| 1616 | 1618 | memcpy(gchan->config, config->peripheral_config, config->peripheral_size); |
| 1617 | 1619 | |
| 1618 | 1620 | return 0; |
| @@ -557,11 +557,16 @@ rz_dmac_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl, · 556 unmodified lines | ||
| 557 | 557 | static int rz_dmac_terminate_all(struct dma_chan *chan) |
| 558 | 558 | { |
| 559 | 559 | struct rz_dmac_chan *channel = to_rz_dmac_chan(chan); |
| 560 | + struct rz_lmdesc *lmdesc = channel->lmdesc.base; | |
| 560 | 561 | unsigned long flags; |
| 562 | + unsigned int i; | |
| 561 | 563 | LIST_HEAD(head); |
| 562 | 564 | |
| 563 | 565 | rz_dmac_disable_hw(channel); |
| 564 | 566 | spin_lock_irqsave(&channel->vc.lock, flags); |
| 567 | + for (i = 0; i < DMAC_NR_LMDESC; i++) | |
| 568 | + lmdesc[i].header = 0; | |
| 569 | + | |
| 565 | 570 | list_splice_tail_init(&channel->ld_active, &channel->ld_free); |
| 566 | 571 | list_splice_tail_init(&channel->ld_queue, &channel->ld_free); |
| 567 | 572 | vchan_get_all_descriptors(&channel->vc, &head); |
| @@ -854,6 +859,13 @@ static int rz_dmac_chan_probe(struct rz_dmac *dmac, · 286 unmodified lines | ||
| 854 | 859 | return 0; |
| 855 | 860 | } |
| 856 | 861 | |
| 862 | +static void rz_dmac_put_device(void *_dev) | |
| 863 | +{ | |
| 864 | + struct device *dev = _dev; | |
| 865 | + | |
| 866 | + put_device(dev); | |
| 867 | +} | |
| 868 | + | |
| 857 | 869 | static int rz_dmac_parse_of_icu(struct device *dev, struct rz_dmac *dmac) |
| 858 | 870 | { |
| 859 | 871 | struct device_node *np = dev->of_node; |
| @@ -876,6 +888,10 @@ static int rz_dmac_parse_of_icu(struct device *dev, struct rz_dmac *dmac) · 16 unmodified lines | ||
| 876 | 888 | return -ENODEV; |
| 877 | 889 | } |
| 878 | 890 | |
| 891 | + ret = devm_add_action_or_reset(dev, rz_dmac_put_device, &dmac->icu.pdev->dev); | |
| 892 | + if (ret) | |
| 893 | + return ret; | |
| 894 | + | |
| 879 | 895 | dmac_index = args.args[0]; |
| 880 | 896 | if (dmac_index > RZV2H_MAX_DMAC_INDEX) { |
| 881 | 897 | dev_err(dev, "DMAC index %u invalid.\n", dmac_index); |
| @@ -1055,8 +1071,6 @@ static void rz_dmac_remove(struct platform_device *pdev) · 173 unmodified lines | ||
| 1055 | 1071 | reset_control_assert(dmac->rstc); |
| 1056 | 1072 | pm_runtime_put(&pdev->dev); |
| 1057 | 1073 | pm_runtime_disable(&pdev->dev); |
| 1058 | − | |
| 1059 | − platform_device_put(dmac->icu.pdev); | |
| 1060 | 1074 | } |
| 1061 | 1075 | |
| 1062 | 1076 | static const struct of_device_id of_rz_dmac_match[] = { |
| @@ -90,23 +90,25 @@ static void *stm32_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 89 unmodified lines | ||
| 90 | 90 | struct stm32_dmamux_data *dmamux = platform_get_drvdata(pdev); |
| 91 | 91 | struct stm32_dmamux *mux; |
| 92 | 92 | u32 i, min, max; |
| 93 | − int ret; | |
| 93 | + int ret = -EINVAL; | |
| 94 | 94 | unsigned long flags; |
| 95 | 95 | |
| 96 | 96 | if (dma_spec->args_count != 3) { |
| 97 | 97 | dev_err(&pdev->dev, "invalid number of dma mux args\n"); |
| 98 | − return ERR_PTR(-EINVAL); | |
| 98 | + goto err_put_pdev; | |
| 99 | 99 | } |
| 100 | 100 | |
| 101 | 101 | if (dma_spec->args[0] > dmamux->dmamux_requests) { |
| 102 | 102 | dev_err(&pdev->dev, "invalid mux request number: %d\n", |
| 103 | 103 | dma_spec->args[0]); |
| 104 | − return ERR_PTR(-EINVAL); | |
| 104 | + goto err_put_pdev; | |
| 105 | 105 | } |
| 106 | 106 | |
| 107 | 107 | mux = kzalloc(sizeof(*mux), GFP_KERNEL); |
| 108 | − if (!mux) | |
| 109 | − return ERR_PTR(-ENOMEM); | |
| 108 | + if (!mux) { | |
| 109 | + ret = -ENOMEM; | |
| 110 | + goto err_put_pdev; | |
| 111 | + } | |
| 110 | 112 | |
| 111 | 113 | spin_lock_irqsave(&dmamux->lock, flags); |
| 112 | 114 | mux->chan_id = find_first_zero_bit(dmamux->dma_inuse, |
| @@ -116,7 +118,7 @@ static void *stm32_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 3 unmodified lines | ||
| 116 | 118 | spin_unlock_irqrestore(&dmamux->lock, flags); |
| 117 | 119 | dev_err(&pdev->dev, "Run out of free DMA requests\n"); |
| 118 | 120 | ret = -ENOMEM; |
| 119 | − goto error_chan_id; | |
| 121 | + goto err_free_mux; | |
| 120 | 122 | } |
| 121 | 123 | set_bit(mux->chan_id, dmamux->dma_inuse); |
| 122 | 124 | spin_unlock_irqrestore(&dmamux->lock, flags); |
| @@ -133,8 +135,7 @@ static void *stm32_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 10 unmodified lines | ||
| 133 | 135 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", i - 1); |
| 134 | 136 | if (!dma_spec->np) { |
| 135 | 137 | dev_err(&pdev->dev, "can't get dma master\n"); |
| 136 | − ret = -EINVAL; | |
| 137 | − goto error; | |
| 138 | + goto err_clear_inuse; | |
| 138 | 139 | } |
| 139 | 140 | |
| 140 | 141 | /* Set dma request */ |
| @@ -142,7 +143,7 @@ static void *stm32_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 1 unmodified line | ||
| 142 | 143 | ret = pm_runtime_resume_and_get(&pdev->dev); |
| 143 | 144 | if (ret < 0) { |
| 144 | 145 | spin_unlock_irqrestore(&dmamux->lock, flags); |
| 145 | − goto error; | |
| 146 | + goto err_put_dma_spec_np; | |
| 146 | 147 | } |
| 147 | 148 | spin_unlock_irqrestore(&dmamux->lock, flags); |
| 148 | 149 | |
| @@ -160,13 +161,19 @@ static void *stm32_dmamux_route_allocate(struct of_phandle_args *dma_spec, · 11 unmodified lines | ||
| 160 | 161 | dev_dbg(&pdev->dev, "Mapping DMAMUX(%u) to DMA%u(%u)\n", |
| 161 | 162 | mux->request, mux->master, mux->chan_id); |
| 162 | 163 | |
| 164 | + put_device(&pdev->dev); | |
| 165 | + | |
| 163 | 166 | return mux; |
| 164 | 167 | |
| 165 | −error: | |
| 168 | +err_put_dma_spec_np: | |
| 169 | + of_node_put(dma_spec->np); | |
| 170 | +err_clear_inuse: | |
| 166 | 171 | clear_bit(mux->chan_id, dmamux->dma_inuse); |
| 167 | − | |
| 168 | −error_chan_id: | |
| 172 | +err_free_mux: | |
| 169 | 173 | kfree(mux); |
| 174 | +err_put_pdev: | |
| 175 | + put_device(&pdev->dev); | |
| 176 | + | |
| 170 | 177 | return ERR_PTR(ret); |
| 171 | 178 | } |
| 172 | 179 | |
| @@ -429,10 +429,17 @@ static void tegra_adma_stop(struct tegra_adma_chan *tdc) · 428 unmodified lines | ||
| 429 | 429 | return; |
| 430 | 430 | } |
| 431 | 431 | |
| 432 | − kfree(tdc->desc); | |
| 432 | + vchan_terminate_vdesc(&tdc->desc->vd); | |
| 433 | 433 | tdc->desc = NULL; |
| 434 | 434 | } |
| 435 | 435 | |
| 436 | +static void tegra_adma_synchronize(struct dma_chan *dc) | |
| 437 | +{ | |
| 438 | + struct tegra_adma_chan *tdc = to_tegra_adma_chan(dc); | |
| 439 | + | |
| 440 | + vchan_synchronize(&tdc->vc); | |
| 441 | +} | |
| 442 | + | |
| 436 | 443 | static void tegra_adma_start(struct tegra_adma_chan *tdc) |
| 437 | 444 | { |
| 438 | 445 | struct virt_dma_desc *vd = vchan_next_desc(&tdc->vc); |
| @@ -1155,6 +1162,7 @@ static int tegra_adma_probe(struct platform_device *pdev) · 716 unmodified lines | ||
| 1155 | 1162 | tdma->dma_dev.device_config = tegra_adma_slave_config; |
| 1156 | 1163 | tdma->dma_dev.device_tx_status = tegra_adma_tx_status; |
| 1157 | 1164 | tdma->dma_dev.device_terminate_all = tegra_adma_terminate_all; |
| 1165 | + tdma->dma_dev.device_synchronize = tegra_adma_synchronize; | |
| 1158 | 1166 | tdma->dma_dev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); |
| 1159 | 1167 | tdma->dma_dev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); |
| 1160 | 1168 | tdma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); |
| @@ -79,34 +79,35 @@ static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec, · 78 unmodified lines | ||
| 79 | 79 | { |
| 80 | 80 | struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); |
| 81 | 81 | struct ti_am335x_xbar_data *xbar = platform_get_drvdata(pdev); |
| 82 | − struct ti_am335x_xbar_map *map; | |
| 82 | + struct ti_am335x_xbar_map *map = ERR_PTR(-EINVAL); | |
| 83 | 83 | |
| 84 | 84 | if (dma_spec->args_count != 3) |
| 85 | − return ERR_PTR(-EINVAL); | |
| 85 | + goto out_put_pdev; | |
| 86 | 86 | |
| 87 | 87 | if (dma_spec->args[2] >= xbar->xbar_events) { |
| 88 | 88 | dev_err(&pdev->dev, "Invalid XBAR event number: %d\n", |
| 89 | 89 | dma_spec->args[2]); |
| 90 | − return ERR_PTR(-EINVAL); | |
| 90 | + goto out_put_pdev; | |
| 91 | 91 | } |
| 92 | 92 | |
| 93 | 93 | if (dma_spec->args[0] >= xbar->dma_requests) { |
| 94 | 94 | dev_err(&pdev->dev, "Invalid DMA request line number: %d\n", |
| 95 | 95 | dma_spec->args[0]); |
| 96 | − return ERR_PTR(-EINVAL); | |
| 96 | + goto out_put_pdev; | |
| 97 | 97 | } |
| 98 | 98 | |
| 99 | 99 | /* The of_node_put() will be done in the core for the node */ |
| 100 | 100 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); |
| 101 | 101 | if (!dma_spec->np) { |
| 102 | 102 | dev_err(&pdev->dev, "Can't get DMA master\n"); |
| 103 | − return ERR_PTR(-EINVAL); | |
| 103 | + goto out_put_pdev; | |
| 104 | 104 | } |
| 105 | 105 | |
| 106 | 106 | map = kzalloc(sizeof(*map), GFP_KERNEL); |
| 107 | 107 | if (!map) { |
| 108 | 108 | of_node_put(dma_spec->np); |
| 109 | − return ERR_PTR(-ENOMEM); | |
| 109 | + map = ERR_PTR(-ENOMEM); | |
| 110 | + goto out_put_pdev; | |
| 110 | 111 | } |
| 111 | 112 | |
| 112 | 113 | map->dma_line = (u16)dma_spec->args[0]; |
| @@ -120,6 +121,9 @@ static void *ti_am335x_xbar_route_allocate(struct of_phandle_args *dma_spec, · 7 unmodified lines | ||
| 120 | 121 | |
| 121 | 122 | ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val); |
| 122 | 123 | |
| 124 | +out_put_pdev: | |
| 125 | + put_device(&pdev->dev); | |
| 126 | + | |
| 123 | 127 | return map; |
| 124 | 128 | } |
| 125 | 129 | |
| @@ -241,28 +245,26 @@ static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec, · 115 unmodified lines | ||
| 241 | 245 | { |
| 242 | 246 | struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); |
| 243 | 247 | struct ti_dra7_xbar_data *xbar = platform_get_drvdata(pdev); |
| 244 | − struct ti_dra7_xbar_map *map; | |
| 248 | + struct ti_dra7_xbar_map *map = ERR_PTR(-EINVAL); | |
| 245 | 249 | |
| 246 | 250 | if (dma_spec->args[0] >= xbar->xbar_requests) { |
| 247 | 251 | dev_err(&pdev->dev, "Invalid XBAR request number: %d\n", |
| 248 | 252 | dma_spec->args[0]); |
| 249 | − put_device(&pdev->dev); | |
| 250 | − return ERR_PTR(-EINVAL); | |
| 253 | + goto out_put_pdev; | |
| 251 | 254 | } |
| 252 | 255 | |
| 253 | 256 | /* The of_node_put() will be done in the core for the node */ |
| 254 | 257 | dma_spec->np = of_parse_phandle(ofdma->of_node, "dma-masters", 0); |
| 255 | 258 | if (!dma_spec->np) { |
| 256 | 259 | dev_err(&pdev->dev, "Can't get DMA master\n"); |
| 257 | − put_device(&pdev->dev); | |
| 258 | − return ERR_PTR(-EINVAL); | |
| 260 | + goto out_put_pdev; | |
| 259 | 261 | } |
| 260 | 262 | |
| 261 | 263 | map = kzalloc(sizeof(*map), GFP_KERNEL); |
| 262 | 264 | if (!map) { |
| 263 | 265 | of_node_put(dma_spec->np); |
| 264 | − put_device(&pdev->dev); | |
| 265 | − return ERR_PTR(-ENOMEM); | |
| 266 | + map = ERR_PTR(-ENOMEM); | |
| 267 | + goto out_put_pdev; | |
| 266 | 268 | } |
| 267 | 269 | |
| 268 | 270 | mutex_lock(&xbar->mutex); |
| @@ -273,8 +275,8 @@ static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec, · 4 unmodified lines | ||
| 273 | 275 | dev_err(&pdev->dev, "Run out of free DMA requests\n"); |
| 274 | 276 | kfree(map); |
| 275 | 277 | of_node_put(dma_spec->np); |
| 276 | − put_device(&pdev->dev); | |
| 277 | − return ERR_PTR(-ENOMEM); | |
| 278 | + map = ERR_PTR(-ENOMEM); | |
| 279 | + goto out_put_pdev; | |
| 278 | 280 | } |
| 279 | 281 | set_bit(map->xbar_out, xbar->dma_inuse); |
| 280 | 282 | mutex_unlock(&xbar->mutex); |
| @@ -288,6 +290,9 @@ static void *ti_dra7_xbar_route_allocate(struct of_phandle_args *dma_spec, · 7 unmodified lines | ||
| 288 | 290 | |
| 289 | 291 | ti_dra7_xbar_write(xbar->iomem, map->xbar_out, map->xbar_in); |
| 290 | 292 | |
| 293 | +out_put_pdev: | |
| 294 | + put_device(&pdev->dev); | |
| 295 | + | |
| 291 | 296 | return map; |
| 292 | 297 | } |
| 293 | 298 | |
| @@ -42,9 +42,9 @@ struct udma_dev *of_xudma_dev_get(struct device_node *np, const char *property) · 41 unmodified lines | ||
| 42 | 42 | } |
| 43 | 43 | |
| 44 | 44 | ud = platform_get_drvdata(pdev); |
| 45 | + put_device(&pdev->dev); | |
| 45 | 46 | if (!ud) { |
| 46 | 47 | pr_debug("UDMA has not been probed\n"); |
| 47 | − put_device(&pdev->dev); | |
| 48 | 48 | return ERR_PTR(-EPROBE_DEFER); |
| 49 | 49 | } |
| 50 | 50 | |
| @@ -1808,6 +1808,8 @@ static int omap_dma_probe(struct platform_device *pdev) · 1807 unmodified lines | ||
| 1808 | 1808 | if (rc) { |
| 1809 | 1809 | pr_warn("OMAP-DMA: failed to register slave DMA engine device: %d\n", |
| 1810 | 1810 | rc); |
| 1811 | + if (od->ll123_supported) | |
| 1812 | + dma_pool_destroy(od->desc_pool); | |
| 1811 | 1813 | omap_dma_free(od); |
| 1812 | 1814 | return rc; |
| 1813 | 1815 | } |
| @@ -1823,6 +1825,8 @@ static int omap_dma_probe(struct platform_device *pdev) · 9 unmodified lines | ||
| 1823 | 1825 | if (rc) { |
| 1824 | 1826 | pr_warn("OMAP-DMA: failed to register DMA controller\n"); |
| 1825 | 1827 | dma_async_device_unregister(&od->ddev); |
| 1828 | + if (od->ll123_supported) | |
| 1829 | + dma_pool_destroy(od->desc_pool); | |
| 1826 | 1830 | omap_dma_free(od); |
| 1827 | 1831 | } |
| 1828 | 1832 | } |
| @@ -9,6 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | /* The length of register space exposed to host */ |
| 11 | 11 | #define XDMA_REG_SPACE_LEN 65536 |
| 12 | +#define XDMA_MAX_REG_OFFSET (XDMA_REG_SPACE_LEN - 4) | |
| 12 | 13 | |
| 13 | 14 | /* |
| 14 | 15 | * maximum number of DMA channels for each direction: |
| @@ -38,7 +38,7 @@ static const struct regmap_config xdma_regmap_config = { · 37 unmodified lines | ||
| 38 | 38 | .reg_bits = 32, |
| 39 | 39 | .val_bits = 32, |
| 40 | 40 | .reg_stride = 4, |
| 41 | − .max_register = XDMA_REG_SPACE_LEN, | |
| 41 | + .max_register = XDMA_MAX_REG_OFFSET, | |
| 42 | 42 | }; |
| 43 | 43 | |
| 44 | 44 | /** |
| @@ -131,6 +131,7 @@ · 130 unmodified lines | ||
| 131 | 131 | #define XILINX_MCDMA_MAX_CHANS_PER_DEVICE 0x20 |
| 132 | 132 | #define XILINX_DMA_MAX_CHANS_PER_DEVICE 0x2 |
| 133 | 133 | #define XILINX_CDMA_MAX_CHANS_PER_DEVICE 0x1 |
| 134 | +#define XILINX_DMA_DFAULT_ADDRWIDTH 0x20 | |
| 134 | 135 | |
| 135 | 136 | #define XILINX_DMA_DMAXR_ALL_IRQ_MASK \ |
| 136 | 137 | (XILINX_DMA_DMASR_FRM_CNT_IRQ | \ |
| @@ -3159,7 +3160,7 @@ static int xilinx_dma_probe(struct platform_device *pdev) · 3022 unmodified lines | ||
| 3159 | 3160 | struct device_node *node = pdev->dev.of_node; |
| 3160 | 3161 | struct xilinx_dma_device *xdev; |
| 3161 | 3162 | struct device_node *child, *np = pdev->dev.of_node; |
| 3162 | − u32 num_frames, addr_width, len_width; | |
| 3163 | + u32 num_frames, addr_width = XILINX_DMA_DFAULT_ADDRWIDTH, len_width; | |
| 3163 | 3164 | int i, err; |
| 3164 | 3165 | |
| 3165 | 3166 | /* Allocate and initialize the DMA engine structure */ |
| @@ -3235,7 +3236,9 @@ static int xilinx_dma_probe(struct platform_device *pdev) · 69 unmodified lines | ||
| 3235 | 3236 | |
| 3236 | 3237 | err = of_property_read_u32(node, "xlnx,addrwidth", &addr_width); |
| 3237 | 3238 | if (err < 0) |
| 3238 | − dev_warn(xdev->dev, "missing xlnx,addrwidth property\n"); | |
| 3239 | + dev_warn(xdev->dev, | |
| 3240 | + "missing xlnx,addrwidth property, using default value %d\n", | |
| 3241 | + XILINX_DMA_DFAULT_ADDRWIDTH); | |
| 3239 | 3242 | |
| 3240 | 3243 | if (addr_width > 32) |
| 3241 | 3244 | xdev->ext_addr = true; |