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drm/i915/uapi: Add comment clarifying purpose of I915_TILING_* values

The I915_TILING_* values in our uapi header are intended solely for use with the old get_tiling/set_tiling ioctls that operate on hardware de-tiling fences; all other uapi communication about tiling types is done via framebuffer modifiers rather than with these old values. On newer Intel platforms detiling fences no longer exist so the old get_tiling/set_tiling ioctls are no longer usable and will always return -EOPNOTSUPP. This means there's no reason to add new tiling types (such as the Tile4 format introduced by Xe_HP) to the uapi header here. Any kernel-internal code that needs to represent tiling format should either rely on framebuffer modifiers (as the display code does) or use some kind of non-uapi enum (as the GEM blt selftest now does).

Matt Roper committed 5 years ago

Commit ea673f11 parent d73b1741 file · +6 −0Browse files

Showing the changes to include/uapi (1 of 1 file). Show all

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include/uapi/drm/i915_drm.h+6−0
@@ -1522,6 +1522,12 @@ struct drm_i915_gem_caching { · 1521 unmodified lines
1522#define I915_TILING_NONE 01522#define I915_TILING_NONE 0
1523#define I915_TILING_X 11523#define I915_TILING_X 1
1524#define I915_TILING_Y 21524#define I915_TILING_Y 2
1525/*
1526 * Do not add new tiling types here. The I915_TILING_* values are for
1527 * de-tiling fence registers that no longer exist on modern platforms. Although
1528 * the hardware may support new types of tiling in general (e.g., Tile4), we
1529 * do not need to add them to the uapi that is specific to now-defunct ioctls.
1530 */
1525#define I915_TILING_LAST I915_TILING_Y1531#define I915_TILING_LAST I915_TILING_Y
1526 1532
1527#define I915_BIT_6_SWIZZLE_NONE 01533#define I915_BIT_6_SWIZZLE_NONE 0