We need to use more of the Macros in asm.h to allow kvm_locore.S to build in a 64-bit kernel. For 32-bit there is no change in the generated object code.
Unified · Split
| @@ -60,7 +60,7 @@ · 59 unmodified lines | ||
| 60 | 60 | |
| 61 | 61 | FEXPORT(__kvm_mips_vcpu_run) |
| 62 | 62 | /* k0/k1 not being used in host kernel context */ |
| 63 | − addiu k1, sp, -PT_SIZE | |
| 63 | + INT_ADDIU k1, sp, -PT_SIZE | |
| 64 | 64 | LONG_S $0, PT_R0(k1) |
| 65 | 65 | LONG_S $1, PT_R1(k1) |
| 66 | 66 | LONG_S $2, PT_R2(k1) |
| @@ -121,7 +121,7 @@ FEXPORT(__kvm_mips_vcpu_run) · 54 unmodified lines | ||
| 121 | 121 | mtc0 a1, CP0_DDATA_LO |
| 122 | 122 | |
| 123 | 123 | /* Offset into vcpu->arch */ |
| 124 | − addiu k1, a1, VCPU_HOST_ARCH | |
| 124 | + INT_ADDIU k1, a1, VCPU_HOST_ARCH | |
| 125 | 125 | |
| 126 | 126 | /* |
| 127 | 127 | * Save the host stack to VCPU, used for exception processing |
| @@ -159,16 +159,16 @@ FEXPORT(__kvm_mips_vcpu_run) · 31 unmodified lines | ||
| 159 | 159 | |
| 160 | 160 | FEXPORT(__kvm_mips_load_asid) |
| 161 | 161 | /* Set the ASID for the Guest Kernel */ |
| 162 | − sll t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */ | |
| 162 | + INT_SLL t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */ | |
| 163 | 163 | /* addresses shift to 0x80000000 */ |
| 164 | 164 | bltz t0, 1f /* If kernel */ |
| 165 | − addiu t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */ | |
| 166 | − addiu t1, k1, VCPU_GUEST_USER_ASID /* else user */ | |
| 165 | + INT_ADDIU t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */ | |
| 166 | + INT_ADDIU t1, k1, VCPU_GUEST_USER_ASID /* else user */ | |
| 167 | 167 | 1: |
| 168 | 168 | /* t1: contains the base of the ASID array, need to get the cpu id */ |
| 169 | 169 | LONG_L t2, TI_CPU($28) /* smp_processor_id */ |
| 170 | − sll t2, t2, 2 /* x4 */ | |
| 171 | − addu t3, t1, t2 | |
| 170 | + INT_SLL t2, t2, 2 /* x4 */ | |
| 171 | + REG_ADDU t3, t1, t2 | |
| 172 | 172 | LONG_L k0, (t3) |
| 173 | 173 | andi k0, k0, 0xff |
| 174 | 174 | mtc0 k0, CP0_ENTRYHI |
| @@ -236,10 +236,10 @@ VECTOR(MIPSX(exception), unknown) · 61 unmodified lines | ||
| 236 | 236 | ehb #02: |
| 237 | 237 | |
| 238 | 238 | mfc0 k0, CP0_EBASE #02: Get EBASE |
| 239 | − srl k0, k0, 10 #03: Get rid of CPUNum | |
| 240 | − sll k0, k0, 10 #04 | |
| 239 | + INT_SRL k0, k0, 10 #03: Get rid of CPUNum | |
| 240 | + INT_SLL k0, k0, 10 #04 | |
| 241 | 241 | LONG_S k1, 0x3000(k0) #05: Save k1 @ offset 0x3000 |
| 242 | − addiu k0, k0, 0x2000 #06: Exception handler is installed @ offset 0x2000 | |
| 242 | + INT_ADDIU k0, k0, 0x2000 #06: Exception handler is installed @ offset 0x2000 | |
| 243 | 243 | j k0 #07: jump to the function |
| 244 | 244 | nop #08: branch delay slot |
| 245 | 245 | VECTOR_END(MIPSX(exceptionEnd)) |
| @@ -253,7 +253,7 @@ VECTOR_END(MIPSX(exceptionEnd)) · 7 unmodified lines | ||
| 253 | 253 | NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra) |
| 254 | 254 | /* Get the VCPU pointer from DDTATA_LO */ |
| 255 | 255 | mfc0 k1, CP0_DDATA_LO |
| 256 | − addiu k1, k1, VCPU_HOST_ARCH | |
| 256 | + INT_ADDIU k1, k1, VCPU_HOST_ARCH | |
| 257 | 257 | |
| 258 | 258 | /* Start saving Guest context to VCPU */ |
| 259 | 259 | LONG_S $0, VCPU_R0(k1) |
| @@ -304,7 +304,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra) · 44 unmodified lines | ||
| 304 | 304 | LONG_S t0, VCPU_R26(k1) |
| 305 | 305 | |
| 306 | 306 | /* Get GUEST k1 and save it in VCPU */ |
| 307 | − la t1, ~0x2ff | |
| 307 | + PTR_LI t1, ~0x2ff | |
| 308 | 308 | mfc0 t0, CP0_EBASE |
| 309 | 309 | and t0, t0, t1 |
| 310 | 310 | LONG_L t0, 0x3000(t0) |
| @@ -367,7 +367,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra) · 56 unmodified lines | ||
| 367 | 367 | LONG_L sp, VCPU_HOST_STACK(k1) |
| 368 | 368 | |
| 369 | 369 | /* Saved host state */ |
| 370 | − addiu sp, sp, -PT_SIZE | |
| 370 | + INT_ADDIU sp, sp, -PT_SIZE | |
| 371 | 371 | |
| 372 | 372 | /* XXXKYMA do we need to load the host ASID, maybe not because the |
| 373 | 373 | * kernel entries are marked GLOBAL, need to verify |
| @@ -378,7 +378,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra) · 4 unmodified lines | ||
| 378 | 378 | mtc0 k0, CP0_DDATA_LO |
| 379 | 379 | |
| 380 | 380 | /* Restore RDHWR access */ |
| 381 | − la k0, 0x2000000F | |
| 381 | + PTR_LI k0, 0x2000000F | |
| 382 | 382 | mtc0 k0, CP0_HWRENA |
| 383 | 383 | |
| 384 | 384 | /* Jump to handler */ |
| @@ -386,9 +386,9 @@ FEXPORT(__kvm_mips_jump_to_handler) · 1 unmodified line | ||
| 386 | 386 | /* XXXKYMA: not sure if this is safe, how large is the stack?? |
| 387 | 387 | * Now jump to the kvm_mips_handle_exit() to see if we can deal |
| 388 | 388 | * with this in the kernel */ |
| 389 | − la t9, kvm_mips_handle_exit | |
| 389 | + PTR_LA t9, kvm_mips_handle_exit | |
| 390 | 390 | jalr.hb t9 |
| 391 | − addiu sp, sp, -CALLFRAME_SIZ /* BD Slot */ | |
| 391 | + INT_ADDIU sp, sp, -CALLFRAME_SIZ /* BD Slot */ | |
| 392 | 392 | |
| 393 | 393 | /* Return from handler Make sure interrupts are disabled */ |
| 394 | 394 | di |
| @@ -400,7 +400,7 @@ FEXPORT(__kvm_mips_jump_to_handler) · 5 unmodified lines | ||
| 400 | 400 | */ |
| 401 | 401 | |
| 402 | 402 | move k1, s1 |
| 403 | − addiu k1, k1, VCPU_HOST_ARCH | |
| 403 | + INT_ADDIU k1, k1, VCPU_HOST_ARCH | |
| 404 | 404 | |
| 405 | 405 | /* Check return value, should tell us if we are returning to the |
| 406 | 406 | * host (handle I/O etc)or resuming the guest |
| @@ -438,16 +438,16 @@ __kvm_mips_return_to_guest: · 31 unmodified lines | ||
| 438 | 438 | mtc0 t0, CP0_EPC |
| 439 | 439 | |
| 440 | 440 | /* Set the ASID for the Guest Kernel */ |
| 441 | − sll t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */ | |
| 441 | + INT_SLL t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */ | |
| 442 | 442 | /* addresses shift to 0x80000000 */ |
| 443 | 443 | bltz t0, 1f /* If kernel */ |
| 444 | − addiu t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */ | |
| 445 | − addiu t1, k1, VCPU_GUEST_USER_ASID /* else user */ | |
| 444 | + INT_ADDIU t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */ | |
| 445 | + INT_ADDIU t1, k1, VCPU_GUEST_USER_ASID /* else user */ | |
| 446 | 446 | 1: |
| 447 | 447 | /* t1: contains the base of the ASID array, need to get the cpu id */ |
| 448 | 448 | LONG_L t2, TI_CPU($28) /* smp_processor_id */ |
| 449 | − sll t2, t2, 2 /* x4 */ | |
| 450 | − addu t3, t1, t2 | |
| 449 | + INT_SLL t2, t2, 2 /* x4 */ | |
| 450 | + REG_ADDU t3, t1, t2 | |
| 451 | 451 | LONG_L k0, (t3) |
| 452 | 452 | andi k0, k0, 0xff |
| 453 | 453 | mtc0 k0,CP0_ENTRYHI |
| @@ -505,7 +505,7 @@ FEXPORT(__kvm_mips_skip_guest_restore) · 51 unmodified lines | ||
| 505 | 505 | __kvm_mips_return_to_host: |
| 506 | 506 | /* EBASE is already pointing to Linux */ |
| 507 | 507 | LONG_L k1, VCPU_HOST_STACK(k1) |
| 508 | − addiu k1,k1, -PT_SIZE | |
| 508 | + INT_ADDIU k1,k1, -PT_SIZE | |
| 509 | 509 | |
| 510 | 510 | /* Restore host DDATA_LO */ |
| 511 | 511 | LONG_L k0, PT_HOST_USERLOCAL(k1) |
| @@ -523,7 +523,7 @@ __kvm_mips_return_to_host: · 11 unmodified lines | ||
| 523 | 523 | |
| 524 | 524 | /* r2/v0 is the return code, shift it down by 2 (arithmetic) |
| 525 | 525 | * to recover the err code */ |
| 526 | − sra k0, v0, 2 | |
| 526 | + INT_SRA k0, v0, 2 | |
| 527 | 527 | move $2, k0 |
| 528 | 528 | |
| 529 | 529 | LONG_L $3, PT_R3(k1) |
| @@ -563,7 +563,7 @@ __kvm_mips_return_to_host: · 33 unmodified lines | ||
| 563 | 563 | mtlo k0 |
| 564 | 564 | |
| 565 | 565 | /* Restore RDHWR access */ |
| 566 | − la k0, 0x2000000F | |
| 566 | + PTR_LI k0, 0x2000000F | |
| 567 | 567 | mtc0 k0, CP0_HWRENA |
| 568 | 568 | |
| 569 | 569 | |
| @@ -627,13 +627,13 @@ LEAF(MIPSX(SyncICache)) · 57 unmodified lines | ||
| 627 | 627 | .set mips32r2 |
| 628 | 628 | beq a1, zero, 20f |
| 629 | 629 | nop |
| 630 | − addu a1, a0, a1 | |
| 630 | + REG_ADDU a1, a0, a1 | |
| 631 | 631 | rdhwr v0, HW_SYNCI_Step |
| 632 | 632 | beq v0, zero, 20f |
| 633 | 633 | nop |
| 634 | 634 | 10: |
| 635 | 635 | synci 0(a0) |
| 636 | − addu a0, a0, v0 | |
| 636 | + REG_ADDU a0, a0, v0 | |
| 637 | 637 | sltu v1, a0, a1 |
| 638 | 638 | bne v1, zero, 10b |
| 639 | 639 | nop |