Pull SoC fixes from Arnd Bergmann: "There are a few minor code fixes for tegra firmware, i.MX firmware and the eyeq reset controller, and a MAINTAINERS update as Alyssa Rosenzweig moves on to non-kernel projects. The other changes are all for devicetree files: - Multiple Marvell Armada SoCs need changes to fix PCIe, audio and SATA - A socfpga board fails to probe the ethernet phy - The two temperature sensors on i.MX8MP are swapped - Allwinner devicetree files cause build-time warnings - Two Rockchip based boards need corrections for headphone detection and SPI flash" * tag 'soc-fixes-6.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: MAINTAINERS: remove Alyssa Rosenzweig firmware: tegra: Do not warn on missing memory-region property arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports arm64: dts: marvell: cn9132-clearfog: disable eMMC high-speed modes arm64: dts: marvell: cn913x-solidrun: fix sata ports status ARM: dts: kirkwood: Fix sound DAI cells for OpenRD clients arm64: dts: imx8mp: Correct thermal sensor index ARM: imx: Kconfig: Adjust select after renamed config option firmware: imx: Add stub functions for SCMI CPU API firmware: imx: Add stub functions for SCMI LMM API firmware: imx: Add stub functions for SCMI MISC API riscv: dts: allwinner: rename devterm i2c-gpio node to comply with binding arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 arm64: dts: rockchip: Add vcc supply for SPI Flash on NanoPC-T6 ARM: dts: socfpga: sodia: Fix mdio bus probe and PHY address reset: eyeq: fix OF node leak ARM64: dts: mcbin: fix SATA ports on Macchiatobin ARM: dts: armada-370-db: Fix stereo audio input routing on Armada 370 ARM: dts: allwinner: Minor whitespace cleanup
Unified · Split
| @@ -1,5 +1,6 @@ | ||
| 1 | 1 | Alan Cox <alan@lxorguk.ukuu.org.uk> |
| 2 | 2 | Alan Cox <root@hraefn.swansea.linux.org.uk> |
| 3 | +Alyssa Rosenzweig <alyssa@rosenzweig.io> | |
| 3 | 4 | Christoph Hellwig <hch@lst.de> |
| 4 | 5 | Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
| 5 | 6 | Marc Gonzalez <marc.w.gonzalez@free.fr> |
| @@ -1845,7 +1845,6 @@ S: Odd fixes · 1844 unmodified lines | ||
| 1845 | 1845 | F: drivers/input/mouse/bcm5974.c |
| 1846 | 1846 | |
| 1847 | 1847 | APPLE PCIE CONTROLLER DRIVER |
| 1848 | −M: Alyssa Rosenzweig <alyssa@rosenzweig.io> | |
| 1849 | 1848 | M: Marc Zyngier <maz@kernel.org> |
| 1850 | 1849 | L: linux-pci@vger.kernel.org |
| 1851 | 1850 | S: Maintained |
| @@ -2364,7 +2363,6 @@ F: sound/soc/codecs/ssm3515.c · 512 unmodified lines | ||
| 2364 | 2363 | ARM/APPLE MACHINE SUPPORT |
| 2365 | 2364 | M: Sven Peter <sven@kernel.org> |
| 2366 | 2365 | M: Janne Grunau <j@jannau.net> |
| 2367 | −R: Alyssa Rosenzweig <alyssa@rosenzweig.io> | |
| 2368 | 2366 | R: Neal Gompa <neal@gompa.dev> |
| 2369 | 2367 | L: asahi@lists.linux.dev |
| 2370 | 2368 | L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) |
| @@ -218,7 +218,7 @@ · 217 unmodified lines | ||
| 218 | 218 | &usbphy { |
| 219 | 219 | usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */ |
| 220 | 220 | usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH5 */ |
| 221 | − usb0_vbus-supply = <®_usb0_vbus>; | |
| 221 | + usb0_vbus-supply = <®_usb0_vbus>; | |
| 222 | 222 | usb1_vbus-supply = <®_usb1_vbus>; |
| 223 | 223 | usb2_vbus-supply = <®_usb2_vbus>; |
| 224 | 224 | status = "okay"; |
| @@ -82,7 +82,7 @@ · 81 unmodified lines | ||
| 82 | 82 | }; |
| 83 | 83 | |
| 84 | 84 | &ehci0 { |
| 85 | − status = "okay"; | |
| 85 | + status = "okay"; | |
| 86 | 86 | }; |
| 87 | 87 | |
| 88 | 88 | &mmc1 { |
| @@ -705,7 +705,7 @@ · 704 unmodified lines | ||
| 705 | 705 | }; |
| 706 | 706 | |
| 707 | 707 | /omit-if-no-ref/ |
| 708 | − uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins{ | |
| 708 | + uart2_rts_cts_pi_pins: uart2-rts-cts-pi-pins { | |
| 709 | 709 | pins = "PI16", "PI17"; |
| 710 | 710 | function = "uart2"; |
| 711 | 711 | }; |
| @@ -29,7 +29,7 @@ · 28 unmodified lines | ||
| 29 | 29 | clk_can0: clock-can0 { |
| 30 | 30 | compatible = "fixed-clock"; |
| 31 | 31 | #clock-cells = <0>; |
| 32 | − clock-frequency = <40000000>; | |
| 32 | + clock-frequency = <40000000>; | |
| 33 | 33 | }; |
| 34 | 34 | |
| 35 | 35 | gpio-keys { |
| @@ -66,8 +66,10 @@ · 65 unmodified lines | ||
| 66 | 66 | mdio0 { |
| 67 | 67 | #address-cells = <1>; |
| 68 | 68 | #size-cells = <0>; |
| 69 | − phy0: ethernet-phy@0 { | |
| 70 | − reg = <0>; | |
| 69 | + compatible = "snps,dwmac-mdio"; | |
| 70 | + | |
| 71 | + phy0: ethernet-phy@4 { | |
| 72 | + reg = <4>; | |
| 71 | 73 | rxd0-skew-ps = <0>; |
| 72 | 74 | rxd1-skew-ps = <0>; |
| 73 | 75 | rxd2-skew-ps = <0>; |
| @@ -119,7 +119,7 @@ · 118 unmodified lines | ||
| 119 | 119 | "Out Jack", "HPL", |
| 120 | 120 | "Out Jack", "HPR", |
| 121 | 121 | "AIN1L", "In Jack", |
| 122 | − "AIN1L", "In Jack"; | |
| 122 | + "AIN1R", "In Jack"; | |
| 123 | 123 | status = "okay"; |
| 124 | 124 | |
| 125 | 125 | simple-audio-card,dai-link@0 { |
| @@ -38,7 +38,7 @@ · 37 unmodified lines | ||
| 38 | 38 | simple-audio-card,mclk-fs = <256>; |
| 39 | 39 | |
| 40 | 40 | simple-audio-card,cpu { |
| 41 | − sound-dai = <&audio0 0>; | |
| 41 | + sound-dai = <&audio0>; | |
| 42 | 42 | }; |
| 43 | 43 | |
| 44 | 44 | simple-audio-card,codec { |
| @@ -242,7 +242,7 @@ choice · 241 unmodified lines | ||
| 242 | 242 | |
| 243 | 243 | config VF_USE_PIT_TIMER |
| 244 | 244 | bool "Use PIT timer" |
| 245 | − select VF_PIT_TIMER | |
| 245 | + select NXP_PIT_TIMER | |
| 246 | 246 | help |
| 247 | 247 | Use SoC Periodic Interrupt Timer (PIT) as clocksource |
| 248 | 248 | |
| @@ -298,7 +298,7 @@ · 297 unmodified lines | ||
| 298 | 298 | cpu-thermal { |
| 299 | 299 | polling-delay-passive = <250>; |
| 300 | 300 | polling-delay = <2000>; |
| 301 | − thermal-sensors = <&tmu 0>; | |
| 301 | + thermal-sensors = <&tmu 1>; | |
| 302 | 302 | trips { |
| 303 | 303 | cpu_alert0: trip0 { |
| 304 | 304 | temperature = <85000>; |
| @@ -331,7 +331,7 @@ · 26 unmodified lines | ||
| 331 | 331 | soc-thermal { |
| 332 | 332 | polling-delay-passive = <250>; |
| 333 | 333 | polling-delay = <2000>; |
| 334 | − thermal-sensors = <&tmu 1>; | |
| 334 | + thermal-sensors = <&tmu 0>; | |
| 335 | 335 | trips { |
| 336 | 336 | soc_alert0: trip0 { |
| 337 | 337 | temperature = <85000>; |
| @@ -345,11 +345,13 @@ · 344 unmodified lines | ||
| 345 | 345 | /* CPS Lane 1 - U32 */ |
| 346 | 346 | sata-port@0 { |
| 347 | 347 | phys = <&cp1_comphy1 0>; |
| 348 | + status = "okay"; | |
| 348 | 349 | }; |
| 349 | 350 | |
| 350 | 351 | /* CPS Lane 3 - U31 */ |
| 351 | 352 | sata-port@1 { |
| 352 | 353 | phys = <&cp1_comphy3 1>; |
| 354 | + status = "okay"; | |
| 353 | 355 | }; |
| 354 | 356 | }; |
| 355 | 357 | |
| @@ -152,11 +152,12 @@ · 151 unmodified lines | ||
| 152 | 152 | |
| 153 | 153 | /* SRDS #0 - SATA on M.2 connector */ |
| 154 | 154 | &cp0_sata0 { |
| 155 | − phys = <&cp0_comphy0 1>; | |
| 156 | 155 | status = "okay"; |
| 157 | 156 | |
| 158 | − /* only port 1 is available */ | |
| 159 | − /delete-node/ sata-port@0; | |
| 157 | + sata-port@1 { | |
| 158 | + phys = <&cp0_comphy0 1>; | |
| 159 | + status = "okay"; | |
| 160 | + }; | |
| 160 | 161 | }; |
| 161 | 162 | |
| 162 | 163 | /* microSD */ |
| @@ -563,11 +563,13 @@ · 562 unmodified lines | ||
| 563 | 563 | |
| 564 | 564 | /* SRDS #1 - SATA on M.2 (J44) */ |
| 565 | 565 | &cp1_sata0 { |
| 566 | − phys = <&cp1_comphy1 0>; | |
| 567 | 566 | status = "okay"; |
| 568 | 567 | |
| 569 | 568 | /* only port 0 is available */ |
| 570 | − /delete-node/ sata-port@1; | |
| 569 | + sata-port@0 { | |
| 570 | + phys = <&cp1_comphy1 0>; | |
| 571 | + status = "okay"; | |
| 572 | + }; | |
| 571 | 573 | }; |
| 572 | 574 | |
| 573 | 575 | &cp1_syscon0 { |
| @@ -413,7 +413,13 @@ · 412 unmodified lines | ||
| 413 | 413 | /* SRDS #0,#1,#2,#3 - PCIe */ |
| 414 | 414 | &cp0_pcie0 { |
| 415 | 415 | num-lanes = <4>; |
| 416 | − phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>; | |
| 416 | + /* | |
| 417 | + * The mvebu-comphy driver does not currently know how to pass correct | |
| 418 | + * lane-count to ATF while configuring the serdes lanes. | |
| 419 | + * Rely on bootloader configuration only. | |
| 420 | + * | |
| 421 | + * phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>; | |
| 422 | + */ | |
| 417 | 423 | status = "okay"; |
| 418 | 424 | }; |
| 419 | 425 | |
| @@ -475,7 +481,13 @@ · 55 unmodified lines | ||
| 475 | 481 | /* SRDS #0,#1 - PCIe */ |
| 476 | 482 | &cp1_pcie0 { |
| 477 | 483 | num-lanes = <2>; |
| 478 | − phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>; | |
| 484 | + /* | |
| 485 | + * The mvebu-comphy driver does not currently know how to pass correct | |
| 486 | + * lane-count to ATF while configuring the serdes lanes. | |
| 487 | + * Rely on bootloader configuration only. | |
| 488 | + * | |
| 489 | + * phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>; | |
| 490 | + */ | |
| 479 | 491 | status = "okay"; |
| 480 | 492 | }; |
| 481 | 493 | |
| @@ -512,10 +524,9 @@ · 30 unmodified lines | ||
| 512 | 524 | status = "okay"; |
| 513 | 525 | |
| 514 | 526 | /* only port 1 is available */ |
| 515 | − /delete-node/ sata-port@0; | |
| 516 | − | |
| 517 | 527 | sata-port@1 { |
| 518 | 528 | phys = <&cp1_comphy3 1>; |
| 529 | + status = "okay"; | |
| 519 | 530 | }; |
| 520 | 531 | }; |
| 521 | 532 | |
| @@ -631,9 +642,8 @@ · 109 unmodified lines | ||
| 631 | 642 | status = "okay"; |
| 632 | 643 | |
| 633 | 644 | /* only port 1 is available */ |
| 634 | − /delete-node/ sata-port@0; | |
| 635 | − | |
| 636 | 645 | sata-port@1 { |
| 646 | + status = "okay"; | |
| 637 | 647 | phys = <&cp2_comphy3 1>; |
| 638 | 648 | }; |
| 639 | 649 | }; |
| @@ -137,6 +137,14 @@ · 136 unmodified lines | ||
| 137 | 137 | pinctrl-0 = <&ap_mmc0_pins>; |
| 138 | 138 | pinctrl-names = "default"; |
| 139 | 139 | vqmmc-supply = <&v_1_8>; |
| 140 | + /* | |
| 141 | + * Not stable in HS modes - phy needs "more calibration", so disable | |
| 142 | + * UHS (by preventing voltage switch), SDR104, SDR50 and DDR50 modes. | |
| 143 | + */ | |
| 144 | + no-1-8-v; | |
| 145 | + no-sd; | |
| 146 | + no-sdio; | |
| 147 | + non-removable; | |
| 140 | 148 | status = "okay"; |
| 141 | 149 | }; |
| 142 | 150 | |
| @@ -731,6 +731,7 @@ · 730 unmodified lines | ||
| 731 | 731 | spi-max-frequency = <104000000>; |
| 732 | 732 | spi-rx-bus-width = <4>; |
| 733 | 733 | spi-tx-bus-width = <1>; |
| 734 | + vcc-supply = <&vcc_1v8_s3>; | |
| 734 | 735 | }; |
| 735 | 736 | }; |
| 736 | 737 | |
| @@ -42,9 +42,8 @@ · 41 unmodified lines | ||
| 42 | 42 | simple-audio-card,bitclock-master = <&masterdai>; |
| 43 | 43 | simple-audio-card,format = "i2s"; |
| 44 | 44 | simple-audio-card,frame-master = <&masterdai>; |
| 45 | − simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; | |
| 45 | + simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>; | |
| 46 | 46 | simple-audio-card,mclk-fs = <256>; |
| 47 | − simple-audio-card,pin-switches = "Headphones"; | |
| 48 | 47 | simple-audio-card,routing = |
| 49 | 48 | "Headphones", "LOUT1", |
| 50 | 49 | "Headphones", "ROUT1", |
| @@ -17,7 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #cooling-cells = <2>; |
| 18 | 18 | }; |
| 19 | 19 | |
| 20 | − i2c-gpio-0 { | |
| 20 | + i2c-0 { | |
| 21 | 21 | compatible = "i2c-gpio"; |
| 22 | 22 | sda-gpios = <&pio 3 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD14/GPIO44 */ |
| 23 | 23 | scl-gpios = <&pio 3 15 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>; /* PD15/GPIO45 */ |
| @@ -198,7 +198,10 @@ static int tegra186_bpmp_dram_init(struct tegra_bpmp *bpmp) · 197 unmodified lines | ||
| 198 | 198 | |
| 199 | 199 | err = of_reserved_mem_region_to_resource(bpmp->dev->of_node, 0, &res); |
| 200 | 200 | if (err < 0) { |
| 201 | − dev_warn(bpmp->dev, "failed to parse memory region: %d\n", err); | |
| 201 | + if (err != -ENODEV) | |
| 202 | + dev_warn(bpmp->dev, | |
| 203 | + "failed to parse memory region: %d\n", err); | |
| 204 | + | |
| 202 | 205 | return err; |
| 203 | 206 | } |
| 204 | 207 | |
| @@ -410,6 +410,13 @@ static int eqr_of_xlate_twocells(struct reset_controller_dev *rcdev, · 409 unmodified lines | ||
| 410 | 410 | return eqr_of_xlate_internal(rcdev, reset_spec->args[0], reset_spec->args[1]); |
| 411 | 411 | } |
| 412 | 412 | |
| 413 | +static void eqr_of_node_put(void *_dev) | |
| 414 | +{ | |
| 415 | + struct device *dev = _dev; | |
| 416 | + | |
| 417 | + of_node_put(dev->of_node); | |
| 418 | +} | |
| 419 | + | |
| 413 | 420 | static int eqr_probe(struct auxiliary_device *adev, |
| 414 | 421 | const struct auxiliary_device_id *id) |
| 415 | 422 | { |
| @@ -428,6 +435,10 @@ static int eqr_probe(struct auxiliary_device *adev, · 12 unmodified lines | ||
| 428 | 435 | if (!dev->of_node) |
| 429 | 436 | return -ENODEV; |
| 430 | 437 | |
| 438 | + ret = devm_add_action_or_reset(dev, eqr_of_node_put, dev); | |
| 439 | + if (ret) | |
| 440 | + return ret; | |
| 441 | + | |
| 431 | 442 | /* |
| 432 | 443 | * Using our newfound OF node, we can get match data. We cannot use |
| 433 | 444 | * device_get_match_data() because it does not match reused OF nodes. |
| @@ -26,13 +26,43 @@ · 25 unmodified lines | ||
| 26 | 26 | #define SCMI_IMX94_CTRL_SAI3_MCLK 5U /*!< WAKE SAI3 MCLK */ |
| 27 | 27 | #define SCMI_IMX94_CTRL_SAI4_MCLK 6U /*!< WAKE SAI4 MCLK */ |
| 28 | 28 | |
| 29 | +#if IS_ENABLED(CONFIG_IMX_SCMI_MISC_DRV) | |
| 29 | 30 | int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val); |
| 30 | 31 | int scmi_imx_misc_ctrl_set(u32 id, u32 val); |
| 32 | +#else | |
| 33 | +static inline int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val) | |
| 34 | +{ | |
| 35 | + return -EOPNOTSUPP; | |
| 36 | +} | |
| 31 | 37 | |
| 38 | +static inline int scmi_imx_misc_ctrl_set(u32 id, u32 val) | |
| 39 | +{ | |
| 40 | + return -EOPNOTSUPP; | |
| 41 | +} | |
| 42 | +#endif | |
| 43 | + | |
| 44 | +#if IS_ENABLED(CONFIG_IMX_SCMI_CPU_DRV) | |
| 32 | 45 | int scmi_imx_cpu_start(u32 cpuid, bool start); |
| 33 | 46 | int scmi_imx_cpu_started(u32 cpuid, bool *started); |
| 34 | 47 | int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, bool boot, |
| 35 | 48 | bool resume); |
| 49 | +#else | |
| 50 | +static inline int scmi_imx_cpu_start(u32 cpuid, bool start) | |
| 51 | +{ | |
| 52 | + return -EOPNOTSUPP; | |
| 53 | +} | |
| 54 | + | |
| 55 | +static inline int scmi_imx_cpu_started(u32 cpuid, bool *started) | |
| 56 | +{ | |
| 57 | + return -EOPNOTSUPP; | |
| 58 | +} | |
| 59 | + | |
| 60 | +static inline int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, | |
| 61 | + bool boot, bool resume) | |
| 62 | +{ | |
| 63 | + return -EOPNOTSUPP; | |
| 64 | +} | |
| 65 | +#endif | |
| 36 | 66 | |
| 37 | 67 | enum scmi_imx_lmm_op { |
| 38 | 68 | SCMI_IMX_LMM_BOOT, |
| @@ -44,7 +74,24 @@ enum scmi_imx_lmm_op { · 5 unmodified lines | ||
| 44 | 74 | #define SCMI_IMX_LMM_OP_FORCEFUL 0 |
| 45 | 75 | #define SCMI_IMX_LMM_OP_GRACEFUL BIT(0) |
| 46 | 76 | |
| 77 | +#if IS_ENABLED(CONFIG_IMX_SCMI_LMM_DRV) | |
| 47 | 78 | int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags); |
| 48 | 79 | int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info); |
| 49 | 80 | int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector); |
| 81 | +#else | |
| 82 | +static inline int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags) | |
| 83 | +{ | |
| 84 | + return -EOPNOTSUPP; | |
| 85 | +} | |
| 86 | + | |
| 87 | +static inline int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info) | |
| 88 | +{ | |
| 89 | + return -EOPNOTSUPP; | |
| 90 | +} | |
| 91 | + | |
| 92 | +static inline int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector) | |
| 93 | +{ | |
| 94 | + return -EOPNOTSUPP; | |
| 95 | +} | |
| 96 | +#endif | |
| 50 | 97 | #endif |