History

Merge tag 'soc-fixes-6.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann: "There are a few minor code fixes for tegra firmware, i.MX firmware and the eyeq reset controller, and a MAINTAINERS update as Alyssa Rosenzweig moves on to non-kernel projects. The other changes are all for devicetree files: - Multiple Marvell Armada SoCs need changes to fix PCIe, audio and SATA - A socfpga board fails to probe the ethernet phy - The two temperature sensors on i.MX8MP are swapped - Allwinner devicetree files cause build-time warnings - Two Rockchip based boards need corrections for headphone detection and SPI flash" * tag 'soc-fixes-6.17-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: MAINTAINERS: remove Alyssa Rosenzweig firmware: tegra: Do not warn on missing memory-region property arm64: dts: marvell: cn9132-clearfog: fix multi-lane pci x2 and x4 ports arm64: dts: marvell: cn9132-clearfog: disable eMMC high-speed modes arm64: dts: marvell: cn913x-solidrun: fix sata ports status ARM: dts: kirkwood: Fix sound DAI cells for OpenRD clients arm64: dts: imx8mp: Correct thermal sensor index ARM: imx: Kconfig: Adjust select after renamed config option firmware: imx: Add stub functions for SCMI CPU API firmware: imx: Add stub functions for SCMI LMM API firmware: imx: Add stub functions for SCMI MISC API riscv: dts: allwinner: rename devterm i2c-gpio node to comply with binding arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 arm64: dts: rockchip: Add vcc supply for SPI Flash on NanoPC-T6 ARM: dts: socfpga: sodia: Fix mdio bus probe and PHY address reset: eyeq: fix OF node leak ARM64: dts: mcbin: fix SATA ports on Macchiatobin ARM: dts: armada-370-db: Fix stereo audio input routing on Armada 370 ARM: dts: allwinner: Minor whitespace cleanup

Linus Torvalds committed 1 year ago

Commit ea78c192 parents 4ea5af0 139237722 files · +113 −28Browse files

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include/linux/firmware/imx/sm.h+47−0
@@ -26,13 +26,43 @@ · 25 unmodified lines
2626 #define SCMI_IMX94_CTRL_SAI3_MCLK 5U /*!< WAKE SAI3 MCLK */
2727 #define SCMI_IMX94_CTRL_SAI4_MCLK 6U /*!< WAKE SAI4 MCLK */
2828
29+#if IS_ENABLED(CONFIG_IMX_SCMI_MISC_DRV)
2930 int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val);
3031 int scmi_imx_misc_ctrl_set(u32 id, u32 val);
32+#else
33+static inline int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val)
34+{
35+ return -EOPNOTSUPP;
36+}
3137
38+static inline int scmi_imx_misc_ctrl_set(u32 id, u32 val)
39+{
40+ return -EOPNOTSUPP;
41+}
42+#endif
43+
44+#if IS_ENABLED(CONFIG_IMX_SCMI_CPU_DRV)
3245 int scmi_imx_cpu_start(u32 cpuid, bool start);
3346 int scmi_imx_cpu_started(u32 cpuid, bool *started);
3447 int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, bool boot,
3548 bool resume);
49+#else
50+static inline int scmi_imx_cpu_start(u32 cpuid, bool start)
51+{
52+ return -EOPNOTSUPP;
53+}
54+
55+static inline int scmi_imx_cpu_started(u32 cpuid, bool *started)
56+{
57+ return -EOPNOTSUPP;
58+}
59+
60+static inline int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start,
61+ bool boot, bool resume)
62+{
63+ return -EOPNOTSUPP;
64+}
65+#endif
3666
3767 enum scmi_imx_lmm_op {
3868 SCMI_IMX_LMM_BOOT,
@@ -44,7 +74,24 @@ enum scmi_imx_lmm_op { · 5 unmodified lines
4474 #define SCMI_IMX_LMM_OP_FORCEFUL 0
4575 #define SCMI_IMX_LMM_OP_GRACEFUL BIT(0)
4676
77+#if IS_ENABLED(CONFIG_IMX_SCMI_LMM_DRV)
4778 int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags);
4879 int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info);
4980 int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector);
81+#else
82+static inline int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags)
83+{
84+ return -EOPNOTSUPP;
85+}
86+
87+static inline int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info)
88+{
89+ return -EOPNOTSUPP;
90+}
91+
92+static inline int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector)
93+{
94+ return -EOPNOTSUPP;
95+}
96+#endif
5097 #endif