History

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms: - Nvidia: Fuse support for Tegra194, continued memory controller pieces for Tegra30 - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC - NXP/FSL: i.MX8MP SoC driver pieces - TI Keystone: ring accelerator driver - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs. - Xilinx ZynqMP: feature checking interface for firmware. Mailbox communication for power management - Overall support patch set for cpuidle on more complex hierarchies (PSCI-based) and misc cleanups, refactorings of Marvell, TI, other platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits) drivers: soc: xilinx: Use mailbox IPI callback dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists MAINTAINERS: Add brcmstb PCIe controller entry soc/tegra: fuse: Unmap registers once they are not needed anymore soc/tegra: fuse: Correct straps' address for older Tegra124 device trees soc/tegra: fuse: Warn if straps are not ready soc/tegra: fuse: Cache values of straps and Chip ID registers memory: tegra30-emc: Correct error message for timed out auto calibration memory: tegra30-emc: Firm up hardware programming sequence memory: tegra30-emc: Firm up suspend/resume sequence soc/tegra: regulators: Do nothing if voltage is unchanged memory: tegra: Correct reset value of xusb_hostr soc/tegra: fuse: Add APB DMA dependency for Tegra20 bus: tegra-aconnect: Remove PM_CLK dependency dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define memory: tegra: Add support for the Tegra194 memory controller memory: tegra: Only include support for enabled SoCs memory: tegra: Support DVFS on Tegra186 and later ...

Linus Torvalds committed 6 years ago

Commit eab35402 parents 1afa9c3 88b4750142 files · +6604 −3301Browse files

Showing the changes to include/linux (10 of 142 files). Show all

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10 files
  1. include/linux/cpuhotplug.h +1 −0
  2. include/linux/firmware/xlnx-zynqmp.h +7 −0
  3. include/linux/of.h +8 −0
  4. include/linux/platform_data/ti-sysc.h +1 −0
  5. include/linux/pm_domain.h +8 −0
  6. include/linux/psci.h +2 −0
  7. include/linux/qcom_scm.h +68 −51
  8. include/linux/scmi_protocol.h +4 −1
  9. include/linux/soc/samsung/exynos-pmu.h +1 −1
  10. include/linux/soc/samsung/exynos-regs-pmu.h +8 −8
include/linux/cpuhotplug.h+1−0
@@ -96,6 +96,7 @@ enum cpuhp_state { · 95 unmodified lines
9696 CPUHP_AP_OFFLINE,
9797 CPUHP_AP_SCHED_STARTING,
9898 CPUHP_AP_RCUTREE_DYING,
99+ CPUHP_AP_CPU_PM_STARTING,
99100 CPUHP_AP_IRQ_GIC_STARTING,
100101 CPUHP_AP_IRQ_HIP04_STARTING,
101102 CPUHP_AP_IRQ_ARMADA_XP_STARTING,
include/linux/firmware/xlnx-zynqmp.h+7−0
@@ -48,6 +48,10 @@ · 47 unmodified lines
4848 #define ZYNQMP_PM_CAPABILITY_WAKEUP 0x4U
4949 #define ZYNQMP_PM_CAPABILITY_UNUSABLE 0x8U
5050
51+/* Feature check status */
52+#define PM_FEATURE_INVALID -1
53+#define PM_FEATURE_UNCHECKED 0
54+
5155 /*
5256 * Firmware FPGA Manager flags
5357 * XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
@@ -78,11 +82,14 @@ enum pm_api_id { · 24 unmodified lines
7882 PM_CLOCK_GETRATE,
7983 PM_CLOCK_SETPARENT,
8084 PM_CLOCK_GETPARENT,
85+ PM_FEATURE_CHECK = 63,
86+ PM_API_MAX,
8187 };
8288
8389 /* PMU-FW return status codes */
8490 enum pm_ret_status {
8591 XST_PM_SUCCESS = 0,
92+ XST_PM_NO_FEATURE = 19,
8693 XST_PM_INTERNAL = 2000,
8794 XST_PM_CONFLICT,
8895 XST_PM_NO_ACCESS,
include/linux/of.h+8−0
@@ -351,6 +351,8 @@ extern const void *of_get_property(const struct device_node *node, · 350 unmodified lines
351351 int *lenp);
352352 extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
353353 extern struct device_node *of_get_next_cpu_node(struct device_node *prev);
354+extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node,
355+ int index);
354356
355357 #define for_each_property_of_node(dn, pp) \
356358 for (pp = dn->properties; pp != NULL; pp = pp->next)
@@ -765,6 +767,12 @@ static inline struct device_node *of_get_next_cpu_node(struct device_node *prev) · 408 unmodified lines
765767 return NULL;
766768 }
767769
770+static inline struct device_node *of_get_cpu_state_node(struct device_node *cpu_node,
771+ int index)
772+{
773+ return NULL;
774+}
775+
768776 static inline int of_n_addr_cells(struct device_node *np)
769777 {
770778 return 0;
include/linux/platform_data/ti-sysc.h+1−0
@@ -49,6 +49,7 @@ struct sysc_regbits { · 48 unmodified lines
4949 s8 emufree_shift;
5050 };
5151
52+#define SYSC_QUIRK_CLKDM_NOAUTO BIT(21)
5253 #define SYSC_QUIRK_FORCE_MSTANDBY BIT(20)
5354 #define SYSC_MODULE_QUIRK_AESS BIT(19)
5455 #define SYSC_MODULE_QUIRK_SGX BIT(18)
include/linux/pm_domain.h+8−0
@@ -284,6 +284,8 @@ void of_genpd_del_provider(struct device_node *np); · 283 unmodified lines
284284 int of_genpd_add_device(struct of_phandle_args *args, struct device *dev);
285285 int of_genpd_add_subdomain(struct of_phandle_args *parent_spec,
286286 struct of_phandle_args *subdomain_spec);
287+int of_genpd_remove_subdomain(struct of_phandle_args *parent_spec,
288+ struct of_phandle_args *subdomain_spec);
287289 struct generic_pm_domain *of_genpd_remove_last(struct device_node *np);
288290 int of_genpd_parse_idle_states(struct device_node *dn,
289291 struct genpd_power_state **states, int *n);
@@ -322,6 +324,12 @@ static inline int of_genpd_add_subdomain(struct of_phandle_args *parent_spec, · 32 unmodified lines
322324 return -ENODEV;
323325 }
324326
327+static inline int of_genpd_remove_subdomain(struct of_phandle_args *parent_spec,
328+ struct of_phandle_args *subdomain_spec)
329+{
330+ return -ENODEV;
331+}
332+
325333 static inline int of_genpd_parse_idle_states(struct device_node *dn,
326334 struct genpd_power_state **states, int *n)
327335 {
include/linux/psci.h+2−0
@@ -18,6 +18,8 @@ bool psci_tos_resident_on(int cpu); · 17 unmodified lines
1818
1919 int psci_cpu_suspend_enter(u32 state);
2020 bool psci_power_state_is_valid(u32 state);
21+int psci_set_osi_mode(void);
22+bool psci_has_osi_support(void);
2123
2224 enum smccc_version {
2325 SMCCC_VERSION_1_0,
include/linux/qcom_scm.h+68−51
@@ -1,5 +1,5 @@
11 /* SPDX-License-Identifier: GPL-2.0-only */
2−/* Copyright (c) 2010-2015, 2018, The Linux Foundation. All rights reserved.
2+/* Copyright (c) 2010-2015, 2018-2019 The Linux Foundation. All rights reserved.
33 * Copyright (C) 2015 Linaro Ltd.
44 */
55 #ifndef __QCOM_SCM_H
@@ -55,77 +55,94 @@ enum qcom_scm_sec_dev_id { · 49 unmodified lines
5555 #define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC)
5656
5757 #if IS_ENABLED(CONFIG_QCOM_SCM)
58+extern bool qcom_scm_is_available(void);
59+
5860 extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
5961 extern int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus);
60−extern bool qcom_scm_is_available(void);
61−extern bool qcom_scm_hdcp_available(void);
62−extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
63− u32 *resp);
64−extern bool qcom_scm_ocmem_lock_available(void);
65−extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
66− u32 size, u32 mode);
67−extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset,
68− u32 size);
69−extern bool qcom_scm_pas_supported(u32 peripheral);
62+extern void qcom_scm_cpu_power_down(u32 flags);
63+extern int qcom_scm_set_remote_state(u32 state, u32 id);
64+
7065 extern int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
7166 size_t size);
7267 extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
7368 phys_addr_t size);
7469 extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
7570 extern int qcom_scm_pas_shutdown(u32 peripheral);
76−extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
77− unsigned int *src,
78− const struct qcom_scm_vmperm *newvm,
79− unsigned int dest_cnt);
80−extern void qcom_scm_cpu_power_down(u32 flags);
81−extern u32 qcom_scm_get_version(void);
82−extern int qcom_scm_set_remote_state(u32 state, u32 id);
71+extern bool qcom_scm_pas_supported(u32 peripheral);
72+
73+extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
74+extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
75+
8376 extern bool qcom_scm_restore_sec_cfg_available(void);
8477 extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
8578 extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
8679 extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
80+extern int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
81+ unsigned int *src,
82+ const struct qcom_scm_vmperm *newvm,
83+ unsigned int dest_cnt);
84+
85+extern bool qcom_scm_ocmem_lock_available(void);
86+extern int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
87+ u32 size, u32 mode);
88+extern int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset,
89+ u32 size);
90+
91+extern bool qcom_scm_hdcp_available(void);
92+extern int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
93+ u32 *resp);
94+
8795 extern int qcom_scm_qsmmu500_wait_safe_toggle(bool en);
88−extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
89−extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
9096 #else
9197
9298 #include <linux/errno.h>
9399
94−static inline
95−int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
96−{
97− return -ENODEV;
98−}
99−static inline
100−int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
101−{
102− return -ENODEV;
103−}
104100 static inline bool qcom_scm_is_available(void) { return false; }
105−static inline bool qcom_scm_hdcp_available(void) { return false; }
106−static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
107− u32 *resp) { return -ENODEV; }
108−static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; }
101+
102+static inline int qcom_scm_set_cold_boot_addr(void *entry,
103+ const cpumask_t *cpus) { return -ENODEV; }
104+static inline int qcom_scm_set_warm_boot_addr(void *entry,
105+ const cpumask_t *cpus) { return -ENODEV; }
106+static inline void qcom_scm_cpu_power_down(u32 flags) {}
107+static inline u32 qcom_scm_set_remote_state(u32 state,u32 id)
108+ { return -ENODEV; }
109+
109110 static inline int qcom_scm_pas_init_image(u32 peripheral, const void *metadata,
110− size_t size) { return -ENODEV; }
111+ size_t size) { return -ENODEV; }
111112 static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
112− phys_addr_t size) { return -ENODEV; }
113−static inline int
114−qcom_scm_pas_auth_and_reset(u32 peripheral) { return -ENODEV; }
113+ phys_addr_t size) { return -ENODEV; }
114+static inline int qcom_scm_pas_auth_and_reset(u32 peripheral)
115+ { return -ENODEV; }
115116 static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; }
117+static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; }
118+
119+static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
120+ { return -ENODEV; }
121+static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
122+ { return -ENODEV; }
123+
124+static inline bool qcom_scm_restore_sec_cfg_available(void) { return false; }
125+static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare)
126+ { return -ENODEV; }
127+static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size)
128+ { return -ENODEV; }
129+static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare)
130+ { return -ENODEV; }
116131 static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz,
117− unsigned int *src,
118− const struct qcom_scm_vmperm *newvm,
119− unsigned int dest_cnt) { return -ENODEV; }
120−static inline void qcom_scm_cpu_power_down(u32 flags) {}
121−static inline u32 qcom_scm_get_version(void) { return 0; }
122−static inline u32
123−qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; }
124−static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) { return -ENODEV; }
125−static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) { return -ENODEV; }
126−static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) { return -ENODEV; }
127−static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en) { return -ENODEV; }
128−static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val) { return -ENODEV; }
129−static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val) { return -ENODEV; }
132+ unsigned int *src, const struct qcom_scm_vmperm *newvm,
133+ unsigned int dest_cnt) { return -ENODEV; }
134+
135+static inline bool qcom_scm_ocmem_lock_available(void) { return false; }
136+static inline int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset,
137+ u32 size, u32 mode) { return -ENODEV; }
138+static inline int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id,
139+ u32 offset, u32 size) { return -ENODEV; }
140+
141+static inline bool qcom_scm_hdcp_available(void) { return false; }
142+static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt,
143+ u32 *resp) { return -ENODEV; }
144+
145+static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en)
146+ { return -ENODEV; }
130147 #endif
131148 #endif
include/linux/scmi_protocol.h+4−1
@@ -257,6 +257,7 @@ enum scmi_std_protocol { · 256 unmodified lines
257257 struct scmi_device {
258258 u32 id;
259259 u8 protocol_id;
260+ const char *name;
260261 struct device dev;
261262 struct scmi_handle *handle;
262263 };
@@ -264,11 +265,13 @@ struct scmi_device { · 1 unmodified line
264265 #define to_scmi_dev(d) container_of(d, struct scmi_device, dev)
265266
266267 struct scmi_device *
267−scmi_device_create(struct device_node *np, struct device *parent, int protocol);
268+scmi_device_create(struct device_node *np, struct device *parent, int protocol,
269+ const char *name);
268270 void scmi_device_destroy(struct scmi_device *scmi_dev);
269271
270272 struct scmi_device_id {
271273 u8 protocol_id;
274+ const char *name;
272275 };
273276
274277 struct scmi_driver {
include/linux/soc/samsung/exynos-pmu.h+1−1
@@ -3,7 +3,7 @@ · 2 unmodified lines
33 * Copyright (c) 2014 Samsung Electronics Co., Ltd.
44 * http://www.samsung.com
55 *
6− * Header for EXYNOS PMU Driver support
6+ * Header for Exynos PMU Driver support
77 */
88
99 #ifndef __LINUX_SOC_EXYNOS_PMU_H
include/linux/soc/samsung/exynos-regs-pmu.h+8−8
@@ -3,7 +3,7 @@ · 2 unmodified lines
33 * Copyright (c) 2010-2015 Samsung Electronics Co., Ltd.
44 * http://www.samsung.com
55 *
6− * EXYNOS - Power management unit definition
6+ * Exynos - Power management unit definition
77 *
88 * Notice:
99 * This is not a list of all Exynos Power Management Unit SFRs.
@@ -185,7 +185,7 @@ · 175 unmodified lines
185185 /* Only for S5Pv210 */
186186 #define S5PV210_EINT_WAKEUP_MASK 0xC004
187187
188−/* Only for EXYNOS4210 */
188+/* Only for Exynos4210 */
189189 #define S5P_CMU_CLKSTOP_LCD1_LOWPWR 0x1154
190190 #define S5P_CMU_RESET_LCD1_LOWPWR 0x1174
191191 #define S5P_MODIMIF_MEM_LOWPWR 0x11C4
@@ -193,7 +193,7 @@ · 1 unmodified line
193193 #define S5P_SATA_MEM_LOWPWR 0x11E4
194194 #define S5P_LCD1_LOWPWR 0x1394
195195
196−/* Only for EXYNOS4x12 */
196+/* Only for Exynos4x12 */
197197 #define S5P_ISP_ARM_LOWPWR 0x1050
198198 #define S5P_DIS_IRQ_ISP_ARM_LOCAL_LOWPWR 0x1054
199199 #define S5P_DIS_IRQ_ISP_ARM_CENTRAL_LOWPWR 0x1058
@@ -234,7 +234,7 @@ · 34 unmodified lines
234234 #define S5P_SECSS_MEM_OPTION 0x2EC8
235235 #define S5P_ROTATOR_MEM_OPTION 0x2F48
236236
237−/* Only for EXYNOS4412 */
237+/* Only for Exynos4412 */
238238 #define S5P_ARM_CORE2_LOWPWR 0x1020
239239 #define S5P_DIS_IRQ_CORE2 0x1024
240240 #define S5P_DIS_IRQ_CENTRAL2 0x1028
@@ -242,7 +242,7 @@ · 1 unmodified line
242242 #define S5P_DIS_IRQ_CORE3 0x1034
243243 #define S5P_DIS_IRQ_CENTRAL3 0x1038
244244
245−/* Only for EXYNOS3XXX */
245+/* Only for Exynos3XXX */
246246 #define EXYNOS3_ARM_CORE0_SYS_PWR_REG 0x1000
247247 #define EXYNOS3_DIS_IRQ_ARM_CORE0_LOCAL_SYS_PWR_REG 0x1004
248248 #define EXYNOS3_DIS_IRQ_ARM_CORE0_CENTRAL_SYS_PWR_REG 0x1008
@@ -347,7 +347,7 @@ · 98 unmodified lines
347347 #define EXYNOS3_OPTION_USE_SC_FEEDBACK (1 << 1)
348348 #define EXYNOS3_OPTION_SKIP_DEACTIVATE_ACEACP_IN_PWDN (1 << 7)
349349
350−/* For EXYNOS5 */
350+/* For Exynos5 */
351351
352352 #define EXYNOS5_AUTO_WDTRESET_DISABLE 0x0408
353353 #define EXYNOS5_MASK_WDTRESET_REQUEST 0x040C
@@ -484,7 +484,7 @@ · 130 unmodified lines
484484
485485 #define EXYNOS5420_SWRESET_KFC_SEL 0x3
486486
487−/* Only for EXYNOS5420 */
487+/* Only for Exynos5420 */
488488 #define EXYNOS5420_L2RSTDISABLE_VALUE BIT(3)
489489
490490 #define EXYNOS5420_LPI_MASK 0x0004
@@ -645,7 +645,7 @@ · 154 unmodified lines
645645 | EXYNOS5420_KFC_USE_STANDBY_WFI2 \
646646 | EXYNOS5420_KFC_USE_STANDBY_WFI3)
647647
648−/* For EXYNOS5433 */
648+/* For Exynos5433 */
649649 #define EXYNOS5433_EINT_WAKEUP_MASK (0x060C)
650650 #define EXYNOS5433_USBHOST30_PHY_CONTROL (0x0728)
651651 #define EXYNOS5433_PAD_RETENTION_AUD_OPTION (0x3028)

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