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KVM: PPC: Book3S HV: XIVE: Introduce a new capability KVM_CAP_PPC_IRQ_XIVE

The user interface exposes a new capability KVM_CAP_PPC_IRQ_XIVE to let QEMU connect the vCPU presenters to the XIVE KVM device if required. The capability is not advertised for now as the full support for the XIVE native exploitation mode is not yet available. When this is case, the capability will be advertised on PowerNV Hypervisors only. Nested guests (pseries KVM Hypervisor) are not supported. Internally, the interface to the new KVM device is protected with a new interrupt mode: KVMPPC_IRQ_XIVE.

Cédric Le Goater committed 7 years ago

Commit eacc56b1 parent 90c73798 files · +268 −41Browse files

Unified · Split

8 files
  1. Documentation/virtual/kvm/api.txt +9 −0
  2. arch/powerpc/include/asm/kvm_host.h +1 −0
  3. arch/powerpc/include/asm/kvm_ppc.h +13 −0
  4. arch/powerpc/kvm/book3s_xive.c +47 −41
  5. arch/powerpc/kvm/book3s_xive.h +11 −0
  6. arch/powerpc/kvm/book3s_xive_native.c +150 −0
  7. arch/powerpc/kvm/powerpc.c +36 −0
  8. include/uapi/linux/kvm.h +1 −0
Documentation/virtual/kvm/api.txt+9−0
@@ -4504,6 +4504,15 @@ struct kvm_sync_regs { · 4503 unmodified lines
4504 struct kvm_vcpu_events events;4504 struct kvm_vcpu_events events;
4505};4505};
4506 4506
45076.75 KVM_CAP_PPC_IRQ_XIVE
4508
4509Architectures: ppc
4510Target: vcpu
4511Parameters: args[0] is the XIVE device fd
4512 args[1] is the XIVE CPU number (server ID) for this vcpu
4513
4514This capability connects the vcpu to an in-kernel XIVE device.
4515
45077. Capabilities that can be enabled on VMs45167. Capabilities that can be enabled on VMs
4508------------------------------------------4517------------------------------------------
4509 4518
arch/powerpc/include/asm/kvm_host.h+1−0
@@ -453,6 +453,7 @@ struct kvmppc_passthru_irqmap { · 452 unmodified lines
453#define KVMPPC_IRQ_DEFAULT 0453#define KVMPPC_IRQ_DEFAULT 0
454#define KVMPPC_IRQ_MPIC 1454#define KVMPPC_IRQ_MPIC 1
455#define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */455#define KVMPPC_IRQ_XICS 2 /* Includes a XIVE option */
456#define KVMPPC_IRQ_XIVE 3 /* XIVE native exploitation mode */
456 457
457#define MMIO_HPTE_CACHE_SIZE 4458#define MMIO_HPTE_CACHE_SIZE 4
458 459
arch/powerpc/include/asm/kvm_ppc.h+13−0
@@ -594,6 +594,14 @@ extern int kvmppc_xive_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, · 593 unmodified lines
594 int level, bool line_status);594 int level, bool line_status);
595extern void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu);595extern void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu);
596 596
597static inline int kvmppc_xive_enabled(struct kvm_vcpu *vcpu)
598{
599 return vcpu->arch.irq_type == KVMPPC_IRQ_XIVE;
600}
601
602extern int kvmppc_xive_native_connect_vcpu(struct kvm_device *dev,
603 struct kvm_vcpu *vcpu, u32 cpu);
604extern void kvmppc_xive_native_cleanup_vcpu(struct kvm_vcpu *vcpu);
597extern void kvmppc_xive_native_init_module(void);605extern void kvmppc_xive_native_init_module(void);
598extern void kvmppc_xive_native_exit_module(void);606extern void kvmppc_xive_native_exit_module(void);
599 607
@@ -621,6 +629,11 @@ static inline int kvmppc_xive_set_irq(struct kvm *kvm, int irq_source_id, u32 ir · 21 unmodified lines
621 int level, bool line_status) { return -ENODEV; }629 int level, bool line_status) { return -ENODEV; }
622static inline void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu) { }630static inline void kvmppc_xive_push_vcpu(struct kvm_vcpu *vcpu) { }
623 631
632static inline int kvmppc_xive_enabled(struct kvm_vcpu *vcpu)
633 { return 0; }
634static inline int kvmppc_xive_native_connect_vcpu(struct kvm_device *dev,
635 struct kvm_vcpu *vcpu, u32 cpu) { return -EBUSY; }
636static inline void kvmppc_xive_native_cleanup_vcpu(struct kvm_vcpu *vcpu) { }
624static inline void kvmppc_xive_native_init_module(void) { }637static inline void kvmppc_xive_native_init_module(void) { }
625static inline void kvmppc_xive_native_exit_module(void) { }638static inline void kvmppc_xive_native_exit_module(void) { }
626 639
arch/powerpc/kvm/book3s_xive.c+47−41
@@ -380,11 +380,6 @@ static int xive_select_target(struct kvm *kvm, u32 *server, u8 prio) · 379 unmodified lines
380 return -EBUSY;380 return -EBUSY;
381}381}
382 382
383static u32 xive_vp(struct kvmppc_xive *xive, u32 server)
384{
385 return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
386}
387
388static u8 xive_lock_and_mask(struct kvmppc_xive *xive,383static u8 xive_lock_and_mask(struct kvmppc_xive *xive,
389 struct kvmppc_xive_src_block *sb,384 struct kvmppc_xive_src_block *sb,
390 struct kvmppc_xive_irq_state *state)385 struct kvmppc_xive_irq_state *state)
@@ -430,8 +425,8 @@ static u8 xive_lock_and_mask(struct kvmppc_xive *xive, · 39 unmodified lines
430 */425 */
431 if (xd->flags & OPAL_XIVE_IRQ_MASK_VIA_FW) {426 if (xd->flags & OPAL_XIVE_IRQ_MASK_VIA_FW) {
432 xive_native_configure_irq(hw_num,427 xive_native_configure_irq(hw_num,
433 xive_vp(xive, state->act_server),428 kvmppc_xive_vp(xive, state->act_server),
434 MASKED, state->number);429 MASKED, state->number);
435 /* set old_p so we can track if an H_EOI was done */430 /* set old_p so we can track if an H_EOI was done */
436 state->old_p = true;431 state->old_p = true;
437 state->old_q = false;432 state->old_q = false;
@@ -486,8 +481,8 @@ static void xive_finish_unmask(struct kvmppc_xive *xive, · 48 unmodified lines
486 */481 */
487 if (xd->flags & OPAL_XIVE_IRQ_MASK_VIA_FW) {482 if (xd->flags & OPAL_XIVE_IRQ_MASK_VIA_FW) {
488 xive_native_configure_irq(hw_num,483 xive_native_configure_irq(hw_num,
489 xive_vp(xive, state->act_server),484 kvmppc_xive_vp(xive, state->act_server),
490 state->act_priority, state->number);485 state->act_priority, state->number);
491 /* If an EOI is needed, do it here */486 /* If an EOI is needed, do it here */
492 if (!state->old_p)487 if (!state->old_p)
493 xive_vm_source_eoi(hw_num, xd);488 xive_vm_source_eoi(hw_num, xd);
@@ -563,7 +558,7 @@ static int xive_target_interrupt(struct kvm *kvm, · 69 unmodified lines
563 kvmppc_xive_select_irq(state, &hw_num, NULL);558 kvmppc_xive_select_irq(state, &hw_num, NULL);
564 559
565 return xive_native_configure_irq(hw_num,560 return xive_native_configure_irq(hw_num,
566 xive_vp(xive, server),561 kvmppc_xive_vp(xive, server),
567 prio, state->number);562 prio, state->number);
568}563}
569 564
@@ -951,7 +946,7 @@ int kvmppc_xive_set_mapped(struct kvm *kvm, unsigned long guest_irq, · 381 unmodified lines
951 * which is fine for a never started interrupt.946 * which is fine for a never started interrupt.
952 */947 */
953 xive_native_configure_irq(hw_irq,948 xive_native_configure_irq(hw_irq,
954 xive_vp(xive, state->act_server),949 kvmppc_xive_vp(xive, state->act_server),
955 state->act_priority, state->number);950 state->act_priority, state->number);
956 951
957 /*952 /*
@@ -1027,7 +1022,7 @@ int kvmppc_xive_clr_mapped(struct kvm *kvm, unsigned long guest_irq, · 69 unmodified lines
1027 1022
1028 /* Reconfigure the IPI */1023 /* Reconfigure the IPI */
1029 xive_native_configure_irq(state->ipi_number,1024 xive_native_configure_irq(state->ipi_number,
1030 xive_vp(xive, state->act_server),1025 kvmppc_xive_vp(xive, state->act_server),
1031 state->act_priority, state->number);1026 state->act_priority, state->number);
1032 1027
1033 /*1028 /*
@@ -1049,7 +1044,7 @@ int kvmppc_xive_clr_mapped(struct kvm *kvm, unsigned long guest_irq, · 15 unmodified lines
1049}1044}
1050EXPORT_SYMBOL_GPL(kvmppc_xive_clr_mapped);1045EXPORT_SYMBOL_GPL(kvmppc_xive_clr_mapped);
1051 1046
1052static void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu)1047void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu)
1053{1048{
1054 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;1049 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
1055 struct kvm *kvm = vcpu->kvm;1050 struct kvm *kvm = vcpu->kvm;
@@ -1166,7 +1161,7 @@ int kvmppc_xive_connect_vcpu(struct kvm_device *dev, · 110 unmodified lines
1166 xc->xive = xive;1161 xc->xive = xive;
1167 xc->vcpu = vcpu;1162 xc->vcpu = vcpu;
1168 xc->server_num = cpu;1163 xc->server_num = cpu;
1169 xc->vp_id = xive_vp(xive, cpu);1164 xc->vp_id = kvmppc_xive_vp(xive, cpu);
1170 xc->mfrr = 0xff;1165 xc->mfrr = 0xff;
1171 xc->valid = true;1166 xc->valid = true;
1172 1167
@@ -1883,6 +1878,43 @@ static int kvmppc_xive_create(struct kvm_device *dev, u32 type) · 710 unmodified lines
1883 return 0;1878 return 0;
1884}1879}
1885 1880
1881int kvmppc_xive_debug_show_queues(struct seq_file *m, struct kvm_vcpu *vcpu)
1882{
1883 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
1884 unsigned int i;
1885
1886 for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {
1887 struct xive_q *q = &xc->queues[i];
1888 u32 i0, i1, idx;
1889
1890 if (!q->qpage && !xc->esc_virq[i])
1891 continue;
1892
1893 seq_printf(m, " [q%d]: ", i);
1894
1895 if (q->qpage) {
1896 idx = q->idx;
1897 i0 = be32_to_cpup(q->qpage + idx);
1898 idx = (idx + 1) & q->msk;
1899 i1 = be32_to_cpup(q->qpage + idx);
1900 seq_printf(m, "T=%d %08x %08x...\n", q->toggle,
1901 i0, i1);
1902 }
1903 if (xc->esc_virq[i]) {
1904 struct irq_data *d = irq_get_irq_data(xc->esc_virq[i]);
1905 struct xive_irq_data *xd =
1906 irq_data_get_irq_handler_data(d);
1907 u64 pq = xive_vm_esb_load(xd, XIVE_ESB_GET);
1908
1909 seq_printf(m, "E:%c%c I(%d:%llx:%llx)",
1910 (pq & XIVE_ESB_VAL_P) ? 'P' : 'p',
1911 (pq & XIVE_ESB_VAL_Q) ? 'Q' : 'q',
1912 xc->esc_virq[i], pq, xd->eoi_page);
1913 seq_puts(m, "\n");
1914 }
1915 }
1916 return 0;
1917}
1886 1918
1887static int xive_debug_show(struct seq_file *m, void *private)1919static int xive_debug_show(struct seq_file *m, void *private)
1888{1920{
@@ -1908,7 +1940,6 @@ static int xive_debug_show(struct seq_file *m, void *private) · 19 unmodified lines
1908 1940
1909 kvm_for_each_vcpu(i, vcpu, kvm) {1941 kvm_for_each_vcpu(i, vcpu, kvm) {
1910 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;1942 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
1911 unsigned int i;
1912 1943
1913 if (!xc)1944 if (!xc)
1914 continue;1945 continue;
@@ -1918,33 +1949,8 @@ static int xive_debug_show(struct seq_file *m, void *private) · 3 unmodified lines
1918 xc->server_num, xc->cppr, xc->hw_cppr,1949 xc->server_num, xc->cppr, xc->hw_cppr,
1919 xc->mfrr, xc->pending,1950 xc->mfrr, xc->pending,
1920 xc->stat_rm_h_xirr, xc->stat_vm_h_xirr);1951 xc->stat_rm_h_xirr, xc->stat_vm_h_xirr);
1921 for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {
1922 struct xive_q *q = &xc->queues[i];
1923 u32 i0, i1, idx;
1924 1952
1925 if (!q->qpage && !xc->esc_virq[i])1953 kvmppc_xive_debug_show_queues(m, vcpu);
1926 continue;
1927
1928 seq_printf(m, " [q%d]: ", i);
1929
1930 if (q->qpage) {
1931 idx = q->idx;
1932 i0 = be32_to_cpup(q->qpage + idx);
1933 idx = (idx + 1) & q->msk;
1934 i1 = be32_to_cpup(q->qpage + idx);
1935 seq_printf(m, "T=%d %08x %08x... \n", q->toggle, i0, i1);
1936 }
1937 if (xc->esc_virq[i]) {
1938 struct irq_data *d = irq_get_irq_data(xc->esc_virq[i]);
1939 struct xive_irq_data *xd = irq_data_get_irq_handler_data(d);
1940 u64 pq = xive_vm_esb_load(xd, XIVE_ESB_GET);
1941 seq_printf(m, "E:%c%c I(%d:%llx:%llx)",
1942 (pq & XIVE_ESB_VAL_P) ? 'P' : 'p',
1943 (pq & XIVE_ESB_VAL_Q) ? 'Q' : 'q',
1944 xc->esc_virq[i], pq, xd->eoi_page);
1945 seq_printf(m, "\n");
1946 }
1947 }
1948 1954
1949 t_rm_h_xirr += xc->stat_rm_h_xirr;1955 t_rm_h_xirr += xc->stat_rm_h_xirr;
1950 t_rm_h_ipoll += xc->stat_rm_h_ipoll;1956 t_rm_h_ipoll += xc->stat_rm_h_ipoll;
arch/powerpc/kvm/book3s_xive.h+11−0
@@ -198,6 +198,11 @@ static inline struct kvmppc_xive_src_block *kvmppc_xive_find_source(struct kvmpp · 197 unmodified lines
198 return xive->src_blocks[bid];198 return xive->src_blocks[bid];
199}199}
200 200
201static inline u32 kvmppc_xive_vp(struct kvmppc_xive *xive, u32 server)
202{
203 return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
204}
205
201/*206/*
202 * Mapping between guest priorities and host priorities207 * Mapping between guest priorities and host priorities
203 * is as follow.208 * is as follow.
@@ -248,5 +253,11 @@ extern int (*__xive_vm_h_ipi)(struct kvm_vcpu *vcpu, unsigned long server, · 44 unmodified lines
248extern int (*__xive_vm_h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr);253extern int (*__xive_vm_h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr);
249extern int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr);254extern int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr);
250 255
256/*
257 * Common Xive routines for XICS-over-XIVE and XIVE native
258 */
259void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu);
260int kvmppc_xive_debug_show_queues(struct seq_file *m, struct kvm_vcpu *vcpu);
261
251#endif /* CONFIG_KVM_XICS */262#endif /* CONFIG_KVM_XICS */
252#endif /* _KVM_PPC_BOOK3S_XICS_H */263#endif /* _KVM_PPC_BOOK3S_XICS_H */
arch/powerpc/kvm/book3s_xive_native.c+150−0
@@ -26,6 +26,134 @@ · 25 unmodified lines
26 26
27#include "book3s_xive.h"27#include "book3s_xive.h"
28 28
29static void kvmppc_xive_native_cleanup_queue(struct kvm_vcpu *vcpu, int prio)
30{
31 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
32 struct xive_q *q = &xc->queues[prio];
33
34 xive_native_disable_queue(xc->vp_id, q, prio);
35 if (q->qpage) {
36 put_page(virt_to_page(q->qpage));
37 q->qpage = NULL;
38 }
39}
40
41void kvmppc_xive_native_cleanup_vcpu(struct kvm_vcpu *vcpu)
42{
43 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
44 int i;
45
46 if (!kvmppc_xive_enabled(vcpu))
47 return;
48
49 if (!xc)
50 return;
51
52 pr_devel("native_cleanup_vcpu(cpu=%d)\n", xc->server_num);
53
54 /* Ensure no interrupt is still routed to that VP */
55 xc->valid = false;
56 kvmppc_xive_disable_vcpu_interrupts(vcpu);
57
58 /* Disable the VP */
59 xive_native_disable_vp(xc->vp_id);
60
61 /* Free the queues & associated interrupts */
62 for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {
63 /* Free the escalation irq */
64 if (xc->esc_virq[i]) {
65 free_irq(xc->esc_virq[i], vcpu);
66 irq_dispose_mapping(xc->esc_virq[i]);
67 kfree(xc->esc_virq_names[i]);
68 xc->esc_virq[i] = 0;
69 }
70
71 /* Free the queue */
72 kvmppc_xive_native_cleanup_queue(vcpu, i);
73 }
74
75 /* Free the VP */
76 kfree(xc);
77
78 /* Cleanup the vcpu */
79 vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
80 vcpu->arch.xive_vcpu = NULL;
81}
82
83int kvmppc_xive_native_connect_vcpu(struct kvm_device *dev,
84 struct kvm_vcpu *vcpu, u32 server_num)
85{
86 struct kvmppc_xive *xive = dev->private;
87 struct kvmppc_xive_vcpu *xc = NULL;
88 int rc;
89
90 pr_devel("native_connect_vcpu(server=%d)\n", server_num);
91
92 if (dev->ops != &kvm_xive_native_ops) {
93 pr_devel("Wrong ops !\n");
94 return -EPERM;
95 }
96 if (xive->kvm != vcpu->kvm)
97 return -EPERM;
98 if (vcpu->arch.irq_type != KVMPPC_IRQ_DEFAULT)
99 return -EBUSY;
100 if (server_num >= KVM_MAX_VCPUS) {
101 pr_devel("Out of bounds !\n");
102 return -EINVAL;
103 }
104
105 mutex_lock(&vcpu->kvm->lock);
106
107 if (kvmppc_xive_find_server(vcpu->kvm, server_num)) {
108 pr_devel("Duplicate !\n");
109 rc = -EEXIST;
110 goto bail;
111 }
112
113 xc = kzalloc(sizeof(*xc), GFP_KERNEL);
114 if (!xc) {
115 rc = -ENOMEM;
116 goto bail;
117 }
118
119 vcpu->arch.xive_vcpu = xc;
120 xc->xive = xive;
121 xc->vcpu = vcpu;
122 xc->server_num = server_num;
123
124 xc->vp_id = kvmppc_xive_vp(xive, server_num);
125 xc->valid = true;
126 vcpu->arch.irq_type = KVMPPC_IRQ_XIVE;
127
128 rc = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id);
129 if (rc) {
130 pr_err("Failed to get VP info from OPAL: %d\n", rc);
131 goto bail;
132 }
133
134 /*
135 * Enable the VP first as the single escalation mode will
136 * affect escalation interrupts numbering
137 */
138 rc = xive_native_enable_vp(xc->vp_id, xive->single_escalation);
139 if (rc) {
140 pr_err("Failed to enable VP in OPAL: %d\n", rc);
141 goto bail;
142 }
143
144 /* Configure VCPU fields for use by assembly push/pull */
145 vcpu->arch.xive_saved_state.w01 = cpu_to_be64(0xff000000);
146 vcpu->arch.xive_cam_word = cpu_to_be32(xc->vp_cam | TM_QW1W2_VO);
147
148 /* TODO: reset all queues to a clean state ? */
149bail:
150 mutex_unlock(&vcpu->kvm->lock);
151 if (rc)
152 kvmppc_xive_native_cleanup_vcpu(vcpu);
153
154 return rc;
155}
156
29static int kvmppc_xive_native_set_attr(struct kvm_device *dev,157static int kvmppc_xive_native_set_attr(struct kvm_device *dev,
30 struct kvm_device_attr *attr)158 struct kvm_device_attr *attr)
31{159{
@@ -114,10 +242,32 @@ static int xive_native_debug_show(struct seq_file *m, void *private) · 82 unmodified lines
114{242{
115 struct kvmppc_xive *xive = m->private;243 struct kvmppc_xive *xive = m->private;
116 struct kvm *kvm = xive->kvm;244 struct kvm *kvm = xive->kvm;
245 struct kvm_vcpu *vcpu;
246 unsigned int i;
117 247
118 if (!kvm)248 if (!kvm)
119 return 0;249 return 0;
120 250
251 seq_puts(m, "=========\nVCPU state\n=========\n");
252
253 kvm_for_each_vcpu(i, vcpu, kvm) {
254 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
255
256 if (!xc)
257 continue;
258
259 seq_printf(m, "cpu server %#x NSR=%02x CPPR=%02x IBP=%02x PIPR=%02x w01=%016llx w2=%08x\n",
260 xc->server_num,
261 vcpu->arch.xive_saved_state.nsr,
262 vcpu->arch.xive_saved_state.cppr,
263 vcpu->arch.xive_saved_state.ipb,
264 vcpu->arch.xive_saved_state.pipr,
265 vcpu->arch.xive_saved_state.w01,
266 (u32) vcpu->arch.xive_cam_word);
267
268 kvmppc_xive_debug_show_queues(m, vcpu);
269 }
270
121 return 0;271 return 0;
122}272}
123 273
arch/powerpc/kvm/powerpc.c+36−0
@@ -570,6 +570,15 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) · 569 unmodified lines
570 case KVM_CAP_PPC_GET_CPU_CHAR:570 case KVM_CAP_PPC_GET_CPU_CHAR:
571 r = 1;571 r = 1;
572 break;572 break;
573#ifdef CONFIG_KVM_XIVE
574 case KVM_CAP_PPC_IRQ_XIVE:
575 /*
576 * Return false until all the XIVE infrastructure is
577 * in place including support for migration.
578 */
579 r = 0;
580 break;
581#endif
573 582
574 case KVM_CAP_PPC_ALLOC_HTAB:583 case KVM_CAP_PPC_ALLOC_HTAB:
575 r = hv_enabled;584 r = hv_enabled;
@@ -753,6 +762,9 @@ void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) · 177 unmodified lines
753 else762 else
754 kvmppc_xics_free_icp(vcpu);763 kvmppc_xics_free_icp(vcpu);
755 break;764 break;
765 case KVMPPC_IRQ_XIVE:
766 kvmppc_xive_native_cleanup_vcpu(vcpu);
767 break;
756 }768 }
757 769
758 kvmppc_core_vcpu_free(vcpu);770 kvmppc_core_vcpu_free(vcpu);
@@ -1941,6 +1953,30 @@ static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, · 1182 unmodified lines
1941 break;1953 break;
1942 }1954 }
1943#endif /* CONFIG_KVM_XICS */1955#endif /* CONFIG_KVM_XICS */
1956#ifdef CONFIG_KVM_XIVE
1957 case KVM_CAP_PPC_IRQ_XIVE: {
1958 struct fd f;
1959 struct kvm_device *dev;
1960
1961 r = -EBADF;
1962 f = fdget(cap->args[0]);
1963 if (!f.file)
1964 break;
1965
1966 r = -ENXIO;
1967 if (!xive_enabled())
1968 break;
1969
1970 r = -EPERM;
1971 dev = kvm_device_from_filp(f.file);
1972 if (dev)
1973 r = kvmppc_xive_native_connect_vcpu(dev, vcpu,
1974 cap->args[1]);
1975
1976 fdput(f);
1977 break;
1978 }
1979#endif /* CONFIG_KVM_XIVE */
1944#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE1980#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
1945 case KVM_CAP_PPC_FWNMI:1981 case KVM_CAP_PPC_FWNMI:
1946 r = -EINVAL;1982 r = -EINVAL;
include/uapi/linux/kvm.h+1−0
@@ -988,6 +988,7 @@ struct kvm_ppc_resize_hpt { · 987 unmodified lines
988#define KVM_CAP_ARM_VM_IPA_SIZE 165988#define KVM_CAP_ARM_VM_IPA_SIZE 165
989#define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166989#define KVM_CAP_MANUAL_DIRTY_LOG_PROTECT 166
990#define KVM_CAP_HYPERV_CPUID 167990#define KVM_CAP_HYPERV_CPUID 167
991#define KVM_CAP_PPC_IRQ_XIVE 168
991 992
992#ifdef KVM_CAP_IRQ_ROUTING993#ifdef KVM_CAP_IRQ_ROUTING
993 994