Conflicts: arch/x86/kernel/traps.c
Unified · Split
| @@ -117,7 +117,7 @@ Description: · 116 unmodified lines | ||
| 117 | 117 | |
| 118 | 118 | What: /sys/bus/pci/devices/.../vpd |
| 119 | 119 | Date: February 2008 |
| 120 | −Contact: Ben Hutchings <bhutchings@solarflare.com> | |
| 120 | +Contact: Ben Hutchings <bwh@kernel.org> | |
| 121 | 121 | Description: |
| 122 | 122 | A file named vpd in a device directory will be a |
| 123 | 123 | binary file containing the Vital Product Data for the |
| @@ -79,7 +79,7 @@ · 78 unmodified lines | ||
| 79 | 79 | <partintro> |
| 80 | 80 | <para> |
| 81 | 81 | This first part of the DRM Developer's Guide documents core DRM code, |
| 82 | − helper libraries for writting drivers and generic userspace interfaces | |
| 82 | + helper libraries for writing drivers and generic userspace interfaces | |
| 83 | 83 | exposed by DRM drivers. |
| 84 | 84 | </para> |
| 85 | 85 | </partintro> |
| @@ -459,7 +459,7 @@ char *date;</synopsis> · 373 unmodified lines | ||
| 459 | 459 | providing a solution to every graphics memory-related problems, GEM |
| 460 | 460 | identified common code between drivers and created a support library to |
| 461 | 461 | share it. GEM has simpler initialization and execution requirements than |
| 462 | − TTM, but has no video RAM management capabitilies and is thus limited to | |
| 462 | + TTM, but has no video RAM management capabilities and is thus limited to | |
| 463 | 463 | UMA devices. |
| 464 | 464 | </para> |
| 465 | 465 | <sect2> |
| @@ -889,7 +889,7 @@ int (*prime_fd_to_handle)(struct drm_device *dev, · 423 unmodified lines | ||
| 889 | 889 | vice versa. Drivers must use the kernel dma-buf buffer sharing framework |
| 890 | 890 | to manage the PRIME file descriptors. Similar to the mode setting |
| 891 | 891 | API PRIME is agnostic to the underlying buffer object manager, as |
| 892 | − long as handles are 32bit unsinged integers. | |
| 892 | + long as handles are 32bit unsigned integers. | |
| 893 | 893 | </para> |
| 894 | 894 | <para> |
| 895 | 895 | While non-GEM drivers must implement the operations themselves, GEM |
| @@ -2356,7 +2356,7 @@ void intel_crt_init(struct drm_device *dev) · 1460 unmodified lines | ||
| 2356 | 2356 | first create properties and then create and associate individual instances |
| 2357 | 2357 | of those properties to objects. A property can be instantiated multiple |
| 2358 | 2358 | times and associated with different objects. Values are stored in property |
| 2359 | − instances, and all other property information are stored in the propery | |
| 2359 | + instances, and all other property information are stored in the property | |
| 2360 | 2360 | and shared between all instances of the property. |
| 2361 | 2361 | </para> |
| 2362 | 2362 | <para> |
| @@ -2697,10 +2697,10 @@ int num_ioctls;</synopsis> · 334 unmodified lines | ||
| 2697 | 2697 | <sect1> |
| 2698 | 2698 | <title>Legacy Support Code</title> |
| 2699 | 2699 | <para> |
| 2700 | − The section very brievely covers some of the old legacy support code which | |
| 2700 | + The section very briefly covers some of the old legacy support code which | |
| 2701 | 2701 | is only used by old DRM drivers which have done a so-called shadow-attach |
| 2702 | 2702 | to the underlying device instead of registering as a real driver. This |
| 2703 | − also includes some of the old generic buffer mangement and command | |
| 2703 | + also includes some of the old generic buffer management and command | |
| 2704 | 2704 | submission code. Do not use any of this in new and modern drivers. |
| 2705 | 2705 | </para> |
| 2706 | 2706 | |
| @@ -195,7 +195,7 @@ DVB_DOCUMENTED = \ · 194 unmodified lines | ||
| 195 | 195 | # |
| 196 | 196 | |
| 197 | 197 | install_media_images = \ |
| 198 | − $(Q)cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api | |
| 198 | + $(Q)-cp $(OBJIMGFILES) $(MEDIA_SRC_DIR)/v4l/*.svg $(MEDIA_OBJ_DIR)/media_api | |
| 199 | 199 | |
| 200 | 200 | $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64 |
| 201 | 201 | $(Q)base64 -d $< >$@ |
| @@ -25,9 +25,11 @@ using data transfer rates in the order of 10MB/s or more. · 24 unmodified lines | ||
| 25 | 25 | With most FireWire controllers, memory access is limited to the low 4 GB |
| 26 | 26 | of physical address space. This can be a problem on IA64 machines where |
| 27 | 27 | memory is located mostly above that limit, but it is rarely a problem on |
| 28 | −more common hardware such as x86, x86-64 and PowerPC. However, at least | |
| 29 | −Agere/LSI FW643e and FW643e2 controllers are known to support access to | |
| 30 | −physical addresses above 4 GB. | |
| 28 | +more common hardware such as x86, x86-64 and PowerPC. | |
| 29 | + | |
| 30 | +At least LSI FW643e and FW643e2 controllers are known to support access to | |
| 31 | +physical addresses above 4 GB, but this feature is currently not enabled by | |
| 32 | +Linux. | |
| 31 | 33 | |
| 32 | 34 | Together with a early initialization of the OHCI-1394 controller for debugging, |
| 33 | 35 | this facility proved most useful for examining long debugs logs in the printk |
| @@ -101,8 +103,9 @@ Step-by-step instructions for using firescope with early OHCI initialization: · 67 unmodified lines | ||
| 101 | 103 | compliant, they are based on TI PCILynx chips and require drivers for Win- |
| 102 | 104 | dows operating systems. |
| 103 | 105 | |
| 104 | − The mentioned kernel log message contains ">4 GB phys DMA" in case of | |
| 105 | − OHCI-1394 controllers which support accesses above this limit. | |
| 106 | + The mentioned kernel log message contains the string "physUB" if the | |
| 107 | + controller implements a writable Physical Upper Bound register. This is | |
| 108 | + required for physical DMA above 4 GB (but not utilized by Linux yet). | |
| 106 | 109 | |
| 107 | 110 | 2) Establish a working FireWire cable connection: |
| 108 | 111 | |
| @@ -309,7 +309,10 @@ ii) Status · 308 unmodified lines | ||
| 309 | 309 | error_if_no_space|queue_if_no_space |
| 310 | 310 | If the pool runs out of data or metadata space, the pool will |
| 311 | 311 | either queue or error the IO destined to the data device. The |
| 312 | − default is to queue the IO until more space is added. | |
| 312 | + default is to queue the IO until more space is added or the | |
| 313 | + 'no_space_timeout' expires. The 'no_space_timeout' dm-thin-pool | |
| 314 | + module parameter can be used to change this timeout -- it | |
| 315 | + defaults to 60 seconds but may be disabled using a value of 0. | |
| 313 | 316 | |
| 314 | 317 | iii) Messages |
| 315 | 318 | |
| @@ -62,7 +62,7 @@ Required properties for PMC node: · 61 unmodified lines | ||
| 62 | 62 | - interrupt-controller : tell that the PMC is an interrupt controller. |
| 63 | 63 | - #interrupt-cells : must be set to 1. The first cell encodes the interrupt id, |
| 64 | 64 | and reflect the bit position in the PMC_ER/DR/SR registers. |
| 65 | − You can use the dt macros defined in dt-bindings/clk/at91.h. | |
| 65 | + You can use the dt macros defined in dt-bindings/clock/at91.h. | |
| 66 | 66 | 0 (AT91_PMC_MOSCS) -> main oscillator ready |
| 67 | 67 | 1 (AT91_PMC_LOCKA) -> PLL A ready |
| 68 | 68 | 2 (AT91_PMC_LOCKB) -> PLL B ready |
| @@ -43,7 +43,7 @@ Example · 42 unmodified lines | ||
| 43 | 43 | clock-output-names = |
| 44 | 44 | "tpu0", "mmcif1", "sdhi3", "sdhi2", |
| 45 | 45 | "sdhi1", "sdhi0", "mmcif0"; |
| 46 | − renesas,clock-indices = < | |
| 46 | + clock-indices = < | |
| 47 | 47 | R8A7790_CLK_TPU0 R8A7790_CLK_MMCIF1 R8A7790_CLK_SDHI3 |
| 48 | 48 | R8A7790_CLK_SDHI2 R8A7790_CLK_SDHI1 R8A7790_CLK_SDHI0 |
| 49 | 49 | R8A7790_CLK_MMCIF0 |
| @@ -29,6 +29,6 @@ edma: edma@49000000 { · 28 unmodified lines | ||
| 29 | 29 | dma-channels = <64>; |
| 30 | 30 | ti,edma-regions = <4>; |
| 31 | 31 | ti,edma-slots = <256>; |
| 32 | − ti,edma-xbar-event-map = <1 12 | |
| 33 | − 2 13>; | |
| 32 | + ti,edma-xbar-event-map = /bits/ 16 <1 12 | |
| 33 | + 2 13>; | |
| 34 | 34 | }; |
| @@ -14,7 +14,7 @@ node. · 13 unmodified lines | ||
| 14 | 14 | Example: |
| 15 | 15 | |
| 16 | 16 | aliases { |
| 17 | − mdio-gpio0 = <&mdio0>; | |
| 17 | + mdio-gpio0 = &mdio0; | |
| 18 | 18 | }; |
| 19 | 19 | |
| 20 | 20 | mdio0: mdio { |
| @@ -201,20 +201,15 @@ To beat some sense out of the internal editor, do this: · 200 unmodified lines | ||
| 201 | 201 | |
| 202 | 202 | - Edit your Thunderbird config settings so that it won't use format=flowed. |
| 203 | 203 | Go to "edit->preferences->advanced->config editor" to bring up the |
| 204 | − thunderbird's registry editor, and set "mailnews.send_plaintext_flowed" to | |
| 205 | − "false". | |
| 204 | + thunderbird's registry editor. | |
| 206 | 205 | |
| 207 | −- Disable HTML Format: Set "mail.identity.id1.compose_html" to "false". | |
| 206 | +- Set "mailnews.send_plaintext_flowed" to "false" | |
| 208 | 207 | |
| 209 | −- Enable "preformat" mode: Set "editor.quotesPreformatted" to "true". | |
| 208 | +- Set "mailnews.wraplength" from "72" to "0" | |
| 210 | 209 | |
| 211 | −- Enable UTF8: Set "prefs.converted-to-utf8" to "true". | |
| 210 | +- "View" > "Message Body As" > "Plain Text" | |
| 212 | 211 | |
| 213 | −- Install the "toggle wordwrap" extension. Download the file from: | |
| 214 | − https://addons.mozilla.org/thunderbird/addon/2351/ | |
| 215 | − Then go to "tools->add ons", select "install" at the bottom of the screen, | |
| 216 | − and browse to where you saved the .xul file. This adds an "Enable | |
| 217 | − Wordwrap" entry under the Options menu of the message composer. | |
| 212 | +- "View" > "Character Encoding" > "Unicode (UTF-8)" | |
| 218 | 213 | |
| 219 | 214 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 220 | 215 | TkRat (GUI) |
| @@ -1245,8 +1245,9 @@ second). The meanings of the columns are as follows, from left to right: · 1244 unmodified lines | ||
| 1245 | 1245 | |
| 1246 | 1246 | The "intr" line gives counts of interrupts serviced since boot time, for each |
| 1247 | 1247 | of the possible system interrupts. The first column is the total of all |
| 1248 | −interrupts serviced; each subsequent column is the total for that particular | |
| 1249 | −interrupt. | |
| 1248 | +interrupts serviced including unnumbered architecture specific interrupts; | |
| 1249 | +each subsequent column is the total for that particular numbered interrupt. | |
| 1250 | +Unnumbered interrupts are not shown, only summed into the total. | |
| 1250 | 1251 | |
| 1251 | 1252 | The "ctxt" line gives the total number of context switches across all CPUs. |
| 1252 | 1253 | |
| @@ -327,6 +327,13 @@ temp[1-*]_max_hyst · 326 unmodified lines | ||
| 327 | 327 | from the max value. |
| 328 | 328 | RW |
| 329 | 329 | |
| 330 | +temp[1-*]_min_hyst | |
| 331 | + Temperature hysteresis value for min limit. | |
| 332 | + Unit: millidegree Celsius | |
| 333 | + Must be reported as an absolute temperature, NOT a delta | |
| 334 | + from the min value. | |
| 335 | + RW | |
| 336 | + | |
| 330 | 337 | temp[1-*]_input Temperature input value. |
| 331 | 338 | Unit: millidegree Celsius |
| 332 | 339 | RO |
| @@ -362,6 +369,13 @@ temp[1-*]_lcrit Temperature critical min value, typically lower than · 29 unmodified lines | ||
| 362 | 369 | Unit: millidegree Celsius |
| 363 | 370 | RW |
| 364 | 371 | |
| 372 | +temp[1-*]_lcrit_hyst | |
| 373 | + Temperature hysteresis value for critical min limit. | |
| 374 | + Unit: millidegree Celsius | |
| 375 | + Must be reported as an absolute temperature, NOT a delta | |
| 376 | + from the critical min value. | |
| 377 | + RW | |
| 378 | + | |
| 365 | 379 | temp[1-*]_offset |
| 366 | 380 | Temperature offset which is added to the temperature reading |
| 367 | 381 | by the chip. |
| @@ -504,9 +504,12 @@ byte 5: · 503 unmodified lines | ||
| 504 | 504 | * reg_10 |
| 505 | 505 | |
| 506 | 506 | bit 7 6 5 4 3 2 1 0 |
| 507 | − 0 0 0 0 0 0 0 A | |
| 507 | + 0 0 0 0 R F T A | |
| 508 | 508 | |
| 509 | 509 | A: 1 = enable absolute tracking |
| 510 | + T: 1 = enable two finger mode auto correct | |
| 511 | + F: 1 = disable ABS Position Filter | |
| 512 | + R: 1 = enable real hardware resolution | |
| 510 | 513 | |
| 511 | 514 | 6.2 Native absolute mode 6 byte packet format |
| 512 | 515 | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| @@ -188,6 +188,9 @@ shift · 187 unmodified lines | ||
| 188 | 188 | #define CP_METHODREF 10 |
| 189 | 189 | #define CP_INTERFACEMETHODREF 11 |
| 190 | 190 | #define CP_NAMEANDTYPE 12 |
| 191 | +#define CP_METHODHANDLE 15 | |
| 192 | +#define CP_METHODTYPE 16 | |
| 193 | +#define CP_INVOKEDYNAMIC 18 | |
| 191 | 194 | |
| 192 | 195 | /* Define some commonly used error messages */ |
| 193 | 196 | |
| @@ -242,14 +245,19 @@ void skip_constant(FILE *classfile, u_int16_t *cur) · 48 unmodified lines | ||
| 242 | 245 | break; |
| 243 | 246 | case CP_CLASS: |
| 244 | 247 | case CP_STRING: |
| 248 | + case CP_METHODTYPE: | |
| 245 | 249 | seekerr = fseek(classfile, 2, SEEK_CUR); |
| 246 | 250 | break; |
| 251 | + case CP_METHODHANDLE: | |
| 252 | + seekerr = fseek(classfile, 3, SEEK_CUR); | |
| 253 | + break; | |
| 247 | 254 | case CP_INTEGER: |
| 248 | 255 | case CP_FLOAT: |
| 249 | 256 | case CP_FIELDREF: |
| 250 | 257 | case CP_METHODREF: |
| 251 | 258 | case CP_INTERFACEMETHODREF: |
| 252 | 259 | case CP_NAMEANDTYPE: |
| 260 | + case CP_INVOKEDYNAMIC: | |
| 253 | 261 | seekerr = fseek(classfile, 4, SEEK_CUR); |
| 254 | 262 | break; |
| 255 | 263 | case CP_LONG: |
| @@ -2218,10 +2218,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. · 2217 unmodified lines | ||
| 2218 | 2218 | noreplace-smp [X86-32,SMP] Don't replace SMP instructions |
| 2219 | 2219 | with UP alternatives |
| 2220 | 2220 | |
| 2221 | − nordrand [X86] Disable the direct use of the RDRAND | |
| 2222 | − instruction even if it is supported by the | |
| 2223 | − processor. RDRAND is still available to user | |
| 2224 | − space applications. | |
| 2221 | + nordrand [X86] Disable kernel use of the RDRAND and | |
| 2222 | + RDSEED instructions even if they are supported | |
| 2223 | + by the processor. RDRAND and RDSEED are still | |
| 2224 | + available to user space applications. | |
| 2225 | 2225 | |
| 2226 | 2226 | noresume [SWSUSP] Disables resume and restores original swap |
| 2227 | 2227 | space. |
| @@ -277,7 +277,7 @@ Possible BPF extensions are shown in the following table: · 276 unmodified lines | ||
| 277 | 277 | mark skb->mark |
| 278 | 278 | queue skb->queue_mapping |
| 279 | 279 | hatype skb->dev->type |
| 280 | − rxhash skb->rxhash | |
| 280 | + rxhash skb->hash | |
| 281 | 281 | cpu raw_smp_processor_id() |
| 282 | 282 | vlan_tci vlan_tx_tag_get(skb) |
| 283 | 283 | vlan_pr vlan_tx_tag_present(skb) |
| @@ -578,7 +578,7 @@ processes. This also works in combination with mmap(2) on packet sockets. · 577 unmodified lines | ||
| 578 | 578 | |
| 579 | 579 | Currently implemented fanout policies are: |
| 580 | 580 | |
| 581 | − - PACKET_FANOUT_HASH: schedule to socket by skb's rxhash | |
| 581 | + - PACKET_FANOUT_HASH: schedule to socket by skb's packet hash | |
| 582 | 582 | - PACKET_FANOUT_LB: schedule to socket by round-robin |
| 583 | 583 | - PACKET_FANOUT_CPU: schedule to socket by CPU packet arrives on |
| 584 | 584 | - PACKET_FANOUT_RND: schedule to socket by random selection |
| @@ -2126,7 +2126,7 @@ into the hash PTE second double word). · 2125 unmodified lines | ||
| 2126 | 2126 | 4.75 KVM_IRQFD |
| 2127 | 2127 | |
| 2128 | 2128 | Capability: KVM_CAP_IRQFD |
| 2129 | −Architectures: x86 | |
| 2129 | +Architectures: x86 s390 | |
| 2130 | 2130 | Type: vm ioctl |
| 2131 | 2131 | Parameters: struct kvm_irqfd (in) |
| 2132 | 2132 | Returns: 0 on success, -1 on error |
| @@ -537,7 +537,7 @@ L: linux-alpha@vger.kernel.org · 536 unmodified lines | ||
| 537 | 537 | F: arch/alpha/ |
| 538 | 538 | |
| 539 | 539 | ALTERA TRIPLE SPEED ETHERNET DRIVER |
| 540 | −M: Vince Bridgers <vbridgers2013@gmail.com | |
| 540 | +M: Vince Bridgers <vbridgers2013@gmail.com> | |
| 541 | 541 | L: netdev@vger.kernel.org |
| 542 | 542 | L: nios2-dev@lists.rocketboards.org (moderated for non-subscribers) |
| 543 | 543 | S: Maintained |
| @@ -1893,14 +1893,15 @@ L: netdev@vger.kernel.org · 1349 unmodified lines | ||
| 1893 | 1893 | S: Supported |
| 1894 | 1894 | F: drivers/net/ethernet/broadcom/bnx2x/ |
| 1895 | 1895 | |
| 1896 | −BROADCOM BCM281XX/BCM11XXX ARM ARCHITECTURE | |
| 1896 | +BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE | |
| 1897 | 1897 | M: Christian Daudt <bcm@fixthebug.org> |
| 1898 | 1898 | M: Matt Porter <mporter@linaro.org> |
| 1899 | 1899 | L: bcm-kernel-feedback-list@broadcom.com |
| 1900 | −T: git git://git.github.com/broadcom/bcm11351 | |
| 1900 | +T: git git://github.com/broadcom/mach-bcm | |
| 1901 | 1901 | S: Maintained |
| 1902 | 1902 | F: arch/arm/mach-bcm/ |
| 1903 | 1903 | F: arch/arm/boot/dts/bcm113* |
| 1904 | +F: arch/arm/boot/dts/bcm216* | |
| 1904 | 1905 | F: arch/arm/boot/dts/bcm281* |
| 1905 | 1906 | F: arch/arm/configs/bcm_defconfig |
| 1906 | 1907 | F: drivers/mmc/host/sdhci_bcm_kona.c |
| @@ -2245,12 +2246,6 @@ L: linux-usb@vger.kernel.org · 338 unmodified lines | ||
| 2245 | 2246 | S: Maintained |
| 2246 | 2247 | F: drivers/usb/host/ohci-ep93xx.c |
| 2247 | 2248 | |
| 2248 | −CIRRUS LOGIC CS4270 SOUND DRIVER | |
| 2249 | −M: Timur Tabi <timur@tabi.org> | |
| 2250 | −L: alsa-devel@alsa-project.org (moderated for non-subscribers) | |
| 2251 | −S: Odd Fixes | |
| 2252 | −F: sound/soc/codecs/cs4270* | |
| 2253 | − | |
| 2254 | 2249 | CIRRUS LOGIC AUDIO CODEC DRIVERS |
| 2255 | 2250 | M: Brian Austin <brian.austin@cirrus.com> |
| 2256 | 2251 | M: Paul Handrigan <Paul.Handrigan@cirrus.com> |
| @@ -4818,6 +4813,14 @@ L: linux-kernel@vger.kernel.org · 2561 unmodified lines | ||
| 4818 | 4813 | S: Maintained |
| 4819 | 4814 | T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core |
| 4820 | 4815 | F: kernel/irq/ |
| 4816 | + | |
| 4817 | +IRQCHIP DRIVERS | |
| 4818 | +M: Thomas Gleixner <tglx@linutronix.de> | |
| 4819 | +M: Jason Cooper <jason@lakedaemon.net> | |
| 4820 | +L: linux-kernel@vger.kernel.org | |
| 4821 | +S: Maintained | |
| 4822 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core | |
| 4823 | +T: git git://git.infradead.org/users/jcooper/linux.git irqchip/core | |
| 4821 | 4824 | F: drivers/irqchip/ |
| 4822 | 4825 | |
| 4823 | 4826 | IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY) |
| @@ -5490,15 +5493,15 @@ F: Documentation/hwmon/ltc4261 · 666 unmodified lines | ||
| 5490 | 5493 | F: drivers/hwmon/ltc4261.c |
| 5491 | 5494 | |
| 5492 | 5495 | LTP (Linux Test Project) |
| 5493 | −M: Shubham Goyal <shubham@linux.vnet.ibm.com> | |
| 5494 | 5496 | M: Mike Frysinger <vapier@gentoo.org> |
| 5495 | 5497 | M: Cyril Hrubis <chrubis@suse.cz> |
| 5496 | −M: Caspar Zhang <caspar@casparzhang.com> | |
| 5497 | 5498 | M: Wanlong Gao <gaowanlong@cn.fujitsu.com> |
| 5499 | +M: Jan Stancek <jstancek@redhat.com> | |
| 5500 | +M: Stanislav Kholmanskikh <stanislav.kholmanskikh@oracle.com> | |
| 5501 | +M: Alexey Kodanev <alexey.kodanev@oracle.com> | |
| 5498 | 5502 | L: ltp-list@lists.sourceforge.net (subscribers-only) |
| 5499 | −W: http://ltp.sourceforge.net/ | |
| 5503 | +W: http://linux-test-project.github.io/ | |
| 5500 | 5504 | T: git git://github.com/linux-test-project/ltp.git |
| 5501 | −T: git git://ltp.git.sourceforge.net/gitroot/ltp/ltp-dev | |
| 5502 | 5505 | S: Maintained |
| 5503 | 5506 | |
| 5504 | 5507 | M32R ARCHITECTURE |
| @@ -6511,10 +6514,10 @@ T: git git://openrisc.net/~jonas/linux · 1006 unmodified lines | ||
| 6511 | 6514 | F: arch/openrisc/ |
| 6512 | 6515 | |
| 6513 | 6516 | OPENVSWITCH |
| 6514 | −M: Jesse Gross <jesse@nicira.com> | |
| 6517 | +M: Pravin Shelar <pshelar@nicira.com> | |
| 6515 | 6518 | L: dev@openvswitch.org |
| 6516 | 6519 | W: http://openvswitch.org |
| 6517 | −T: git git://git.kernel.org/pub/scm/linux/kernel/git/jesse/openvswitch.git | |
| 6520 | +T: git git://git.kernel.org/pub/scm/linux/kernel/git/pshelar/openvswitch.git | |
| 6518 | 6521 | S: Maintained |
| 6519 | 6522 | F: net/openvswitch/ |
| 6520 | 6523 | |
| @@ -7402,6 +7405,14 @@ F: drivers/rpmsg/ · 881 unmodified lines | ||
| 7402 | 7405 | F: Documentation/rpmsg.txt |
| 7403 | 7406 | F: include/linux/rpmsg.h |
| 7404 | 7407 | |
| 7408 | +RESET CONTROLLER FRAMEWORK | |
| 7409 | +M: Philipp Zabel <p.zabel@pengutronix.de> | |
| 7410 | +S: Maintained | |
| 7411 | +F: drivers/reset/ | |
| 7412 | +F: Documentation/devicetree/bindings/reset/ | |
| 7413 | +F: include/linux/reset.h | |
| 7414 | +F: include/linux/reset-controller.h | |
| 7415 | + | |
| 7405 | 7416 | RFKILL |
| 7406 | 7417 | M: Johannes Berg <johannes@sipsolutions.net> |
| 7407 | 7418 | L: linux-wireless@vger.kernel.org |
| @@ -9107,6 +9118,9 @@ F: arch/um/os-Linux/drivers/ · 1699 unmodified lines | ||
| 9107 | 9118 | |
| 9108 | 9119 | TURBOCHANNEL SUBSYSTEM |
| 9109 | 9120 | M: "Maciej W. Rozycki" <macro@linux-mips.org> |
| 9121 | +M: Ralf Baechle <ralf@linux-mips.org> | |
| 9122 | +L: linux-mips@linux-mips.org | |
| 9123 | +Q: http://patchwork.linux-mips.org/project/linux-mips/list/ | |
| 9110 | 9124 | S: Maintained |
| 9111 | 9125 | F: drivers/tc/ |
| 9112 | 9126 | F: include/linux/tc.h |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | VERSION = 3 |
| 2 | 2 | PATCHLEVEL = 15 |
| 3 | 3 | SUBLEVEL = 0 |
| 4 | −EXTRAVERSION = -rc4 | |
| 4 | +EXTRAVERSION = -rc8 | |
| 5 | 5 | NAME = Shuffling Zombie Juror |
| 6 | 6 | |
| 7 | 7 | # *DOCUMENTATION* |
| @@ -144,7 +144,7 @@ · 143 unmodified lines | ||
| 144 | 144 | compatible = "ti,edma3"; |
| 145 | 145 | ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2"; |
| 146 | 146 | reg = <0x49000000 0x10000>, |
| 147 | − <0x44e10f90 0x10>; | |
| 147 | + <0x44e10f90 0x40>; | |
| 148 | 148 | interrupts = <12 13 14>; |
| 149 | 149 | #dma-cells = <1>; |
| 150 | 150 | dma-channels = <64>; |
| @@ -62,5 +62,21 @@ · 61 unmodified lines | ||
| 62 | 62 | }; |
| 63 | 63 | }; |
| 64 | 64 | |
| 65 | +&iva { | |
| 66 | + status = "disabled"; | |
| 67 | +}; | |
| 68 | + | |
| 69 | +&mailbox { | |
| 70 | + status = "disabled"; | |
| 71 | +}; | |
| 72 | + | |
| 73 | +&mmu_isp { | |
| 74 | + status = "disabled"; | |
| 75 | +}; | |
| 76 | + | |
| 77 | +&smartreflex_mpu_iva { | |
| 78 | + status = "disabled"; | |
| 79 | +}; | |
| 80 | + | |
| 65 | 81 | /include/ "am35xx-clocks.dtsi" |
| 66 | 82 | /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" |
| @@ -117,6 +117,11 @@ · 116 unmodified lines | ||
| 117 | 117 | status = "okay"; |
| 118 | 118 | }; |
| 119 | 119 | |
| 120 | +&gpio5 { | |
| 121 | + status = "okay"; | |
| 122 | + ti,no-reset-on-init; | |
| 123 | +}; | |
| 124 | + | |
| 120 | 125 | &mmc1 { |
| 121 | 126 | status = "okay"; |
| 122 | 127 | vmmc-supply = <&vmmcsd_fixed>; |
| @@ -67,6 +67,7 @@ · 66 unmodified lines | ||
| 67 | 67 | i2c@11000 { |
| 68 | 68 | pinctrl-0 = <&i2c0_pins>; |
| 69 | 69 | pinctrl-names = "default"; |
| 70 | + clock-frequency = <100000>; | |
| 70 | 71 | status = "okay"; |
| 71 | 72 | audio_codec: audio-codec@4a { |
| 72 | 73 | compatible = "cirrus,cs42l51"; |
| @@ -79,6 +79,11 @@ · 78 unmodified lines | ||
| 79 | 79 | }; |
| 80 | 80 | }; |
| 81 | 81 | |
| 82 | + sata@a0000 { | |
| 83 | + status = "okay"; | |
| 84 | + nr-ports = <2>; | |
| 85 | + }; | |
| 86 | + | |
| 82 | 87 | nand: nand@d0000 { |
| 83 | 88 | pinctrl-0 = <&nand_pins>; |
| 84 | 89 | pinctrl-names = "default"; |
| @@ -99,7 +99,7 @@ · 98 unmodified lines | ||
| 99 | 99 | pcie@3,0 { |
| 100 | 100 | device_type = "pci"; |
| 101 | 101 | assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; |
| 102 | − reg = <0x1000 0 0 0 0>; | |
| 102 | + reg = <0x1800 0 0 0 0>; | |
| 103 | 103 | #address-cells = <3>; |
| 104 | 104 | #size-cells = <2>; |
| 105 | 105 | #interrupt-cells = <1>; |
| @@ -110,7 +110,7 @@ · 109 unmodified lines | ||
| 110 | 110 | pcie@3,0 { |
| 111 | 111 | device_type = "pci"; |
| 112 | 112 | assigned-addresses = <0x82000800 0 0x44000 0 0x2000>; |
| 113 | − reg = <0x1000 0 0 0 0>; | |
| 113 | + reg = <0x1800 0 0 0 0>; | |
| 114 | 114 | #address-cells = <3>; |
| 115 | 115 | #size-cells = <2>; |
| 116 | 116 | #interrupt-cells = <1>; |
| @@ -131,7 +131,7 @@ · 14 unmodified lines | ||
| 131 | 131 | pcie@4,0 { |
| 132 | 132 | device_type = "pci"; |
| 133 | 133 | assigned-addresses = <0x82000800 0 0x48000 0 0x2000>; |
| 134 | − reg = <0x1000 0 0 0 0>; | |
| 134 | + reg = <0x2000 0 0 0 0>; | |
| 135 | 135 | #address-cells = <3>; |
| 136 | 136 | #size-cells = <2>; |
| 137 | 137 | #interrupt-cells = <1>; |
| @@ -49,7 +49,7 @@ · 48 unmodified lines | ||
| 49 | 49 | /* Device Bus parameters are required */ |
| 50 | 50 | |
| 51 | 51 | /* Read parameters */ |
| 52 | − devbus,bus-width = <8>; | |
| 52 | + devbus,bus-width = <16>; | |
| 53 | 53 | devbus,turn-off-ps = <60000>; |
| 54 | 54 | devbus,badr-skew-ps = <0>; |
| 55 | 55 | devbus,acc-first-ps = <124000>; |
| @@ -59,7 +59,7 @@ · 58 unmodified lines | ||
| 59 | 59 | /* Device Bus parameters are required */ |
| 60 | 60 | |
| 61 | 61 | /* Read parameters */ |
| 62 | − devbus,bus-width = <8>; | |
| 62 | + devbus,bus-width = <16>; | |
| 63 | 63 | devbus,turn-off-ps = <60000>; |
| 64 | 64 | devbus,badr-skew-ps = <0>; |
| 65 | 65 | devbus,acc-first-ps = <124000>; |
| @@ -146,22 +146,22 @@ · 80 unmodified lines | ||
| 146 | 146 | ethernet@70000 { |
| 147 | 147 | status = "okay"; |
| 148 | 148 | phy = <&phy0>; |
| 149 | − phy-mode = "rgmii-id"; | |
| 149 | + phy-mode = "qsgmii"; | |
| 150 | 150 | }; |
| 151 | 151 | ethernet@74000 { |
| 152 | 152 | status = "okay"; |
| 153 | 153 | phy = <&phy1>; |
| 154 | − phy-mode = "rgmii-id"; | |
| 154 | + phy-mode = "qsgmii"; | |
| 155 | 155 | }; |
| 156 | 156 | ethernet@30000 { |
| 157 | 157 | status = "okay"; |
| 158 | 158 | phy = <&phy2>; |
| 159 | − phy-mode = "rgmii-id"; | |
| 159 | + phy-mode = "qsgmii"; | |
| 160 | 160 | }; |
| 161 | 161 | ethernet@34000 { |
| 162 | 162 | status = "okay"; |
| 163 | 163 | phy = <&phy3>; |
| 164 | − phy-mode = "rgmii-id"; | |
| 164 | + phy-mode = "qsgmii"; | |
| 165 | 165 | }; |
| 166 | 166 | |
| 167 | 167 | /* Front-side USB slot */ |
| @@ -39,7 +39,7 @@ · 38 unmodified lines | ||
| 39 | 39 | /* Device Bus parameters are required */ |
| 40 | 40 | |
| 41 | 41 | /* Read parameters */ |
| 42 | − devbus,bus-width = <8>; | |
| 42 | + devbus,bus-width = <16>; | |
| 43 | 43 | devbus,turn-off-ps = <60000>; |
| 44 | 44 | devbus,badr-skew-ps = <0>; |
| 45 | 45 | devbus,acc-first-ps = <124000>; |
| @@ -34,7 +34,7 @@ · 33 unmodified lines | ||
| 34 | 34 | }; |
| 35 | 35 | |
| 36 | 36 | spi0: spi@f0004000 { |
| 37 | − cs-gpios = <&pioD 13 0>; | |
| 37 | + cs-gpios = <&pioD 13 0>, <0>, <0>, <&pioD 16 0>; | |
| 38 | 38 | status = "okay"; |
| 39 | 39 | }; |
| 40 | 40 | |
| @@ -79,7 +79,7 @@ · 38 unmodified lines | ||
| 79 | 79 | }; |
| 80 | 80 | |
| 81 | 81 | spi1: spi@f8008000 { |
| 82 | − cs-gpios = <&pioC 25 0>, <0>, <0>, <&pioD 16 0>; | |
| 82 | + cs-gpios = <&pioC 25 0>; | |
| 83 | 83 | status = "okay"; |
| 84 | 84 | }; |
| 85 | 85 | |
| @@ -641,7 +641,7 @@ · 640 unmodified lines | ||
| 641 | 641 | trigger@3 { |
| 642 | 642 | reg = <3>; |
| 643 | 643 | trigger-name = "external"; |
| 644 | − trigger-value = <0x13>; | |
| 644 | + trigger-value = <0xd>; | |
| 645 | 645 | trigger-external; |
| 646 | 646 | }; |
| 647 | 647 | }; |
| @@ -10,7 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | 12 | #include <dt-bindings/gpio/gpio.h> |
| 13 | −#include <dt-bindings/clk/at91.h> | |
| 13 | +#include <dt-bindings/clock/at91.h> | |
| 14 | 14 | |
| 15 | 15 | / { |
| 16 | 16 | model = "Atmel AT91SAM9261 family SoC"; |
| @@ -8,7 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | |
| 9 | 9 | #include "skeleton.dtsi" |
| 10 | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | −#include <dt-bindings/clk/at91.h> | |
| 11 | +#include <dt-bindings/clock/at91.h> | |
| 12 | 12 | #include <dt-bindings/interrupt-controller/irq.h> |
| 13 | 13 | #include <dt-bindings/gpio/gpio.h> |
| 14 | 14 | |
| @@ -503,7 +503,7 @@ · 502 unmodified lines | ||
| 503 | 503 | status = "okay"; |
| 504 | 504 | |
| 505 | 505 | ak8975@0c { |
| 506 | − compatible = "ak,ak8975"; | |
| 506 | + compatible = "asahi-kasei,ak8975"; | |
| 507 | 507 | reg = <0x0c>; |
| 508 | 508 | gpios = <&gpj0 7 0>; |
| 509 | 509 | }; |
| @@ -107,6 +107,7 @@ · 106 unmodified lines | ||
| 107 | 107 | regulator-name = "VDD_IOPERI_1.8V"; |
| 108 | 108 | regulator-min-microvolt = <1800000>; |
| 109 | 109 | regulator-max-microvolt = <1800000>; |
| 110 | + regulator-always-on; | |
| 110 | 111 | op_mode = <1>; |
| 111 | 112 | }; |
| 112 | 113 | |
| @@ -364,16 +364,4 @@ · 363 unmodified lines | ||
| 364 | 364 | gpio-key,wakeup; |
| 365 | 365 | }; |
| 366 | 366 | }; |
| 367 | − | |
| 368 | − amba { | |
| 369 | − mdma1: mdma@11C10000 { | |
| 370 | − /* | |
| 371 | − * MDMA1 can support both secure and non-secure | |
| 372 | − * AXI transactions. When this is enabled in the kernel | |
| 373 | − * for boards that run in secure mode, we are getting | |
| 374 | − * imprecise external aborts causing the kernel to oops. | |
| 375 | − */ | |
| 376 | − status = "disabled"; | |
| 377 | − }; | |
| 378 | − }; | |
| 379 | 367 | }; |
| @@ -219,16 +219,6 @@ · 218 unmodified lines | ||
| 219 | 219 | reg = <0x100440C0 0x20>; |
| 220 | 220 | }; |
| 221 | 221 | |
| 222 | − mau_pd: power-domain@100440E0 { | |
| 223 | − compatible = "samsung,exynos4210-pd"; | |
| 224 | − reg = <0x100440E0 0x20>; | |
| 225 | − }; | |
| 226 | − | |
| 227 | − g2d_pd: power-domain@10044100 { | |
| 228 | − compatible = "samsung,exynos4210-pd"; | |
| 229 | − reg = <0x10044100 0x20>; | |
| 230 | − }; | |
| 231 | − | |
| 232 | 222 | msc_pd: power-domain@10044120 { |
| 233 | 223 | compatible = "samsung,exynos4210-pd"; |
| 234 | 224 | reg = <0x10044120 0x20>; |
| @@ -336,6 +326,13 @@ · 101 unmodified lines | ||
| 336 | 326 | #dma-cells = <1>; |
| 337 | 327 | #dma-channels = <8>; |
| 338 | 328 | #dma-requests = <1>; |
| 329 | + /* | |
| 330 | + * MDMA1 can support both secure and non-secure | |
| 331 | + * AXI transactions. When this is enabled in the kernel | |
| 332 | + * for boards that run in secure mode, we are getting | |
| 333 | + * imprecise external aborts causing the kernel to oops. | |
| 334 | + */ | |
| 335 | + status = "disabled"; | |
| 339 | 336 | }; |
| 340 | 337 | }; |
| 341 | 338 | |
| @@ -385,7 +382,7 @@ · 43 unmodified lines | ||
| 385 | 382 | spi_0: spi@12d20000 { |
| 386 | 383 | compatible = "samsung,exynos4210-spi"; |
| 387 | 384 | reg = <0x12d20000 0x100>; |
| 388 | − interrupts = <0 66 0>; | |
| 385 | + interrupts = <0 68 0>; | |
| 389 | 386 | dmas = <&pdma0 5 |
| 390 | 387 | &pdma0 4>; |
| 391 | 388 | dma-names = "tx", "rx"; |
| @@ -401,7 +398,7 @@ · 9 unmodified lines | ||
| 401 | 398 | spi_1: spi@12d30000 { |
| 402 | 399 | compatible = "samsung,exynos4210-spi"; |
| 403 | 400 | reg = <0x12d30000 0x100>; |
| 404 | − interrupts = <0 67 0>; | |
| 401 | + interrupts = <0 69 0>; | |
| 405 | 402 | dmas = <&pdma1 5 |
| 406 | 403 | &pdma1 4>; |
| 407 | 404 | dma-names = "tx", "rx"; |
| @@ -417,7 +414,7 @@ · 9 unmodified lines | ||
| 417 | 414 | spi_2: spi@12d40000 { |
| 418 | 415 | compatible = "samsung,exynos4210-spi"; |
| 419 | 416 | reg = <0x12d40000 0x100>; |
| 420 | − interrupts = <0 68 0>; | |
| 417 | + interrupts = <0 70 0>; | |
| 421 | 418 | dmas = <&pdma0 7 |
| 422 | 419 | &pdma0 6>; |
| 423 | 420 | dma-names = "tx", "rx"; |
| @@ -730,6 +727,5 @@ · 306 unmodified lines | ||
| 730 | 727 | interrupts = <0 112 0>; |
| 731 | 728 | clocks = <&clock 471>; |
| 732 | 729 | clock-names = "secss"; |
| 733 | − samsung,power-domain = <&g2d_pd>; | |
| 734 | 730 | }; |
| 735 | 731 | }; |
| @@ -244,7 +244,7 @@ · 243 unmodified lines | ||
| 244 | 244 | &tve { |
| 245 | 245 | pinctrl-names = "default"; |
| 246 | 246 | pinctrl-0 = <&pinctrl_vga_sync_1>; |
| 247 | − i2c-ddc-bus = <&i2c3>; | |
| 247 | + ddc-i2c-bus = <&i2c3>; | |
| 248 | 248 | fsl,tve-mode = "vga"; |
| 249 | 249 | fsl,hsync-pin = <4>; |
| 250 | 250 | fsl,vsync-pin = <6>; |
| @@ -115,7 +115,7 @@ · 114 unmodified lines | ||
| 115 | 115 | #address-cells = <1>; |
| 116 | 116 | #size-cells = <0>; |
| 117 | 117 | compatible = "fsl,imx53-ipu"; |
| 118 | − reg = <0x18000000 0x080000000>; | |
| 118 | + reg = <0x18000000 0x08000000>; | |
| 119 | 119 | interrupts = <11 10>; |
| 120 | 120 | clocks = <&clks IMX5_CLK_IPU_GATE>, |
| 121 | 121 | <&clks IMX5_CLK_IPU_DI0_GATE>, |
| @@ -30,6 +30,16 @@ · 29 unmodified lines | ||
| 30 | 30 | bootargs = "console=ttyS0,115200n8 earlyprintk"; |
| 31 | 31 | }; |
| 32 | 32 | |
| 33 | + mbus { | |
| 34 | + pcie-controller { | |
| 35 | + status = "okay"; | |
| 36 | + | |
| 37 | + pcie@1,0 { | |
| 38 | + status = "okay"; | |
| 39 | + }; | |
| 40 | + }; | |
| 41 | + }; | |
| 42 | + | |
| 33 | 43 | ocp@f1000000 { |
| 34 | 44 | pinctrl@10000 { |
| 35 | 45 | pmx_usb_led: pmx-usb-led { |
| @@ -73,14 +83,6 @@ · 37 unmodified lines | ||
| 73 | 83 | ehci@50000 { |
| 74 | 84 | status = "okay"; |
| 75 | 85 | }; |
| 76 | − | |
| 77 | − pcie-controller { | |
| 78 | − status = "okay"; | |
| 79 | − | |
| 80 | − pcie@1,0 { | |
| 81 | − status = "okay"; | |
| 82 | − }; | |
| 83 | − }; | |
| 84 | 86 | }; |
| 85 | 87 | |
| 86 | 88 | gpio-leds { |
| @@ -4,6 +4,16 @@ · 3 unmodified lines | ||
| 4 | 4 | / { |
| 5 | 5 | model = "ZyXEL NSA310"; |
| 6 | 6 | |
| 7 | + mbus { | |
| 8 | + pcie-controller { | |
| 9 | + status = "okay"; | |
| 10 | + | |
| 11 | + pcie@1,0 { | |
| 12 | + status = "okay"; | |
| 13 | + }; | |
| 14 | + }; | |
| 15 | + }; | |
| 16 | + | |
| 7 | 17 | ocp@f1000000 { |
| 8 | 18 | pinctrl: pinctrl@10000 { |
| 9 | 19 | |
| @@ -26,14 +36,6 @@ · 16 unmodified lines | ||
| 26 | 36 | status = "okay"; |
| 27 | 37 | nr-ports = <2>; |
| 28 | 38 | }; |
| 29 | − | |
| 30 | − pcie-controller { | |
| 31 | − status = "okay"; | |
| 32 | − | |
| 33 | − pcie@1,0 { | |
| 34 | − status = "okay"; | |
| 35 | − }; | |
| 36 | − }; | |
| 37 | 39 | }; |
| 38 | 40 | |
| 39 | 41 | gpio_poweroff { |
| @@ -127,11 +127,6 @@ · 126 unmodified lines | ||
| 127 | 127 | |
| 128 | 128 | i2c@11000 { |
| 129 | 129 | status = "okay"; |
| 130 | − | |
| 131 | − alc5621: alc5621@1a { | |
| 132 | − compatible = "realtek,alc5621"; | |
| 133 | − reg = <0x1a>; | |
| 134 | − }; | |
| 135 | 130 | }; |
| 136 | 131 | |
| 137 | 132 | serial@12000 { |
| @@ -24,11 +24,10 @@ · 23 unmodified lines | ||
| 24 | 24 | compatible = "smsc,lan9221", "smsc,lan9115"; |
| 25 | 25 | bank-width = <2>; |
| 26 | 26 | gpmc,mux-add-data; |
| 27 | − gpmc,cs-on-ns = <0>; | |
| 28 | − gpmc,cs-rd-off-ns = <186>; | |
| 29 | − gpmc,cs-wr-off-ns = <186>; | |
| 30 | − gpmc,adv-on-ns = <12>; | |
| 31 | − gpmc,adv-rd-off-ns = <48>; | |
| 27 | + gpmc,cs-on-ns = <1>; | |
| 28 | + gpmc,cs-rd-off-ns = <180>; | |
| 29 | + gpmc,cs-wr-off-ns = <180>; | |
| 30 | + gpmc,adv-rd-off-ns = <18>; | |
| 32 | 31 | gpmc,adv-wr-off-ns = <48>; |
| 33 | 32 | gpmc,oe-on-ns = <54>; |
| 34 | 33 | gpmc,oe-off-ns = <168>; |
| @@ -36,12 +35,10 @@ · 1 unmodified line | ||
| 36 | 35 | gpmc,we-off-ns = <168>; |
| 37 | 36 | gpmc,rd-cycle-ns = <186>; |
| 38 | 37 | gpmc,wr-cycle-ns = <186>; |
| 39 | − gpmc,access-ns = <114>; | |
| 40 | − gpmc,page-burst-access-ns = <6>; | |
| 41 | − gpmc,bus-turnaround-ns = <12>; | |
| 42 | − gpmc,cycle2cycle-delay-ns = <18>; | |
| 43 | − gpmc,wr-data-mux-bus-ns = <90>; | |
| 44 | − gpmc,wr-access-ns = <186>; | |
| 38 | + gpmc,access-ns = <144>; | |
| 39 | + gpmc,page-burst-access-ns = <24>; | |
| 40 | + gpmc,bus-turnaround-ns = <90>; | |
| 41 | + gpmc,cycle2cycle-delay-ns = <90>; | |
| 45 | 42 | gpmc,cycle2cycle-samecsen; |
| 46 | 43 | gpmc,cycle2cycle-diffcsen; |
| 47 | 44 | vddvario-supply = <&vddvario>; |
| @@ -71,13 +71,6 @@ · 70 unmodified lines | ||
| 71 | 71 | interrupts = <58>; |
| 72 | 72 | }; |
| 73 | 73 | |
| 74 | − mailbox: mailbox@48094000 { | |
| 75 | − compatible = "ti,omap2-mailbox"; | |
| 76 | − ti,hwmods = "mailbox"; | |
| 77 | − reg = <0x48094000 0x200>; | |
| 78 | − interrupts = <26>; | |
| 79 | − }; | |
| 80 | − | |
| 81 | 74 | intc: interrupt-controller@1 { |
| 82 | 75 | compatible = "ti,omap2-intc"; |
| 83 | 76 | interrupt-controller; |
| @@ -125,6 +125,14 @@ · 124 unmodified lines | ||
| 125 | 125 | dma-names = "tx", "rx"; |
| 126 | 126 | }; |
| 127 | 127 | |
| 128 | + mailbox: mailbox@48094000 { | |
| 129 | + compatible = "ti,omap2-mailbox"; | |
| 130 | + reg = <0x48094000 0x200>; | |
| 131 | + interrupts = <26>, <34>; | |
| 132 | + interrupt-names = "dsp", "iva"; | |
| 133 | + ti,hwmods = "mailbox"; | |
| 134 | + }; | |
| 135 | + | |
| 128 | 136 | timer1: timer@48028000 { |
| 129 | 137 | compatible = "ti,omap2420-timer"; |
| 130 | 138 | reg = <0x48028000 0x400>; |
| @@ -216,6 +216,13 @@ · 215 unmodified lines | ||
| 216 | 216 | dma-names = "tx", "rx"; |
| 217 | 217 | }; |
| 218 | 218 | |
| 219 | + mailbox: mailbox@48094000 { | |
| 220 | + compatible = "ti,omap2-mailbox"; | |
| 221 | + reg = <0x48094000 0x200>; | |
| 222 | + interrupts = <26>; | |
| 223 | + ti,hwmods = "mailbox"; | |
| 224 | + }; | |
| 225 | + | |
| 219 | 226 | timer1: timer@49018000 { |
| 220 | 227 | compatible = "ti,omap2420-timer"; |
| 221 | 228 | reg = <0x49018000 0x400>; |
| @@ -10,18 +10,6 @@ · 9 unmodified lines | ||
| 10 | 10 | cpu0-supply = <&vcc>; |
| 11 | 11 | }; |
| 12 | 12 | }; |
| 13 | − | |
| 14 | − vddvario: regulator-vddvario { | |
| 15 | − compatible = "regulator-fixed"; | |
| 16 | − regulator-name = "vddvario"; | |
| 17 | − regulator-always-on; | |
| 18 | − }; | |
| 19 | − | |
| 20 | − vdd33a: regulator-vdd33a { | |
| 21 | − compatible = "regulator-fixed"; | |
| 22 | − regulator-name = "vdd33a"; | |
| 23 | − regulator-always-on; | |
| 24 | − }; | |
| 25 | 13 | }; |
| 26 | 14 | |
| 27 | 15 | &omap3_pmx_core { |
| @@ -35,58 +23,34 @@ · 7 unmodified lines | ||
| 35 | 23 | |
| 36 | 24 | hsusb0_pins: pinmux_hsusb0_pins { |
| 37 | 25 | pinctrl-single,pins = < |
| 38 | − OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ | |
| 39 | − OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ | |
| 40 | − OMAP3_CORE1_IOPAD(0x21a4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ | |
| 41 | − OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ | |
| 42 | − OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */ | |
| 43 | − OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ | |
| 44 | − OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ | |
| 45 | − OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */ | |
| 46 | − OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */ | |
| 47 | − OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */ | |
| 48 | − OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */ | |
| 49 | − OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ | |
| 26 | + OMAP3_CORE1_IOPAD(0x21a2, PIN_OUTPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */ | |
| 27 | + OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */ | |
| 28 | + OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */ | |
| 29 | + OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */ | |
| 30 | + OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data0.hsusb2_data0 */ | |
| 31 | + OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */ | |
| 32 | + OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */ | |
| 33 | + OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data3 */ | |
| 34 | + OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data4 */ | |
| 35 | + OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data5 */ | |
| 36 | + OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data6 */ | |
| 37 | + OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT_PULLDOWN | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */ | |
| 50 | 38 | >; |
| 51 | 39 | }; |
| 52 | 40 | }; |
| 53 | 41 | |
| 42 | +#include "omap-gpmc-smsc911x.dtsi" | |
| 43 | + | |
| 54 | 44 | &gpmc { |
| 55 | 45 | ranges = <5 0 0x2c000000 0x01000000>; |
| 56 | 46 | |
| 57 | − smsc1: ethernet@5,0 { | |
| 47 | + smsc1: ethernet@gpmc { | |
| 58 | 48 | compatible = "smsc,lan9221", "smsc,lan9115"; |
| 59 | 49 | pinctrl-names = "default"; |
| 60 | 50 | pinctrl-0 = <&smsc1_pins>; |
| 61 | 51 | interrupt-parent = <&gpio6>; |
| 62 | 52 | interrupts = <3 IRQ_TYPE_LEVEL_LOW>; |
| 63 | 53 | reg = <5 0 0xff>; |
| 64 | − bank-width = <2>; | |
| 65 | − gpmc,mux-add-data; | |
| 66 | − gpmc,cs-on-ns = <0>; | |
| 67 | − gpmc,cs-rd-off-ns = <186>; | |
| 68 | − gpmc,cs-wr-off-ns = <186>; | |
| 69 | − gpmc,adv-on-ns = <12>; | |
| 70 | − gpmc,adv-rd-off-ns = <48>; | |
| 71 | − gpmc,adv-wr-off-ns = <48>; | |
| 72 | − gpmc,oe-on-ns = <54>; | |
| 73 | − gpmc,oe-off-ns = <168>; | |
| 74 | − gpmc,we-on-ns = <54>; | |
| 75 | − gpmc,we-off-ns = <168>; | |
| 76 | − gpmc,rd-cycle-ns = <186>; | |
| 77 | − gpmc,wr-cycle-ns = <186>; | |
| 78 | − gpmc,access-ns = <114>; | |
| 79 | − gpmc,page-burst-access-ns = <6>; | |
| 80 | − gpmc,bus-turnaround-ns = <12>; | |
| 81 | − gpmc,cycle2cycle-delay-ns = <18>; | |
| 82 | − gpmc,wr-data-mux-bus-ns = <90>; | |
| 83 | − gpmc,wr-access-ns = <186>; | |
| 84 | − gpmc,cycle2cycle-samecsen; | |
| 85 | − gpmc,cycle2cycle-diffcsen; | |
| 86 | − vddvario-supply = <&vddvario>; | |
| 87 | − vdd33a-supply = <&vdd33a>; | |
| 88 | − reg-io-width = <4>; | |
| 89 | − smsc,save-mac-address; | |
| 90 | 54 | }; |
| 91 | 55 | }; |
| 92 | 56 | |
| @@ -107,7 +107,7 @@ · 106 unmodified lines | ||
| 107 | 107 | >; |
| 108 | 108 | }; |
| 109 | 109 | |
| 110 | − smsc911x_pins: pinmux_smsc911x_pins { | |
| 110 | + smsc9221_pins: pinmux_smsc9221_pins { | |
| 111 | 111 | pinctrl-single,pins = < |
| 112 | 112 | 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ |
| 113 | 113 | >; |
| @@ -10,7 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | */ |
| 11 | 11 | |
| 12 | 12 | #include "omap3-igep.dtsi" |
| 13 | −#include "omap-gpmc-smsc911x.dtsi" | |
| 13 | +#include "omap-gpmc-smsc9221.dtsi" | |
| 14 | 14 | |
| 15 | 15 | / { |
| 16 | 16 | model = "IGEPv2 (TI OMAP AM/DM37x)"; |
| @@ -248,7 +248,7 @@ · 231 unmodified lines | ||
| 248 | 248 | |
| 249 | 249 | ethernet@gpmc { |
| 250 | 250 | pinctrl-names = "default"; |
| 251 | − pinctrl-0 = <&smsc911x_pins>; | |
| 251 | + pinctrl-0 = <&smsc9221_pins>; | |
| 252 | 252 | reg = <5 0 0xff>; |
| 253 | 253 | interrupt-parent = <&gpio6>; |
| 254 | 254 | interrupts = <16 IRQ_TYPE_LEVEL_LOW>; |
| @@ -2,20 +2,6 @@ · 1 unmodified line | ||
| 2 | 2 | * Common support for CompuLab SB-T35 used on SBC-T3530, SBC-T3517 and SBC-T3730 |
| 3 | 3 | */ |
| 4 | 4 | |
| 5 | −/ { | |
| 6 | − vddvario_sb_t35: regulator-vddvario-sb-t35 { | |
| 7 | − compatible = "regulator-fixed"; | |
| 8 | − regulator-name = "vddvario"; | |
| 9 | − regulator-always-on; | |
| 10 | − }; | |
| 11 | − | |
| 12 | − vdd33a_sb_t35: regulator-vdd33a-sb-t35 { | |
| 13 | − compatible = "regulator-fixed"; | |
| 14 | − regulator-name = "vdd33a"; | |
| 15 | − regulator-always-on; | |
| 16 | − }; | |
| 17 | −}; | |
| 18 | − | |
| 19 | 5 | &omap3_pmx_core { |
| 20 | 6 | smsc2_pins: pinmux_smsc2_pins { |
| 21 | 7 | pinctrl-single,pins = < |
| @@ -37,11 +23,10 @@ · 15 unmodified lines | ||
| 37 | 23 | reg = <4 0 0xff>; |
| 38 | 24 | bank-width = <2>; |
| 39 | 25 | gpmc,mux-add-data; |
| 40 | − gpmc,cs-on-ns = <0>; | |
| 41 | − gpmc,cs-rd-off-ns = <186>; | |
| 42 | − gpmc,cs-wr-off-ns = <186>; | |
| 43 | − gpmc,adv-on-ns = <12>; | |
| 44 | − gpmc,adv-rd-off-ns = <48>; | |
| 26 | + gpmc,cs-on-ns = <1>; | |
| 27 | + gpmc,cs-rd-off-ns = <180>; | |
| 28 | + gpmc,cs-wr-off-ns = <180>; | |
| 29 | + gpmc,adv-rd-off-ns = <18>; | |
| 45 | 30 | gpmc,adv-wr-off-ns = <48>; |
| 46 | 31 | gpmc,oe-on-ns = <54>; |
| 47 | 32 | gpmc,oe-off-ns = <168>; |
| @@ -49,16 +34,14 @@ · 1 unmodified line | ||
| 49 | 34 | gpmc,we-off-ns = <168>; |
| 50 | 35 | gpmc,rd-cycle-ns = <186>; |
| 51 | 36 | gpmc,wr-cycle-ns = <186>; |
| 52 | − gpmc,access-ns = <114>; | |
| 53 | − gpmc,page-burst-access-ns = <6>; | |
| 54 | − gpmc,bus-turnaround-ns = <12>; | |
| 55 | − gpmc,cycle2cycle-delay-ns = <18>; | |
| 56 | − gpmc,wr-data-mux-bus-ns = <90>; | |
| 57 | − gpmc,wr-access-ns = <186>; | |
| 37 | + gpmc,access-ns = <144>; | |
| 38 | + gpmc,page-burst-access-ns = <24>; | |
| 39 | + gpmc,bus-turnaround-ns = <90>; | |
| 40 | + gpmc,cycle2cycle-delay-ns = <90>; | |
| 58 | 41 | gpmc,cycle2cycle-samecsen; |
| 59 | 42 | gpmc,cycle2cycle-diffcsen; |
| 60 | − vddvario-supply = <&vddvario_sb_t35>; | |
| 61 | − vdd33a-supply = <&vdd33a_sb_t35>; | |
| 43 | + vddvario-supply = <&vddvario>; | |
| 44 | + vdd33a-supply = <&vdd33a>; | |
| 62 | 45 | reg-io-width = <4>; |
| 63 | 46 | smsc,save-mac-address; |
| 64 | 47 | }; |
| @@ -8,6 +8,19 @@ · 7 unmodified lines | ||
| 8 | 8 | / { |
| 9 | 9 | model = "CompuLab SBC-T3517 with CM-T3517"; |
| 10 | 10 | compatible = "compulab,omap3-sbc-t3517", "compulab,omap3-cm-t3517", "ti,am3517", "ti,omap3"; |
| 11 | + | |
| 12 | + /* Only one GPMC smsc9220 on SBC-T3517, CM-T3517 uses am35x Ethernet */ | |
| 13 | + vddvario: regulator-vddvario-sb-t35 { | |
| 14 | + compatible = "regulator-fixed"; | |
| 15 | + regulator-name = "vddvario"; | |
| 16 | + regulator-always-on; | |
| 17 | + }; | |
| 18 | + | |
| 19 | + vdd33a: regulator-vdd33a-sb-t35 { | |
| 20 | + compatible = "regulator-fixed"; | |
| 21 | + regulator-name = "vdd33a"; | |
| 22 | + regulator-always-on; | |
| 23 | + }; | |
| 11 | 24 | }; |
| 12 | 25 | |
| 13 | 26 | &omap3_pmx_core { |
| @@ -61,7 +61,7 @@ · 60 unmodified lines | ||
| 61 | 61 | ti,hwmods = "mpu"; |
| 62 | 62 | }; |
| 63 | 63 | |
| 64 | − iva { | |
| 64 | + iva: iva { | |
| 65 | 65 | compatible = "ti,iva2.2"; |
| 66 | 66 | ti,hwmods = "iva"; |
| 67 | 67 | |
| @@ -630,6 +630,13 @@ · 629 unmodified lines | ||
| 630 | 630 | status = "disabled"; |
| 631 | 631 | }; |
| 632 | 632 | |
| 633 | + mailbox: mailbox@4a0f4000 { | |
| 634 | + compatible = "ti,omap4-mailbox"; | |
| 635 | + reg = <0x4a0f4000 0x200>; | |
| 636 | + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; | |
| 637 | + ti,hwmods = "mailbox"; | |
| 638 | + }; | |
| 639 | + | |
| 633 | 640 | timer1: timer@4ae18000 { |
| 634 | 641 | compatible = "ti,omap5430-timer"; |
| 635 | 642 | reg = <0x4ae18000 0x80>; |
| @@ -13,7 +13,7 @@ · 12 unmodified lines | ||
| 13 | 13 | #include <dt-bindings/pinctrl/at91.h> |
| 14 | 14 | #include <dt-bindings/interrupt-controller/irq.h> |
| 15 | 15 | #include <dt-bindings/gpio/gpio.h> |
| 16 | −#include <dt-bindings/clk/at91.h> | |
| 16 | +#include <dt-bindings/clock/at91.h> | |
| 17 | 17 | |
| 18 | 18 | / { |
| 19 | 19 | model = "Atmel SAMA5D3 family SoC"; |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | −#include <dt-bindings/clk/at91.h> | |
| 12 | +#include <dt-bindings/clock/at91.h> | |
| 13 | 13 | |
| 14 | 14 | / { |
| 15 | 15 | ahb { |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | −#include <dt-bindings/clk/at91.h> | |
| 12 | +#include <dt-bindings/clock/at91.h> | |
| 13 | 13 | |
| 14 | 14 | / { |
| 15 | 15 | aliases { |
| @@ -9,7 +9,7 @@ · 8 unmodified lines | ||
| 9 | 9 | |
| 10 | 10 | #include <dt-bindings/pinctrl/at91.h> |
| 11 | 11 | #include <dt-bindings/interrupt-controller/irq.h> |
| 12 | −#include <dt-bindings/clk/at91.h> | |
| 12 | +#include <dt-bindings/clock/at91.h> | |
| 13 | 13 | |
| 14 | 14 | / { |
| 15 | 15 | aliases { |
| @@ -18,6 +18,7 @@ · 17 unmodified lines | ||
| 18 | 18 | compatible = "st-ericsson,ccu8540", "st-ericsson,u8540"; |
| 19 | 19 | |
| 20 | 20 | memory@0 { |
| 21 | + device_type = "memory"; | |
| 21 | 22 | reg = <0x20000000 0x1f000000>, <0xc0000000 0x3f000000>; |
| 22 | 23 | }; |
| 23 | 24 | |
| @@ -87,7 +87,7 @@ · 86 unmodified lines | ||
| 87 | 87 | |
| 88 | 88 | pll4: clk@01c20018 { |
| 89 | 89 | #clock-cells = <0>; |
| 90 | − compatible = "allwinner,sun4i-a10-pll1-clk"; | |
| 90 | + compatible = "allwinner,sun7i-a20-pll4-clk"; | |
| 91 | 91 | reg = <0x01c20018 0x4>; |
| 92 | 92 | clocks = <&osc24M>; |
| 93 | 93 | clock-output-names = "pll4"; |
| @@ -109,6 +109,14 @@ · 15 unmodified lines | ||
| 109 | 109 | clock-output-names = "pll6_sata", "pll6_other", "pll6"; |
| 110 | 110 | }; |
| 111 | 111 | |
| 112 | + pll8: clk@01c20040 { | |
| 113 | + #clock-cells = <0>; | |
| 114 | + compatible = "allwinner,sun7i-a20-pll4-clk"; | |
| 115 | + reg = <0x01c20040 0x4>; | |
| 116 | + clocks = <&osc24M>; | |
| 117 | + clock-output-names = "pll8"; | |
| 118 | + }; | |
| 119 | + | |
| 112 | 120 | cpu: cpu@01c20054 { |
| 113 | 121 | #clock-cells = <0>; |
| 114 | 122 | compatible = "allwinner,sun4i-a10-cpu-clk"; |
| @@ -805,9 +813,9 @@ · 690 unmodified lines | ||
| 805 | 813 | status = "disabled"; |
| 806 | 814 | }; |
| 807 | 815 | |
| 808 | − i2c4: i2c@01c2bc00 { | |
| 816 | + i2c4: i2c@01c2c000 { | |
| 809 | 817 | compatible = "allwinner,sun4i-i2c"; |
| 810 | − reg = <0x01c2bc00 0x400>; | |
| 818 | + reg = <0x01c2c000 0x400>; | |
| 811 | 819 | interrupts = <0 89 4>; |
| 812 | 820 | clocks = <&apb1_gates 15>; |
| 813 | 821 | clock-frequency = <100000>; |
| @@ -433,8 +433,12 @@ static void bL_switcher_restore_cpus(void) · 432 unmodified lines | ||
| 433 | 433 | { |
| 434 | 434 | int i; |
| 435 | 435 | |
| 436 | − for_each_cpu(i, &bL_switcher_removed_logical_cpus) | |
| 437 | − cpu_up(i); | |
| 436 | + for_each_cpu(i, &bL_switcher_removed_logical_cpus) { | |
| 437 | + struct device *cpu_dev = get_cpu_device(i); | |
| 438 | + int ret = device_online(cpu_dev); | |
| 439 | + if (ret) | |
| 440 | + dev_err(cpu_dev, "switcher: unable to restore CPU\n"); | |
| 441 | + } | |
| 438 | 442 | } |
| 439 | 443 | |
| 440 | 444 | static int bL_switcher_halve_cpus(void) |
| @@ -521,7 +525,7 @@ static int bL_switcher_halve_cpus(void) · 80 unmodified lines | ||
| 521 | 525 | continue; |
| 522 | 526 | } |
| 523 | 527 | |
| 524 | − ret = cpu_down(i); | |
| 528 | + ret = device_offline(get_cpu_device(i)); | |
| 525 | 529 | if (ret) { |
| 526 | 530 | bL_switcher_restore_cpus(); |
| 527 | 531 | return ret; |
| @@ -1423,55 +1423,38 @@ EXPORT_SYMBOL(edma_clear_event); · 1422 unmodified lines | ||
| 1423 | 1423 | |
| 1424 | 1424 | #if IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_DMADEVICES) |
| 1425 | 1425 | |
| 1426 | −static int edma_of_read_u32_to_s16_array(const struct device_node *np, | |
| 1427 | − const char *propname, s16 *out_values, | |
| 1428 | − size_t sz) | |
| 1426 | +static int edma_xbar_event_map(struct device *dev, struct device_node *node, | |
| 1427 | + struct edma_soc_info *pdata, size_t sz) | |
| 1429 | 1428 | { |
| 1430 | − int ret; | |
| 1431 | − | |
| 1432 | − ret = of_property_read_u16_array(np, propname, out_values, sz); | |
| 1433 | − if (ret) | |
| 1434 | − return ret; | |
| 1435 | − | |
| 1436 | − /* Terminate it */ | |
| 1437 | − *out_values++ = -1; | |
| 1438 | − *out_values++ = -1; | |
| 1439 | − | |
| 1440 | − return 0; | |
| 1441 | −} | |
| 1442 | − | |
| 1443 | −static int edma_xbar_event_map(struct device *dev, | |
| 1444 | − struct device_node *node, | |
| 1445 | − struct edma_soc_info *pdata, int len) | |
| 1446 | −{ | |
| 1447 | − int ret, i; | |
| 1429 | + const char pname[] = "ti,edma-xbar-event-map"; | |
| 1448 | 1430 | struct resource res; |
| 1449 | 1431 | void __iomem *xbar; |
| 1450 | − const s16 (*xbar_chans)[2]; | |
| 1432 | + s16 (*xbar_chans)[2]; | |
| 1433 | + size_t nelm = sz / sizeof(s16); | |
| 1451 | 1434 | u32 shift, offset, mux; |
| 1435 | + int ret, i; | |
| 1452 | 1436 | |
| 1453 | − xbar_chans = devm_kzalloc(dev, | |
| 1454 | − len/sizeof(s16) + 2*sizeof(s16), | |
| 1455 | − GFP_KERNEL); | |
| 1437 | + xbar_chans = devm_kzalloc(dev, (nelm + 2) * sizeof(s16), GFP_KERNEL); | |
| 1456 | 1438 | if (!xbar_chans) |
| 1457 | 1439 | return -ENOMEM; |
| 1458 | 1440 | |
| 1459 | 1441 | ret = of_address_to_resource(node, 1, &res); |
| 1460 | 1442 | if (ret) |
| 1461 | − return -EIO; | |
| 1443 | + return -ENOMEM; | |
| 1462 | 1444 | |
| 1463 | 1445 | xbar = devm_ioremap(dev, res.start, resource_size(&res)); |
| 1464 | 1446 | if (!xbar) |
| 1465 | 1447 | return -ENOMEM; |
| 1466 | 1448 | |
| 1467 | − ret = edma_of_read_u32_to_s16_array(node, | |
| 1468 | − "ti,edma-xbar-event-map", | |
| 1469 | − (s16 *)xbar_chans, | |
| 1470 | − len/sizeof(u32)); | |
| 1449 | + ret = of_property_read_u16_array(node, pname, (u16 *)xbar_chans, nelm); | |
| 1471 | 1450 | if (ret) |
| 1472 | 1451 | return -EIO; |
| 1473 | 1452 | |
| 1474 | − for (i = 0; xbar_chans[i][0] != -1; i++) { | |
| 1453 | + /* Invalidate last entry for the other user of this mess */ | |
| 1454 | + nelm >>= 1; | |
| 1455 | + xbar_chans[nelm][0] = xbar_chans[nelm][1] = -1; | |
| 1456 | + | |
| 1457 | + for (i = 0; i < nelm; i++) { | |
| 1475 | 1458 | shift = (xbar_chans[i][1] & 0x03) << 3; |
| 1476 | 1459 | offset = xbar_chans[i][1] & 0xfffffffc; |
| 1477 | 1460 | mux = readl(xbar + offset); |
| @@ -1480,8 +1463,7 @@ static int edma_xbar_event_map(struct device *dev, · 2 unmodified lines | ||
| 1480 | 1463 | writel(mux, (xbar + offset)); |
| 1481 | 1464 | } |
| 1482 | 1465 | |
| 1483 | − pdata->xbar_chans = xbar_chans; | |
| 1484 | − | |
| 1466 | + pdata->xbar_chans = (const s16 (*)[2]) xbar_chans; | |
| 1485 | 1467 | return 0; |
| 1486 | 1468 | } |
| 1487 | 1469 | |
| @@ -65,6 +65,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y · 64 unmodified lines | ||
| 65 | 65 | CONFIG_I2C=y |
| 66 | 66 | CONFIG_I2C_MUX=y |
| 67 | 67 | CONFIG_I2C_ARB_GPIO_CHALLENGE=y |
| 68 | +CONFIG_I2C_EXYNOS5=y | |
| 68 | 69 | CONFIG_I2C_S3C2410=y |
| 69 | 70 | CONFIG_DEBUG_GPIO=y |
| 70 | 71 | # CONFIG_HWMON is not set |
| @@ -37,7 +37,7 @@ CONFIG_SUN4I_EMAC=y · 36 unmodified lines | ||
| 37 | 37 | # CONFIG_NET_VENDOR_NATSEMI is not set |
| 38 | 38 | # CONFIG_NET_VENDOR_SEEQ is not set |
| 39 | 39 | # CONFIG_NET_VENDOR_SMSC is not set |
| 40 | −# CONFIG_NET_VENDOR_STMICRO is not set | |
| 40 | +CONFIG_STMMAC_ETH=y | |
| 41 | 41 | # CONFIG_NET_VENDOR_WIZNET is not set |
| 42 | 42 | # CONFIG_WLAN is not set |
| 43 | 43 | CONFIG_SERIAL_8250=y |
| @@ -54,7 +54,9 @@ static inline void register_trusted_foundations( · 53 unmodified lines | ||
| 54 | 54 | */ |
| 55 | 55 | pr_err("No support for Trusted Foundations, continuing in degraded mode.\n"); |
| 56 | 56 | pr_err("Secondary processors as well as CPU PM will be disabled.\n"); |
| 57 | +#if IS_ENABLED(CONFIG_SMP) | |
| 57 | 58 | setup_max_cpus = 0; |
| 59 | +#endif | |
| 58 | 60 | cpu_idle_poll_ctrl(true); |
| 59 | 61 | } |
| 60 | 62 | |
| @@ -171,8 +171,9 @@ extern int __put_user_8(void *, unsigned long long); · 170 unmodified lines | ||
| 171 | 171 | #define __put_user_check(x,p) \ |
| 172 | 172 | ({ \ |
| 173 | 173 | unsigned long __limit = current_thread_info()->addr_limit - 1; \ |
| 174 | + const typeof(*(p)) __user *__tmp_p = (p); \ | |
| 174 | 175 | register const typeof(*(p)) __r2 asm("r2") = (x); \ |
| 175 | − register const typeof(*(p)) __user *__p asm("r0") = (p);\ | |
| 176 | + register const typeof(*(p)) __user *__p asm("r0") = __tmp_p; \ | |
| 176 | 177 | register unsigned long __l asm("r1") = __limit; \ |
| 177 | 178 | register int __e asm("r0"); \ |
| 178 | 179 | switch (sizeof(*(__p))) { \ |
| @@ -77,7 +77,6 @@ static inline xpaddr_t machine_to_phys(xmaddr_t machine) · 76 unmodified lines | ||
| 77 | 77 | } |
| 78 | 78 | /* VIRT <-> MACHINE conversion */ |
| 79 | 79 | #define virt_to_machine(v) (phys_to_machine(XPADDR(__pa(v)))) |
| 80 | −#define virt_to_pfn(v) (PFN_DOWN(__pa(v))) | |
| 81 | 80 | #define virt_to_mfn(v) (pfn_to_mfn(virt_to_pfn(v))) |
| 82 | 81 | #define mfn_to_virt(m) (__va(mfn_to_pfn(m) << PAGE_SHIFT)) |
| 83 | 82 | |
| @@ -132,6 +132,10 @@ · 131 unmodified lines | ||
| 132 | 132 | orrne r5, V7M_xPSR_FRAMEPTRALIGN |
| 133 | 133 | biceq r5, V7M_xPSR_FRAMEPTRALIGN |
| 134 | 134 | |
| 135 | + @ ensure bit 0 is cleared in the PC, otherwise behaviour is | |
| 136 | + @ unpredictable | |
| 137 | + bic r4, #1 | |
| 138 | + | |
| 135 | 139 | @ write basic exception frame |
| 136 | 140 | stmdb r2!, {r1, r3-r5} |
| 137 | 141 | ldmia sp, {r1, r3-r5} |
| @@ -285,7 +285,7 @@ static int unwind_exec_pop_r4_to_rN(struct unwind_ctrl_block *ctrl, · 284 unmodified lines | ||
| 285 | 285 | if (unwind_pop_register(ctrl, &vsp, reg)) |
| 286 | 286 | return -URC_FAILURE; |
| 287 | 287 | |
| 288 | − if (insn & 0x80) | |
| 288 | + if (insn & 0x8) | |
| 289 | 289 | if (unwind_pop_register(ctrl, &vsp, 14)) |
| 290 | 290 | return -URC_FAILURE; |
| 291 | 291 | |
| @@ -1308,19 +1308,19 @@ static struct platform_device at91_adc_device = { · 1307 unmodified lines | ||
| 1308 | 1308 | static struct at91_adc_trigger at91_adc_triggers[] = { |
| 1309 | 1309 | [0] = { |
| 1310 | 1310 | .name = "timer-counter-0", |
| 1311 | − .value = AT91_ADC_TRGSEL_TC0 | AT91_ADC_TRGEN, | |
| 1311 | + .value = 0x1, | |
| 1312 | 1312 | }, |
| 1313 | 1313 | [1] = { |
| 1314 | 1314 | .name = "timer-counter-1", |
| 1315 | − .value = AT91_ADC_TRGSEL_TC1 | AT91_ADC_TRGEN, | |
| 1315 | + .value = 0x3, | |
| 1316 | 1316 | }, |
| 1317 | 1317 | [2] = { |
| 1318 | 1318 | .name = "timer-counter-2", |
| 1319 | − .value = AT91_ADC_TRGSEL_TC2 | AT91_ADC_TRGEN, | |
| 1319 | + .value = 0x5, | |
| 1320 | 1320 | }, |
| 1321 | 1321 | [3] = { |
| 1322 | 1322 | .name = "external", |
| 1323 | − .value = AT91_ADC_TRGSEL_EXTERNAL | AT91_ADC_TRGEN, | |
| 1323 | + .value = 0xd, | |
| 1324 | 1324 | .is_external = true, |
| 1325 | 1325 | }, |
| 1326 | 1326 | }; |
| @@ -18,6 +18,8 @@ · 17 unmodified lines | ||
| 18 | 18 | |
| 19 | 19 | #include <mach/map.h> |
| 20 | 20 | |
| 21 | +#include <plat/cpu.h> | |
| 22 | + | |
| 21 | 23 | #include "smc.h" |
| 22 | 24 | |
| 23 | 25 | static int exynos_do_idle(void) |
| @@ -28,13 +30,24 @@ static int exynos_do_idle(void) · 4 unmodified lines | ||
| 28 | 30 | |
| 29 | 31 | static int exynos_cpu_boot(int cpu) |
| 30 | 32 | { |
| 33 | + /* | |
| 34 | + * The second parameter of SMC_CMD_CPU1BOOT command means CPU id. | |
| 35 | + * But, Exynos4212 has only one secondary CPU so second parameter | |
| 36 | + * isn't used for informing secure firmware about CPU id. | |
| 37 | + */ | |
| 38 | + if (soc_is_exynos4212()) | |
| 39 | + cpu = 0; | |
| 40 | + | |
| 31 | 41 | exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); |
| 32 | 42 | return 0; |
| 33 | 43 | } |
| 34 | 44 | |
| 35 | 45 | static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) |
| 36 | 46 | { |
| 37 | − void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c + 4*cpu; | |
| 47 | + void __iomem *boot_reg = S5P_VA_SYSRAM_NS + 0x1c; | |
| 48 | + | |
| 49 | + if (!soc_is_exynos4212()) | |
| 50 | + boot_reg += 4*cpu; | |
| 38 | 51 | |
| 39 | 52 | __raw_writel(boot_addr, boot_reg); |
| 40 | 53 | return 0; |
| @@ -77,7 +77,7 @@ struct platform_device *__init imx_alloc_mx3_camera( · 76 unmodified lines | ||
| 77 | 77 | |
| 78 | 78 | pdev = platform_device_alloc("mx3-camera", 0); |
| 79 | 79 | if (!pdev) |
| 80 | − goto err; | |
| 80 | + return ERR_PTR(-ENOMEM); | |
| 81 | 81 | |
| 82 | 82 | pdev->dev.dma_mask = kmalloc(sizeof(*pdev->dev.dma_mask), GFP_KERNEL); |
| 83 | 83 | if (!pdev->dev.dma_mask) |
| @@ -108,7 +108,18 @@ static int __init mvebu_soc_id_init(void) · 107 unmodified lines | ||
| 108 | 108 | iounmap(pci_base); |
| 109 | 109 | |
| 110 | 110 | res_ioremap: |
| 111 | − clk_disable_unprepare(clk); | |
| 111 | + /* | |
| 112 | + * If the PCIe unit is actually enabled and we have PCI | |
| 113 | + * support in the kernel, we intentionally do not release the | |
| 114 | + * reference to the clock. We want to keep it running since | |
| 115 | + * the bootloader does some PCIe link configuration that the | |
| 116 | + * kernel is for now unable to do, and gating the clock would | |
| 117 | + * make us loose this precious configuration. | |
| 118 | + */ | |
| 119 | + if (!of_device_is_available(child) || !IS_ENABLED(CONFIG_PCI_MVEBU)) { | |
| 120 | + clk_disable_unprepare(clk); | |
| 121 | + clk_put(clk); | |
| 122 | + } | |
| 112 | 123 | |
| 113 | 124 | clk_err: |
| 114 | 125 | of_node_put(child); |
| @@ -142,7 +142,7 @@ __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, · 141 unmodified lines | ||
| 142 | 142 | board_nand_data.nr_parts = nr_parts; |
| 143 | 143 | board_nand_data.devsize = nand_type; |
| 144 | 144 | |
| 145 | − board_nand_data.ecc_opt = OMAP_ECC_BCH8_CODE_HW; | |
| 145 | + board_nand_data.ecc_opt = OMAP_ECC_HAM1_CODE_HW; | |
| 146 | 146 | gpmc_nand_init(&board_nand_data, gpmc_t); |
| 147 | 147 | } |
| 148 | 148 | #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */ |
| @@ -456,7 +456,8 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = { · 455 unmodified lines | ||
| 456 | 456 | .clkdm_name = "dpll4_clkdm", |
| 457 | 457 | }; |
| 458 | 458 | |
| 459 | −DEFINE_STRUCT_CLK(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names, dpll4_m5x2_ck_ops); | |
| 459 | +DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names, | |
| 460 | + dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT); | |
| 460 | 461 | |
| 461 | 462 | static struct clk dpll4_m5x2_ck_3630 = { |
| 462 | 463 | .name = "dpll4_m5x2_ck", |
| @@ -14,6 +14,7 @@ · 13 unmodified lines | ||
| 14 | 14 | #include <linux/cpuidle.h> |
| 15 | 15 | #include <linux/cpu_pm.h> |
| 16 | 16 | #include <linux/export.h> |
| 17 | +#include <linux/clockchips.h> | |
| 17 | 18 | |
| 18 | 19 | #include <asm/cpuidle.h> |
| 19 | 20 | #include <asm/proc-fns.h> |
| @@ -83,6 +84,7 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, · 63 unmodified lines | ||
| 83 | 84 | { |
| 84 | 85 | struct idle_statedata *cx = state_ptr + index; |
| 85 | 86 | u32 mpuss_can_lose_context = 0; |
| 87 | + int cpu_id = smp_processor_id(); | |
| 86 | 88 | |
| 87 | 89 | /* |
| 88 | 90 | * CPU0 has to wait and stay ON until CPU1 is OFF state. |
| @@ -110,6 +112,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, · 21 unmodified lines | ||
| 110 | 112 | mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) && |
| 111 | 113 | (cx->mpu_logic_state == PWRDM_POWER_OFF); |
| 112 | 114 | |
| 115 | + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ENTER, &cpu_id); | |
| 116 | + | |
| 113 | 117 | /* |
| 114 | 118 | * Call idle CPU PM enter notifier chain so that |
| 115 | 119 | * VFP and per CPU interrupt context is saved. |
| @@ -165,6 +169,8 @@ static int omap_enter_idle_coupled(struct cpuidle_device *dev, · 49 unmodified lines | ||
| 165 | 169 | if (dev->cpu == 0 && mpuss_can_lose_context) |
| 166 | 170 | cpu_cluster_pm_exit(); |
| 167 | 171 | |
| 172 | + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_EXIT, &cpu_id); | |
| 173 | + | |
| 168 | 174 | fail: |
| 169 | 175 | cpuidle_coupled_parallel_barrier(dev, &abort_barrier); |
| 170 | 176 | cpu_done[dev->cpu] = false; |
| @@ -172,6 +178,16 @@ fail: · 1 unmodified line | ||
| 172 | 178 | return index; |
| 173 | 179 | } |
| 174 | 180 | |
| 181 | +/* | |
| 182 | + * For each cpu, setup the broadcast timer because local timers | |
| 183 | + * stops for the states above C1. | |
| 184 | + */ | |
| 185 | +static void omap_setup_broadcast_timer(void *arg) | |
| 186 | +{ | |
| 187 | + int cpu = smp_processor_id(); | |
| 188 | + clockevents_notify(CLOCK_EVT_NOTIFY_BROADCAST_ON, &cpu); | |
| 189 | +} | |
| 190 | + | |
| 175 | 191 | static struct cpuidle_driver omap4_idle_driver = { |
| 176 | 192 | .name = "omap4_idle", |
| 177 | 193 | .owner = THIS_MODULE, |
| @@ -189,8 +205,7 @@ static struct cpuidle_driver omap4_idle_driver = { · 11 unmodified lines | ||
| 189 | 205 | /* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */ |
| 190 | 206 | .exit_latency = 328 + 440, |
| 191 | 207 | .target_residency = 960, |
| 192 | − .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | | |
| 193 | − CPUIDLE_FLAG_TIMER_STOP, | |
| 208 | + .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, | |
| 194 | 209 | .enter = omap_enter_idle_coupled, |
| 195 | 210 | .name = "C2", |
| 196 | 211 | .desc = "CPUx OFF, MPUSS CSWR", |
| @@ -199,8 +214,7 @@ static struct cpuidle_driver omap4_idle_driver = { · 2 unmodified lines | ||
| 199 | 214 | /* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */ |
| 200 | 215 | .exit_latency = 460 + 518, |
| 201 | 216 | .target_residency = 1100, |
| 202 | − .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED | | |
| 203 | − CPUIDLE_FLAG_TIMER_STOP, | |
| 217 | + .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED, | |
| 204 | 218 | .enter = omap_enter_idle_coupled, |
| 205 | 219 | .name = "C3", |
| 206 | 220 | .desc = "CPUx OFF, MPUSS OSWR", |
| @@ -231,5 +245,8 @@ int __init omap4_idle_init(void) · 24 unmodified lines | ||
| 231 | 245 | if (!cpu_clkdm[0] || !cpu_clkdm[1]) |
| 232 | 246 | return -ENODEV; |
| 233 | 247 | |
| 248 | + /* Configure the broadcast timer on each cpu */ | |
| 249 | + on_each_cpu(omap_setup_broadcast_timer, NULL, 1); | |
| 250 | + | |
| 234 | 251 | return cpuidle_register(&omap4_idle_driver, cpu_online_mask); |
| 235 | 252 | } |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * Secondary CPU startup routine source file. |
| 3 | 3 | * |
| 4 | − * Copyright (C) 2009 Texas Instruments, Inc. | |
| 4 | + * Copyright (C) 2009-2014 Texas Instruments, Inc. | |
| 5 | 5 | * |
| 6 | 6 | * Author: |
| 7 | 7 | * Santosh Shilimkar <santosh.shilimkar@ti.com> |
| @@ -28,9 +28,13 @@ · 20 unmodified lines | ||
| 28 | 28 | * code. This routine also provides a holding flag into which |
| 29 | 29 | * secondary core is held until we're ready for it to initialise. |
| 30 | 30 | * The primary core will update this flag using a hardware |
| 31 | −+ * register AuxCoreBoot0. | |
| 31 | + * register AuxCoreBoot0. | |
| 32 | 32 | */ |
| 33 | 33 | ENTRY(omap5_secondary_startup) |
| 34 | +.arm | |
| 35 | +THUMB( adr r9, BSYM(wait) ) @ CPU may be entered in ARM mode. | |
| 36 | +THUMB( bx r9 ) @ If this is a Thumb-2 kernel, | |
| 37 | +THUMB( .thumb ) @ switch to Thumb now. | |
| 34 | 38 | wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 |
| 35 | 39 | ldr r0, [r2] |
| 36 | 40 | mov r0, r0, lsr #5 |
| @@ -895,7 +895,7 @@ static struct omap_hwmod omap54xx_mcpdm_hwmod = { · 894 unmodified lines | ||
| 895 | 895 | * current exception. |
| 896 | 896 | */ |
| 897 | 897 | |
| 898 | − .flags = HWMOD_EXT_OPT_MAIN_CLK, | |
| 898 | + .flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE, | |
| 899 | 899 | .main_clk = "pad_clks_ck", |
| 900 | 900 | .prcm = { |
| 901 | 901 | .omap4 = { |
| @@ -21,7 +21,7 @@ struct mv_sata_platform_data; · 20 unmodified lines | ||
| 21 | 21 | #define ORION_MBUS_DEVBUS_BOOT_ATTR 0x0f |
| 22 | 22 | #define ORION_MBUS_DEVBUS_TARGET(cs) 0x01 |
| 23 | 23 | #define ORION_MBUS_DEVBUS_ATTR(cs) (~(1 << cs)) |
| 24 | −#define ORION_MBUS_SRAM_TARGET 0x00 | |
| 24 | +#define ORION_MBUS_SRAM_TARGET 0x09 | |
| 25 | 25 | #define ORION_MBUS_SRAM_ATTR 0x00 |
| 26 | 26 | |
| 27 | 27 | /* |
| @@ -123,6 +123,11 @@ __v7m_setup: · 122 unmodified lines | ||
| 123 | 123 | mov pc, lr |
| 124 | 124 | ENDPROC(__v7m_setup) |
| 125 | 125 | |
| 126 | + .align 2 | |
| 127 | +__v7m_setup_stack: | |
| 128 | + .space 4 * 8 @ 8 registers | |
| 129 | +__v7m_setup_stack_top: | |
| 130 | + | |
| 126 | 131 | define_processor_functions v7m, dabort=nommu_early_abort, pabort=legacy_pabort, nommu=1 |
| 127 | 132 | |
| 128 | 133 | .section ".rodata" |
| @@ -152,6 +157,3 @@ __v7m_proc_info: · 23 unmodified lines | ||
| 152 | 157 | .long nop_cache_fns @ proc_info_list.cache |
| 153 | 158 | .size __v7m_proc_info, . - __v7m_proc_info |
| 154 | 159 | |
| 155 | −__v7m_setup_stack: | |
| 156 | − .space 4 * 8 @ 8 registers | |
| 157 | −__v7m_setup_stack_top: | |
| @@ -70,6 +70,7 @@ static u32 errata; · 69 unmodified lines | ||
| 70 | 70 | |
| 71 | 71 | static struct omap_dma_global_context_registers { |
| 72 | 72 | u32 dma_irqenable_l0; |
| 73 | + u32 dma_irqenable_l1; | |
| 73 | 74 | u32 dma_ocp_sysconfig; |
| 74 | 75 | u32 dma_gcr; |
| 75 | 76 | } omap_dma_global_context; |
| @@ -1973,10 +1974,17 @@ static struct irqaction omap24xx_dma_irq; · 1897 unmodified lines | ||
| 1973 | 1974 | |
| 1974 | 1975 | /*----------------------------------------------------------------------------*/ |
| 1975 | 1976 | |
| 1977 | +/* | |
| 1978 | + * Note that we are currently using only IRQENABLE_L0 and L1. | |
| 1979 | + * As the DSP may be using IRQENABLE_L2 and L3, let's not | |
| 1980 | + * touch those for now. | |
| 1981 | + */ | |
| 1976 | 1982 | void omap_dma_global_context_save(void) |
| 1977 | 1983 | { |
| 1978 | 1984 | omap_dma_global_context.dma_irqenable_l0 = |
| 1979 | 1985 | p->dma_read(IRQENABLE_L0, 0); |
| 1986 | + omap_dma_global_context.dma_irqenable_l1 = | |
| 1987 | + p->dma_read(IRQENABLE_L1, 0); | |
| 1980 | 1988 | omap_dma_global_context.dma_ocp_sysconfig = |
| 1981 | 1989 | p->dma_read(OCP_SYSCONFIG, 0); |
| 1982 | 1990 | omap_dma_global_context.dma_gcr = p->dma_read(GCR, 0); |
| @@ -1991,6 +1999,8 @@ void omap_dma_global_context_restore(void) · 8 unmodified lines | ||
| 1991 | 1999 | OCP_SYSCONFIG, 0); |
| 1992 | 2000 | p->dma_write(omap_dma_global_context.dma_irqenable_l0, |
| 1993 | 2001 | IRQENABLE_L0, 0); |
| 2002 | + p->dma_write(omap_dma_global_context.dma_irqenable_l1, | |
| 2003 | + IRQENABLE_L1, 0); | |
| 1994 | 2004 | |
| 1995 | 2005 | if (IS_DMA_ERRATA(DMA_ROMCODE_BUG)) |
| 1996 | 2006 | p->dma_write(0x3 , IRQSTATUS_L0, 0); |
| @@ -138,6 +138,7 @@ static inline void *phys_to_virt(phys_addr_t x) · 137 unmodified lines | ||
| 138 | 138 | #define __pa(x) __virt_to_phys((unsigned long)(x)) |
| 139 | 139 | #define __va(x) ((void *)__phys_to_virt((phys_addr_t)(x))) |
| 140 | 140 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
| 141 | +#define virt_to_pfn(x) __phys_to_pfn(__virt_to_phys(x)) | |
| 141 | 142 | |
| 142 | 143 | /* |
| 143 | 144 | * virt_to_page(k) convert a _valid_ virtual address to struct page * |
| @@ -266,7 +266,7 @@ static inline pmd_t pte_pmd(pte_t pte) · 265 unmodified lines | ||
| 266 | 266 | |
| 267 | 267 | #define pmd_page(pmd) pfn_to_page(__phys_to_pfn(pmd_val(pmd) & PHYS_MASK)) |
| 268 | 268 | |
| 269 | −#define set_pmd_at(mm, addr, pmdp, pmd) set_pmd(pmdp, pmd) | |
| 269 | +#define set_pmd_at(mm, addr, pmdp, pmd) set_pte_at(mm, addr, (pte_t *)pmdp, pmd_pte(pmd)) | |
| 270 | 270 | |
| 271 | 271 | static inline int has_transparent_hugepage(void) |
| 272 | 272 | { |
| @@ -97,11 +97,15 @@ static bool migrate_one_irq(struct irq_desc *desc) · 96 unmodified lines | ||
| 97 | 97 | if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity)) |
| 98 | 98 | return false; |
| 99 | 99 | |
| 100 | − if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { | |
| 101 | − affinity = cpu_online_mask; | |
| 100 | + if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) | |
| 102 | 101 | ret = true; |
| 103 | − } | |
| 104 | 102 | |
| 103 | + /* | |
| 104 | + * when using forced irq_set_affinity we must ensure that the cpu | |
| 105 | + * being offlined is not present in the affinity mask, it may be | |
| 106 | + * selected as the target CPU otherwise | |
| 107 | + */ | |
| 108 | + affinity = cpu_online_mask; | |
| 105 | 109 | c = irq_data_get_irq_chip(d); |
| 106 | 110 | if (!c->irq_set_affinity) |
| 107 | 111 | pr_debug("IRQ%u: unable to set affinity\n", d->irq); |
| @@ -51,7 +51,11 @@ int pmd_huge(pmd_t pmd) · 50 unmodified lines | ||
| 51 | 51 | |
| 52 | 52 | int pud_huge(pud_t pud) |
| 53 | 53 | { |
| 54 | +#ifndef __PAGETABLE_PMD_FOLDED | |
| 54 | 55 | return !(pud_val(pud) & PUD_TABLE_BIT); |
| 56 | +#else | |
| 57 | + return 0; | |
| 58 | +#endif | |
| 55 | 59 | } |
| 56 | 60 | |
| 57 | 61 | int pmd_huge_support(void) |
| @@ -11,7 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | |
| 12 | 12 | |
| 13 | 13 | |
| 14 | −#define NR_syscalls 314 /* length of syscall table */ | |
| 14 | +#define NR_syscalls 315 /* length of syscall table */ | |
| 15 | 15 | |
| 16 | 16 | /* |
| 17 | 17 | * The following defines stop scripts/checksyscalls.sh from complaining about |
| @@ -327,5 +327,6 @@ · 326 unmodified lines | ||
| 327 | 327 | #define __NR_finit_module 1335 |
| 328 | 328 | #define __NR_sched_setattr 1336 |
| 329 | 329 | #define __NR_sched_getattr 1337 |
| 330 | +#define __NR_renameat2 1338 | |
| 330 | 331 | |
| 331 | 332 | #endif /* _UAPI_ASM_IA64_UNISTD_H */ |
| @@ -1775,6 +1775,7 @@ sys_call_table: · 1774 unmodified lines | ||
| 1775 | 1775 | data8 sys_finit_module // 1335 |
| 1776 | 1776 | data8 sys_sched_setattr |
| 1777 | 1777 | data8 sys_sched_getattr |
| 1778 | + data8 sys_renameat2 | |
| 1778 | 1779 | |
| 1779 | 1780 | .org sys_call_table + 8*NR_syscalls // guard against failures to increase NR_syscalls |
| 1780 | 1781 | #endif /* __IA64_ASM_PARAVIRTUALIZED_NATIVE */ |
| @@ -4,7 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | #include <uapi/asm/unistd.h> |
| 5 | 5 | |
| 6 | 6 | |
| 7 | −#define NR_syscalls 351 | |
| 7 | +#define NR_syscalls 352 | |
| 8 | 8 | |
| 9 | 9 | #define __ARCH_WANT_OLD_READDIR |
| 10 | 10 | #define __ARCH_WANT_OLD_STAT |
| @@ -356,5 +356,6 @@ · 355 unmodified lines | ||
| 356 | 356 | #define __NR_finit_module 348 |
| 357 | 357 | #define __NR_sched_setattr 349 |
| 358 | 358 | #define __NR_sched_getattr 350 |
| 359 | +#define __NR_renameat2 351 | |
| 359 | 360 | |
| 360 | 361 | #endif /* _UAPI_ASM_M68K_UNISTD_H_ */ |
| @@ -371,4 +371,5 @@ ENTRY(sys_call_table) · 370 unmodified lines | ||
| 371 | 371 | .long sys_finit_module |
| 372 | 372 | .long sys_sched_setattr |
| 373 | 373 | .long sys_sched_getattr /* 350 */ |
| 374 | + .long sys_renameat2 | |
| 374 | 375 | |
| @@ -15,6 +15,7 @@ static inline void wr_fence(void) · 14 unmodified lines | ||
| 15 | 15 | volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE; |
| 16 | 16 | barrier(); |
| 17 | 17 | *flushptr = 0; |
| 18 | + barrier(); | |
| 18 | 19 | } |
| 19 | 20 | |
| 20 | 21 | #else /* CONFIG_METAG_META21 */ |
| @@ -35,6 +36,7 @@ static inline void wr_fence(void) · 14 unmodified lines | ||
| 35 | 36 | *flushptr = 0; |
| 36 | 37 | *flushptr = 0; |
| 37 | 38 | *flushptr = 0; |
| 39 | + barrier(); | |
| 38 | 40 | } |
| 39 | 41 | |
| 40 | 42 | #endif /* !CONFIG_METAG_META21 */ |
| @@ -68,6 +70,7 @@ static inline void fence(void) · 27 unmodified lines | ||
| 68 | 70 | volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK; |
| 69 | 71 | barrier(); |
| 70 | 72 | *flushptr = 0; |
| 73 | + barrier(); | |
| 71 | 74 | } |
| 72 | 75 | #define smp_mb() fence() |
| 73 | 76 | #define smp_rmb() fence() |
| @@ -22,6 +22,8 @@ · 21 unmodified lines | ||
| 22 | 22 | /* Add an extra page of padding at the top of the stack for the guard page. */ |
| 23 | 23 | #define STACK_TOP (TASK_SIZE - PAGE_SIZE) |
| 24 | 24 | #define STACK_TOP_MAX STACK_TOP |
| 25 | +/* Maximum virtual space for stack */ | |
| 26 | +#define STACK_SIZE_MAX (CONFIG_MAX_STACK_SIZE_MB*1024*1024) | |
| 25 | 27 | |
| 26 | 28 | /* This decides where the kernel will search for a free chunk of vm |
| 27 | 29 | * space during mmap's. |
| @@ -4,11 +4,11 @@ include include/uapi/asm-generic/Kbuild.asm · 3 unmodified lines | ||
| 4 | 4 | header-y += byteorder.h |
| 5 | 5 | header-y += ech.h |
| 6 | 6 | header-y += ptrace.h |
| 7 | −header-y += resource.h | |
| 8 | 7 | header-y += sigcontext.h |
| 9 | 8 | header-y += siginfo.h |
| 10 | 9 | header-y += swab.h |
| 11 | 10 | header-y += unistd.h |
| 12 | 11 | |
| 13 | 12 | generic-y += mman.h |
| 13 | +generic-y += resource.h | |
| 14 | 14 | generic-y += setup.h |
| @@ -1,7 +0,0 @@ | ||
| 1 | −#ifndef _UAPI_METAG_RESOURCE_H | |
| 2 | −#define _UAPI_METAG_RESOURCE_H | |
| 3 | − | |
| 4 | −#define _STK_LIM_MAX (1 << 28) | |
| 5 | −#include <asm-generic/resource.h> | |
| 6 | − | |
| 7 | −#endif /* _UAPI_METAG_RESOURCE_H */ | |
| @@ -151,7 +151,7 @@ cflags-$(CONFIG_CPU_NEVADA) += $(call cc-option,-march=rm5200,-march=r5000) \ · 150 unmodified lines | ||
| 151 | 151 | -Wa,--trap |
| 152 | 152 | cflags-$(CONFIG_CPU_RM7000) += $(call cc-option,-march=rm7000,-march=r5000) \ |
| 153 | 153 | -Wa,--trap |
| 154 | −cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1,-march=r5000) \ | |
| 154 | +cflags-$(CONFIG_CPU_SB1) += $(call cc-option,-march=sb1 -mno-mdmx -mno-mips3d,-march=r5000) \ | |
| 155 | 155 | -Wa,--trap |
| 156 | 156 | cflags-$(CONFIG_CPU_R8000) += -march=r8000 -Wa,--trap |
| 157 | 157 | cflags-$(CONFIG_CPU_R10000) += $(call cc-option,-march=r10000,-march=r8000) \ |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <asm/addrspace.h> |
| 22 | 22 | #include <asm/bootinfo.h> |
| 23 | 23 | #include <asm/cpu.h> |
| 24 | +#include <asm/cpu-type.h> | |
| 24 | 25 | #include <asm/irq_regs.h> |
| 25 | 26 | #include <asm/processor.h> |
| 26 | 27 | #include <asm/ptrace.h> |
| @@ -19,6 +19,7 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/types.h> |
| 20 | 20 | |
| 21 | 21 | #include <asm/addrspace.h> |
| 22 | +#include <asm/cpu-type.h> | |
| 22 | 23 | #include <asm/irq_regs.h> |
| 23 | 24 | #include <asm/ptrace.h> |
| 24 | 25 | #include <asm/traps.h> |
| @@ -6,4 +6,3 @@ · 5 unmodified lines | ||
| 6 | 6 | lib-y += init.o memory.o cmdline.o identify.o console.o |
| 7 | 7 | |
| 8 | 8 | lib-$(CONFIG_32BIT) += locore.o |
| 9 | −lib-$(CONFIG_64BIT) += call_o32.o | |
| @@ -1,89 +0,0 @@ | ||
| 1 | −/* | |
| 2 | − * O32 interface for the 64 (or N32) ABI. | |
| 3 | − * | |
| 4 | − * Copyright (C) 2002 Maciej W. Rozycki | |
| 5 | − * | |
| 6 | − * This program is free software; you can redistribute it and/or | |
| 7 | − * modify it under the terms of the GNU General Public License | |
| 8 | − * as published by the Free Software Foundation; either version | |
| 9 | − * 2 of the License, or (at your option) any later version. | |
| 10 | − */ | |
| 11 | − | |
| 12 | −#include <asm/asm.h> | |
| 13 | −#include <asm/regdef.h> | |
| 14 | − | |
| 15 | −/* Maximum number of arguments supported. Must be even! */ | |
| 16 | −#define O32_ARGC 32 | |
| 17 | −/* Number of static registers we save. */ | |
| 18 | −#define O32_STATC 11 | |
| 19 | −/* Frame size for both of the above. */ | |
| 20 | −#define O32_FRAMESZ (4 * O32_ARGC + SZREG * O32_STATC) | |
| 21 | − | |
| 22 | − .text | |
| 23 | − | |
| 24 | −/* | |
| 25 | − * O32 function call dispatcher, for interfacing 32-bit ROM routines. | |
| 26 | − * | |
| 27 | − * The standard 64 (N32) calling sequence is supported, with a0 | |
| 28 | − * holding a function pointer, a1-a7 -- its first seven arguments | |
| 29 | − * and the stack -- remaining ones (up to O32_ARGC, including a1-a7). | |
| 30 | − * Static registers, gp and fp are preserved, v0 holds a result. | |
| 31 | − * This code relies on the called o32 function for sp and ra | |
| 32 | − * restoration and thus both this dispatcher and the current stack | |
| 33 | − * have to be placed in a KSEGx (or KUSEG) address space. Any | |
| 34 | − * pointers passed have to point to addresses within one of these | |
| 35 | − * spaces as well. | |
| 36 | − */ | |
| 37 | −NESTED(call_o32, O32_FRAMESZ, ra) | |
| 38 | − REG_SUBU sp,O32_FRAMESZ | |
| 39 | − | |
| 40 | − REG_S ra,O32_FRAMESZ-1*SZREG(sp) | |
| 41 | − REG_S fp,O32_FRAMESZ-2*SZREG(sp) | |
| 42 | − REG_S gp,O32_FRAMESZ-3*SZREG(sp) | |
| 43 | − REG_S s7,O32_FRAMESZ-4*SZREG(sp) | |
| 44 | − REG_S s6,O32_FRAMESZ-5*SZREG(sp) | |
| 45 | − REG_S s5,O32_FRAMESZ-6*SZREG(sp) | |
| 46 | − REG_S s4,O32_FRAMESZ-7*SZREG(sp) | |
| 47 | − REG_S s3,O32_FRAMESZ-8*SZREG(sp) | |
| 48 | − REG_S s2,O32_FRAMESZ-9*SZREG(sp) | |
| 49 | − REG_S s1,O32_FRAMESZ-10*SZREG(sp) | |
| 50 | − REG_S s0,O32_FRAMESZ-11*SZREG(sp) | |
| 51 | − | |
| 52 | − move jp,a0 | |
| 53 | − | |
| 54 | − sll a0,a1,zero | |
| 55 | − sll a1,a2,zero | |
| 56 | − sll a2,a3,zero | |
| 57 | − sll a3,a4,zero | |
| 58 | − sw a5,0x10(sp) | |
| 59 | − sw a6,0x14(sp) | |
| 60 | − sw a7,0x18(sp) | |
| 61 | − | |
| 62 | − PTR_LA t0,O32_FRAMESZ(sp) | |
| 63 | − PTR_LA t1,0x1c(sp) | |
| 64 | − li t2,O32_ARGC-7 | |
| 65 | −1: | |
| 66 | − lw t3,(t0) | |
| 67 | − REG_ADDU t0,SZREG | |
| 68 | − sw t3,(t1) | |
| 69 | − REG_SUBU t2,1 | |
| 70 | − REG_ADDU t1,4 | |
| 71 | − bnez t2,1b | |
| 72 | − | |
| 73 | − jalr jp | |
| 74 | − | |
| 75 | − REG_L s0,O32_FRAMESZ-11*SZREG(sp) | |
| 76 | − REG_L s1,O32_FRAMESZ-10*SZREG(sp) | |
| 77 | − REG_L s2,O32_FRAMESZ-9*SZREG(sp) | |
| 78 | − REG_L s3,O32_FRAMESZ-8*SZREG(sp) | |
| 79 | − REG_L s4,O32_FRAMESZ-7*SZREG(sp) | |
| 80 | − REG_L s5,O32_FRAMESZ-6*SZREG(sp) | |
| 81 | − REG_L s6,O32_FRAMESZ-5*SZREG(sp) | |
| 82 | − REG_L s7,O32_FRAMESZ-4*SZREG(sp) | |
| 83 | − REG_L gp,O32_FRAMESZ-3*SZREG(sp) | |
| 84 | − REG_L fp,O32_FRAMESZ-2*SZREG(sp) | |
| 85 | − REG_L ra,O32_FRAMESZ-1*SZREG(sp) | |
| 86 | − | |
| 87 | − REG_ADDU sp,O32_FRAMESZ | |
| 88 | − jr ra | |
| 89 | −END(call_o32) | |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | /* |
| 2 | 2 | * O32 interface for the 64 (or N32) ABI. |
| 3 | 3 | * |
| 4 | − * Copyright (C) 2002 Maciej W. Rozycki | |
| 4 | + * Copyright (C) 2002, 2014 Maciej W. Rozycki | |
| 5 | 5 | * |
| 6 | 6 | * This program is free software; you can redistribute it and/or |
| 7 | 7 | * modify it under the terms of the GNU General Public License |
| @@ -12,28 +12,37 @@ · 4 unmodified lines | ||
| 12 | 12 | #include <asm/asm.h> |
| 13 | 13 | #include <asm/regdef.h> |
| 14 | 14 | |
| 15 | +/* O32 register size. */ | |
| 16 | +#define O32_SZREG 4 | |
| 15 | 17 | /* Maximum number of arguments supported. Must be even! */ |
| 16 | 18 | #define O32_ARGC 32 |
| 17 | −/* Number of static registers we save. */ | |
| 19 | +/* Number of static registers we save. */ | |
| 18 | 20 | #define O32_STATC 11 |
| 19 | −/* Frame size for static register */ | |
| 20 | −#define O32_FRAMESZ (SZREG * O32_STATC) | |
| 21 | −/* Frame size on new stack */ | |
| 22 | −#define O32_FRAMESZ_NEW (SZREG + 4 * O32_ARGC) | |
| 21 | +/* Argument area frame size. */ | |
| 22 | +#define O32_ARGSZ (O32_SZREG * O32_ARGC) | |
| 23 | +/* Static register save area frame size. */ | |
| 24 | +#define O32_STATSZ (SZREG * O32_STATC) | |
| 25 | +/* Stack pointer register save area frame size. */ | |
| 26 | +#define O32_SPSZ SZREG | |
| 27 | +/* Combined area frame size. */ | |
| 28 | +#define O32_FRAMESZ (O32_ARGSZ + O32_SPSZ + O32_STATSZ) | |
| 29 | +/* Switched stack frame size. */ | |
| 30 | +#define O32_NFRAMESZ (O32_ARGSZ + O32_SPSZ) | |
| 23 | 31 | |
| 24 | 32 | .text |
| 25 | 33 | |
| 26 | 34 | /* |
| 27 | 35 | * O32 function call dispatcher, for interfacing 32-bit ROM routines. |
| 28 | 36 | * |
| 29 | − * The standard 64 (N32) calling sequence is supported, with a0 | |
| 30 | − * holding a function pointer, a1 a new stack pointer, a2-a7 -- its | |
| 31 | − * first six arguments and the stack -- remaining ones (up to O32_ARGC, | |
| 32 | − * including a2-a7). Static registers, gp and fp are preserved, v0 holds | |
| 33 | − * a result. This code relies on the called o32 function for sp and ra | |
| 34 | − * restoration and this dispatcher has to be placed in a KSEGx (or KUSEG) | |
| 35 | − * address space. Any pointers passed have to point to addresses within | |
| 36 | − * one of these spaces as well. | |
| 37 | + * The standard 64 (N32) calling sequence is supported, with a0 holding | |
| 38 | + * a function pointer, a1 a pointer to the new stack to call the | |
| 39 | + * function with or 0 if no stack switching is requested, a2-a7 -- the | |
| 40 | + * function call's first six arguments, and the stack -- the remaining | |
| 41 | + * arguments (up to O32_ARGC, including a2-a7). Static registers, gp | |
| 42 | + * and fp are preserved, v0 holds the result. This code relies on the | |
| 43 | + * called o32 function for sp and ra restoration and this dispatcher has | |
| 44 | + * to be placed in a KSEGx (or KUSEG) address space. Any pointers | |
| 45 | + * passed have to point to addresses within one of these spaces as well. | |
| 37 | 46 | */ |
| 38 | 47 | NESTED(call_o32, O32_FRAMESZ, ra) |
| 39 | 48 | REG_SUBU sp,O32_FRAMESZ |
| @@ -51,32 +60,36 @@ NESTED(call_o32, O32_FRAMESZ, ra) · 11 unmodified lines | ||
| 51 | 60 | REG_S s0,O32_FRAMESZ-11*SZREG(sp) |
| 52 | 61 | |
| 53 | 62 | move jp,a0 |
| 54 | − REG_SUBU s0,a1,O32_FRAMESZ_NEW | |
| 55 | − REG_S sp,O32_FRAMESZ_NEW-1*SZREG(s0) | |
| 63 | + | |
| 64 | + move fp,sp | |
| 65 | + beqz a1,0f | |
| 66 | + REG_SUBU fp,a1,O32_NFRAMESZ | |
| 67 | +0: | |
| 68 | + REG_S sp,O32_NFRAMESZ-1*SZREG(fp) | |
| 56 | 69 | |
| 57 | 70 | sll a0,a2,zero |
| 58 | 71 | sll a1,a3,zero |
| 59 | 72 | sll a2,a4,zero |
| 60 | 73 | sll a3,a5,zero |
| 61 | − sw a6,0x10(s0) | |
| 62 | − sw a7,0x14(s0) | |
| 74 | + sw a6,4*O32_SZREG(fp) | |
| 75 | + sw a7,5*O32_SZREG(fp) | |
| 63 | 76 | |
| 64 | 77 | PTR_LA t0,O32_FRAMESZ(sp) |
| 65 | − PTR_LA t1,0x18(s0) | |
| 78 | + PTR_LA t1,6*O32_SZREG(fp) | |
| 66 | 79 | li t2,O32_ARGC-6 |
| 67 | 80 | 1: |
| 68 | 81 | lw t3,(t0) |
| 69 | 82 | REG_ADDU t0,SZREG |
| 70 | 83 | sw t3,(t1) |
| 71 | 84 | REG_SUBU t2,1 |
| 72 | − REG_ADDU t1,4 | |
| 85 | + REG_ADDU t1,O32_SZREG | |
| 73 | 86 | bnez t2,1b |
| 74 | 87 | |
| 75 | − move sp,s0 | |
| 88 | + move sp,fp | |
| 76 | 89 | |
| 77 | 90 | jalr jp |
| 78 | 91 | |
| 79 | − REG_L sp,O32_FRAMESZ_NEW-1*SZREG(sp) | |
| 92 | + REG_L sp,O32_NFRAMESZ-1*SZREG(sp) | |
| 80 | 93 | |
| 81 | 94 | REG_L s0,O32_FRAMESZ-11*SZREG(sp) |
| 82 | 95 | REG_L s1,O32_FRAMESZ-10*SZREG(sp) |
| @@ -40,7 +40,8 @@ · 39 unmodified lines | ||
| 40 | 40 | |
| 41 | 41 | #ifdef CONFIG_64BIT |
| 42 | 42 | |
| 43 | −static u8 o32_stk[16384]; | |
| 43 | +/* O32 stack has to be 8-byte aligned. */ | |
| 44 | +static u64 o32_stk[4096]; | |
| 44 | 45 | #define O32_STK &o32_stk[sizeof(o32_stk)] |
| 45 | 46 | |
| 46 | 47 | #define __PROM_O32(fun, arg) fun arg __asm__(#fun); \ |
| @@ -39,14 +39,14 @@ struct cache_desc { · 38 unmodified lines | ||
| 39 | 39 | #define MIPS_CACHE_PINDEX 0x00000020 /* Physically indexed cache */ |
| 40 | 40 | |
| 41 | 41 | struct cpuinfo_mips { |
| 42 | − unsigned int udelay_val; | |
| 43 | − unsigned int asid_cache; | |
| 42 | + unsigned long asid_cache; | |
| 44 | 43 | |
| 45 | 44 | /* |
| 46 | 45 | * Capability and feature descriptor structure for MIPS CPU |
| 47 | 46 | */ |
| 48 | 47 | unsigned long options; |
| 49 | 48 | unsigned long ases; |
| 49 | + unsigned int udelay_val; | |
| 50 | 50 | unsigned int processor_id; |
| 51 | 51 | unsigned int fpu_id; |
| 52 | 52 | unsigned int msa_id; |
| @@ -113,31 +113,31 @@ extern int (*__pmax_close)(int); · 112 unmodified lines | ||
| 113 | 113 | #define __DEC_PROM_O32(fun, arg) fun arg __asm__(#fun); \ |
| 114 | 114 | __asm__(#fun " = call_o32") |
| 115 | 115 | |
| 116 | −int __DEC_PROM_O32(_rex_bootinit, (int (*)(void))); | |
| 117 | −int __DEC_PROM_O32(_rex_bootread, (int (*)(void))); | |
| 118 | −int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), memmap *)); | |
| 116 | +int __DEC_PROM_O32(_rex_bootinit, (int (*)(void), void *)); | |
| 117 | +int __DEC_PROM_O32(_rex_bootread, (int (*)(void), void *)); | |
| 118 | +int __DEC_PROM_O32(_rex_getbitmap, (int (*)(memmap *), void *, memmap *)); | |
| 119 | 119 | unsigned long *__DEC_PROM_O32(_rex_slot_address, |
| 120 | − (unsigned long *(*)(int), int)); | |
| 121 | −void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void))); | |
| 122 | −int __DEC_PROM_O32(_rex_getsysid, (int (*)(void))); | |
| 123 | −void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void))); | |
| 124 | − | |
| 125 | −int __DEC_PROM_O32(_prom_getchar, (int (*)(void))); | |
| 126 | −char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), char *)); | |
| 127 | −int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), char *, ...)); | |
| 128 | − | |
| 129 | − | |
| 130 | −#define rex_bootinit() _rex_bootinit(__rex_bootinit) | |
| 131 | −#define rex_bootread() _rex_bootread(__rex_bootread) | |
| 132 | −#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, x) | |
| 133 | −#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, x) | |
| 134 | −#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo) | |
| 135 | −#define rex_getsysid() _rex_getsysid(__rex_getsysid) | |
| 136 | −#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache) | |
| 137 | − | |
| 138 | −#define prom_getchar() _prom_getchar(__prom_getchar) | |
| 139 | −#define prom_getenv(x) _prom_getenv(__prom_getenv, x) | |
| 140 | −#define prom_printf(x...) _prom_printf(__prom_printf, x) | |
| 120 | + (unsigned long *(*)(int), void *, int)); | |
| 121 | +void *__DEC_PROM_O32(_rex_gettcinfo, (void *(*)(void), void *)); | |
| 122 | +int __DEC_PROM_O32(_rex_getsysid, (int (*)(void), void *)); | |
| 123 | +void __DEC_PROM_O32(_rex_clear_cache, (void (*)(void), void *)); | |
| 124 | + | |
| 125 | +int __DEC_PROM_O32(_prom_getchar, (int (*)(void), void *)); | |
| 126 | +char *__DEC_PROM_O32(_prom_getenv, (char *(*)(char *), void *, char *)); | |
| 127 | +int __DEC_PROM_O32(_prom_printf, (int (*)(char *, ...), void *, char *, ...)); | |
| 128 | + | |
| 129 | + | |
| 130 | +#define rex_bootinit() _rex_bootinit(__rex_bootinit, NULL) | |
| 131 | +#define rex_bootread() _rex_bootread(__rex_bootread, NULL) | |
| 132 | +#define rex_getbitmap(x) _rex_getbitmap(__rex_getbitmap, NULL, x) | |
| 133 | +#define rex_slot_address(x) _rex_slot_address(__rex_slot_address, NULL, x) | |
| 134 | +#define rex_gettcinfo() _rex_gettcinfo(__rex_gettcinfo, NULL) | |
| 135 | +#define rex_getsysid() _rex_getsysid(__rex_getsysid, NULL) | |
| 136 | +#define rex_clear_cache() _rex_clear_cache(__rex_clear_cache, NULL) | |
| 137 | + | |
| 138 | +#define prom_getchar() _prom_getchar(__prom_getchar, NULL) | |
| 139 | +#define prom_getenv(x) _prom_getenv(__prom_getenv, NULL, x) | |
| 140 | +#define prom_printf(x...) _prom_printf(__prom_printf, NULL, x) | |
| 141 | 141 | |
| 142 | 142 | #else /* !CONFIG_64BIT */ |
| 143 | 143 | |
| @@ -1,56 +0,0 @@ | ||
| 1 | −/* | |
| 2 | − * Copyright (C) 2004 by Basler Vision Technologies AG | |
| 3 | − * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | |
| 4 | − * | |
| 5 | − * This program is free software; you can redistribute it and/or modify | |
| 6 | − * it under the terms of the GNU General Public License as published by | |
| 7 | − * the Free Software Foundation; either version 2 of the License, or | |
| 8 | − * (at your option) any later version. | |
| 9 | − * | |
| 10 | − * This program is distributed in the hope that it will be useful, | |
| 11 | − * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 12 | − * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | − * GNU General Public License for more details. | |
| 14 | − * | |
| 15 | − * You should have received a copy of the GNU General Public License | |
| 16 | − * along with this program; if not, write to the Free Software | |
| 17 | − * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
| 18 | − */ | |
| 19 | − | |
| 20 | −#if !defined(_ASM_RM9K_OCD_H) | |
| 21 | −#define _ASM_RM9K_OCD_H | |
| 22 | − | |
| 23 | −#include <linux/types.h> | |
| 24 | −#include <linux/spinlock.h> | |
| 25 | −#include <asm/io.h> | |
| 26 | − | |
| 27 | −extern volatile void __iomem * const ocd_base; | |
| 28 | −extern volatile void __iomem * const titan_base; | |
| 29 | − | |
| 30 | −#define ocd_addr(__x__) (ocd_base + (__x__)) | |
| 31 | −#define titan_addr(__x__) (titan_base + (__x__)) | |
| 32 | −#define scram_addr(__x__) (scram_base + (__x__)) | |
| 33 | − | |
| 34 | −/* OCD register access */ | |
| 35 | −#define ocd_readl(__offs__) __raw_readl(ocd_addr(__offs__)) | |
| 36 | −#define ocd_readw(__offs__) __raw_readw(ocd_addr(__offs__)) | |
| 37 | −#define ocd_readb(__offs__) __raw_readb(ocd_addr(__offs__)) | |
| 38 | −#define ocd_writel(__val__, __offs__) \ | |
| 39 | − __raw_writel((__val__), ocd_addr(__offs__)) | |
| 40 | −#define ocd_writew(__val__, __offs__) \ | |
| 41 | − __raw_writew((__val__), ocd_addr(__offs__)) | |
| 42 | −#define ocd_writeb(__val__, __offs__) \ | |
| 43 | − __raw_writeb((__val__), ocd_addr(__offs__)) | |
| 44 | − | |
| 45 | −/* TITAN register access - 32 bit-wide only */ | |
| 46 | −#define titan_readl(__offs__) __raw_readl(titan_addr(__offs__)) | |
| 47 | −#define titan_writel(__val__, __offs__) \ | |
| 48 | − __raw_writel((__val__), titan_addr(__offs__)) | |
| 49 | − | |
| 50 | −/* Protect access to shared TITAN registers */ | |
| 51 | −extern spinlock_t titan_lock; | |
| 52 | −extern int titan_irqflags; | |
| 53 | −#define lock_titan_regs() spin_lock_irqsave(&titan_lock, titan_irqflags) | |
| 54 | −#define unlock_titan_regs() spin_unlock_irqrestore(&titan_lock, titan_irqflags) | |
| 55 | − | |
| 56 | −#endif /* !defined(_ASM_RM9K_OCD_H) */ | |
| @@ -133,6 +133,8 @@ static inline int syscall_get_arch(void) · 132 unmodified lines | ||
| 133 | 133 | #ifdef CONFIG_64BIT |
| 134 | 134 | if (!test_thread_flag(TIF_32BIT_REGS)) |
| 135 | 135 | arch |= __AUDIT_ARCH_64BIT; |
| 136 | + if (test_thread_flag(TIF_32BIT_ADDR)) | |
| 137 | + arch |= __AUDIT_ARCH_CONVENTION_MIPS64_N32; | |
| 136 | 138 | #endif |
| 137 | 139 | #if defined(__LITTLE_ENDIAN) |
| 138 | 140 | arch |= __AUDIT_ARCH_LE; |
| @@ -484,13 +484,13 @@ enum MIPS6e_i8_func { · 483 unmodified lines | ||
| 484 | 484 | * Damn ... bitfields depend from byteorder :-( |
| 485 | 485 | */ |
| 486 | 486 | #ifdef __MIPSEB__ |
| 487 | −#define BITFIELD_FIELD(field, more) \ | |
| 487 | +#define __BITFIELD_FIELD(field, more) \ | |
| 488 | 488 | field; \ |
| 489 | 489 | more |
| 490 | 490 | |
| 491 | 491 | #elif defined(__MIPSEL__) |
| 492 | 492 | |
| 493 | −#define BITFIELD_FIELD(field, more) \ | |
| 493 | +#define __BITFIELD_FIELD(field, more) \ | |
| 494 | 494 | more \ |
| 495 | 495 | field; |
| 496 | 496 | |
| @@ -499,112 +499,112 @@ enum MIPS6e_i8_func { · 2 unmodified lines | ||
| 499 | 499 | #endif |
| 500 | 500 | |
| 501 | 501 | struct j_format { |
| 502 | − BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ | |
| 503 | − BITFIELD_FIELD(unsigned int target : 26, | |
| 502 | + __BITFIELD_FIELD(unsigned int opcode : 6, /* Jump format */ | |
| 503 | + __BITFIELD_FIELD(unsigned int target : 26, | |
| 504 | 504 | ;)) |
| 505 | 505 | }; |
| 506 | 506 | |
| 507 | 507 | struct i_format { /* signed immediate format */ |
| 508 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 509 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 510 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 511 | − BITFIELD_FIELD(signed int simmediate : 16, | |
| 508 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 509 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 510 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 511 | + __BITFIELD_FIELD(signed int simmediate : 16, | |
| 512 | 512 | ;)))) |
| 513 | 513 | }; |
| 514 | 514 | |
| 515 | 515 | struct u_format { /* unsigned immediate format */ |
| 516 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 517 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 518 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 519 | − BITFIELD_FIELD(unsigned int uimmediate : 16, | |
| 516 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 517 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 518 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 519 | + __BITFIELD_FIELD(unsigned int uimmediate : 16, | |
| 520 | 520 | ;)))) |
| 521 | 521 | }; |
| 522 | 522 | |
| 523 | 523 | struct c_format { /* Cache (>= R6000) format */ |
| 524 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 525 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 526 | − BITFIELD_FIELD(unsigned int c_op : 3, | |
| 527 | − BITFIELD_FIELD(unsigned int cache : 2, | |
| 528 | − BITFIELD_FIELD(unsigned int simmediate : 16, | |
| 524 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 525 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 526 | + __BITFIELD_FIELD(unsigned int c_op : 3, | |
| 527 | + __BITFIELD_FIELD(unsigned int cache : 2, | |
| 528 | + __BITFIELD_FIELD(unsigned int simmediate : 16, | |
| 529 | 529 | ;))))) |
| 530 | 530 | }; |
| 531 | 531 | |
| 532 | 532 | struct r_format { /* Register format */ |
| 533 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 534 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 535 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 536 | − BITFIELD_FIELD(unsigned int rd : 5, | |
| 537 | − BITFIELD_FIELD(unsigned int re : 5, | |
| 538 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 533 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 534 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 535 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 536 | + __BITFIELD_FIELD(unsigned int rd : 5, | |
| 537 | + __BITFIELD_FIELD(unsigned int re : 5, | |
| 538 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 539 | 539 | ;)))))) |
| 540 | 540 | }; |
| 541 | 541 | |
| 542 | 542 | struct p_format { /* Performance counter format (R10000) */ |
| 543 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 544 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 545 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 546 | − BITFIELD_FIELD(unsigned int rd : 5, | |
| 547 | − BITFIELD_FIELD(unsigned int re : 5, | |
| 548 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 543 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 544 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 545 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 546 | + __BITFIELD_FIELD(unsigned int rd : 5, | |
| 547 | + __BITFIELD_FIELD(unsigned int re : 5, | |
| 548 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 549 | 549 | ;)))))) |
| 550 | 550 | }; |
| 551 | 551 | |
| 552 | 552 | struct f_format { /* FPU register format */ |
| 553 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 554 | − BITFIELD_FIELD(unsigned int : 1, | |
| 555 | − BITFIELD_FIELD(unsigned int fmt : 4, | |
| 556 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 557 | − BITFIELD_FIELD(unsigned int rd : 5, | |
| 558 | − BITFIELD_FIELD(unsigned int re : 5, | |
| 559 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 553 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 554 | + __BITFIELD_FIELD(unsigned int : 1, | |
| 555 | + __BITFIELD_FIELD(unsigned int fmt : 4, | |
| 556 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 557 | + __BITFIELD_FIELD(unsigned int rd : 5, | |
| 558 | + __BITFIELD_FIELD(unsigned int re : 5, | |
| 559 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 560 | 560 | ;))))))) |
| 561 | 561 | }; |
| 562 | 562 | |
| 563 | 563 | struct ma_format { /* FPU multiply and add format (MIPS IV) */ |
| 564 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 565 | − BITFIELD_FIELD(unsigned int fr : 5, | |
| 566 | − BITFIELD_FIELD(unsigned int ft : 5, | |
| 567 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 568 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 569 | − BITFIELD_FIELD(unsigned int func : 4, | |
| 570 | − BITFIELD_FIELD(unsigned int fmt : 2, | |
| 564 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 565 | + __BITFIELD_FIELD(unsigned int fr : 5, | |
| 566 | + __BITFIELD_FIELD(unsigned int ft : 5, | |
| 567 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 568 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 569 | + __BITFIELD_FIELD(unsigned int func : 4, | |
| 570 | + __BITFIELD_FIELD(unsigned int fmt : 2, | |
| 571 | 571 | ;))))))) |
| 572 | 572 | }; |
| 573 | 573 | |
| 574 | 574 | struct b_format { /* BREAK and SYSCALL */ |
| 575 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 576 | − BITFIELD_FIELD(unsigned int code : 20, | |
| 577 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 575 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 576 | + __BITFIELD_FIELD(unsigned int code : 20, | |
| 577 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 578 | 578 | ;))) |
| 579 | 579 | }; |
| 580 | 580 | |
| 581 | 581 | struct ps_format { /* MIPS-3D / paired single format */ |
| 582 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 583 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 584 | − BITFIELD_FIELD(unsigned int ft : 5, | |
| 585 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 586 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 587 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 582 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 583 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 584 | + __BITFIELD_FIELD(unsigned int ft : 5, | |
| 585 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 586 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 587 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 588 | 588 | ;)))))) |
| 589 | 589 | }; |
| 590 | 590 | |
| 591 | 591 | struct v_format { /* MDMX vector format */ |
| 592 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 593 | − BITFIELD_FIELD(unsigned int sel : 4, | |
| 594 | − BITFIELD_FIELD(unsigned int fmt : 1, | |
| 595 | − BITFIELD_FIELD(unsigned int vt : 5, | |
| 596 | − BITFIELD_FIELD(unsigned int vs : 5, | |
| 597 | − BITFIELD_FIELD(unsigned int vd : 5, | |
| 598 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 592 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 593 | + __BITFIELD_FIELD(unsigned int sel : 4, | |
| 594 | + __BITFIELD_FIELD(unsigned int fmt : 1, | |
| 595 | + __BITFIELD_FIELD(unsigned int vt : 5, | |
| 596 | + __BITFIELD_FIELD(unsigned int vs : 5, | |
| 597 | + __BITFIELD_FIELD(unsigned int vd : 5, | |
| 598 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 599 | 599 | ;))))))) |
| 600 | 600 | }; |
| 601 | 601 | |
| 602 | 602 | struct spec3_format { /* SPEC3 */ |
| 603 | − BITFIELD_FIELD(unsigned int opcode:6, | |
| 604 | − BITFIELD_FIELD(unsigned int rs:5, | |
| 605 | − BITFIELD_FIELD(unsigned int rt:5, | |
| 606 | − BITFIELD_FIELD(signed int simmediate:9, | |
| 607 | − BITFIELD_FIELD(unsigned int func:7, | |
| 603 | + __BITFIELD_FIELD(unsigned int opcode:6, | |
| 604 | + __BITFIELD_FIELD(unsigned int rs:5, | |
| 605 | + __BITFIELD_FIELD(unsigned int rt:5, | |
| 606 | + __BITFIELD_FIELD(signed int simmediate:9, | |
| 607 | + __BITFIELD_FIELD(unsigned int func:7, | |
| 608 | 608 | ;))))) |
| 609 | 609 | }; |
| 610 | 610 | |
| @@ -616,141 +616,141 @@ struct spec3_format { /* SPEC3 */ · 5 unmodified lines | ||
| 616 | 616 | * if it is MIPS32 instruction re-encoded for use in the microMIPS ASE. |
| 617 | 617 | */ |
| 618 | 618 | struct fb_format { /* FPU branch format (MIPS32) */ |
| 619 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 620 | − BITFIELD_FIELD(unsigned int bc : 5, | |
| 621 | − BITFIELD_FIELD(unsigned int cc : 3, | |
| 622 | − BITFIELD_FIELD(unsigned int flag : 2, | |
| 623 | − BITFIELD_FIELD(signed int simmediate : 16, | |
| 619 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 620 | + __BITFIELD_FIELD(unsigned int bc : 5, | |
| 621 | + __BITFIELD_FIELD(unsigned int cc : 3, | |
| 622 | + __BITFIELD_FIELD(unsigned int flag : 2, | |
| 623 | + __BITFIELD_FIELD(signed int simmediate : 16, | |
| 624 | 624 | ;))))) |
| 625 | 625 | }; |
| 626 | 626 | |
| 627 | 627 | struct fp0_format { /* FPU multiply and add format (MIPS32) */ |
| 628 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 629 | − BITFIELD_FIELD(unsigned int fmt : 5, | |
| 630 | − BITFIELD_FIELD(unsigned int ft : 5, | |
| 631 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 632 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 633 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 628 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 629 | + __BITFIELD_FIELD(unsigned int fmt : 5, | |
| 630 | + __BITFIELD_FIELD(unsigned int ft : 5, | |
| 631 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 632 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 633 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 634 | 634 | ;)))))) |
| 635 | 635 | }; |
| 636 | 636 | |
| 637 | 637 | struct mm_fp0_format { /* FPU multipy and add format (microMIPS) */ |
| 638 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 639 | − BITFIELD_FIELD(unsigned int ft : 5, | |
| 640 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 641 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 642 | − BITFIELD_FIELD(unsigned int fmt : 3, | |
| 643 | − BITFIELD_FIELD(unsigned int op : 2, | |
| 644 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 638 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 639 | + __BITFIELD_FIELD(unsigned int ft : 5, | |
| 640 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 641 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 642 | + __BITFIELD_FIELD(unsigned int fmt : 3, | |
| 643 | + __BITFIELD_FIELD(unsigned int op : 2, | |
| 644 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 645 | 645 | ;))))))) |
| 646 | 646 | }; |
| 647 | 647 | |
| 648 | 648 | struct fp1_format { /* FPU mfc1 and cfc1 format (MIPS32) */ |
| 649 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 650 | − BITFIELD_FIELD(unsigned int op : 5, | |
| 651 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 652 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 653 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 654 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 649 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 650 | + __BITFIELD_FIELD(unsigned int op : 5, | |
| 651 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 652 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 653 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 654 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 655 | 655 | ;)))))) |
| 656 | 656 | }; |
| 657 | 657 | |
| 658 | 658 | struct mm_fp1_format { /* FPU mfc1 and cfc1 format (microMIPS) */ |
| 659 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 660 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 661 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 662 | − BITFIELD_FIELD(unsigned int fmt : 2, | |
| 663 | − BITFIELD_FIELD(unsigned int op : 8, | |
| 664 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 659 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 660 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 661 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 662 | + __BITFIELD_FIELD(unsigned int fmt : 2, | |
| 663 | + __BITFIELD_FIELD(unsigned int op : 8, | |
| 664 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 665 | 665 | ;)))))) |
| 666 | 666 | }; |
| 667 | 667 | |
| 668 | 668 | struct mm_fp2_format { /* FPU movt and movf format (microMIPS) */ |
| 669 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 670 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 671 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 672 | − BITFIELD_FIELD(unsigned int cc : 3, | |
| 673 | − BITFIELD_FIELD(unsigned int zero : 2, | |
| 674 | − BITFIELD_FIELD(unsigned int fmt : 2, | |
| 675 | − BITFIELD_FIELD(unsigned int op : 3, | |
| 676 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 669 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 670 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 671 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 672 | + __BITFIELD_FIELD(unsigned int cc : 3, | |
| 673 | + __BITFIELD_FIELD(unsigned int zero : 2, | |
| 674 | + __BITFIELD_FIELD(unsigned int fmt : 2, | |
| 675 | + __BITFIELD_FIELD(unsigned int op : 3, | |
| 676 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 677 | 677 | ;)))))))) |
| 678 | 678 | }; |
| 679 | 679 | |
| 680 | 680 | struct mm_fp3_format { /* FPU abs and neg format (microMIPS) */ |
| 681 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 682 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 683 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 684 | − BITFIELD_FIELD(unsigned int fmt : 3, | |
| 685 | − BITFIELD_FIELD(unsigned int op : 7, | |
| 686 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 681 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 682 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 683 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 684 | + __BITFIELD_FIELD(unsigned int fmt : 3, | |
| 685 | + __BITFIELD_FIELD(unsigned int op : 7, | |
| 686 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 687 | 687 | ;)))))) |
| 688 | 688 | }; |
| 689 | 689 | |
| 690 | 690 | struct mm_fp4_format { /* FPU c.cond format (microMIPS) */ |
| 691 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 692 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 693 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 694 | − BITFIELD_FIELD(unsigned int cc : 3, | |
| 695 | − BITFIELD_FIELD(unsigned int fmt : 3, | |
| 696 | − BITFIELD_FIELD(unsigned int cond : 4, | |
| 697 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 691 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 692 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 693 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 694 | + __BITFIELD_FIELD(unsigned int cc : 3, | |
| 695 | + __BITFIELD_FIELD(unsigned int fmt : 3, | |
| 696 | + __BITFIELD_FIELD(unsigned int cond : 4, | |
| 697 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 698 | 698 | ;))))))) |
| 699 | 699 | }; |
| 700 | 700 | |
| 701 | 701 | struct mm_fp5_format { /* FPU lwxc1 and swxc1 format (microMIPS) */ |
| 702 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 703 | − BITFIELD_FIELD(unsigned int index : 5, | |
| 704 | − BITFIELD_FIELD(unsigned int base : 5, | |
| 705 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 706 | − BITFIELD_FIELD(unsigned int op : 5, | |
| 707 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 702 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 703 | + __BITFIELD_FIELD(unsigned int index : 5, | |
| 704 | + __BITFIELD_FIELD(unsigned int base : 5, | |
| 705 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 706 | + __BITFIELD_FIELD(unsigned int op : 5, | |
| 707 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 708 | 708 | ;)))))) |
| 709 | 709 | }; |
| 710 | 710 | |
| 711 | 711 | struct fp6_format { /* FPU madd and msub format (MIPS IV) */ |
| 712 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 713 | − BITFIELD_FIELD(unsigned int fr : 5, | |
| 714 | − BITFIELD_FIELD(unsigned int ft : 5, | |
| 715 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 716 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 717 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 712 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 713 | + __BITFIELD_FIELD(unsigned int fr : 5, | |
| 714 | + __BITFIELD_FIELD(unsigned int ft : 5, | |
| 715 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 716 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 717 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 718 | 718 | ;)))))) |
| 719 | 719 | }; |
| 720 | 720 | |
| 721 | 721 | struct mm_fp6_format { /* FPU madd and msub format (microMIPS) */ |
| 722 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 723 | − BITFIELD_FIELD(unsigned int ft : 5, | |
| 724 | − BITFIELD_FIELD(unsigned int fs : 5, | |
| 725 | − BITFIELD_FIELD(unsigned int fd : 5, | |
| 726 | − BITFIELD_FIELD(unsigned int fr : 5, | |
| 727 | − BITFIELD_FIELD(unsigned int func : 6, | |
| 722 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 723 | + __BITFIELD_FIELD(unsigned int ft : 5, | |
| 724 | + __BITFIELD_FIELD(unsigned int fs : 5, | |
| 725 | + __BITFIELD_FIELD(unsigned int fd : 5, | |
| 726 | + __BITFIELD_FIELD(unsigned int fr : 5, | |
| 727 | + __BITFIELD_FIELD(unsigned int func : 6, | |
| 728 | 728 | ;)))))) |
| 729 | 729 | }; |
| 730 | 730 | |
| 731 | 731 | struct mm_i_format { /* Immediate format (microMIPS) */ |
| 732 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 733 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 734 | − BITFIELD_FIELD(unsigned int rs : 5, | |
| 735 | − BITFIELD_FIELD(signed int simmediate : 16, | |
| 732 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 733 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 734 | + __BITFIELD_FIELD(unsigned int rs : 5, | |
| 735 | + __BITFIELD_FIELD(signed int simmediate : 16, | |
| 736 | 736 | ;)))) |
| 737 | 737 | }; |
| 738 | 738 | |
| 739 | 739 | struct mm_m_format { /* Multi-word load/store format (microMIPS) */ |
| 740 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 741 | − BITFIELD_FIELD(unsigned int rd : 5, | |
| 742 | − BITFIELD_FIELD(unsigned int base : 5, | |
| 743 | − BITFIELD_FIELD(unsigned int func : 4, | |
| 744 | − BITFIELD_FIELD(signed int simmediate : 12, | |
| 740 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 741 | + __BITFIELD_FIELD(unsigned int rd : 5, | |
| 742 | + __BITFIELD_FIELD(unsigned int base : 5, | |
| 743 | + __BITFIELD_FIELD(unsigned int func : 4, | |
| 744 | + __BITFIELD_FIELD(signed int simmediate : 12, | |
| 745 | 745 | ;))))) |
| 746 | 746 | }; |
| 747 | 747 | |
| 748 | 748 | struct mm_x_format { /* Scaled indexed load format (microMIPS) */ |
| 749 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 750 | − BITFIELD_FIELD(unsigned int index : 5, | |
| 751 | − BITFIELD_FIELD(unsigned int base : 5, | |
| 752 | − BITFIELD_FIELD(unsigned int rd : 5, | |
| 753 | − BITFIELD_FIELD(unsigned int func : 11, | |
| 749 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 750 | + __BITFIELD_FIELD(unsigned int index : 5, | |
| 751 | + __BITFIELD_FIELD(unsigned int base : 5, | |
| 752 | + __BITFIELD_FIELD(unsigned int rd : 5, | |
| 753 | + __BITFIELD_FIELD(unsigned int func : 11, | |
| 754 | 754 | ;))))) |
| 755 | 755 | }; |
| 756 | 756 | |
| @@ -758,51 +758,51 @@ struct mm_x_format { /* Scaled indexed load format (microMIPS) */ · 1 unmodified line | ||
| 758 | 758 | * microMIPS instruction formats (16-bit length) |
| 759 | 759 | */ |
| 760 | 760 | struct mm_b0_format { /* Unconditional branch format (microMIPS) */ |
| 761 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 762 | − BITFIELD_FIELD(signed int simmediate : 10, | |
| 763 | − BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 761 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 762 | + __BITFIELD_FIELD(signed int simmediate : 10, | |
| 763 | + __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 764 | 764 | ;))) |
| 765 | 765 | }; |
| 766 | 766 | |
| 767 | 767 | struct mm_b1_format { /* Conditional branch format (microMIPS) */ |
| 768 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 769 | − BITFIELD_FIELD(unsigned int rs : 3, | |
| 770 | − BITFIELD_FIELD(signed int simmediate : 7, | |
| 771 | − BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 768 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 769 | + __BITFIELD_FIELD(unsigned int rs : 3, | |
| 770 | + __BITFIELD_FIELD(signed int simmediate : 7, | |
| 771 | + __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 772 | 772 | ;)))) |
| 773 | 773 | }; |
| 774 | 774 | |
| 775 | 775 | struct mm16_m_format { /* Multi-word load/store format */ |
| 776 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 777 | − BITFIELD_FIELD(unsigned int func : 4, | |
| 778 | − BITFIELD_FIELD(unsigned int rlist : 2, | |
| 779 | − BITFIELD_FIELD(unsigned int imm : 4, | |
| 780 | − BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 776 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 777 | + __BITFIELD_FIELD(unsigned int func : 4, | |
| 778 | + __BITFIELD_FIELD(unsigned int rlist : 2, | |
| 779 | + __BITFIELD_FIELD(unsigned int imm : 4, | |
| 780 | + __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 781 | 781 | ;))))) |
| 782 | 782 | }; |
| 783 | 783 | |
| 784 | 784 | struct mm16_rb_format { /* Signed immediate format */ |
| 785 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 786 | − BITFIELD_FIELD(unsigned int rt : 3, | |
| 787 | − BITFIELD_FIELD(unsigned int base : 3, | |
| 788 | − BITFIELD_FIELD(signed int simmediate : 4, | |
| 789 | − BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 785 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 786 | + __BITFIELD_FIELD(unsigned int rt : 3, | |
| 787 | + __BITFIELD_FIELD(unsigned int base : 3, | |
| 788 | + __BITFIELD_FIELD(signed int simmediate : 4, | |
| 789 | + __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 790 | 790 | ;))))) |
| 791 | 791 | }; |
| 792 | 792 | |
| 793 | 793 | struct mm16_r3_format { /* Load from global pointer format */ |
| 794 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 795 | − BITFIELD_FIELD(unsigned int rt : 3, | |
| 796 | − BITFIELD_FIELD(signed int simmediate : 7, | |
| 797 | − BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 794 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 795 | + __BITFIELD_FIELD(unsigned int rt : 3, | |
| 796 | + __BITFIELD_FIELD(signed int simmediate : 7, | |
| 797 | + __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 798 | 798 | ;)))) |
| 799 | 799 | }; |
| 800 | 800 | |
| 801 | 801 | struct mm16_r5_format { /* Load/store from stack pointer format */ |
| 802 | − BITFIELD_FIELD(unsigned int opcode : 6, | |
| 803 | − BITFIELD_FIELD(unsigned int rt : 5, | |
| 804 | − BITFIELD_FIELD(signed int simmediate : 5, | |
| 805 | − BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 802 | + __BITFIELD_FIELD(unsigned int opcode : 6, | |
| 803 | + __BITFIELD_FIELD(unsigned int rt : 5, | |
| 804 | + __BITFIELD_FIELD(signed int simmediate : 5, | |
| 805 | + __BITFIELD_FIELD(unsigned int : 16, /* Ignored */ | |
| 806 | 806 | ;)))) |
| 807 | 807 | }; |
| 808 | 808 | |
| @@ -810,57 +810,57 @@ struct mm16_r5_format { /* Load/store from stack pointer format */ · 1 unmodified line | ||
| 810 | 810 | * MIPS16e instruction formats (16-bit length) |
| 811 | 811 | */ |
| 812 | 812 | struct m16e_rr { |
| 813 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 814 | − BITFIELD_FIELD(unsigned int rx : 3, | |
| 815 | − BITFIELD_FIELD(unsigned int nd : 1, | |
| 816 | − BITFIELD_FIELD(unsigned int l : 1, | |
| 817 | − BITFIELD_FIELD(unsigned int ra : 1, | |
| 818 | − BITFIELD_FIELD(unsigned int func : 5, | |
| 813 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 814 | + __BITFIELD_FIELD(unsigned int rx : 3, | |
| 815 | + __BITFIELD_FIELD(unsigned int nd : 1, | |
| 816 | + __BITFIELD_FIELD(unsigned int l : 1, | |
| 817 | + __BITFIELD_FIELD(unsigned int ra : 1, | |
| 818 | + __BITFIELD_FIELD(unsigned int func : 5, | |
| 819 | 819 | ;)))))) |
| 820 | 820 | }; |
| 821 | 821 | |
| 822 | 822 | struct m16e_jal { |
| 823 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 824 | − BITFIELD_FIELD(unsigned int x : 1, | |
| 825 | − BITFIELD_FIELD(unsigned int imm20_16 : 5, | |
| 826 | − BITFIELD_FIELD(signed int imm25_21 : 5, | |
| 823 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 824 | + __BITFIELD_FIELD(unsigned int x : 1, | |
| 825 | + __BITFIELD_FIELD(unsigned int imm20_16 : 5, | |
| 826 | + __BITFIELD_FIELD(signed int imm25_21 : 5, | |
| 827 | 827 | ;)))) |
| 828 | 828 | }; |
| 829 | 829 | |
| 830 | 830 | struct m16e_i64 { |
| 831 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 832 | − BITFIELD_FIELD(unsigned int func : 3, | |
| 833 | − BITFIELD_FIELD(unsigned int imm : 8, | |
| 831 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 832 | + __BITFIELD_FIELD(unsigned int func : 3, | |
| 833 | + __BITFIELD_FIELD(unsigned int imm : 8, | |
| 834 | 834 | ;))) |
| 835 | 835 | }; |
| 836 | 836 | |
| 837 | 837 | struct m16e_ri64 { |
| 838 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 839 | − BITFIELD_FIELD(unsigned int func : 3, | |
| 840 | − BITFIELD_FIELD(unsigned int ry : 3, | |
| 841 | − BITFIELD_FIELD(unsigned int imm : 5, | |
| 838 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 839 | + __BITFIELD_FIELD(unsigned int func : 3, | |
| 840 | + __BITFIELD_FIELD(unsigned int ry : 3, | |
| 841 | + __BITFIELD_FIELD(unsigned int imm : 5, | |
| 842 | 842 | ;)))) |
| 843 | 843 | }; |
| 844 | 844 | |
| 845 | 845 | struct m16e_ri { |
| 846 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 847 | − BITFIELD_FIELD(unsigned int rx : 3, | |
| 848 | − BITFIELD_FIELD(unsigned int imm : 8, | |
| 846 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 847 | + __BITFIELD_FIELD(unsigned int rx : 3, | |
| 848 | + __BITFIELD_FIELD(unsigned int imm : 8, | |
| 849 | 849 | ;))) |
| 850 | 850 | }; |
| 851 | 851 | |
| 852 | 852 | struct m16e_rri { |
| 853 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 854 | − BITFIELD_FIELD(unsigned int rx : 3, | |
| 855 | − BITFIELD_FIELD(unsigned int ry : 3, | |
| 856 | − BITFIELD_FIELD(unsigned int imm : 5, | |
| 853 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 854 | + __BITFIELD_FIELD(unsigned int rx : 3, | |
| 855 | + __BITFIELD_FIELD(unsigned int ry : 3, | |
| 856 | + __BITFIELD_FIELD(unsigned int imm : 5, | |
| 857 | 857 | ;)))) |
| 858 | 858 | }; |
| 859 | 859 | |
| 860 | 860 | struct m16e_i8 { |
| 861 | − BITFIELD_FIELD(unsigned int opcode : 5, | |
| 862 | − BITFIELD_FIELD(unsigned int func : 3, | |
| 863 | − BITFIELD_FIELD(unsigned int imm : 8, | |
| 861 | + __BITFIELD_FIELD(unsigned int opcode : 5, | |
| 862 | + __BITFIELD_FIELD(unsigned int func : 3, | |
| 863 | + __BITFIELD_FIELD(unsigned int imm : 8, | |
| 864 | 864 | ;))) |
| 865 | 865 | }; |
| 866 | 866 | |
| @@ -371,16 +371,17 @@ · 370 unmodified lines | ||
| 371 | 371 | #define __NR_finit_module (__NR_Linux + 348) |
| 372 | 372 | #define __NR_sched_setattr (__NR_Linux + 349) |
| 373 | 373 | #define __NR_sched_getattr (__NR_Linux + 350) |
| 374 | +#define __NR_renameat2 (__NR_Linux + 351) | |
| 374 | 375 | |
| 375 | 376 | /* |
| 376 | 377 | * Offset of the last Linux o32 flavoured syscall |
| 377 | 378 | */ |
| 378 | −#define __NR_Linux_syscalls 350 | |
| 379 | +#define __NR_Linux_syscalls 351 | |
| 379 | 380 | |
| 380 | 381 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ |
| 381 | 382 | |
| 382 | 383 | #define __NR_O32_Linux 4000 |
| 383 | −#define __NR_O32_Linux_syscalls 350 | |
| 384 | +#define __NR_O32_Linux_syscalls 351 | |
| 384 | 385 | |
| 385 | 386 | #if _MIPS_SIM == _MIPS_SIM_ABI64 |
| 386 | 387 | |
| @@ -699,16 +700,17 @@ · 312 unmodified lines | ||
| 699 | 700 | #define __NR_getdents64 (__NR_Linux + 308) |
| 700 | 701 | #define __NR_sched_setattr (__NR_Linux + 309) |
| 701 | 702 | #define __NR_sched_getattr (__NR_Linux + 310) |
| 703 | +#define __NR_renameat2 (__NR_Linux + 311) | |
| 702 | 704 | |
| 703 | 705 | /* |
| 704 | 706 | * Offset of the last Linux 64-bit flavoured syscall |
| 705 | 707 | */ |
| 706 | −#define __NR_Linux_syscalls 310 | |
| 708 | +#define __NR_Linux_syscalls 311 | |
| 707 | 709 | |
| 708 | 710 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ |
| 709 | 711 | |
| 710 | 712 | #define __NR_64_Linux 5000 |
| 711 | −#define __NR_64_Linux_syscalls 310 | |
| 713 | +#define __NR_64_Linux_syscalls 311 | |
| 712 | 714 | |
| 713 | 715 | #if _MIPS_SIM == _MIPS_SIM_NABI32 |
| 714 | 716 | |
| @@ -1031,15 +1033,16 @@ · 316 unmodified lines | ||
| 1031 | 1033 | #define __NR_finit_module (__NR_Linux + 312) |
| 1032 | 1034 | #define __NR_sched_setattr (__NR_Linux + 313) |
| 1033 | 1035 | #define __NR_sched_getattr (__NR_Linux + 314) |
| 1036 | +#define __NR_renameat2 (__NR_Linux + 315) | |
| 1034 | 1037 | |
| 1035 | 1038 | /* |
| 1036 | 1039 | * Offset of the last N32 flavoured syscall |
| 1037 | 1040 | */ |
| 1038 | −#define __NR_Linux_syscalls 314 | |
| 1041 | +#define __NR_Linux_syscalls 315 | |
| 1039 | 1042 | |
| 1040 | 1043 | #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ |
| 1041 | 1044 | |
| 1042 | 1045 | #define __NR_N32_Linux 6000 |
| 1043 | −#define __NR_N32_Linux_syscalls 314 | |
| 1046 | +#define __NR_N32_Linux_syscalls 315 | |
| 1044 | 1047 | |
| 1045 | 1048 | #endif /* _UAPI_ASM_UNISTD_H */ |
| @@ -317,7 +317,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, · 316 unmodified lines | ||
| 317 | 317 | if (regs->regs[insn.i_format.rs] == |
| 318 | 318 | regs->regs[insn.i_format.rt]) { |
| 319 | 319 | epc = epc + 4 + (insn.i_format.simmediate << 2); |
| 320 | − if (insn.i_format.rt == beql_op) | |
| 320 | + if (insn.i_format.opcode == beql_op) | |
| 321 | 321 | ret = BRANCH_LIKELY_TAKEN; |
| 322 | 322 | } else |
| 323 | 323 | epc += 8; |
| @@ -329,7 +329,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, · 5 unmodified lines | ||
| 329 | 329 | if (regs->regs[insn.i_format.rs] != |
| 330 | 330 | regs->regs[insn.i_format.rt]) { |
| 331 | 331 | epc = epc + 4 + (insn.i_format.simmediate << 2); |
| 332 | − if (insn.i_format.rt == bnel_op) | |
| 332 | + if (insn.i_format.opcode == bnel_op) | |
| 333 | 333 | ret = BRANCH_LIKELY_TAKEN; |
| 334 | 334 | } else |
| 335 | 335 | epc += 8; |
| @@ -341,7 +341,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, · 5 unmodified lines | ||
| 341 | 341 | /* rt field assumed to be zero */ |
| 342 | 342 | if ((long)regs->regs[insn.i_format.rs] <= 0) { |
| 343 | 343 | epc = epc + 4 + (insn.i_format.simmediate << 2); |
| 344 | − if (insn.i_format.rt == bnel_op) | |
| 344 | + if (insn.i_format.opcode == blezl_op) | |
| 345 | 345 | ret = BRANCH_LIKELY_TAKEN; |
| 346 | 346 | } else |
| 347 | 347 | epc += 8; |
| @@ -353,7 +353,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs, · 5 unmodified lines | ||
| 353 | 353 | /* rt field assumed to be zero */ |
| 354 | 354 | if ((long)regs->regs[insn.i_format.rs] > 0) { |
| 355 | 355 | epc = epc + 4 + (insn.i_format.simmediate << 2); |
| 356 | − if (insn.i_format.rt == bnel_op) | |
| 356 | + if (insn.i_format.opcode == bgtzl_op) | |
| 357 | 357 | ret = BRANCH_LIKELY_TAKEN; |
| 358 | 358 | } else |
| 359 | 359 | epc += 8; |
| @@ -124,14 +124,7 @@ static int show_cpuinfo(struct seq_file *m, void *v) · 123 unmodified lines | ||
| 124 | 124 | seq_printf(m, "kscratch registers\t: %d\n", |
| 125 | 125 | hweight8(cpu_data[n].kscratch_mask)); |
| 126 | 126 | seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core); |
| 127 | −#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC) | |
| 128 | − if (cpu_has_mipsmt) { | |
| 129 | − seq_printf(m, "VPE\t\t\t: %d\n", cpu_data[n].vpe_id); | |
| 130 | −#if defined(CONFIG_MIPS_MT_SMTC) | |
| 131 | − seq_printf(m, "TC\t\t\t: %d\n", cpu_data[n].tc_id); | |
| 132 | −#endif | |
| 133 | − } | |
| 134 | −#endif | |
| 127 | + | |
| 135 | 128 | sprintf(fmt, "VCE%%c exceptions\t\t: %s\n", |
| 136 | 129 | cpu_has_vce ? "%u" : "not available"); |
| 137 | 130 | seq_printf(m, fmt, 'D', vced_count); |
| @@ -163,7 +163,7 @@ int ptrace_get_watch_regs(struct task_struct *child, · 162 unmodified lines | ||
| 163 | 163 | enum pt_watch_style style; |
| 164 | 164 | int i; |
| 165 | 165 | |
| 166 | − if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) | |
| 166 | + if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0) | |
| 167 | 167 | return -EIO; |
| 168 | 168 | if (!access_ok(VERIFY_WRITE, addr, sizeof(struct pt_watch_regs))) |
| 169 | 169 | return -EIO; |
| @@ -177,14 +177,14 @@ int ptrace_get_watch_regs(struct task_struct *child, · 7 unmodified lines | ||
| 177 | 177 | #endif |
| 178 | 178 | |
| 179 | 179 | __put_user(style, &addr->style); |
| 180 | − __put_user(current_cpu_data.watch_reg_use_cnt, | |
| 180 | + __put_user(boot_cpu_data.watch_reg_use_cnt, | |
| 181 | 181 | &addr->WATCH_STYLE.num_valid); |
| 182 | − for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { | |
| 182 | + for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { | |
| 183 | 183 | __put_user(child->thread.watch.mips3264.watchlo[i], |
| 184 | 184 | &addr->WATCH_STYLE.watchlo[i]); |
| 185 | 185 | __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff, |
| 186 | 186 | &addr->WATCH_STYLE.watchhi[i]); |
| 187 | − __put_user(current_cpu_data.watch_reg_masks[i], | |
| 187 | + __put_user(boot_cpu_data.watch_reg_masks[i], | |
| 188 | 188 | &addr->WATCH_STYLE.watch_masks[i]); |
| 189 | 189 | } |
| 190 | 190 | for (; i < 8; i++) { |
| @@ -204,12 +204,12 @@ int ptrace_set_watch_regs(struct task_struct *child, · 13 unmodified lines | ||
| 204 | 204 | unsigned long lt[NUM_WATCH_REGS]; |
| 205 | 205 | u16 ht[NUM_WATCH_REGS]; |
| 206 | 206 | |
| 207 | − if (!cpu_has_watch || current_cpu_data.watch_reg_use_cnt == 0) | |
| 207 | + if (!cpu_has_watch || boot_cpu_data.watch_reg_use_cnt == 0) | |
| 208 | 208 | return -EIO; |
| 209 | 209 | if (!access_ok(VERIFY_READ, addr, sizeof(struct pt_watch_regs))) |
| 210 | 210 | return -EIO; |
| 211 | 211 | /* Check the values. */ |
| 212 | − for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { | |
| 212 | + for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { | |
| 213 | 213 | __get_user(lt[i], &addr->WATCH_STYLE.watchlo[i]); |
| 214 | 214 | #ifdef CONFIG_32BIT |
| 215 | 215 | if (lt[i] & __UA_LIMIT) |
| @@ -228,7 +228,7 @@ int ptrace_set_watch_regs(struct task_struct *child, · 12 unmodified lines | ||
| 228 | 228 | return -EINVAL; |
| 229 | 229 | } |
| 230 | 230 | /* Install them. */ |
| 231 | − for (i = 0; i < current_cpu_data.watch_reg_use_cnt; i++) { | |
| 231 | + for (i = 0; i < boot_cpu_data.watch_reg_use_cnt; i++) { | |
| 232 | 232 | if (lt[i] & 7) |
| 233 | 233 | watch_active = 1; |
| 234 | 234 | child->thread.watch.mips3264.watchlo[i] = lt[i]; |
| @@ -577,3 +577,4 @@ EXPORT(sys_call_table) · 576 unmodified lines | ||
| 577 | 577 | PTR sys_finit_module |
| 578 | 578 | PTR sys_sched_setattr |
| 579 | 579 | PTR sys_sched_getattr /* 4350 */ |
| 580 | + PTR sys_renameat2 | |
| @@ -430,4 +430,5 @@ EXPORT(sys_call_table) · 429 unmodified lines | ||
| 430 | 430 | PTR sys_getdents64 |
| 431 | 431 | PTR sys_sched_setattr |
| 432 | 432 | PTR sys_sched_getattr /* 5310 */ |
| 433 | + PTR sys_renameat2 | |
| 433 | 434 | .size sys_call_table,.-sys_call_table |
| @@ -423,4 +423,5 @@ EXPORT(sysn32_call_table) · 422 unmodified lines | ||
| 423 | 423 | PTR sys_finit_module |
| 424 | 424 | PTR sys_sched_setattr |
| 425 | 425 | PTR sys_sched_getattr |
| 426 | + PTR sys_renameat2 /* 6315 */ | |
| 426 | 427 | .size sysn32_call_table,.-sysn32_call_table |
| @@ -556,4 +556,5 @@ EXPORT(sys32_call_table) · 555 unmodified lines | ||
| 556 | 556 | PTR sys_finit_module |
| 557 | 557 | PTR sys_sched_setattr |
| 558 | 558 | PTR sys_sched_getattr /* 4350 */ |
| 559 | + PTR sys_renameat2 | |
| 559 | 560 | .size sys32_call_table,.-sys32_call_table |
| @@ -1545,7 +1545,7 @@ asmlinkage void cache_parity_error(void) · 1544 unmodified lines | ||
| 1545 | 1545 | reg_val & (1<<30) ? "secondary" : "primary", |
| 1546 | 1546 | reg_val & (1<<31) ? "data" : "insn"); |
| 1547 | 1547 | if (cpu_has_mips_r2 && |
| 1548 | − ((current_cpu_data.processor_id && 0xff0000) == PRID_COMP_MIPS)) { | |
| 1548 | + ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) { | |
| 1549 | 1549 | pr_err("Error bits: %s%s%s%s%s%s%s%s\n", |
| 1550 | 1550 | reg_val & (1<<29) ? "ED " : "", |
| 1551 | 1551 | reg_val & (1<<28) ? "ET " : "", |
| @@ -1585,7 +1585,7 @@ asmlinkage void do_ftlb(void) · 33 unmodified lines | ||
| 1585 | 1585 | |
| 1586 | 1586 | /* For the moment, report the problem and hang. */ |
| 1587 | 1587 | if (cpu_has_mips_r2 && |
| 1588 | − ((current_cpu_data.processor_id && 0xff0000) == PRID_COMP_MIPS)) { | |
| 1588 | + ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) { | |
| 1589 | 1589 | pr_err("FTLB error exception, cp0_ecc=0x%08x:\n", |
| 1590 | 1590 | read_c0_ecc()); |
| 1591 | 1591 | pr_err("cp0_errorepc == %0*lx\n", field, read_c0_errorepc()); |
| @@ -8,6 +8,7 @@ · 7 unmodified lines | ||
| 8 | 8 | }; |
| 9 | 9 | |
| 10 | 10 | memory@0 { |
| 11 | + device_type = "memory"; | |
| 11 | 12 | reg = <0x0 0x2000000>; |
| 12 | 13 | }; |
| 13 | 14 | |
| @@ -56,14 +56,20 @@ · 55 unmodified lines | ||
| 56 | 56 | #define UNIT(unit) ((unit)*NBYTES) |
| 57 | 57 | |
| 58 | 58 | #define ADDC(sum,reg) \ |
| 59 | + .set push; \ | |
| 60 | + .set noat; \ | |
| 59 | 61 | ADD sum, reg; \ |
| 60 | 62 | sltu v1, sum, reg; \ |
| 61 | 63 | ADD sum, v1; \ |
| 64 | + .set pop | |
| 62 | 65 | |
| 63 | 66 | #define ADDC32(sum,reg) \ |
| 67 | + .set push; \ | |
| 68 | + .set noat; \ | |
| 64 | 69 | addu sum, reg; \ |
| 65 | 70 | sltu v1, sum, reg; \ |
| 66 | 71 | addu sum, v1; \ |
| 72 | + .set pop | |
| 67 | 73 | |
| 68 | 74 | #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3) \ |
| 69 | 75 | LOAD _t0, (offset + UNIT(0))(src); \ |
| @@ -710,6 +716,8 @@ LEAF(csum_partial) · 640 unmodified lines | ||
| 710 | 716 | ADDC(sum, t2) |
| 711 | 717 | .Ldone\@: |
| 712 | 718 | /* fold checksum */ |
| 719 | + .set push | |
| 720 | + .set noat | |
| 713 | 721 | #ifdef USE_DOUBLE |
| 714 | 722 | dsll32 v1, sum, 0 |
| 715 | 723 | daddu sum, v1 |
| @@ -732,6 +740,7 @@ LEAF(csum_partial) · 16 unmodified lines | ||
| 732 | 740 | or sum, sum, t0 |
| 733 | 741 | 1: |
| 734 | 742 | #endif |
| 743 | + .set pop | |
| 735 | 744 | .set reorder |
| 736 | 745 | ADDC32(sum, psum) |
| 737 | 746 | jr ra |
| @@ -6,7 +6,7 @@ · 5 unmodified lines | ||
| 6 | 6 | * Copyright (C) 1994 by Waldorf Electronics |
| 7 | 7 | * Copyright (C) 1995 - 2000, 01, 03 by Ralf Baechle |
| 8 | 8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
| 9 | − * Copyright (C) 2007 Maciej W. Rozycki | |
| 9 | + * Copyright (C) 2007, 2014 Maciej W. Rozycki | |
| 10 | 10 | */ |
| 11 | 11 | #include <linux/module.h> |
| 12 | 12 | #include <linux/param.h> |
| @@ -15,6 +15,12 @@ · 2 unmodified lines | ||
| 15 | 15 | #include <asm/compiler.h> |
| 16 | 16 | #include <asm/war.h> |
| 17 | 17 | |
| 18 | +#ifndef CONFIG_CPU_DADDI_WORKAROUNDS | |
| 19 | +#define GCC_DADDI_IMM_ASM() "I" | |
| 20 | +#else | |
| 21 | +#define GCC_DADDI_IMM_ASM() "r" | |
| 22 | +#endif | |
| 23 | + | |
| 18 | 24 | void __delay(unsigned long loops) |
| 19 | 25 | { |
| 20 | 26 | __asm__ __volatile__ ( |
| @@ -22,13 +28,13 @@ void __delay(unsigned long loops) · 1 unmodified line | ||
| 22 | 28 | " .align 3 \n" |
| 23 | 29 | "1: bnez %0, 1b \n" |
| 24 | 30 | #if BITS_PER_LONG == 32 |
| 25 | − " subu %0, 1 \n" | |
| 31 | + " subu %0, %1 \n" | |
| 26 | 32 | #else |
| 27 | − " dsubu %0, 1 \n" | |
| 33 | + " dsubu %0, %1 \n" | |
| 28 | 34 | #endif |
| 29 | 35 | " .set reorder \n" |
| 30 | 36 | : "=r" (loops) |
| 31 | − : "0" (loops)); | |
| 37 | + : GCC_DADDI_IMM_ASM() (1), "0" (loops)); | |
| 32 | 38 | } |
| 33 | 39 | EXPORT_SYMBOL(__delay); |
| 34 | 40 | |
| @@ -35,7 +35,6 @@ LEAF(__strncpy_from_\func\()_asm) · 34 unmodified lines | ||
| 35 | 35 | bnez v0, .Lfault\@ |
| 36 | 36 | |
| 37 | 37 | FEXPORT(__strncpy_from_\func\()_nocheck_asm) |
| 38 | − .set noreorder | |
| 39 | 38 | move t0, zero |
| 40 | 39 | move v1, a1 |
| 41 | 40 | .ifeqs "\func","kernel" |
| @@ -45,21 +44,21 @@ FEXPORT(__strncpy_from_\func\()_nocheck_asm) · 3 unmodified lines | ||
| 45 | 44 | .endif |
| 46 | 45 | PTR_ADDIU v1, 1 |
| 47 | 46 | R10KCBARRIER(0(ra)) |
| 47 | + sb v0, (a0) | |
| 48 | 48 | beqz v0, 2f |
| 49 | − sb v0, (a0) | |
| 50 | 49 | PTR_ADDIU t0, 1 |
| 50 | + PTR_ADDIU a0, 1 | |
| 51 | 51 | bne t0, a2, 1b |
| 52 | − PTR_ADDIU a0, 1 | |
| 53 | 52 | 2: PTR_ADDU v0, a1, t0 |
| 54 | 53 | xor v0, a1 |
| 55 | 54 | bltz v0, .Lfault\@ |
| 56 | − nop | |
| 55 | + move v0, t0 | |
| 57 | 56 | jr ra # return n |
| 58 | − move v0, t0 | |
| 59 | 57 | END(__strncpy_from_\func\()_asm) |
| 60 | 58 | |
| 61 | −.Lfault\@: jr ra | |
| 62 | − li v0, -EFAULT | |
| 59 | +.Lfault\@: | |
| 60 | + li v0, -EFAULT | |
| 61 | + jr ra | |
| 63 | 62 | |
| 64 | 63 | .section __ex_table,"a" |
| 65 | 64 | PTR 1b, .Lfault\@ |
| @@ -64,7 +64,6 @@ config LEMOTE_MACH3A · 63 unmodified lines | ||
| 64 | 64 | bool "Lemote Loongson 3A family machines" |
| 65 | 65 | select ARCH_SPARSEMEM_ENABLE |
| 66 | 66 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
| 67 | − select GENERIC_HARDIRQS_NO__DO_IRQ | |
| 68 | 67 | select BOOT_ELF32 |
| 69 | 68 | select BOARD_SCACHE |
| 70 | 69 | select CSRC_R4K |
| @@ -27,8 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | #include <cs5536/cs5536_mfgpt.h> |
| 29 | 29 | |
| 30 | −DEFINE_SPINLOCK(mfgpt_lock); | |
| 31 | −EXPORT_SYMBOL(mfgpt_lock); | |
| 30 | +static DEFINE_RAW_SPINLOCK(mfgpt_lock); | |
| 32 | 31 | |
| 33 | 32 | static u32 mfgpt_base; |
| 34 | 33 | |
| @@ -55,7 +54,7 @@ EXPORT_SYMBOL(enable_mfgpt0_counter); · 20 unmodified lines | ||
| 55 | 54 | static void init_mfgpt_timer(enum clock_event_mode mode, |
| 56 | 55 | struct clock_event_device *evt) |
| 57 | 56 | { |
| 58 | − spin_lock(&mfgpt_lock); | |
| 57 | + raw_spin_lock(&mfgpt_lock); | |
| 59 | 58 | |
| 60 | 59 | switch (mode) { |
| 61 | 60 | case CLOCK_EVT_MODE_PERIODIC: |
| @@ -79,7 +78,7 @@ static void init_mfgpt_timer(enum clock_event_mode mode, · 17 unmodified lines | ||
| 79 | 78 | /* Nothing to do here */ |
| 80 | 79 | break; |
| 81 | 80 | } |
| 82 | − spin_unlock(&mfgpt_lock); | |
| 81 | + raw_spin_unlock(&mfgpt_lock); | |
| 83 | 82 | } |
| 84 | 83 | |
| 85 | 84 | static struct clock_event_device mfgpt_clockevent = { |
| @@ -157,7 +156,7 @@ static cycle_t mfgpt_read(struct clocksource *cs) · 71 unmodified lines | ||
| 157 | 156 | static int old_count; |
| 158 | 157 | static u32 old_jifs; |
| 159 | 158 | |
| 160 | − spin_lock_irqsave(&mfgpt_lock, flags); | |
| 159 | + raw_spin_lock_irqsave(&mfgpt_lock, flags); | |
| 161 | 160 | /* |
| 162 | 161 | * Although our caller may have the read side of xtime_lock, |
| 163 | 162 | * this is now a seqlock, and we are cheating in this routine |
| @@ -191,7 +190,7 @@ static cycle_t mfgpt_read(struct clocksource *cs) · 27 unmodified lines | ||
| 191 | 190 | old_count = count; |
| 192 | 191 | old_jifs = jifs; |
| 193 | 192 | |
| 194 | − spin_unlock_irqrestore(&mfgpt_lock, flags); | |
| 193 | + raw_spin_unlock_irqrestore(&mfgpt_lock, flags); | |
| 195 | 194 | |
| 196 | 195 | return (cycle_t) (jifs * COMPARE) + count; |
| 197 | 196 | } |
| @@ -91,6 +91,7 @@ EXPORT_SYMBOL(clk_put); · 90 unmodified lines | ||
| 91 | 91 | |
| 92 | 92 | int clk_set_rate(struct clk *clk, unsigned long rate) |
| 93 | 93 | { |
| 94 | + unsigned int rate_khz = rate / 1000; | |
| 94 | 95 | int ret = 0; |
| 95 | 96 | int regval; |
| 96 | 97 | int i; |
| @@ -111,10 +112,10 @@ int clk_set_rate(struct clk *clk, unsigned long rate) · 14 unmodified lines | ||
| 111 | 112 | if (loongson2_clockmod_table[i].frequency == |
| 112 | 113 | CPUFREQ_ENTRY_INVALID) |
| 113 | 114 | continue; |
| 114 | − if (rate == loongson2_clockmod_table[i].frequency) | |
| 115 | + if (rate_khz == loongson2_clockmod_table[i].frequency) | |
| 115 | 116 | break; |
| 116 | 117 | } |
| 117 | − if (rate != loongson2_clockmod_table[i].frequency) | |
| 118 | + if (rate_khz != loongson2_clockmod_table[i].frequency) | |
| 118 | 119 | return -ENOTSUPP; |
| 119 | 120 | |
| 120 | 121 | clk->rate = rate; |
| @@ -273,7 +273,7 @@ void build_clear_page(void) · 272 unmodified lines | ||
| 273 | 273 | uasm_i_ori(&buf, A2, A0, off); |
| 274 | 274 | |
| 275 | 275 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) |
| 276 | − uasm_i_lui(&buf, AT, 0xa000); | |
| 276 | + uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000)); | |
| 277 | 277 | |
| 278 | 278 | off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) |
| 279 | 279 | * cache_line_size : 0; |
| @@ -424,7 +424,7 @@ void build_copy_page(void) · 144 unmodified lines | ||
| 424 | 424 | uasm_i_ori(&buf, A2, A0, off); |
| 425 | 425 | |
| 426 | 426 | if (R4600_V2_HIT_CACHEOP_WAR && cpu_is_r4600_v2_x()) |
| 427 | − uasm_i_lui(&buf, AT, 0xa000); | |
| 427 | + uasm_i_lui(&buf, AT, uasm_rel_hi(0xa0000000)); | |
| 428 | 428 | |
| 429 | 429 | off = cache_line_size ? min(8, pref_bias_copy_load / cache_line_size) * |
| 430 | 430 | cache_line_size : 0; |
| @@ -16,8 +16,10 @@ · 15 unmodified lines | ||
| 16 | 16 | |
| 17 | 17 | #define FASTPATH_SIZE 128 |
| 18 | 18 | |
| 19 | +EXPORT(tlbmiss_handler_setup_pgd_start) | |
| 19 | 20 | LEAF(tlbmiss_handler_setup_pgd) |
| 20 | − .space 16 * 4 | |
| 21 | +1: j 1b /* Dummy, will be replaced. */ | |
| 22 | + .space 64 | |
| 21 | 23 | END(tlbmiss_handler_setup_pgd) |
| 22 | 24 | EXPORT(tlbmiss_handler_setup_pgd_end) |
| 23 | 25 | |
| @@ -1422,16 +1422,17 @@ static void build_r4000_tlb_refill_handler(void) · 1421 unmodified lines | ||
| 1422 | 1422 | extern u32 handle_tlbl[], handle_tlbl_end[]; |
| 1423 | 1423 | extern u32 handle_tlbs[], handle_tlbs_end[]; |
| 1424 | 1424 | extern u32 handle_tlbm[], handle_tlbm_end[]; |
| 1425 | −extern u32 tlbmiss_handler_setup_pgd[], tlbmiss_handler_setup_pgd_end[]; | |
| 1425 | +extern u32 tlbmiss_handler_setup_pgd_start[], tlbmiss_handler_setup_pgd[]; | |
| 1426 | +extern u32 tlbmiss_handler_setup_pgd_end[]; | |
| 1426 | 1427 | |
| 1427 | 1428 | static void build_setup_pgd(void) |
| 1428 | 1429 | { |
| 1429 | 1430 | const int a0 = 4; |
| 1430 | 1431 | const int __maybe_unused a1 = 5; |
| 1431 | 1432 | const int __maybe_unused a2 = 6; |
| 1432 | − u32 *p = tlbmiss_handler_setup_pgd; | |
| 1433 | + u32 *p = tlbmiss_handler_setup_pgd_start; | |
| 1433 | 1434 | const int tlbmiss_handler_setup_pgd_size = |
| 1434 | − tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd; | |
| 1435 | + tlbmiss_handler_setup_pgd_end - tlbmiss_handler_setup_pgd_start; | |
| 1435 | 1436 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT |
| 1436 | 1437 | long pgdc = (long)pgd_current; |
| 1437 | 1438 | #endif |
| @@ -27,7 +27,7 @@ unsigned long physical_memsize = 0L; · 26 unmodified lines | ||
| 27 | 27 | fw_memblock_t * __init fw_getmdesc(int eva) |
| 28 | 28 | { |
| 29 | 29 | char *memsize_str, *ememsize_str __maybe_unused = NULL, *ptr; |
| 30 | − unsigned long memsize, ememsize __maybe_unused = 0; | |
| 30 | + unsigned long memsize = 0, ememsize __maybe_unused = 0; | |
| 31 | 31 | static char cmdline[COMMAND_LINE_SIZE] __initdata; |
| 32 | 32 | int tmp; |
| 33 | 33 | |
| @@ -53,7 +53,6 @@ static struct resource rc32434_res_pci_mem1 = { · 52 unmodified lines | ||
| 53 | 53 | .start = 0x50000000, |
| 54 | 54 | .end = 0x5FFFFFFF, |
| 55 | 55 | .flags = IORESOURCE_MEM, |
| 56 | − .parent = &rc32434_res_pci_mem1, | |
| 57 | 56 | .sibling = NULL, |
| 58 | 57 | .child = &rc32434_res_pci_mem2 |
| 59 | 58 | }; |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | model = "Ralink MT7620A evaluation board"; |
| 8 | 8 | |
| 9 | 9 | memory@0 { |
| 10 | + device_type = "memory"; | |
| 10 | 11 | reg = <0x0 0x2000000>; |
| 11 | 12 | }; |
| 12 | 13 | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | model = "Ralink RT2880 evaluation board"; |
| 8 | 8 | |
| 9 | 9 | memory@0 { |
| 10 | + device_type = "memory"; | |
| 10 | 11 | reg = <0x8000000 0x2000000>; |
| 11 | 12 | }; |
| 12 | 13 | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | model = "Ralink RT3052 evaluation board"; |
| 8 | 8 | |
| 9 | 9 | memory@0 { |
| 10 | + device_type = "memory"; | |
| 10 | 11 | reg = <0x0 0x2000000>; |
| 11 | 12 | }; |
| 12 | 13 | |
| @@ -7,6 +7,7 @@ · 6 unmodified lines | ||
| 7 | 7 | model = "Ralink RT3883 evaluation board"; |
| 8 | 8 | |
| 9 | 9 | memory@0 { |
| 10 | + device_type = "memory"; | |
| 10 | 11 | reg = <0x0 0x2000000>; |
| 11 | 12 | }; |
| 12 | 13 | |
| @@ -22,6 +22,7 @@ config PARISC · 21 unmodified lines | ||
| 22 | 22 | select GENERIC_SMP_IDLE_THREAD |
| 23 | 23 | select GENERIC_STRNCPY_FROM_USER |
| 24 | 24 | select SYSCTL_ARCH_UNALIGN_ALLOW |
| 25 | + select SYSCTL_EXCEPTION_TRACE | |
| 25 | 26 | select HAVE_MOD_ARCH_SPECIFIC |
| 26 | 27 | select VIRT_TO_BUS |
| 27 | 28 | select MODULES_USE_ELF_RELA |
| @@ -55,6 +55,11 @@ · 54 unmodified lines | ||
| 55 | 55 | #define STACK_TOP TASK_SIZE |
| 56 | 56 | #define STACK_TOP_MAX DEFAULT_TASK_SIZE |
| 57 | 57 | |
| 58 | +/* Allow bigger stacks for 64-bit processes */ | |
| 59 | +#define STACK_SIZE_MAX (USER_WIDE_MODE \ | |
| 60 | + ? (1 << 30) /* 1 GB */ \ | |
| 61 | + : (CONFIG_MAX_STACK_SIZE_MB*1024*1024)) | |
| 62 | + | |
| 58 | 63 | #endif |
| 59 | 64 | |
| 60 | 65 | #ifndef __ASSEMBLY__ |
| @@ -829,8 +829,9 @@ · 828 unmodified lines | ||
| 829 | 829 | #define __NR_sched_setattr (__NR_Linux + 334) |
| 830 | 830 | #define __NR_sched_getattr (__NR_Linux + 335) |
| 831 | 831 | #define __NR_utimes (__NR_Linux + 336) |
| 832 | +#define __NR_renameat2 (__NR_Linux + 337) | |
| 832 | 833 | |
| 833 | −#define __NR_Linux_syscalls (__NR_utimes + 1) | |
| 834 | +#define __NR_Linux_syscalls (__NR_renameat2 + 1) | |
| 834 | 835 | |
| 835 | 836 | |
| 836 | 837 | #define __IGNORE_select /* newselect */ |
| @@ -72,10 +72,10 @@ static unsigned long mmap_upper_limit(void) · 71 unmodified lines | ||
| 72 | 72 | { |
| 73 | 73 | unsigned long stack_base; |
| 74 | 74 | |
| 75 | − /* Limit stack size to 1GB - see setup_arg_pages() in fs/exec.c */ | |
| 75 | + /* Limit stack size - see setup_arg_pages() in fs/exec.c */ | |
| 76 | 76 | stack_base = rlimit_max(RLIMIT_STACK); |
| 77 | − if (stack_base > (1 << 30)) | |
| 78 | − stack_base = 1 << 30; | |
| 77 | + if (stack_base > STACK_SIZE_MAX) | |
| 78 | + stack_base = STACK_SIZE_MAX; | |
| 79 | 79 | |
| 80 | 80 | return PAGE_ALIGN(STACK_TOP - stack_base); |
| 81 | 81 | } |
| @@ -589,10 +589,13 @@ cas_nocontend: · 588 unmodified lines | ||
| 589 | 589 | # endif |
| 590 | 590 | /* ENABLE_LWS_DEBUG */ |
| 591 | 591 | |
| 592 | + rsm PSW_SM_I, %r0 /* Disable interrupts */ | |
| 593 | + /* COW breaks can cause contention on UP systems */ | |
| 592 | 594 | LDCW 0(%sr2,%r20), %r28 /* Try to acquire the lock */ |
| 593 | 595 | cmpb,<>,n %r0, %r28, cas_action /* Did we get it? */ |
| 594 | 596 | cas_wouldblock: |
| 595 | 597 | ldo 2(%r0), %r28 /* 2nd case */ |
| 598 | + ssm PSW_SM_I, %r0 | |
| 596 | 599 | b lws_exit /* Contended... */ |
| 597 | 600 | ldo -EAGAIN(%r0), %r21 /* Spin in userspace */ |
| 598 | 601 | |
| @@ -619,15 +622,17 @@ cas_action: · 20 unmodified lines | ||
| 619 | 622 | stw %r1, 4(%sr2,%r20) |
| 620 | 623 | #endif |
| 621 | 624 | /* The load and store could fail */ |
| 622 | −1: ldw 0(%sr3,%r26), %r28 | |
| 625 | +1: ldw,ma 0(%sr3,%r26), %r28 | |
| 623 | 626 | sub,<> %r28, %r25, %r0 |
| 624 | −2: stw %r24, 0(%sr3,%r26) | |
| 627 | +2: stw,ma %r24, 0(%sr3,%r26) | |
| 625 | 628 | /* Free lock */ |
| 626 | − stw %r20, 0(%sr2,%r20) | |
| 629 | + stw,ma %r20, 0(%sr2,%r20) | |
| 627 | 630 | #if ENABLE_LWS_DEBUG |
| 628 | 631 | /* Clear thread register indicator */ |
| 629 | 632 | stw %r0, 4(%sr2,%r20) |
| 630 | 633 | #endif |
| 634 | + /* Enable interrupts */ | |
| 635 | + ssm PSW_SM_I, %r0 | |
| 631 | 636 | /* Return to userspace, set no error */ |
| 632 | 637 | b lws_exit |
| 633 | 638 | copy %r0, %r21 |
| @@ -639,6 +644,7 @@ cas_action: · 5 unmodified lines | ||
| 639 | 644 | #if ENABLE_LWS_DEBUG |
| 640 | 645 | stw %r0, 4(%sr2,%r20) |
| 641 | 646 | #endif |
| 647 | + ssm PSW_SM_I, %r0 | |
| 642 | 648 | b lws_exit |
| 643 | 649 | ldo -EFAULT(%r0),%r21 /* set errno */ |
| 644 | 650 | nop |
| @@ -432,6 +432,7 @@ · 431 unmodified lines | ||
| 432 | 432 | ENTRY_SAME(sched_setattr) |
| 433 | 433 | ENTRY_SAME(sched_getattr) /* 335 */ |
| 434 | 434 | ENTRY_COMP(utimes) |
| 435 | + ENTRY_SAME(renameat2) | |
| 435 | 436 | |
| 436 | 437 | /* Nothing yet */ |
| 437 | 438 | |
| @@ -25,6 +25,7 @@ · 24 unmodified lines | ||
| 25 | 25 | #include <linux/interrupt.h> |
| 26 | 26 | #include <linux/console.h> |
| 27 | 27 | #include <linux/bug.h> |
| 28 | +#include <linux/ratelimit.h> | |
| 28 | 29 | |
| 29 | 30 | #include <asm/assembly.h> |
| 30 | 31 | #include <asm/uaccess.h> |
| @@ -42,9 +43,6 @@ · 11 unmodified lines | ||
| 42 | 43 | |
| 43 | 44 | #include "../math-emu/math-emu.h" /* for handle_fpe() */ |
| 44 | 45 | |
| 45 | −#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */ | |
| 46 | − /* dumped to the console via printk) */ | |
| 47 | − | |
| 48 | 46 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) |
| 49 | 47 | DEFINE_SPINLOCK(pa_dbit_lock); |
| 50 | 48 | #endif |
| @@ -160,6 +158,17 @@ void show_regs(struct pt_regs *regs) · 109 unmodified lines | ||
| 160 | 158 | } |
| 161 | 159 | } |
| 162 | 160 | |
| 161 | +static DEFINE_RATELIMIT_STATE(_hppa_rs, | |
| 162 | + DEFAULT_RATELIMIT_INTERVAL, DEFAULT_RATELIMIT_BURST); | |
| 163 | + | |
| 164 | +#define parisc_printk_ratelimited(critical, regs, fmt, ...) { \ | |
| 165 | + if ((critical || show_unhandled_signals) && __ratelimit(&_hppa_rs)) { \ | |
| 166 | + printk(fmt, ##__VA_ARGS__); \ | |
| 167 | + show_regs(regs); \ | |
| 168 | + } \ | |
| 169 | +} | |
| 170 | + | |
| 171 | + | |
| 163 | 172 | static void do_show_stack(struct unwind_frame_info *info) |
| 164 | 173 | { |
| 165 | 174 | int i = 1; |
| @@ -229,12 +238,10 @@ void die_if_kernel(char *str, struct pt_regs *regs, long err) · 63 unmodified lines | ||
| 229 | 238 | if (err == 0) |
| 230 | 239 | return; /* STFU */ |
| 231 | 240 | |
| 232 | − printk(KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n", | |
| 241 | + parisc_printk_ratelimited(1, regs, | |
| 242 | + KERN_CRIT "%s (pid %d): %s (code %ld) at " RFMT "\n", | |
| 233 | 243 | current->comm, task_pid_nr(current), str, err, regs->iaoq[0]); |
| 234 | −#ifdef PRINT_USER_FAULTS | |
| 235 | − /* XXX for debugging only */ | |
| 236 | − show_regs(regs); | |
| 237 | −#endif | |
| 244 | + | |
| 238 | 245 | return; |
| 239 | 246 | } |
| 240 | 247 | |
| @@ -321,14 +328,11 @@ static void handle_break(struct pt_regs *regs) · 80 unmodified lines | ||
| 321 | 328 | (tt == BUG_TRAP_TYPE_NONE) ? 9 : 0); |
| 322 | 329 | } |
| 323 | 330 | |
| 324 | −#ifdef PRINT_USER_FAULTS | |
| 325 | − if (unlikely(iir != GDB_BREAK_INSN)) { | |
| 326 | − printk(KERN_DEBUG "break %d,%d: pid=%d command='%s'\n", | |
| 331 | + if (unlikely(iir != GDB_BREAK_INSN)) | |
| 332 | + parisc_printk_ratelimited(0, regs, | |
| 333 | + KERN_DEBUG "break %d,%d: pid=%d command='%s'\n", | |
| 327 | 334 | iir & 31, (iir>>13) & ((1<<13)-1), |
| 328 | 335 | task_pid_nr(current), current->comm); |
| 329 | − show_regs(regs); | |
| 330 | − } | |
| 331 | −#endif | |
| 332 | 336 | |
| 333 | 337 | /* send standard GDB signal */ |
| 334 | 338 | handle_gdb_break(regs, TRAP_BRKPT); |
| @@ -758,11 +762,9 @@ void notrace handle_interruption(int code, struct pt_regs *regs) · 423 unmodified lines | ||
| 758 | 762 | |
| 759 | 763 | default: |
| 760 | 764 | if (user_mode(regs)) { |
| 761 | −#ifdef PRINT_USER_FAULTS | |
| 762 | − printk(KERN_DEBUG "\nhandle_interruption() pid=%d command='%s'\n", | |
| 763 | − task_pid_nr(current), current->comm); | |
| 764 | − show_regs(regs); | |
| 765 | −#endif | |
| 765 | + parisc_printk_ratelimited(0, regs, KERN_DEBUG | |
| 766 | + "handle_interruption() pid=%d command='%s'\n", | |
| 767 | + task_pid_nr(current), current->comm); | |
| 766 | 768 | /* SIGBUS, for lack of a better one. */ |
| 767 | 769 | si.si_signo = SIGBUS; |
| 768 | 770 | si.si_code = BUS_OBJERR; |
| @@ -779,16 +781,10 @@ void notrace handle_interruption(int code, struct pt_regs *regs) · 10 unmodified lines | ||
| 779 | 781 | |
| 780 | 782 | if (user_mode(regs)) { |
| 781 | 783 | if ((fault_space >> SPACEID_SHIFT) != (regs->sr[7] >> SPACEID_SHIFT)) { |
| 782 | −#ifdef PRINT_USER_FAULTS | |
| 783 | − if (fault_space == 0) | |
| 784 | − printk(KERN_DEBUG "User Fault on Kernel Space "); | |
| 785 | − else | |
| 786 | − printk(KERN_DEBUG "User Fault (long pointer) (fault %d) ", | |
| 787 | − code); | |
| 788 | − printk(KERN_CONT "pid=%d command='%s'\n", | |
| 789 | − task_pid_nr(current), current->comm); | |
| 790 | − show_regs(regs); | |
| 791 | −#endif | |
| 784 | + parisc_printk_ratelimited(0, regs, KERN_DEBUG | |
| 785 | + "User fault %d on space 0x%08lx, pid=%d command='%s'\n", | |
| 786 | + code, fault_space, | |
| 787 | + task_pid_nr(current), current->comm); | |
| 792 | 788 | si.si_signo = SIGSEGV; |
| 793 | 789 | si.si_errno = 0; |
| 794 | 790 | si.si_code = SEGV_MAPERR; |
| @@ -19,10 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <asm/uaccess.h> |
| 20 | 20 | #include <asm/traps.h> |
| 21 | 21 | |
| 22 | −#define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */ | |
| 23 | − /* dumped to the console via printk) */ | |
| 24 | − | |
| 25 | − | |
| 26 | 22 | /* Various important other fields */ |
| 27 | 23 | #define bit22set(x) (x & 0x00000200) |
| 28 | 24 | #define bits23_25set(x) (x & 0x000001c0) |
| @@ -34,6 +30,8 @@ · 5 unmodified lines | ||
| 34 | 30 | |
| 35 | 31 | DEFINE_PER_CPU(struct exception_data, exception_data); |
| 36 | 32 | |
| 33 | +int show_unhandled_signals = 1; | |
| 34 | + | |
| 37 | 35 | /* |
| 38 | 36 | * parisc_acctyp(unsigned int inst) -- |
| 39 | 37 | * Given a PA-RISC memory access instruction, determine if the |
| @@ -173,6 +171,32 @@ int fixup_exception(struct pt_regs *regs) · 133 unmodified lines | ||
| 173 | 171 | return 0; |
| 174 | 172 | } |
| 175 | 173 | |
| 174 | +/* | |
| 175 | + * Print out info about fatal segfaults, if the show_unhandled_signals | |
| 176 | + * sysctl is set: | |
| 177 | + */ | |
| 178 | +static inline void | |
| 179 | +show_signal_msg(struct pt_regs *regs, unsigned long code, | |
| 180 | + unsigned long address, struct task_struct *tsk, | |
| 181 | + struct vm_area_struct *vma) | |
| 182 | +{ | |
| 183 | + if (!unhandled_signal(tsk, SIGSEGV)) | |
| 184 | + return; | |
| 185 | + | |
| 186 | + if (!printk_ratelimit()) | |
| 187 | + return; | |
| 188 | + | |
| 189 | + pr_warn("\n"); | |
| 190 | + pr_warn("do_page_fault() command='%s' type=%lu address=0x%08lx", | |
| 191 | + tsk->comm, code, address); | |
| 192 | + print_vma_addr(KERN_CONT " in ", regs->iaoq[0]); | |
| 193 | + if (vma) | |
| 194 | + pr_warn(" vm_start = 0x%08lx, vm_end = 0x%08lx\n", | |
| 195 | + vma->vm_start, vma->vm_end); | |
| 196 | + | |
| 197 | + show_regs(regs); | |
| 198 | +} | |
| 199 | + | |
| 176 | 200 | void do_page_fault(struct pt_regs *regs, unsigned long code, |
| 177 | 201 | unsigned long address) |
| 178 | 202 | { |
| @@ -270,16 +294,8 @@ bad_area: · 91 unmodified lines | ||
| 270 | 294 | if (user_mode(regs)) { |
| 271 | 295 | struct siginfo si; |
| 272 | 296 | |
| 273 | −#ifdef PRINT_USER_FAULTS | |
| 274 | − printk(KERN_DEBUG "\n"); | |
| 275 | − printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n", | |
| 276 | − task_pid_nr(tsk), tsk->comm, code, address); | |
| 277 | − if (vma) { | |
| 278 | − printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n", | |
| 279 | − vma->vm_start, vma->vm_end); | |
| 280 | − } | |
| 281 | − show_regs(regs); | |
| 282 | −#endif | |
| 297 | + show_signal_msg(regs, code, address, tsk, vma); | |
| 298 | + | |
| 283 | 299 | switch (code) { |
| 284 | 300 | case 15: /* Data TLB miss fault/Data page fault */ |
| 285 | 301 | /* send SIGSEGV when outside of vma */ |
| @@ -150,7 +150,9 @@ endif · 149 unmodified lines | ||
| 150 | 150 | |
| 151 | 151 | CFLAGS-$(CONFIG_TUNE_CELL) += $(call cc-option,-mtune=cell) |
| 152 | 152 | |
| 153 | −KBUILD_CPPFLAGS += -Iarch/$(ARCH) | |
| 153 | +asinstr := $(call as-instr,lis 9$(comma)foo@high,-DHAVE_AS_ATHIGH=1) | |
| 154 | + | |
| 155 | +KBUILD_CPPFLAGS += -Iarch/$(ARCH) $(asinstr) | |
| 154 | 156 | KBUILD_AFLAGS += -Iarch/$(ARCH) |
| 155 | 157 | KBUILD_CFLAGS += -msoft-float -pipe -Iarch/$(ARCH) $(CFLAGS-y) |
| 156 | 158 | CPP = $(CC) -E $(KBUILD_CFLAGS) |
| @@ -318,11 +318,16 @@ n: · 317 unmodified lines | ||
| 318 | 318 | addi reg,reg,(name - 0b)@l; |
| 319 | 319 | |
| 320 | 320 | #ifdef __powerpc64__ |
| 321 | +#ifdef HAVE_AS_ATHIGH | |
| 322 | +#define __AS_ATHIGH high | |
| 323 | +#else | |
| 324 | +#define __AS_ATHIGH h | |
| 325 | +#endif | |
| 321 | 326 | #define LOAD_REG_IMMEDIATE(reg,expr) \ |
| 322 | 327 | lis reg,(expr)@highest; \ |
| 323 | 328 | ori reg,reg,(expr)@higher; \ |
| 324 | 329 | rldicr reg,reg,32,31; \ |
| 325 | − oris reg,reg,(expr)@h; \ | |
| 330 | + oris reg,reg,(expr)@__AS_ATHIGH; \ | |
| 326 | 331 | ori reg,reg,(expr)@l; |
| 327 | 332 | |
| 328 | 333 | #define LOAD_REG_ADDR(reg,name) \ |
| @@ -39,6 +39,17 @@ static inline int overlaps_kernel_text(unsigned long start, unsigned long end) · 38 unmodified lines | ||
| 39 | 39 | (unsigned long)_stext < end; |
| 40 | 40 | } |
| 41 | 41 | |
| 42 | +static inline int overlaps_kvm_tmp(unsigned long start, unsigned long end) | |
| 43 | +{ | |
| 44 | +#ifdef CONFIG_KVM_GUEST | |
| 45 | + extern char kvm_tmp[]; | |
| 46 | + return start < (unsigned long)kvm_tmp && | |
| 47 | + (unsigned long)&kvm_tmp[1024 * 1024] < end; | |
| 48 | +#else | |
| 49 | + return 0; | |
| 50 | +#endif | |
| 51 | +} | |
| 52 | + | |
| 42 | 53 | #undef dereference_function_descriptor |
| 43 | 54 | static inline void *dereference_function_descriptor(void *ptr) |
| 44 | 55 | { |
| @@ -361,3 +361,4 @@ SYSCALL(finit_module) · 360 unmodified lines | ||
| 361 | 361 | SYSCALL(ni_syscall) /* sys_kcmp */ |
| 362 | 362 | SYSCALL_SPU(sched_setattr) |
| 363 | 363 | SYSCALL_SPU(sched_getattr) |
| 364 | +SYSCALL_SPU(renameat2) | |
| @@ -12,7 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | #include <uapi/asm/unistd.h> |
| 13 | 13 | |
| 14 | 14 | |
| 15 | −#define __NR_syscalls 357 | |
| 15 | +#define __NR_syscalls 358 | |
| 16 | 16 | |
| 17 | 17 | #define __NR__exit __NR_exit |
| 18 | 18 | #define NR_syscalls __NR_syscalls |
| @@ -379,5 +379,6 @@ · 378 unmodified lines | ||
| 379 | 379 | #define __NR_kcmp 354 |
| 380 | 380 | #define __NR_sched_setattr 355 |
| 381 | 381 | #define __NR_sched_getattr 356 |
| 382 | +#define __NR_renameat2 357 | |
| 382 | 383 | |
| 383 | 384 | #endif /* _UAPI_ASM_POWERPC_UNISTD_H_ */ |
| @@ -74,7 +74,7 @@ · 73 unmodified lines | ||
| 74 | 74 | #define KVM_INST_MTSRIN 0x7c0001e4 |
| 75 | 75 | |
| 76 | 76 | static bool kvm_patching_worked = true; |
| 77 | −static char kvm_tmp[1024 * 1024]; | |
| 77 | +char kvm_tmp[1024 * 1024]; | |
| 78 | 78 | static int kvm_tmp_index; |
| 79 | 79 | |
| 80 | 80 | static inline void kvm_patch_ins(u32 *inst, u32 new_inst) |
| @@ -237,7 +237,7 @@ static void wake_offline_cpus(void) · 236 unmodified lines | ||
| 237 | 237 | if (!cpu_online(cpu)) { |
| 238 | 238 | printk(KERN_INFO "kexec: Waking offline cpu %d.\n", |
| 239 | 239 | cpu); |
| 240 | − cpu_up(cpu); | |
| 240 | + WARN_ON(cpu_up(cpu)); | |
| 241 | 241 | } |
| 242 | 242 | } |
| 243 | 243 | } |
| @@ -813,9 +813,6 @@ static void __init clocksource_init(void) · 812 unmodified lines | ||
| 813 | 813 | static int decrementer_set_next_event(unsigned long evt, |
| 814 | 814 | struct clock_event_device *dev) |
| 815 | 815 | { |
| 816 | − /* Don't adjust the decrementer if some irq work is pending */ | |
| 817 | − if (test_irq_work_pending()) | |
| 818 | − return 0; | |
| 819 | 816 | __get_cpu_var(decrementers_next_tb) = get_tb_or_rtc() + evt; |
| 820 | 817 | set_dec(evt); |
| 821 | 818 | |
| @@ -886,7 +886,7 @@ static int kvmppc_book3s_init(void) · 885 unmodified lines | ||
| 886 | 886 | r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); |
| 887 | 887 | if (r) |
| 888 | 888 | return r; |
| 889 | −#ifdef CONFIG_KVM_BOOK3S_32 | |
| 889 | +#ifdef CONFIG_KVM_BOOK3S_32_HANDLER | |
| 890 | 890 | r = kvmppc_book3s_init_pr(); |
| 891 | 891 | #endif |
| 892 | 892 | return r; |
| @@ -895,7 +895,7 @@ static int kvmppc_book3s_init(void) · 2 unmodified lines | ||
| 895 | 895 | |
| 896 | 896 | static void kvmppc_book3s_exit(void) |
| 897 | 897 | { |
| 898 | −#ifdef CONFIG_KVM_BOOK3S_32 | |
| 898 | +#ifdef CONFIG_KVM_BOOK3S_32_HANDLER | |
| 899 | 899 | kvmppc_book3s_exit_pr(); |
| 900 | 900 | #endif |
| 901 | 901 | kvm_exit(); |
| @@ -905,7 +905,7 @@ module_init(kvmppc_book3s_init); · 3 unmodified lines | ||
| 905 | 905 | module_exit(kvmppc_book3s_exit); |
| 906 | 906 | |
| 907 | 907 | /* On 32bit this is our one and only kernel module */ |
| 908 | −#ifdef CONFIG_KVM_BOOK3S_32 | |
| 908 | +#ifdef CONFIG_KVM_BOOK3S_32_HANDLER | |
| 909 | 909 | MODULE_ALIAS_MISCDEV(KVM_MINOR); |
| 910 | 910 | MODULE_ALIAS("devname:kvm"); |
| 911 | 911 | #endif |
| @@ -234,7 +234,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags, · 233 unmodified lines | ||
| 234 | 234 | pte_size = psize; |
| 235 | 235 | pte = lookup_linux_pte_and_update(pgdir, hva, writing, |
| 236 | 236 | &pte_size); |
| 237 | − if (pte_present(pte)) { | |
| 237 | + if (pte_present(pte) && !pte_numa(pte)) { | |
| 238 | 238 | if (writing && !pte_write(pte)) |
| 239 | 239 | /* make the actual HPTE be read-only */ |
| 240 | 240 | ptel = hpte_make_readonly(ptel); |
| @@ -1323,6 +1323,110 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206) · 1322 unmodified lines | ||
| 1323 | 1323 | mr r3, r9 |
| 1324 | 1324 | bl kvmppc_save_fp |
| 1325 | 1325 | |
| 1326 | +#ifdef CONFIG_PPC_TRANSACTIONAL_MEM | |
| 1327 | +BEGIN_FTR_SECTION | |
| 1328 | + b 2f | |
| 1329 | +END_FTR_SECTION_IFCLR(CPU_FTR_TM) | |
| 1330 | + /* Turn on TM. */ | |
| 1331 | + mfmsr r8 | |
| 1332 | + li r0, 1 | |
| 1333 | + rldimi r8, r0, MSR_TM_LG, 63-MSR_TM_LG | |
| 1334 | + mtmsrd r8 | |
| 1335 | + | |
| 1336 | + ld r5, VCPU_MSR(r9) | |
| 1337 | + rldicl. r5, r5, 64 - MSR_TS_S_LG, 62 | |
| 1338 | + beq 1f /* TM not active in guest. */ | |
| 1339 | + | |
| 1340 | + li r3, TM_CAUSE_KVM_RESCHED | |
| 1341 | + | |
| 1342 | + /* Clear the MSR RI since r1, r13 are all going to be foobar. */ | |
| 1343 | + li r5, 0 | |
| 1344 | + mtmsrd r5, 1 | |
| 1345 | + | |
| 1346 | + /* All GPRs are volatile at this point. */ | |
| 1347 | + TRECLAIM(R3) | |
| 1348 | + | |
| 1349 | + /* Temporarily store r13 and r9 so we have some regs to play with */ | |
| 1350 | + SET_SCRATCH0(r13) | |
| 1351 | + GET_PACA(r13) | |
| 1352 | + std r9, PACATMSCRATCH(r13) | |
| 1353 | + ld r9, HSTATE_KVM_VCPU(r13) | |
| 1354 | + | |
| 1355 | + /* Get a few more GPRs free. */ | |
| 1356 | + std r29, VCPU_GPRS_TM(29)(r9) | |
| 1357 | + std r30, VCPU_GPRS_TM(30)(r9) | |
| 1358 | + std r31, VCPU_GPRS_TM(31)(r9) | |
| 1359 | + | |
| 1360 | + /* Save away PPR and DSCR soon so don't run with user values. */ | |
| 1361 | + mfspr r31, SPRN_PPR | |
| 1362 | + HMT_MEDIUM | |
| 1363 | + mfspr r30, SPRN_DSCR | |
| 1364 | + ld r29, HSTATE_DSCR(r13) | |
| 1365 | + mtspr SPRN_DSCR, r29 | |
| 1366 | + | |
| 1367 | + /* Save all but r9, r13 & r29-r31 */ | |
| 1368 | + reg = 0 | |
| 1369 | + .rept 29 | |
| 1370 | + .if (reg != 9) && (reg != 13) | |
| 1371 | + std reg, VCPU_GPRS_TM(reg)(r9) | |
| 1372 | + .endif | |
| 1373 | + reg = reg + 1 | |
| 1374 | + .endr | |
| 1375 | + /* ... now save r13 */ | |
| 1376 | + GET_SCRATCH0(r4) | |
| 1377 | + std r4, VCPU_GPRS_TM(13)(r9) | |
| 1378 | + /* ... and save r9 */ | |
| 1379 | + ld r4, PACATMSCRATCH(r13) | |
| 1380 | + std r4, VCPU_GPRS_TM(9)(r9) | |
| 1381 | + | |
| 1382 | + /* Reload stack pointer and TOC. */ | |
| 1383 | + ld r1, HSTATE_HOST_R1(r13) | |
| 1384 | + ld r2, PACATOC(r13) | |
| 1385 | + | |
| 1386 | + /* Set MSR RI now we have r1 and r13 back. */ | |
| 1387 | + li r5, MSR_RI | |
| 1388 | + mtmsrd r5, 1 | |
| 1389 | + | |
| 1390 | + /* Save away checkpinted SPRs. */ | |
| 1391 | + std r31, VCPU_PPR_TM(r9) | |
| 1392 | + std r30, VCPU_DSCR_TM(r9) | |
| 1393 | + mflr r5 | |
| 1394 | + mfcr r6 | |
| 1395 | + mfctr r7 | |
| 1396 | + mfspr r8, SPRN_AMR | |
| 1397 | + mfspr r10, SPRN_TAR | |
| 1398 | + std r5, VCPU_LR_TM(r9) | |
| 1399 | + stw r6, VCPU_CR_TM(r9) | |
| 1400 | + std r7, VCPU_CTR_TM(r9) | |
| 1401 | + std r8, VCPU_AMR_TM(r9) | |
| 1402 | + std r10, VCPU_TAR_TM(r9) | |
| 1403 | + | |
| 1404 | + /* Restore r12 as trap number. */ | |
| 1405 | + lwz r12, VCPU_TRAP(r9) | |
| 1406 | + | |
| 1407 | + /* Save FP/VSX. */ | |
| 1408 | + addi r3, r9, VCPU_FPRS_TM | |
| 1409 | + bl .store_fp_state | |
| 1410 | + addi r3, r9, VCPU_VRS_TM | |
| 1411 | + bl .store_vr_state | |
| 1412 | + mfspr r6, SPRN_VRSAVE | |
| 1413 | + stw r6, VCPU_VRSAVE_TM(r9) | |
| 1414 | +1: | |
| 1415 | + /* | |
| 1416 | + * We need to save these SPRs after the treclaim so that the software | |
| 1417 | + * error code is recorded correctly in the TEXASR. Also the user may | |
| 1418 | + * change these outside of a transaction, so they must always be | |
| 1419 | + * context switched. | |
| 1420 | + */ | |
| 1421 | + mfspr r5, SPRN_TFHAR | |
| 1422 | + mfspr r6, SPRN_TFIAR | |
| 1423 | + mfspr r7, SPRN_TEXASR | |
| 1424 | + std r5, VCPU_TFHAR(r9) | |
| 1425 | + std r6, VCPU_TFIAR(r9) | |
| 1426 | + std r7, VCPU_TEXASR(r9) | |
| 1427 | +2: | |
| 1428 | +#endif | |
| 1429 | + | |
| 1326 | 1430 | /* Increment yield count if they have a VPA */ |
| 1327 | 1431 | ld r8, VCPU_VPA(r9) /* do they have a VPA? */ |
| 1328 | 1432 | cmpdi r8, 0 |
| @@ -1153,7 +1153,7 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm, · 1152 unmodified lines | ||
| 1153 | 1153 | goto free_vcpu; |
| 1154 | 1154 | vcpu->arch.book3s = vcpu_book3s; |
| 1155 | 1155 | |
| 1156 | −#ifdef CONFIG_KVM_BOOK3S_32 | |
| 1156 | +#ifdef CONFIG_KVM_BOOK3S_32_HANDLER | |
| 1157 | 1157 | vcpu->arch.shadow_vcpu = |
| 1158 | 1158 | kzalloc(sizeof(*vcpu->arch.shadow_vcpu), GFP_KERNEL); |
| 1159 | 1159 | if (!vcpu->arch.shadow_vcpu) |
| @@ -1198,7 +1198,7 @@ static struct kvm_vcpu *kvmppc_core_vcpu_create_pr(struct kvm *kvm, · 38 unmodified lines | ||
| 1198 | 1198 | uninit_vcpu: |
| 1199 | 1199 | kvm_vcpu_uninit(vcpu); |
| 1200 | 1200 | free_shadow_vcpu: |
| 1201 | −#ifdef CONFIG_KVM_BOOK3S_32 | |
| 1201 | +#ifdef CONFIG_KVM_BOOK3S_32_HANDLER | |
| 1202 | 1202 | kfree(vcpu->arch.shadow_vcpu); |
| 1203 | 1203 | free_vcpu3s: |
| 1204 | 1204 | #endif |
| @@ -1215,7 +1215,7 @@ static void kvmppc_core_vcpu_free_pr(struct kvm_vcpu *vcpu) · 10 unmodified lines | ||
| 1215 | 1215 | |
| 1216 | 1216 | free_page((unsigned long)vcpu->arch.shared & PAGE_MASK); |
| 1217 | 1217 | kvm_vcpu_uninit(vcpu); |
| 1218 | −#ifdef CONFIG_KVM_BOOK3S_32 | |
| 1218 | +#ifdef CONFIG_KVM_BOOK3S_32_HANDLER | |
| 1219 | 1219 | kfree(vcpu->arch.shadow_vcpu); |
| 1220 | 1220 | #endif |
| 1221 | 1221 | vfree(vcpu_book3s); |
| @@ -207,6 +207,10 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend, · 206 unmodified lines | ||
| 207 | 207 | if (overlaps_kernel_text(vaddr, vaddr + step)) |
| 208 | 208 | tprot &= ~HPTE_R_N; |
| 209 | 209 | |
| 210 | + /* Make kvm guest trampolines executable */ | |
| 211 | + if (overlaps_kvm_tmp(vaddr, vaddr + step)) | |
| 212 | + tprot &= ~HPTE_R_N; | |
| 213 | + | |
| 210 | 214 | /* |
| 211 | 215 | * If relocatable, check if it overlaps interrupt vectors that |
| 212 | 216 | * are copied down to real 0. For relocatable kernel |
| @@ -549,7 +549,8 @@ static int ioda_eeh_reset(struct eeh_pe *pe, int option) · 548 unmodified lines | ||
| 549 | 549 | ret = ioda_eeh_phb_reset(hose, option); |
| 550 | 550 | } else { |
| 551 | 551 | bus = eeh_pe_bus_get(pe); |
| 552 | − if (pci_is_root_bus(bus)) | |
| 552 | + if (pci_is_root_bus(bus) || | |
| 553 | + pci_is_root_bus(bus->parent)) | |
| 553 | 554 | ret = ioda_eeh_root_reset(hose, option); |
| 554 | 555 | else |
| 555 | 556 | ret = ioda_eeh_bridge_reset(hose, bus->self, option); |
| @@ -820,6 +820,9 @@ static int ctr_aes_crypt(struct blkcipher_desc *desc, long func, · 819 unmodified lines | ||
| 820 | 820 | else |
| 821 | 821 | memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE); |
| 822 | 822 | spin_unlock(&ctrblk_lock); |
| 823 | + } else { | |
| 824 | + if (!nbytes) | |
| 825 | + memcpy(walk->iv, ctrptr, AES_BLOCK_SIZE); | |
| 823 | 826 | } |
| 824 | 827 | /* |
| 825 | 828 | * final block may be < AES_BLOCK_SIZE, copy only nbytes |
| @@ -429,6 +429,9 @@ static int ctr_desall_crypt(struct blkcipher_desc *desc, long func, · 428 unmodified lines | ||
| 429 | 429 | else |
| 430 | 430 | memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE); |
| 431 | 431 | spin_unlock(&ctrblk_lock); |
| 432 | + } else { | |
| 433 | + if (!nbytes) | |
| 434 | + memcpy(walk->iv, ctrptr, DES_BLOCK_SIZE); | |
| 432 | 435 | } |
| 433 | 436 | /* final block may be < DES_BLOCK_SIZE, copy only nbytes */ |
| 434 | 437 | if (nbytes) { |
| @@ -158,6 +158,7 @@ int kvm_dev_ioctl_check_extension(long ext) · 157 unmodified lines | ||
| 158 | 158 | case KVM_CAP_ONE_REG: |
| 159 | 159 | case KVM_CAP_ENABLE_CAP: |
| 160 | 160 | case KVM_CAP_S390_CSS_SUPPORT: |
| 161 | + case KVM_CAP_IRQFD: | |
| 161 | 162 | case KVM_CAP_IOEVENTFD: |
| 162 | 163 | case KVM_CAP_DEVICE_CTRL: |
| 163 | 164 | case KVM_CAP_ENABLE_CAP_VM: |
| @@ -811,7 +811,7 @@ static struct bpf_binary_header *bpf_alloc_binary(unsigned int bpfsize, · 810 unmodified lines | ||
| 811 | 811 | return NULL; |
| 812 | 812 | memset(header, 0, sz); |
| 813 | 813 | header->pages = sz / PAGE_SIZE; |
| 814 | − hole = sz - (bpfsize + sizeof(*header)); | |
| 814 | + hole = min(sz - (bpfsize + sizeof(*header)), PAGE_SIZE - sizeof(*header)); | |
| 815 | 815 | /* Insert random number of illegal instructions before BPF code |
| 816 | 816 | * and make sure the first instruction starts at an even address. |
| 817 | 817 | */ |
| @@ -24,7 +24,8 @@ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | /* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). |
| 26 | 26 | * The page copy blockops can use 0x6000000 to 0x8000000. |
| 27 | − * The TSB is mapped in the 0x8000000 to 0xa000000 range. | |
| 27 | + * The 8K TSB is mapped in the 0x8000000 to 0x8400000 range. | |
| 28 | + * The 4M TSB is mapped in the 0x8400000 to 0x8800000 range. | |
| 28 | 29 | * The PROM resides in an area spanning 0xf0000000 to 0x100000000. |
| 29 | 30 | * The vmalloc area spans 0x100000000 to 0x200000000. |
| 30 | 31 | * Since modules need to be in the lowest 32-bits of the address space, |
| @@ -33,7 +34,8 @@ · 2 unmodified lines | ||
| 33 | 34 | * 0x400000000. |
| 34 | 35 | */ |
| 35 | 36 | #define TLBTEMP_BASE _AC(0x0000000006000000,UL) |
| 36 | −#define TSBMAP_BASE _AC(0x0000000008000000,UL) | |
| 37 | +#define TSBMAP_8K_BASE _AC(0x0000000008000000,UL) | |
| 38 | +#define TSBMAP_4M_BASE _AC(0x0000000008400000,UL) | |
| 37 | 39 | #define MODULES_VADDR _AC(0x0000000010000000,UL) |
| 38 | 40 | #define MODULES_LEN _AC(0x00000000e0000000,UL) |
| 39 | 41 | #define MODULES_END _AC(0x00000000f0000000,UL) |
| @@ -151,7 +151,7 @@ static ssize_t store_mmustat_enable(struct device *s, · 150 unmodified lines | ||
| 151 | 151 | size_t count) |
| 152 | 152 | { |
| 153 | 153 | unsigned long val, err; |
| 154 | − int ret = sscanf(buf, "%ld", &val); | |
| 154 | + int ret = sscanf(buf, "%lu", &val); | |
| 155 | 155 | |
| 156 | 156 | if (ret != 1) |
| 157 | 157 | return -EINVAL; |
| @@ -236,6 +236,7 @@ FUNC_NAME: /* %o0=dst, %o1=src, %o2=len */ · 235 unmodified lines | ||
| 236 | 236 | */ |
| 237 | 237 | VISEntryHalf |
| 238 | 238 | |
| 239 | + membar #Sync | |
| 239 | 240 | alignaddr %o1, %g0, %g0 |
| 240 | 241 | |
| 241 | 242 | add %o1, (64 - 1), %o4 |
| @@ -281,18 +281,6 @@ static void noinline __kprobes bogus_32bit_fault_tpc(struct pt_regs *regs) · 280 unmodified lines | ||
| 281 | 281 | show_regs(regs); |
| 282 | 282 | } |
| 283 | 283 | |
| 284 | −static void noinline __kprobes bogus_32bit_fault_address(struct pt_regs *regs, | |
| 285 | − unsigned long addr) | |
| 286 | −{ | |
| 287 | − static int times; | |
| 288 | − | |
| 289 | − if (times++ < 10) | |
| 290 | − printk(KERN_ERR "FAULT[%s:%d]: 32-bit process " | |
| 291 | − "reports 64-bit fault address [%lx]\n", | |
| 292 | − current->comm, current->pid, addr); | |
| 293 | − show_regs(regs); | |
| 294 | −} | |
| 295 | − | |
| 296 | 284 | asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs) |
| 297 | 285 | { |
| 298 | 286 | enum ctx_state prev_state = exception_enter(); |
| @@ -322,10 +310,8 @@ asmlinkage void __kprobes do_sparc64_fault(struct pt_regs *regs) · 23 unmodified lines | ||
| 322 | 310 | goto intr_or_no_mm; |
| 323 | 311 | } |
| 324 | 312 | } |
| 325 | − if (unlikely((address >> 32) != 0)) { | |
| 326 | − bogus_32bit_fault_address(regs, address); | |
| 313 | + if (unlikely((address >> 32) != 0)) | |
| 327 | 314 | goto intr_or_no_mm; |
| 328 | − } | |
| 329 | 315 | } |
| 330 | 316 | |
| 331 | 317 | if (regs->tstate & TSTATE_PRIV) { |
| @@ -133,7 +133,19 @@ static void setup_tsb_params(struct mm_struct *mm, unsigned long tsb_idx, unsign · 132 unmodified lines | ||
| 133 | 133 | mm->context.tsb_block[tsb_idx].tsb_nentries = |
| 134 | 134 | tsb_bytes / sizeof(struct tsb); |
| 135 | 135 | |
| 136 | − base = TSBMAP_BASE; | |
| 136 | + switch (tsb_idx) { | |
| 137 | + case MM_TSB_BASE: | |
| 138 | + base = TSBMAP_8K_BASE; | |
| 139 | + break; | |
| 140 | +#if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) | |
| 141 | + case MM_TSB_HUGE: | |
| 142 | + base = TSBMAP_4M_BASE; | |
| 143 | + break; | |
| 144 | +#endif | |
| 145 | + default: | |
| 146 | + BUG(); | |
| 147 | + } | |
| 148 | + | |
| 137 | 149 | tte = pgprot_val(PAGE_KERNEL_LOCKED); |
| 138 | 150 | tsb_paddr = __pa(mm->context.tsb_block[tsb_idx].tsb); |
| 139 | 151 | BUG_ON(tsb_paddr & (tsb_bytes - 1UL)); |
| @@ -79,6 +79,7 @@ else · 78 unmodified lines | ||
| 79 | 79 | UTS_MACHINE := x86_64 |
| 80 | 80 | CHECKFLAGS += -D__x86_64__ -m64 |
| 81 | 81 | |
| 82 | + biarch := -m64 | |
| 82 | 83 | KBUILD_AFLAGS += -m64 |
| 83 | 84 | KBUILD_CFLAGS += -m64 |
| 84 | 85 | |
| @@ -71,7 +71,7 @@ $(obj)/vmlinux.bin: $(obj)/compressed/vmlinux FORCE · 70 unmodified lines | ||
| 71 | 71 | |
| 72 | 72 | SETUP_OBJS = $(addprefix $(obj)/,$(setup-y)) |
| 73 | 73 | |
| 74 | −sed-voffset := -e 's/^\([0-9a-fA-F]*\) . \(_text\|_end\)$$/\#define VO_\2 0x\1/p' | |
| 74 | +sed-voffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(_text\|_end\)$$/\#define VO_\2 0x\1/p' | |
| 75 | 75 | |
| 76 | 76 | quiet_cmd_voffset = VOFFSET $@ |
| 77 | 77 | cmd_voffset = $(NM) $< | sed -n $(sed-voffset) > $@ |
| @@ -80,7 +80,7 @@ targets += voffset.h · 2 unmodified lines | ||
| 80 | 80 | $(obj)/voffset.h: vmlinux FORCE |
| 81 | 81 | $(call if_changed,voffset) |
| 82 | 82 | |
| 83 | −sed-zoffset := -e 's/^\([0-9a-fA-F]*\) . \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p' | |
| 83 | +sed-zoffset := -e 's/^\([0-9a-fA-F]*\) [ABCDGRSTVW] \(startup_32\|startup_64\|efi32_stub_entry\|efi64_stub_entry\|efi_pe_entry\|input_data\|_end\|z_.*\)$$/\#define ZO_\2 0x\1/p' | |
| 84 | 84 | |
| 85 | 85 | quiet_cmd_zoffset = ZOFFSET $@ |
| 86 | 86 | cmd_zoffset = $(NM) $< | sed -n $(sed-zoffset) > $@ |
| @@ -354,7 +354,7 @@ static void parse_elf(void *output) · 353 unmodified lines | ||
| 354 | 354 | free(phdrs); |
| 355 | 355 | } |
| 356 | 356 | |
| 357 | −asmlinkage void *decompress_kernel(void *rmode, memptr heap, | |
| 357 | +asmlinkage __visible void *decompress_kernel(void *rmode, memptr heap, | |
| 358 | 358 | unsigned char *input_data, |
| 359 | 359 | unsigned long input_len, |
| 360 | 360 | unsigned char *output, |
| @@ -63,6 +63,7 @@ · 62 unmodified lines | ||
| 63 | 63 | /* hpet memory map physical address */ |
| 64 | 64 | extern unsigned long hpet_address; |
| 65 | 65 | extern unsigned long force_hpet_address; |
| 66 | +extern int boot_hpet_disable; | |
| 66 | 67 | extern u8 hpet_blockid; |
| 67 | 68 | extern int hpet_force_user; |
| 68 | 69 | extern u8 hpet_msi_disable; |
| @@ -52,6 +52,7 @@ static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, · 51 unmodified lines | ||
| 52 | 52 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, |
| 53 | 53 | unsigned long addr, pte_t *ptep) |
| 54 | 54 | { |
| 55 | + ptep_clear_flush(vma, addr, ptep); | |
| 55 | 56 | } |
| 56 | 57 | |
| 57 | 58 | static inline int huge_pte_none(pte_t pte) |
| @@ -1,7 +1,7 @@ | ||
| 1 | 1 | #ifndef _ASM_X86_PAGE_64_DEFS_H |
| 2 | 2 | #define _ASM_X86_PAGE_64_DEFS_H |
| 3 | 3 | |
| 4 | −#define THREAD_SIZE_ORDER 1 | |
| 4 | +#define THREAD_SIZE_ORDER 2 | |
| 5 | 5 | #define THREAD_SIZE (PAGE_SIZE << THREAD_SIZE_ORDER) |
| 6 | 6 | #define CURRENT_MASK (~(THREAD_SIZE - 1)) |
| 7 | 7 | |
| @@ -384,7 +384,7 @@ · 383 unmodified lines | ||
| 384 | 384 | #define MSR_IA32_MISC_ENABLE_MWAIT_BIT 18 |
| 385 | 385 | #define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << MSR_IA32_MISC_ENABLE_MWAIT_BIT) |
| 386 | 386 | #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT 22 |
| 387 | −#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT); | |
| 387 | +#define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << MSR_IA32_MISC_ENABLE_LIMIT_CPUID_BIT) | |
| 388 | 388 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT 23 |
| 389 | 389 | #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << MSR_IA32_MISC_ENABLE_XTPR_DISABLE_BIT) |
| 390 | 390 | #define MSR_IA32_MISC_ENABLE_XD_DISABLE_BIT 34 |
| @@ -31,7 +31,7 @@ static char temp_stack[4096]; · 30 unmodified lines | ||
| 31 | 31 | * |
| 32 | 32 | * Wrapper around acpi_enter_sleep_state() to be called by assmebly. |
| 33 | 33 | */ |
| 34 | −acpi_status asmlinkage x86_acpi_enter_sleep_state(u8 state) | |
| 34 | +acpi_status asmlinkage __visible x86_acpi_enter_sleep_state(u8 state) | |
| 35 | 35 | { |
| 36 | 36 | return acpi_enter_sleep_state(state); |
| 37 | 37 | } |
| @@ -2189,7 +2189,7 @@ void send_cleanup_vector(struct irq_cfg *cfg) · 2188 unmodified lines | ||
| 2189 | 2189 | cfg->move_in_progress = 0; |
| 2190 | 2190 | } |
| 2191 | 2191 | |
| 2192 | −asmlinkage void smp_irq_move_cleanup_interrupt(void) | |
| 2192 | +asmlinkage __visible void smp_irq_move_cleanup_interrupt(void) | |
| 2193 | 2193 | { |
| 2194 | 2194 | unsigned vector, me; |
| 2195 | 2195 | |
| @@ -429,14 +429,14 @@ static inline void __smp_thermal_interrupt(void) · 428 unmodified lines | ||
| 429 | 429 | smp_thermal_vector(); |
| 430 | 430 | } |
| 431 | 431 | |
| 432 | −asmlinkage void smp_thermal_interrupt(struct pt_regs *regs) | |
| 432 | +asmlinkage __visible void smp_thermal_interrupt(struct pt_regs *regs) | |
| 433 | 433 | { |
| 434 | 434 | entering_irq(); |
| 435 | 435 | __smp_thermal_interrupt(); |
| 436 | 436 | exiting_ack_irq(); |
| 437 | 437 | } |
| 438 | 438 | |
| 439 | −asmlinkage void smp_trace_thermal_interrupt(struct pt_regs *regs) | |
| 439 | +asmlinkage __visible void smp_trace_thermal_interrupt(struct pt_regs *regs) | |
| 440 | 440 | { |
| 441 | 441 | entering_irq(); |
| 442 | 442 | trace_thermal_apic_entry(THERMAL_APIC_VECTOR); |
| @@ -24,14 +24,14 @@ static inline void __smp_threshold_interrupt(void) · 23 unmodified lines | ||
| 24 | 24 | mce_threshold_vector(); |
| 25 | 25 | } |
| 26 | 26 | |
| 27 | −asmlinkage void smp_threshold_interrupt(void) | |
| 27 | +asmlinkage __visible void smp_threshold_interrupt(void) | |
| 28 | 28 | { |
| 29 | 29 | entering_irq(); |
| 30 | 30 | __smp_threshold_interrupt(); |
| 31 | 31 | exiting_ack_irq(); |
| 32 | 32 | } |
| 33 | 33 | |
| 34 | −asmlinkage void smp_trace_threshold_interrupt(void) | |
| 34 | +asmlinkage __visible void smp_trace_threshold_interrupt(void) | |
| 35 | 35 | { |
| 36 | 36 | entering_irq(); |
| 37 | 37 | trace_threshold_apic_entry(THRESHOLD_APIC_VECTOR); |
| @@ -27,6 +27,7 @@ · 26 unmodified lines | ||
| 27 | 27 | static int __init x86_rdrand_setup(char *s) |
| 28 | 28 | { |
| 29 | 29 | setup_clear_cpu_cap(X86_FEATURE_RDRAND); |
| 30 | + setup_clear_cpu_cap(X86_FEATURE_RDSEED); | |
| 30 | 31 | return 1; |
| 31 | 32 | } |
| 32 | 33 | __setup("nordrand", x86_rdrand_setup); |
| @@ -17,6 +17,7 @@ · 16 unmodified lines | ||
| 17 | 17 | #include <asm/dma.h> |
| 18 | 18 | #include <asm/io_apic.h> |
| 19 | 19 | #include <asm/apic.h> |
| 20 | +#include <asm/hpet.h> | |
| 20 | 21 | #include <asm/iommu.h> |
| 21 | 22 | #include <asm/gart.h> |
| 22 | 23 | #include <asm/irq_remapping.h> |
| @@ -530,6 +531,15 @@ static void __init intel_graphics_stolen(int num, int slot, int func) · 507 unmodified lines | ||
| 530 | 531 | } |
| 531 | 532 | } |
| 532 | 533 | |
| 534 | +static void __init force_disable_hpet(int num, int slot, int func) | |
| 535 | +{ | |
| 536 | +#ifdef CONFIG_HPET_TIMER | |
| 537 | + boot_hpet_disable = 1; | |
| 538 | + pr_info("x86/hpet: Will disable the HPET for this platform because it's not reliable\n"); | |
| 539 | +#endif | |
| 540 | +} | |
| 541 | + | |
| 542 | + | |
| 533 | 543 | #define QFLAG_APPLY_ONCE 0x1 |
| 534 | 544 | #define QFLAG_APPLIED 0x2 |
| 535 | 545 | #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED) |
| @@ -567,6 +577,12 @@ static struct chipset early_qrk[] __initdata = { · 31 unmodified lines | ||
| 567 | 577 | PCI_BASE_CLASS_BRIDGE, 0, intel_remapping_check }, |
| 568 | 578 | { PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, PCI_ANY_ID, |
| 569 | 579 | QFLAG_APPLY_ONCE, intel_graphics_stolen }, |
| 580 | + /* | |
| 581 | + * HPET on current version of Baytrail platform has accuracy | |
| 582 | + * problems, disable it for now: | |
| 583 | + */ | |
| 584 | + { PCI_VENDOR_ID_INTEL, 0x0f00, | |
| 585 | + PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet}, | |
| 570 | 586 | {} |
| 571 | 587 | }; |
| 572 | 588 | |
| @@ -29,7 +29,7 @@ static void __init i386_default_early_setup(void) · 28 unmodified lines | ||
| 29 | 29 | reserve_ebda_region(); |
| 30 | 30 | } |
| 31 | 31 | |
| 32 | −asmlinkage void __init i386_start_kernel(void) | |
| 32 | +asmlinkage __visible void __init i386_start_kernel(void) | |
| 33 | 33 | { |
| 34 | 34 | sanitize_boot_params(&boot_params); |
| 35 | 35 | |
| @@ -137,7 +137,7 @@ static void __init copy_bootdata(char *real_mode_data) · 136 unmodified lines | ||
| 137 | 137 | } |
| 138 | 138 | } |
| 139 | 139 | |
| 140 | −asmlinkage void __init x86_64_start_kernel(char * real_mode_data) | |
| 140 | +asmlinkage __visible void __init x86_64_start_kernel(char * real_mode_data) | |
| 141 | 141 | { |
| 142 | 142 | int i; |
| 143 | 143 | |
| @@ -88,7 +88,7 @@ static inline void hpet_clear_mapping(void) · 87 unmodified lines | ||
| 88 | 88 | /* |
| 89 | 89 | * HPET command line enable / disable |
| 90 | 90 | */ |
| 91 | −static int boot_hpet_disable; | |
| 91 | +int boot_hpet_disable; | |
| 92 | 92 | int hpet_force_user; |
| 93 | 93 | static int hpet_verbose; |
| 94 | 94 | |
| @@ -20,6 +20,8 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <asm/mmu_context.h> |
| 21 | 21 | #include <asm/syscalls.h> |
| 22 | 22 | |
| 23 | +int sysctl_ldt16 = 0; | |
| 24 | + | |
| 23 | 25 | #ifdef CONFIG_SMP |
| 24 | 26 | static void flush_ldt(void *current_mm) |
| 25 | 27 | { |
| @@ -234,7 +236,7 @@ static int write_ldt(void __user *ptr, unsigned long bytecount, int oldmode) · 208 unmodified lines | ||
| 234 | 236 | * IRET leaking the high bits of the kernel stack address. |
| 235 | 237 | */ |
| 236 | 238 | #ifdef CONFIG_X86_64 |
| 237 | − if (!ldt_info.seg_32bit) { | |
| 239 | + if (!ldt_info.seg_32bit && !sysctl_ldt16) { | |
| 238 | 240 | error = -EINVAL; |
| 239 | 241 | goto out_unlock; |
| 240 | 242 | } |
| @@ -52,7 +52,7 @@ · 51 unmodified lines | ||
| 52 | 52 | |
| 53 | 53 | asmlinkage extern void ret_from_fork(void); |
| 54 | 54 | |
| 55 | −asmlinkage DEFINE_PER_CPU(unsigned long, old_rsp); | |
| 55 | +__visible DEFINE_PER_CPU(unsigned long, old_rsp); | |
| 56 | 56 | |
| 57 | 57 | /* Prints also some state that isn't saved in the pt_regs */ |
| 58 | 58 | void __show_regs(struct pt_regs *regs, int all) |
| @@ -191,6 +191,16 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = { · 190 unmodified lines | ||
| 191 | 191 | }, |
| 192 | 192 | }, |
| 193 | 193 | |
| 194 | + /* Certec */ | |
| 195 | + { /* Handle problems with rebooting on Certec BPC600 */ | |
| 196 | + .callback = set_pci_reboot, | |
| 197 | + .ident = "Certec BPC600", | |
| 198 | + .matches = { | |
| 199 | + DMI_MATCH(DMI_SYS_VENDOR, "Certec"), | |
| 200 | + DMI_MATCH(DMI_PRODUCT_NAME, "BPC600"), | |
| 201 | + }, | |
| 202 | + }, | |
| 203 | + | |
| 194 | 204 | /* Dell */ |
| 195 | 205 | { /* Handle problems with rebooting on Dell DXP061 */ |
| 196 | 206 | .callback = set_bios_reboot, |
| @@ -168,7 +168,7 @@ static int smp_stop_nmi_callback(unsigned int val, struct pt_regs *regs) · 167 unmodified lines | ||
| 168 | 168 | * this function calls the 'stop' function on all other CPUs in the system. |
| 169 | 169 | */ |
| 170 | 170 | |
| 171 | −asmlinkage void smp_reboot_interrupt(void) | |
| 171 | +asmlinkage __visible void smp_reboot_interrupt(void) | |
| 172 | 172 | { |
| 173 | 173 | ack_APIC_irq(); |
| 174 | 174 | irq_enter(); |
| @@ -379,7 +379,7 @@ NOKPROBE_SYMBOL(do_int3); · 378 unmodified lines | ||
| 379 | 379 | * for scheduling or signal handling. The actual stack switch is done in |
| 380 | 380 | * entry.S |
| 381 | 381 | */ |
| 382 | −asmlinkage struct pt_regs *sync_regs(struct pt_regs *eregs) | |
| 382 | +asmlinkage __visible struct pt_regs *sync_regs(struct pt_regs *eregs) | |
| 383 | 383 | { |
| 384 | 384 | struct pt_regs *regs = eregs; |
| 385 | 385 | /* Did already sync */ |
| @@ -629,11 +629,11 @@ do_spurious_interrupt_bug(struct pt_regs *regs, long error_code) · 243 unmodified lines | ||
| 629 | 629 | #endif |
| 630 | 630 | } |
| 631 | 631 | |
| 632 | −asmlinkage void __attribute__((weak)) smp_thermal_interrupt(void) | |
| 632 | +asmlinkage __visible void __attribute__((weak)) smp_thermal_interrupt(void) | |
| 633 | 633 | { |
| 634 | 634 | } |
| 635 | 635 | |
| 636 | −asmlinkage void __attribute__((weak)) smp_threshold_interrupt(void) | |
| 636 | +asmlinkage __visible void __attribute__((weak)) smp_threshold_interrupt(void) | |
| 637 | 637 | { |
| 638 | 638 | } |
| 639 | 639 | |
| @@ -36,7 +36,7 @@ static int irq_routing_comply = 1; · 35 unmodified lines | ||
| 36 | 36 | * and vice versa. |
| 37 | 37 | */ |
| 38 | 38 | |
| 39 | −asmlinkage unsigned long vsmp_save_fl(void) | |
| 39 | +asmlinkage __visible unsigned long vsmp_save_fl(void) | |
| 40 | 40 | { |
| 41 | 41 | unsigned long flags = native_save_fl(); |
| 42 | 42 | |
| @@ -56,7 +56,7 @@ __visible void vsmp_restore_fl(unsigned long flags) · 13 unmodified lines | ||
| 56 | 56 | } |
| 57 | 57 | PV_CALLEE_SAVE_REGS_THUNK(vsmp_restore_fl); |
| 58 | 58 | |
| 59 | −asmlinkage void vsmp_irq_disable(void) | |
| 59 | +asmlinkage __visible void vsmp_irq_disable(void) | |
| 60 | 60 | { |
| 61 | 61 | unsigned long flags = native_save_fl(); |
| 62 | 62 | |
| @@ -64,7 +64,7 @@ asmlinkage void vsmp_irq_disable(void) · 1 unmodified line | ||
| 64 | 64 | } |
| 65 | 65 | PV_CALLEE_SAVE_REGS_THUNK(vsmp_irq_disable); |
| 66 | 66 | |
| 67 | −asmlinkage void vsmp_irq_enable(void) | |
| 67 | +asmlinkage __visible void vsmp_irq_enable(void) | |
| 68 | 68 | { |
| 69 | 69 | unsigned long flags = native_save_fl(); |
| 70 | 70 | |
| @@ -43,7 +43,7 @@ void update_vsyscall(struct timekeeper *tk) · 42 unmodified lines | ||
| 43 | 43 | vdata->monotonic_time_sec = tk->xtime_sec |
| 44 | 44 | + tk->wall_to_monotonic.tv_sec; |
| 45 | 45 | vdata->monotonic_time_snsec = tk->xtime_nsec |
| 46 | − + (tk->wall_to_monotonic.tv_nsec | |
| 46 | + + ((u64)tk->wall_to_monotonic.tv_nsec | |
| 47 | 47 | << tk->shift); |
| 48 | 48 | while (vdata->monotonic_time_snsec >= |
| 49 | 49 | (((u64)NSEC_PER_SEC) << tk->shift)) { |
| @@ -7778,7 +7778,8 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) · 7777 unmodified lines | ||
| 7778 | 7778 | |
| 7779 | 7779 | exec_control = vmcs12->pin_based_vm_exec_control; |
| 7780 | 7780 | exec_control |= vmcs_config.pin_based_exec_ctrl; |
| 7781 | − exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER; | |
| 7781 | + exec_control &= ~(PIN_BASED_VMX_PREEMPTION_TIMER | | |
| 7782 | + PIN_BASED_POSTED_INTR); | |
| 7782 | 7783 | vmcs_write32(PIN_BASED_VM_EXEC_CONTROL, exec_control); |
| 7783 | 7784 | |
| 7784 | 7785 | vmx->nested.preemption_timer_expired = false; |
| @@ -7815,7 +7816,9 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12) · 30 unmodified lines | ||
| 7815 | 7816 | if (!vmx->rdtscp_enabled) |
| 7816 | 7817 | exec_control &= ~SECONDARY_EXEC_RDTSCP; |
| 7817 | 7818 | /* Take the following fields only from vmcs12 */ |
| 7818 | − exec_control &= ~SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES; | |
| 7819 | + exec_control &= ~(SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | | |
| 7820 | + SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY | | |
| 7821 | + SECONDARY_EXEC_APIC_REGISTER_VIRT); | |
| 7819 | 7822 | if (nested_cpu_has(vmcs12, |
| 7820 | 7823 | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)) |
| 7821 | 7824 | exec_control |= vmcs12->secondary_vm_exec_control; |
| @@ -106,6 +106,8 @@ EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz); · 105 unmodified lines | ||
| 106 | 106 | static u32 tsc_tolerance_ppm = 250; |
| 107 | 107 | module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR); |
| 108 | 108 | |
| 109 | +static bool backwards_tsc_observed = false; | |
| 110 | + | |
| 109 | 111 | #define KVM_NR_SHARED_MSRS 16 |
| 110 | 112 | |
| 111 | 113 | struct kvm_shared_msrs_global { |
| @@ -280,7 +282,7 @@ int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info) · 168 unmodified lines | ||
| 280 | 282 | } |
| 281 | 283 | EXPORT_SYMBOL_GPL(kvm_set_apic_base); |
| 282 | 284 | |
| 283 | −asmlinkage void kvm_spurious_fault(void) | |
| 285 | +asmlinkage __visible void kvm_spurious_fault(void) | |
| 284 | 286 | { |
| 285 | 287 | /* Fault while not rebooting. We want the trace. */ |
| 286 | 288 | BUG(); |
| @@ -1486,7 +1488,8 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) · 1199 unmodified lines | ||
| 1486 | 1488 | &ka->master_kernel_ns, |
| 1487 | 1489 | &ka->master_cycle_now); |
| 1488 | 1490 | |
| 1489 | − ka->use_master_clock = host_tsc_clocksource & vcpus_matched; | |
| 1491 | + ka->use_master_clock = host_tsc_clocksource && vcpus_matched | |
| 1492 | + && !backwards_tsc_observed; | |
| 1490 | 1493 | |
| 1491 | 1494 | if (ka->use_master_clock) |
| 1492 | 1495 | atomic_set(&kvm_guest_has_master_clock, 1); |
| @@ -6945,6 +6948,7 @@ int kvm_arch_hardware_enable(void *garbage) · 5452 unmodified lines | ||
| 6945 | 6948 | */ |
| 6946 | 6949 | if (backwards_tsc) { |
| 6947 | 6950 | u64 delta_cyc = max_tsc - local_tsc; |
| 6951 | + backwards_tsc_observed = true; | |
| 6948 | 6952 | list_for_each_entry(kvm, &vm_list, vm_list) { |
| 6949 | 6953 | kvm_for_each_vcpu(i, vcpu, kvm) { |
| 6950 | 6954 | vcpu->arch.tsc_offset_adjustment += delta_cyc; |
| @@ -233,13 +233,13 @@ static void lguest_end_context_switch(struct task_struct *next) · 232 unmodified lines | ||
| 233 | 233 | * flags word contains all kind of stuff, but in practice Linux only cares |
| 234 | 234 | * about the interrupt flag. Our "save_flags()" just returns that. |
| 235 | 235 | */ |
| 236 | −asmlinkage unsigned long lguest_save_fl(void) | |
| 236 | +asmlinkage __visible unsigned long lguest_save_fl(void) | |
| 237 | 237 | { |
| 238 | 238 | return lguest_data.irq_enabled; |
| 239 | 239 | } |
| 240 | 240 | |
| 241 | 241 | /* Interrupts go off... */ |
| 242 | −asmlinkage void lguest_irq_disable(void) | |
| 242 | +asmlinkage __visible void lguest_irq_disable(void) | |
| 243 | 243 | { |
| 244 | 244 | lguest_data.irq_enabled = 0; |
| 245 | 245 | } |
| @@ -76,7 +76,7 @@ static inline int __flip_bit(u32 msr, u8 bit, bool set) · 75 unmodified lines | ||
| 76 | 76 | if (m1.q == m.q) |
| 77 | 77 | return 0; |
| 78 | 78 | |
| 79 | − err = msr_write(msr, &m); | |
| 79 | + err = msr_write(msr, &m1); | |
| 80 | 80 | if (err) |
| 81 | 81 | return err; |
| 82 | 82 | |
| @@ -302,7 +302,7 @@ static struct { · 301 unmodified lines | ||
| 302 | 302 | 0x242 in div_Xsig.S |
| 303 | 303 | */ |
| 304 | 304 | |
| 305 | −asmlinkage void FPU_exception(int n) | |
| 305 | +asmlinkage __visible void FPU_exception(int n) | |
| 306 | 306 | { |
| 307 | 307 | int i, int_type; |
| 308 | 308 | |
| @@ -492,7 +492,7 @@ int real_2op_NaN(FPU_REG const *b, u_char tagb, · 183 unmodified lines | ||
| 492 | 492 | |
| 493 | 493 | /* Invalid arith operation on Valid registers */ |
| 494 | 494 | /* Returns < 0 if the exception is unmasked */ |
| 495 | −asmlinkage int arith_invalid(int deststnr) | |
| 495 | +asmlinkage __visible int arith_invalid(int deststnr) | |
| 496 | 496 | { |
| 497 | 497 | |
| 498 | 498 | EXCEPTION(EX_Invalid); |
| @@ -507,7 +507,7 @@ asmlinkage int arith_invalid(int deststnr) · 8 unmodified lines | ||
| 507 | 507 | } |
| 508 | 508 | |
| 509 | 509 | /* Divide a finite number by zero */ |
| 510 | −asmlinkage int FPU_divide_by_zero(int deststnr, u_char sign) | |
| 510 | +asmlinkage __visible int FPU_divide_by_zero(int deststnr, u_char sign) | |
| 511 | 511 | { |
| 512 | 512 | FPU_REG *dest = &st(deststnr); |
| 513 | 513 | int tag = TAG_Valid; |
| @@ -539,7 +539,7 @@ int set_precision_flag(int flags) · 25 unmodified lines | ||
| 539 | 539 | } |
| 540 | 540 | |
| 541 | 541 | /* This may be called often, so keep it lean */ |
| 542 | −asmlinkage void set_precision_flag_up(void) | |
| 542 | +asmlinkage __visible void set_precision_flag_up(void) | |
| 543 | 543 | { |
| 544 | 544 | if (control_word & CW_Precision) |
| 545 | 545 | partial_status |= (SW_Precision | SW_C1); /* The masked response */ |
| @@ -548,7 +548,7 @@ asmlinkage void set_precision_flag_up(void) · 2 unmodified lines | ||
| 548 | 548 | } |
| 549 | 549 | |
| 550 | 550 | /* This may be called often, so keep it lean */ |
| 551 | −asmlinkage void set_precision_flag_down(void) | |
| 551 | +asmlinkage __visible void set_precision_flag_down(void) | |
| 552 | 552 | { |
| 553 | 553 | if (control_word & CW_Precision) { /* The masked response */ |
| 554 | 554 | partial_status &= ~SW_C1; |
| @@ -557,7 +557,7 @@ asmlinkage void set_precision_flag_down(void) · 2 unmodified lines | ||
| 557 | 557 | EXCEPTION(EX_Precision); |
| 558 | 558 | } |
| 559 | 559 | |
| 560 | −asmlinkage int denormal_operand(void) | |
| 560 | +asmlinkage __visible int denormal_operand(void) | |
| 561 | 561 | { |
| 562 | 562 | if (control_word & CW_Denormal) { /* The masked response */ |
| 563 | 563 | partial_status |= SW_Denorm_Op; |
| @@ -568,7 +568,7 @@ asmlinkage int denormal_operand(void) · 4 unmodified lines | ||
| 568 | 568 | } |
| 569 | 569 | } |
| 570 | 570 | |
| 571 | −asmlinkage int arith_overflow(FPU_REG *dest) | |
| 571 | +asmlinkage __visible int arith_overflow(FPU_REG *dest) | |
| 572 | 572 | { |
| 573 | 573 | int tag = TAG_Valid; |
| 574 | 574 | |
| @@ -596,7 +596,7 @@ asmlinkage int arith_overflow(FPU_REG *dest) · 21 unmodified lines | ||
| 596 | 596 | |
| 597 | 597 | } |
| 598 | 598 | |
| 599 | −asmlinkage int arith_underflow(FPU_REG *dest) | |
| 599 | +asmlinkage __visible int arith_underflow(FPU_REG *dest) | |
| 600 | 600 | { |
| 601 | 601 | int tag = TAG_Valid; |
| 602 | 602 | |
| @@ -171,7 +171,7 @@ static struct bpf_binary_header *bpf_alloc_binary(unsigned int proglen, · 170 unmodified lines | ||
| 171 | 171 | memset(header, 0xcc, sz); /* fill whole space with int3 instructions */ |
| 172 | 172 | |
| 173 | 173 | header->pages = sz / PAGE_SIZE; |
| 174 | − hole = sz - (proglen + sizeof(*header)); | |
| 174 | + hole = min(sz - (proglen + sizeof(*header)), PAGE_SIZE - sizeof(*header)); | |
| 175 | 175 | |
| 176 | 176 | /* insert a random number of int3 instructions before BPF code */ |
| 177 | 177 | *image_ptr = &header->image[prandom_u32() % hole]; |
| @@ -14,48 +14,92 @@ · 13 unmodified lines | ||
| 14 | 14 | |
| 15 | 15 | static const struct font_desc *font; |
| 16 | 16 | static u32 efi_x, efi_y; |
| 17 | +static void *efi_fb; | |
| 18 | +static bool early_efi_keep; | |
| 17 | 19 | |
| 18 | −static __init void early_efi_clear_scanline(unsigned int y) | |
| 20 | +/* | |
| 21 | + * efi earlyprintk need use early_ioremap to map the framebuffer. | |
| 22 | + * But early_ioremap is not usable for earlyprintk=efi,keep, ioremap should | |
| 23 | + * be used instead. ioremap will be available after paging_init() which is | |
| 24 | + * earlier than initcall callbacks. Thus adding this early initcall function | |
| 25 | + * early_efi_map_fb to map the whole efi framebuffer. | |
| 26 | + */ | |
| 27 | +static __init int early_efi_map_fb(void) | |
| 19 | 28 | { |
| 20 | − unsigned long base, *dst; | |
| 21 | − u16 len; | |
| 29 | + unsigned long base, size; | |
| 30 | + | |
| 31 | + if (!early_efi_keep) | |
| 32 | + return 0; | |
| 22 | 33 | |
| 23 | 34 | base = boot_params.screen_info.lfb_base; |
| 24 | − len = boot_params.screen_info.lfb_linelength; | |
| 35 | + size = boot_params.screen_info.lfb_size; | |
| 36 | + efi_fb = ioremap(base, size); | |
| 37 | + | |
| 38 | + return efi_fb ? 0 : -ENOMEM; | |
| 39 | +} | |
| 40 | +early_initcall(early_efi_map_fb); | |
| 41 | + | |
| 42 | +/* | |
| 43 | + * early_efi_map maps efi framebuffer region [start, start + len -1] | |
| 44 | + * In case earlyprintk=efi,keep we have the whole framebuffer mapped already | |
| 45 | + * so just return the offset efi_fb + start. | |
| 46 | + */ | |
| 47 | +static __init_refok void *early_efi_map(unsigned long start, unsigned long len) | |
| 48 | +{ | |
| 49 | + unsigned long base; | |
| 50 | + | |
| 51 | + base = boot_params.screen_info.lfb_base; | |
| 52 | + | |
| 53 | + if (efi_fb) | |
| 54 | + return (efi_fb + start); | |
| 55 | + else | |
| 56 | + return early_ioremap(base + start, len); | |
| 57 | +} | |
| 25 | 58 | |
| 26 | − dst = early_ioremap(base + y*len, len); | |
| 59 | +static __init_refok void early_efi_unmap(void *addr, unsigned long len) | |
| 60 | +{ | |
| 61 | + if (!efi_fb) | |
| 62 | + early_iounmap(addr, len); | |
| 63 | +} | |
| 64 | + | |
| 65 | +static void early_efi_clear_scanline(unsigned int y) | |
| 66 | +{ | |
| 67 | + unsigned long *dst; | |
| 68 | + u16 len; | |
| 69 | + | |
| 70 | + len = boot_params.screen_info.lfb_linelength; | |
| 71 | + dst = early_efi_map(y*len, len); | |
| 27 | 72 | if (!dst) |
| 28 | 73 | return; |
| 29 | 74 | |
| 30 | 75 | memset(dst, 0, len); |
| 31 | − early_iounmap(dst, len); | |
| 76 | + early_efi_unmap(dst, len); | |
| 32 | 77 | } |
| 33 | 78 | |
| 34 | −static __init void early_efi_scroll_up(void) | |
| 79 | +static void early_efi_scroll_up(void) | |
| 35 | 80 | { |
| 36 | − unsigned long base, *dst, *src; | |
| 81 | + unsigned long *dst, *src; | |
| 37 | 82 | u16 len; |
| 38 | 83 | u32 i, height; |
| 39 | 84 | |
| 40 | − base = boot_params.screen_info.lfb_base; | |
| 41 | 85 | len = boot_params.screen_info.lfb_linelength; |
| 42 | 86 | height = boot_params.screen_info.lfb_height; |
| 43 | 87 | |
| 44 | 88 | for (i = 0; i < height - font->height; i++) { |
| 45 | − dst = early_ioremap(base + i*len, len); | |
| 89 | + dst = early_efi_map(i*len, len); | |
| 46 | 90 | if (!dst) |
| 47 | 91 | return; |
| 48 | 92 | |
| 49 | − src = early_ioremap(base + (i + font->height) * len, len); | |
| 93 | + src = early_efi_map((i + font->height) * len, len); | |
| 50 | 94 | if (!src) { |
| 51 | − early_iounmap(dst, len); | |
| 95 | + early_efi_unmap(dst, len); | |
| 52 | 96 | return; |
| 53 | 97 | } |
| 54 | 98 | |
| 55 | 99 | memmove(dst, src, len); |
| 56 | 100 | |
| 57 | − early_iounmap(src, len); | |
| 58 | − early_iounmap(dst, len); | |
| 101 | + early_efi_unmap(src, len); | |
| 102 | + early_efi_unmap(dst, len); | |
| 59 | 103 | } |
| 60 | 104 | } |
| 61 | 105 | |
| @@ -79,16 +123,14 @@ static void early_efi_write_char(u32 *dst, unsigned char c, unsigned int h) · 17 unmodified lines | ||
| 79 | 123 | } |
| 80 | 124 | } |
| 81 | 125 | |
| 82 | −static __init void | |
| 126 | +static void | |
| 83 | 127 | early_efi_write(struct console *con, const char *str, unsigned int num) |
| 84 | 128 | { |
| 85 | 129 | struct screen_info *si; |
| 86 | − unsigned long base; | |
| 87 | 130 | unsigned int len; |
| 88 | 131 | const char *s; |
| 89 | 132 | void *dst; |
| 90 | 133 | |
| 91 | − base = boot_params.screen_info.lfb_base; | |
| 92 | 134 | si = &boot_params.screen_info; |
| 93 | 135 | len = si->lfb_linelength; |
| 94 | 136 | |
| @@ -109,7 +151,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num) · 14 unmodified lines | ||
| 109 | 151 | for (h = 0; h < font->height; h++) { |
| 110 | 152 | unsigned int n, x; |
| 111 | 153 | |
| 112 | − dst = early_ioremap(base + (efi_y + h) * len, len); | |
| 154 | + dst = early_efi_map((efi_y + h) * len, len); | |
| 113 | 155 | if (!dst) |
| 114 | 156 | return; |
| 115 | 157 | |
| @@ -123,7 +165,7 @@ early_efi_write(struct console *con, const char *str, unsigned int num) · 7 unmodified lines | ||
| 123 | 165 | s++; |
| 124 | 166 | } |
| 125 | 167 | |
| 126 | − early_iounmap(dst, len); | |
| 168 | + early_efi_unmap(dst, len); | |
| 127 | 169 | } |
| 128 | 170 | |
| 129 | 171 | num -= count; |
| @@ -179,6 +221,9 @@ static __init int early_efi_setup(struct console *con, char *options) · 49 unmodified lines | ||
| 179 | 221 | for (i = 0; i < (yres - efi_y) / font->height; i++) |
| 180 | 222 | early_efi_scroll_up(); |
| 181 | 223 | |
| 224 | + /* early_console_register will unset CON_BOOT in case ,keep */ | |
| 225 | + if (!(con->flags & CON_BOOT)) | |
| 226 | + early_efi_keep = true; | |
| 182 | 227 | return 0; |
| 183 | 228 | } |
| 184 | 229 | |
| @@ -75,7 +75,7 @@ static int xo1_power_state_enter(suspend_state_t pm_state) · 74 unmodified lines | ||
| 75 | 75 | return 0; |
| 76 | 76 | } |
| 77 | 77 | |
| 78 | −asmlinkage int xo1_do_sleep(u8 sleep_state) | |
| 78 | +asmlinkage __visible int xo1_do_sleep(u8 sleep_state) | |
| 79 | 79 | { |
| 80 | 80 | void *pgd_addr = __va(read_cr3()); |
| 81 | 81 | |
| @@ -23,7 +23,7 @@ · 22 unmodified lines | ||
| 23 | 23 | extern __visible const void __nosave_begin, __nosave_end; |
| 24 | 24 | |
| 25 | 25 | /* Defined in hibernate_asm_64.S */ |
| 26 | −extern asmlinkage int restore_image(void); | |
| 26 | +extern asmlinkage __visible int restore_image(void); | |
| 27 | 27 | |
| 28 | 28 | /* |
| 29 | 29 | * Address to jump to in the last phase of restore in order to get to the image |
| @@ -39,6 +39,7 @@ · 38 unmodified lines | ||
| 39 | 39 | #ifdef CONFIG_X86_64 |
| 40 | 40 | #define vdso_enabled sysctl_vsyscall32 |
| 41 | 41 | #define arch_setup_additional_pages syscall32_setup_pages |
| 42 | +extern int sysctl_ldt16; | |
| 42 | 43 | #endif |
| 43 | 44 | |
| 44 | 45 | /* |
| @@ -249,6 +250,13 @@ static struct ctl_table abi_table2[] = { · 204 unmodified lines | ||
| 249 | 250 | .mode = 0644, |
| 250 | 251 | .proc_handler = proc_dointvec |
| 251 | 252 | }, |
| 253 | + { | |
| 254 | + .procname = "ldt16", | |
| 255 | + .data = &sysctl_ldt16, | |
| 256 | + .maxlen = sizeof(int), | |
| 257 | + .mode = 0644, | |
| 258 | + .proc_handler = proc_dointvec | |
| 259 | + }, | |
| 252 | 260 | {} |
| 253 | 261 | }; |
| 254 | 262 | |
| @@ -1515,7 +1515,7 @@ static void __init xen_pvh_early_guest_init(void) · 1514 unmodified lines | ||
| 1515 | 1515 | } |
| 1516 | 1516 | |
| 1517 | 1517 | /* First C function to be called on Xen boot */ |
| 1518 | −asmlinkage void __init xen_start_kernel(void) | |
| 1518 | +asmlinkage __visible void __init xen_start_kernel(void) | |
| 1519 | 1519 | { |
| 1520 | 1520 | struct physdev_set_iopl set_iopl; |
| 1521 | 1521 | int rc; |
| @@ -23,7 +23,7 @@ void xen_force_evtchn_callback(void) · 22 unmodified lines | ||
| 23 | 23 | (void)HYPERVISOR_xen_version(0, NULL); |
| 24 | 24 | } |
| 25 | 25 | |
| 26 | −asmlinkage unsigned long xen_save_fl(void) | |
| 26 | +asmlinkage __visible unsigned long xen_save_fl(void) | |
| 27 | 27 | { |
| 28 | 28 | struct vcpu_info *vcpu; |
| 29 | 29 | unsigned long flags; |
| @@ -63,7 +63,7 @@ __visible void xen_restore_fl(unsigned long flags) · 33 unmodified lines | ||
| 63 | 63 | } |
| 64 | 64 | PV_CALLEE_SAVE_REGS_THUNK(xen_restore_fl); |
| 65 | 65 | |
| 66 | −asmlinkage void xen_irq_disable(void) | |
| 66 | +asmlinkage __visible void xen_irq_disable(void) | |
| 67 | 67 | { |
| 68 | 68 | /* There's a one instruction preempt window here. We need to |
| 69 | 69 | make sure we're don't switch CPUs between getting the vcpu |
| @@ -74,7 +74,7 @@ asmlinkage void xen_irq_disable(void) · 4 unmodified lines | ||
| 74 | 74 | } |
| 75 | 75 | PV_CALLEE_SAVE_REGS_THUNK(xen_irq_disable); |
| 76 | 76 | |
| 77 | −asmlinkage void xen_irq_enable(void) | |
| 77 | +asmlinkage __visible void xen_irq_enable(void) | |
| 78 | 78 | { |
| 79 | 79 | struct vcpu_info *vcpu; |
| 80 | 80 | |
| @@ -451,7 +451,20 @@ static int blkcg_reset_stats(struct cgroup_subsys_state *css, · 450 unmodified lines | ||
| 451 | 451 | struct blkcg_gq *blkg; |
| 452 | 452 | int i; |
| 453 | 453 | |
| 454 | − mutex_lock(&blkcg_pol_mutex); | |
| 454 | + /* | |
| 455 | + * XXX: We invoke cgroup_add/rm_cftypes() under blkcg_pol_mutex | |
| 456 | + * which ends up putting cgroup's internal cgroup_tree_mutex under | |
| 457 | + * it; however, cgroup_tree_mutex is nested above cgroup file | |
| 458 | + * active protection and grabbing blkcg_pol_mutex from a cgroup | |
| 459 | + * file operation creates a possible circular dependency. cgroup | |
| 460 | + * internal locking is planned to go through further simplification | |
| 461 | + * and this issue should go away soon. For now, let's trylock | |
| 462 | + * blkcg_pol_mutex and restart the write on failure. | |
| 463 | + * | |
| 464 | + * http://lkml.kernel.org/g/5363C04B.4010400@oracle.com | |
| 465 | + */ | |
| 466 | + if (!mutex_trylock(&blkcg_pol_mutex)) | |
| 467 | + return restart_syscall(); | |
| 455 | 468 | spin_lock_irq(&blkcg->lock); |
| 456 | 469 | |
| 457 | 470 | /* |
| @@ -119,7 +119,7 @@ obj-$(CONFIG_SGI_SN) += sn/ · 118 unmodified lines | ||
| 119 | 119 | obj-y += firmware/ |
| 120 | 120 | obj-$(CONFIG_CRYPTO) += crypto/ |
| 121 | 121 | obj-$(CONFIG_SUPERH) += sh/ |
| 122 | −obj-$(CONFIG_ARCH_SHMOBILE_LEGACY) += sh/ | |
| 122 | +obj-$(CONFIG_ARCH_SHMOBILE) += sh/ | |
| 123 | 123 | ifndef CONFIG_ARCH_USES_GETTIMEOFFSET |
| 124 | 124 | obj-y += clocksource/ |
| 125 | 125 | endif |
| @@ -47,6 +47,23 @@ config ACPI_SLEEP · 46 unmodified lines | ||
| 47 | 47 | depends on SUSPEND || HIBERNATION |
| 48 | 48 | default y |
| 49 | 49 | |
| 50 | +config ACPI_PROCFS_POWER | |
| 51 | + bool "Deprecated power /proc/acpi directories" | |
| 52 | + depends on PROC_FS | |
| 53 | + help | |
| 54 | + For backwards compatibility, this option allows | |
| 55 | + deprecated power /proc/acpi/ directories to exist, even when | |
| 56 | + they have been replaced by functions in /sys. | |
| 57 | + The deprecated directories (and their replacements) include: | |
| 58 | + /proc/acpi/battery/* (/sys/class/power_supply/*) | |
| 59 | + /proc/acpi/ac_adapter/* (sys/class/power_supply/*) | |
| 60 | + This option has no effect on /proc/acpi/ directories | |
| 61 | + and functions, which do not yet exist in /sys | |
| 62 | + This option, together with the proc directories, will be | |
| 63 | + deleted in the future. | |
| 64 | + | |
| 65 | + Say N to delete power /proc/acpi/ directories that have moved to /sys/ | |
| 66 | + | |
| 50 | 67 | config ACPI_EC_DEBUGFS |
| 51 | 68 | tristate "EC read/write access through /sys/kernel/debug/ec" |
| 52 | 69 | default n |
| @@ -47,6 +47,7 @@ acpi-y += sysfs.o · 46 unmodified lines | ||
| 47 | 47 | acpi-$(CONFIG_X86) += acpi_cmos_rtc.o |
| 48 | 48 | acpi-$(CONFIG_DEBUG_FS) += debugfs.o |
| 49 | 49 | acpi-$(CONFIG_ACPI_NUMA) += numa.o |
| 50 | +acpi-$(CONFIG_ACPI_PROCFS_POWER) += cm_sbs.o | |
| 50 | 51 | ifdef CONFIG_ACPI_VIDEO |
| 51 | 52 | acpi-y += video_detect.o |
| 52 | 53 | endif |
| @@ -52,11 +52,39 @@ MODULE_AUTHOR("Paul Diefenbaugh"); · 51 unmodified lines | ||
| 52 | 52 | MODULE_DESCRIPTION("ACPI AC Adapter Driver"); |
| 53 | 53 | MODULE_LICENSE("GPL"); |
| 54 | 54 | |
| 55 | +static int acpi_ac_add(struct acpi_device *device); | |
| 56 | +static int acpi_ac_remove(struct acpi_device *device); | |
| 57 | +static void acpi_ac_notify(struct acpi_device *device, u32 event); | |
| 58 | + | |
| 59 | +static const struct acpi_device_id ac_device_ids[] = { | |
| 60 | + {"ACPI0003", 0}, | |
| 61 | + {"", 0}, | |
| 62 | +}; | |
| 63 | +MODULE_DEVICE_TABLE(acpi, ac_device_ids); | |
| 64 | + | |
| 65 | +#ifdef CONFIG_PM_SLEEP | |
| 66 | +static int acpi_ac_resume(struct device *dev); | |
| 67 | +#endif | |
| 68 | +static SIMPLE_DEV_PM_OPS(acpi_ac_pm, NULL, acpi_ac_resume); | |
| 69 | + | |
| 55 | 70 | static int ac_sleep_before_get_state_ms; |
| 56 | 71 | |
| 72 | +static struct acpi_driver acpi_ac_driver = { | |
| 73 | + .name = "ac", | |
| 74 | + .class = ACPI_AC_CLASS, | |
| 75 | + .ids = ac_device_ids, | |
| 76 | + .flags = ACPI_DRIVER_ALL_NOTIFY_EVENTS, | |
| 77 | + .ops = { | |
| 78 | + .add = acpi_ac_add, | |
| 79 | + .remove = acpi_ac_remove, | |
| 80 | + .notify = acpi_ac_notify, | |
| 81 | + }, | |
| 82 | + .drv.pm = &acpi_ac_pm, | |
| 83 | +}; | |
| 84 | + | |
| 57 | 85 | struct acpi_ac { |
| 58 | 86 | struct power_supply charger; |
| 59 | − struct platform_device *pdev; | |
| 87 | + struct acpi_device * device; | |
| 60 | 88 | unsigned long long state; |
| 61 | 89 | struct notifier_block battery_nb; |
| 62 | 90 | }; |
| @@ -69,10 +97,12 @@ struct acpi_ac { · 6 unmodified lines | ||
| 69 | 97 | |
| 70 | 98 | static int acpi_ac_get_state(struct acpi_ac *ac) |
| 71 | 99 | { |
| 72 | − acpi_status status; | |
| 73 | − acpi_handle handle = ACPI_HANDLE(&ac->pdev->dev); | |
| 100 | + acpi_status status = AE_OK; | |
| 101 | + | |
| 102 | + if (!ac) | |
| 103 | + return -EINVAL; | |
| 74 | 104 | |
| 75 | − status = acpi_evaluate_integer(handle, "_PSR", NULL, | |
| 105 | + status = acpi_evaluate_integer(ac->device->handle, "_PSR", NULL, | |
| 76 | 106 | &ac->state); |
| 77 | 107 | if (ACPI_FAILURE(status)) { |
| 78 | 108 | ACPI_EXCEPTION((AE_INFO, status, |
| @@ -117,10 +147,9 @@ static enum power_supply_property ac_props[] = { · 38 unmodified lines | ||
| 117 | 147 | Driver Model |
| 118 | 148 | -------------------------------------------------------------------------- */ |
| 119 | 149 | |
| 120 | −static void acpi_ac_notify_handler(acpi_handle handle, u32 event, void *data) | |
| 150 | +static void acpi_ac_notify(struct acpi_device *device, u32 event) | |
| 121 | 151 | { |
| 122 | − struct acpi_ac *ac = data; | |
| 123 | − struct acpi_device *adev; | |
| 152 | + struct acpi_ac *ac = acpi_driver_data(device); | |
| 124 | 153 | |
| 125 | 154 | if (!ac) |
| 126 | 155 | return; |
| @@ -143,11 +172,10 @@ static void acpi_ac_notify_handler(acpi_handle handle, u32 event, void *data) · 16 unmodified lines | ||
| 143 | 172 | msleep(ac_sleep_before_get_state_ms); |
| 144 | 173 | |
| 145 | 174 | acpi_ac_get_state(ac); |
| 146 | − adev = ACPI_COMPANION(&ac->pdev->dev); | |
| 147 | − acpi_bus_generate_netlink_event(adev->pnp.device_class, | |
| 148 | − dev_name(&ac->pdev->dev), | |
| 149 | − event, (u32) ac->state); | |
| 150 | − acpi_notifier_call_chain(adev, event, (u32) ac->state); | |
| 175 | + acpi_bus_generate_netlink_event(device->pnp.device_class, | |
| 176 | + dev_name(&device->dev), event, | |
| 177 | + (u32) ac->state); | |
| 178 | + acpi_notifier_call_chain(device, event, (u32) ac->state); | |
| 151 | 179 | kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE); |
| 152 | 180 | } |
| 153 | 181 | |
| @@ -192,49 +220,39 @@ static struct dmi_system_id ac_dmi_table[] = { · 38 unmodified lines | ||
| 192 | 220 | {}, |
| 193 | 221 | }; |
| 194 | 222 | |
| 195 | −static int acpi_ac_probe(struct platform_device *pdev) | |
| 223 | +static int acpi_ac_add(struct acpi_device *device) | |
| 196 | 224 | { |
| 197 | 225 | int result = 0; |
| 198 | 226 | struct acpi_ac *ac = NULL; |
| 199 | − struct acpi_device *adev; | |
| 200 | 227 | |
| 201 | − if (!pdev) | |
| 202 | − return -EINVAL; | |
| 203 | 228 | |
| 204 | − adev = ACPI_COMPANION(&pdev->dev); | |
| 205 | − if (!adev) | |
| 206 | − return -ENODEV; | |
| 229 | + if (!device) | |
| 230 | + return -EINVAL; | |
| 207 | 231 | |
| 208 | 232 | ac = kzalloc(sizeof(struct acpi_ac), GFP_KERNEL); |
| 209 | 233 | if (!ac) |
| 210 | 234 | return -ENOMEM; |
| 211 | 235 | |
| 212 | − strcpy(acpi_device_name(adev), ACPI_AC_DEVICE_NAME); | |
| 213 | − strcpy(acpi_device_class(adev), ACPI_AC_CLASS); | |
| 214 | − ac->pdev = pdev; | |
| 215 | − platform_set_drvdata(pdev, ac); | |
| 236 | + ac->device = device; | |
| 237 | + strcpy(acpi_device_name(device), ACPI_AC_DEVICE_NAME); | |
| 238 | + strcpy(acpi_device_class(device), ACPI_AC_CLASS); | |
| 239 | + device->driver_data = ac; | |
| 216 | 240 | |
| 217 | 241 | result = acpi_ac_get_state(ac); |
| 218 | 242 | if (result) |
| 219 | 243 | goto end; |
| 220 | 244 | |
| 221 | − ac->charger.name = acpi_device_bid(adev); | |
| 245 | + ac->charger.name = acpi_device_bid(device); | |
| 222 | 246 | ac->charger.type = POWER_SUPPLY_TYPE_MAINS; |
| 223 | 247 | ac->charger.properties = ac_props; |
| 224 | 248 | ac->charger.num_properties = ARRAY_SIZE(ac_props); |
| 225 | 249 | ac->charger.get_property = get_ac_property; |
| 226 | − result = power_supply_register(&pdev->dev, &ac->charger); | |
| 250 | + result = power_supply_register(&ac->device->dev, &ac->charger); | |
| 227 | 251 | if (result) |
| 228 | 252 | goto end; |
| 229 | 253 | |
| 230 | − result = acpi_install_notify_handler(ACPI_HANDLE(&pdev->dev), | |
| 231 | − ACPI_ALL_NOTIFY, acpi_ac_notify_handler, ac); | |
| 232 | − if (result) { | |
| 233 | − power_supply_unregister(&ac->charger); | |
| 234 | − goto end; | |
| 235 | − } | |
| 236 | 254 | printk(KERN_INFO PREFIX "%s [%s] (%s)\n", |
| 237 | − acpi_device_name(adev), acpi_device_bid(adev), | |
| 255 | + acpi_device_name(device), acpi_device_bid(device), | |
| 238 | 256 | ac->state ? "on-line" : "off-line"); |
| 239 | 257 | |
| 240 | 258 | ac->battery_nb.notifier_call = acpi_ac_battery_notify; |
| @@ -256,7 +274,7 @@ static int acpi_ac_resume(struct device *dev) · 15 unmodified lines | ||
| 256 | 274 | if (!dev) |
| 257 | 275 | return -EINVAL; |
| 258 | 276 | |
| 259 | − ac = platform_get_drvdata(to_platform_device(dev)); | |
| 277 | + ac = acpi_driver_data(to_acpi_device(dev)); | |
| 260 | 278 | if (!ac) |
| 261 | 279 | return -EINVAL; |
| 262 | 280 | |
| @@ -270,19 +288,17 @@ static int acpi_ac_resume(struct device *dev) · 7 unmodified lines | ||
| 270 | 288 | #else |
| 271 | 289 | #define acpi_ac_resume NULL |
| 272 | 290 | #endif |
| 273 | −static SIMPLE_DEV_PM_OPS(acpi_ac_pm_ops, NULL, acpi_ac_resume); | |
| 274 | 291 | |
| 275 | −static int acpi_ac_remove(struct platform_device *pdev) | |
| 292 | +static int acpi_ac_remove(struct acpi_device *device) | |
| 276 | 293 | { |
| 277 | − struct acpi_ac *ac; | |
| 294 | + struct acpi_ac *ac = NULL; | |
| 295 | + | |
| 278 | 296 | |
| 279 | − if (!pdev) | |
| 297 | + if (!device || !acpi_driver_data(device)) | |
| 280 | 298 | return -EINVAL; |
| 281 | 299 | |
| 282 | − acpi_remove_notify_handler(ACPI_HANDLE(&pdev->dev), | |
| 283 | − ACPI_ALL_NOTIFY, acpi_ac_notify_handler); | |
| 300 | + ac = acpi_driver_data(device); | |
| 284 | 301 | |
| 285 | − ac = platform_get_drvdata(pdev); | |
| 286 | 302 | if (ac->charger.dev) |
| 287 | 303 | power_supply_unregister(&ac->charger); |
| 288 | 304 | unregister_acpi_notifier(&ac->battery_nb); |
| @@ -292,23 +308,6 @@ static int acpi_ac_remove(struct platform_device *pdev) · 3 unmodified lines | ||
| 292 | 308 | return 0; |
| 293 | 309 | } |
| 294 | 310 | |
| 295 | −static const struct acpi_device_id acpi_ac_match[] = { | |
| 296 | − { "ACPI0003", 0 }, | |
| 297 | − { } | |
| 298 | −}; | |
| 299 | −MODULE_DEVICE_TABLE(acpi, acpi_ac_match); | |
| 300 | − | |
| 301 | −static struct platform_driver acpi_ac_driver = { | |
| 302 | − .probe = acpi_ac_probe, | |
| 303 | − .remove = acpi_ac_remove, | |
| 304 | − .driver = { | |
| 305 | − .name = "acpi-ac", | |
| 306 | − .owner = THIS_MODULE, | |
| 307 | − .pm = &acpi_ac_pm_ops, | |
| 308 | − .acpi_match_table = ACPI_PTR(acpi_ac_match), | |
| 309 | − }, | |
| 310 | −}; | |
| 311 | − | |
| 312 | 311 | static int __init acpi_ac_init(void) |
| 313 | 312 | { |
| 314 | 313 | int result; |
| @@ -316,7 +315,7 @@ static int __init acpi_ac_init(void) · 1 unmodified line | ||
| 316 | 315 | if (acpi_disabled) |
| 317 | 316 | return -ENODEV; |
| 318 | 317 | |
| 319 | − result = platform_driver_register(&acpi_ac_driver); | |
| 318 | + result = acpi_bus_register_driver(&acpi_ac_driver); | |
| 320 | 319 | if (result < 0) |
| 321 | 320 | return -ENODEV; |
| 322 | 321 | |
| @@ -325,7 +324,7 @@ static int __init acpi_ac_init(void) · 2 unmodified lines | ||
| 325 | 324 | |
| 326 | 325 | static void __exit acpi_ac_exit(void) |
| 327 | 326 | { |
| 328 | − platform_driver_unregister(&acpi_ac_driver); | |
| 327 | + acpi_bus_unregister_driver(&acpi_ac_driver); | |
| 329 | 328 | } |
| 330 | 329 | module_init(acpi_ac_init); |
| 331 | 330 | module_exit(acpi_ac_exit); |
| @@ -29,7 +29,6 @@ ACPI_MODULE_NAME("platform"); · 28 unmodified lines | ||
| 29 | 29 | static const struct acpi_device_id acpi_platform_device_ids[] = { |
| 30 | 30 | |
| 31 | 31 | { "PNP0D40" }, |
| 32 | − { "ACPI0003" }, | |
| 33 | 32 | { "VPC2004" }, |
| 34 | 33 | { "BCM4752" }, |
| 35 | 34 | |
| @@ -405,7 +405,6 @@ static int acpi_processor_add(struct acpi_device *device, · 404 unmodified lines | ||
| 405 | 405 | goto err; |
| 406 | 406 | |
| 407 | 407 | pr->dev = dev; |
| 408 | − dev->offline = pr->flags.need_hotplug_init; | |
| 409 | 408 | |
| 410 | 409 | /* Trigger the processor driver's .probe() if present. */ |
| 411 | 410 | if (device_attach(dev) >= 0) |
| @@ -141,9 +141,9 @@ ACPI_INIT_GLOBAL(u8, acpi_gbl_do_not_use_xsdt, FALSE); · 140 unmodified lines | ||
| 141 | 141 | * address. Although ACPICA adheres to the ACPI specification which |
| 142 | 142 | * requires the use of the corresponding 64-bit address if it is non-zero, |
| 143 | 143 | * some machines have been found to have a corrupted non-zero 64-bit |
| 144 | − * address. Default is FALSE, do not favor the 32-bit addresses. | |
| 144 | + * address. Default is TRUE, favor the 32-bit addresses. | |
| 145 | 145 | */ |
| 146 | −ACPI_INIT_GLOBAL(u8, acpi_gbl_use32_bit_fadt_addresses, FALSE); | |
| 146 | +ACPI_INIT_GLOBAL(u8, acpi_gbl_use32_bit_fadt_addresses, TRUE); | |
| 147 | 147 | |
| 148 | 148 | /* |
| 149 | 149 | * Optionally truncate I/O addresses to 16 bits. Provides compatibility |
| @@ -461,6 +461,7 @@ acpi_status __init acpi_tb_parse_root_table(acpi_physical_address rsdp_address) · 460 unmodified lines | ||
| 461 | 461 | u32 table_count; |
| 462 | 462 | struct acpi_table_header *table; |
| 463 | 463 | acpi_physical_address address; |
| 464 | + acpi_physical_address rsdt_address; | |
| 464 | 465 | u32 length; |
| 465 | 466 | u8 *table_entry; |
| 466 | 467 | acpi_status status; |
| @@ -488,11 +489,14 @@ acpi_status __init acpi_tb_parse_root_table(acpi_physical_address rsdp_address) · 21 unmodified lines | ||
| 488 | 489 | * as per the ACPI specification. |
| 489 | 490 | */ |
| 490 | 491 | address = (acpi_physical_address) rsdp->xsdt_physical_address; |
| 492 | + rsdt_address = | |
| 493 | + (acpi_physical_address) rsdp->rsdt_physical_address; | |
| 491 | 494 | table_entry_size = ACPI_XSDT_ENTRY_SIZE; |
| 492 | 495 | } else { |
| 493 | 496 | /* Root table is an RSDT (32-bit physical addresses) */ |
| 494 | 497 | |
| 495 | 498 | address = (acpi_physical_address) rsdp->rsdt_physical_address; |
| 499 | + rsdt_address = address; | |
| 496 | 500 | table_entry_size = ACPI_RSDT_ENTRY_SIZE; |
| 497 | 501 | } |
| 498 | 502 | |
| @@ -515,8 +519,7 @@ acpi_status __init acpi_tb_parse_root_table(acpi_physical_address rsdp_address) · 16 unmodified lines | ||
| 515 | 519 | |
| 516 | 520 | /* Fall back to the RSDT */ |
| 517 | 521 | |
| 518 | − address = | |
| 519 | − (acpi_physical_address) rsdp->rsdt_physical_address; | |
| 522 | + address = rsdt_address; | |
| 520 | 523 | table_entry_size = ACPI_RSDT_ENTRY_SIZE; |
| 521 | 524 | } |
| 522 | 525 | } |
| @@ -36,6 +36,12 @@ · 35 unmodified lines | ||
| 36 | 36 | #include <linux/suspend.h> |
| 37 | 37 | #include <asm/unaligned.h> |
| 38 | 38 | |
| 39 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 40 | +#include <linux/proc_fs.h> | |
| 41 | +#include <linux/seq_file.h> | |
| 42 | +#include <asm/uaccess.h> | |
| 43 | +#endif | |
| 44 | + | |
| 39 | 45 | #include <linux/acpi.h> |
| 40 | 46 | #include <linux/power_supply.h> |
| 41 | 47 | |
| @@ -64,6 +70,19 @@ static unsigned int cache_time = 1000; · 22 unmodified lines | ||
| 64 | 70 | module_param(cache_time, uint, 0644); |
| 65 | 71 | MODULE_PARM_DESC(cache_time, "cache time in milliseconds"); |
| 66 | 72 | |
| 73 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 74 | +extern struct proc_dir_entry *acpi_lock_battery_dir(void); | |
| 75 | +extern void *acpi_unlock_battery_dir(struct proc_dir_entry *acpi_battery_dir); | |
| 76 | + | |
| 77 | +enum acpi_battery_files { | |
| 78 | + info_tag = 0, | |
| 79 | + state_tag, | |
| 80 | + alarm_tag, | |
| 81 | + ACPI_BATTERY_NUMFILES, | |
| 82 | +}; | |
| 83 | + | |
| 84 | +#endif | |
| 85 | + | |
| 67 | 86 | static const struct acpi_device_id battery_device_ids[] = { |
| 68 | 87 | {"PNP0C0A", 0}, |
| 69 | 88 | {"", 0}, |
| @@ -299,6 +318,14 @@ static enum power_supply_property energy_battery_props[] = { · 229 unmodified lines | ||
| 299 | 318 | POWER_SUPPLY_PROP_SERIAL_NUMBER, |
| 300 | 319 | }; |
| 301 | 320 | |
| 321 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 322 | +inline char *acpi_battery_units(struct acpi_battery *battery) | |
| 323 | +{ | |
| 324 | + return (battery->power_unit == ACPI_BATTERY_POWER_UNIT_MA) ? | |
| 325 | + "mA" : "mW"; | |
| 326 | +} | |
| 327 | +#endif | |
| 328 | + | |
| 302 | 329 | /* -------------------------------------------------------------------------- |
| 303 | 330 | Battery Management |
| 304 | 331 | -------------------------------------------------------------------------- */ |
| @@ -716,6 +743,279 @@ static void acpi_battery_refresh(struct acpi_battery *battery) · 411 unmodified lines | ||
| 716 | 743 | sysfs_add_battery(battery); |
| 717 | 744 | } |
| 718 | 745 | |
| 746 | +/* -------------------------------------------------------------------------- | |
| 747 | + FS Interface (/proc) | |
| 748 | + -------------------------------------------------------------------------- */ | |
| 749 | + | |
| 750 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 751 | +static struct proc_dir_entry *acpi_battery_dir; | |
| 752 | + | |
| 753 | +static int acpi_battery_print_info(struct seq_file *seq, int result) | |
| 754 | +{ | |
| 755 | + struct acpi_battery *battery = seq->private; | |
| 756 | + | |
| 757 | + if (result) | |
| 758 | + goto end; | |
| 759 | + | |
| 760 | + seq_printf(seq, "present: %s\n", | |
| 761 | + acpi_battery_present(battery) ? "yes" : "no"); | |
| 762 | + if (!acpi_battery_present(battery)) | |
| 763 | + goto end; | |
| 764 | + if (battery->design_capacity == ACPI_BATTERY_VALUE_UNKNOWN) | |
| 765 | + seq_printf(seq, "design capacity: unknown\n"); | |
| 766 | + else | |
| 767 | + seq_printf(seq, "design capacity: %d %sh\n", | |
| 768 | + battery->design_capacity, | |
| 769 | + acpi_battery_units(battery)); | |
| 770 | + | |
| 771 | + if (battery->full_charge_capacity == ACPI_BATTERY_VALUE_UNKNOWN) | |
| 772 | + seq_printf(seq, "last full capacity: unknown\n"); | |
| 773 | + else | |
| 774 | + seq_printf(seq, "last full capacity: %d %sh\n", | |
| 775 | + battery->full_charge_capacity, | |
| 776 | + acpi_battery_units(battery)); | |
| 777 | + | |
| 778 | + seq_printf(seq, "battery technology: %srechargeable\n", | |
| 779 | + (!battery->technology)?"non-":""); | |
| 780 | + | |
| 781 | + if (battery->design_voltage == ACPI_BATTERY_VALUE_UNKNOWN) | |
| 782 | + seq_printf(seq, "design voltage: unknown\n"); | |
| 783 | + else | |
| 784 | + seq_printf(seq, "design voltage: %d mV\n", | |
| 785 | + battery->design_voltage); | |
| 786 | + seq_printf(seq, "design capacity warning: %d %sh\n", | |
| 787 | + battery->design_capacity_warning, | |
| 788 | + acpi_battery_units(battery)); | |
| 789 | + seq_printf(seq, "design capacity low: %d %sh\n", | |
| 790 | + battery->design_capacity_low, | |
| 791 | + acpi_battery_units(battery)); | |
| 792 | + seq_printf(seq, "cycle count: %i\n", battery->cycle_count); | |
| 793 | + seq_printf(seq, "capacity granularity 1: %d %sh\n", | |
| 794 | + battery->capacity_granularity_1, | |
| 795 | + acpi_battery_units(battery)); | |
| 796 | + seq_printf(seq, "capacity granularity 2: %d %sh\n", | |
| 797 | + battery->capacity_granularity_2, | |
| 798 | + acpi_battery_units(battery)); | |
| 799 | + seq_printf(seq, "model number: %s\n", battery->model_number); | |
| 800 | + seq_printf(seq, "serial number: %s\n", battery->serial_number); | |
| 801 | + seq_printf(seq, "battery type: %s\n", battery->type); | |
| 802 | + seq_printf(seq, "OEM info: %s\n", battery->oem_info); | |
| 803 | + end: | |
| 804 | + if (result) | |
| 805 | + seq_printf(seq, "ERROR: Unable to read battery info\n"); | |
| 806 | + return result; | |
| 807 | +} | |
| 808 | + | |
| 809 | +static int acpi_battery_print_state(struct seq_file *seq, int result) | |
| 810 | +{ | |
| 811 | + struct acpi_battery *battery = seq->private; | |
| 812 | + | |
| 813 | + if (result) | |
| 814 | + goto end; | |
| 815 | + | |
| 816 | + seq_printf(seq, "present: %s\n", | |
| 817 | + acpi_battery_present(battery) ? "yes" : "no"); | |
| 818 | + if (!acpi_battery_present(battery)) | |
| 819 | + goto end; | |
| 820 | + | |
| 821 | + seq_printf(seq, "capacity state: %s\n", | |
| 822 | + (battery->state & 0x04) ? "critical" : "ok"); | |
| 823 | + if ((battery->state & 0x01) && (battery->state & 0x02)) | |
| 824 | + seq_printf(seq, | |
| 825 | + "charging state: charging/discharging\n"); | |
| 826 | + else if (battery->state & 0x01) | |
| 827 | + seq_printf(seq, "charging state: discharging\n"); | |
| 828 | + else if (battery->state & 0x02) | |
| 829 | + seq_printf(seq, "charging state: charging\n"); | |
| 830 | + else | |
| 831 | + seq_printf(seq, "charging state: charged\n"); | |
| 832 | + | |
| 833 | + if (battery->rate_now == ACPI_BATTERY_VALUE_UNKNOWN) | |
| 834 | + seq_printf(seq, "present rate: unknown\n"); | |
| 835 | + else | |
| 836 | + seq_printf(seq, "present rate: %d %s\n", | |
| 837 | + battery->rate_now, acpi_battery_units(battery)); | |
| 838 | + | |
| 839 | + if (battery->capacity_now == ACPI_BATTERY_VALUE_UNKNOWN) | |
| 840 | + seq_printf(seq, "remaining capacity: unknown\n"); | |
| 841 | + else | |
| 842 | + seq_printf(seq, "remaining capacity: %d %sh\n", | |
| 843 | + battery->capacity_now, acpi_battery_units(battery)); | |
| 844 | + if (battery->voltage_now == ACPI_BATTERY_VALUE_UNKNOWN) | |
| 845 | + seq_printf(seq, "present voltage: unknown\n"); | |
| 846 | + else | |
| 847 | + seq_printf(seq, "present voltage: %d mV\n", | |
| 848 | + battery->voltage_now); | |
| 849 | + end: | |
| 850 | + if (result) | |
| 851 | + seq_printf(seq, "ERROR: Unable to read battery state\n"); | |
| 852 | + | |
| 853 | + return result; | |
| 854 | +} | |
| 855 | + | |
| 856 | +static int acpi_battery_print_alarm(struct seq_file *seq, int result) | |
| 857 | +{ | |
| 858 | + struct acpi_battery *battery = seq->private; | |
| 859 | + | |
| 860 | + if (result) | |
| 861 | + goto end; | |
| 862 | + | |
| 863 | + if (!acpi_battery_present(battery)) { | |
| 864 | + seq_printf(seq, "present: no\n"); | |
| 865 | + goto end; | |
| 866 | + } | |
| 867 | + seq_printf(seq, "alarm: "); | |
| 868 | + if (!battery->alarm) | |
| 869 | + seq_printf(seq, "unsupported\n"); | |
| 870 | + else | |
| 871 | + seq_printf(seq, "%u %sh\n", battery->alarm, | |
| 872 | + acpi_battery_units(battery)); | |
| 873 | + end: | |
| 874 | + if (result) | |
| 875 | + seq_printf(seq, "ERROR: Unable to read battery alarm\n"); | |
| 876 | + return result; | |
| 877 | +} | |
| 878 | + | |
| 879 | +static ssize_t acpi_battery_write_alarm(struct file *file, | |
| 880 | + const char __user * buffer, | |
| 881 | + size_t count, loff_t * ppos) | |
| 882 | +{ | |
| 883 | + int result = 0; | |
| 884 | + char alarm_string[12] = { '\0' }; | |
| 885 | + struct seq_file *m = file->private_data; | |
| 886 | + struct acpi_battery *battery = m->private; | |
| 887 | + | |
| 888 | + if (!battery || (count > sizeof(alarm_string) - 1)) | |
| 889 | + return -EINVAL; | |
| 890 | + if (!acpi_battery_present(battery)) { | |
| 891 | + result = -ENODEV; | |
| 892 | + goto end; | |
| 893 | + } | |
| 894 | + if (copy_from_user(alarm_string, buffer, count)) { | |
| 895 | + result = -EFAULT; | |
| 896 | + goto end; | |
| 897 | + } | |
| 898 | + alarm_string[count] = '\0'; | |
| 899 | + battery->alarm = simple_strtol(alarm_string, NULL, 0); | |
| 900 | + result = acpi_battery_set_alarm(battery); | |
| 901 | + end: | |
| 902 | + if (!result) | |
| 903 | + return count; | |
| 904 | + return result; | |
| 905 | +} | |
| 906 | + | |
| 907 | +typedef int(*print_func)(struct seq_file *seq, int result); | |
| 908 | + | |
| 909 | +static print_func acpi_print_funcs[ACPI_BATTERY_NUMFILES] = { | |
| 910 | + acpi_battery_print_info, | |
| 911 | + acpi_battery_print_state, | |
| 912 | + acpi_battery_print_alarm, | |
| 913 | +}; | |
| 914 | + | |
| 915 | +static int acpi_battery_read(int fid, struct seq_file *seq) | |
| 916 | +{ | |
| 917 | + struct acpi_battery *battery = seq->private; | |
| 918 | + int result = acpi_battery_update(battery); | |
| 919 | + return acpi_print_funcs[fid](seq, result); | |
| 920 | +} | |
| 921 | + | |
| 922 | +#define DECLARE_FILE_FUNCTIONS(_name) \ | |
| 923 | +static int acpi_battery_read_##_name(struct seq_file *seq, void *offset) \ | |
| 924 | +{ \ | |
| 925 | + return acpi_battery_read(_name##_tag, seq); \ | |
| 926 | +} \ | |
| 927 | +static int acpi_battery_##_name##_open_fs(struct inode *inode, struct file *file) \ | |
| 928 | +{ \ | |
| 929 | + return single_open(file, acpi_battery_read_##_name, PDE_DATA(inode)); \ | |
| 930 | +} | |
| 931 | + | |
| 932 | +DECLARE_FILE_FUNCTIONS(info); | |
| 933 | +DECLARE_FILE_FUNCTIONS(state); | |
| 934 | +DECLARE_FILE_FUNCTIONS(alarm); | |
| 935 | + | |
| 936 | +#undef DECLARE_FILE_FUNCTIONS | |
| 937 | + | |
| 938 | +#define FILE_DESCRIPTION_RO(_name) \ | |
| 939 | + { \ | |
| 940 | + .name = __stringify(_name), \ | |
| 941 | + .mode = S_IRUGO, \ | |
| 942 | + .ops = { \ | |
| 943 | + .open = acpi_battery_##_name##_open_fs, \ | |
| 944 | + .read = seq_read, \ | |
| 945 | + .llseek = seq_lseek, \ | |
| 946 | + .release = single_release, \ | |
| 947 | + .owner = THIS_MODULE, \ | |
| 948 | + }, \ | |
| 949 | + } | |
| 950 | + | |
| 951 | +#define FILE_DESCRIPTION_RW(_name) \ | |
| 952 | + { \ | |
| 953 | + .name = __stringify(_name), \ | |
| 954 | + .mode = S_IFREG | S_IRUGO | S_IWUSR, \ | |
| 955 | + .ops = { \ | |
| 956 | + .open = acpi_battery_##_name##_open_fs, \ | |
| 957 | + .read = seq_read, \ | |
| 958 | + .llseek = seq_lseek, \ | |
| 959 | + .write = acpi_battery_write_##_name, \ | |
| 960 | + .release = single_release, \ | |
| 961 | + .owner = THIS_MODULE, \ | |
| 962 | + }, \ | |
| 963 | + } | |
| 964 | + | |
| 965 | +static const struct battery_file { | |
| 966 | + struct file_operations ops; | |
| 967 | + umode_t mode; | |
| 968 | + const char *name; | |
| 969 | +} acpi_battery_file[] = { | |
| 970 | + FILE_DESCRIPTION_RO(info), | |
| 971 | + FILE_DESCRIPTION_RO(state), | |
| 972 | + FILE_DESCRIPTION_RW(alarm), | |
| 973 | +}; | |
| 974 | + | |
| 975 | +#undef FILE_DESCRIPTION_RO | |
| 976 | +#undef FILE_DESCRIPTION_RW | |
| 977 | + | |
| 978 | +static int acpi_battery_add_fs(struct acpi_device *device) | |
| 979 | +{ | |
| 980 | + struct proc_dir_entry *entry = NULL; | |
| 981 | + int i; | |
| 982 | + | |
| 983 | + printk(KERN_WARNING PREFIX "Deprecated procfs I/F for battery is loaded," | |
| 984 | + " please retry with CONFIG_ACPI_PROCFS_POWER cleared\n"); | |
| 985 | + if (!acpi_device_dir(device)) { | |
| 986 | + acpi_device_dir(device) = proc_mkdir(acpi_device_bid(device), | |
| 987 | + acpi_battery_dir); | |
| 988 | + if (!acpi_device_dir(device)) | |
| 989 | + return -ENODEV; | |
| 990 | + } | |
| 991 | + | |
| 992 | + for (i = 0; i < ACPI_BATTERY_NUMFILES; ++i) { | |
| 993 | + entry = proc_create_data(acpi_battery_file[i].name, | |
| 994 | + acpi_battery_file[i].mode, | |
| 995 | + acpi_device_dir(device), | |
| 996 | + &acpi_battery_file[i].ops, | |
| 997 | + acpi_driver_data(device)); | |
| 998 | + if (!entry) | |
| 999 | + return -ENODEV; | |
| 1000 | + } | |
| 1001 | + return 0; | |
| 1002 | +} | |
| 1003 | + | |
| 1004 | +static void acpi_battery_remove_fs(struct acpi_device *device) | |
| 1005 | +{ | |
| 1006 | + int i; | |
| 1007 | + if (!acpi_device_dir(device)) | |
| 1008 | + return; | |
| 1009 | + for (i = 0; i < ACPI_BATTERY_NUMFILES; ++i) | |
| 1010 | + remove_proc_entry(acpi_battery_file[i].name, | |
| 1011 | + acpi_device_dir(device)); | |
| 1012 | + | |
| 1013 | + remove_proc_entry(acpi_device_bid(device), acpi_battery_dir); | |
| 1014 | + acpi_device_dir(device) = NULL; | |
| 1015 | +} | |
| 1016 | + | |
| 1017 | +#endif | |
| 1018 | + | |
| 719 | 1019 | /* -------------------------------------------------------------------------- |
| 720 | 1020 | Driver Interface |
| 721 | 1021 | -------------------------------------------------------------------------- */ |
| @@ -790,6 +1090,15 @@ static int acpi_battery_add(struct acpi_device *device) · 68 unmodified lines | ||
| 790 | 1090 | result = acpi_battery_update(battery); |
| 791 | 1091 | if (result) |
| 792 | 1092 | goto fail; |
| 1093 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 1094 | + result = acpi_battery_add_fs(device); | |
| 1095 | +#endif | |
| 1096 | + if (result) { | |
| 1097 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 1098 | + acpi_battery_remove_fs(device); | |
| 1099 | +#endif | |
| 1100 | + goto fail; | |
| 1101 | + } | |
| 793 | 1102 | |
| 794 | 1103 | printk(KERN_INFO PREFIX "%s Slot [%s] (battery %s)\n", |
| 795 | 1104 | ACPI_BATTERY_DEVICE_NAME, acpi_device_bid(device), |
| @@ -816,6 +1125,9 @@ static int acpi_battery_remove(struct acpi_device *device) · 20 unmodified lines | ||
| 816 | 1125 | return -EINVAL; |
| 817 | 1126 | battery = acpi_driver_data(device); |
| 818 | 1127 | unregister_pm_notifier(&battery->pm_nb); |
| 1128 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 1129 | + acpi_battery_remove_fs(device); | |
| 1130 | +#endif | |
| 819 | 1131 | sysfs_remove_battery(battery); |
| 820 | 1132 | mutex_destroy(&battery->lock); |
| 821 | 1133 | mutex_destroy(&battery->sysfs_lock); |
| @@ -866,7 +1178,19 @@ static void __init acpi_battery_init_async(void *unused, async_cookie_t cookie) · 44 unmodified lines | ||
| 866 | 1178 | |
| 867 | 1179 | if (dmi_check_system(bat_dmi_table)) |
| 868 | 1180 | battery_bix_broken_package = 1; |
| 869 | − acpi_bus_register_driver(&acpi_battery_driver); | |
| 1181 | + | |
| 1182 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 1183 | + acpi_battery_dir = acpi_lock_battery_dir(); | |
| 1184 | + if (!acpi_battery_dir) | |
| 1185 | + return; | |
| 1186 | +#endif | |
| 1187 | + if (acpi_bus_register_driver(&acpi_battery_driver) < 0) { | |
| 1188 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 1189 | + acpi_unlock_battery_dir(acpi_battery_dir); | |
| 1190 | +#endif | |
| 1191 | + return; | |
| 1192 | + } | |
| 1193 | + return; | |
| 870 | 1194 | } |
| 871 | 1195 | |
| 872 | 1196 | static int __init acpi_battery_init(void) |
| @@ -878,6 +1202,9 @@ static int __init acpi_battery_init(void) · 5 unmodified lines | ||
| 878 | 1202 | static void __exit acpi_battery_exit(void) |
| 879 | 1203 | { |
| 880 | 1204 | acpi_bus_unregister_driver(&acpi_battery_driver); |
| 1205 | +#ifdef CONFIG_ACPI_PROCFS_POWER | |
| 1206 | + acpi_unlock_battery_dir(acpi_battery_dir); | |
| 1207 | +#endif | |
| 881 | 1208 | } |
| 882 | 1209 | |
| 883 | 1210 | module_init(acpi_battery_init); |
| @@ -314,6 +314,14 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = { · 313 unmodified lines | ||
| 314 | 314 | DMI_MATCH(DMI_PRODUCT_VERSION, "2349D15"), |
| 315 | 315 | }, |
| 316 | 316 | }, |
| 317 | + { | |
| 318 | + .callback = dmi_disable_osi_win8, | |
| 319 | + .ident = "Dell Inspiron 7737", | |
| 320 | + .matches = { | |
| 321 | + DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), | |
| 322 | + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7737"), | |
| 323 | + }, | |
| 324 | + }, | |
| 317 | 325 | |
| 318 | 326 | /* |
| 319 | 327 | * BIOS invocation of _OSI(Linux) is almost always a BIOS bug. |
| @@ -374,6 +382,19 @@ static struct dmi_system_id acpi_osi_dmi_table[] __initdata = { · 54 unmodified lines | ||
| 374 | 382 | DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T500"), |
| 375 | 383 | }, |
| 376 | 384 | }, |
| 385 | + /* | |
| 386 | + * Without this this EEEpc exports a non working WMI interface, with | |
| 387 | + * this it exports a working "good old" eeepc_laptop interface, fixing | |
| 388 | + * both brightness control, and rfkill not working. | |
| 389 | + */ | |
| 390 | + { | |
| 391 | + .callback = dmi_enable_osi_linux, | |
| 392 | + .ident = "Asus EEE PC 1015PX", | |
| 393 | + .matches = { | |
| 394 | + DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), | |
| 395 | + DMI_MATCH(DMI_PRODUCT_NAME, "1015PX"), | |
| 396 | + }, | |
| 397 | + }, | |
| 377 | 398 | {} |
| 378 | 399 | }; |
| 379 | 400 | |
| @@ -0,0 +1,105 @@ | ||
| 1 | +/* | |
| 2 | + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 3 | + * | |
| 4 | + * This program is free software; you can redistribute it and/or modify | |
| 5 | + * it under the terms of the GNU General Public License as published by | |
| 6 | + * the Free Software Foundation; either version 2 of the License, or (at | |
| 7 | + * your option) any later version. | |
| 8 | + * | |
| 9 | + * This program is distributed in the hope that it will be useful, but | |
| 10 | + * WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 11 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
| 12 | + * General Public License for more details. | |
| 13 | + * | |
| 14 | + * You should have received a copy of the GNU General Public License along | |
| 15 | + * with this program; if not, write to the Free Software Foundation, Inc., | |
| 16 | + * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. | |
| 17 | + * | |
| 18 | + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | |
| 19 | + */ | |
| 20 | + | |
| 21 | +#include <linux/kernel.h> | |
| 22 | +#include <linux/module.h> | |
| 23 | +#include <linux/init.h> | |
| 24 | +#include <linux/acpi.h> | |
| 25 | +#include <linux/types.h> | |
| 26 | +#include <linux/proc_fs.h> | |
| 27 | +#include <linux/seq_file.h> | |
| 28 | +#include <acpi/acpi_bus.h> | |
| 29 | +#include <acpi/acpi_drivers.h> | |
| 30 | + | |
| 31 | +#define PREFIX "ACPI: " | |
| 32 | + | |
| 33 | +ACPI_MODULE_NAME("cm_sbs"); | |
| 34 | +#define ACPI_AC_CLASS "ac_adapter" | |
| 35 | +#define ACPI_BATTERY_CLASS "battery" | |
| 36 | +#define _COMPONENT ACPI_SBS_COMPONENT | |
| 37 | +static struct proc_dir_entry *acpi_ac_dir; | |
| 38 | +static struct proc_dir_entry *acpi_battery_dir; | |
| 39 | + | |
| 40 | +static DEFINE_MUTEX(cm_sbs_mutex); | |
| 41 | + | |
| 42 | +static int lock_ac_dir_cnt; | |
| 43 | +static int lock_battery_dir_cnt; | |
| 44 | + | |
| 45 | +struct proc_dir_entry *acpi_lock_ac_dir(void) | |
| 46 | +{ | |
| 47 | + mutex_lock(&cm_sbs_mutex); | |
| 48 | + if (!acpi_ac_dir) | |
| 49 | + acpi_ac_dir = proc_mkdir(ACPI_AC_CLASS, acpi_root_dir); | |
| 50 | + if (acpi_ac_dir) { | |
| 51 | + lock_ac_dir_cnt++; | |
| 52 | + } else { | |
| 53 | + printk(KERN_ERR PREFIX | |
| 54 | + "Cannot create %s\n", ACPI_AC_CLASS); | |
| 55 | + } | |
| 56 | + mutex_unlock(&cm_sbs_mutex); | |
| 57 | + return acpi_ac_dir; | |
| 58 | +} | |
| 59 | +EXPORT_SYMBOL(acpi_lock_ac_dir); | |
| 60 | + | |
| 61 | +void acpi_unlock_ac_dir(struct proc_dir_entry *acpi_ac_dir_param) | |
| 62 | +{ | |
| 63 | + mutex_lock(&cm_sbs_mutex); | |
| 64 | + if (acpi_ac_dir_param) | |
| 65 | + lock_ac_dir_cnt--; | |
| 66 | + if (lock_ac_dir_cnt == 0 && acpi_ac_dir_param && acpi_ac_dir) { | |
| 67 | + remove_proc_entry(ACPI_AC_CLASS, acpi_root_dir); | |
| 68 | + acpi_ac_dir = NULL; | |
| 69 | + } | |
| 70 | + mutex_unlock(&cm_sbs_mutex); | |
| 71 | +} | |
| 72 | +EXPORT_SYMBOL(acpi_unlock_ac_dir); | |
| 73 | + | |
| 74 | +struct proc_dir_entry *acpi_lock_battery_dir(void) | |
| 75 | +{ | |
| 76 | + mutex_lock(&cm_sbs_mutex); | |
| 77 | + if (!acpi_battery_dir) { | |
| 78 | + acpi_battery_dir = | |
| 79 | + proc_mkdir(ACPI_BATTERY_CLASS, acpi_root_dir); | |
| 80 | + } | |
| 81 | + if (acpi_battery_dir) { | |
| 82 | + lock_battery_dir_cnt++; | |
| 83 | + } else { | |
| 84 | + printk(KERN_ERR PREFIX | |
| 85 | + "Cannot create %s\n", ACPI_BATTERY_CLASS); | |
| 86 | + } | |
| 87 | + mutex_unlock(&cm_sbs_mutex); | |
| 88 | + return acpi_battery_dir; | |
| 89 | +} | |
| 90 | +EXPORT_SYMBOL(acpi_lock_battery_dir); | |
| 91 | + | |
| 92 | +void acpi_unlock_battery_dir(struct proc_dir_entry *acpi_battery_dir_param) | |
| 93 | +{ | |
| 94 | + mutex_lock(&cm_sbs_mutex); | |
| 95 | + if (acpi_battery_dir_param) | |
| 96 | + lock_battery_dir_cnt--; | |
| 97 | + if (lock_battery_dir_cnt == 0 && acpi_battery_dir_param | |
| 98 | + && acpi_battery_dir) { | |
| 99 | + remove_proc_entry(ACPI_BATTERY_CLASS, acpi_root_dir); | |
| 100 | + acpi_battery_dir = NULL; | |
| 101 | + } | |
| 102 | + mutex_unlock(&cm_sbs_mutex); | |
| 103 | + return; | |
| 104 | +} | |
| 105 | +EXPORT_SYMBOL(acpi_unlock_battery_dir); | |
| @@ -1278,8 +1278,8 @@ static int __init acpi_thermal_init(void) · 1277 unmodified lines | ||
| 1278 | 1278 | |
| 1279 | 1279 | static void __exit acpi_thermal_exit(void) |
| 1280 | 1280 | { |
| 1281 | − destroy_workqueue(acpi_thermal_pm_queue); | |
| 1282 | 1281 | acpi_bus_unregister_driver(&acpi_thermal_driver); |
| 1282 | + destroy_workqueue(acpi_thermal_pm_queue); | |
| 1283 | 1283 | |
| 1284 | 1284 | return; |
| 1285 | 1285 | } |
| @@ -457,10 +457,10 @@ static struct dmi_system_id video_dmi_table[] __initdata = { · 456 unmodified lines | ||
| 457 | 457 | }, |
| 458 | 458 | { |
| 459 | 459 | .callback = video_set_use_native_backlight, |
| 460 | − .ident = "ThinkPad T430s", | |
| 460 | + .ident = "ThinkPad T430 and T430s", | |
| 461 | 461 | .matches = { |
| 462 | 462 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), |
| 463 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T430s"), | |
| 463 | + DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T430"), | |
| 464 | 464 | }, |
| 465 | 465 | }, |
| 466 | 466 | { |
| @@ -472,7 +472,7 @@ static struct dmi_system_id video_dmi_table[] __initdata = { · 5 unmodified lines | ||
| 472 | 472 | }, |
| 473 | 473 | }, |
| 474 | 474 | { |
| 475 | − .callback = video_set_use_native_backlight, | |
| 475 | + .callback = video_set_use_native_backlight, | |
| 476 | 476 | .ident = "ThinkPad X1 Carbon", |
| 477 | 477 | .matches = { |
| 478 | 478 | DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), |
| @@ -500,7 +500,7 @@ static struct dmi_system_id video_dmi_table[] __initdata = { · 21 unmodified lines | ||
| 500 | 500 | .ident = "Dell Inspiron 7520", |
| 501 | 501 | .matches = { |
| 502 | 502 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 503 | − DMI_MATCH(DMI_PRODUCT_VERSION, "Inspiron 7520"), | |
| 503 | + DMI_MATCH(DMI_PRODUCT_NAME, "Inspiron 7520"), | |
| 504 | 504 | }, |
| 505 | 505 | }, |
| 506 | 506 | { |
| @@ -511,6 +511,14 @@ static struct dmi_system_id video_dmi_table[] __initdata = { · 4 unmodified lines | ||
| 511 | 511 | DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5733Z"), |
| 512 | 512 | }, |
| 513 | 513 | }, |
| 514 | + { | |
| 515 | + .callback = video_set_use_native_backlight, | |
| 516 | + .ident = "Acer Aspire 5742G", | |
| 517 | + .matches = { | |
| 518 | + DMI_MATCH(DMI_SYS_VENDOR, "Acer"), | |
| 519 | + DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 5742G"), | |
| 520 | + }, | |
| 521 | + }, | |
| 514 | 522 | { |
| 515 | 523 | .callback = video_set_use_native_backlight, |
| 516 | 524 | .ident = "Acer Aspire V5-431", |
| @@ -815,7 +815,7 @@ config PATA_AT32 · 814 unmodified lines | ||
| 815 | 815 | |
| 816 | 816 | config PATA_AT91 |
| 817 | 817 | tristate "PATA support for AT91SAM9260" |
| 818 | − depends on ARM && ARCH_AT91 | |
| 818 | + depends on ARM && SOC_AT91SAM9 | |
| 819 | 819 | help |
| 820 | 820 | This option enables support for IDE devices on the Atmel AT91SAM9260 SoC. |
| 821 | 821 | |
| @@ -1115,6 +1115,17 @@ static bool ahci_broken_online(struct pci_dev *pdev) · 1114 unmodified lines | ||
| 1115 | 1115 | return pdev->bus->number == (val >> 8) && pdev->devfn == (val & 0xff); |
| 1116 | 1116 | } |
| 1117 | 1117 | |
| 1118 | +static bool ahci_broken_devslp(struct pci_dev *pdev) | |
| 1119 | +{ | |
| 1120 | + /* device with broken DEVSLP but still showing SDS capability */ | |
| 1121 | + static const struct pci_device_id ids[] = { | |
| 1122 | + { PCI_VDEVICE(INTEL, 0x0f23)}, /* Valleyview SoC */ | |
| 1123 | + {} | |
| 1124 | + }; | |
| 1125 | + | |
| 1126 | + return pci_match_id(ids, pdev); | |
| 1127 | +} | |
| 1128 | + | |
| 1118 | 1129 | #ifdef CONFIG_ATA_ACPI |
| 1119 | 1130 | static void ahci_gtf_filter_workaround(struct ata_host *host) |
| 1120 | 1131 | { |
| @@ -1364,6 +1375,10 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) · 243 unmodified lines | ||
| 1364 | 1375 | |
| 1365 | 1376 | hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar]; |
| 1366 | 1377 | |
| 1378 | + /* must set flag prior to save config in order to take effect */ | |
| 1379 | + if (ahci_broken_devslp(pdev)) | |
| 1380 | + hpriv->flags |= AHCI_HFLAG_NO_DEVSLP; | |
| 1381 | + | |
| 1367 | 1382 | /* save initial config */ |
| 1368 | 1383 | ahci_pci_save_initial_config(pdev, hpriv); |
| 1369 | 1384 | |
| @@ -236,6 +236,7 @@ enum { · 235 unmodified lines | ||
| 236 | 236 | port start (wait until |
| 237 | 237 | error-handling stage) */ |
| 238 | 238 | AHCI_HFLAG_MULTI_MSI = (1 << 16), /* multiple PCI MSIs */ |
| 239 | + AHCI_HFLAG_NO_DEVSLP = (1 << 17), /* no device sleep */ | |
| 239 | 240 | |
| 240 | 241 | /* ap->flags bits */ |
| 241 | 242 | |
| @@ -29,9 +29,25 @@ · 28 unmodified lines | ||
| 29 | 29 | #include "ahci.h" |
| 30 | 30 | |
| 31 | 31 | enum { |
| 32 | − PORT_PHY_CTL = 0x178, /* Port0 PHY Control */ | |
| 33 | − PORT_PHY_CTL_PDDQ_LOC = 0x100000, /* PORT_PHY_CTL bits */ | |
| 34 | − HOST_TIMER1MS = 0xe0, /* Timer 1-ms */ | |
| 32 | + /* Timer 1-ms Register */ | |
| 33 | + IMX_TIMER1MS = 0x00e0, | |
| 34 | + /* Port0 PHY Control Register */ | |
| 35 | + IMX_P0PHYCR = 0x0178, | |
| 36 | + IMX_P0PHYCR_TEST_PDDQ = 1 << 20, | |
| 37 | + IMX_P0PHYCR_CR_READ = 1 << 19, | |
| 38 | + IMX_P0PHYCR_CR_WRITE = 1 << 18, | |
| 39 | + IMX_P0PHYCR_CR_CAP_DATA = 1 << 17, | |
| 40 | + IMX_P0PHYCR_CR_CAP_ADDR = 1 << 16, | |
| 41 | + /* Port0 PHY Status Register */ | |
| 42 | + IMX_P0PHYSR = 0x017c, | |
| 43 | + IMX_P0PHYSR_CR_ACK = 1 << 18, | |
| 44 | + IMX_P0PHYSR_CR_DATA_OUT = 0xffff << 0, | |
| 45 | + /* Lane0 Output Status Register */ | |
| 46 | + IMX_LANE0_OUT_STAT = 0x2003, | |
| 47 | + IMX_LANE0_OUT_STAT_RX_PLL_STATE = 1 << 1, | |
| 48 | + /* Clock Reset Register */ | |
| 49 | + IMX_CLOCK_RESET = 0x7f3f, | |
| 50 | + IMX_CLOCK_RESET_RESET = 1 << 0, | |
| 35 | 51 | }; |
| 36 | 52 | |
| 37 | 53 | enum ahci_imx_type { |
| @@ -54,9 +70,149 @@ MODULE_PARM_DESC(hotplug, "AHCI IMX hot-plug support (0=Don't support, 1=support · 16 unmodified lines | ||
| 54 | 70 | |
| 55 | 71 | static void ahci_imx_host_stop(struct ata_host *host); |
| 56 | 72 | |
| 73 | +static int imx_phy_crbit_assert(void __iomem *mmio, u32 bit, bool assert) | |
| 74 | +{ | |
| 75 | + int timeout = 10; | |
| 76 | + u32 crval; | |
| 77 | + u32 srval; | |
| 78 | + | |
| 79 | + /* Assert or deassert the bit */ | |
| 80 | + crval = readl(mmio + IMX_P0PHYCR); | |
| 81 | + if (assert) | |
| 82 | + crval |= bit; | |
| 83 | + else | |
| 84 | + crval &= ~bit; | |
| 85 | + writel(crval, mmio + IMX_P0PHYCR); | |
| 86 | + | |
| 87 | + /* Wait for the cr_ack signal */ | |
| 88 | + do { | |
| 89 | + srval = readl(mmio + IMX_P0PHYSR); | |
| 90 | + if ((assert ? srval : ~srval) & IMX_P0PHYSR_CR_ACK) | |
| 91 | + break; | |
| 92 | + usleep_range(100, 200); | |
| 93 | + } while (--timeout); | |
| 94 | + | |
| 95 | + return timeout ? 0 : -ETIMEDOUT; | |
| 96 | +} | |
| 97 | + | |
| 98 | +static int imx_phy_reg_addressing(u16 addr, void __iomem *mmio) | |
| 99 | +{ | |
| 100 | + u32 crval = addr; | |
| 101 | + int ret; | |
| 102 | + | |
| 103 | + /* Supply the address on cr_data_in */ | |
| 104 | + writel(crval, mmio + IMX_P0PHYCR); | |
| 105 | + | |
| 106 | + /* Assert the cr_cap_addr signal */ | |
| 107 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, true); | |
| 108 | + if (ret) | |
| 109 | + return ret; | |
| 110 | + | |
| 111 | + /* Deassert cr_cap_addr */ | |
| 112 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, false); | |
| 113 | + if (ret) | |
| 114 | + return ret; | |
| 115 | + | |
| 116 | + return 0; | |
| 117 | +} | |
| 118 | + | |
| 119 | +static int imx_phy_reg_write(u16 val, void __iomem *mmio) | |
| 120 | +{ | |
| 121 | + u32 crval = val; | |
| 122 | + int ret; | |
| 123 | + | |
| 124 | + /* Supply the data on cr_data_in */ | |
| 125 | + writel(crval, mmio + IMX_P0PHYCR); | |
| 126 | + | |
| 127 | + /* Assert the cr_cap_data signal */ | |
| 128 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, true); | |
| 129 | + if (ret) | |
| 130 | + return ret; | |
| 131 | + | |
| 132 | + /* Deassert cr_cap_data */ | |
| 133 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, false); | |
| 134 | + if (ret) | |
| 135 | + return ret; | |
| 136 | + | |
| 137 | + if (val & IMX_CLOCK_RESET_RESET) { | |
| 138 | + /* | |
| 139 | + * In case we're resetting the phy, it's unable to acknowledge, | |
| 140 | + * so we return immediately here. | |
| 141 | + */ | |
| 142 | + crval |= IMX_P0PHYCR_CR_WRITE; | |
| 143 | + writel(crval, mmio + IMX_P0PHYCR); | |
| 144 | + goto out; | |
| 145 | + } | |
| 146 | + | |
| 147 | + /* Assert the cr_write signal */ | |
| 148 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, true); | |
| 149 | + if (ret) | |
| 150 | + return ret; | |
| 151 | + | |
| 152 | + /* Deassert cr_write */ | |
| 153 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, false); | |
| 154 | + if (ret) | |
| 155 | + return ret; | |
| 156 | + | |
| 157 | +out: | |
| 158 | + return 0; | |
| 159 | +} | |
| 160 | + | |
| 161 | +static int imx_phy_reg_read(u16 *val, void __iomem *mmio) | |
| 162 | +{ | |
| 163 | + int ret; | |
| 164 | + | |
| 165 | + /* Assert the cr_read signal */ | |
| 166 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, true); | |
| 167 | + if (ret) | |
| 168 | + return ret; | |
| 169 | + | |
| 170 | + /* Capture the data from cr_data_out[] */ | |
| 171 | + *val = readl(mmio + IMX_P0PHYSR) & IMX_P0PHYSR_CR_DATA_OUT; | |
| 172 | + | |
| 173 | + /* Deassert cr_read */ | |
| 174 | + ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, false); | |
| 175 | + if (ret) | |
| 176 | + return ret; | |
| 177 | + | |
| 178 | + return 0; | |
| 179 | +} | |
| 180 | + | |
| 181 | +static int imx_sata_phy_reset(struct ahci_host_priv *hpriv) | |
| 182 | +{ | |
| 183 | + void __iomem *mmio = hpriv->mmio; | |
| 184 | + int timeout = 10; | |
| 185 | + u16 val; | |
| 186 | + int ret; | |
| 187 | + | |
| 188 | + /* Reset SATA PHY by setting RESET bit of PHY register CLOCK_RESET */ | |
| 189 | + ret = imx_phy_reg_addressing(IMX_CLOCK_RESET, mmio); | |
| 190 | + if (ret) | |
| 191 | + return ret; | |
| 192 | + ret = imx_phy_reg_write(IMX_CLOCK_RESET_RESET, mmio); | |
| 193 | + if (ret) | |
| 194 | + return ret; | |
| 195 | + | |
| 196 | + /* Wait for PHY RX_PLL to be stable */ | |
| 197 | + do { | |
| 198 | + usleep_range(100, 200); | |
| 199 | + ret = imx_phy_reg_addressing(IMX_LANE0_OUT_STAT, mmio); | |
| 200 | + if (ret) | |
| 201 | + return ret; | |
| 202 | + ret = imx_phy_reg_read(&val, mmio); | |
| 203 | + if (ret) | |
| 204 | + return ret; | |
| 205 | + if (val & IMX_LANE0_OUT_STAT_RX_PLL_STATE) | |
| 206 | + break; | |
| 207 | + } while (--timeout); | |
| 208 | + | |
| 209 | + return timeout ? 0 : -ETIMEDOUT; | |
| 210 | +} | |
| 211 | + | |
| 57 | 212 | static int imx_sata_enable(struct ahci_host_priv *hpriv) |
| 58 | 213 | { |
| 59 | 214 | struct imx_ahci_priv *imxpriv = hpriv->plat_data; |
| 215 | + struct device *dev = &imxpriv->ahci_pdev->dev; | |
| 60 | 216 | int ret; |
| 61 | 217 | |
| 62 | 218 | if (imxpriv->no_device) |
| @@ -101,6 +257,14 @@ static int imx_sata_enable(struct ahci_host_priv *hpriv) · 38 unmodified lines | ||
| 101 | 257 | regmap_update_bits(imxpriv->gpr, IOMUXC_GPR13, |
| 102 | 258 | IMX6Q_GPR13_SATA_MPLL_CLK_EN, |
| 103 | 259 | IMX6Q_GPR13_SATA_MPLL_CLK_EN); |
| 260 | + | |
| 261 | + usleep_range(100, 200); | |
| 262 | + | |
| 263 | + ret = imx_sata_phy_reset(hpriv); | |
| 264 | + if (ret) { | |
| 265 | + dev_err(dev, "failed to reset phy: %d\n", ret); | |
| 266 | + goto disable_regulator; | |
| 267 | + } | |
| 104 | 268 | } |
| 105 | 269 | |
| 106 | 270 | usleep_range(1000, 2000); |
| @@ -156,8 +320,8 @@ static void ahci_imx_error_handler(struct ata_port *ap) · 49 unmodified lines | ||
| 156 | 320 | * without full reset once the pddq mode is enabled making it |
| 157 | 321 | * impossible to use as part of libata LPM. |
| 158 | 322 | */ |
| 159 | − reg_val = readl(mmio + PORT_PHY_CTL); | |
| 160 | − writel(reg_val | PORT_PHY_CTL_PDDQ_LOC, mmio + PORT_PHY_CTL); | |
| 323 | + reg_val = readl(mmio + IMX_P0PHYCR); | |
| 324 | + writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR); | |
| 161 | 325 | imx_sata_disable(hpriv); |
| 162 | 326 | imxpriv->no_device = true; |
| 163 | 327 | } |
| @@ -217,6 +381,7 @@ static int imx_ahci_probe(struct platform_device *pdev) · 53 unmodified lines | ||
| 217 | 381 | if (!imxpriv) |
| 218 | 382 | return -ENOMEM; |
| 219 | 383 | |
| 384 | + imxpriv->ahci_pdev = pdev; | |
| 220 | 385 | imxpriv->no_device = false; |
| 221 | 386 | imxpriv->first_time = true; |
| 222 | 387 | imxpriv->type = (enum ahci_imx_type)of_id->data; |
| @@ -248,7 +413,7 @@ static int imx_ahci_probe(struct platform_device *pdev) · 25 unmodified lines | ||
| 248 | 413 | |
| 249 | 414 | /* |
| 250 | 415 | * Configure the HWINIT bits of the HOST_CAP and HOST_PORTS_IMPL, |
| 251 | − * and IP vendor specific register HOST_TIMER1MS. | |
| 416 | + * and IP vendor specific register IMX_TIMER1MS. | |
| 252 | 417 | * Configure CAP_SSS (support stagered spin up). |
| 253 | 418 | * Implement the port0. |
| 254 | 419 | * Get the ahb clock rate, and configure the TIMER1MS register. |
| @@ -265,7 +430,7 @@ static int imx_ahci_probe(struct platform_device *pdev) · 10 unmodified lines | ||
| 265 | 430 | } |
| 266 | 431 | |
| 267 | 432 | reg_val = clk_get_rate(imxpriv->ahb_clk) / 1000; |
| 268 | − writel(reg_val, hpriv->mmio + HOST_TIMER1MS); | |
| 433 | + writel(reg_val, hpriv->mmio + IMX_TIMER1MS); | |
| 269 | 434 | |
| 270 | 435 | ret = ahci_platform_init_host(pdev, hpriv, &ahci_imx_port_info, 0, 0); |
| 271 | 436 | if (ret) |
| @@ -452,6 +452,13 @@ void ahci_save_initial_config(struct device *dev, · 451 unmodified lines | ||
| 452 | 452 | cap &= ~HOST_CAP_SNTF; |
| 453 | 453 | } |
| 454 | 454 | |
| 455 | + if ((cap2 & HOST_CAP2_SDS) && (hpriv->flags & AHCI_HFLAG_NO_DEVSLP)) { | |
| 456 | + dev_info(dev, | |
| 457 | + "controller can't do DEVSLP, turning off\n"); | |
| 458 | + cap2 &= ~HOST_CAP2_SDS; | |
| 459 | + cap2 &= ~HOST_CAP2_SADM; | |
| 460 | + } | |
| 461 | + | |
| 455 | 462 | if (!(cap & HOST_CAP_FBS) && (hpriv->flags & AHCI_HFLAG_YES_FBS)) { |
| 456 | 463 | dev_info(dev, "controller can do FBS, turning on CAP_FBS\n"); |
| 457 | 464 | cap |= HOST_CAP_FBS; |
| @@ -6314,6 +6314,8 @@ int ata_host_activate(struct ata_host *host, int irq, · 6313 unmodified lines | ||
| 6314 | 6314 | static void ata_port_detach(struct ata_port *ap) |
| 6315 | 6315 | { |
| 6316 | 6316 | unsigned long flags; |
| 6317 | + struct ata_link *link; | |
| 6318 | + struct ata_device *dev; | |
| 6317 | 6319 | |
| 6318 | 6320 | if (!ap->ops->error_handler) |
| 6319 | 6321 | goto skip_eh; |
| @@ -6333,6 +6335,13 @@ static void ata_port_detach(struct ata_port *ap) · 13 unmodified lines | ||
| 6333 | 6335 | cancel_delayed_work_sync(&ap->hotplug_task); |
| 6334 | 6336 | |
| 6335 | 6337 | skip_eh: |
| 6338 | + /* clean up zpodd on port removal */ | |
| 6339 | + ata_for_each_link(link, ap, HOST_FIRST) { | |
| 6340 | + ata_for_each_dev(dev, link, ALL) { | |
| 6341 | + if (zpodd_dev_enabled(dev)) | |
| 6342 | + zpodd_exit(dev); | |
| 6343 | + } | |
| 6344 | + } | |
| 6336 | 6345 | if (ap->pmp_link) { |
| 6337 | 6346 | int i; |
| 6338 | 6347 | for (i = 0; i < SATA_PMP_MAX_PORTS; i++) |
| @@ -144,11 +144,11 @@ static void virtblk_done(struct virtqueue *vq) · 143 unmodified lines | ||
| 144 | 144 | if (unlikely(virtqueue_is_broken(vq))) |
| 145 | 145 | break; |
| 146 | 146 | } while (!virtqueue_enable_cb(vq)); |
| 147 | − spin_unlock_irqrestore(&vblk->vq_lock, flags); | |
| 148 | 147 | |
| 149 | 148 | /* In case queue is stopped waiting for more buffers. */ |
| 150 | 149 | if (req_done) |
| 151 | 150 | blk_mq_start_stopped_hw_queues(vblk->disk->queue); |
| 151 | + spin_unlock_irqrestore(&vblk->vq_lock, flags); | |
| 152 | 152 | } |
| 153 | 153 | |
| 154 | 154 | static int virtio_queue_rq(struct blk_mq_hw_ctx *hctx, struct request *req) |
| @@ -202,8 +202,8 @@ static int virtio_queue_rq(struct blk_mq_hw_ctx *hctx, struct request *req) · 47 unmodified lines | ||
| 202 | 202 | err = __virtblk_add_req(vblk->vq, vbr, vbr->sg, num); |
| 203 | 203 | if (err) { |
| 204 | 204 | virtqueue_kick(vblk->vq); |
| 205 | − spin_unlock_irqrestore(&vblk->vq_lock, flags); | |
| 206 | 205 | blk_mq_stop_hw_queue(hctx); |
| 206 | + spin_unlock_irqrestore(&vblk->vq_lock, flags); | |
| 207 | 207 | /* Out of mem doesn't actually happen, since we fall back |
| 208 | 208 | * to direct descriptors */ |
| 209 | 209 | if (err == -ENOMEM || err == -ENOSPC) |
| @@ -56,6 +56,7 @@ · 55 unmodified lines | ||
| 56 | 56 | #include <linux/of.h> |
| 57 | 57 | #include <linux/of_address.h> |
| 58 | 58 | #include <linux/debugfs.h> |
| 59 | +#include <linux/log2.h> | |
| 59 | 60 | |
| 60 | 61 | /* |
| 61 | 62 | * DDR target is the same on all platforms. |
| @@ -222,12 +223,6 @@ static int mvebu_mbus_window_conflicts(struct mvebu_mbus_state *mbus, · 160 unmodified lines | ||
| 222 | 223 | */ |
| 223 | 224 | if ((u64)base < wend && end > wbase) |
| 224 | 225 | return 0; |
| 225 | − | |
| 226 | − /* | |
| 227 | − * Check if target/attribute conflicts | |
| 228 | − */ | |
| 229 | − if (target == wtarget && attr == wattr) | |
| 230 | − return 0; | |
| 231 | 226 | } |
| 232 | 227 | |
| 233 | 228 | return 1; |
| @@ -266,6 +261,17 @@ static int mvebu_mbus_setup_window(struct mvebu_mbus_state *mbus, · 32 unmodified lines | ||
| 266 | 261 | mbus->soc->win_cfg_offset(win); |
| 267 | 262 | u32 ctrl, remap_addr; |
| 268 | 263 | |
| 264 | + if (!is_power_of_2(size)) { | |
| 265 | + WARN(true, "Invalid MBus window size: 0x%zx\n", size); | |
| 266 | + return -EINVAL; | |
| 267 | + } | |
| 268 | + | |
| 269 | + if ((base & (phys_addr_t)(size - 1)) != 0) { | |
| 270 | + WARN(true, "Invalid MBus base/size: %pa len 0x%zx\n", &base, | |
| 271 | + size); | |
| 272 | + return -EINVAL; | |
| 273 | + } | |
| 274 | + | |
| 269 | 275 | ctrl = ((size - 1) & WIN_CTRL_SIZE_MASK) | |
| 270 | 276 | (attr << WIN_CTRL_ATTR_SHIFT) | |
| 271 | 277 | (target << WIN_CTRL_TGT_SHIFT) | |
| @@ -413,6 +419,10 @@ static int mvebu_devs_debug_show(struct seq_file *seq, void *v) · 141 unmodified lines | ||
| 413 | 419 | win, (unsigned long long)wbase, |
| 414 | 420 | (unsigned long long)(wbase + wsize), wtarget, wattr); |
| 415 | 421 | |
| 422 | + if (!is_power_of_2(wsize) || | |
| 423 | + ((wbase & (u64)(wsize - 1)) != 0)) | |
| 424 | + seq_puts(seq, " (Invalid base/size!!)"); | |
| 425 | + | |
| 416 | 426 | if (win < mbus->soc->num_remappable_wins) { |
| 417 | 427 | seq_printf(seq, " (remap %016llx)\n", |
| 418 | 428 | (unsigned long long)wremap); |
| @@ -995,8 +995,11 @@ retry: · 994 unmodified lines | ||
| 995 | 995 | ibytes = min_t(size_t, ibytes, have_bytes - reserved); |
| 996 | 996 | if (ibytes < min) |
| 997 | 997 | ibytes = 0; |
| 998 | − entropy_count = max_t(int, 0, | |
| 999 | − entropy_count - (ibytes << (ENTROPY_SHIFT + 3))); | |
| 998 | + if (have_bytes >= ibytes + reserved) | |
| 999 | + entropy_count -= ibytes << (ENTROPY_SHIFT + 3); | |
| 1000 | + else | |
| 1001 | + entropy_count = reserved << (ENTROPY_SHIFT + 3); | |
| 1002 | + | |
| 1000 | 1003 | if (cmpxchg(&r->entropy_count, orig, entropy_count) != orig) |
| 1001 | 1004 | goto retry; |
| 1002 | 1005 | |
| @@ -328,13 +328,11 @@ int tpm_add_ppi(struct kobject *parent) · 327 unmodified lines | ||
| 328 | 328 | /* Cache TPM ACPI handle and version string */ |
| 329 | 329 | acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, |
| 330 | 330 | ppi_callback, NULL, NULL, &tpm_ppi_handle); |
| 331 | − if (tpm_ppi_handle == NULL) | |
| 332 | − return -ENODEV; | |
| 333 | − | |
| 334 | − return sysfs_create_group(parent, &ppi_attr_grp); | |
| 331 | + return tpm_ppi_handle ? sysfs_create_group(parent, &ppi_attr_grp) : 0; | |
| 335 | 332 | } |
| 336 | 333 | |
| 337 | 334 | void tpm_remove_ppi(struct kobject *parent) |
| 338 | 335 | { |
| 339 | − sysfs_remove_group(parent, &ppi_attr_grp); | |
| 336 | + if (tpm_ppi_handle) | |
| 337 | + sysfs_remove_group(parent, &ppi_attr_grp); | |
| 340 | 338 | } |
| @@ -27,7 +27,7 @@ LIST_HEAD(ccu_list); /* The list of set up CCUs */ · 26 unmodified lines | ||
| 27 | 27 | |
| 28 | 28 | static bool clk_requires_trigger(struct kona_clk *bcm_clk) |
| 29 | 29 | { |
| 30 | − struct peri_clk_data *peri = bcm_clk->peri; | |
| 30 | + struct peri_clk_data *peri = bcm_clk->u.peri; | |
| 31 | 31 | struct bcm_clk_sel *sel; |
| 32 | 32 | struct bcm_clk_div *div; |
| 33 | 33 | |
| @@ -63,7 +63,7 @@ static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk) · 29 unmodified lines | ||
| 63 | 63 | u32 limit; |
| 64 | 64 | |
| 65 | 65 | BUG_ON(bcm_clk->type != bcm_clk_peri); |
| 66 | − peri = bcm_clk->peri; | |
| 66 | + peri = bcm_clk->u.peri; | |
| 67 | 67 | name = bcm_clk->name; |
| 68 | 68 | range = bcm_clk->ccu->range; |
| 69 | 69 | |
| @@ -81,19 +81,19 @@ static bool peri_clk_data_offsets_valid(struct kona_clk *bcm_clk) · 11 unmodified lines | ||
| 81 | 81 | |
| 82 | 82 | div = &peri->div; |
| 83 | 83 | if (divider_exists(div)) { |
| 84 | − if (div->offset > limit) { | |
| 84 | + if (div->u.s.offset > limit) { | |
| 85 | 85 | pr_err("%s: bad divider offset for %s (%u > %u)\n", |
| 86 | − __func__, name, div->offset, limit); | |
| 86 | + __func__, name, div->u.s.offset, limit); | |
| 87 | 87 | return false; |
| 88 | 88 | } |
| 89 | 89 | } |
| 90 | 90 | |
| 91 | 91 | div = &peri->pre_div; |
| 92 | 92 | if (divider_exists(div)) { |
| 93 | − if (div->offset > limit) { | |
| 93 | + if (div->u.s.offset > limit) { | |
| 94 | 94 | pr_err("%s: bad pre-divider offset for %s " |
| 95 | 95 | "(%u > %u)\n", |
| 96 | − __func__, name, div->offset, limit); | |
| 96 | + __func__, name, div->u.s.offset, limit); | |
| 97 | 97 | return false; |
| 98 | 98 | } |
| 99 | 99 | } |
| @@ -249,21 +249,22 @@ static bool div_valid(struct bcm_clk_div *div, const char *field_name, · 149 unmodified lines | ||
| 249 | 249 | { |
| 250 | 250 | if (divider_is_fixed(div)) { |
| 251 | 251 | /* Any fixed divider value but 0 is OK */ |
| 252 | − if (div->fixed == 0) { | |
| 252 | + if (div->u.fixed == 0) { | |
| 253 | 253 | pr_err("%s: bad %s fixed value 0 for %s\n", __func__, |
| 254 | 254 | field_name, clock_name); |
| 255 | 255 | return false; |
| 256 | 256 | } |
| 257 | 257 | return true; |
| 258 | 258 | } |
| 259 | − if (!bitfield_valid(div->shift, div->width, field_name, clock_name)) | |
| 259 | + if (!bitfield_valid(div->u.s.shift, div->u.s.width, | |
| 260 | + field_name, clock_name)) | |
| 260 | 261 | return false; |
| 261 | 262 | |
| 262 | 263 | if (divider_has_fraction(div)) |
| 263 | − if (div->frac_width > div->width) { | |
| 264 | + if (div->u.s.frac_width > div->u.s.width) { | |
| 264 | 265 | pr_warn("%s: bad %s fraction width for %s (%u > %u)\n", |
| 265 | 266 | __func__, field_name, clock_name, |
| 266 | − div->frac_width, div->width); | |
| 267 | + div->u.s.frac_width, div->u.s.width); | |
| 267 | 268 | return false; |
| 268 | 269 | } |
| 269 | 270 | |
| @@ -278,7 +279,7 @@ static bool div_valid(struct bcm_clk_div *div, const char *field_name, · 8 unmodified lines | ||
| 278 | 279 | */ |
| 279 | 280 | static bool kona_dividers_valid(struct kona_clk *bcm_clk) |
| 280 | 281 | { |
| 281 | − struct peri_clk_data *peri = bcm_clk->peri; | |
| 282 | + struct peri_clk_data *peri = bcm_clk->u.peri; | |
| 282 | 283 | struct bcm_clk_div *div; |
| 283 | 284 | struct bcm_clk_div *pre_div; |
| 284 | 285 | u32 limit; |
| @@ -295,7 +296,7 @@ static bool kona_dividers_valid(struct kona_clk *bcm_clk) · 10 unmodified lines | ||
| 295 | 296 | |
| 296 | 297 | limit = BITS_PER_BYTE * sizeof(u32); |
| 297 | 298 | |
| 298 | − return div->frac_width + pre_div->frac_width <= limit; | |
| 299 | + return div->u.s.frac_width + pre_div->u.s.frac_width <= limit; | |
| 299 | 300 | } |
| 300 | 301 | |
| 301 | 302 | |
| @@ -328,7 +329,7 @@ peri_clk_data_valid(struct kona_clk *bcm_clk) · 26 unmodified lines | ||
| 328 | 329 | if (!peri_clk_data_offsets_valid(bcm_clk)) |
| 329 | 330 | return false; |
| 330 | 331 | |
| 331 | − peri = bcm_clk->peri; | |
| 332 | + peri = bcm_clk->u.peri; | |
| 332 | 333 | name = bcm_clk->name; |
| 333 | 334 | gate = &peri->gate; |
| 334 | 335 | if (gate_exists(gate) && !gate_valid(gate, "gate", name)) |
| @@ -588,12 +589,12 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk) · 253 unmodified lines | ||
| 588 | 589 | { |
| 589 | 590 | switch (bcm_clk->type) { |
| 590 | 591 | case bcm_clk_peri: |
| 591 | − peri_clk_teardown(bcm_clk->data, &bcm_clk->init_data); | |
| 592 | + peri_clk_teardown(bcm_clk->u.data, &bcm_clk->init_data); | |
| 592 | 593 | break; |
| 593 | 594 | default: |
| 594 | 595 | break; |
| 595 | 596 | } |
| 596 | − bcm_clk->data = NULL; | |
| 597 | + bcm_clk->u.data = NULL; | |
| 597 | 598 | bcm_clk->type = bcm_clk_none; |
| 598 | 599 | } |
| 599 | 600 | |
| @@ -644,7 +645,7 @@ struct clk *kona_clk_setup(struct ccu_data *ccu, const char *name, · 44 unmodified lines | ||
| 644 | 645 | break; |
| 645 | 646 | } |
| 646 | 647 | bcm_clk->type = type; |
| 647 | − bcm_clk->data = data; | |
| 648 | + bcm_clk->u.data = data; | |
| 648 | 649 | |
| 649 | 650 | /* Make sure everything makes sense before we set it up */ |
| 650 | 651 | if (!kona_clk_valid(bcm_clk)) { |
| @@ -61,7 +61,7 @@ u64 do_div_round_closest(u64 dividend, unsigned long divisor) · 60 unmodified lines | ||
| 61 | 61 | /* Convert a divider into the scaled divisor value it represents. */ |
| 62 | 62 | static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) |
| 63 | 63 | { |
| 64 | − return (u64)reg_div + ((u64)1 << div->frac_width); | |
| 64 | + return (u64)reg_div + ((u64)1 << div->u.s.frac_width); | |
| 65 | 65 | } |
| 66 | 66 | |
| 67 | 67 | /* |
| @@ -77,7 +77,7 @@ u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) · 9 unmodified lines | ||
| 77 | 77 | BUG_ON(billionths >= BILLION); |
| 78 | 78 | |
| 79 | 79 | combined = (u64)div_value * BILLION + billionths; |
| 80 | − combined <<= div->frac_width; | |
| 80 | + combined <<= div->u.s.frac_width; | |
| 81 | 81 | |
| 82 | 82 | return do_div_round_closest(combined, BILLION); |
| 83 | 83 | } |
| @@ -87,7 +87,7 @@ static inline u64 · 3 unmodified lines | ||
| 87 | 87 | scaled_div_min(struct bcm_clk_div *div) |
| 88 | 88 | { |
| 89 | 89 | if (divider_is_fixed(div)) |
| 90 | − return (u64)div->fixed; | |
| 90 | + return (u64)div->u.fixed; | |
| 91 | 91 | |
| 92 | 92 | return scaled_div_value(div, 0); |
| 93 | 93 | } |
| @@ -98,9 +98,9 @@ u64 scaled_div_max(struct bcm_clk_div *div) · 4 unmodified lines | ||
| 98 | 98 | u32 reg_div; |
| 99 | 99 | |
| 100 | 100 | if (divider_is_fixed(div)) |
| 101 | − return (u64)div->fixed; | |
| 101 | + return (u64)div->u.fixed; | |
| 102 | 102 | |
| 103 | − reg_div = ((u32)1 << div->width) - 1; | |
| 103 | + reg_div = ((u32)1 << div->u.s.width) - 1; | |
| 104 | 104 | |
| 105 | 105 | return scaled_div_value(div, reg_div); |
| 106 | 106 | } |
| @@ -115,7 +115,7 @@ divider(struct bcm_clk_div *div, u64 scaled_div) · 8 unmodified lines | ||
| 115 | 115 | BUG_ON(scaled_div < scaled_div_min(div)); |
| 116 | 116 | BUG_ON(scaled_div > scaled_div_max(div)); |
| 117 | 117 | |
| 118 | − return (u32)(scaled_div - ((u64)1 << div->frac_width)); | |
| 118 | + return (u32)(scaled_div - ((u64)1 << div->u.s.frac_width)); | |
| 119 | 119 | } |
| 120 | 120 | |
| 121 | 121 | /* Return a rate scaled for use when dividing by a scaled divisor. */ |
| @@ -125,7 +125,7 @@ scale_rate(struct bcm_clk_div *div, u32 rate) · 3 unmodified lines | ||
| 125 | 125 | if (divider_is_fixed(div)) |
| 126 | 126 | return (u64)rate; |
| 127 | 127 | |
| 128 | − return (u64)rate << div->frac_width; | |
| 128 | + return (u64)rate << div->u.s.frac_width; | |
| 129 | 129 | } |
| 130 | 130 | |
| 131 | 131 | /* CCU access */ |
| @@ -398,14 +398,14 @@ static u64 divider_read_scaled(struct ccu_data *ccu, struct bcm_clk_div *div) · 266 unmodified lines | ||
| 398 | 398 | u32 reg_div; |
| 399 | 399 | |
| 400 | 400 | if (divider_is_fixed(div)) |
| 401 | − return (u64)div->fixed; | |
| 401 | + return (u64)div->u.fixed; | |
| 402 | 402 | |
| 403 | 403 | flags = ccu_lock(ccu); |
| 404 | − reg_val = __ccu_read(ccu, div->offset); | |
| 404 | + reg_val = __ccu_read(ccu, div->u.s.offset); | |
| 405 | 405 | ccu_unlock(ccu, flags); |
| 406 | 406 | |
| 407 | 407 | /* Extract the full divider field from the register value */ |
| 408 | − reg_div = bitfield_extract(reg_val, div->shift, div->width); | |
| 408 | + reg_div = bitfield_extract(reg_val, div->u.s.shift, div->u.s.width); | |
| 409 | 409 | |
| 410 | 410 | /* Return the scaled divisor value it represents */ |
| 411 | 411 | return scaled_div_value(div, reg_div); |
| @@ -433,16 +433,17 @@ static int __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, · 21 unmodified lines | ||
| 433 | 433 | * state was defined in the device tree, we just find out |
| 434 | 434 | * what its current value is rather than updating it. |
| 435 | 435 | */ |
| 436 | − if (div->scaled_div == BAD_SCALED_DIV_VALUE) { | |
| 437 | − reg_val = __ccu_read(ccu, div->offset); | |
| 438 | − reg_div = bitfield_extract(reg_val, div->shift, div->width); | |
| 439 | − div->scaled_div = scaled_div_value(div, reg_div); | |
| 436 | + if (div->u.s.scaled_div == BAD_SCALED_DIV_VALUE) { | |
| 437 | + reg_val = __ccu_read(ccu, div->u.s.offset); | |
| 438 | + reg_div = bitfield_extract(reg_val, div->u.s.shift, | |
| 439 | + div->u.s.width); | |
| 440 | + div->u.s.scaled_div = scaled_div_value(div, reg_div); | |
| 440 | 441 | |
| 441 | 442 | return 0; |
| 442 | 443 | } |
| 443 | 444 | |
| 444 | 445 | /* Convert the scaled divisor to the value we need to record */ |
| 445 | − reg_div = divider(div, div->scaled_div); | |
| 446 | + reg_div = divider(div, div->u.s.scaled_div); | |
| 446 | 447 | |
| 447 | 448 | /* Clock needs to be enabled before changing the rate */ |
| 448 | 449 | enabled = __is_clk_gate_enabled(ccu, gate); |
| @@ -452,9 +453,10 @@ static int __div_commit(struct ccu_data *ccu, struct bcm_clk_gate *gate, · 3 unmodified lines | ||
| 452 | 453 | } |
| 453 | 454 | |
| 454 | 455 | /* Replace the divider value and record the result */ |
| 455 | − reg_val = __ccu_read(ccu, div->offset); | |
| 456 | − reg_val = bitfield_replace(reg_val, div->shift, div->width, reg_div); | |
| 457 | − __ccu_write(ccu, div->offset, reg_val); | |
| 456 | + reg_val = __ccu_read(ccu, div->u.s.offset); | |
| 457 | + reg_val = bitfield_replace(reg_val, div->u.s.shift, div->u.s.width, | |
| 458 | + reg_div); | |
| 459 | + __ccu_write(ccu, div->u.s.offset, reg_val); | |
| 458 | 460 | |
| 459 | 461 | /* If the trigger fails we still want to disable the gate */ |
| 460 | 462 | if (!__clk_trigger(ccu, trig)) |
| @@ -490,11 +492,11 @@ static int divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, · 29 unmodified lines | ||
| 490 | 492 | |
| 491 | 493 | BUG_ON(divider_is_fixed(div)); |
| 492 | 494 | |
| 493 | − previous = div->scaled_div; | |
| 495 | + previous = div->u.s.scaled_div; | |
| 494 | 496 | if (previous == scaled_div) |
| 495 | 497 | return 0; /* No change */ |
| 496 | 498 | |
| 497 | − div->scaled_div = scaled_div; | |
| 499 | + div->u.s.scaled_div = scaled_div; | |
| 498 | 500 | |
| 499 | 501 | flags = ccu_lock(ccu); |
| 500 | 502 | __ccu_write_enable(ccu); |
| @@ -505,7 +507,7 @@ static int divider_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, · 4 unmodified lines | ||
| 505 | 507 | ccu_unlock(ccu, flags); |
| 506 | 508 | |
| 507 | 509 | if (ret) |
| 508 | − div->scaled_div = previous; /* Revert the change */ | |
| 510 | + div->u.s.scaled_div = previous; /* Revert the change */ | |
| 509 | 511 | |
| 510 | 512 | return ret; |
| 511 | 513 | |
| @@ -802,7 +804,7 @@ static int selector_write(struct ccu_data *ccu, struct bcm_clk_gate *gate, · 290 unmodified lines | ||
| 802 | 804 | static int kona_peri_clk_enable(struct clk_hw *hw) |
| 803 | 805 | { |
| 804 | 806 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 805 | − struct bcm_clk_gate *gate = &bcm_clk->peri->gate; | |
| 807 | + struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; | |
| 806 | 808 | |
| 807 | 809 | return clk_gate(bcm_clk->ccu, bcm_clk->name, gate, true); |
| 808 | 810 | } |
| @@ -810,7 +812,7 @@ static int kona_peri_clk_enable(struct clk_hw *hw) · 1 unmodified line | ||
| 810 | 812 | static void kona_peri_clk_disable(struct clk_hw *hw) |
| 811 | 813 | { |
| 812 | 814 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 813 | − struct bcm_clk_gate *gate = &bcm_clk->peri->gate; | |
| 815 | + struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; | |
| 814 | 816 | |
| 815 | 817 | (void)clk_gate(bcm_clk->ccu, bcm_clk->name, gate, false); |
| 816 | 818 | } |
| @@ -818,7 +820,7 @@ static void kona_peri_clk_disable(struct clk_hw *hw) · 1 unmodified line | ||
| 818 | 820 | static int kona_peri_clk_is_enabled(struct clk_hw *hw) |
| 819 | 821 | { |
| 820 | 822 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 821 | − struct bcm_clk_gate *gate = &bcm_clk->peri->gate; | |
| 823 | + struct bcm_clk_gate *gate = &bcm_clk->u.peri->gate; | |
| 822 | 824 | |
| 823 | 825 | return is_clk_gate_enabled(bcm_clk->ccu, gate) ? 1 : 0; |
| 824 | 826 | } |
| @@ -827,7 +829,7 @@ static unsigned long kona_peri_clk_recalc_rate(struct clk_hw *hw, · 2 unmodified lines | ||
| 827 | 829 | unsigned long parent_rate) |
| 828 | 830 | { |
| 829 | 831 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 830 | − struct peri_clk_data *data = bcm_clk->peri; | |
| 832 | + struct peri_clk_data *data = bcm_clk->u.peri; | |
| 831 | 833 | |
| 832 | 834 | return clk_recalc_rate(bcm_clk->ccu, &data->div, &data->pre_div, |
| 833 | 835 | parent_rate); |
| @@ -837,20 +839,20 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate, · 3 unmodified lines | ||
| 837 | 839 | unsigned long *parent_rate) |
| 838 | 840 | { |
| 839 | 841 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 840 | − struct bcm_clk_div *div = &bcm_clk->peri->div; | |
| 842 | + struct bcm_clk_div *div = &bcm_clk->u.peri->div; | |
| 841 | 843 | |
| 842 | 844 | if (!divider_exists(div)) |
| 843 | 845 | return __clk_get_rate(hw->clk); |
| 844 | 846 | |
| 845 | 847 | /* Quietly avoid a zero rate */ |
| 846 | − return round_rate(bcm_clk->ccu, div, &bcm_clk->peri->pre_div, | |
| 848 | + return round_rate(bcm_clk->ccu, div, &bcm_clk->u.peri->pre_div, | |
| 847 | 849 | rate ? rate : 1, *parent_rate, NULL); |
| 848 | 850 | } |
| 849 | 851 | |
| 850 | 852 | static int kona_peri_clk_set_parent(struct clk_hw *hw, u8 index) |
| 851 | 853 | { |
| 852 | 854 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 853 | − struct peri_clk_data *data = bcm_clk->peri; | |
| 855 | + struct peri_clk_data *data = bcm_clk->u.peri; | |
| 854 | 856 | struct bcm_clk_sel *sel = &data->sel; |
| 855 | 857 | struct bcm_clk_trig *trig; |
| 856 | 858 | int ret; |
| @@ -884,7 +886,7 @@ static int kona_peri_clk_set_parent(struct clk_hw *hw, u8 index) · 27 unmodified lines | ||
| 884 | 886 | static u8 kona_peri_clk_get_parent(struct clk_hw *hw) |
| 885 | 887 | { |
| 886 | 888 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 887 | − struct peri_clk_data *data = bcm_clk->peri; | |
| 889 | + struct peri_clk_data *data = bcm_clk->u.peri; | |
| 888 | 890 | u8 index; |
| 889 | 891 | |
| 890 | 892 | index = selector_read_index(bcm_clk->ccu, &data->sel); |
| @@ -897,7 +899,7 @@ static int kona_peri_clk_set_rate(struct clk_hw *hw, unsigned long rate, · 6 unmodified lines | ||
| 897 | 899 | unsigned long parent_rate) |
| 898 | 900 | { |
| 899 | 901 | struct kona_clk *bcm_clk = to_kona_clk(hw); |
| 900 | − struct peri_clk_data *data = bcm_clk->peri; | |
| 902 | + struct peri_clk_data *data = bcm_clk->u.peri; | |
| 901 | 903 | struct bcm_clk_div *div = &data->div; |
| 902 | 904 | u64 scaled_div = 0; |
| 903 | 905 | int ret; |
| @@ -958,7 +960,7 @@ struct clk_ops kona_peri_clk_ops = { · 54 unmodified lines | ||
| 958 | 960 | static bool __peri_clk_init(struct kona_clk *bcm_clk) |
| 959 | 961 | { |
| 960 | 962 | struct ccu_data *ccu = bcm_clk->ccu; |
| 961 | − struct peri_clk_data *peri = bcm_clk->peri; | |
| 963 | + struct peri_clk_data *peri = bcm_clk->u.peri; | |
| 962 | 964 | const char *name = bcm_clk->name; |
| 963 | 965 | struct bcm_clk_trig *trig; |
| 964 | 966 | |
| @@ -57,7 +57,7 @@ · 56 unmodified lines | ||
| 57 | 57 | #define divider_exists(div) FLAG_TEST(div, DIV, EXISTS) |
| 58 | 58 | #define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED) |
| 59 | 59 | #define divider_has_fraction(div) (!divider_is_fixed(div) && \ |
| 60 | − (div)->frac_width > 0) | |
| 60 | + (div)->u.s.frac_width > 0) | |
| 61 | 61 | |
| 62 | 62 | #define selector_exists(sel) ((sel)->width != 0) |
| 63 | 63 | #define trigger_exists(trig) FLAG_TEST(trig, TRIG, EXISTS) |
| @@ -244,9 +244,9 @@ struct bcm_clk_div { · 180 unmodified lines | ||
| 244 | 244 | u32 frac_width; /* field fraction width */ |
| 245 | 245 | |
| 246 | 246 | u64 scaled_div; /* scaled divider value */ |
| 247 | − }; | |
| 247 | + } s; | |
| 248 | 248 | u32 fixed; /* non-zero fixed divider value */ |
| 249 | − }; | |
| 249 | + } u; | |
| 250 | 250 | u32 flags; /* BCM_CLK_DIV_FLAGS_* below */ |
| 251 | 251 | }; |
| 252 | 252 | |
| @@ -263,28 +263,28 @@ struct bcm_clk_div { · 10 unmodified lines | ||
| 263 | 263 | /* A fixed (non-zero) divider */ |
| 264 | 264 | #define FIXED_DIVIDER(_value) \ |
| 265 | 265 | { \ |
| 266 | − .fixed = (_value), \ | |
| 266 | + .u.fixed = (_value), \ | |
| 267 | 267 | .flags = FLAG(DIV, EXISTS)|FLAG(DIV, FIXED), \ |
| 268 | 268 | } |
| 269 | 269 | |
| 270 | 270 | /* A divider with an integral divisor */ |
| 271 | 271 | #define DIVIDER(_offset, _shift, _width) \ |
| 272 | 272 | { \ |
| 273 | − .offset = (_offset), \ | |
| 274 | − .shift = (_shift), \ | |
| 275 | − .width = (_width), \ | |
| 276 | − .scaled_div = BAD_SCALED_DIV_VALUE, \ | |
| 273 | + .u.s.offset = (_offset), \ | |
| 274 | + .u.s.shift = (_shift), \ | |
| 275 | + .u.s.width = (_width), \ | |
| 276 | + .u.s.scaled_div = BAD_SCALED_DIV_VALUE, \ | |
| 277 | 277 | .flags = FLAG(DIV, EXISTS), \ |
| 278 | 278 | } |
| 279 | 279 | |
| 280 | 280 | /* A divider whose divisor has an integer and fractional part */ |
| 281 | 281 | #define FRAC_DIVIDER(_offset, _shift, _width, _frac_width) \ |
| 282 | 282 | { \ |
| 283 | − .offset = (_offset), \ | |
| 284 | − .shift = (_shift), \ | |
| 285 | − .width = (_width), \ | |
| 286 | − .frac_width = (_frac_width), \ | |
| 287 | − .scaled_div = BAD_SCALED_DIV_VALUE, \ | |
| 283 | + .u.s.offset = (_offset), \ | |
| 284 | + .u.s.shift = (_shift), \ | |
| 285 | + .u.s.width = (_width), \ | |
| 286 | + .u.s.frac_width = (_frac_width), \ | |
| 287 | + .u.s.scaled_div = BAD_SCALED_DIV_VALUE, \ | |
| 288 | 288 | .flags = FLAG(DIV, EXISTS), \ |
| 289 | 289 | } |
| 290 | 290 | |
| @@ -380,7 +380,7 @@ struct kona_clk { · 89 unmodified lines | ||
| 380 | 380 | union { |
| 381 | 381 | void *data; |
| 382 | 382 | struct peri_clk_data *peri; |
| 383 | − }; | |
| 383 | + } u; | |
| 384 | 384 | }; |
| 385 | 385 | #define to_kona_clk(_hw) \ |
| 386 | 386 | container_of(_hw, struct kona_clk, hw) |
| @@ -144,6 +144,37 @@ static bool _is_valid_div(struct clk_divider *divider, unsigned int div) · 143 unmodified lines | ||
| 144 | 144 | return true; |
| 145 | 145 | } |
| 146 | 146 | |
| 147 | +static int _round_up_table(const struct clk_div_table *table, int div) | |
| 148 | +{ | |
| 149 | + const struct clk_div_table *clkt; | |
| 150 | + int up = INT_MAX; | |
| 151 | + | |
| 152 | + for (clkt = table; clkt->div; clkt++) { | |
| 153 | + if (clkt->div == div) | |
| 154 | + return clkt->div; | |
| 155 | + else if (clkt->div < div) | |
| 156 | + continue; | |
| 157 | + | |
| 158 | + if ((clkt->div - div) < (up - div)) | |
| 159 | + up = clkt->div; | |
| 160 | + } | |
| 161 | + | |
| 162 | + return up; | |
| 163 | +} | |
| 164 | + | |
| 165 | +static int _div_round_up(struct clk_divider *divider, | |
| 166 | + unsigned long parent_rate, unsigned long rate) | |
| 167 | +{ | |
| 168 | + int div = DIV_ROUND_UP(parent_rate, rate); | |
| 169 | + | |
| 170 | + if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) | |
| 171 | + div = __roundup_pow_of_two(div); | |
| 172 | + if (divider->table) | |
| 173 | + div = _round_up_table(divider->table, div); | |
| 174 | + | |
| 175 | + return div; | |
| 176 | +} | |
| 177 | + | |
| 147 | 178 | static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, |
| 148 | 179 | unsigned long *best_parent_rate) |
| 149 | 180 | { |
| @@ -159,7 +190,7 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, · 9 unmodified lines | ||
| 159 | 190 | |
| 160 | 191 | if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) { |
| 161 | 192 | parent_rate = *best_parent_rate; |
| 162 | − bestdiv = DIV_ROUND_UP(parent_rate, rate); | |
| 193 | + bestdiv = _div_round_up(divider, parent_rate, rate); | |
| 163 | 194 | bestdiv = bestdiv == 0 ? 1 : bestdiv; |
| 164 | 195 | bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv; |
| 165 | 196 | return bestdiv; |
| @@ -219,6 +250,10 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, · 53 unmodified lines | ||
| 219 | 250 | u32 val; |
| 220 | 251 | |
| 221 | 252 | div = DIV_ROUND_UP(parent_rate, rate); |
| 253 | + | |
| 254 | + if (!_is_valid_div(divider, div)) | |
| 255 | + return -EINVAL; | |
| 256 | + | |
| 222 | 257 | value = _get_val(divider, div); |
| 223 | 258 | |
| 224 | 259 | if (value > div_mask(divider)) |
| @@ -1984,9 +1984,28 @@ struct clk *__clk_register(struct device *dev, struct clk_hw *hw) · 1983 unmodified lines | ||
| 1984 | 1984 | } |
| 1985 | 1985 | EXPORT_SYMBOL_GPL(__clk_register); |
| 1986 | 1986 | |
| 1987 | −static int _clk_register(struct device *dev, struct clk_hw *hw, struct clk *clk) | |
| 1987 | +/** | |
| 1988 | + * clk_register - allocate a new clock, register it and return an opaque cookie | |
| 1989 | + * @dev: device that is registering this clock | |
| 1990 | + * @hw: link to hardware-specific clock data | |
| 1991 | + * | |
| 1992 | + * clk_register is the primary interface for populating the clock tree with new | |
| 1993 | + * clock nodes. It returns a pointer to the newly allocated struct clk which | |
| 1994 | + * cannot be dereferenced by driver code but may be used in conjuction with the | |
| 1995 | + * rest of the clock API. In the event of an error clk_register will return an | |
| 1996 | + * error code; drivers must test for an error code after calling clk_register. | |
| 1997 | + */ | |
| 1998 | +struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
| 1988 | 1999 | { |
| 1989 | 2000 | int i, ret; |
| 2001 | + struct clk *clk; | |
| 2002 | + | |
| 2003 | + clk = kzalloc(sizeof(*clk), GFP_KERNEL); | |
| 2004 | + if (!clk) { | |
| 2005 | + pr_err("%s: could not allocate clk\n", __func__); | |
| 2006 | + ret = -ENOMEM; | |
| 2007 | + goto fail_out; | |
| 2008 | + } | |
| 1990 | 2009 | |
| 1991 | 2010 | clk->name = kstrdup(hw->init->name, GFP_KERNEL); |
| 1992 | 2011 | if (!clk->name) { |
| @@ -2026,7 +2045,7 @@ static int _clk_register(struct device *dev, struct clk_hw *hw, struct clk *clk) · 33 unmodified lines | ||
| 2026 | 2045 | |
| 2027 | 2046 | ret = __clk_init(dev, clk); |
| 2028 | 2047 | if (!ret) |
| 2029 | − return 0; | |
| 2048 | + return clk; | |
| 2030 | 2049 | |
| 2031 | 2050 | fail_parent_names_copy: |
| 2032 | 2051 | while (--i >= 0) |
| @@ -2035,36 +2054,6 @@ fail_parent_names_copy: · 2 unmodified lines | ||
| 2035 | 2054 | fail_parent_names: |
| 2036 | 2055 | kfree(clk->name); |
| 2037 | 2056 | fail_name: |
| 2038 | − return ret; | |
| 2039 | −} | |
| 2040 | − | |
| 2041 | −/** | |
| 2042 | − * clk_register - allocate a new clock, register it and return an opaque cookie | |
| 2043 | − * @dev: device that is registering this clock | |
| 2044 | − * @hw: link to hardware-specific clock data | |
| 2045 | − * | |
| 2046 | − * clk_register is the primary interface for populating the clock tree with new | |
| 2047 | − * clock nodes. It returns a pointer to the newly allocated struct clk which | |
| 2048 | − * cannot be dereferenced by driver code but may be used in conjuction with the | |
| 2049 | − * rest of the clock API. In the event of an error clk_register will return an | |
| 2050 | − * error code; drivers must test for an error code after calling clk_register. | |
| 2051 | − */ | |
| 2052 | −struct clk *clk_register(struct device *dev, struct clk_hw *hw) | |
| 2053 | −{ | |
| 2054 | − int ret; | |
| 2055 | − struct clk *clk; | |
| 2056 | − | |
| 2057 | − clk = kzalloc(sizeof(*clk), GFP_KERNEL); | |
| 2058 | − if (!clk) { | |
| 2059 | − pr_err("%s: could not allocate clk\n", __func__); | |
| 2060 | − ret = -ENOMEM; | |
| 2061 | − goto fail_out; | |
| 2062 | − } | |
| 2063 | − | |
| 2064 | − ret = _clk_register(dev, hw, clk); | |
| 2065 | − if (!ret) | |
| 2066 | − return clk; | |
| 2067 | − | |
| 2068 | 2057 | kfree(clk); |
| 2069 | 2058 | fail_out: |
| 2070 | 2059 | return ERR_PTR(ret); |
| @@ -2151,9 +2140,10 @@ void clk_unregister(struct clk *clk) · 80 unmodified lines | ||
| 2151 | 2140 | |
| 2152 | 2141 | if (!hlist_empty(&clk->children)) { |
| 2153 | 2142 | struct clk *child; |
| 2143 | + struct hlist_node *t; | |
| 2154 | 2144 | |
| 2155 | 2145 | /* Reparent all children to the orphan list. */ |
| 2156 | − hlist_for_each_entry(child, &clk->children, child_node) | |
| 2146 | + hlist_for_each_entry_safe(child, t, &clk->children, child_node) | |
| 2157 | 2147 | clk_set_parent(child, NULL); |
| 2158 | 2148 | } |
| 2159 | 2149 | |
| @@ -2173,7 +2163,7 @@ EXPORT_SYMBOL_GPL(clk_unregister); · 13 unmodified lines | ||
| 2173 | 2163 | |
| 2174 | 2164 | static void devm_clk_release(struct device *dev, void *res) |
| 2175 | 2165 | { |
| 2176 | − clk_unregister(res); | |
| 2166 | + clk_unregister(*(struct clk **)res); | |
| 2177 | 2167 | } |
| 2178 | 2168 | |
| 2179 | 2169 | /** |
| @@ -2188,18 +2178,18 @@ static void devm_clk_release(struct device *dev, void *res) · 8 unmodified lines | ||
| 2188 | 2178 | struct clk *devm_clk_register(struct device *dev, struct clk_hw *hw) |
| 2189 | 2179 | { |
| 2190 | 2180 | struct clk *clk; |
| 2191 | − int ret; | |
| 2181 | + struct clk **clkp; | |
| 2192 | 2182 | |
| 2193 | − clk = devres_alloc(devm_clk_release, sizeof(*clk), GFP_KERNEL); | |
| 2194 | − if (!clk) | |
| 2183 | + clkp = devres_alloc(devm_clk_release, sizeof(*clkp), GFP_KERNEL); | |
| 2184 | + if (!clkp) | |
| 2195 | 2185 | return ERR_PTR(-ENOMEM); |
| 2196 | 2186 | |
| 2197 | − ret = _clk_register(dev, hw, clk); | |
| 2198 | − if (!ret) { | |
| 2199 | − devres_add(dev, clk); | |
| 2187 | + clk = clk_register(dev, hw); | |
| 2188 | + if (!IS_ERR(clk)) { | |
| 2189 | + *clkp = clk; | |
| 2190 | + devres_add(dev, clkp); | |
| 2200 | 2191 | } else { |
| 2201 | − devres_free(clk); | |
| 2202 | − clk = ERR_PTR(ret); | |
| 2192 | + devres_free(clkp); | |
| 2203 | 2193 | } |
| 2204 | 2194 | |
| 2205 | 2195 | return clk; |
| @@ -156,6 +156,7 @@ cpg_mstp_clock_register(const char *name, const char *parent_name, · 155 unmodified lines | ||
| 156 | 156 | static void __init cpg_mstp_clocks_init(struct device_node *np) |
| 157 | 157 | { |
| 158 | 158 | struct mstp_clock_group *group; |
| 159 | + const char *idxname; | |
| 159 | 160 | struct clk **clks; |
| 160 | 161 | unsigned int i; |
| 161 | 162 | |
| @@ -184,6 +185,11 @@ static void __init cpg_mstp_clocks_init(struct device_node *np) · 22 unmodified lines | ||
| 184 | 185 | for (i = 0; i < MSTP_MAX_CLOCKS; ++i) |
| 185 | 186 | clks[i] = ERR_PTR(-ENOENT); |
| 186 | 187 | |
| 188 | + if (of_find_property(np, "clock-indices", &i)) | |
| 189 | + idxname = "clock-indices"; | |
| 190 | + else | |
| 191 | + idxname = "renesas,clock-indices"; | |
| 192 | + | |
| 187 | 193 | for (i = 0; i < MSTP_MAX_CLOCKS; ++i) { |
| 188 | 194 | const char *parent_name; |
| 189 | 195 | const char *name; |
| @@ -197,8 +203,7 @@ static void __init cpg_mstp_clocks_init(struct device_node *np) · 7 unmodified lines | ||
| 197 | 203 | continue; |
| 198 | 204 | |
| 199 | 205 | parent_name = of_clk_get_parent_name(np, i); |
| 200 | − ret = of_property_read_u32_index(np, "renesas,clock-indices", i, | |
| 201 | − &clkidx); | |
| 206 | + ret = of_property_read_u32_index(np, idxname, i, &clkidx); | |
| 202 | 207 | if (parent_name == NULL || ret < 0) |
| 203 | 208 | break; |
| 204 | 209 | |
| @@ -20,6 +20,7 @@ · 19 unmodified lines | ||
| 20 | 20 | #include <linux/clk-provider.h> |
| 21 | 21 | #include <linux/io.h> |
| 22 | 22 | #include <linux/of.h> |
| 23 | +#include <linux/of_address.h> | |
| 23 | 24 | |
| 24 | 25 | #include "clk.h" |
| 25 | 26 | |
| @@ -43,6 +44,8 @@ · 17 unmodified lines | ||
| 43 | 44 | |
| 44 | 45 | #define to_socfpga_clk(p) container_of(p, struct socfpga_pll, hw.hw) |
| 45 | 46 | |
| 47 | +void __iomem *clk_mgr_base_addr; | |
| 48 | + | |
| 46 | 49 | static unsigned long clk_pll_recalc_rate(struct clk_hw *hwclk, |
| 47 | 50 | unsigned long parent_rate) |
| 48 | 51 | { |
| @@ -87,6 +90,7 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node, · 38 unmodified lines | ||
| 87 | 90 | const char *clk_name = node->name; |
| 88 | 91 | const char *parent_name[SOCFPGA_MAX_PARENTS]; |
| 89 | 92 | struct clk_init_data init; |
| 93 | + struct device_node *clkmgr_np; | |
| 90 | 94 | int rc; |
| 91 | 95 | int i = 0; |
| 92 | 96 | |
| @@ -96,6 +100,9 @@ static __init struct clk *__socfpga_pll_init(struct device_node *node, · 3 unmodified lines | ||
| 96 | 100 | if (WARN_ON(!pll_clk)) |
| 97 | 101 | return NULL; |
| 98 | 102 | |
| 103 | + clkmgr_np = of_find_compatible_node(NULL, NULL, "altr,clk-mgr"); | |
| 104 | + clk_mgr_base_addr = of_iomap(clkmgr_np, 0); | |
| 105 | + BUG_ON(!clk_mgr_base_addr); | |
| 99 | 106 | pll_clk->hw.reg = clk_mgr_base_addr + reg; |
| 100 | 107 | |
| 101 | 108 | of_property_read_string(node, "clock-output-names", &clk_name); |
| @@ -17,28 +17,11 @@ · 16 unmodified lines | ||
| 17 | 17 | * You should have received a copy of the GNU General Public License |
| 18 | 18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 19 | 19 | */ |
| 20 | −#include <linux/clk.h> | |
| 21 | −#include <linux/clkdev.h> | |
| 22 | −#include <linux/clk-provider.h> | |
| 23 | −#include <linux/io.h> | |
| 24 | 20 | #include <linux/of.h> |
| 25 | −#include <linux/of_address.h> | |
| 26 | 21 | |
| 27 | 22 | #include "clk.h" |
| 28 | 23 | |
| 29 | −void __iomem *clk_mgr_base_addr; | |
| 30 | − | |
| 31 | −static const struct of_device_id socfpga_child_clocks[] __initconst = { | |
| 32 | − { .compatible = "altr,socfpga-pll-clock", socfpga_pll_init, }, | |
| 33 | − { .compatible = "altr,socfpga-perip-clk", socfpga_periph_init, }, | |
| 34 | − { .compatible = "altr,socfpga-gate-clk", socfpga_gate_init, }, | |
| 35 | − {}, | |
| 36 | −}; | |
| 37 | − | |
| 38 | −static void __init socfpga_clkmgr_init(struct device_node *node) | |
| 39 | −{ | |
| 40 | − clk_mgr_base_addr = of_iomap(node, 0); | |
| 41 | − of_clk_init(socfpga_child_clocks); | |
| 42 | −} | |
| 43 | −CLK_OF_DECLARE(socfpga_mgr, "altr,clk-mgr", socfpga_clkmgr_init); | |
| 24 | +CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init); | |
| 25 | +CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init); | |
| 26 | +CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init); | |
| 44 | 27 | |
| @@ -521,8 +521,10 @@ static struct clk * __init clkgen_odf_register(const char *parent_name, · 520 unmodified lines | ||
| 521 | 521 | gate->lock = odf_lock; |
| 522 | 522 | |
| 523 | 523 | div = kzalloc(sizeof(*div), GFP_KERNEL); |
| 524 | − if (!div) | |
| 524 | + if (!div) { | |
| 525 | + kfree(gate); | |
| 525 | 526 | return ERR_PTR(-ENOMEM); |
| 527 | + } | |
| 526 | 528 | |
| 527 | 529 | div->flags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO; |
| 528 | 530 | div->reg = reg + pll_data->odf[odf].offset; |
| @@ -58,9 +58,9 @@ · 57 unmodified lines | ||
| 58 | 58 | #define PLLDU_LFCON_SET_DIVN 600 |
| 59 | 59 | |
| 60 | 60 | #define PLLE_BASE_DIVCML_SHIFT 24 |
| 61 | −#define PLLE_BASE_DIVCML_WIDTH 4 | |
| 61 | +#define PLLE_BASE_DIVCML_MASK 0xf | |
| 62 | 62 | #define PLLE_BASE_DIVP_SHIFT 16 |
| 63 | −#define PLLE_BASE_DIVP_WIDTH 7 | |
| 63 | +#define PLLE_BASE_DIVP_WIDTH 6 | |
| 64 | 64 | #define PLLE_BASE_DIVN_SHIFT 8 |
| 65 | 65 | #define PLLE_BASE_DIVN_WIDTH 8 |
| 66 | 66 | #define PLLE_BASE_DIVM_SHIFT 0 |
| @@ -183,6 +183,14 @@ · 116 unmodified lines | ||
| 183 | 183 | #define divp_mask(p) (p->params->flags & TEGRA_PLLU ? PLLU_POST_DIVP_MASK :\ |
| 184 | 184 | mask(p->params->div_nmp->divp_width)) |
| 185 | 185 | |
| 186 | +#define divm_shift(p) (p)->params->div_nmp->divm_shift | |
| 187 | +#define divn_shift(p) (p)->params->div_nmp->divn_shift | |
| 188 | +#define divp_shift(p) (p)->params->div_nmp->divp_shift | |
| 189 | + | |
| 190 | +#define divm_mask_shifted(p) (divm_mask(p) << divm_shift(p)) | |
| 191 | +#define divn_mask_shifted(p) (divn_mask(p) << divn_shift(p)) | |
| 192 | +#define divp_mask_shifted(p) (divp_mask(p) << divp_shift(p)) | |
| 193 | + | |
| 186 | 194 | #define divm_max(p) (divm_mask(p)) |
| 187 | 195 | #define divn_max(p) (divn_mask(p)) |
| 188 | 196 | #define divp_max(p) (1 << (divp_mask(p))) |
| @@ -476,13 +484,12 @@ static void _update_pll_mnp(struct tegra_clk_pll *pll, · 287 unmodified lines | ||
| 476 | 484 | } else { |
| 477 | 485 | val = pll_readl_base(pll); |
| 478 | 486 | |
| 479 | − val &= ~((divm_mask(pll) << div_nmp->divm_shift) | | |
| 480 | − (divn_mask(pll) << div_nmp->divn_shift) | | |
| 481 | − (divp_mask(pll) << div_nmp->divp_shift)); | |
| 487 | + val &= ~(divm_mask_shifted(pll) | divn_mask_shifted(pll) | | |
| 488 | + divp_mask_shifted(pll)); | |
| 482 | 489 | |
| 483 | − val |= ((cfg->m << div_nmp->divm_shift) | | |
| 484 | − (cfg->n << div_nmp->divn_shift) | | |
| 485 | − (cfg->p << div_nmp->divp_shift)); | |
| 490 | + val |= (cfg->m << divm_shift(pll)) | | |
| 491 | + (cfg->n << divn_shift(pll)) | | |
| 492 | + (cfg->p << divp_shift(pll)); | |
| 486 | 493 | |
| 487 | 494 | pll_writel_base(val, pll); |
| 488 | 495 | } |
| @@ -730,11 +737,12 @@ static int clk_plle_enable(struct clk_hw *hw) · 241 unmodified lines | ||
| 730 | 737 | if (pll->params->flags & TEGRA_PLLE_CONFIGURE) { |
| 731 | 738 | /* configure dividers */ |
| 732 | 739 | val = pll_readl_base(pll); |
| 733 | − val &= ~(divm_mask(pll) | divn_mask(pll) | divp_mask(pll)); | |
| 734 | − val &= ~(PLLE_BASE_DIVCML_WIDTH << PLLE_BASE_DIVCML_SHIFT); | |
| 735 | − val |= sel.m << pll->params->div_nmp->divm_shift; | |
| 736 | − val |= sel.n << pll->params->div_nmp->divn_shift; | |
| 737 | − val |= sel.p << pll->params->div_nmp->divp_shift; | |
| 740 | + val &= ~(divp_mask_shifted(pll) | divn_mask_shifted(pll) | | |
| 741 | + divm_mask_shifted(pll)); | |
| 742 | + val &= ~(PLLE_BASE_DIVCML_MASK << PLLE_BASE_DIVCML_SHIFT); | |
| 743 | + val |= sel.m << divm_shift(pll); | |
| 744 | + val |= sel.n << divn_shift(pll); | |
| 745 | + val |= sel.p << divp_shift(pll); | |
| 738 | 746 | val |= sel.cpcon << PLLE_BASE_DIVCML_SHIFT; |
| 739 | 747 | pll_writel_base(val, pll); |
| 740 | 748 | } |
| @@ -745,10 +753,11 @@ static int clk_plle_enable(struct clk_hw *hw) · 4 unmodified lines | ||
| 745 | 753 | pll_writel_misc(val, pll); |
| 746 | 754 | |
| 747 | 755 | val = readl(pll->clk_base + PLLE_SS_CTRL); |
| 756 | + val &= ~PLLE_SS_COEFFICIENTS_MASK; | |
| 748 | 757 | val |= PLLE_SS_DISABLE; |
| 749 | 758 | writel(val, pll->clk_base + PLLE_SS_CTRL); |
| 750 | 759 | |
| 751 | − val |= pll_readl_base(pll); | |
| 760 | + val = pll_readl_base(pll); | |
| 752 | 761 | val |= (PLL_BASE_BYPASS | PLL_BASE_ENABLE); |
| 753 | 762 | pll_writel_base(val, pll); |
| 754 | 763 | |
| @@ -1292,10 +1301,11 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw) · 537 unmodified lines | ||
| 1292 | 1301 | pll_writel(val, PLLE_SS_CTRL, pll); |
| 1293 | 1302 | |
| 1294 | 1303 | val = pll_readl_base(pll); |
| 1295 | − val &= ~(divm_mask(pll) | divn_mask(pll) | divp_mask(pll)); | |
| 1296 | − val &= ~(PLLE_BASE_DIVCML_WIDTH << PLLE_BASE_DIVCML_SHIFT); | |
| 1297 | − val |= sel.m << pll->params->div_nmp->divm_shift; | |
| 1298 | − val |= sel.n << pll->params->div_nmp->divn_shift; | |
| 1304 | + val &= ~(divp_mask_shifted(pll) | divn_mask_shifted(pll) | | |
| 1305 | + divm_mask_shifted(pll)); | |
| 1306 | + val &= ~(PLLE_BASE_DIVCML_MASK << PLLE_BASE_DIVCML_SHIFT); | |
| 1307 | + val |= sel.m << divm_shift(pll); | |
| 1308 | + val |= sel.n << divn_shift(pll); | |
| 1299 | 1309 | val |= sel.cpcon << PLLE_BASE_DIVCML_SHIFT; |
| 1300 | 1310 | pll_writel_base(val, pll); |
| 1301 | 1311 | udelay(1); |
| @@ -1410,6 +1420,15 @@ struct clk *tegra_clk_register_pll(const char *name, const char *parent_name, · 108 unmodified lines | ||
| 1410 | 1420 | return clk; |
| 1411 | 1421 | } |
| 1412 | 1422 | |
| 1423 | +static struct div_nmp pll_e_nmp = { | |
| 1424 | + .divn_shift = PLLE_BASE_DIVN_SHIFT, | |
| 1425 | + .divn_width = PLLE_BASE_DIVN_WIDTH, | |
| 1426 | + .divm_shift = PLLE_BASE_DIVM_SHIFT, | |
| 1427 | + .divm_width = PLLE_BASE_DIVM_WIDTH, | |
| 1428 | + .divp_shift = PLLE_BASE_DIVP_SHIFT, | |
| 1429 | + .divp_width = PLLE_BASE_DIVP_WIDTH, | |
| 1430 | +}; | |
| 1431 | + | |
| 1413 | 1432 | struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, |
| 1414 | 1433 | void __iomem *clk_base, void __iomem *pmc, |
| 1415 | 1434 | unsigned long flags, struct tegra_clk_pll_params *pll_params, |
| @@ -1420,6 +1439,10 @@ struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, · 4 unmodified lines | ||
| 1420 | 1439 | |
| 1421 | 1440 | pll_params->flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS; |
| 1422 | 1441 | pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE; |
| 1442 | + | |
| 1443 | + if (!pll_params->div_nmp) | |
| 1444 | + pll_params->div_nmp = &pll_e_nmp; | |
| 1445 | + | |
| 1423 | 1446 | pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); |
| 1424 | 1447 | if (IS_ERR(pll)) |
| 1425 | 1448 | return ERR_CAST(pll); |
| @@ -1557,9 +1580,8 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, · 131 unmodified lines | ||
| 1557 | 1580 | int m; |
| 1558 | 1581 | |
| 1559 | 1582 | m = _pll_fixed_mdiv(pll_params, parent_rate); |
| 1560 | − val = m << PLL_BASE_DIVM_SHIFT; | |
| 1561 | − val |= (pll_params->vco_min / parent_rate) | |
| 1562 | − << PLL_BASE_DIVN_SHIFT; | |
| 1583 | + val = m << divm_shift(pll); | |
| 1584 | + val |= (pll_params->vco_min / parent_rate) << divn_shift(pll); | |
| 1563 | 1585 | pll_writel_base(val, pll); |
| 1564 | 1586 | } |
| 1565 | 1587 | |
| @@ -1718,7 +1740,7 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name, · 152 unmodified lines | ||
| 1718 | 1740 | "pll_re_vco"); |
| 1719 | 1741 | } else { |
| 1720 | 1742 | val_aux &= ~(PLLE_AUX_PLLRE_SEL | PLLE_AUX_PLLP_SEL); |
| 1721 | − pll_writel(val, pll_params->aux_reg, pll); | |
| 1743 | + pll_writel(val_aux, pll_params->aux_reg, pll); | |
| 1722 | 1744 | } |
| 1723 | 1745 | |
| 1724 | 1746 | clk = _tegra_clk_register_pll(pll, name, parent_name, flags, |
| @@ -100,7 +100,7 @@ static void tc_mode(enum clock_event_mode m, struct clock_event_device *d) · 99 unmodified lines | ||
| 100 | 100 | || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) { |
| 101 | 101 | __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR)); |
| 102 | 102 | __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR)); |
| 103 | − clk_disable_unprepare(tcd->clk); | |
| 103 | + clk_disable(tcd->clk); | |
| 104 | 104 | } |
| 105 | 105 | |
| 106 | 106 | switch (m) { |
| @@ -109,7 +109,7 @@ static void tc_mode(enum clock_event_mode m, struct clock_event_device *d) · 2 unmodified lines | ||
| 109 | 109 | * of oneshot, we get lower overhead and improved accuracy. |
| 110 | 110 | */ |
| 111 | 111 | case CLOCK_EVT_MODE_PERIODIC: |
| 112 | − clk_prepare_enable(tcd->clk); | |
| 112 | + clk_enable(tcd->clk); | |
| 113 | 113 | |
| 114 | 114 | /* slow clock, count up to RC, then irq and restart */ |
| 115 | 115 | __raw_writel(timer_clock |
| @@ -126,7 +126,7 @@ static void tc_mode(enum clock_event_mode m, struct clock_event_device *d) · 10 unmodified lines | ||
| 126 | 126 | break; |
| 127 | 127 | |
| 128 | 128 | case CLOCK_EVT_MODE_ONESHOT: |
| 129 | − clk_prepare_enable(tcd->clk); | |
| 129 | + clk_enable(tcd->clk); | |
| 130 | 130 | |
| 131 | 131 | /* slow clock, count up to RC, then irq and stop */ |
| 132 | 132 | __raw_writel(timer_clock | ATMEL_TC_CPCSTOP |
| @@ -194,7 +194,7 @@ static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) · 61 unmodified lines | ||
| 194 | 194 | ret = clk_prepare_enable(t2_clk); |
| 195 | 195 | if (ret) |
| 196 | 196 | return ret; |
| 197 | − clk_disable_unprepare(t2_clk); | |
| 197 | + clk_disable(t2_clk); | |
| 198 | 198 | |
| 199 | 199 | clkevt.regs = tc->regs; |
| 200 | 200 | clkevt.clk = t2_clk; |
| @@ -199,7 +199,7 @@ static int sirfsoc_local_timer_setup(struct clock_event_device *ce) · 198 unmodified lines | ||
| 199 | 199 | |
| 200 | 200 | action->dev_id = ce; |
| 201 | 201 | BUG_ON(setup_irq(ce->irq, action)); |
| 202 | − irq_set_affinity(action->irq, cpumask_of(cpu)); | |
| 202 | + irq_force_affinity(action->irq, cpumask_of(cpu)); | |
| 203 | 203 | |
| 204 | 204 | clockevents_register_device(ce); |
| 205 | 205 | return 0; |
| @@ -130,7 +130,7 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev) · 129 unmodified lines | ||
| 130 | 130 | return -ENOENT; |
| 131 | 131 | } |
| 132 | 132 | |
| 133 | − cpu_reg = devm_regulator_get_optional(cpu_dev, "cpu0"); | |
| 133 | + cpu_reg = regulator_get_optional(cpu_dev, "cpu0"); | |
| 134 | 134 | if (IS_ERR(cpu_reg)) { |
| 135 | 135 | /* |
| 136 | 136 | * If cpu0 regulator supply node is present, but regulator is |
| @@ -145,23 +145,23 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev) · 8 unmodified lines | ||
| 145 | 145 | PTR_ERR(cpu_reg)); |
| 146 | 146 | } |
| 147 | 147 | |
| 148 | − cpu_clk = devm_clk_get(cpu_dev, NULL); | |
| 148 | + cpu_clk = clk_get(cpu_dev, NULL); | |
| 149 | 149 | if (IS_ERR(cpu_clk)) { |
| 150 | 150 | ret = PTR_ERR(cpu_clk); |
| 151 | 151 | pr_err("failed to get cpu0 clock: %d\n", ret); |
| 152 | − goto out_put_node; | |
| 152 | + goto out_put_reg; | |
| 153 | 153 | } |
| 154 | 154 | |
| 155 | 155 | ret = of_init_opp_table(cpu_dev); |
| 156 | 156 | if (ret) { |
| 157 | 157 | pr_err("failed to init OPP table: %d\n", ret); |
| 158 | − goto out_put_node; | |
| 158 | + goto out_put_clk; | |
| 159 | 159 | } |
| 160 | 160 | |
| 161 | 161 | ret = dev_pm_opp_init_cpufreq_table(cpu_dev, &freq_table); |
| 162 | 162 | if (ret) { |
| 163 | 163 | pr_err("failed to init cpufreq table: %d\n", ret); |
| 164 | − goto out_put_node; | |
| 164 | + goto out_put_clk; | |
| 165 | 165 | } |
| 166 | 166 | |
| 167 | 167 | of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance); |
| @@ -216,6 +216,12 @@ static int cpu0_cpufreq_probe(struct platform_device *pdev) · 48 unmodified lines | ||
| 216 | 216 | |
| 217 | 217 | out_free_table: |
| 218 | 218 | dev_pm_opp_free_cpufreq_table(cpu_dev, &freq_table); |
| 219 | +out_put_clk: | |
| 220 | + if (!IS_ERR(cpu_clk)) | |
| 221 | + clk_put(cpu_clk); | |
| 222 | +out_put_reg: | |
| 223 | + if (!IS_ERR(cpu_reg)) | |
| 224 | + regulator_put(cpu_reg); | |
| 219 | 225 | out_put_node: |
| 220 | 226 | of_node_put(np); |
| 221 | 227 | return ret; |
| @@ -366,6 +366,11 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy, · 365 unmodified lines | ||
| 366 | 366 | break; |
| 367 | 367 | |
| 368 | 368 | case CPUFREQ_GOV_LIMITS: |
| 369 | + mutex_lock(&dbs_data->mutex); | |
| 370 | + if (!cpu_cdbs->cur_policy) { | |
| 371 | + mutex_unlock(&dbs_data->mutex); | |
| 372 | + break; | |
| 373 | + } | |
| 369 | 374 | mutex_lock(&cpu_cdbs->timer_mutex); |
| 370 | 375 | if (policy->max < cpu_cdbs->cur_policy->cur) |
| 371 | 376 | __cpufreq_driver_target(cpu_cdbs->cur_policy, |
| @@ -375,6 +380,7 @@ int cpufreq_governor_dbs(struct cpufreq_policy *policy, · 3 unmodified lines | ||
| 375 | 380 | policy->min, CPUFREQ_RELATION_L); |
| 376 | 381 | dbs_check_cpu(dbs_data, cpu); |
| 377 | 382 | mutex_unlock(&cpu_cdbs->timer_mutex); |
| 383 | + mutex_unlock(&dbs_data->mutex); | |
| 378 | 384 | break; |
| 379 | 385 | } |
| 380 | 386 | return 0; |
| @@ -37,6 +37,7 @@ · 36 unmodified lines | ||
| 37 | 37 | #define BYT_RATIOS 0x66a |
| 38 | 38 | #define BYT_VIDS 0x66b |
| 39 | 39 | #define BYT_TURBO_RATIOS 0x66c |
| 40 | +#define BYT_TURBO_VIDS 0x66d | |
| 40 | 41 | |
| 41 | 42 | |
| 42 | 43 | #define FRAC_BITS 6 |
| @@ -70,8 +71,9 @@ struct pstate_data { · 27 unmodified lines | ||
| 70 | 71 | }; |
| 71 | 72 | |
| 72 | 73 | struct vid_data { |
| 73 | − int32_t min; | |
| 74 | − int32_t max; | |
| 74 | + int min; | |
| 75 | + int max; | |
| 76 | + int turbo; | |
| 75 | 77 | int32_t ratio; |
| 76 | 78 | }; |
| 77 | 79 | |
| @@ -359,14 +361,14 @@ static int byt_get_min_pstate(void) · 281 unmodified lines | ||
| 359 | 361 | { |
| 360 | 362 | u64 value; |
| 361 | 363 | rdmsrl(BYT_RATIOS, value); |
| 362 | − return (value >> 8) & 0xFF; | |
| 364 | + return (value >> 8) & 0x3F; | |
| 363 | 365 | } |
| 364 | 366 | |
| 365 | 367 | static int byt_get_max_pstate(void) |
| 366 | 368 | { |
| 367 | 369 | u64 value; |
| 368 | 370 | rdmsrl(BYT_RATIOS, value); |
| 369 | − return (value >> 16) & 0xFF; | |
| 371 | + return (value >> 16) & 0x3F; | |
| 370 | 372 | } |
| 371 | 373 | |
| 372 | 374 | static int byt_get_turbo_pstate(void) |
| @@ -393,6 +395,9 @@ static void byt_set_pstate(struct cpudata *cpudata, int pstate) · 20 unmodified lines | ||
| 393 | 395 | vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max); |
| 394 | 396 | vid = fp_toint(vid_fp); |
| 395 | 397 | |
| 398 | + if (pstate > cpudata->pstate.max_pstate) | |
| 399 | + vid = cpudata->vid.turbo; | |
| 400 | + | |
| 396 | 401 | val |= vid; |
| 397 | 402 | |
| 398 | 403 | wrmsrl(MSR_IA32_PERF_CTL, val); |
| @@ -402,13 +407,17 @@ static void byt_get_vid(struct cpudata *cpudata) · 3 unmodified lines | ||
| 402 | 407 | { |
| 403 | 408 | u64 value; |
| 404 | 409 | |
| 410 | + | |
| 405 | 411 | rdmsrl(BYT_VIDS, value); |
| 406 | − cpudata->vid.min = int_tofp((value >> 8) & 0x7f); | |
| 407 | − cpudata->vid.max = int_tofp((value >> 16) & 0x7f); | |
| 412 | + cpudata->vid.min = int_tofp((value >> 8) & 0x3f); | |
| 413 | + cpudata->vid.max = int_tofp((value >> 16) & 0x3f); | |
| 408 | 414 | cpudata->vid.ratio = div_fp( |
| 409 | 415 | cpudata->vid.max - cpudata->vid.min, |
| 410 | 416 | int_tofp(cpudata->pstate.max_pstate - |
| 411 | 417 | cpudata->pstate.min_pstate)); |
| 418 | + | |
| 419 | + rdmsrl(BYT_TURBO_VIDS, value); | |
| 420 | + cpudata->vid.turbo = value & 0x7f; | |
| 412 | 421 | } |
| 413 | 422 | |
| 414 | 423 | |
| @@ -545,12 +554,7 @@ static void intel_pstate_get_cpu_pstates(struct cpudata *cpu) · 130 unmodified lines | ||
| 545 | 554 | |
| 546 | 555 | if (pstate_funcs.get_vid) |
| 547 | 556 | pstate_funcs.get_vid(cpu); |
| 548 | − | |
| 549 | − /* | |
| 550 | − * goto max pstate so we don't slow up boot if we are built-in if we are | |
| 551 | − * a module we will take care of it during normal operation | |
| 552 | − */ | |
| 553 | − intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); | |
| 557 | + intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate); | |
| 554 | 558 | } |
| 555 | 559 | |
| 556 | 560 | static inline void intel_pstate_calc_busy(struct cpudata *cpu, |
| @@ -695,11 +699,6 @@ static int intel_pstate_init_cpu(unsigned int cpunum) · 138 unmodified lines | ||
| 695 | 699 | cpu = all_cpu_data[cpunum]; |
| 696 | 700 | |
| 697 | 701 | intel_pstate_get_cpu_pstates(cpu); |
| 698 | − if (!cpu->pstate.current_pstate) { | |
| 699 | − all_cpu_data[cpunum] = NULL; | |
| 700 | − kfree(cpu); | |
| 701 | − return -ENODATA; | |
| 702 | − } | |
| 703 | 702 | |
| 704 | 703 | cpu->cpu = cpunum; |
| 705 | 704 | |
| @@ -710,7 +709,6 @@ static int intel_pstate_init_cpu(unsigned int cpunum) · 4 unmodified lines | ||
| 710 | 709 | cpu->timer.expires = jiffies + HZ/100; |
| 711 | 710 | intel_pstate_busy_pid_reset(cpu); |
| 712 | 711 | intel_pstate_sample(cpu); |
| 713 | − intel_pstate_set_pstate(cpu, cpu->pstate.max_pstate); | |
| 714 | 712 | |
| 715 | 713 | add_timer_on(&cpu->timer, cpunum); |
| 716 | 714 | |
| @@ -62,7 +62,7 @@ static int loongson2_cpufreq_target(struct cpufreq_policy *policy, · 61 unmodified lines | ||
| 62 | 62 | set_cpus_allowed_ptr(current, &cpus_allowed); |
| 63 | 63 | |
| 64 | 64 | /* setting the cpu frequency */ |
| 65 | − clk_set_rate(policy->clk, freq); | |
| 65 | + clk_set_rate(policy->clk, freq * 1000); | |
| 66 | 66 | |
| 67 | 67 | return 0; |
| 68 | 68 | } |
| @@ -92,7 +92,7 @@ static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy) · 23 unmodified lines | ||
| 92 | 92 | i++) |
| 93 | 93 | loongson2_clockmod_table[i].frequency = (rate * i) / 8; |
| 94 | 94 | |
| 95 | − ret = clk_set_rate(cpuclk, rate); | |
| 95 | + ret = clk_set_rate(cpuclk, rate * 1000); | |
| 96 | 96 | if (ret) { |
| 97 | 97 | clk_put(cpuclk); |
| 98 | 98 | return ret; |
| @@ -16,9 +16,13 @@ · 15 unmodified lines | ||
| 16 | 16 | char *tmp; \ |
| 17 | 17 | \ |
| 18 | 18 | tmp = kmalloc(sizeof(format) + max_alloc, GFP_ATOMIC); \ |
| 19 | − sprintf(tmp, format, param); \ | |
| 20 | − strcat(str, tmp); \ | |
| 21 | − kfree(tmp); \ | |
| 19 | + if (likely(tmp)) { \ | |
| 20 | + sprintf(tmp, format, param); \ | |
| 21 | + strcat(str, tmp); \ | |
| 22 | + kfree(tmp); \ | |
| 23 | + } else { \ | |
| 24 | + strcat(str, "kmalloc failure in SPRINTFCAT"); \ | |
| 25 | + } \ | |
| 22 | 26 | } |
| 23 | 27 | |
| 24 | 28 | static void report_jump_idx(u32 status, char *outstr) |
| @@ -1009,6 +1009,7 @@ static void dmaengine_unmap(struct kref *kref) · 1008 unmodified lines | ||
| 1009 | 1009 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1010 | 1010 | DMA_BIDIRECTIONAL); |
| 1011 | 1011 | } |
| 1012 | + cnt = unmap->map_cnt; | |
| 1012 | 1013 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); |
| 1013 | 1014 | } |
| 1014 | 1015 | |
| @@ -1074,6 +1075,7 @@ dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) · 59 unmodified lines | ||
| 1074 | 1075 | memset(unmap, 0, sizeof(*unmap)); |
| 1075 | 1076 | kref_init(&unmap->kref); |
| 1076 | 1077 | unmap->dev = dev; |
| 1078 | + unmap->map_cnt = nr; | |
| 1077 | 1079 | |
| 1078 | 1080 | return unmap; |
| 1079 | 1081 | } |
| @@ -1548,11 +1548,6 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) · 1547 unmodified lines | ||
| 1548 | 1548 | /* Disable BLOCK interrupts as well */ |
| 1549 | 1549 | channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); |
| 1550 | 1550 | |
| 1551 | − err = devm_request_irq(chip->dev, chip->irq, dw_dma_interrupt, | |
| 1552 | − IRQF_SHARED, "dw_dmac", dw); | |
| 1553 | − if (err) | |
| 1554 | − return err; | |
| 1555 | − | |
| 1556 | 1551 | /* Create a pool of consistent memory blocks for hardware descriptors */ |
| 1557 | 1552 | dw->desc_pool = dmam_pool_create("dw_dmac_desc_pool", chip->dev, |
| 1558 | 1553 | sizeof(struct dw_desc), 4, 0); |
| @@ -1563,6 +1558,11 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) · 4 unmodified lines | ||
| 1563 | 1558 | |
| 1564 | 1559 | tasklet_init(&dw->tasklet, dw_dma_tasklet, (unsigned long)dw); |
| 1565 | 1560 | |
| 1561 | + err = request_irq(chip->irq, dw_dma_interrupt, IRQF_SHARED, | |
| 1562 | + "dw_dmac", dw); | |
| 1563 | + if (err) | |
| 1564 | + return err; | |
| 1565 | + | |
| 1566 | 1566 | INIT_LIST_HEAD(&dw->dma.channels); |
| 1567 | 1567 | for (i = 0; i < nr_channels; i++) { |
| 1568 | 1568 | struct dw_dma_chan *dwc = &dw->chan[i]; |
| @@ -1667,6 +1667,7 @@ int dw_dma_remove(struct dw_dma_chip *chip) · 98 unmodified lines | ||
| 1667 | 1667 | dw_dma_off(dw); |
| 1668 | 1668 | dma_async_device_unregister(&dw->dma); |
| 1669 | 1669 | |
| 1670 | + free_irq(chip->irq, dw); | |
| 1670 | 1671 | tasklet_kill(&dw->tasklet); |
| 1671 | 1672 | |
| 1672 | 1673 | list_for_each_entry_safe(dwc, _dwc, &dw->dma.channels, |
| @@ -191,12 +191,10 @@ static void mv_set_mode(struct mv_xor_chan *chan, · 190 unmodified lines | ||
| 191 | 191 | |
| 192 | 192 | static void mv_chan_activate(struct mv_xor_chan *chan) |
| 193 | 193 | { |
| 194 | − u32 activation; | |
| 195 | − | |
| 196 | 194 | dev_dbg(mv_chan_to_devp(chan), " activate chan.\n"); |
| 197 | − activation = readl_relaxed(XOR_ACTIVATION(chan)); | |
| 198 | − activation |= 0x1; | |
| 199 | − writel_relaxed(activation, XOR_ACTIVATION(chan)); | |
| 195 | + | |
| 196 | + /* writel ensures all descriptors are flushed before activation */ | |
| 197 | + writel(BIT(0), XOR_ACTIVATION(chan)); | |
| 200 | 198 | } |
| 201 | 199 | |
| 202 | 200 | static char mv_chan_is_busy(struct mv_xor_chan *chan) |
| @@ -113,11 +113,9 @@ struct sa11x0_dma_phy { · 112 unmodified lines | ||
| 113 | 113 | struct sa11x0_dma_desc *txd_load; |
| 114 | 114 | unsigned sg_done; |
| 115 | 115 | struct sa11x0_dma_desc *txd_done; |
| 116 | −#ifdef CONFIG_PM_SLEEP | |
| 117 | 116 | u32 dbs[2]; |
| 118 | 117 | u32 dbt[2]; |
| 119 | 118 | u32 dcsr; |
| 120 | −#endif | |
| 121 | 119 | }; |
| 122 | 120 | |
| 123 | 121 | struct sa11x0_dma_dev { |
| @@ -984,7 +982,6 @@ static int sa11x0_dma_remove(struct platform_device *pdev) · 860 unmodified lines | ||
| 984 | 982 | return 0; |
| 985 | 983 | } |
| 986 | 984 | |
| 987 | −#ifdef CONFIG_PM_SLEEP | |
| 988 | 985 | static int sa11x0_dma_suspend(struct device *dev) |
| 989 | 986 | { |
| 990 | 987 | struct sa11x0_dma_dev *d = dev_get_drvdata(dev); |
| @@ -1054,7 +1051,6 @@ static int sa11x0_dma_resume(struct device *dev) · 63 unmodified lines | ||
| 1054 | 1051 | |
| 1055 | 1052 | return 0; |
| 1056 | 1053 | } |
| 1057 | −#endif | |
| 1058 | 1054 | |
| 1059 | 1055 | static const struct dev_pm_ops sa11x0_dma_pm_ops = { |
| 1060 | 1056 | .suspend_noirq = sa11x0_dma_suspend, |
| @@ -237,8 +237,8 @@ static inline bool is_next_generation(int new_generation, int old_generation) · 236 unmodified lines | ||
| 237 | 237 | |
| 238 | 238 | #define LOCAL_BUS 0xffc0 |
| 239 | 239 | |
| 240 | −/* arbitrarily chosen maximum range for physical DMA: 128 TB */ | |
| 241 | −#define FW_MAX_PHYSICAL_RANGE (128ULL << 40) | |
| 240 | +/* OHCI-1394's default upper bound for physical DMA: 4 GB */ | |
| 241 | +#define FW_MAX_PHYSICAL_RANGE (1ULL << 32) | |
| 242 | 242 | |
| 243 | 243 | void fw_core_handle_request(struct fw_card *card, struct fw_packet *request); |
| 244 | 244 | void fw_core_handle_response(struct fw_card *card, struct fw_packet *packet); |
| @@ -3716,7 +3716,7 @@ static int pci_probe(struct pci_dev *dev, · 3715 unmodified lines | ||
| 3716 | 3716 | version >> 16, version & 0xff, ohci->card.index, |
| 3717 | 3717 | ohci->n_ir, ohci->n_it, ohci->quirks, |
| 3718 | 3718 | reg_read(ohci, OHCI1394_PhyUpperBound) ? |
| 3719 | − ", >4 GB phys DMA" : ""); | |
| 3719 | + ", physUB" : ""); | |
| 3720 | 3720 | |
| 3721 | 3721 | return 0; |
| 3722 | 3722 | |
| @@ -756,6 +756,7 @@ static const struct { · 755 unmodified lines | ||
| 756 | 756 | */ |
| 757 | 757 | { ACPI_SIG_IBFT }, |
| 758 | 758 | { "iBFT" }, |
| 759 | + { "BIFT" }, /* Broadcom iSCSI Offload */ | |
| 759 | 760 | }; |
| 760 | 761 | |
| 761 | 762 | static void __init acpi_find_ibft_region(void) |
| @@ -305,6 +305,8 @@ static struct ichx_desc ich6_desc = { · 304 unmodified lines | ||
| 305 | 305 | |
| 306 | 306 | .ngpio = 50, |
| 307 | 307 | .have_blink = true, |
| 308 | + .regs = ichx_regs, | |
| 309 | + .reglen = ichx_reglen, | |
| 308 | 310 | }; |
| 309 | 311 | |
| 310 | 312 | /* Intel 3100 */ |
| @@ -324,6 +326,8 @@ static struct ichx_desc i3100_desc = { · 13 unmodified lines | ||
| 324 | 326 | .uses_gpe0 = true, |
| 325 | 327 | |
| 326 | 328 | .ngpio = 50, |
| 329 | + .regs = ichx_regs, | |
| 330 | + .reglen = ichx_reglen, | |
| 327 | 331 | }; |
| 328 | 332 | |
| 329 | 333 | /* ICH7 and ICH8-based */ |
| @@ -894,9 +894,11 @@ static int mcp23s08_probe(struct spi_device *spi) · 893 unmodified lines | ||
| 894 | 894 | dev_err(&spi->dev, "invalid spi-present-mask\n"); |
| 895 | 895 | return -ENODEV; |
| 896 | 896 | } |
| 897 | − | |
| 898 | − for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) | |
| 897 | + for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) { | |
| 898 | + if ((spi_present_mask & (1 << addr))) | |
| 899 | + chips++; | |
| 899 | 900 | pullups[addr] = 0; |
| 901 | + } | |
| 900 | 902 | } else { |
| 901 | 903 | type = spi_get_device_id(spi)->driver_data; |
| 902 | 904 | pdata = dev_get_platdata(&spi->dev); |
| @@ -919,12 +921,12 @@ static int mcp23s08_probe(struct spi_device *spi) · 16 unmodified lines | ||
| 919 | 921 | pullups[addr] = pdata->chip[addr].pullups; |
| 920 | 922 | } |
| 921 | 923 | |
| 922 | − if (!chips) | |
| 923 | − return -ENODEV; | |
| 924 | − | |
| 925 | 924 | base = pdata->base; |
| 926 | 925 | } |
| 927 | 926 | |
| 927 | + if (!chips) | |
| 928 | + return -ENODEV; | |
| 929 | + | |
| 928 | 930 | data = kzalloc(sizeof(*data) + chips * sizeof(struct mcp23s08), |
| 929 | 931 | GFP_KERNEL); |
| 930 | 932 | if (!data) |
| @@ -1833,7 +1833,6 @@ int i915_driver_unload(struct drm_device *dev) · 1832 unmodified lines | ||
| 1833 | 1833 | flush_workqueue(dev_priv->wq); |
| 1834 | 1834 | |
| 1835 | 1835 | mutex_lock(&dev->struct_mutex); |
| 1836 | − i915_gem_free_all_phys_object(dev); | |
| 1837 | 1836 | i915_gem_cleanup_ringbuffer(dev); |
| 1838 | 1837 | i915_gem_context_fini(dev); |
| 1839 | 1838 | WARN_ON(dev_priv->mm.aliasing_ppgtt); |
| @@ -242,18 +242,6 @@ struct intel_ddi_plls { · 241 unmodified lines | ||
| 242 | 242 | #define WATCH_LISTS 0 |
| 243 | 243 | #define WATCH_GTT 0 |
| 244 | 244 | |
| 245 | −#define I915_GEM_PHYS_CURSOR_0 1 | |
| 246 | −#define I915_GEM_PHYS_CURSOR_1 2 | |
| 247 | −#define I915_GEM_PHYS_OVERLAY_REGS 3 | |
| 248 | −#define I915_MAX_PHYS_OBJECT (I915_GEM_PHYS_OVERLAY_REGS) | |
| 249 | − | |
| 250 | −struct drm_i915_gem_phys_object { | |
| 251 | − int id; | |
| 252 | − struct page **page_list; | |
| 253 | − drm_dma_handle_t *handle; | |
| 254 | − struct drm_i915_gem_object *cur_obj; | |
| 255 | −}; | |
| 256 | − | |
| 257 | 245 | struct opregion_header; |
| 258 | 246 | struct opregion_acpi; |
| 259 | 247 | struct opregion_swsci; |
| @@ -1187,9 +1175,6 @@ struct i915_gem_mm { · 927 unmodified lines | ||
| 1187 | 1175 | /** Bit 6 swizzling required for Y tiling */ |
| 1188 | 1176 | uint32_t bit_6_swizzle_y; |
| 1189 | 1177 | |
| 1190 | − /* storage for physical objects */ | |
| 1191 | − struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; | |
| 1192 | − | |
| 1193 | 1178 | /* accounting, useful for userland debugging */ |
| 1194 | 1179 | spinlock_t object_stat_lock; |
| 1195 | 1180 | size_t object_memory; |
| @@ -1769,7 +1754,7 @@ struct drm_i915_gem_object { · 573 unmodified lines | ||
| 1769 | 1754 | struct drm_file *pin_filp; |
| 1770 | 1755 | |
| 1771 | 1756 | /** for phy allocated objects */ |
| 1772 | − struct drm_i915_gem_phys_object *phys_obj; | |
| 1757 | + drm_dma_handle_t *phys_handle; | |
| 1773 | 1758 | }; |
| 1774 | 1759 | |
| 1775 | 1760 | #define to_intel_bo(x) container_of(x, struct drm_i915_gem_object, base) |
| @@ -1954,6 +1939,9 @@ struct drm_i915_cmd_table { · 178 unmodified lines | ||
| 1954 | 1939 | #define IS_ULT(dev) (IS_HSW_ULT(dev) || IS_BDW_ULT(dev)) |
| 1955 | 1940 | #define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \ |
| 1956 | 1941 | ((dev)->pdev->device & 0x00F0) == 0x0020) |
| 1942 | +/* ULX machines are also considered ULT. */ | |
| 1943 | +#define IS_HSW_ULX(dev) ((dev)->pdev->device == 0x0A0E || \ | |
| 1944 | + (dev)->pdev->device == 0x0A1E) | |
| 1957 | 1945 | #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) |
| 1958 | 1946 | |
| 1959 | 1947 | /* |
| @@ -2201,10 +2189,12 @@ void i915_gem_vma_destroy(struct i915_vma *vma); · 241 unmodified lines | ||
| 2201 | 2189 | #define PIN_MAPPABLE 0x1 |
| 2202 | 2190 | #define PIN_NONBLOCK 0x2 |
| 2203 | 2191 | #define PIN_GLOBAL 0x4 |
| 2192 | +#define PIN_OFFSET_BIAS 0x8 | |
| 2193 | +#define PIN_OFFSET_MASK (~4095) | |
| 2204 | 2194 | int __must_check i915_gem_object_pin(struct drm_i915_gem_object *obj, |
| 2205 | 2195 | struct i915_address_space *vm, |
| 2206 | 2196 | uint32_t alignment, |
| 2207 | − unsigned flags); | |
| 2197 | + uint64_t flags); | |
| 2208 | 2198 | int __must_check i915_vma_unbind(struct i915_vma *vma); |
| 2209 | 2199 | int i915_gem_object_put_pages(struct drm_i915_gem_object *obj); |
| 2210 | 2200 | void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv); |
| @@ -2331,13 +2321,8 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj, · 120 unmodified lines | ||
| 2331 | 2321 | u32 alignment, |
| 2332 | 2322 | struct intel_ring_buffer *pipelined); |
| 2333 | 2323 | void i915_gem_object_unpin_from_display_plane(struct drm_i915_gem_object *obj); |
| 2334 | −int i915_gem_attach_phys_object(struct drm_device *dev, | |
| 2335 | − struct drm_i915_gem_object *obj, | |
| 2336 | − int id, | |
| 2324 | +int i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, | |
| 2337 | 2325 | int align); |
| 2338 | −void i915_gem_detach_phys_object(struct drm_device *dev, | |
| 2339 | − struct drm_i915_gem_object *obj); | |
| 2340 | −void i915_gem_free_all_phys_object(struct drm_device *dev); | |
| 2341 | 2326 | int i915_gem_open(struct drm_device *dev, struct drm_file *file); |
| 2342 | 2327 | void i915_gem_release(struct drm_device *dev, struct drm_file *file); |
| 2343 | 2328 | |
| @@ -2462,6 +2447,8 @@ int __must_check i915_gem_evict_something(struct drm_device *dev, · 118 unmodified lines | ||
| 2462 | 2447 | int min_size, |
| 2463 | 2448 | unsigned alignment, |
| 2464 | 2449 | unsigned cache_level, |
| 2450 | + unsigned long start, | |
| 2451 | + unsigned long end, | |
| 2465 | 2452 | unsigned flags); |
| 2466 | 2453 | int i915_gem_evict_vm(struct i915_address_space *vm, bool do_idle); |
| 2467 | 2454 | int i915_gem_evict_everything(struct drm_device *dev); |
| @@ -43,10 +43,6 @@ static void i915_gem_object_flush_cpu_write_domain(struct drm_i915_gem_object *o · 42 unmodified lines | ||
| 43 | 43 | static __must_check int |
| 44 | 44 | i915_gem_object_wait_rendering(struct drm_i915_gem_object *obj, |
| 45 | 45 | bool readonly); |
| 46 | −static int i915_gem_phys_pwrite(struct drm_device *dev, | |
| 47 | − struct drm_i915_gem_object *obj, | |
| 48 | − struct drm_i915_gem_pwrite *args, | |
| 49 | − struct drm_file *file); | |
| 50 | 46 | |
| 51 | 47 | static void i915_gem_write_fence(struct drm_device *dev, int reg, |
| 52 | 48 | struct drm_i915_gem_object *obj); |
| @@ -209,6 +205,128 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data, · 156 unmodified lines | ||
| 209 | 205 | return 0; |
| 210 | 206 | } |
| 211 | 207 | |
| 208 | +static void i915_gem_object_detach_phys(struct drm_i915_gem_object *obj) | |
| 209 | +{ | |
| 210 | + drm_dma_handle_t *phys = obj->phys_handle; | |
| 211 | + | |
| 212 | + if (!phys) | |
| 213 | + return; | |
| 214 | + | |
| 215 | + if (obj->madv == I915_MADV_WILLNEED) { | |
| 216 | + struct address_space *mapping = file_inode(obj->base.filp)->i_mapping; | |
| 217 | + char *vaddr = phys->vaddr; | |
| 218 | + int i; | |
| 219 | + | |
| 220 | + for (i = 0; i < obj->base.size / PAGE_SIZE; i++) { | |
| 221 | + struct page *page = shmem_read_mapping_page(mapping, i); | |
| 222 | + if (!IS_ERR(page)) { | |
| 223 | + char *dst = kmap_atomic(page); | |
| 224 | + memcpy(dst, vaddr, PAGE_SIZE); | |
| 225 | + drm_clflush_virt_range(dst, PAGE_SIZE); | |
| 226 | + kunmap_atomic(dst); | |
| 227 | + | |
| 228 | + set_page_dirty(page); | |
| 229 | + mark_page_accessed(page); | |
| 230 | + page_cache_release(page); | |
| 231 | + } | |
| 232 | + vaddr += PAGE_SIZE; | |
| 233 | + } | |
| 234 | + i915_gem_chipset_flush(obj->base.dev); | |
| 235 | + } | |
| 236 | + | |
| 237 | +#ifdef CONFIG_X86 | |
| 238 | + set_memory_wb((unsigned long)phys->vaddr, phys->size / PAGE_SIZE); | |
| 239 | +#endif | |
| 240 | + drm_pci_free(obj->base.dev, phys); | |
| 241 | + obj->phys_handle = NULL; | |
| 242 | +} | |
| 243 | + | |
| 244 | +int | |
| 245 | +i915_gem_object_attach_phys(struct drm_i915_gem_object *obj, | |
| 246 | + int align) | |
| 247 | +{ | |
| 248 | + drm_dma_handle_t *phys; | |
| 249 | + struct address_space *mapping; | |
| 250 | + char *vaddr; | |
| 251 | + int i; | |
| 252 | + | |
| 253 | + if (obj->phys_handle) { | |
| 254 | + if ((unsigned long)obj->phys_handle->vaddr & (align -1)) | |
| 255 | + return -EBUSY; | |
| 256 | + | |
| 257 | + return 0; | |
| 258 | + } | |
| 259 | + | |
| 260 | + if (obj->madv != I915_MADV_WILLNEED) | |
| 261 | + return -EFAULT; | |
| 262 | + | |
| 263 | + if (obj->base.filp == NULL) | |
| 264 | + return -EINVAL; | |
| 265 | + | |
| 266 | + /* create a new object */ | |
| 267 | + phys = drm_pci_alloc(obj->base.dev, obj->base.size, align); | |
| 268 | + if (!phys) | |
| 269 | + return -ENOMEM; | |
| 270 | + | |
| 271 | + vaddr = phys->vaddr; | |
| 272 | +#ifdef CONFIG_X86 | |
| 273 | + set_memory_wc((unsigned long)vaddr, phys->size / PAGE_SIZE); | |
| 274 | +#endif | |
| 275 | + mapping = file_inode(obj->base.filp)->i_mapping; | |
| 276 | + for (i = 0; i < obj->base.size / PAGE_SIZE; i++) { | |
| 277 | + struct page *page; | |
| 278 | + char *src; | |
| 279 | + | |
| 280 | + page = shmem_read_mapping_page(mapping, i); | |
| 281 | + if (IS_ERR(page)) { | |
| 282 | +#ifdef CONFIG_X86 | |
| 283 | + set_memory_wb((unsigned long)phys->vaddr, phys->size / PAGE_SIZE); | |
| 284 | +#endif | |
| 285 | + drm_pci_free(obj->base.dev, phys); | |
| 286 | + return PTR_ERR(page); | |
| 287 | + } | |
| 288 | + | |
| 289 | + src = kmap_atomic(page); | |
| 290 | + memcpy(vaddr, src, PAGE_SIZE); | |
| 291 | + kunmap_atomic(src); | |
| 292 | + | |
| 293 | + mark_page_accessed(page); | |
| 294 | + page_cache_release(page); | |
| 295 | + | |
| 296 | + vaddr += PAGE_SIZE; | |
| 297 | + } | |
| 298 | + | |
| 299 | + obj->phys_handle = phys; | |
| 300 | + return 0; | |
| 301 | +} | |
| 302 | + | |
| 303 | +static int | |
| 304 | +i915_gem_phys_pwrite(struct drm_i915_gem_object *obj, | |
| 305 | + struct drm_i915_gem_pwrite *args, | |
| 306 | + struct drm_file *file_priv) | |
| 307 | +{ | |
| 308 | + struct drm_device *dev = obj->base.dev; | |
| 309 | + void *vaddr = obj->phys_handle->vaddr + args->offset; | |
| 310 | + char __user *user_data = to_user_ptr(args->data_ptr); | |
| 311 | + | |
| 312 | + if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { | |
| 313 | + unsigned long unwritten; | |
| 314 | + | |
| 315 | + /* The physical object once assigned is fixed for the lifetime | |
| 316 | + * of the obj, so we can safely drop the lock and continue | |
| 317 | + * to access vaddr. | |
| 318 | + */ | |
| 319 | + mutex_unlock(&dev->struct_mutex); | |
| 320 | + unwritten = copy_from_user(vaddr, user_data, args->size); | |
| 321 | + mutex_lock(&dev->struct_mutex); | |
| 322 | + if (unwritten) | |
| 323 | + return -EFAULT; | |
| 324 | + } | |
| 325 | + | |
| 326 | + i915_gem_chipset_flush(dev); | |
| 327 | + return 0; | |
| 328 | +} | |
| 329 | + | |
| 212 | 330 | void *i915_gem_object_alloc(struct drm_device *dev) |
| 213 | 331 | { |
| 214 | 332 | struct drm_i915_private *dev_priv = dev->dev_private; |
| @@ -921,8 +1039,8 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, · 706 unmodified lines | ||
| 921 | 1039 | * pread/pwrite currently are reading and writing from the CPU |
| 922 | 1040 | * perspective, requiring manual detiling by the client. |
| 923 | 1041 | */ |
| 924 | − if (obj->phys_obj) { | |
| 925 | − ret = i915_gem_phys_pwrite(dev, obj, args, file); | |
| 1042 | + if (obj->phys_handle) { | |
| 1043 | + ret = i915_gem_phys_pwrite(obj, args, file); | |
| 926 | 1044 | goto out; |
| 927 | 1045 | } |
| 928 | 1046 | |
| @@ -3208,12 +3326,14 @@ static struct i915_vma * · 2279 unmodified lines | ||
| 3208 | 3326 | i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, |
| 3209 | 3327 | struct i915_address_space *vm, |
| 3210 | 3328 | unsigned alignment, |
| 3211 | − unsigned flags) | |
| 3329 | + uint64_t flags) | |
| 3212 | 3330 | { |
| 3213 | 3331 | struct drm_device *dev = obj->base.dev; |
| 3214 | 3332 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 3215 | 3333 | u32 size, fence_size, fence_alignment, unfenced_alignment; |
| 3216 | − size_t gtt_max = | |
| 3334 | + unsigned long start = | |
| 3335 | + flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0; | |
| 3336 | + unsigned long end = | |
| 3217 | 3337 | flags & PIN_MAPPABLE ? dev_priv->gtt.mappable_end : vm->total; |
| 3218 | 3338 | struct i915_vma *vma; |
| 3219 | 3339 | int ret; |
| @@ -3242,11 +3362,11 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, · 22 unmodified lines | ||
| 3242 | 3362 | /* If the object is bigger than the entire aperture, reject it early |
| 3243 | 3363 | * before evicting everything in a vain attempt to find space. |
| 3244 | 3364 | */ |
| 3245 | − if (obj->base.size > gtt_max) { | |
| 3246 | − DRM_DEBUG("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%zu\n", | |
| 3365 | + if (obj->base.size > end) { | |
| 3366 | + DRM_DEBUG("Attempting to bind an object larger than the aperture: object=%zd > %s aperture=%lu\n", | |
| 3247 | 3367 | obj->base.size, |
| 3248 | 3368 | flags & PIN_MAPPABLE ? "mappable" : "total", |
| 3249 | − gtt_max); | |
| 3369 | + end); | |
| 3250 | 3370 | return ERR_PTR(-E2BIG); |
| 3251 | 3371 | } |
| 3252 | 3372 | |
| @@ -3263,12 +3383,15 @@ i915_gem_object_bind_to_vm(struct drm_i915_gem_object *obj, · 10 unmodified lines | ||
| 3263 | 3383 | search_free: |
| 3264 | 3384 | ret = drm_mm_insert_node_in_range_generic(&vm->mm, &vma->node, |
| 3265 | 3385 | size, alignment, |
| 3266 | − obj->cache_level, 0, gtt_max, | |
| 3386 | + obj->cache_level, | |
| 3387 | + start, end, | |
| 3267 | 3388 | DRM_MM_SEARCH_DEFAULT, |
| 3268 | 3389 | DRM_MM_CREATE_DEFAULT); |
| 3269 | 3390 | if (ret) { |
| 3270 | 3391 | ret = i915_gem_evict_something(dev, vm, size, alignment, |
| 3271 | − obj->cache_level, flags); | |
| 3392 | + obj->cache_level, | |
| 3393 | + start, end, | |
| 3394 | + flags); | |
| 3272 | 3395 | if (ret == 0) |
| 3273 | 3396 | goto search_free; |
| 3274 | 3397 | |
| @@ -3828,11 +3951,30 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file) · 553 unmodified lines | ||
| 3828 | 3951 | return ret; |
| 3829 | 3952 | } |
| 3830 | 3953 | |
| 3954 | +static bool | |
| 3955 | +i915_vma_misplaced(struct i915_vma *vma, uint32_t alignment, uint64_t flags) | |
| 3956 | +{ | |
| 3957 | + struct drm_i915_gem_object *obj = vma->obj; | |
| 3958 | + | |
| 3959 | + if (alignment && | |
| 3960 | + vma->node.start & (alignment - 1)) | |
| 3961 | + return true; | |
| 3962 | + | |
| 3963 | + if (flags & PIN_MAPPABLE && !obj->map_and_fenceable) | |
| 3964 | + return true; | |
| 3965 | + | |
| 3966 | + if (flags & PIN_OFFSET_BIAS && | |
| 3967 | + vma->node.start < (flags & PIN_OFFSET_MASK)) | |
| 3968 | + return true; | |
| 3969 | + | |
| 3970 | + return false; | |
| 3971 | +} | |
| 3972 | + | |
| 3831 | 3973 | int |
| 3832 | 3974 | i915_gem_object_pin(struct drm_i915_gem_object *obj, |
| 3833 | 3975 | struct i915_address_space *vm, |
| 3834 | 3976 | uint32_t alignment, |
| 3835 | − unsigned flags) | |
| 3977 | + uint64_t flags) | |
| 3836 | 3978 | { |
| 3837 | 3979 | struct i915_vma *vma; |
| 3838 | 3980 | int ret; |
| @@ -3845,15 +3987,13 @@ i915_gem_object_pin(struct drm_i915_gem_object *obj, · 6 unmodified lines | ||
| 3845 | 3987 | if (WARN_ON(vma->pin_count == DRM_I915_GEM_OBJECT_MAX_PIN_COUNT)) |
| 3846 | 3988 | return -EBUSY; |
| 3847 | 3989 | |
| 3848 | − if ((alignment && | |
| 3849 | − vma->node.start & (alignment - 1)) || | |
| 3850 | − (flags & PIN_MAPPABLE && !obj->map_and_fenceable)) { | |
| 3990 | + if (i915_vma_misplaced(vma, alignment, flags)) { | |
| 3851 | 3991 | WARN(vma->pin_count, |
| 3852 | 3992 | "bo is already pinned with incorrect alignment:" |
| 3853 | 3993 | " offset=%lx, req.alignment=%x, req.map_and_fenceable=%d," |
| 3854 | 3994 | " obj->map_and_fenceable=%d\n", |
| 3855 | 3995 | i915_gem_obj_offset(obj, vm), alignment, |
| 3856 | − flags & PIN_MAPPABLE, | |
| 3996 | + !!(flags & PIN_MAPPABLE), | |
| 3857 | 3997 | obj->map_and_fenceable); |
| 3858 | 3998 | ret = i915_vma_unbind(vma); |
| 3859 | 3999 | if (ret) |
| @@ -4163,9 +4303,6 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj) · 303 unmodified lines | ||
| 4163 | 4303 | |
| 4164 | 4304 | trace_i915_gem_object_destroy(obj); |
| 4165 | 4305 | |
| 4166 | − if (obj->phys_obj) | |
| 4167 | − i915_gem_detach_phys_object(dev, obj); | |
| 4168 | − | |
| 4169 | 4306 | list_for_each_entry_safe(vma, next, &obj->vma_list, vma_link) { |
| 4170 | 4307 | int ret; |
| 4171 | 4308 | |
| @@ -4183,6 +4320,8 @@ void i915_gem_free_object(struct drm_gem_object *gem_obj) · 11 unmodified lines | ||
| 4183 | 4320 | } |
| 4184 | 4321 | } |
| 4185 | 4322 | |
| 4323 | + i915_gem_object_detach_phys(obj); | |
| 4324 | + | |
| 4186 | 4325 | /* Stolen objects don't hold a ref, but do hold pin count. Fix that up |
| 4187 | 4326 | * before progressing. */ |
| 4188 | 4327 | if (obj->stolen) |
| @@ -4646,190 +4785,6 @@ i915_gem_load(struct drm_device *dev) · 457 unmodified lines | ||
| 4646 | 4785 | register_shrinker(&dev_priv->mm.inactive_shrinker); |
| 4647 | 4786 | } |
| 4648 | 4787 | |
| 4649 | −/* | |
| 4650 | − * Create a physically contiguous memory object for this object | |
| 4651 | − * e.g. for cursor + overlay regs | |
| 4652 | − */ | |
| 4653 | −static int i915_gem_init_phys_object(struct drm_device *dev, | |
| 4654 | − int id, int size, int align) | |
| 4655 | −{ | |
| 4656 | − struct drm_i915_private *dev_priv = dev->dev_private; | |
| 4657 | − struct drm_i915_gem_phys_object *phys_obj; | |
| 4658 | − int ret; | |
| 4659 | − | |
| 4660 | − if (dev_priv->mm.phys_objs[id - 1] || !size) | |
| 4661 | − return 0; | |
| 4662 | − | |
| 4663 | − phys_obj = kzalloc(sizeof(*phys_obj), GFP_KERNEL); | |
| 4664 | − if (!phys_obj) | |
| 4665 | − return -ENOMEM; | |
| 4666 | − | |
| 4667 | − phys_obj->id = id; | |
| 4668 | − | |
| 4669 | − phys_obj->handle = drm_pci_alloc(dev, size, align); | |
| 4670 | − if (!phys_obj->handle) { | |
| 4671 | − ret = -ENOMEM; | |
| 4672 | − goto kfree_obj; | |
| 4673 | − } | |
| 4674 | −#ifdef CONFIG_X86 | |
| 4675 | − set_memory_wc((unsigned long)phys_obj->handle->vaddr, phys_obj->handle->size / PAGE_SIZE); | |
| 4676 | −#endif | |
| 4677 | − | |
| 4678 | − dev_priv->mm.phys_objs[id - 1] = phys_obj; | |
| 4679 | − | |
| 4680 | − return 0; | |
| 4681 | −kfree_obj: | |
| 4682 | − kfree(phys_obj); | |
| 4683 | − return ret; | |
| 4684 | −} | |
| 4685 | − | |
| 4686 | −static void i915_gem_free_phys_object(struct drm_device *dev, int id) | |
| 4687 | −{ | |
| 4688 | − struct drm_i915_private *dev_priv = dev->dev_private; | |
| 4689 | − struct drm_i915_gem_phys_object *phys_obj; | |
| 4690 | − | |
| 4691 | − if (!dev_priv->mm.phys_objs[id - 1]) | |
| 4692 | − return; | |
| 4693 | − | |
| 4694 | − phys_obj = dev_priv->mm.phys_objs[id - 1]; | |
| 4695 | − if (phys_obj->cur_obj) { | |
| 4696 | − i915_gem_detach_phys_object(dev, phys_obj->cur_obj); | |
| 4697 | − } | |
| 4698 | − | |
| 4699 | −#ifdef CONFIG_X86 | |
| 4700 | − set_memory_wb((unsigned long)phys_obj->handle->vaddr, phys_obj->handle->size / PAGE_SIZE); | |
| 4701 | −#endif | |
| 4702 | − drm_pci_free(dev, phys_obj->handle); | |
| 4703 | − kfree(phys_obj); | |
| 4704 | − dev_priv->mm.phys_objs[id - 1] = NULL; | |
| 4705 | −} | |
| 4706 | − | |
| 4707 | −void i915_gem_free_all_phys_object(struct drm_device *dev) | |
| 4708 | −{ | |
| 4709 | − int i; | |
| 4710 | − | |
| 4711 | − for (i = I915_GEM_PHYS_CURSOR_0; i <= I915_MAX_PHYS_OBJECT; i++) | |
| 4712 | − i915_gem_free_phys_object(dev, i); | |
| 4713 | −} | |
| 4714 | − | |
| 4715 | −void i915_gem_detach_phys_object(struct drm_device *dev, | |
| 4716 | − struct drm_i915_gem_object *obj) | |
| 4717 | −{ | |
| 4718 | − struct address_space *mapping = file_inode(obj->base.filp)->i_mapping; | |
| 4719 | − char *vaddr; | |
| 4720 | − int i; | |
| 4721 | − int page_count; | |
| 4722 | − | |
| 4723 | − if (!obj->phys_obj) | |
| 4724 | − return; | |
| 4725 | − vaddr = obj->phys_obj->handle->vaddr; | |
| 4726 | − | |
| 4727 | − page_count = obj->base.size / PAGE_SIZE; | |
| 4728 | − for (i = 0; i < page_count; i++) { | |
| 4729 | − struct page *page = shmem_read_mapping_page(mapping, i); | |
| 4730 | − if (!IS_ERR(page)) { | |
| 4731 | − char *dst = kmap_atomic(page); | |
| 4732 | − memcpy(dst, vaddr + i*PAGE_SIZE, PAGE_SIZE); | |
| 4733 | − kunmap_atomic(dst); | |
| 4734 | − | |
| 4735 | − drm_clflush_pages(&page, 1); | |
| 4736 | − | |
| 4737 | − set_page_dirty(page); | |
| 4738 | − mark_page_accessed(page); | |
| 4739 | − page_cache_release(page); | |
| 4740 | − } | |
| 4741 | − } | |
| 4742 | − i915_gem_chipset_flush(dev); | |
| 4743 | − | |
| 4744 | − obj->phys_obj->cur_obj = NULL; | |
| 4745 | − obj->phys_obj = NULL; | |
| 4746 | −} | |
| 4747 | − | |
| 4748 | −int | |
| 4749 | −i915_gem_attach_phys_object(struct drm_device *dev, | |
| 4750 | − struct drm_i915_gem_object *obj, | |
| 4751 | − int id, | |
| 4752 | − int align) | |
| 4753 | −{ | |
| 4754 | − struct address_space *mapping = file_inode(obj->base.filp)->i_mapping; | |
| 4755 | − struct drm_i915_private *dev_priv = dev->dev_private; | |
| 4756 | − int ret = 0; | |
| 4757 | − int page_count; | |
| 4758 | − int i; | |
| 4759 | − | |
| 4760 | − if (id > I915_MAX_PHYS_OBJECT) | |
| 4761 | − return -EINVAL; | |
| 4762 | − | |
| 4763 | − if (obj->phys_obj) { | |
| 4764 | − if (obj->phys_obj->id == id) | |
| 4765 | − return 0; | |
| 4766 | − i915_gem_detach_phys_object(dev, obj); | |
| 4767 | − } | |
| 4768 | − | |
| 4769 | − /* create a new object */ | |
| 4770 | − if (!dev_priv->mm.phys_objs[id - 1]) { | |
| 4771 | − ret = i915_gem_init_phys_object(dev, id, | |
| 4772 | − obj->base.size, align); | |
| 4773 | − if (ret) { | |
| 4774 | − DRM_ERROR("failed to init phys object %d size: %zu\n", | |
| 4775 | − id, obj->base.size); | |
| 4776 | − return ret; | |
| 4777 | − } | |
| 4778 | − } | |
| 4779 | − | |
| 4780 | − /* bind to the object */ | |
| 4781 | − obj->phys_obj = dev_priv->mm.phys_objs[id - 1]; | |
| 4782 | − obj->phys_obj->cur_obj = obj; | |
| 4783 | − | |
| 4784 | − page_count = obj->base.size / PAGE_SIZE; | |
| 4785 | − | |
| 4786 | − for (i = 0; i < page_count; i++) { | |
| 4787 | − struct page *page; | |
| 4788 | − char *dst, *src; | |
| 4789 | − | |
| 4790 | − page = shmem_read_mapping_page(mapping, i); | |
| 4791 | − if (IS_ERR(page)) | |
| 4792 | − return PTR_ERR(page); | |
| 4793 | − | |
| 4794 | − src = kmap_atomic(page); | |
| 4795 | − dst = obj->phys_obj->handle->vaddr + (i * PAGE_SIZE); | |
| 4796 | − memcpy(dst, src, PAGE_SIZE); | |
| 4797 | − kunmap_atomic(src); | |
| 4798 | − | |
| 4799 | − mark_page_accessed(page); | |
| 4800 | − page_cache_release(page); | |
| 4801 | − } | |
| 4802 | − | |
| 4803 | − return 0; | |
| 4804 | −} | |
| 4805 | − | |
| 4806 | −static int | |
| 4807 | −i915_gem_phys_pwrite(struct drm_device *dev, | |
| 4808 | − struct drm_i915_gem_object *obj, | |
| 4809 | − struct drm_i915_gem_pwrite *args, | |
| 4810 | − struct drm_file *file_priv) | |
| 4811 | −{ | |
| 4812 | − void *vaddr = obj->phys_obj->handle->vaddr + args->offset; | |
| 4813 | − char __user *user_data = to_user_ptr(args->data_ptr); | |
| 4814 | − | |
| 4815 | − if (__copy_from_user_inatomic_nocache(vaddr, user_data, args->size)) { | |
| 4816 | − unsigned long unwritten; | |
| 4817 | − | |
| 4818 | − /* The physical object once assigned is fixed for the lifetime | |
| 4819 | − * of the obj, so we can safely drop the lock and continue | |
| 4820 | − * to access vaddr. | |
| 4821 | − */ | |
| 4822 | − mutex_unlock(&dev->struct_mutex); | |
| 4823 | − unwritten = copy_from_user(vaddr, user_data, args->size); | |
| 4824 | − mutex_lock(&dev->struct_mutex); | |
| 4825 | − if (unwritten) | |
| 4826 | − return -EFAULT; | |
| 4827 | − } | |
| 4828 | − | |
| 4829 | − i915_gem_chipset_flush(dev); | |
| 4830 | − return 0; | |
| 4831 | −} | |
| 4832 | − | |
| 4833 | 4788 | void i915_gem_release(struct drm_device *dev, struct drm_file *file) |
| 4834 | 4789 | { |
| 4835 | 4790 | struct drm_i915_file_private *file_priv = file->driver_priv; |
| @@ -68,9 +68,9 @@ mark_free(struct i915_vma *vma, struct list_head *unwind) · 67 unmodified lines | ||
| 68 | 68 | int |
| 69 | 69 | i915_gem_evict_something(struct drm_device *dev, struct i915_address_space *vm, |
| 70 | 70 | int min_size, unsigned alignment, unsigned cache_level, |
| 71 | + unsigned long start, unsigned long end, | |
| 71 | 72 | unsigned flags) |
| 72 | 73 | { |
| 73 | − struct drm_i915_private *dev_priv = dev->dev_private; | |
| 74 | 74 | struct list_head eviction_list, unwind_list; |
| 75 | 75 | struct i915_vma *vma; |
| 76 | 76 | int ret = 0; |
| @@ -102,11 +102,10 @@ i915_gem_evict_something(struct drm_device *dev, struct i915_address_space *vm, · 25 unmodified lines | ||
| 102 | 102 | */ |
| 103 | 103 | |
| 104 | 104 | INIT_LIST_HEAD(&unwind_list); |
| 105 | − if (flags & PIN_MAPPABLE) { | |
| 106 | − BUG_ON(!i915_is_ggtt(vm)); | |
| 105 | + if (start != 0 || end != vm->total) { | |
| 107 | 106 | drm_mm_init_scan_with_range(&vm->mm, min_size, |
| 108 | − alignment, cache_level, 0, | |
| 109 | − dev_priv->gtt.mappable_end); | |
| 107 | + alignment, cache_level, | |
| 108 | + start, end); | |
| 110 | 109 | } else |
| 111 | 110 | drm_mm_init_scan(&vm->mm, min_size, alignment, cache_level); |
| 112 | 111 | |
| @@ -35,6 +35,9 @@ · 34 unmodified lines | ||
| 35 | 35 | |
| 36 | 36 | #define __EXEC_OBJECT_HAS_PIN (1<<31) |
| 37 | 37 | #define __EXEC_OBJECT_HAS_FENCE (1<<30) |
| 38 | +#define __EXEC_OBJECT_NEEDS_BIAS (1<<28) | |
| 39 | + | |
| 40 | +#define BATCH_OFFSET_BIAS (256*1024) | |
| 38 | 41 | |
| 39 | 42 | struct eb_vmas { |
| 40 | 43 | struct list_head vmas; |
| @@ -545,7 +548,7 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma, · 504 unmodified lines | ||
| 545 | 548 | struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; |
| 546 | 549 | bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; |
| 547 | 550 | bool need_fence; |
| 548 | − unsigned flags; | |
| 551 | + uint64_t flags; | |
| 549 | 552 | int ret; |
| 550 | 553 | |
| 551 | 554 | flags = 0; |
| @@ -559,6 +562,8 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma, · 7 unmodified lines | ||
| 559 | 562 | |
| 560 | 563 | if (entry->flags & EXEC_OBJECT_NEEDS_GTT) |
| 561 | 564 | flags |= PIN_GLOBAL; |
| 565 | + if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS) | |
| 566 | + flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS; | |
| 562 | 567 | |
| 563 | 568 | ret = i915_gem_object_pin(obj, vma->vm, entry->alignment, flags); |
| 564 | 569 | if (ret) |
| @@ -592,6 +597,36 @@ i915_gem_execbuffer_reserve_vma(struct i915_vma *vma, · 27 unmodified lines | ||
| 592 | 597 | return 0; |
| 593 | 598 | } |
| 594 | 599 | |
| 600 | +static bool | |
| 601 | +eb_vma_misplaced(struct i915_vma *vma, bool has_fenced_gpu_access) | |
| 602 | +{ | |
| 603 | + struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; | |
| 604 | + struct drm_i915_gem_object *obj = vma->obj; | |
| 605 | + bool need_fence, need_mappable; | |
| 606 | + | |
| 607 | + need_fence = | |
| 608 | + has_fenced_gpu_access && | |
| 609 | + entry->flags & EXEC_OBJECT_NEEDS_FENCE && | |
| 610 | + obj->tiling_mode != I915_TILING_NONE; | |
| 611 | + need_mappable = need_fence || need_reloc_mappable(vma); | |
| 612 | + | |
| 613 | + WARN_ON((need_mappable || need_fence) && | |
| 614 | + !i915_is_ggtt(vma->vm)); | |
| 615 | + | |
| 616 | + if (entry->alignment && | |
| 617 | + vma->node.start & (entry->alignment - 1)) | |
| 618 | + return true; | |
| 619 | + | |
| 620 | + if (need_mappable && !obj->map_and_fenceable) | |
| 621 | + return true; | |
| 622 | + | |
| 623 | + if (entry->flags & __EXEC_OBJECT_NEEDS_BIAS && | |
| 624 | + vma->node.start < BATCH_OFFSET_BIAS) | |
| 625 | + return true; | |
| 626 | + | |
| 627 | + return false; | |
| 628 | +} | |
| 629 | + | |
| 595 | 630 | static int |
| 596 | 631 | i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring, |
| 597 | 632 | struct list_head *vmas, |
| @@ -653,26 +688,10 @@ i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring, · 55 unmodified lines | ||
| 653 | 688 | |
| 654 | 689 | /* Unbind any ill-fitting objects or pin. */ |
| 655 | 690 | list_for_each_entry(vma, vmas, exec_list) { |
| 656 | − struct drm_i915_gem_exec_object2 *entry = vma->exec_entry; | |
| 657 | − bool need_fence, need_mappable; | |
| 658 | − | |
| 659 | − obj = vma->obj; | |
| 660 | − | |
| 661 | 691 | if (!drm_mm_node_allocated(&vma->node)) |
| 662 | 692 | continue; |
| 663 | 693 | |
| 664 | − need_fence = | |
| 665 | − has_fenced_gpu_access && | |
| 666 | − entry->flags & EXEC_OBJECT_NEEDS_FENCE && | |
| 667 | − obj->tiling_mode != I915_TILING_NONE; | |
| 668 | − need_mappable = need_fence || need_reloc_mappable(vma); | |
| 669 | − | |
| 670 | − WARN_ON((need_mappable || need_fence) && | |
| 671 | − !i915_is_ggtt(vma->vm)); | |
| 672 | − | |
| 673 | − if ((entry->alignment && | |
| 674 | − vma->node.start & (entry->alignment - 1)) || | |
| 675 | − (need_mappable && !obj->map_and_fenceable)) | |
| 694 | + if (eb_vma_misplaced(vma, has_fenced_gpu_access)) | |
| 676 | 695 | ret = i915_vma_unbind(vma); |
| 677 | 696 | else |
| 678 | 697 | ret = i915_gem_execbuffer_reserve_vma(vma, ring, need_relocs); |
| @@ -773,9 +792,9 @@ i915_gem_execbuffer_relocate_slow(struct drm_device *dev, · 94 unmodified lines | ||
| 773 | 792 | * relocations were valid. |
| 774 | 793 | */ |
| 775 | 794 | for (j = 0; j < exec[i].relocation_count; j++) { |
| 776 | − if (copy_to_user(&user_relocs[j].presumed_offset, | |
| 777 | − &invalid_offset, | |
| 778 | − sizeof(invalid_offset))) { | |
| 795 | + if (__copy_to_user(&user_relocs[j].presumed_offset, | |
| 796 | + &invalid_offset, | |
| 797 | + sizeof(invalid_offset))) { | |
| 779 | 798 | ret = -EFAULT; |
| 780 | 799 | mutex_lock(&dev->struct_mutex); |
| 781 | 800 | goto err; |
| @@ -999,6 +1018,25 @@ i915_reset_gen7_sol_offsets(struct drm_device *dev, · 217 unmodified lines | ||
| 999 | 1018 | return 0; |
| 1000 | 1019 | } |
| 1001 | 1020 | |
| 1021 | +static struct drm_i915_gem_object * | |
| 1022 | +eb_get_batch(struct eb_vmas *eb) | |
| 1023 | +{ | |
| 1024 | + struct i915_vma *vma = list_entry(eb->vmas.prev, typeof(*vma), exec_list); | |
| 1025 | + | |
| 1026 | + /* | |
| 1027 | + * SNA is doing fancy tricks with compressing batch buffers, which leads | |
| 1028 | + * to negative relocation deltas. Usually that works out ok since the | |
| 1029 | + * relocate address is still positive, except when the batch is placed | |
| 1030 | + * very low in the GTT. Ensure this doesn't happen. | |
| 1031 | + * | |
| 1032 | + * Note that actual hangs have only been observed on gen7, but for | |
| 1033 | + * paranoia do it everywhere. | |
| 1034 | + */ | |
| 1035 | + vma->exec_entry->flags |= __EXEC_OBJECT_NEEDS_BIAS; | |
| 1036 | + | |
| 1037 | + return vma->obj; | |
| 1038 | +} | |
| 1039 | + | |
| 1002 | 1040 | static int |
| 1003 | 1041 | i915_gem_do_execbuffer(struct drm_device *dev, void *data, |
| 1004 | 1042 | struct drm_file *file, |
| @@ -1153,7 +1191,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, · 148 unmodified lines | ||
| 1153 | 1191 | goto err; |
| 1154 | 1192 | |
| 1155 | 1193 | /* take note of the batch buffer before we might reorder the lists */ |
| 1156 | − batch_obj = list_entry(eb->vmas.prev, struct i915_vma, exec_list)->obj; | |
| 1194 | + batch_obj = eb_get_batch(eb); | |
| 1157 | 1195 | |
| 1158 | 1196 | /* Move the objects en-masse into the GTT, evicting if necessary. */ |
| 1159 | 1197 | need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0; |
| @@ -1355,18 +1393,21 @@ i915_gem_execbuffer(struct drm_device *dev, void *data, · 195 unmodified lines | ||
| 1355 | 1393 | |
| 1356 | 1394 | ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list); |
| 1357 | 1395 | if (!ret) { |
| 1396 | + struct drm_i915_gem_exec_object __user *user_exec_list = | |
| 1397 | + to_user_ptr(args->buffers_ptr); | |
| 1398 | + | |
| 1358 | 1399 | /* Copy the new buffer offsets back to the user's exec list. */ |
| 1359 | − for (i = 0; i < args->buffer_count; i++) | |
| 1360 | − exec_list[i].offset = exec2_list[i].offset; | |
| 1361 | − /* ... and back out to userspace */ | |
| 1362 | − ret = copy_to_user(to_user_ptr(args->buffers_ptr), | |
| 1363 | − exec_list, | |
| 1364 | − sizeof(*exec_list) * args->buffer_count); | |
| 1365 | − if (ret) { | |
| 1366 | − ret = -EFAULT; | |
| 1367 | − DRM_DEBUG("failed to copy %d exec entries " | |
| 1368 | − "back to user (%d)\n", | |
| 1369 | − args->buffer_count, ret); | |
| 1400 | + for (i = 0; i < args->buffer_count; i++) { | |
| 1401 | + ret = __copy_to_user(&user_exec_list[i].offset, | |
| 1402 | + &exec2_list[i].offset, | |
| 1403 | + sizeof(user_exec_list[i].offset)); | |
| 1404 | + if (ret) { | |
| 1405 | + ret = -EFAULT; | |
| 1406 | + DRM_DEBUG("failed to copy %d exec entries " | |
| 1407 | + "back to user (%d)\n", | |
| 1408 | + args->buffer_count, ret); | |
| 1409 | + break; | |
| 1410 | + } | |
| 1370 | 1411 | } |
| 1371 | 1412 | } |
| 1372 | 1413 | |
| @@ -1412,14 +1453,21 @@ i915_gem_execbuffer2(struct drm_device *dev, void *data, · 39 unmodified lines | ||
| 1412 | 1453 | ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list); |
| 1413 | 1454 | if (!ret) { |
| 1414 | 1455 | /* Copy the new buffer offsets back to the user's exec list. */ |
| 1415 | − ret = copy_to_user(to_user_ptr(args->buffers_ptr), | |
| 1416 | − exec2_list, | |
| 1417 | − sizeof(*exec2_list) * args->buffer_count); | |
| 1418 | − if (ret) { | |
| 1419 | − ret = -EFAULT; | |
| 1420 | − DRM_DEBUG("failed to copy %d exec entries " | |
| 1421 | − "back to user (%d)\n", | |
| 1422 | − args->buffer_count, ret); | |
| 1456 | + struct drm_i915_gem_exec_object2 *user_exec_list = | |
| 1457 | + to_user_ptr(args->buffers_ptr); | |
| 1458 | + int i; | |
| 1459 | + | |
| 1460 | + for (i = 0; i < args->buffer_count; i++) { | |
| 1461 | + ret = __copy_to_user(&user_exec_list[i].offset, | |
| 1462 | + &exec2_list[i].offset, | |
| 1463 | + sizeof(user_exec_list[i].offset)); | |
| 1464 | + if (ret) { | |
| 1465 | + ret = -EFAULT; | |
| 1466 | + DRM_DEBUG("failed to copy %d exec entries " | |
| 1467 | + "back to user\n", | |
| 1468 | + args->buffer_count); | |
| 1469 | + break; | |
| 1470 | + } | |
| 1423 | 1471 | } |
| 1424 | 1472 | } |
| 1425 | 1473 | |
| @@ -34,25 +34,35 @@ static void gen8_setup_private_ppat(struct drm_i915_private *dev_priv); · 33 unmodified lines | ||
| 34 | 34 | |
| 35 | 35 | bool intel_enable_ppgtt(struct drm_device *dev, bool full) |
| 36 | 36 | { |
| 37 | − if (i915.enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev)) | |
| 37 | + if (i915.enable_ppgtt == 0) | |
| 38 | 38 | return false; |
| 39 | 39 | |
| 40 | 40 | if (i915.enable_ppgtt == 1 && full) |
| 41 | 41 | return false; |
| 42 | 42 | |
| 43 | + return true; | |
| 44 | +} | |
| 45 | + | |
| 46 | +static int sanitize_enable_ppgtt(struct drm_device *dev, int enable_ppgtt) | |
| 47 | +{ | |
| 48 | + if (enable_ppgtt == 0 || !HAS_ALIASING_PPGTT(dev)) | |
| 49 | + return 0; | |
| 50 | + | |
| 51 | + if (enable_ppgtt == 1) | |
| 52 | + return 1; | |
| 53 | + | |
| 54 | + if (enable_ppgtt == 2 && HAS_PPGTT(dev)) | |
| 55 | + return 2; | |
| 56 | + | |
| 43 | 57 | #ifdef CONFIG_INTEL_IOMMU |
| 44 | 58 | /* Disable ppgtt on SNB if VT-d is on. */ |
| 45 | 59 | if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped) { |
| 46 | 60 | DRM_INFO("Disabling PPGTT because VT-d is on\n"); |
| 47 | − return false; | |
| 61 | + return 0; | |
| 48 | 62 | } |
| 49 | 63 | #endif |
| 50 | 64 | |
| 51 | − /* Full ppgtt disabled by default for now due to issues. */ | |
| 52 | − if (full) | |
| 53 | − return HAS_PPGTT(dev) && (i915.enable_ppgtt == 2); | |
| 54 | − else | |
| 55 | − return HAS_ALIASING_PPGTT(dev); | |
| 65 | + return HAS_ALIASING_PPGTT(dev) ? 1 : 0; | |
| 56 | 66 | } |
| 57 | 67 | |
| 58 | 68 | #define GEN6_PPGTT_PD_ENTRIES 512 |
| @@ -1079,7 +1089,9 @@ alloc: · 1020 unmodified lines | ||
| 1079 | 1089 | if (ret == -ENOSPC && !retried) { |
| 1080 | 1090 | ret = i915_gem_evict_something(dev, &dev_priv->gtt.base, |
| 1081 | 1091 | GEN6_PD_SIZE, GEN6_PD_ALIGN, |
| 1082 | − I915_CACHE_NONE, 0); | |
| 1092 | + I915_CACHE_NONE, | |
| 1093 | + 0, dev_priv->gtt.base.total, | |
| 1094 | + 0); | |
| 1083 | 1095 | if (ret) |
| 1084 | 1096 | return ret; |
| 1085 | 1097 | |
| @@ -2031,6 +2043,14 @@ int i915_gem_gtt_init(struct drm_device *dev) · 945 unmodified lines | ||
| 2031 | 2043 | gtt->base.total >> 20); |
| 2032 | 2044 | DRM_DEBUG_DRIVER("GMADR size = %ldM\n", gtt->mappable_end >> 20); |
| 2033 | 2045 | DRM_DEBUG_DRIVER("GTT stolen size = %zdM\n", gtt->stolen_size >> 20); |
| 2046 | + /* | |
| 2047 | + * i915.enable_ppgtt is read-only, so do an early pass to validate the | |
| 2048 | + * user's requested state against the hardware/driver capabilities. We | |
| 2049 | + * do this now so that we can print out any log messages once rather | |
| 2050 | + * than every time we check intel_enable_ppgtt(). | |
| 2051 | + */ | |
| 2052 | + i915.enable_ppgtt = sanitize_enable_ppgtt(dev, i915.enable_ppgtt); | |
| 2053 | + DRM_DEBUG_DRIVER("ppgtt mode: %i\n", i915.enable_ppgtt); | |
| 2034 | 2054 | |
| 2035 | 2055 | return 0; |
| 2036 | 2056 | } |
| @@ -560,47 +560,71 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb) · 559 unmodified lines | ||
| 560 | 560 | |
| 561 | 561 | dev_priv->vbt.edp_pps = *edp_pps; |
| 562 | 562 | |
| 563 | − dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 : | |
| 564 | − DP_LINK_BW_1_62; | |
| 563 | + switch (edp_link_params->rate) { | |
| 564 | + case EDP_RATE_1_62: | |
| 565 | + dev_priv->vbt.edp_rate = DP_LINK_BW_1_62; | |
| 566 | + break; | |
| 567 | + case EDP_RATE_2_7: | |
| 568 | + dev_priv->vbt.edp_rate = DP_LINK_BW_2_7; | |
| 569 | + break; | |
| 570 | + default: | |
| 571 | + DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n", | |
| 572 | + edp_link_params->rate); | |
| 573 | + break; | |
| 574 | + } | |
| 575 | + | |
| 565 | 576 | switch (edp_link_params->lanes) { |
| 566 | − case 0: | |
| 577 | + case EDP_LANE_1: | |
| 567 | 578 | dev_priv->vbt.edp_lanes = 1; |
| 568 | 579 | break; |
| 569 | − case 1: | |
| 580 | + case EDP_LANE_2: | |
| 570 | 581 | dev_priv->vbt.edp_lanes = 2; |
| 571 | 582 | break; |
| 572 | − case 3: | |
| 573 | − default: | |
| 583 | + case EDP_LANE_4: | |
| 574 | 584 | dev_priv->vbt.edp_lanes = 4; |
| 575 | 585 | break; |
| 586 | + default: | |
| 587 | + DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n", | |
| 588 | + edp_link_params->lanes); | |
| 589 | + break; | |
| 576 | 590 | } |
| 591 | + | |
| 577 | 592 | switch (edp_link_params->preemphasis) { |
| 578 | − case 0: | |
| 593 | + case EDP_PREEMPHASIS_NONE: | |
| 579 | 594 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0; |
| 580 | 595 | break; |
| 581 | − case 1: | |
| 596 | + case EDP_PREEMPHASIS_3_5dB: | |
| 582 | 597 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5; |
| 583 | 598 | break; |
| 584 | − case 2: | |
| 599 | + case EDP_PREEMPHASIS_6dB: | |
| 585 | 600 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6; |
| 586 | 601 | break; |
| 587 | − case 3: | |
| 602 | + case EDP_PREEMPHASIS_9_5dB: | |
| 588 | 603 | dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5; |
| 589 | 604 | break; |
| 605 | + default: | |
| 606 | + DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n", | |
| 607 | + edp_link_params->preemphasis); | |
| 608 | + break; | |
| 590 | 609 | } |
| 610 | + | |
| 591 | 611 | switch (edp_link_params->vswing) { |
| 592 | − case 0: | |
| 612 | + case EDP_VSWING_0_4V: | |
| 593 | 613 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400; |
| 594 | 614 | break; |
| 595 | − case 1: | |
| 615 | + case EDP_VSWING_0_6V: | |
| 596 | 616 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600; |
| 597 | 617 | break; |
| 598 | − case 2: | |
| 618 | + case EDP_VSWING_0_8V: | |
| 599 | 619 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800; |
| 600 | 620 | break; |
| 601 | − case 3: | |
| 621 | + case EDP_VSWING_1_2V: | |
| 602 | 622 | dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200; |
| 603 | 623 | break; |
| 624 | + default: | |
| 625 | + DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n", | |
| 626 | + edp_link_params->vswing); | |
| 627 | + break; | |
| 604 | 628 | } |
| 605 | 629 | } |
| 606 | 630 | |
| @@ -7825,14 +7825,12 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, · 7824 unmodified lines | ||
| 7825 | 7825 | addr = i915_gem_obj_ggtt_offset(obj); |
| 7826 | 7826 | } else { |
| 7827 | 7827 | int align = IS_I830(dev) ? 16 * 1024 : 256; |
| 7828 | − ret = i915_gem_attach_phys_object(dev, obj, | |
| 7829 | − (intel_crtc->pipe == 0) ? I915_GEM_PHYS_CURSOR_0 : I915_GEM_PHYS_CURSOR_1, | |
| 7830 | − align); | |
| 7828 | + ret = i915_gem_object_attach_phys(obj, align); | |
| 7831 | 7829 | if (ret) { |
| 7832 | 7830 | DRM_DEBUG_KMS("failed to attach phys object\n"); |
| 7833 | 7831 | goto fail_locked; |
| 7834 | 7832 | } |
| 7835 | − addr = obj->phys_obj->handle->busaddr; | |
| 7833 | + addr = obj->phys_handle->busaddr; | |
| 7836 | 7834 | } |
| 7837 | 7835 | |
| 7838 | 7836 | if (IS_GEN2(dev)) |
| @@ -7840,10 +7838,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, · 1 unmodified line | ||
| 7840 | 7838 | |
| 7841 | 7839 | finish: |
| 7842 | 7840 | if (intel_crtc->cursor_bo) { |
| 7843 | − if (INTEL_INFO(dev)->cursor_needs_physical) { | |
| 7844 | − if (intel_crtc->cursor_bo != obj) | |
| 7845 | − i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo); | |
| 7846 | − } else | |
| 7841 | + if (!INTEL_INFO(dev)->cursor_needs_physical) | |
| 7847 | 7842 | i915_gem_object_unpin_from_display_plane(intel_crtc->cursor_bo); |
| 7848 | 7843 | drm_gem_object_unreference(&intel_crtc->cursor_bo->base); |
| 7849 | 7844 | } |
| @@ -11395,15 +11390,6 @@ void intel_modeset_init(struct drm_device *dev) · 3545 unmodified lines | ||
| 11395 | 11390 | } |
| 11396 | 11391 | } |
| 11397 | 11392 | |
| 11398 | −static void | |
| 11399 | −intel_connector_break_all_links(struct intel_connector *connector) | |
| 11400 | −{ | |
| 11401 | − connector->base.dpms = DRM_MODE_DPMS_OFF; | |
| 11402 | − connector->base.encoder = NULL; | |
| 11403 | − connector->encoder->connectors_active = false; | |
| 11404 | − connector->encoder->base.crtc = NULL; | |
| 11405 | −} | |
| 11406 | − | |
| 11407 | 11393 | static void intel_enable_pipe_a(struct drm_device *dev) |
| 11408 | 11394 | { |
| 11409 | 11395 | struct intel_connector *connector; |
| @@ -11485,8 +11471,17 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc) · 75 unmodified lines | ||
| 11485 | 11471 | if (connector->encoder->base.crtc != &crtc->base) |
| 11486 | 11472 | continue; |
| 11487 | 11473 | |
| 11488 | − intel_connector_break_all_links(connector); | |
| 11474 | + connector->base.dpms = DRM_MODE_DPMS_OFF; | |
| 11475 | + connector->base.encoder = NULL; | |
| 11489 | 11476 | } |
| 11477 | + /* multiple connectors may have the same encoder: | |
| 11478 | + * handle them and break crtc link separately */ | |
| 11479 | + list_for_each_entry(connector, &dev->mode_config.connector_list, | |
| 11480 | + base.head) | |
| 11481 | + if (connector->encoder->base.crtc == &crtc->base) { | |
| 11482 | + connector->encoder->base.crtc = NULL; | |
| 11483 | + connector->encoder->connectors_active = false; | |
| 11484 | + } | |
| 11490 | 11485 | |
| 11491 | 11486 | WARN_ON(crtc->active); |
| 11492 | 11487 | crtc->base.enabled = false; |
| @@ -11568,6 +11563,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) · 75 unmodified lines | ||
| 11568 | 11563 | drm_get_encoder_name(&encoder->base)); |
| 11569 | 11564 | encoder->disable(encoder); |
| 11570 | 11565 | } |
| 11566 | + encoder->base.crtc = NULL; | |
| 11567 | + encoder->connectors_active = false; | |
| 11571 | 11568 | |
| 11572 | 11569 | /* Inconsistent output/port/pipe state happens presumably due to |
| 11573 | 11570 | * a bug in one of the get_hw_state functions. Or someplace else |
| @@ -11578,8 +11575,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) · 4 unmodified lines | ||
| 11578 | 11575 | base.head) { |
| 11579 | 11576 | if (connector->encoder != encoder) |
| 11580 | 11577 | continue; |
| 11581 | − | |
| 11582 | − intel_connector_break_all_links(connector); | |
| 11578 | + connector->base.dpms = DRM_MODE_DPMS_OFF; | |
| 11579 | + connector->base.encoder = NULL; | |
| 11583 | 11580 | } |
| 11584 | 11581 | } |
| 11585 | 11582 | /* Enabled encoders without active connectors will be fixed in |
| @@ -105,7 +105,8 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp) · 104 unmodified lines | ||
| 105 | 105 | case DP_LINK_BW_2_7: |
| 106 | 106 | break; |
| 107 | 107 | case DP_LINK_BW_5_4: /* 1.2 capable displays may advertise higher bw */ |
| 108 | − if ((IS_HASWELL(dev) || INTEL_INFO(dev)->gen >= 8) && | |
| 108 | + if (((IS_HASWELL(dev) && !IS_HSW_ULX(dev)) || | |
| 109 | + INTEL_INFO(dev)->gen >= 8) && | |
| 109 | 110 | intel_dp->dpcd[DP_DPCD_REV] >= 0x12) |
| 110 | 111 | max_link_bw = DP_LINK_BW_5_4; |
| 111 | 112 | else |
| @@ -120,6 +121,22 @@ intel_dp_max_link_bw(struct intel_dp *intel_dp) · 8 unmodified lines | ||
| 120 | 121 | return max_link_bw; |
| 121 | 122 | } |
| 122 | 123 | |
| 124 | +static u8 intel_dp_max_lane_count(struct intel_dp *intel_dp) | |
| 125 | +{ | |
| 126 | + struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp); | |
| 127 | + struct drm_device *dev = intel_dig_port->base.base.dev; | |
| 128 | + u8 source_max, sink_max; | |
| 129 | + | |
| 130 | + source_max = 4; | |
| 131 | + if (HAS_DDI(dev) && intel_dig_port->port == PORT_A && | |
| 132 | + (intel_dig_port->saved_port_bits & DDI_A_4_LANES) == 0) | |
| 133 | + source_max = 2; | |
| 134 | + | |
| 135 | + sink_max = drm_dp_max_lane_count(intel_dp->dpcd); | |
| 136 | + | |
| 137 | + return min(source_max, sink_max); | |
| 138 | +} | |
| 139 | + | |
| 123 | 140 | /* |
| 124 | 141 | * The units on the numbers in the next two are... bizarre. Examples will |
| 125 | 142 | * make it clearer; this one parallels an example in the eDP spec. |
| @@ -170,7 +187,7 @@ intel_dp_mode_valid(struct drm_connector *connector, · 44 unmodified lines | ||
| 170 | 187 | } |
| 171 | 188 | |
| 172 | 189 | max_link_clock = drm_dp_bw_code_to_link_rate(intel_dp_max_link_bw(intel_dp)); |
| 173 | − max_lanes = drm_dp_max_lane_count(intel_dp->dpcd); | |
| 190 | + max_lanes = intel_dp_max_lane_count(intel_dp); | |
| 174 | 191 | |
| 175 | 192 | max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); |
| 176 | 193 | mode_rate = intel_dp_link_required(target_clock, 18); |
| @@ -750,8 +767,10 @@ intel_dp_compute_config(struct intel_encoder *encoder, · 573 unmodified lines | ||
| 750 | 767 | struct intel_crtc *intel_crtc = encoder->new_crtc; |
| 751 | 768 | struct intel_connector *intel_connector = intel_dp->attached_connector; |
| 752 | 769 | int lane_count, clock; |
| 753 | − int max_lane_count = drm_dp_max_lane_count(intel_dp->dpcd); | |
| 770 | + int min_lane_count = 1; | |
| 771 | + int max_lane_count = intel_dp_max_lane_count(intel_dp); | |
| 754 | 772 | /* Conveniently, the link BW constants become indices with a shift...*/ |
| 773 | + int min_clock = 0; | |
| 755 | 774 | int max_clock = intel_dp_max_link_bw(intel_dp) >> 3; |
| 756 | 775 | int bpp, mode_rate; |
| 757 | 776 | static int bws[] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7, DP_LINK_BW_5_4 }; |
| @@ -784,19 +803,38 @@ intel_dp_compute_config(struct intel_encoder *encoder, · 26 unmodified lines | ||
| 784 | 803 | /* Walk through all bpp values. Luckily they're all nicely spaced with 2 |
| 785 | 804 | * bpc in between. */ |
| 786 | 805 | bpp = pipe_config->pipe_bpp; |
| 787 | − if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp && | |
| 788 | − dev_priv->vbt.edp_bpp < bpp) { | |
| 789 | − DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n", | |
| 790 | − dev_priv->vbt.edp_bpp); | |
| 791 | − bpp = dev_priv->vbt.edp_bpp; | |
| 806 | + if (is_edp(intel_dp)) { | |
| 807 | + if (dev_priv->vbt.edp_bpp && dev_priv->vbt.edp_bpp < bpp) { | |
| 808 | + DRM_DEBUG_KMS("clamping bpp for eDP panel to BIOS-provided %i\n", | |
| 809 | + dev_priv->vbt.edp_bpp); | |
| 810 | + bpp = dev_priv->vbt.edp_bpp; | |
| 811 | + } | |
| 812 | + | |
| 813 | + if (IS_BROADWELL(dev)) { | |
| 814 | + /* Yes, it's an ugly hack. */ | |
| 815 | + min_lane_count = max_lane_count; | |
| 816 | + DRM_DEBUG_KMS("forcing lane count to max (%u) on BDW\n", | |
| 817 | + min_lane_count); | |
| 818 | + } else if (dev_priv->vbt.edp_lanes) { | |
| 819 | + min_lane_count = min(dev_priv->vbt.edp_lanes, | |
| 820 | + max_lane_count); | |
| 821 | + DRM_DEBUG_KMS("using min %u lanes per VBT\n", | |
| 822 | + min_lane_count); | |
| 823 | + } | |
| 824 | + | |
| 825 | + if (dev_priv->vbt.edp_rate) { | |
| 826 | + min_clock = min(dev_priv->vbt.edp_rate >> 3, max_clock); | |
| 827 | + DRM_DEBUG_KMS("using min %02x link bw per VBT\n", | |
| 828 | + bws[min_clock]); | |
| 829 | + } | |
| 792 | 830 | } |
| 793 | 831 | |
| 794 | 832 | for (; bpp >= 6*3; bpp -= 2*3) { |
| 795 | 833 | mode_rate = intel_dp_link_required(adjusted_mode->crtc_clock, |
| 796 | 834 | bpp); |
| 797 | 835 | |
| 798 | − for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { | |
| 799 | − for (clock = 0; clock <= max_clock; clock++) { | |
| 836 | + for (lane_count = min_lane_count; lane_count <= max_lane_count; lane_count <<= 1) { | |
| 837 | + for (clock = min_clock; clock <= max_clock; clock++) { | |
| 800 | 838 | link_clock = drm_dp_bw_code_to_link_rate(bws[clock]); |
| 801 | 839 | link_avail = intel_dp_max_data_rate(link_clock, |
| 802 | 840 | lane_count); |
| @@ -387,6 +387,15 @@ static bool intel_fb_initial_config(struct drm_fb_helper *fb_helper, · 386 unmodified lines | ||
| 387 | 387 | height); |
| 388 | 388 | } |
| 389 | 389 | |
| 390 | + /* No preferred mode marked by the EDID? Are there any modes? */ | |
| 391 | + if (!modes[i] && !list_empty(&connector->modes)) { | |
| 392 | + DRM_DEBUG_KMS("using first mode listed on connector %s\n", | |
| 393 | + drm_get_connector_name(connector)); | |
| 394 | + modes[i] = list_first_entry(&connector->modes, | |
| 395 | + struct drm_display_mode, | |
| 396 | + head); | |
| 397 | + } | |
| 398 | + | |
| 390 | 399 | /* last resort: use current mode */ |
| 391 | 400 | if (!modes[i]) { |
| 392 | 401 | /* |
| @@ -193,7 +193,7 @@ intel_overlay_map_regs(struct intel_overlay *overlay) · 192 unmodified lines | ||
| 193 | 193 | struct overlay_registers __iomem *regs; |
| 194 | 194 | |
| 195 | 195 | if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) |
| 196 | − regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_obj->handle->vaddr; | |
| 196 | + regs = (struct overlay_registers __iomem *)overlay->reg_bo->phys_handle->vaddr; | |
| 197 | 197 | else |
| 198 | 198 | regs = io_mapping_map_wc(dev_priv->gtt.mappable, |
| 199 | 199 | i915_gem_obj_ggtt_offset(overlay->reg_bo)); |
| @@ -1340,14 +1340,12 @@ void intel_setup_overlay(struct drm_device *dev) · 1140 unmodified lines | ||
| 1340 | 1340 | overlay->reg_bo = reg_bo; |
| 1341 | 1341 | |
| 1342 | 1342 | if (OVERLAY_NEEDS_PHYSICAL(dev)) { |
| 1343 | − ret = i915_gem_attach_phys_object(dev, reg_bo, | |
| 1344 | − I915_GEM_PHYS_OVERLAY_REGS, | |
| 1345 | − PAGE_SIZE); | |
| 1343 | + ret = i915_gem_object_attach_phys(reg_bo, PAGE_SIZE); | |
| 1346 | 1344 | if (ret) { |
| 1347 | 1345 | DRM_ERROR("failed to attach phys overlay regs\n"); |
| 1348 | 1346 | goto out_free_bo; |
| 1349 | 1347 | } |
| 1350 | − overlay->flip_addr = reg_bo->phys_obj->handle->busaddr; | |
| 1348 | + overlay->flip_addr = reg_bo->phys_handle->busaddr; | |
| 1351 | 1349 | } else { |
| 1352 | 1350 | ret = i915_gem_obj_ggtt_pin(reg_bo, PAGE_SIZE, PIN_MAPPABLE); |
| 1353 | 1351 | if (ret) { |
| @@ -1428,7 +1426,7 @@ intel_overlay_map_regs_atomic(struct intel_overlay *overlay) · 74 unmodified lines | ||
| 1428 | 1426 | /* Cast to make sparse happy, but it's wc memory anyway, so |
| 1429 | 1427 | * equivalent to the wc io mapping on X86. */ |
| 1430 | 1428 | regs = (struct overlay_registers __iomem *) |
| 1431 | − overlay->reg_bo->phys_obj->handle->vaddr; | |
| 1429 | + overlay->reg_bo->phys_handle->vaddr; | |
| 1432 | 1430 | else |
| 1433 | 1431 | regs = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, |
| 1434 | 1432 | i915_gem_obj_ggtt_offset(overlay->reg_bo)); |
| @@ -1462,7 +1460,7 @@ intel_overlay_capture_error_state(struct drm_device *dev) · 27 unmodified lines | ||
| 1462 | 1460 | error->dovsta = I915_READ(DOVSTA); |
| 1463 | 1461 | error->isr = I915_READ(ISR); |
| 1464 | 1462 | if (OVERLAY_NEEDS_PHYSICAL(overlay->dev)) |
| 1465 | − error->base = (__force long)overlay->reg_bo->phys_obj->handle->vaddr; | |
| 1463 | + error->base = (__force long)overlay->reg_bo->phys_handle->vaddr; | |
| 1466 | 1464 | else |
| 1467 | 1465 | error->base = i915_gem_obj_ggtt_offset(overlay->reg_bo); |
| 1468 | 1466 | |
| @@ -492,6 +492,7 @@ void intel_panel_set_backlight(struct intel_connector *connector, u32 level, · 491 unmodified lines | ||
| 492 | 492 | enum pipe pipe = intel_get_pipe_from_connector(connector); |
| 493 | 493 | u32 freq; |
| 494 | 494 | unsigned long flags; |
| 495 | + u64 n; | |
| 495 | 496 | |
| 496 | 497 | if (!panel->backlight.present || pipe == INVALID_PIPE) |
| 497 | 498 | return; |
| @@ -502,10 +503,9 @@ void intel_panel_set_backlight(struct intel_connector *connector, u32 level, · 4 unmodified lines | ||
| 502 | 503 | |
| 503 | 504 | /* scale to hardware max, but be careful to not overflow */ |
| 504 | 505 | freq = panel->backlight.max; |
| 505 | − if (freq < max) | |
| 506 | − level = level * freq / max; | |
| 507 | − else | |
| 508 | − level = freq / max * level; | |
| 506 | + n = (u64)level * freq; | |
| 507 | + do_div(n, max); | |
| 508 | + level = n; | |
| 509 | 509 | |
| 510 | 510 | panel->backlight.level = level; |
| 511 | 511 | if (panel->backlight.device) |
| @@ -2095,6 +2095,43 @@ static void intel_print_wm_latency(struct drm_device *dev, · 2094 unmodified lines | ||
| 2095 | 2095 | } |
| 2096 | 2096 | } |
| 2097 | 2097 | |
| 2098 | +static bool ilk_increase_wm_latency(struct drm_i915_private *dev_priv, | |
| 2099 | + uint16_t wm[5], uint16_t min) | |
| 2100 | +{ | |
| 2101 | + int level, max_level = ilk_wm_max_level(dev_priv->dev); | |
| 2102 | + | |
| 2103 | + if (wm[0] >= min) | |
| 2104 | + return false; | |
| 2105 | + | |
| 2106 | + wm[0] = max(wm[0], min); | |
| 2107 | + for (level = 1; level <= max_level; level++) | |
| 2108 | + wm[level] = max_t(uint16_t, wm[level], DIV_ROUND_UP(min, 5)); | |
| 2109 | + | |
| 2110 | + return true; | |
| 2111 | +} | |
| 2112 | + | |
| 2113 | +static void snb_wm_latency_quirk(struct drm_device *dev) | |
| 2114 | +{ | |
| 2115 | + struct drm_i915_private *dev_priv = dev->dev_private; | |
| 2116 | + bool changed; | |
| 2117 | + | |
| 2118 | + /* | |
| 2119 | + * The BIOS provided WM memory latency values are often | |
| 2120 | + * inadequate for high resolution displays. Adjust them. | |
| 2121 | + */ | |
| 2122 | + changed = ilk_increase_wm_latency(dev_priv, dev_priv->wm.pri_latency, 12) | | |
| 2123 | + ilk_increase_wm_latency(dev_priv, dev_priv->wm.spr_latency, 12) | | |
| 2124 | + ilk_increase_wm_latency(dev_priv, dev_priv->wm.cur_latency, 12); | |
| 2125 | + | |
| 2126 | + if (!changed) | |
| 2127 | + return; | |
| 2128 | + | |
| 2129 | + DRM_DEBUG_KMS("WM latency values increased to avoid potential underruns\n"); | |
| 2130 | + intel_print_wm_latency(dev, "Primary", dev_priv->wm.pri_latency); | |
| 2131 | + intel_print_wm_latency(dev, "Sprite", dev_priv->wm.spr_latency); | |
| 2132 | + intel_print_wm_latency(dev, "Cursor", dev_priv->wm.cur_latency); | |
| 2133 | +} | |
| 2134 | + | |
| 2098 | 2135 | static void ilk_setup_wm_latency(struct drm_device *dev) |
| 2099 | 2136 | { |
| 2100 | 2137 | struct drm_i915_private *dev_priv = dev->dev_private; |
| @@ -2112,6 +2149,9 @@ static void ilk_setup_wm_latency(struct drm_device *dev) · 11 unmodified lines | ||
| 2112 | 2149 | intel_print_wm_latency(dev, "Primary", dev_priv->wm.pri_latency); |
| 2113 | 2150 | intel_print_wm_latency(dev, "Sprite", dev_priv->wm.spr_latency); |
| 2114 | 2151 | intel_print_wm_latency(dev, "Cursor", dev_priv->wm.cur_latency); |
| 2152 | + | |
| 2153 | + if (IS_GEN6(dev)) | |
| 2154 | + snb_wm_latency_quirk(dev); | |
| 2115 | 2155 | } |
| 2116 | 2156 | |
| 2117 | 2157 | static void ilk_compute_wm_parameters(struct drm_crtc *crtc, |
| @@ -2424,8 +2424,8 @@ intel_sdvo_connector_init(struct intel_sdvo_connector *connector, · 2423 unmodified lines | ||
| 2424 | 2424 | if (ret < 0) |
| 2425 | 2425 | goto err1; |
| 2426 | 2426 | |
| 2427 | − ret = sysfs_create_link(&encoder->ddc.dev.kobj, | |
| 2428 | − &drm_connector->kdev->kobj, | |
| 2427 | + ret = sysfs_create_link(&drm_connector->kdev->kobj, | |
| 2428 | + &encoder->ddc.dev.kobj, | |
| 2429 | 2429 | encoder->ddc.dev.kobj.name); |
| 2430 | 2430 | if (ret < 0) |
| 2431 | 2431 | goto err2; |
| @@ -185,6 +185,8 @@ static void vlv_force_wake_reset(struct drm_i915_private *dev_priv) · 184 unmodified lines | ||
| 185 | 185 | { |
| 186 | 186 | __raw_i915_write32(dev_priv, FORCEWAKE_VLV, |
| 187 | 187 | _MASKED_BIT_DISABLE(0xffff)); |
| 188 | + __raw_i915_write32(dev_priv, FORCEWAKE_MEDIA_VLV, | |
| 189 | + _MASKED_BIT_DISABLE(0xffff)); | |
| 188 | 190 | /* something from same cacheline, but !FORCEWAKE_VLV */ |
| 189 | 191 | __raw_posting_read(dev_priv, FORCEWAKE_ACK_VLV); |
| 190 | 192 | } |
| @@ -1009,7 +1009,7 @@ exec_clkcmp(struct nv50_disp_priv *priv, int head, int id, · 1008 unmodified lines | ||
| 1009 | 1009 | } |
| 1010 | 1010 | |
| 1011 | 1011 | if (outp == 8) |
| 1012 | − return false; | |
| 1012 | + return conf; | |
| 1013 | 1013 | |
| 1014 | 1014 | data = exec_lookup(priv, head, outp, ctrl, dcb, &ver, &hdr, &cnt, &len, &info1); |
| 1015 | 1015 | if (data == 0x0000) |
| @@ -863,7 +863,7 @@ gm107_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) · 862 unmodified lines | ||
| 863 | 863 | { |
| 864 | 864 | mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS); |
| 865 | 865 | mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS); |
| 866 | − mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW); | |
| 866 | + mmio_data(0x200000, 0x1000, NV_MEM_ACCESS_RW); | |
| 867 | 867 | |
| 868 | 868 | mmio_list(0x40800c, 0x00000000, 8, 1); |
| 869 | 869 | mmio_list(0x408010, 0x80000000, 0, 0); |
| @@ -877,6 +877,8 @@ gm107_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) · 7 unmodified lines | ||
| 877 | 877 | mmio_list(0x418e24, 0x00000000, 8, 0); |
| 878 | 878 | mmio_list(0x418e28, 0x80000030, 0, 0); |
| 879 | 879 | |
| 880 | + mmio_list(0x4064c8, 0x018002c0, 0, 0); | |
| 881 | + | |
| 880 | 882 | mmio_list(0x418810, 0x80000000, 12, 2); |
| 881 | 883 | mmio_list(0x419848, 0x10000000, 12, 2); |
| 882 | 884 | mmio_list(0x419c2c, 0x10000000, 12, 2); |
| @@ -168,7 +168,8 @@ nouveau_bios_shadow_prom(struct nouveau_bios *bios) · 167 unmodified lines | ||
| 168 | 168 | */ |
| 169 | 169 | i = 16; |
| 170 | 170 | do { |
| 171 | − if ((nv_rd32(bios, 0x300000) & 0xffff) == 0xaa55) | |
| 171 | + u32 data = le32_to_cpu(nv_rd32(bios, 0x300000)) & 0xffff; | |
| 172 | + if (data == 0xaa55) | |
| 172 | 173 | break; |
| 173 | 174 | } while (i--); |
| 174 | 175 | |
| @@ -176,14 +177,15 @@ nouveau_bios_shadow_prom(struct nouveau_bios *bios) · 1 unmodified line | ||
| 176 | 177 | goto out; |
| 177 | 178 | |
| 178 | 179 | /* read entire bios image to system memory */ |
| 179 | − bios->size = ((nv_rd32(bios, 0x300000) >> 16) & 0xff) * 512; | |
| 180 | + bios->size = (le32_to_cpu(nv_rd32(bios, 0x300000)) >> 16) & 0xff; | |
| 181 | + bios->size = bios->size * 512; | |
| 180 | 182 | if (!bios->size) |
| 181 | 183 | goto out; |
| 182 | 184 | |
| 183 | 185 | bios->data = kmalloc(bios->size, GFP_KERNEL); |
| 184 | 186 | if (bios->data) { |
| 185 | − for (i = 0; i < bios->size; i+=4) | |
| 186 | − nv_wo32(bios, i, nv_rd32(bios, 0x300000 + i)); | |
| 187 | + for (i = 0; i < bios->size; i += 4) | |
| 188 | + ((u32 *)bios->data)[i/4] = nv_rd32(bios, 0x300000 + i); | |
| 187 | 189 | } |
| 188 | 190 | |
| 189 | 191 | /* check the PCI record header */ |
| @@ -40,6 +40,7 @@ pwm_info(struct nouveau_therm *therm, int line) · 39 unmodified lines | ||
| 40 | 40 | case 0x00: return 2; |
| 41 | 41 | case 0x19: return 1; |
| 42 | 42 | case 0x1c: return 0; |
| 43 | + case 0x1e: return 2; | |
| 43 | 44 | default: |
| 44 | 45 | break; |
| 45 | 46 | } |
| @@ -389,9 +389,6 @@ bool nouveau_acpi_rom_supported(struct pci_dev *pdev) · 388 unmodified lines | ||
| 389 | 389 | acpi_status status; |
| 390 | 390 | acpi_handle dhandle, rom_handle; |
| 391 | 391 | |
| 392 | − if (!nouveau_dsm_priv.dsm_detected && !nouveau_dsm_priv.optimus_detected) | |
| 393 | − return false; | |
| 394 | − | |
| 395 | 392 | dhandle = ACPI_HANDLE(&pdev->dev); |
| 396 | 393 | if (!dhandle) |
| 397 | 394 | return false; |
| @@ -764,9 +764,9 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, · 763 unmodified lines | ||
| 764 | 764 | } |
| 765 | 765 | |
| 766 | 766 | ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence); |
| 767 | − mutex_unlock(&chan->cli->mutex); | |
| 768 | 767 | if (ret) |
| 769 | 768 | goto fail_unreserve; |
| 769 | + mutex_unlock(&chan->cli->mutex); | |
| 770 | 770 | |
| 771 | 771 | /* Update the crtc struct and cleanup */ |
| 772 | 772 | crtc->primary->fb = fb; |
| @@ -1177,27 +1177,43 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, · 1176 unmodified lines | ||
| 1177 | 1177 | |
| 1178 | 1178 | /* Set NUM_BANKS. */ |
| 1179 | 1179 | if (rdev->family >= CHIP_TAHITI) { |
| 1180 | − unsigned tileb, index, num_banks, tile_split_bytes; | |
| 1180 | + unsigned index, num_banks; | |
| 1181 | 1181 | |
| 1182 | − /* Calculate the macrotile mode index. */ | |
| 1183 | − tile_split_bytes = 64 << tile_split; | |
| 1184 | − tileb = 8 * 8 * target_fb->bits_per_pixel / 8; | |
| 1185 | − tileb = min(tile_split_bytes, tileb); | |
| 1182 | + if (rdev->family >= CHIP_BONAIRE) { | |
| 1183 | + unsigned tileb, tile_split_bytes; | |
| 1186 | 1184 | |
| 1187 | − for (index = 0; tileb > 64; index++) { | |
| 1188 | − tileb >>= 1; | |
| 1189 | − } | |
| 1185 | + /* Calculate the macrotile mode index. */ | |
| 1186 | + tile_split_bytes = 64 << tile_split; | |
| 1187 | + tileb = 8 * 8 * target_fb->bits_per_pixel / 8; | |
| 1188 | + tileb = min(tile_split_bytes, tileb); | |
| 1190 | 1189 | |
| 1191 | − if (index >= 16) { | |
| 1192 | − DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n", | |
| 1193 | − target_fb->bits_per_pixel, tile_split); | |
| 1194 | − return -EINVAL; | |
| 1195 | − } | |
| 1190 | + for (index = 0; tileb > 64; index++) | |
| 1191 | + tileb >>= 1; | |
| 1192 | + | |
| 1193 | + if (index >= 16) { | |
| 1194 | + DRM_ERROR("Wrong screen bpp (%u) or tile split (%u)\n", | |
| 1195 | + target_fb->bits_per_pixel, tile_split); | |
| 1196 | + return -EINVAL; | |
| 1197 | + } | |
| 1196 | 1198 | |
| 1197 | − if (rdev->family >= CHIP_BONAIRE) | |
| 1198 | 1199 | num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; |
| 1199 | − else | |
| 1200 | + } else { | |
| 1201 | + switch (target_fb->bits_per_pixel) { | |
| 1202 | + case 8: | |
| 1203 | + index = 10; | |
| 1204 | + break; | |
| 1205 | + case 16: | |
| 1206 | + index = SI_TILE_MODE_COLOR_2D_SCANOUT_16BPP; | |
| 1207 | + break; | |
| 1208 | + default: | |
| 1209 | + case 32: | |
| 1210 | + index = SI_TILE_MODE_COLOR_2D_SCANOUT_32BPP; | |
| 1211 | + break; | |
| 1212 | + } | |
| 1213 | + | |
| 1200 | 1214 | num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3; |
| 1215 | + } | |
| 1216 | + | |
| 1201 | 1217 | fb_format |= EVERGREEN_GRPH_NUM_BANKS(num_banks); |
| 1202 | 1218 | } else { |
| 1203 | 1219 | /* NI and older. */ |
| @@ -1720,8 +1736,9 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) · 516 unmodified lines | ||
| 1720 | 1736 | } |
| 1721 | 1737 | /* otherwise, pick one of the plls */ |
| 1722 | 1738 | if ((rdev->family == CHIP_KAVERI) || |
| 1723 | − (rdev->family == CHIP_KABINI)) { | |
| 1724 | − /* KB/KV has PPLL1 and PPLL2 */ | |
| 1739 | + (rdev->family == CHIP_KABINI) || | |
| 1740 | + (rdev->family == CHIP_MULLINS)) { | |
| 1741 | + /* KB/KV/ML has PPLL1 and PPLL2 */ | |
| 1725 | 1742 | pll_in_use = radeon_get_pll_use_mask(crtc); |
| 1726 | 1743 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
| 1727 | 1744 | return ATOM_PPLL2; |
| @@ -1885,6 +1902,9 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, · 157 unmodified lines | ||
| 1885 | 1902 | (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) |
| 1886 | 1903 | is_tvcv = true; |
| 1887 | 1904 | |
| 1905 | + if (!radeon_crtc->adjusted_clock) | |
| 1906 | + return -EINVAL; | |
| 1907 | + | |
| 1888 | 1908 | atombios_crtc_set_pll(crtc, adjusted_mode); |
| 1889 | 1909 | |
| 1890 | 1910 | if (ASIC_IS_DCE4(rdev)) |
| @@ -366,11 +366,11 @@ static void radeon_dp_probe_oui(struct radeon_connector *radeon_connector) · 365 unmodified lines | ||
| 366 | 366 | if (!(dig_connector->dpcd[DP_DOWN_STREAM_PORT_COUNT] & DP_OUI_SUPPORT)) |
| 367 | 367 | return; |
| 368 | 368 | |
| 369 | − if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3)) | |
| 369 | + if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_SINK_OUI, buf, 3) == 3) | |
| 370 | 370 | DRM_DEBUG_KMS("Sink OUI: %02hx%02hx%02hx\n", |
| 371 | 371 | buf[0], buf[1], buf[2]); |
| 372 | 372 | |
| 373 | − if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3)) | |
| 373 | + if (drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_BRANCH_OUI, buf, 3) == 3) | |
| 374 | 374 | DRM_DEBUG_KMS("Branch OUI: %02hx%02hx%02hx\n", |
| 375 | 375 | buf[0], buf[1], buf[2]); |
| 376 | 376 | } |
| @@ -419,21 +419,23 @@ int radeon_dp_get_panel_mode(struct drm_encoder *encoder, · 42 unmodified lines | ||
| 419 | 419 | |
| 420 | 420 | if (dp_bridge != ENCODER_OBJECT_ID_NONE) { |
| 421 | 421 | /* DP bridge chips */ |
| 422 | − drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, | |
| 423 | − DP_EDP_CONFIGURATION_CAP, &tmp); | |
| 424 | − if (tmp & 1) | |
| 425 | − panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; | |
| 426 | − else if ((dp_bridge == ENCODER_OBJECT_ID_NUTMEG) || | |
| 427 | − (dp_bridge == ENCODER_OBJECT_ID_TRAVIS)) | |
| 428 | − panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE; | |
| 429 | − else | |
| 430 | − panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; | |
| 422 | + if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, | |
| 423 | + DP_EDP_CONFIGURATION_CAP, &tmp) == 1) { | |
| 424 | + if (tmp & 1) | |
| 425 | + panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; | |
| 426 | + else if ((dp_bridge == ENCODER_OBJECT_ID_NUTMEG) || | |
| 427 | + (dp_bridge == ENCODER_OBJECT_ID_TRAVIS)) | |
| 428 | + panel_mode = DP_PANEL_MODE_INTERNAL_DP1_MODE; | |
| 429 | + else | |
| 430 | + panel_mode = DP_PANEL_MODE_EXTERNAL_DP_MODE; | |
| 431 | + } | |
| 431 | 432 | } else if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
| 432 | 433 | /* eDP */ |
| 433 | − drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, | |
| 434 | − DP_EDP_CONFIGURATION_CAP, &tmp); | |
| 435 | − if (tmp & 1) | |
| 436 | − panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; | |
| 434 | + if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, | |
| 435 | + DP_EDP_CONFIGURATION_CAP, &tmp) == 1) { | |
| 436 | + if (tmp & 1) | |
| 437 | + panel_mode = DP_PANEL_MODE_INTERNAL_DP2_MODE; | |
| 438 | + } | |
| 437 | 439 | } |
| 438 | 440 | |
| 439 | 441 | return panel_mode; |
| @@ -809,11 +811,15 @@ void radeon_dp_link_train(struct drm_encoder *encoder, · 369 unmodified lines | ||
| 809 | 811 | else |
| 810 | 812 | dp_info.enc_id |= ATOM_DP_CONFIG_LINK_A; |
| 811 | 813 | |
| 812 | − drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp); | |
| 813 | − if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED)) | |
| 814 | − dp_info.tp3_supported = true; | |
| 815 | − else | |
| 814 | + if (drm_dp_dpcd_readb(&radeon_connector->ddc_bus->aux, DP_MAX_LANE_COUNT, &tmp) | |
| 815 | + == 1) { | |
| 816 | + if (ASIC_IS_DCE5(rdev) && (tmp & DP_TPS3_SUPPORTED)) | |
| 817 | + dp_info.tp3_supported = true; | |
| 818 | + else | |
| 819 | + dp_info.tp3_supported = false; | |
| 820 | + } else { | |
| 816 | 821 | dp_info.tp3_supported = false; |
| 822 | + } | |
| 817 | 823 | |
| 818 | 824 | memcpy(dp_info.dpcd, dig_connector->dpcd, DP_RECEIVER_CAP_SIZE); |
| 819 | 825 | dp_info.rdev = rdev; |
| @@ -63,6 +63,12 @@ MODULE_FIRMWARE("radeon/KABINI_ce.bin"); · 62 unmodified lines | ||
| 63 | 63 | MODULE_FIRMWARE("radeon/KABINI_mec.bin"); |
| 64 | 64 | MODULE_FIRMWARE("radeon/KABINI_rlc.bin"); |
| 65 | 65 | MODULE_FIRMWARE("radeon/KABINI_sdma.bin"); |
| 66 | +MODULE_FIRMWARE("radeon/MULLINS_pfp.bin"); | |
| 67 | +MODULE_FIRMWARE("radeon/MULLINS_me.bin"); | |
| 68 | +MODULE_FIRMWARE("radeon/MULLINS_ce.bin"); | |
| 69 | +MODULE_FIRMWARE("radeon/MULLINS_mec.bin"); | |
| 70 | +MODULE_FIRMWARE("radeon/MULLINS_rlc.bin"); | |
| 71 | +MODULE_FIRMWARE("radeon/MULLINS_sdma.bin"); | |
| 66 | 72 | |
| 67 | 73 | extern int r600_ih_ring_alloc(struct radeon_device *rdev); |
| 68 | 74 | extern void r600_ih_ring_fini(struct radeon_device *rdev); |
| @@ -1473,6 +1479,43 @@ static const u32 hawaii_mgcg_cgcg_init[] = · 1404 unmodified lines | ||
| 1473 | 1479 | 0xd80c, 0xff000ff0, 0x00000100 |
| 1474 | 1480 | }; |
| 1475 | 1481 | |
| 1482 | +static const u32 godavari_golden_registers[] = | |
| 1483 | +{ | |
| 1484 | + 0x55e4, 0xff607fff, 0xfc000100, | |
| 1485 | + 0x6ed8, 0x00010101, 0x00010000, | |
| 1486 | + 0x9830, 0xffffffff, 0x00000000, | |
| 1487 | + 0x98302, 0xf00fffff, 0x00000400, | |
| 1488 | + 0x6130, 0xffffffff, 0x00010000, | |
| 1489 | + 0x5bb0, 0x000000f0, 0x00000070, | |
| 1490 | + 0x5bc0, 0xf0311fff, 0x80300000, | |
| 1491 | + 0x98f8, 0x73773777, 0x12010001, | |
| 1492 | + 0x98fc, 0xffffffff, 0x00000010, | |
| 1493 | + 0x8030, 0x00001f0f, 0x0000100a, | |
| 1494 | + 0x2f48, 0x73773777, 0x12010001, | |
| 1495 | + 0x2408, 0x000fffff, 0x000c007f, | |
| 1496 | + 0x8a14, 0xf000003f, 0x00000007, | |
| 1497 | + 0x8b24, 0xffffffff, 0x00ff0fff, | |
| 1498 | + 0x30a04, 0x0000ff0f, 0x00000000, | |
| 1499 | + 0x28a4c, 0x07ffffff, 0x06000000, | |
| 1500 | + 0x4d8, 0x00000fff, 0x00000100, | |
| 1501 | + 0xd014, 0x00010000, 0x00810001, | |
| 1502 | + 0xd814, 0x00010000, 0x00810001, | |
| 1503 | + 0x3e78, 0x00000001, 0x00000002, | |
| 1504 | + 0xc768, 0x00000008, 0x00000008, | |
| 1505 | + 0xc770, 0x00000f00, 0x00000800, | |
| 1506 | + 0xc774, 0x00000f00, 0x00000800, | |
| 1507 | + 0xc798, 0x00ffffff, 0x00ff7fbf, | |
| 1508 | + 0xc79c, 0x00ffffff, 0x00ff7faf, | |
| 1509 | + 0x8c00, 0x000000ff, 0x00000001, | |
| 1510 | + 0x214f8, 0x01ff01ff, 0x00000002, | |
| 1511 | + 0x21498, 0x007ff800, 0x00200000, | |
| 1512 | + 0x2015c, 0xffffffff, 0x00000f40, | |
| 1513 | + 0x88c4, 0x001f3ae3, 0x00000082, | |
| 1514 | + 0x88d4, 0x0000001f, 0x00000010, | |
| 1515 | + 0x30934, 0xffffffff, 0x00000000 | |
| 1516 | +}; | |
| 1517 | + | |
| 1518 | + | |
| 1476 | 1519 | static void cik_init_golden_registers(struct radeon_device *rdev) |
| 1477 | 1520 | { |
| 1478 | 1521 | switch (rdev->family) { |
| @@ -1504,6 +1547,20 @@ static void cik_init_golden_registers(struct radeon_device *rdev) · 25 unmodified lines | ||
| 1504 | 1547 | kalindi_golden_spm_registers, |
| 1505 | 1548 | (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); |
| 1506 | 1549 | break; |
| 1550 | + case CHIP_MULLINS: | |
| 1551 | + radeon_program_register_sequence(rdev, | |
| 1552 | + kalindi_mgcg_cgcg_init, | |
| 1553 | + (const u32)ARRAY_SIZE(kalindi_mgcg_cgcg_init)); | |
| 1554 | + radeon_program_register_sequence(rdev, | |
| 1555 | + godavari_golden_registers, | |
| 1556 | + (const u32)ARRAY_SIZE(godavari_golden_registers)); | |
| 1557 | + radeon_program_register_sequence(rdev, | |
| 1558 | + kalindi_golden_common_registers, | |
| 1559 | + (const u32)ARRAY_SIZE(kalindi_golden_common_registers)); | |
| 1560 | + radeon_program_register_sequence(rdev, | |
| 1561 | + kalindi_golden_spm_registers, | |
| 1562 | + (const u32)ARRAY_SIZE(kalindi_golden_spm_registers)); | |
| 1563 | + break; | |
| 1507 | 1564 | case CHIP_KAVERI: |
| 1508 | 1565 | radeon_program_register_sequence(rdev, |
| 1509 | 1566 | spectre_mgcg_cgcg_init, |
| @@ -1834,6 +1891,15 @@ static int cik_init_microcode(struct radeon_device *rdev) · 324 unmodified lines | ||
| 1834 | 1891 | rlc_req_size = KB_RLC_UCODE_SIZE * 4; |
| 1835 | 1892 | sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; |
| 1836 | 1893 | break; |
| 1894 | + case CHIP_MULLINS: | |
| 1895 | + chip_name = "MULLINS"; | |
| 1896 | + pfp_req_size = CIK_PFP_UCODE_SIZE * 4; | |
| 1897 | + me_req_size = CIK_ME_UCODE_SIZE * 4; | |
| 1898 | + ce_req_size = CIK_CE_UCODE_SIZE * 4; | |
| 1899 | + mec_req_size = CIK_MEC_UCODE_SIZE * 4; | |
| 1900 | + rlc_req_size = ML_RLC_UCODE_SIZE * 4; | |
| 1901 | + sdma_req_size = CIK_SDMA_UCODE_SIZE * 4; | |
| 1902 | + break; | |
| 1837 | 1903 | default: BUG(); |
| 1838 | 1904 | } |
| 1839 | 1905 | |
| @@ -3272,6 +3338,7 @@ static void cik_gpu_init(struct radeon_device *rdev) · 1432 unmodified lines | ||
| 3272 | 3338 | gb_addr_config = BONAIRE_GB_ADDR_CONFIG_GOLDEN; |
| 3273 | 3339 | break; |
| 3274 | 3340 | case CHIP_KABINI: |
| 3341 | + case CHIP_MULLINS: | |
| 3275 | 3342 | default: |
| 3276 | 3343 | rdev->config.cik.max_shader_engines = 1; |
| 3277 | 3344 | rdev->config.cik.max_tile_pipes = 2; |
| @@ -3702,6 +3769,7 @@ int cik_copy_cpdma(struct radeon_device *rdev, · 424 unmodified lines | ||
| 3702 | 3769 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 3703 | 3770 | if (r) { |
| 3704 | 3771 | radeon_ring_unlock_undo(rdev, ring); |
| 3772 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 3705 | 3773 | return r; |
| 3706 | 3774 | } |
| 3707 | 3775 | |
| @@ -5800,6 +5868,9 @@ static int cik_rlc_resume(struct radeon_device *rdev) · 2092 unmodified lines | ||
| 5800 | 5868 | case CHIP_KABINI: |
| 5801 | 5869 | size = KB_RLC_UCODE_SIZE; |
| 5802 | 5870 | break; |
| 5871 | + case CHIP_MULLINS: | |
| 5872 | + size = ML_RLC_UCODE_SIZE; | |
| 5873 | + break; | |
| 5803 | 5874 | } |
| 5804 | 5875 | |
| 5805 | 5876 | cik_rlc_stop(rdev); |
| @@ -6548,6 +6619,7 @@ void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer) · 742 unmodified lines | ||
| 6548 | 6619 | buffer[count++] = cpu_to_le32(0x00000000); |
| 6549 | 6620 | break; |
| 6550 | 6621 | case CHIP_KABINI: |
| 6622 | + case CHIP_MULLINS: | |
| 6551 | 6623 | buffer[count++] = cpu_to_le32(0x00000000); /* XXX */ |
| 6552 | 6624 | buffer[count++] = cpu_to_le32(0x00000000); |
| 6553 | 6625 | break; |
| @@ -6693,6 +6765,19 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev) · 139 unmodified lines | ||
| 6693 | 6765 | WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); |
| 6694 | 6766 | WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); |
| 6695 | 6767 | } |
| 6768 | + /* pflip */ | |
| 6769 | + if (rdev->num_crtc >= 2) { | |
| 6770 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); | |
| 6771 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); | |
| 6772 | + } | |
| 6773 | + if (rdev->num_crtc >= 4) { | |
| 6774 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, 0); | |
| 6775 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, 0); | |
| 6776 | + } | |
| 6777 | + if (rdev->num_crtc >= 6) { | |
| 6778 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, 0); | |
| 6779 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, 0); | |
| 6780 | + } | |
| 6696 | 6781 | |
| 6697 | 6782 | /* dac hotplug */ |
| 6698 | 6783 | WREG32(DAC_AUTODETECT_INT_CONTROL, 0); |
| @@ -7049,6 +7134,25 @@ int cik_irq_set(struct radeon_device *rdev) · 350 unmodified lines | ||
| 7049 | 7134 | WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6); |
| 7050 | 7135 | } |
| 7051 | 7136 | |
| 7137 | + if (rdev->num_crtc >= 2) { | |
| 7138 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, | |
| 7139 | + GRPH_PFLIP_INT_MASK); | |
| 7140 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, | |
| 7141 | + GRPH_PFLIP_INT_MASK); | |
| 7142 | + } | |
| 7143 | + if (rdev->num_crtc >= 4) { | |
| 7144 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, | |
| 7145 | + GRPH_PFLIP_INT_MASK); | |
| 7146 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, | |
| 7147 | + GRPH_PFLIP_INT_MASK); | |
| 7148 | + } | |
| 7149 | + if (rdev->num_crtc >= 6) { | |
| 7150 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, | |
| 7151 | + GRPH_PFLIP_INT_MASK); | |
| 7152 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, | |
| 7153 | + GRPH_PFLIP_INT_MASK); | |
| 7154 | + } | |
| 7155 | + | |
| 7052 | 7156 | WREG32(DC_HPD1_INT_CONTROL, hpd1); |
| 7053 | 7157 | WREG32(DC_HPD2_INT_CONTROL, hpd2); |
| 7054 | 7158 | WREG32(DC_HPD3_INT_CONTROL, hpd3); |
| @@ -7085,6 +7189,29 @@ static inline void cik_irq_ack(struct radeon_device *rdev) · 30 unmodified lines | ||
| 7085 | 7189 | rdev->irq.stat_regs.cik.disp_int_cont5 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE5); |
| 7086 | 7190 | rdev->irq.stat_regs.cik.disp_int_cont6 = RREG32(DISP_INTERRUPT_STATUS_CONTINUE6); |
| 7087 | 7191 | |
| 7192 | + rdev->irq.stat_regs.cik.d1grph_int = RREG32(GRPH_INT_STATUS + | |
| 7193 | + EVERGREEN_CRTC0_REGISTER_OFFSET); | |
| 7194 | + rdev->irq.stat_regs.cik.d2grph_int = RREG32(GRPH_INT_STATUS + | |
| 7195 | + EVERGREEN_CRTC1_REGISTER_OFFSET); | |
| 7196 | + if (rdev->num_crtc >= 4) { | |
| 7197 | + rdev->irq.stat_regs.cik.d3grph_int = RREG32(GRPH_INT_STATUS + | |
| 7198 | + EVERGREEN_CRTC2_REGISTER_OFFSET); | |
| 7199 | + rdev->irq.stat_regs.cik.d4grph_int = RREG32(GRPH_INT_STATUS + | |
| 7200 | + EVERGREEN_CRTC3_REGISTER_OFFSET); | |
| 7201 | + } | |
| 7202 | + if (rdev->num_crtc >= 6) { | |
| 7203 | + rdev->irq.stat_regs.cik.d5grph_int = RREG32(GRPH_INT_STATUS + | |
| 7204 | + EVERGREEN_CRTC4_REGISTER_OFFSET); | |
| 7205 | + rdev->irq.stat_regs.cik.d6grph_int = RREG32(GRPH_INT_STATUS + | |
| 7206 | + EVERGREEN_CRTC5_REGISTER_OFFSET); | |
| 7207 | + } | |
| 7208 | + | |
| 7209 | + if (rdev->irq.stat_regs.cik.d1grph_int & GRPH_PFLIP_INT_OCCURRED) | |
| 7210 | + WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, | |
| 7211 | + GRPH_PFLIP_INT_CLEAR); | |
| 7212 | + if (rdev->irq.stat_regs.cik.d2grph_int & GRPH_PFLIP_INT_OCCURRED) | |
| 7213 | + WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, | |
| 7214 | + GRPH_PFLIP_INT_CLEAR); | |
| 7088 | 7215 | if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) |
| 7089 | 7216 | WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, VBLANK_ACK); |
| 7090 | 7217 | if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) |
| @@ -7095,6 +7222,12 @@ static inline void cik_irq_ack(struct radeon_device *rdev) · 4 unmodified lines | ||
| 7095 | 7222 | WREG32(LB_VLINE_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET, VLINE_ACK); |
| 7096 | 7223 | |
| 7097 | 7224 | if (rdev->num_crtc >= 4) { |
| 7225 | + if (rdev->irq.stat_regs.cik.d3grph_int & GRPH_PFLIP_INT_OCCURRED) | |
| 7226 | + WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, | |
| 7227 | + GRPH_PFLIP_INT_CLEAR); | |
| 7228 | + if (rdev->irq.stat_regs.cik.d4grph_int & GRPH_PFLIP_INT_OCCURRED) | |
| 7229 | + WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET, | |
| 7230 | + GRPH_PFLIP_INT_CLEAR); | |
| 7098 | 7231 | if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VBLANK_INTERRUPT) |
| 7099 | 7232 | WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET, VBLANK_ACK); |
| 7100 | 7233 | if (rdev->irq.stat_regs.cik.disp_int_cont2 & LB_D3_VLINE_INTERRUPT) |
| @@ -7106,6 +7239,12 @@ static inline void cik_irq_ack(struct radeon_device *rdev) · 5 unmodified lines | ||
| 7106 | 7239 | } |
| 7107 | 7240 | |
| 7108 | 7241 | if (rdev->num_crtc >= 6) { |
| 7242 | + if (rdev->irq.stat_regs.cik.d5grph_int & GRPH_PFLIP_INT_OCCURRED) | |
| 7243 | + WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, | |
| 7244 | + GRPH_PFLIP_INT_CLEAR); | |
| 7245 | + if (rdev->irq.stat_regs.cik.d6grph_int & GRPH_PFLIP_INT_OCCURRED) | |
| 7246 | + WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET, | |
| 7247 | + GRPH_PFLIP_INT_CLEAR); | |
| 7109 | 7248 | if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VBLANK_INTERRUPT) |
| 7110 | 7249 | WREG32(LB_VBLANK_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET, VBLANK_ACK); |
| 7111 | 7250 | if (rdev->irq.stat_regs.cik.disp_int_cont4 & LB_D5_VLINE_INTERRUPT) |
| @@ -7457,6 +7596,15 @@ restart_ih: · 345 unmodified lines | ||
| 7457 | 7596 | break; |
| 7458 | 7597 | } |
| 7459 | 7598 | break; |
| 7599 | + case 8: /* D1 page flip */ | |
| 7600 | + case 10: /* D2 page flip */ | |
| 7601 | + case 12: /* D3 page flip */ | |
| 7602 | + case 14: /* D4 page flip */ | |
| 7603 | + case 16: /* D5 page flip */ | |
| 7604 | + case 18: /* D6 page flip */ | |
| 7605 | + DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1); | |
| 7606 | + radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1); | |
| 7607 | + break; | |
| 7460 | 7608 | case 42: /* HPD hotplug */ |
| 7461 | 7609 | switch (src_data) { |
| 7462 | 7610 | case 0: |
| @@ -562,6 +562,7 @@ int cik_copy_dma(struct radeon_device *rdev, · 561 unmodified lines | ||
| 562 | 562 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 563 | 563 | if (r) { |
| 564 | 564 | radeon_ring_unlock_undo(rdev, ring); |
| 565 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 565 | 566 | return r; |
| 566 | 567 | } |
| 567 | 568 | |
| @@ -888,6 +888,15 @@ · 887 unmodified lines | ||
| 888 | 888 | # define DC_HPD6_RX_INTERRUPT (1 << 18) |
| 889 | 889 | #define DISP_INTERRUPT_STATUS_CONTINUE6 0x6780 |
| 890 | 890 | |
| 891 | +/* 0x6858, 0x7458, 0x10058, 0x10c58, 0x11858, 0x12458 */ | |
| 892 | +#define GRPH_INT_STATUS 0x6858 | |
| 893 | +# define GRPH_PFLIP_INT_OCCURRED (1 << 0) | |
| 894 | +# define GRPH_PFLIP_INT_CLEAR (1 << 8) | |
| 895 | +/* 0x685c, 0x745c, 0x1005c, 0x10c5c, 0x1185c, 0x1245c */ | |
| 896 | +#define GRPH_INT_CONTROL 0x685c | |
| 897 | +# define GRPH_PFLIP_INT_MASK (1 << 0) | |
| 898 | +# define GRPH_PFLIP_INT_TYPE (1 << 8) | |
| 899 | + | |
| 891 | 900 | #define DAC_AUTODETECT_INT_CONTROL 0x67c8 |
| 892 | 901 | |
| 893 | 902 | #define DC_HPD1_INT_STATUS 0x601c |
| @@ -4371,7 +4371,6 @@ int evergreen_irq_set(struct radeon_device *rdev) · 4370 unmodified lines | ||
| 4371 | 4371 | u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; |
| 4372 | 4372 | u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6; |
| 4373 | 4373 | u32 grbm_int_cntl = 0; |
| 4374 | − u32 grph1 = 0, grph2 = 0, grph3 = 0, grph4 = 0, grph5 = 0, grph6 = 0; | |
| 4375 | 4374 | u32 afmt1 = 0, afmt2 = 0, afmt3 = 0, afmt4 = 0, afmt5 = 0, afmt6 = 0; |
| 4376 | 4375 | u32 dma_cntl, dma_cntl1 = 0; |
| 4377 | 4376 | u32 thermal_int = 0; |
| @@ -4554,15 +4553,21 @@ int evergreen_irq_set(struct radeon_device *rdev) · 176 unmodified lines | ||
| 4554 | 4553 | WREG32(INT_MASK + EVERGREEN_CRTC5_REGISTER_OFFSET, crtc6); |
| 4555 | 4554 | } |
| 4556 | 4555 | |
| 4557 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, grph1); | |
| 4558 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, grph2); | |
| 4556 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, | |
| 4557 | + GRPH_PFLIP_INT_MASK); | |
| 4558 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, | |
| 4559 | + GRPH_PFLIP_INT_MASK); | |
| 4559 | 4560 | if (rdev->num_crtc >= 4) { |
| 4560 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, grph3); | |
| 4561 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, grph4); | |
| 4561 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, | |
| 4562 | + GRPH_PFLIP_INT_MASK); | |
| 4563 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, | |
| 4564 | + GRPH_PFLIP_INT_MASK); | |
| 4562 | 4565 | } |
| 4563 | 4566 | if (rdev->num_crtc >= 6) { |
| 4564 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, grph5); | |
| 4565 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, grph6); | |
| 4567 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, | |
| 4568 | + GRPH_PFLIP_INT_MASK); | |
| 4569 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, | |
| 4570 | + GRPH_PFLIP_INT_MASK); | |
| 4566 | 4571 | } |
| 4567 | 4572 | |
| 4568 | 4573 | WREG32(DC_HPD1_INT_CONTROL, hpd1); |
| @@ -4951,6 +4956,15 @@ restart_ih: · 382 unmodified lines | ||
| 4951 | 4956 | break; |
| 4952 | 4957 | } |
| 4953 | 4958 | break; |
| 4959 | + case 8: /* D1 page flip */ | |
| 4960 | + case 10: /* D2 page flip */ | |
| 4961 | + case 12: /* D3 page flip */ | |
| 4962 | + case 14: /* D4 page flip */ | |
| 4963 | + case 16: /* D5 page flip */ | |
| 4964 | + case 18: /* D6 page flip */ | |
| 4965 | + DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1); | |
| 4966 | + radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1); | |
| 4967 | + break; | |
| 4954 | 4968 | case 42: /* HPD hotplug */ |
| 4955 | 4969 | switch (src_data) { |
| 4956 | 4970 | case 0: |
| @@ -151,6 +151,7 @@ int evergreen_copy_dma(struct radeon_device *rdev, · 150 unmodified lines | ||
| 151 | 151 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 152 | 152 | if (r) { |
| 153 | 153 | radeon_ring_unlock_undo(rdev, ring); |
| 154 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 154 | 155 | return r; |
| 155 | 156 | } |
| 156 | 157 | |
| @@ -546,6 +546,52 @@ static int kv_set_divider_value(struct radeon_device *rdev, · 545 unmodified lines | ||
| 546 | 546 | return 0; |
| 547 | 547 | } |
| 548 | 548 | |
| 549 | +static u32 kv_convert_vid2_to_vid7(struct radeon_device *rdev, | |
| 550 | + struct sumo_vid_mapping_table *vid_mapping_table, | |
| 551 | + u32 vid_2bit) | |
| 552 | +{ | |
| 553 | + struct radeon_clock_voltage_dependency_table *vddc_sclk_table = | |
| 554 | + &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; | |
| 555 | + u32 i; | |
| 556 | + | |
| 557 | + if (vddc_sclk_table && vddc_sclk_table->count) { | |
| 558 | + if (vid_2bit < vddc_sclk_table->count) | |
| 559 | + return vddc_sclk_table->entries[vid_2bit].v; | |
| 560 | + else | |
| 561 | + return vddc_sclk_table->entries[vddc_sclk_table->count - 1].v; | |
| 562 | + } else { | |
| 563 | + for (i = 0; i < vid_mapping_table->num_entries; i++) { | |
| 564 | + if (vid_mapping_table->entries[i].vid_2bit == vid_2bit) | |
| 565 | + return vid_mapping_table->entries[i].vid_7bit; | |
| 566 | + } | |
| 567 | + return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_7bit; | |
| 568 | + } | |
| 569 | +} | |
| 570 | + | |
| 571 | +static u32 kv_convert_vid7_to_vid2(struct radeon_device *rdev, | |
| 572 | + struct sumo_vid_mapping_table *vid_mapping_table, | |
| 573 | + u32 vid_7bit) | |
| 574 | +{ | |
| 575 | + struct radeon_clock_voltage_dependency_table *vddc_sclk_table = | |
| 576 | + &rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk; | |
| 577 | + u32 i; | |
| 578 | + | |
| 579 | + if (vddc_sclk_table && vddc_sclk_table->count) { | |
| 580 | + for (i = 0; i < vddc_sclk_table->count; i++) { | |
| 581 | + if (vddc_sclk_table->entries[i].v == vid_7bit) | |
| 582 | + return i; | |
| 583 | + } | |
| 584 | + return vddc_sclk_table->count - 1; | |
| 585 | + } else { | |
| 586 | + for (i = 0; i < vid_mapping_table->num_entries; i++) { | |
| 587 | + if (vid_mapping_table->entries[i].vid_7bit == vid_7bit) | |
| 588 | + return vid_mapping_table->entries[i].vid_2bit; | |
| 589 | + } | |
| 590 | + | |
| 591 | + return vid_mapping_table->entries[vid_mapping_table->num_entries - 1].vid_2bit; | |
| 592 | + } | |
| 593 | +} | |
| 594 | + | |
| 549 | 595 | static u16 kv_convert_8bit_index_to_voltage(struct radeon_device *rdev, |
| 550 | 596 | u16 voltage) |
| 551 | 597 | { |
| @@ -556,9 +602,9 @@ static u16 kv_convert_2bit_index_to_voltage(struct radeon_device *rdev, · 4 unmodified lines | ||
| 556 | 602 | u32 vid_2bit) |
| 557 | 603 | { |
| 558 | 604 | struct kv_power_info *pi = kv_get_pi(rdev); |
| 559 | − u32 vid_8bit = sumo_convert_vid2_to_vid7(rdev, | |
| 560 | − &pi->sys_info.vid_mapping_table, | |
| 561 | − vid_2bit); | |
| 605 | + u32 vid_8bit = kv_convert_vid2_to_vid7(rdev, | |
| 606 | + &pi->sys_info.vid_mapping_table, | |
| 607 | + vid_2bit); | |
| 562 | 608 | |
| 563 | 609 | return kv_convert_8bit_index_to_voltage(rdev, (u16)vid_8bit); |
| 564 | 610 | } |
| @@ -639,7 +685,7 @@ static int kv_force_lowest_valid(struct radeon_device *rdev) · 74 unmodified lines | ||
| 639 | 685 | |
| 640 | 686 | static int kv_unforce_levels(struct radeon_device *rdev) |
| 641 | 687 | { |
| 642 | − if (rdev->family == CHIP_KABINI) | |
| 688 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) | |
| 643 | 689 | return kv_notify_message_to_smu(rdev, PPSMC_MSG_NoForcedLevel); |
| 644 | 690 | else |
| 645 | 691 | return kv_set_enabled_levels(rdev); |
| @@ -1362,13 +1408,20 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) · 716 unmodified lines | ||
| 1362 | 1408 | struct radeon_uvd_clock_voltage_dependency_table *table = |
| 1363 | 1409 | &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; |
| 1364 | 1410 | int ret; |
| 1411 | + u32 mask; | |
| 1365 | 1412 | |
| 1366 | 1413 | if (!gate) { |
| 1367 | − if (!pi->caps_uvd_dpm || table->count || pi->caps_stable_p_state) | |
| 1414 | + if (table->count) | |
| 1368 | 1415 | pi->uvd_boot_level = table->count - 1; |
| 1369 | 1416 | else |
| 1370 | 1417 | pi->uvd_boot_level = 0; |
| 1371 | 1418 | |
| 1419 | + if (!pi->caps_uvd_dpm || pi->caps_stable_p_state) { | |
| 1420 | + mask = 1 << pi->uvd_boot_level; | |
| 1421 | + } else { | |
| 1422 | + mask = 0x1f; | |
| 1423 | + } | |
| 1424 | + | |
| 1372 | 1425 | ret = kv_copy_bytes_to_smc(rdev, |
| 1373 | 1426 | pi->dpm_table_start + |
| 1374 | 1427 | offsetof(SMU7_Fusion_DpmTable, UvdBootLevel), |
| @@ -1377,11 +1430,9 @@ static int kv_update_uvd_dpm(struct radeon_device *rdev, bool gate) · 2 unmodified lines | ||
| 1377 | 1430 | if (ret) |
| 1378 | 1431 | return ret; |
| 1379 | 1432 | |
| 1380 | − if (!pi->caps_uvd_dpm || | |
| 1381 | − pi->caps_stable_p_state) | |
| 1382 | − kv_send_msg_to_smc_with_parameter(rdev, | |
| 1383 | − PPSMC_MSG_UVDDPM_SetEnabledMask, | |
| 1384 | − (1 << pi->uvd_boot_level)); | |
| 1433 | + kv_send_msg_to_smc_with_parameter(rdev, | |
| 1434 | + PPSMC_MSG_UVDDPM_SetEnabledMask, | |
| 1435 | + mask); | |
| 1385 | 1436 | } |
| 1386 | 1437 | |
| 1387 | 1438 | return kv_enable_uvd_dpm(rdev, !gate); |
| @@ -1617,7 +1668,7 @@ static void kv_dpm_powergate_acp(struct radeon_device *rdev, bool gate) · 229 unmodified lines | ||
| 1617 | 1668 | if (pi->acp_power_gated == gate) |
| 1618 | 1669 | return; |
| 1619 | 1670 | |
| 1620 | − if (rdev->family == CHIP_KABINI) | |
| 1671 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) | |
| 1621 | 1672 | return; |
| 1622 | 1673 | |
| 1623 | 1674 | pi->acp_power_gated = gate; |
| @@ -1786,7 +1837,7 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) · 162 unmodified lines | ||
| 1786 | 1837 | } |
| 1787 | 1838 | } |
| 1788 | 1839 | |
| 1789 | − if (rdev->family == CHIP_KABINI) { | |
| 1840 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { | |
| 1790 | 1841 | if (pi->enable_dpm) { |
| 1791 | 1842 | kv_set_valid_clock_range(rdev, new_ps); |
| 1792 | 1843 | kv_update_dfs_bypass_settings(rdev, new_ps); |
| @@ -1812,6 +1863,8 @@ int kv_dpm_set_power_state(struct radeon_device *rdev) · 19 unmodified lines | ||
| 1812 | 1863 | return ret; |
| 1813 | 1864 | } |
| 1814 | 1865 | kv_update_sclk_t(rdev); |
| 1866 | + if (rdev->family == CHIP_MULLINS) | |
| 1867 | + kv_enable_nb_dpm(rdev); | |
| 1815 | 1868 | } |
| 1816 | 1869 | } else { |
| 1817 | 1870 | if (pi->enable_dpm) { |
| @@ -1862,7 +1915,7 @@ void kv_dpm_reset_asic(struct radeon_device *rdev) · 44 unmodified lines | ||
| 1862 | 1915 | { |
| 1863 | 1916 | struct kv_power_info *pi = kv_get_pi(rdev); |
| 1864 | 1917 | |
| 1865 | − if (rdev->family == CHIP_KABINI) { | |
| 1918 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { | |
| 1866 | 1919 | kv_force_lowest_valid(rdev); |
| 1867 | 1920 | kv_init_graphics_levels(rdev); |
| 1868 | 1921 | kv_program_bootup_state(rdev); |
| @@ -1901,14 +1954,41 @@ static void kv_construct_max_power_limits_table(struct radeon_device *rdev, · 32 unmodified lines | ||
| 1901 | 1954 | static void kv_patch_voltage_values(struct radeon_device *rdev) |
| 1902 | 1955 | { |
| 1903 | 1956 | int i; |
| 1904 | − struct radeon_uvd_clock_voltage_dependency_table *table = | |
| 1957 | + struct radeon_uvd_clock_voltage_dependency_table *uvd_table = | |
| 1905 | 1958 | &rdev->pm.dpm.dyn_state.uvd_clock_voltage_dependency_table; |
| 1959 | + struct radeon_vce_clock_voltage_dependency_table *vce_table = | |
| 1960 | + &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table; | |
| 1961 | + struct radeon_clock_voltage_dependency_table *samu_table = | |
| 1962 | + &rdev->pm.dpm.dyn_state.samu_clock_voltage_dependency_table; | |
| 1963 | + struct radeon_clock_voltage_dependency_table *acp_table = | |
| 1964 | + &rdev->pm.dpm.dyn_state.acp_clock_voltage_dependency_table; | |
| 1906 | 1965 | |
| 1907 | − if (table->count) { | |
| 1908 | − for (i = 0; i < table->count; i++) | |
| 1909 | − table->entries[i].v = | |
| 1966 | + if (uvd_table->count) { | |
| 1967 | + for (i = 0; i < uvd_table->count; i++) | |
| 1968 | + uvd_table->entries[i].v = | |
| 1910 | 1969 | kv_convert_8bit_index_to_voltage(rdev, |
| 1911 | − table->entries[i].v); | |
| 1970 | + uvd_table->entries[i].v); | |
| 1971 | + } | |
| 1972 | + | |
| 1973 | + if (vce_table->count) { | |
| 1974 | + for (i = 0; i < vce_table->count; i++) | |
| 1975 | + vce_table->entries[i].v = | |
| 1976 | + kv_convert_8bit_index_to_voltage(rdev, | |
| 1977 | + vce_table->entries[i].v); | |
| 1978 | + } | |
| 1979 | + | |
| 1980 | + if (samu_table->count) { | |
| 1981 | + for (i = 0; i < samu_table->count; i++) | |
| 1982 | + samu_table->entries[i].v = | |
| 1983 | + kv_convert_8bit_index_to_voltage(rdev, | |
| 1984 | + samu_table->entries[i].v); | |
| 1985 | + } | |
| 1986 | + | |
| 1987 | + if (acp_table->count) { | |
| 1988 | + for (i = 0; i < acp_table->count; i++) | |
| 1989 | + acp_table->entries[i].v = | |
| 1990 | + kv_convert_8bit_index_to_voltage(rdev, | |
| 1991 | + acp_table->entries[i].v); | |
| 1912 | 1992 | } |
| 1913 | 1993 | |
| 1914 | 1994 | } |
| @@ -1941,7 +2021,7 @@ static int kv_force_dpm_highest(struct radeon_device *rdev) · 26 unmodified lines | ||
| 1941 | 2021 | break; |
| 1942 | 2022 | } |
| 1943 | 2023 | |
| 1944 | − if (rdev->family == CHIP_KABINI) | |
| 2024 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) | |
| 1945 | 2025 | return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); |
| 1946 | 2026 | else |
| 1947 | 2027 | return kv_set_enabled_level(rdev, i); |
| @@ -1961,7 +2041,7 @@ static int kv_force_dpm_lowest(struct radeon_device *rdev) · 13 unmodified lines | ||
| 1961 | 2041 | break; |
| 1962 | 2042 | } |
| 1963 | 2043 | |
| 1964 | − if (rdev->family == CHIP_KABINI) | |
| 2044 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) | |
| 1965 | 2045 | return kv_send_msg_to_smc_with_parameter(rdev, PPSMC_MSG_DPM_ForceState, i); |
| 1966 | 2046 | else |
| 1967 | 2047 | return kv_set_enabled_level(rdev, i); |
| @@ -2118,7 +2198,7 @@ static void kv_apply_state_adjust_rules(struct radeon_device *rdev, · 150 unmodified lines | ||
| 2118 | 2198 | else |
| 2119 | 2199 | pi->battery_state = false; |
| 2120 | 2200 | |
| 2121 | − if (rdev->family == CHIP_KABINI) { | |
| 2201 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { | |
| 2122 | 2202 | ps->dpm0_pg_nb_ps_lo = 0x1; |
| 2123 | 2203 | ps->dpm0_pg_nb_ps_hi = 0x0; |
| 2124 | 2204 | ps->dpmx_nb_ps_lo = 0x1; |
| @@ -2179,7 +2259,7 @@ static int kv_calculate_nbps_level_settings(struct radeon_device *rdev) · 54 unmodified lines | ||
| 2179 | 2259 | if (pi->lowest_valid > pi->highest_valid) |
| 2180 | 2260 | return -EINVAL; |
| 2181 | 2261 | |
| 2182 | − if (rdev->family == CHIP_KABINI) { | |
| 2262 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) { | |
| 2183 | 2263 | for (i = pi->lowest_valid; i <= pi->highest_valid; i++) { |
| 2184 | 2264 | pi->graphics_level[i].GnbSlow = 1; |
| 2185 | 2265 | pi->graphics_level[i].ForceNbPs1 = 0; |
| @@ -2253,9 +2333,9 @@ static void kv_init_graphics_levels(struct radeon_device *rdev) · 67 unmodified lines | ||
| 2253 | 2333 | break; |
| 2254 | 2334 | |
| 2255 | 2335 | kv_set_divider_value(rdev, i, table->entries[i].clk); |
| 2256 | − vid_2bit = sumo_convert_vid7_to_vid2(rdev, | |
| 2257 | − &pi->sys_info.vid_mapping_table, | |
| 2258 | − table->entries[i].v); | |
| 2336 | + vid_2bit = kv_convert_vid7_to_vid2(rdev, | |
| 2337 | + &pi->sys_info.vid_mapping_table, | |
| 2338 | + table->entries[i].v); | |
| 2259 | 2339 | kv_set_vid(rdev, i, vid_2bit); |
| 2260 | 2340 | kv_set_at(rdev, i, pi->at[i]); |
| 2261 | 2341 | kv_dpm_power_level_enabled_for_throttle(rdev, i, true); |
| @@ -2324,7 +2404,7 @@ static void kv_program_nbps_index_settings(struct radeon_device *rdev, · 62 unmodified lines | ||
| 2324 | 2404 | struct kv_power_info *pi = kv_get_pi(rdev); |
| 2325 | 2405 | u32 nbdpmconfig1; |
| 2326 | 2406 | |
| 2327 | − if (rdev->family == CHIP_KABINI) | |
| 2407 | + if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS) | |
| 2328 | 2408 | return; |
| 2329 | 2409 | |
| 2330 | 2410 | if (pi->sys_info.nb_dpm_enable) { |
| @@ -2631,9 +2711,6 @@ int kv_dpm_init(struct radeon_device *rdev) · 300 unmodified lines | ||
| 2631 | 2711 | |
| 2632 | 2712 | pi->sram_end = SMC_RAM_END; |
| 2633 | 2713 | |
| 2634 | − if (rdev->family == CHIP_KABINI) | |
| 2635 | − pi->high_voltage_t = 4001; | |
| 2636 | − | |
| 2637 | 2714 | pi->enable_nb_dpm = true; |
| 2638 | 2715 | |
| 2639 | 2716 | pi->caps_power_containment = true; |
| @@ -2839,6 +2839,7 @@ int r600_copy_cpdma(struct radeon_device *rdev, · 2838 unmodified lines | ||
| 2839 | 2839 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 2840 | 2840 | if (r) { |
| 2841 | 2841 | radeon_ring_unlock_undo(rdev, ring); |
| 2842 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 2842 | 2843 | return r; |
| 2843 | 2844 | } |
| 2844 | 2845 | |
| @@ -3505,7 +3506,6 @@ int r600_irq_set(struct radeon_device *rdev) · 660 unmodified lines | ||
| 3505 | 3506 | u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0; |
| 3506 | 3507 | u32 grbm_int_cntl = 0; |
| 3507 | 3508 | u32 hdmi0, hdmi1; |
| 3508 | − u32 d1grph = 0, d2grph = 0; | |
| 3509 | 3509 | u32 dma_cntl; |
| 3510 | 3510 | u32 thermal_int = 0; |
| 3511 | 3511 | |
| @@ -3614,8 +3614,8 @@ int r600_irq_set(struct radeon_device *rdev) · 102 unmodified lines | ||
| 3614 | 3614 | WREG32(CP_INT_CNTL, cp_int_cntl); |
| 3615 | 3615 | WREG32(DMA_CNTL, dma_cntl); |
| 3616 | 3616 | WREG32(DxMODE_INT_MASK, mode_int); |
| 3617 | − WREG32(D1GRPH_INTERRUPT_CONTROL, d1grph); | |
| 3618 | − WREG32(D2GRPH_INTERRUPT_CONTROL, d2grph); | |
| 3617 | + WREG32(D1GRPH_INTERRUPT_CONTROL, DxGRPH_PFLIP_INT_MASK); | |
| 3618 | + WREG32(D2GRPH_INTERRUPT_CONTROL, DxGRPH_PFLIP_INT_MASK); | |
| 3619 | 3619 | WREG32(GRBM_INT_CNTL, grbm_int_cntl); |
| 3620 | 3620 | if (ASIC_IS_DCE3(rdev)) { |
| 3621 | 3621 | WREG32(DC_HPD1_INT_CONTROL, hpd1); |
| @@ -3918,6 +3918,14 @@ restart_ih: · 296 unmodified lines | ||
| 3918 | 3918 | break; |
| 3919 | 3919 | } |
| 3920 | 3920 | break; |
| 3921 | + case 9: /* D1 pflip */ | |
| 3922 | + DRM_DEBUG("IH: D1 flip\n"); | |
| 3923 | + radeon_crtc_handle_flip(rdev, 0); | |
| 3924 | + break; | |
| 3925 | + case 11: /* D2 pflip */ | |
| 3926 | + DRM_DEBUG("IH: D2 flip\n"); | |
| 3927 | + radeon_crtc_handle_flip(rdev, 1); | |
| 3928 | + break; | |
| 3921 | 3929 | case 19: /* HPD/DAC hotplug */ |
| 3922 | 3930 | switch (src_data) { |
| 3923 | 3931 | case 0: |
| @@ -489,6 +489,7 @@ int r600_copy_dma(struct radeon_device *rdev, · 488 unmodified lines | ||
| 489 | 489 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 490 | 490 | if (r) { |
| 491 | 491 | radeon_ring_unlock_undo(rdev, ring); |
| 492 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 492 | 493 | return r; |
| 493 | 494 | } |
| 494 | 495 | |
| @@ -730,6 +730,12 @@ struct cik_irq_stat_regs { · 729 unmodified lines | ||
| 730 | 730 | u32 disp_int_cont4; |
| 731 | 731 | u32 disp_int_cont5; |
| 732 | 732 | u32 disp_int_cont6; |
| 733 | + u32 d1grph_int; | |
| 734 | + u32 d2grph_int; | |
| 735 | + u32 d3grph_int; | |
| 736 | + u32 d4grph_int; | |
| 737 | + u32 d5grph_int; | |
| 738 | + u32 d6grph_int; | |
| 733 | 739 | }; |
| 734 | 740 | |
| 735 | 741 | union radeon_irq_stat_regs { |
| @@ -1636,6 +1642,7 @@ struct radeon_vce { · 900 unmodified lines | ||
| 1636 | 1642 | unsigned fb_version; |
| 1637 | 1643 | atomic_t handles[RADEON_MAX_VCE_HANDLES]; |
| 1638 | 1644 | struct drm_file *filp[RADEON_MAX_VCE_HANDLES]; |
| 1645 | + unsigned img_size[RADEON_MAX_VCE_HANDLES]; | |
| 1639 | 1646 | struct delayed_work idle_work; |
| 1640 | 1647 | }; |
| 1641 | 1648 | |
| @@ -1649,7 +1656,7 @@ int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, · 7 unmodified lines | ||
| 1649 | 1656 | uint32_t handle, struct radeon_fence **fence); |
| 1650 | 1657 | void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp); |
| 1651 | 1658 | void radeon_vce_note_usage(struct radeon_device *rdev); |
| 1652 | −int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi); | |
| 1659 | +int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi, unsigned size); | |
| 1653 | 1660 | int radeon_vce_cs_parse(struct radeon_cs_parser *p); |
| 1654 | 1661 | bool radeon_vce_semaphore_emit(struct radeon_device *rdev, |
| 1655 | 1662 | struct radeon_ring *ring, |
| @@ -2634,7 +2641,8 @@ void r100_pll_errata_after_index(struct radeon_device *rdev); · 978 unmodified lines | ||
| 2634 | 2641 | #define ASIC_IS_DCE8(rdev) ((rdev->family >= CHIP_BONAIRE)) |
| 2635 | 2642 | #define ASIC_IS_DCE81(rdev) ((rdev->family == CHIP_KAVERI)) |
| 2636 | 2643 | #define ASIC_IS_DCE82(rdev) ((rdev->family == CHIP_BONAIRE)) |
| 2637 | −#define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI)) | |
| 2644 | +#define ASIC_IS_DCE83(rdev) ((rdev->family == CHIP_KABINI) || \ | |
| 2645 | + (rdev->family == CHIP_MULLINS)) | |
| 2638 | 2646 | |
| 2639 | 2647 | #define ASIC_IS_LOMBOK(rdev) ((rdev->ddev->pdev->device == 0x6849) || \ |
| 2640 | 2648 | (rdev->ddev->pdev->device == 0x6850) || \ |
| @@ -2516,6 +2516,7 @@ int radeon_asic_init(struct radeon_device *rdev) · 2515 unmodified lines | ||
| 2516 | 2516 | break; |
| 2517 | 2517 | case CHIP_KAVERI: |
| 2518 | 2518 | case CHIP_KABINI: |
| 2519 | + case CHIP_MULLINS: | |
| 2519 | 2520 | rdev->asic = &kv_asic; |
| 2520 | 2521 | /* set num crtcs */ |
| 2521 | 2522 | if (rdev->family == CHIP_KAVERI) { |
| @@ -196,6 +196,20 @@ static bool radeon_atrm_get_bios(struct radeon_device *rdev) · 195 unmodified lines | ||
| 196 | 196 | } |
| 197 | 197 | } |
| 198 | 198 | |
| 199 | + if (!found) { | |
| 200 | + while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) { | |
| 201 | + dhandle = ACPI_HANDLE(&pdev->dev); | |
| 202 | + if (!dhandle) | |
| 203 | + continue; | |
| 204 | + | |
| 205 | + status = acpi_get_handle(dhandle, "ATRM", &atrm_handle); | |
| 206 | + if (!ACPI_FAILURE(status)) { | |
| 207 | + found = true; | |
| 208 | + break; | |
| 209 | + } | |
| 210 | + } | |
| 211 | + } | |
| 212 | + | |
| 199 | 213 | if (!found) |
| 200 | 214 | return false; |
| 201 | 215 | |
| @@ -152,6 +152,12 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p) · 151 unmodified lines | ||
| 152 | 152 | uint32_t domain = r->write_domain ? |
| 153 | 153 | r->write_domain : r->read_domains; |
| 154 | 154 | |
| 155 | + if (domain & RADEON_GEM_DOMAIN_CPU) { | |
| 156 | + DRM_ERROR("RADEON_GEM_DOMAIN_CPU is not valid " | |
| 157 | + "for command submission\n"); | |
| 158 | + return -EINVAL; | |
| 159 | + } | |
| 160 | + | |
| 155 | 161 | p->relocs[i].domain = domain; |
| 156 | 162 | if (domain == RADEON_GEM_DOMAIN_VRAM) |
| 157 | 163 | domain |= RADEON_GEM_DOMAIN_GTT; |
| @@ -342,10 +348,17 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data) · 184 unmodified lines | ||
| 342 | 348 | return -EINVAL; |
| 343 | 349 | |
| 344 | 350 | /* we only support VM on some SI+ rings */ |
| 345 | − if ((p->rdev->asic->ring[p->ring]->cs_parse == NULL) && | |
| 346 | − ((p->cs_flags & RADEON_CS_USE_VM) == 0)) { | |
| 347 | − DRM_ERROR("Ring %d requires VM!\n", p->ring); | |
| 348 | − return -EINVAL; | |
| 351 | + if ((p->cs_flags & RADEON_CS_USE_VM) == 0) { | |
| 352 | + if (p->rdev->asic->ring[p->ring]->cs_parse == NULL) { | |
| 353 | + DRM_ERROR("Ring %d requires VM!\n", p->ring); | |
| 354 | + return -EINVAL; | |
| 355 | + } | |
| 356 | + } else { | |
| 357 | + if (p->rdev->asic->ring[p->ring]->ib_parse == NULL) { | |
| 358 | + DRM_ERROR("VM not supported on ring %d!\n", | |
| 359 | + p->ring); | |
| 360 | + return -EINVAL; | |
| 361 | + } | |
| 349 | 362 | } |
| 350 | 363 | } |
| 351 | 364 | |
| @@ -99,6 +99,7 @@ static const char radeon_family_name[][16] = { · 98 unmodified lines | ||
| 99 | 99 | "KAVERI", |
| 100 | 100 | "KABINI", |
| 101 | 101 | "HAWAII", |
| 102 | + "MULLINS", | |
| 102 | 103 | "LAST", |
| 103 | 104 | }; |
| 104 | 105 | |
| @@ -1532,11 +1533,6 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon) · 1427 unmodified lines | ||
| 1532 | 1533 | |
| 1533 | 1534 | radeon_restore_bios_scratch_regs(rdev); |
| 1534 | 1535 | |
| 1535 | − if (fbcon) { | |
| 1536 | − radeon_fbdev_set_suspend(rdev, 0); | |
| 1537 | − console_unlock(); | |
| 1538 | − } | |
| 1539 | − | |
| 1540 | 1536 | /* init dig PHYs, disp eng pll */ |
| 1541 | 1537 | if (rdev->is_atom_bios) { |
| 1542 | 1538 | radeon_atom_encoder_init(rdev); |
| @@ -1561,6 +1557,12 @@ int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon) · 18 unmodified lines | ||
| 1561 | 1557 | } |
| 1562 | 1558 | |
| 1563 | 1559 | drm_kms_helper_poll_enable(dev); |
| 1560 | + | |
| 1561 | + if (fbcon) { | |
| 1562 | + radeon_fbdev_set_suspend(rdev, 0); | |
| 1563 | + console_unlock(); | |
| 1564 | + } | |
| 1565 | + | |
| 1564 | 1566 | return 0; |
| 1565 | 1567 | } |
| 1566 | 1568 | |
| @@ -284,6 +284,10 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id) · 283 unmodified lines | ||
| 284 | 284 | u32 update_pending; |
| 285 | 285 | int vpos, hpos; |
| 286 | 286 | |
| 287 | + /* can happen during initialization */ | |
| 288 | + if (radeon_crtc == NULL) | |
| 289 | + return; | |
| 290 | + | |
| 287 | 291 | spin_lock_irqsave(&rdev->ddev->event_lock, flags); |
| 288 | 292 | work = radeon_crtc->unpin_work; |
| 289 | 293 | if (work == NULL || |
| @@ -826,14 +830,14 @@ static void avivo_reduce_ratio(unsigned *nom, unsigned *den, · 536 unmodified lines | ||
| 826 | 830 | |
| 827 | 831 | /* make sure nominator is large enough */ |
| 828 | 832 | if (*nom < nom_min) { |
| 829 | − tmp = (nom_min + *nom - 1) / *nom; | |
| 833 | + tmp = DIV_ROUND_UP(nom_min, *nom); | |
| 830 | 834 | *nom *= tmp; |
| 831 | 835 | *den *= tmp; |
| 832 | 836 | } |
| 833 | 837 | |
| 834 | 838 | /* make sure the denominator is large enough */ |
| 835 | 839 | if (*den < den_min) { |
| 836 | − tmp = (den_min + *den - 1) / *den; | |
| 840 | + tmp = DIV_ROUND_UP(den_min, *den); | |
| 837 | 841 | *nom *= tmp; |
| 838 | 842 | *den *= tmp; |
| 839 | 843 | } |
| @@ -858,7 +862,7 @@ static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, · 18 unmodified lines | ||
| 858 | 862 | unsigned *fb_div, unsigned *ref_div) |
| 859 | 863 | { |
| 860 | 864 | /* limit reference * post divider to a maximum */ |
| 861 | − ref_div_max = min(210 / post_div, ref_div_max); | |
| 865 | + ref_div_max = max(min(100 / post_div, ref_div_max), 1u); | |
| 862 | 866 | |
| 863 | 867 | /* get matching reference and feedback divider */ |
| 864 | 868 | *ref_div = min(max(DIV_ROUND_CLOSEST(den, post_div), 1u), ref_div_max); |
| @@ -993,6 +997,16 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll, · 128 unmodified lines | ||
| 993 | 997 | /* this also makes sure that the reference divider is large enough */ |
| 994 | 998 | avivo_reduce_ratio(&fb_div, &ref_div, fb_div_min, ref_div_min); |
| 995 | 999 | |
| 1000 | + /* avoid high jitter with small fractional dividers */ | |
| 1001 | + if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) { | |
| 1002 | + fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50); | |
| 1003 | + if (fb_div < fb_div_min) { | |
| 1004 | + unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div); | |
| 1005 | + fb_div *= tmp; | |
| 1006 | + ref_div *= tmp; | |
| 1007 | + } | |
| 1008 | + } | |
| 1009 | + | |
| 996 | 1010 | /* and finally save the result */ |
| 997 | 1011 | if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { |
| 998 | 1012 | *fb_div_p = fb_div / 10; |
| @@ -97,6 +97,7 @@ enum radeon_family { · 96 unmodified lines | ||
| 97 | 97 | CHIP_KAVERI, |
| 98 | 98 | CHIP_KABINI, |
| 99 | 99 | CHIP_HAWAII, |
| 100 | + CHIP_MULLINS, | |
| 100 | 101 | CHIP_LAST, |
| 101 | 102 | }; |
| 102 | 103 | |
| @@ -577,28 +577,29 @@ int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv) · 576 unmodified lines | ||
| 577 | 577 | return r; |
| 578 | 578 | } |
| 579 | 579 | |
| 580 | − r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | |
| 581 | − if (r) { | |
| 582 | − radeon_vm_fini(rdev, &fpriv->vm); | |
| 583 | − kfree(fpriv); | |
| 584 | − return r; | |
| 585 | − } | |
| 580 | + if (rdev->accel_working) { | |
| 581 | + r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | |
| 582 | + if (r) { | |
| 583 | + radeon_vm_fini(rdev, &fpriv->vm); | |
| 584 | + kfree(fpriv); | |
| 585 | + return r; | |
| 586 | + } | |
| 586 | 587 | |
| 587 | − /* map the ib pool buffer read only into | |
| 588 | − * virtual address space */ | |
| 589 | − bo_va = radeon_vm_bo_add(rdev, &fpriv->vm, | |
| 590 | − rdev->ring_tmp_bo.bo); | |
| 591 | − r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET, | |
| 592 | − RADEON_VM_PAGE_READABLE | | |
| 593 | − RADEON_VM_PAGE_SNOOPED); | |
| 588 | + /* map the ib pool buffer read only into | |
| 589 | + * virtual address space */ | |
| 590 | + bo_va = radeon_vm_bo_add(rdev, &fpriv->vm, | |
| 591 | + rdev->ring_tmp_bo.bo); | |
| 592 | + r = radeon_vm_bo_set_addr(rdev, bo_va, RADEON_VA_IB_OFFSET, | |
| 593 | + RADEON_VM_PAGE_READABLE | | |
| 594 | + RADEON_VM_PAGE_SNOOPED); | |
| 594 | 595 | |
| 595 | − radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | |
| 596 | − if (r) { | |
| 597 | − radeon_vm_fini(rdev, &fpriv->vm); | |
| 598 | − kfree(fpriv); | |
| 599 | − return r; | |
| 596 | + radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | |
| 597 | + if (r) { | |
| 598 | + radeon_vm_fini(rdev, &fpriv->vm); | |
| 599 | + kfree(fpriv); | |
| 600 | + return r; | |
| 601 | + } | |
| 600 | 602 | } |
| 601 | − | |
| 602 | 603 | file_priv->driver_priv = fpriv; |
| 603 | 604 | } |
| 604 | 605 | |
| @@ -626,13 +627,15 @@ void radeon_driver_postclose_kms(struct drm_device *dev, · 21 unmodified lines | ||
| 626 | 627 | struct radeon_bo_va *bo_va; |
| 627 | 628 | int r; |
| 628 | 629 | |
| 629 | − r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | |
| 630 | − if (!r) { | |
| 631 | − bo_va = radeon_vm_bo_find(&fpriv->vm, | |
| 632 | − rdev->ring_tmp_bo.bo); | |
| 633 | − if (bo_va) | |
| 634 | − radeon_vm_bo_rmv(rdev, bo_va); | |
| 635 | − radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | |
| 630 | + if (rdev->accel_working) { | |
| 631 | + r = radeon_bo_reserve(rdev->ring_tmp_bo.bo, false); | |
| 632 | + if (!r) { | |
| 633 | + bo_va = radeon_vm_bo_find(&fpriv->vm, | |
| 634 | + rdev->ring_tmp_bo.bo); | |
| 635 | + if (bo_va) | |
| 636 | + radeon_vm_bo_rmv(rdev, bo_va); | |
| 637 | + radeon_bo_unreserve(rdev->ring_tmp_bo.bo); | |
| 638 | + } | |
| 636 | 639 | } |
| 637 | 640 | |
| 638 | 641 | radeon_vm_fini(rdev, &fpriv->vm); |
| @@ -458,7 +458,7 @@ int radeon_bo_list_validate(struct radeon_device *rdev, · 457 unmodified lines | ||
| 458 | 458 | * into account. We don't want to disallow buffer moves |
| 459 | 459 | * completely. |
| 460 | 460 | */ |
| 461 | − if (current_domain != RADEON_GEM_DOMAIN_CPU && | |
| 461 | + if ((lobj->alt_domain & current_domain) != 0 && | |
| 462 | 462 | (domain & current_domain) == 0 && /* will be moved */ |
| 463 | 463 | bytes_moved > bytes_moved_threshold) { |
| 464 | 464 | /* don't move it */ |
| @@ -699,22 +699,30 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) · 234 unmodified lines | ||
| 699 | 699 | rbo = container_of(bo, struct radeon_bo, tbo); |
| 700 | 700 | radeon_bo_check_tiling(rbo, 0, 0); |
| 701 | 701 | rdev = rbo->rdev; |
| 702 | − if (bo->mem.mem_type == TTM_PL_VRAM) { | |
| 703 | − size = bo->mem.num_pages << PAGE_SHIFT; | |
| 704 | − offset = bo->mem.start << PAGE_SHIFT; | |
| 705 | − if ((offset + size) > rdev->mc.visible_vram_size) { | |
| 706 | − /* hurrah the memory is not visible ! */ | |
| 707 | − radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); | |
| 708 | − rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; | |
| 709 | − r = ttm_bo_validate(bo, &rbo->placement, false, false); | |
| 710 | − if (unlikely(r != 0)) | |
| 711 | − return r; | |
| 712 | − offset = bo->mem.start << PAGE_SHIFT; | |
| 713 | − /* this should not happen */ | |
| 714 | − if ((offset + size) > rdev->mc.visible_vram_size) | |
| 715 | − return -EINVAL; | |
| 716 | − } | |
| 702 | + if (bo->mem.mem_type != TTM_PL_VRAM) | |
| 703 | + return 0; | |
| 704 | + | |
| 705 | + size = bo->mem.num_pages << PAGE_SHIFT; | |
| 706 | + offset = bo->mem.start << PAGE_SHIFT; | |
| 707 | + if ((offset + size) <= rdev->mc.visible_vram_size) | |
| 708 | + return 0; | |
| 709 | + | |
| 710 | + /* hurrah the memory is not visible ! */ | |
| 711 | + radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); | |
| 712 | + rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; | |
| 713 | + r = ttm_bo_validate(bo, &rbo->placement, false, false); | |
| 714 | + if (unlikely(r == -ENOMEM)) { | |
| 715 | + radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); | |
| 716 | + return ttm_bo_validate(bo, &rbo->placement, false, false); | |
| 717 | + } else if (unlikely(r != 0)) { | |
| 718 | + return r; | |
| 717 | 719 | } |
| 720 | + | |
| 721 | + offset = bo->mem.start << PAGE_SHIFT; | |
| 722 | + /* this should never happen */ | |
| 723 | + if ((offset + size) > rdev->mc.visible_vram_size) | |
| 724 | + return -EINVAL; | |
| 725 | + | |
| 718 | 726 | return 0; |
| 719 | 727 | } |
| 720 | 728 | |
| @@ -361,6 +361,11 @@ static ssize_t radeon_set_pm_profile(struct device *dev, · 360 unmodified lines | ||
| 361 | 361 | struct drm_device *ddev = dev_get_drvdata(dev); |
| 362 | 362 | struct radeon_device *rdev = ddev->dev_private; |
| 363 | 363 | |
| 364 | + /* Can't set profile when the card is off */ | |
| 365 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 366 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | |
| 367 | + return -EINVAL; | |
| 368 | + | |
| 364 | 369 | mutex_lock(&rdev->pm.mutex); |
| 365 | 370 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
| 366 | 371 | if (strncmp("default", buf, strlen("default")) == 0) |
| @@ -409,6 +414,13 @@ static ssize_t radeon_set_pm_method(struct device *dev, · 42 unmodified lines | ||
| 409 | 414 | struct drm_device *ddev = dev_get_drvdata(dev); |
| 410 | 415 | struct radeon_device *rdev = ddev->dev_private; |
| 411 | 416 | |
| 417 | + /* Can't set method when the card is off */ | |
| 418 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 419 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { | |
| 420 | + count = -EINVAL; | |
| 421 | + goto fail; | |
| 422 | + } | |
| 423 | + | |
| 412 | 424 | /* we don't support the legacy modes with dpm */ |
| 413 | 425 | if (rdev->pm.pm_method == PM_METHOD_DPM) { |
| 414 | 426 | count = -EINVAL; |
| @@ -446,6 +458,10 @@ static ssize_t radeon_get_dpm_state(struct device *dev, · 31 unmodified lines | ||
| 446 | 458 | struct radeon_device *rdev = ddev->dev_private; |
| 447 | 459 | enum radeon_pm_state_type pm = rdev->pm.dpm.user_state; |
| 448 | 460 | |
| 461 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 462 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | |
| 463 | + return snprintf(buf, PAGE_SIZE, "off\n"); | |
| 464 | + | |
| 449 | 465 | return snprintf(buf, PAGE_SIZE, "%s\n", |
| 450 | 466 | (pm == POWER_STATE_TYPE_BATTERY) ? "battery" : |
| 451 | 467 | (pm == POWER_STATE_TYPE_BALANCED) ? "balanced" : "performance"); |
| @@ -459,6 +475,11 @@ static ssize_t radeon_set_dpm_state(struct device *dev, · 7 unmodified lines | ||
| 459 | 475 | struct drm_device *ddev = dev_get_drvdata(dev); |
| 460 | 476 | struct radeon_device *rdev = ddev->dev_private; |
| 461 | 477 | |
| 478 | + /* Can't set dpm state when the card is off */ | |
| 479 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 480 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | |
| 481 | + return -EINVAL; | |
| 482 | + | |
| 462 | 483 | mutex_lock(&rdev->pm.mutex); |
| 463 | 484 | if (strncmp("battery", buf, strlen("battery")) == 0) |
| 464 | 485 | rdev->pm.dpm.user_state = POWER_STATE_TYPE_BATTERY; |
| @@ -485,6 +506,10 @@ static ssize_t radeon_get_dpm_forced_performance_level(struct device *dev, · 20 unmodified lines | ||
| 485 | 506 | struct radeon_device *rdev = ddev->dev_private; |
| 486 | 507 | enum radeon_dpm_forced_level level = rdev->pm.dpm.forced_level; |
| 487 | 508 | |
| 509 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 510 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | |
| 511 | + return snprintf(buf, PAGE_SIZE, "off\n"); | |
| 512 | + | |
| 488 | 513 | return snprintf(buf, PAGE_SIZE, "%s\n", |
| 489 | 514 | (level == RADEON_DPM_FORCED_LEVEL_AUTO) ? "auto" : |
| 490 | 515 | (level == RADEON_DPM_FORCED_LEVEL_LOW) ? "low" : "high"); |
| @@ -500,6 +525,11 @@ static ssize_t radeon_set_dpm_forced_performance_level(struct device *dev, · 9 unmodified lines | ||
| 500 | 525 | enum radeon_dpm_forced_level level; |
| 501 | 526 | int ret = 0; |
| 502 | 527 | |
| 528 | + /* Can't force performance level when the card is off */ | |
| 529 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 530 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | |
| 531 | + return -EINVAL; | |
| 532 | + | |
| 503 | 533 | mutex_lock(&rdev->pm.mutex); |
| 504 | 534 | if (strncmp("low", buf, strlen("low")) == 0) { |
| 505 | 535 | level = RADEON_DPM_FORCED_LEVEL_LOW; |
| @@ -538,8 +568,14 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, · 32 unmodified lines | ||
| 538 | 568 | char *buf) |
| 539 | 569 | { |
| 540 | 570 | struct radeon_device *rdev = dev_get_drvdata(dev); |
| 571 | + struct drm_device *ddev = rdev->ddev; | |
| 541 | 572 | int temp; |
| 542 | 573 | |
| 574 | + /* Can't get temperature when the card is off */ | |
| 575 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 576 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) | |
| 577 | + return -EINVAL; | |
| 578 | + | |
| 543 | 579 | if (rdev->asic->pm.get_temperature) |
| 544 | 580 | temp = radeon_get_temperature(rdev); |
| 545 | 581 | else |
| @@ -1300,6 +1336,7 @@ int radeon_pm_init(struct radeon_device *rdev) · 754 unmodified lines | ||
| 1300 | 1336 | case CHIP_KABINI: |
| 1301 | 1337 | case CHIP_KAVERI: |
| 1302 | 1338 | case CHIP_HAWAII: |
| 1339 | + case CHIP_MULLINS: | |
| 1303 | 1340 | /* DPM requires the RLC, RV770+ dGPU requires SMC */ |
| 1304 | 1341 | if (!rdev->rlc_fw) |
| 1305 | 1342 | rdev->pm.pm_method = PM_METHOD_PROFILE; |
| @@ -1613,8 +1650,12 @@ static int radeon_debugfs_pm_info(struct seq_file *m, void *data) · 307 unmodified lines | ||
| 1613 | 1650 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 1614 | 1651 | struct drm_device *dev = node->minor->dev; |
| 1615 | 1652 | struct radeon_device *rdev = dev->dev_private; |
| 1653 | + struct drm_device *ddev = rdev->ddev; | |
| 1616 | 1654 | |
| 1617 | − if (rdev->pm.dpm_enabled) { | |
| 1655 | + if ((rdev->flags & RADEON_IS_PX) && | |
| 1656 | + (ddev->switch_power_state != DRM_SWITCH_POWER_ON)) { | |
| 1657 | + seq_printf(m, "PX asic powered off\n"); | |
| 1658 | + } else if (rdev->pm.dpm_enabled) { | |
| 1618 | 1659 | mutex_lock(&rdev->pm.mutex); |
| 1619 | 1660 | if (rdev->asic->dpm.debugfs_print_current_performance_level) |
| 1620 | 1661 | radeon_dpm_debugfs_print_current_performance_level(rdev, m); |
| @@ -52,6 +52,7 @@ · 51 unmodified lines | ||
| 52 | 52 | #define BONAIRE_RLC_UCODE_SIZE 2048 |
| 53 | 53 | #define KB_RLC_UCODE_SIZE 2560 |
| 54 | 54 | #define KV_RLC_UCODE_SIZE 2560 |
| 55 | +#define ML_RLC_UCODE_SIZE 2560 | |
| 55 | 56 | |
| 56 | 57 | /* MC */ |
| 57 | 58 | #define BTC_MC_UCODE_SIZE 6024 |
| @@ -99,6 +99,7 @@ int radeon_uvd_init(struct radeon_device *rdev) · 98 unmodified lines | ||
| 99 | 99 | case CHIP_KABINI: |
| 100 | 100 | case CHIP_KAVERI: |
| 101 | 101 | case CHIP_HAWAII: |
| 102 | + case CHIP_MULLINS: | |
| 102 | 103 | fw_name = FIRMWARE_BONAIRE; |
| 103 | 104 | break; |
| 104 | 105 | |
| @@ -465,6 +466,10 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, · 360 unmodified lines | ||
| 465 | 466 | cmd = radeon_get_ib_value(p, p->idx) >> 1; |
| 466 | 467 | |
| 467 | 468 | if (cmd < 0x4) { |
| 469 | + if (end <= start) { | |
| 470 | + DRM_ERROR("invalid reloc offset %X!\n", offset); | |
| 471 | + return -EINVAL; | |
| 472 | + } | |
| 468 | 473 | if ((end - start) < buf_sizes[cmd]) { |
| 469 | 474 | DRM_ERROR("buffer (%d) to small (%d / %d)!\n", cmd, |
| 470 | 475 | (unsigned)(end - start), buf_sizes[cmd]); |
| @@ -66,6 +66,7 @@ int radeon_vce_init(struct radeon_device *rdev) · 65 unmodified lines | ||
| 66 | 66 | case CHIP_BONAIRE: |
| 67 | 67 | case CHIP_KAVERI: |
| 68 | 68 | case CHIP_KABINI: |
| 69 | + case CHIP_MULLINS: | |
| 69 | 70 | fw_name = FIRMWARE_BONAIRE; |
| 70 | 71 | break; |
| 71 | 72 | |
| @@ -442,13 +443,16 @@ int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring, · 370 unmodified lines | ||
| 442 | 443 | * @p: parser context |
| 443 | 444 | * @lo: address of lower dword |
| 444 | 445 | * @hi: address of higher dword |
| 446 | + * @size: size of checker for relocation buffer | |
| 445 | 447 | * |
| 446 | 448 | * Patch relocation inside command stream with real buffer address |
| 447 | 449 | */ |
| 448 | −int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) | |
| 450 | +int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi, | |
| 451 | + unsigned size) | |
| 449 | 452 | { |
| 450 | 453 | struct radeon_cs_chunk *relocs_chunk; |
| 451 | − uint64_t offset; | |
| 454 | + struct radeon_cs_reloc *reloc; | |
| 455 | + uint64_t start, end, offset; | |
| 452 | 456 | unsigned idx; |
| 453 | 457 | |
| 454 | 458 | relocs_chunk = &p->chunks[p->chunk_relocs_idx]; |
| @@ -461,14 +465,59 @@ int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) · 6 unmodified lines | ||
| 461 | 465 | return -EINVAL; |
| 462 | 466 | } |
| 463 | 467 | |
| 464 | − offset += p->relocs_ptr[(idx / 4)]->gpu_offset; | |
| 468 | + reloc = p->relocs_ptr[(idx / 4)]; | |
| 469 | + start = reloc->gpu_offset; | |
| 470 | + end = start + radeon_bo_size(reloc->robj); | |
| 471 | + start += offset; | |
| 465 | 472 | |
| 466 | − p->ib.ptr[lo] = offset & 0xFFFFFFFF; | |
| 467 | − p->ib.ptr[hi] = offset >> 32; | |
| 473 | + p->ib.ptr[lo] = start & 0xFFFFFFFF; | |
| 474 | + p->ib.ptr[hi] = start >> 32; | |
| 475 | + | |
| 476 | + if (end <= start) { | |
| 477 | + DRM_ERROR("invalid reloc offset %llX!\n", offset); | |
| 478 | + return -EINVAL; | |
| 479 | + } | |
| 480 | + if ((end - start) < size) { | |
| 481 | + DRM_ERROR("buffer to small (%d / %d)!\n", | |
| 482 | + (unsigned)(end - start), size); | |
| 483 | + return -EINVAL; | |
| 484 | + } | |
| 468 | 485 | |
| 469 | 486 | return 0; |
| 470 | 487 | } |
| 471 | 488 | |
| 489 | +/** | |
| 490 | + * radeon_vce_validate_handle - validate stream handle | |
| 491 | + * | |
| 492 | + * @p: parser context | |
| 493 | + * @handle: handle to validate | |
| 494 | + * | |
| 495 | + * Validates the handle and return the found session index or -EINVAL | |
| 496 | + * we we don't have another free session index. | |
| 497 | + */ | |
| 498 | +int radeon_vce_validate_handle(struct radeon_cs_parser *p, uint32_t handle) | |
| 499 | +{ | |
| 500 | + unsigned i; | |
| 501 | + | |
| 502 | + /* validate the handle */ | |
| 503 | + for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | |
| 504 | + if (atomic_read(&p->rdev->vce.handles[i]) == handle) | |
| 505 | + return i; | |
| 506 | + } | |
| 507 | + | |
| 508 | + /* handle not found try to alloc a new one */ | |
| 509 | + for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | |
| 510 | + if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { | |
| 511 | + p->rdev->vce.filp[i] = p->filp; | |
| 512 | + p->rdev->vce.img_size[i] = 0; | |
| 513 | + return i; | |
| 514 | + } | |
| 515 | + } | |
| 516 | + | |
| 517 | + DRM_ERROR("No more free VCE handles!\n"); | |
| 518 | + return -EINVAL; | |
| 519 | +} | |
| 520 | + | |
| 472 | 521 | /** |
| 473 | 522 | * radeon_vce_cs_parse - parse and validate the command stream |
| 474 | 523 | * |
| @@ -477,8 +526,10 @@ int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi) · 2 unmodified lines | ||
| 477 | 526 | */ |
| 478 | 527 | int radeon_vce_cs_parse(struct radeon_cs_parser *p) |
| 479 | 528 | { |
| 480 | − uint32_t handle = 0; | |
| 481 | − bool destroy = false; | |
| 529 | + int session_idx = -1; | |
| 530 | + bool destroyed = false; | |
| 531 | + uint32_t tmp, handle = 0; | |
| 532 | + uint32_t *size = &tmp; | |
| 482 | 533 | int i, r; |
| 483 | 534 | |
| 484 | 535 | while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) { |
| @@ -490,13 +541,29 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p) · 5 unmodified lines | ||
| 490 | 541 | return -EINVAL; |
| 491 | 542 | } |
| 492 | 543 | |
| 544 | + if (destroyed) { | |
| 545 | + DRM_ERROR("No other command allowed after destroy!\n"); | |
| 546 | + return -EINVAL; | |
| 547 | + } | |
| 548 | + | |
| 493 | 549 | switch (cmd) { |
| 494 | 550 | case 0x00000001: // session |
| 495 | 551 | handle = radeon_get_ib_value(p, p->idx + 2); |
| 552 | + session_idx = radeon_vce_validate_handle(p, handle); | |
| 553 | + if (session_idx < 0) | |
| 554 | + return session_idx; | |
| 555 | + size = &p->rdev->vce.img_size[session_idx]; | |
| 496 | 556 | break; |
| 497 | 557 | |
| 498 | 558 | case 0x00000002: // task info |
| 559 | + break; | |
| 560 | + | |
| 499 | 561 | case 0x01000001: // create |
| 562 | + *size = radeon_get_ib_value(p, p->idx + 8) * | |
| 563 | + radeon_get_ib_value(p, p->idx + 10) * | |
| 564 | + 8 * 3 / 2; | |
| 565 | + break; | |
| 566 | + | |
| 500 | 567 | case 0x04000001: // config extension |
| 501 | 568 | case 0x04000002: // pic control |
| 502 | 569 | case 0x04000005: // rate control |
| @@ -505,23 +572,39 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p) · 2 unmodified lines | ||
| 505 | 572 | break; |
| 506 | 573 | |
| 507 | 574 | case 0x03000001: // encode |
| 508 | − r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9); | |
| 575 | + r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9, | |
| 576 | + *size); | |
| 509 | 577 | if (r) |
| 510 | 578 | return r; |
| 511 | 579 | |
| 512 | − r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11); | |
| 580 | + r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11, | |
| 581 | + *size / 3); | |
| 513 | 582 | if (r) |
| 514 | 583 | return r; |
| 515 | 584 | break; |
| 516 | 585 | |
| 517 | 586 | case 0x02000001: // destroy |
| 518 | − destroy = true; | |
| 587 | + destroyed = true; | |
| 519 | 588 | break; |
| 520 | 589 | |
| 521 | 590 | case 0x05000001: // context buffer |
| 591 | + r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, | |
| 592 | + *size * 2); | |
| 593 | + if (r) | |
| 594 | + return r; | |
| 595 | + break; | |
| 596 | + | |
| 522 | 597 | case 0x05000004: // video bitstream buffer |
| 598 | + tmp = radeon_get_ib_value(p, p->idx + 4); | |
| 599 | + r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, | |
| 600 | + tmp); | |
| 601 | + if (r) | |
| 602 | + return r; | |
| 603 | + break; | |
| 604 | + | |
| 523 | 605 | case 0x05000005: // feedback buffer |
| 524 | − r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2); | |
| 606 | + r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2, | |
| 607 | + 4096); | |
| 525 | 608 | if (r) |
| 526 | 609 | return r; |
| 527 | 610 | break; |
| @@ -531,33 +614,21 @@ int radeon_vce_cs_parse(struct radeon_cs_parser *p) · 3 unmodified lines | ||
| 531 | 614 | return -EINVAL; |
| 532 | 615 | } |
| 533 | 616 | |
| 617 | + if (session_idx == -1) { | |
| 618 | + DRM_ERROR("no session command at start of IB\n"); | |
| 619 | + return -EINVAL; | |
| 620 | + } | |
| 621 | + | |
| 534 | 622 | p->idx += len / 4; |
| 535 | 623 | } |
| 536 | 624 | |
| 537 | − if (destroy) { | |
| 625 | + if (destroyed) { | |
| 538 | 626 | /* IB contains a destroy msg, free the handle */ |
| 539 | 627 | for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) |
| 540 | 628 | atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0); |
| 541 | − | |
| 542 | − return 0; | |
| 543 | − } | |
| 544 | − | |
| 545 | − /* create or encode, validate the handle */ | |
| 546 | − for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | |
| 547 | − if (atomic_read(&p->rdev->vce.handles[i]) == handle) | |
| 548 | − return 0; | |
| 549 | 629 | } |
| 550 | 630 | |
| 551 | − /* handle not found try to alloc a new one */ | |
| 552 | − for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) { | |
| 553 | − if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) { | |
| 554 | − p->rdev->vce.filp[i] = p->filp; | |
| 555 | − return 0; | |
| 556 | − } | |
| 557 | − } | |
| 558 | − | |
| 559 | − DRM_ERROR("No more free VCE handles!\n"); | |
| 560 | − return -EINVAL; | |
| 631 | + return 0; | |
| 561 | 632 | } |
| 562 | 633 | |
| 563 | 634 | /** |
| @@ -130,10 +130,10 @@ struct radeon_cs_reloc *radeon_vm_get_bos(struct radeon_device *rdev, · 129 unmodified lines | ||
| 130 | 130 | struct list_head *head) |
| 131 | 131 | { |
| 132 | 132 | struct radeon_cs_reloc *list; |
| 133 | − unsigned i, idx, size; | |
| 133 | + unsigned i, idx; | |
| 134 | 134 | |
| 135 | − size = (radeon_vm_num_pdes(rdev) + 1) * sizeof(struct radeon_cs_reloc); | |
| 136 | − list = kmalloc(size, GFP_KERNEL); | |
| 135 | + list = kmalloc_array(vm->max_pde_used + 1, | |
| 136 | + sizeof(struct radeon_cs_reloc), GFP_KERNEL); | |
| 137 | 137 | if (!list) |
| 138 | 138 | return NULL; |
| 139 | 139 | |
| @@ -595,7 +595,7 @@ int radeon_vm_update_page_directory(struct radeon_device *rdev, · 455 unmodified lines | ||
| 595 | 595 | ndw = 64; |
| 596 | 596 | |
| 597 | 597 | /* assume the worst case */ |
| 598 | − ndw += vm->max_pde_used * 12; | |
| 598 | + ndw += vm->max_pde_used * 16; | |
| 599 | 599 | |
| 600 | 600 | /* update too big for an IB */ |
| 601 | 601 | if (ndw > 0xfffff) |
| @@ -86,6 +86,7 @@ int rv770_copy_dma(struct radeon_device *rdev, · 85 unmodified lines | ||
| 86 | 86 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 87 | 87 | if (r) { |
| 88 | 88 | radeon_ring_unlock_undo(rdev, ring); |
| 89 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 89 | 90 | return r; |
| 90 | 91 | } |
| 91 | 92 | |
| @@ -5780,7 +5780,6 @@ int si_irq_set(struct radeon_device *rdev) · 5779 unmodified lines | ||
| 5780 | 5780 | u32 crtc1 = 0, crtc2 = 0, crtc3 = 0, crtc4 = 0, crtc5 = 0, crtc6 = 0; |
| 5781 | 5781 | u32 hpd1 = 0, hpd2 = 0, hpd3 = 0, hpd4 = 0, hpd5 = 0, hpd6 = 0; |
| 5782 | 5782 | u32 grbm_int_cntl = 0; |
| 5783 | − u32 grph1 = 0, grph2 = 0, grph3 = 0, grph4 = 0, grph5 = 0, grph6 = 0; | |
| 5784 | 5783 | u32 dma_cntl, dma_cntl1; |
| 5785 | 5784 | u32 thermal_int = 0; |
| 5786 | 5785 | |
| @@ -5919,16 +5918,22 @@ int si_irq_set(struct radeon_device *rdev) · 132 unmodified lines | ||
| 5919 | 5918 | } |
| 5920 | 5919 | |
| 5921 | 5920 | if (rdev->num_crtc >= 2) { |
| 5922 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, grph1); | |
| 5923 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, grph2); | |
| 5921 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, | |
| 5922 | + GRPH_PFLIP_INT_MASK); | |
| 5923 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, | |
| 5924 | + GRPH_PFLIP_INT_MASK); | |
| 5924 | 5925 | } |
| 5925 | 5926 | if (rdev->num_crtc >= 4) { |
| 5926 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, grph3); | |
| 5927 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, grph4); | |
| 5927 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, | |
| 5928 | + GRPH_PFLIP_INT_MASK); | |
| 5929 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, | |
| 5930 | + GRPH_PFLIP_INT_MASK); | |
| 5928 | 5931 | } |
| 5929 | 5932 | if (rdev->num_crtc >= 6) { |
| 5930 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, grph5); | |
| 5931 | − WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, grph6); | |
| 5933 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, | |
| 5934 | + GRPH_PFLIP_INT_MASK); | |
| 5935 | + WREG32(GRPH_INT_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, | |
| 5936 | + GRPH_PFLIP_INT_MASK); | |
| 5932 | 5937 | } |
| 5933 | 5938 | |
| 5934 | 5939 | if (!ASIC_IS_NODCE(rdev)) { |
| @@ -6292,6 +6297,15 @@ restart_ih: · 357 unmodified lines | ||
| 6292 | 6297 | break; |
| 6293 | 6298 | } |
| 6294 | 6299 | break; |
| 6300 | + case 8: /* D1 page flip */ | |
| 6301 | + case 10: /* D2 page flip */ | |
| 6302 | + case 12: /* D3 page flip */ | |
| 6303 | + case 14: /* D4 page flip */ | |
| 6304 | + case 16: /* D5 page flip */ | |
| 6305 | + case 18: /* D6 page flip */ | |
| 6306 | + DRM_DEBUG("IH: D%d flip\n", ((src_id - 8) >> 1) + 1); | |
| 6307 | + radeon_crtc_handle_flip(rdev, (src_id - 8) >> 1); | |
| 6308 | + break; | |
| 6295 | 6309 | case 42: /* HPD hotplug */ |
| 6296 | 6310 | switch (src_data) { |
| 6297 | 6311 | case 0: |
| @@ -213,6 +213,7 @@ int si_copy_dma(struct radeon_device *rdev, · 212 unmodified lines | ||
| 213 | 213 | r = radeon_fence_emit(rdev, fence, ring->idx); |
| 214 | 214 | if (r) { |
| 215 | 215 | radeon_ring_unlock_undo(rdev, ring); |
| 216 | + radeon_semaphore_free(rdev, &sem, NULL); | |
| 216 | 217 | return r; |
| 217 | 218 | } |
| 218 | 219 | |
| @@ -107,8 +107,8 @@ · 106 unmodified lines | ||
| 107 | 107 | #define SPLL_CHG_STATUS (1 << 1) |
| 108 | 108 | #define SPLL_CNTL_MODE 0x618 |
| 109 | 109 | #define SPLL_SW_DIR_CONTROL (1 << 0) |
| 110 | −# define SPLL_REFCLK_SEL(x) ((x) << 8) | |
| 111 | −# define SPLL_REFCLK_SEL_MASK 0xFF00 | |
| 110 | +# define SPLL_REFCLK_SEL(x) ((x) << 26) | |
| 111 | +# define SPLL_REFCLK_SEL_MASK (3 << 26) | |
| 112 | 112 | |
| 113 | 113 | #define CG_SPLL_SPREAD_SPECTRUM 0x620 |
| 114 | 114 | #define SSEN (1 << 0) |
| @@ -83,7 +83,10 @@ int uvd_v1_0_init(struct radeon_device *rdev) · 82 unmodified lines | ||
| 83 | 83 | int r; |
| 84 | 84 | |
| 85 | 85 | /* raise clocks while booting up the VCPU */ |
| 86 | − radeon_set_uvd_clocks(rdev, 53300, 40000); | |
| 86 | + if (rdev->family < CHIP_RV740) | |
| 87 | + radeon_set_uvd_clocks(rdev, 10000, 10000); | |
| 88 | + else | |
| 89 | + radeon_set_uvd_clocks(rdev, 53300, 40000); | |
| 87 | 90 | |
| 88 | 91 | r = uvd_v1_0_start(rdev); |
| 89 | 92 | if (r) |
| @@ -407,7 +410,10 @@ int uvd_v1_0_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) · 317 unmodified lines | ||
| 407 | 410 | struct radeon_fence *fence = NULL; |
| 408 | 411 | int r; |
| 409 | 412 | |
| 410 | − r = radeon_set_uvd_clocks(rdev, 53300, 40000); | |
| 413 | + if (rdev->family < CHIP_RV740) | |
| 414 | + r = radeon_set_uvd_clocks(rdev, 10000, 10000); | |
| 415 | + else | |
| 416 | + r = radeon_set_uvd_clocks(rdev, 53300, 40000); | |
| 411 | 417 | if (r) { |
| 412 | 418 | DRM_ERROR("radeon: failed to raise UVD clocks (%d).\n", r); |
| 413 | 419 | return r; |
| @@ -1253,7 +1253,8 @@ EXPORT_SYMBOL_GPL(hid_output_report); · 1252 unmodified lines | ||
| 1253 | 1253 | |
| 1254 | 1254 | static int hid_report_len(struct hid_report *report) |
| 1255 | 1255 | { |
| 1256 | − return ((report->size - 1) >> 3) + 1 + (report->id > 0) + 7; | |
| 1256 | + /* equivalent to DIV_ROUND_UP(report->size, 8) + !!(report->id > 0) */ | |
| 1257 | + return ((report->size - 1) >> 3) + 1 + (report->id > 0); | |
| 1257 | 1258 | } |
| 1258 | 1259 | |
| 1259 | 1260 | /* |
| @@ -1266,7 +1267,7 @@ u8 *hid_alloc_report_buf(struct hid_report *report, gfp_t flags) · 6 unmodified lines | ||
| 1266 | 1267 | * of implement() working on 8 byte chunks |
| 1267 | 1268 | */ |
| 1268 | 1269 | |
| 1269 | − int len = hid_report_len(report); | |
| 1270 | + int len = hid_report_len(report) + 7; | |
| 1270 | 1271 | |
| 1271 | 1272 | return kmalloc(len, flags); |
| 1272 | 1273 | } |
| @@ -301,6 +301,9 @@ · 300 unmodified lines | ||
| 301 | 301 | |
| 302 | 302 | #define USB_VENDOR_ID_DREAM_CHEEKY 0x1d34 |
| 303 | 303 | |
| 304 | +#define USB_VENDOR_ID_ELITEGROUP 0x03fc | |
| 305 | +#define USB_DEVICE_ID_ELITEGROUP_05D8 0x05d8 | |
| 306 | + | |
| 304 | 307 | #define USB_VENDOR_ID_ELO 0x04E7 |
| 305 | 308 | #define USB_DEVICE_ID_ELO_TS2515 0x0022 |
| 306 | 309 | #define USB_DEVICE_ID_ELO_TS2700 0x0020 |
| @@ -834,6 +837,10 @@ · 527 unmodified lines | ||
| 834 | 837 | #define USB_DEVICE_ID_SYNAPTICS_LTS2 0x1d10 |
| 835 | 838 | #define USB_DEVICE_ID_SYNAPTICS_HD 0x0ac3 |
| 836 | 839 | #define USB_DEVICE_ID_SYNAPTICS_QUAD_HD 0x1ac3 |
| 840 | +#define USB_DEVICE_ID_SYNAPTICS_TP_V103 0x5710 | |
| 841 | + | |
| 842 | +#define USB_VENDOR_ID_TEXAS_INSTRUMENTS 0x2047 | |
| 843 | +#define USB_DEVICE_ID_TEXAS_INSTRUMENTS_LENOVO_YOGA 0x0855 | |
| 837 | 844 | |
| 838 | 845 | #define USB_VENDOR_ID_THINGM 0x27b8 |
| 839 | 846 | #define USB_DEVICE_ID_BLINK1 0x01ed |
| @@ -1155,6 +1155,11 @@ static const struct hid_device_id mt_devices[] = { · 1154 unmodified lines | ||
| 1155 | 1155 | MT_USB_DEVICE(USB_VENDOR_ID_DWAV, |
| 1156 | 1156 | USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH_A001) }, |
| 1157 | 1157 | |
| 1158 | + /* Elitegroup panel */ | |
| 1159 | + { .driver_data = MT_CLS_SERIAL, | |
| 1160 | + MT_USB_DEVICE(USB_VENDOR_ID_ELITEGROUP, | |
| 1161 | + USB_DEVICE_ID_ELITEGROUP_05D8) }, | |
| 1162 | + | |
| 1158 | 1163 | /* Flatfrog Panels */ |
| 1159 | 1164 | { .driver_data = MT_CLS_FLATFROG, |
| 1160 | 1165 | MT_USB_DEVICE(USB_VENDOR_ID_FLATFROG, |
| @@ -708,6 +708,9 @@ static const struct hid_device_id sensor_hub_devices[] = { · 707 unmodified lines | ||
| 708 | 708 | { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_STM_0, |
| 709 | 709 | USB_DEVICE_ID_STM_HID_SENSOR), |
| 710 | 710 | .driver_data = HID_SENSOR_HUB_ENUM_QUIRK}, |
| 711 | + { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, USB_VENDOR_ID_TEXAS_INSTRUMENTS, | |
| 712 | + USB_DEVICE_ID_TEXAS_INSTRUMENTS_LENOVO_YOGA), | |
| 713 | + .driver_data = HID_SENSOR_HUB_ENUM_QUIRK}, | |
| 711 | 714 | { HID_DEVICE(HID_BUS_ANY, HID_GROUP_SENSOR_HUB, HID_ANY_ID, |
| 712 | 715 | HID_ANY_ID) }, |
| 713 | 716 | { } |
| @@ -119,6 +119,7 @@ static const struct hid_blacklist { · 118 unmodified lines | ||
| 119 | 119 | { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_LTS2, HID_QUIRK_NO_INIT_REPORTS }, |
| 120 | 120 | { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_HD, HID_QUIRK_NO_INIT_REPORTS }, |
| 121 | 121 | { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_QUAD_HD, HID_QUIRK_NO_INIT_REPORTS }, |
| 122 | + { USB_VENDOR_ID_SYNAPTICS, USB_DEVICE_ID_SYNAPTICS_TP_V103, HID_QUIRK_NO_INIT_REPORTS }, | |
| 122 | 123 | |
| 123 | 124 | { 0, 0 } |
| 124 | 125 | }; |
| @@ -1053,7 +1053,7 @@ config SENSORS_PC87427 · 1052 unmodified lines | ||
| 1053 | 1053 | |
| 1054 | 1054 | config SENSORS_NTC_THERMISTOR |
| 1055 | 1055 | tristate "NTC thermistor support" |
| 1056 | − depends on (!OF && !IIO) || (OF && IIO) | |
| 1056 | + depends on !OF || IIO=n || IIO | |
| 1057 | 1057 | help |
| 1058 | 1058 | This driver supports NTC thermistors sensor reading and its |
| 1059 | 1059 | interpretation. The driver can also monitor the temperature and |
| @@ -163,7 +163,7 @@ static ssize_t store_hyst(struct device *dev, · 162 unmodified lines | ||
| 163 | 163 | if (retval < 0) |
| 164 | 164 | goto fail; |
| 165 | 165 | |
| 166 | − hyst = val - retval * 1000; | |
| 166 | + hyst = retval * 1000 - val; | |
| 167 | 167 | hyst = DIV_ROUND_CLOSEST(hyst, 1000); |
| 168 | 168 | if (hyst < 0 || hyst > 255) { |
| 169 | 169 | retval = -ERANGE; |
| @@ -330,7 +330,7 @@ static int emc1403_detect(struct i2c_client *client, · 160 unmodified lines | ||
| 330 | 330 | } |
| 331 | 331 | |
| 332 | 332 | id = i2c_smbus_read_byte_data(client, THERMAL_REVISION_REG); |
| 333 | − if (id != 0x01) | |
| 333 | + if (id < 0x01 || id > 0x04) | |
| 334 | 334 | return -ENODEV; |
| 335 | 335 | |
| 336 | 336 | return 0; |
| @@ -355,9 +355,9 @@ static int emc1403_probe(struct i2c_client *client, · 18 unmodified lines | ||
| 355 | 355 | if (id->driver_data) |
| 356 | 356 | data->groups[1] = &emc1404_group; |
| 357 | 357 | |
| 358 | − hwmon_dev = hwmon_device_register_with_groups(&client->dev, | |
| 359 | − client->name, data, | |
| 360 | − data->groups); | |
| 358 | + hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev, | |
| 359 | + client->name, data, | |
| 360 | + data->groups); | |
| 361 | 361 | if (IS_ERR(hwmon_dev)) |
| 362 | 362 | return PTR_ERR(hwmon_dev); |
| 363 | 363 | |
| @@ -44,6 +44,7 @@ struct ntc_compensation { · 43 unmodified lines | ||
| 44 | 44 | unsigned int ohm; |
| 45 | 45 | }; |
| 46 | 46 | |
| 47 | +/* Order matters, ntc_match references the entries by index */ | |
| 47 | 48 | static const struct platform_device_id ntc_thermistor_id[] = { |
| 48 | 49 | { "ncp15wb473", TYPE_NCPXXWB473 }, |
| 49 | 50 | { "ncp18wb473", TYPE_NCPXXWB473 }, |
| @@ -141,7 +142,7 @@ struct ntc_data { · 91 unmodified lines | ||
| 141 | 142 | char name[PLATFORM_NAME_SIZE]; |
| 142 | 143 | }; |
| 143 | 144 | |
| 144 | −#ifdef CONFIG_OF | |
| 145 | +#if defined(CONFIG_OF) && IS_ENABLED(CONFIG_IIO) | |
| 145 | 146 | static int ntc_adc_iio_read(struct ntc_thermistor_platform_data *pdata) |
| 146 | 147 | { |
| 147 | 148 | struct iio_channel *channel = pdata->chan; |
| @@ -163,15 +164,15 @@ static int ntc_adc_iio_read(struct ntc_thermistor_platform_data *pdata) · 15 unmodified lines | ||
| 163 | 164 | |
| 164 | 165 | static const struct of_device_id ntc_match[] = { |
| 165 | 166 | { .compatible = "ntc,ncp15wb473", |
| 166 | − .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | |
| 167 | + .data = &ntc_thermistor_id[0] }, | |
| 167 | 168 | { .compatible = "ntc,ncp18wb473", |
| 168 | − .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | |
| 169 | + .data = &ntc_thermistor_id[1] }, | |
| 169 | 170 | { .compatible = "ntc,ncp21wb473", |
| 170 | − .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | |
| 171 | + .data = &ntc_thermistor_id[2] }, | |
| 171 | 172 | { .compatible = "ntc,ncp03wb473", |
| 172 | − .data = &ntc_thermistor_id[TYPE_NCPXXWB473] }, | |
| 173 | + .data = &ntc_thermistor_id[3] }, | |
| 173 | 174 | { .compatible = "ntc,ncp15wl333", |
| 174 | − .data = &ntc_thermistor_id[TYPE_NCPXXWL333] }, | |
| 175 | + .data = &ntc_thermistor_id[4] }, | |
| 175 | 176 | { }, |
| 176 | 177 | }; |
| 177 | 178 | MODULE_DEVICE_TABLE(of, ntc_match); |
| @@ -223,6 +224,8 @@ ntc_thermistor_parse_dt(struct platform_device *pdev) · 45 unmodified lines | ||
| 223 | 224 | return NULL; |
| 224 | 225 | } |
| 225 | 226 | |
| 227 | +#define ntc_match NULL | |
| 228 | + | |
| 226 | 229 | static void ntc_iio_channel_release(struct ntc_thermistor_platform_data *pdata) |
| 227 | 230 | { } |
| 228 | 231 | #endif |
| @@ -422,6 +422,9 @@ static void i2c_dw_xfer_init(struct dw_i2c_dev *dev) · 421 unmodified lines | ||
| 422 | 422 | */ |
| 423 | 423 | dw_writel(dev, msgs[dev->msg_write_idx].addr | ic_tar, DW_IC_TAR); |
| 424 | 424 | |
| 425 | + /* enforce disabled interrupts (due to HW issues) */ | |
| 426 | + i2c_dw_disable_int(dev); | |
| 427 | + | |
| 425 | 428 | /* Enable the adapter */ |
| 426 | 429 | __i2c_dw_enable(dev, true); |
| 427 | 430 | |
| @@ -999,7 +999,7 @@ static int nmk_i2c_probe(struct amba_device *adev, const struct amba_id *id) · 998 unmodified lines | ||
| 999 | 999 | |
| 1000 | 1000 | dev->virtbase = devm_ioremap(&adev->dev, adev->res.start, |
| 1001 | 1001 | resource_size(&adev->res)); |
| 1002 | − if (IS_ERR(dev->virtbase)) { | |
| 1002 | + if (!dev->virtbase) { | |
| 1003 | 1003 | ret = -ENOMEM; |
| 1004 | 1004 | goto err_no_mem; |
| 1005 | 1005 | } |
| @@ -479,7 +479,7 @@ static int qup_i2c_xfer(struct i2c_adapter *adap, · 478 unmodified lines | ||
| 479 | 479 | int ret, idx; |
| 480 | 480 | |
| 481 | 481 | ret = pm_runtime_get_sync(qup->dev); |
| 482 | − if (ret) | |
| 482 | + if (ret < 0) | |
| 483 | 483 | goto out; |
| 484 | 484 | |
| 485 | 485 | writel(1, qup->base + QUP_SW_RESET); |
| @@ -561,6 +561,12 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, · 560 unmodified lines | ||
| 561 | 561 | |
| 562 | 562 | ret = -EINVAL; |
| 563 | 563 | for (i = 0; i < num; i++) { |
| 564 | + /* This HW can't send STOP after address phase */ | |
| 565 | + if (msgs[i].len == 0) { | |
| 566 | + ret = -EOPNOTSUPP; | |
| 567 | + break; | |
| 568 | + } | |
| 569 | + | |
| 564 | 570 | /*-------------- spin lock -----------------*/ |
| 565 | 571 | spin_lock_irqsave(&priv->lock, flags); |
| 566 | 572 | |
| @@ -625,7 +631,8 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap, · 58 unmodified lines | ||
| 625 | 631 | |
| 626 | 632 | static u32 rcar_i2c_func(struct i2c_adapter *adap) |
| 627 | 633 | { |
| 628 | − return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; | |
| 634 | + /* This HW can't do SMBUS_QUICK and NOSTART */ | |
| 635 | + return I2C_FUNC_I2C | (I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK); | |
| 629 | 636 | } |
| 630 | 637 | |
| 631 | 638 | static const struct i2c_algorithm rcar_i2c_algo = { |
| @@ -1276,10 +1276,10 @@ static int s3c24xx_i2c_resume(struct device *dev) · 1275 unmodified lines | ||
| 1276 | 1276 | struct platform_device *pdev = to_platform_device(dev); |
| 1277 | 1277 | struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); |
| 1278 | 1278 | |
| 1279 | − i2c->suspended = 0; | |
| 1280 | 1279 | clk_prepare_enable(i2c->clk); |
| 1281 | 1280 | s3c24xx_i2c_init(i2c); |
| 1282 | 1281 | clk_disable_unprepare(i2c->clk); |
| 1282 | + i2c->suspended = 0; | |
| 1283 | 1283 | |
| 1284 | 1284 | return 0; |
| 1285 | 1285 | } |
| @@ -48,6 +48,7 @@ · 47 unmodified lines | ||
| 48 | 48 | |
| 49 | 49 | #include <linux/mlx4/driver.h> |
| 50 | 50 | #include <linux/mlx4/cmd.h> |
| 51 | +#include <linux/mlx4/qp.h> | |
| 51 | 52 | |
| 52 | 53 | #include "mlx4_ib.h" |
| 53 | 54 | #include "user.h" |
| @@ -1614,6 +1615,53 @@ static int mlx4_ib_inet6_event(struct notifier_block *this, unsigned long event, · 1560 unmodified lines | ||
| 1614 | 1615 | } |
| 1615 | 1616 | #endif |
| 1616 | 1617 | |
| 1618 | +#define MLX4_IB_INVALID_MAC ((u64)-1) | |
| 1619 | +static void mlx4_ib_update_qps(struct mlx4_ib_dev *ibdev, | |
| 1620 | + struct net_device *dev, | |
| 1621 | + int port) | |
| 1622 | +{ | |
| 1623 | + u64 new_smac = 0; | |
| 1624 | + u64 release_mac = MLX4_IB_INVALID_MAC; | |
| 1625 | + struct mlx4_ib_qp *qp; | |
| 1626 | + | |
| 1627 | + read_lock(&dev_base_lock); | |
| 1628 | + new_smac = mlx4_mac_to_u64(dev->dev_addr); | |
| 1629 | + read_unlock(&dev_base_lock); | |
| 1630 | + | |
| 1631 | + mutex_lock(&ibdev->qp1_proxy_lock[port - 1]); | |
| 1632 | + qp = ibdev->qp1_proxy[port - 1]; | |
| 1633 | + if (qp) { | |
| 1634 | + int new_smac_index; | |
| 1635 | + u64 old_smac = qp->pri.smac; | |
| 1636 | + struct mlx4_update_qp_params update_params; | |
| 1637 | + | |
| 1638 | + if (new_smac == old_smac) | |
| 1639 | + goto unlock; | |
| 1640 | + | |
| 1641 | + new_smac_index = mlx4_register_mac(ibdev->dev, port, new_smac); | |
| 1642 | + | |
| 1643 | + if (new_smac_index < 0) | |
| 1644 | + goto unlock; | |
| 1645 | + | |
| 1646 | + update_params.smac_index = new_smac_index; | |
| 1647 | + if (mlx4_update_qp(ibdev->dev, &qp->mqp, MLX4_UPDATE_QP_SMAC, | |
| 1648 | + &update_params)) { | |
| 1649 | + release_mac = new_smac; | |
| 1650 | + goto unlock; | |
| 1651 | + } | |
| 1652 | + | |
| 1653 | + qp->pri.smac = new_smac; | |
| 1654 | + qp->pri.smac_index = new_smac_index; | |
| 1655 | + | |
| 1656 | + release_mac = old_smac; | |
| 1657 | + } | |
| 1658 | + | |
| 1659 | +unlock: | |
| 1660 | + mutex_unlock(&ibdev->qp1_proxy_lock[port - 1]); | |
| 1661 | + if (release_mac != MLX4_IB_INVALID_MAC) | |
| 1662 | + mlx4_unregister_mac(ibdev->dev, port, release_mac); | |
| 1663 | +} | |
| 1664 | + | |
| 1617 | 1665 | static void mlx4_ib_get_dev_addr(struct net_device *dev, |
| 1618 | 1666 | struct mlx4_ib_dev *ibdev, u8 port) |
| 1619 | 1667 | { |
| @@ -1689,9 +1737,13 @@ static int mlx4_ib_init_gid_table(struct mlx4_ib_dev *ibdev) · 69 unmodified lines | ||
| 1689 | 1737 | return 0; |
| 1690 | 1738 | } |
| 1691 | 1739 | |
| 1692 | −static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev) | |
| 1740 | +static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev, | |
| 1741 | + struct net_device *dev, | |
| 1742 | + unsigned long event) | |
| 1743 | + | |
| 1693 | 1744 | { |
| 1694 | 1745 | struct mlx4_ib_iboe *iboe; |
| 1746 | + int update_qps_port = -1; | |
| 1695 | 1747 | int port; |
| 1696 | 1748 | |
| 1697 | 1749 | iboe = &ibdev->iboe; |
| @@ -1719,6 +1771,11 @@ static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev) · 21 unmodified lines | ||
| 1719 | 1771 | } |
| 1720 | 1772 | curr_master = iboe->masters[port - 1]; |
| 1721 | 1773 | |
| 1774 | + if (dev == iboe->netdevs[port - 1] && | |
| 1775 | + (event == NETDEV_CHANGEADDR || event == NETDEV_REGISTER || | |
| 1776 | + event == NETDEV_UP || event == NETDEV_CHANGE)) | |
| 1777 | + update_qps_port = port; | |
| 1778 | + | |
| 1722 | 1779 | if (curr_netdev) { |
| 1723 | 1780 | port_state = (netif_running(curr_netdev) && netif_carrier_ok(curr_netdev)) ? |
| 1724 | 1781 | IB_PORT_ACTIVE : IB_PORT_DOWN; |
| @@ -1752,6 +1809,9 @@ static void mlx4_ib_scan_netdevs(struct mlx4_ib_dev *ibdev) · 27 unmodified lines | ||
| 1752 | 1809 | } |
| 1753 | 1810 | |
| 1754 | 1811 | spin_unlock(&iboe->lock); |
| 1812 | + | |
| 1813 | + if (update_qps_port > 0) | |
| 1814 | + mlx4_ib_update_qps(ibdev, dev, update_qps_port); | |
| 1755 | 1815 | } |
| 1756 | 1816 | |
| 1757 | 1817 | static int mlx4_ib_netdev_event(struct notifier_block *this, |
| @@ -1764,7 +1824,7 @@ static int mlx4_ib_netdev_event(struct notifier_block *this, · 6 unmodified lines | ||
| 1764 | 1824 | return NOTIFY_DONE; |
| 1765 | 1825 | |
| 1766 | 1826 | ibdev = container_of(this, struct mlx4_ib_dev, iboe.nb); |
| 1767 | − mlx4_ib_scan_netdevs(ibdev); | |
| 1827 | + mlx4_ib_scan_netdevs(ibdev, dev, event); | |
| 1768 | 1828 | |
| 1769 | 1829 | return NOTIFY_DONE; |
| 1770 | 1830 | } |
| @@ -2043,6 +2103,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) · 272 unmodified lines | ||
| 2043 | 2103 | goto err_map; |
| 2044 | 2104 | |
| 2045 | 2105 | for (i = 0; i < ibdev->num_ports; ++i) { |
| 2106 | + mutex_init(&ibdev->qp1_proxy_lock[i]); | |
| 2046 | 2107 | if (mlx4_ib_port_link_layer(&ibdev->ib_dev, i + 1) == |
| 2047 | 2108 | IB_LINK_LAYER_ETHERNET) { |
| 2048 | 2109 | err = mlx4_counter_alloc(ibdev->dev, &ibdev->counters[i]); |
| @@ -2126,7 +2187,7 @@ static void *mlx4_ib_add(struct mlx4_dev *dev) · 77 unmodified lines | ||
| 2126 | 2187 | for (i = 1 ; i <= ibdev->num_ports ; ++i) |
| 2127 | 2188 | reset_gid_table(ibdev, i); |
| 2128 | 2189 | rtnl_lock(); |
| 2129 | − mlx4_ib_scan_netdevs(ibdev); | |
| 2190 | + mlx4_ib_scan_netdevs(ibdev, NULL, 0); | |
| 2130 | 2191 | rtnl_unlock(); |
| 2131 | 2192 | mlx4_ib_init_gid_table(ibdev); |
| 2132 | 2193 | } |
| @@ -522,6 +522,9 @@ struct mlx4_ib_dev { · 521 unmodified lines | ||
| 522 | 522 | int steer_qpn_count; |
| 523 | 523 | int steer_qpn_base; |
| 524 | 524 | int steering_support; |
| 525 | + struct mlx4_ib_qp *qp1_proxy[MLX4_MAX_PORTS]; | |
| 526 | + /* lock when destroying qp1_proxy and getting netdev events */ | |
| 527 | + struct mutex qp1_proxy_lock[MLX4_MAX_PORTS]; | |
| 525 | 528 | }; |
| 526 | 529 | |
| 527 | 530 | struct ib_event_work { |
| @@ -1132,6 +1132,12 @@ int mlx4_ib_destroy_qp(struct ib_qp *qp) · 1131 unmodified lines | ||
| 1132 | 1132 | if (is_qp0(dev, mqp)) |
| 1133 | 1133 | mlx4_CLOSE_PORT(dev->dev, mqp->port); |
| 1134 | 1134 | |
| 1135 | + if (dev->qp1_proxy[mqp->port - 1] == mqp) { | |
| 1136 | + mutex_lock(&dev->qp1_proxy_lock[mqp->port - 1]); | |
| 1137 | + dev->qp1_proxy[mqp->port - 1] = NULL; | |
| 1138 | + mutex_unlock(&dev->qp1_proxy_lock[mqp->port - 1]); | |
| 1139 | + } | |
| 1140 | + | |
| 1135 | 1141 | pd = get_pd(mqp); |
| 1136 | 1142 | destroy_qp_common(dev, mqp, !!pd->ibpd.uobject); |
| 1137 | 1143 | |
| @@ -1646,6 +1652,8 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp, · 508 unmodified lines | ||
| 1646 | 1652 | err = handle_eth_ud_smac_index(dev, qp, (u8 *)attr->smac, context); |
| 1647 | 1653 | if (err) |
| 1648 | 1654 | return -EINVAL; |
| 1655 | + if (qp->mlx4_ib_qp_type == MLX4_IB_QPT_PROXY_GSI) | |
| 1656 | + dev->qp1_proxy[qp->port - 1] = qp; | |
| 1649 | 1657 | } |
| 1650 | 1658 | } |
| 1651 | 1659 | } |
| @@ -28,6 +28,7 @@ · 27 unmodified lines | ||
| 28 | 28 | #include <target/target_core_base.h> |
| 29 | 29 | #include <target/target_core_fabric.h> |
| 30 | 30 | #include <target/iscsi/iscsi_transport.h> |
| 31 | +#include <linux/semaphore.h> | |
| 31 | 32 | |
| 32 | 33 | #include "isert_proto.h" |
| 33 | 34 | #include "ib_isert.h" |
| @@ -561,7 +562,15 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) · 527 unmodified lines | ||
| 561 | 562 | struct isert_device *device; |
| 562 | 563 | struct ib_device *ib_dev = cma_id->device; |
| 563 | 564 | int ret = 0; |
| 564 | − u8 pi_support = np->tpg_np->tpg->tpg_attrib.t10_pi; | |
| 565 | + u8 pi_support; | |
| 566 | + | |
| 567 | + spin_lock_bh(&np->np_thread_lock); | |
| 568 | + if (!np->enabled) { | |
| 569 | + spin_unlock_bh(&np->np_thread_lock); | |
| 570 | + pr_debug("iscsi_np is not enabled, reject connect request\n"); | |
| 571 | + return rdma_reject(cma_id, NULL, 0); | |
| 572 | + } | |
| 573 | + spin_unlock_bh(&np->np_thread_lock); | |
| 565 | 574 | |
| 566 | 575 | pr_debug("Entering isert_connect_request cma_id: %p, context: %p\n", |
| 567 | 576 | cma_id, cma_id->context); |
| @@ -652,6 +661,7 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) · 84 unmodified lines | ||
| 652 | 661 | goto out_mr; |
| 653 | 662 | } |
| 654 | 663 | |
| 664 | + pi_support = np->tpg_np->tpg->tpg_attrib.t10_pi; | |
| 655 | 665 | if (pi_support && !device->pi_capable) { |
| 656 | 666 | pr_err("Protection information requested but not supported\n"); |
| 657 | 667 | ret = -EINVAL; |
| @@ -663,11 +673,11 @@ isert_connect_request(struct rdma_cm_id *cma_id, struct rdma_cm_event *event) · 5 unmodified lines | ||
| 663 | 673 | goto out_conn_dev; |
| 664 | 674 | |
| 665 | 675 | mutex_lock(&isert_np->np_accept_mutex); |
| 666 | − list_add_tail(&isert_np->np_accept_list, &isert_conn->conn_accept_node); | |
| 676 | + list_add_tail(&isert_conn->conn_accept_node, &isert_np->np_accept_list); | |
| 667 | 677 | mutex_unlock(&isert_np->np_accept_mutex); |
| 668 | 678 | |
| 669 | − pr_debug("isert_connect_request() waking up np_accept_wq: %p\n", np); | |
| 670 | − wake_up(&isert_np->np_accept_wq); | |
| 679 | + pr_debug("isert_connect_request() up np_sem np: %p\n", np); | |
| 680 | + up(&isert_np->np_sem); | |
| 671 | 681 | return 0; |
| 672 | 682 | |
| 673 | 683 | out_conn_dev: |
| @@ -2999,7 +3009,7 @@ isert_setup_np(struct iscsi_np *np, · 2325 unmodified lines | ||
| 2999 | 3009 | pr_err("Unable to allocate struct isert_np\n"); |
| 3000 | 3010 | return -ENOMEM; |
| 3001 | 3011 | } |
| 3002 | − init_waitqueue_head(&isert_np->np_accept_wq); | |
| 3012 | + sema_init(&isert_np->np_sem, 0); | |
| 3003 | 3013 | mutex_init(&isert_np->np_accept_mutex); |
| 3004 | 3014 | INIT_LIST_HEAD(&isert_np->np_accept_list); |
| 3005 | 3015 | init_completion(&isert_np->np_login_comp); |
| @@ -3047,18 +3057,6 @@ out: · 41 unmodified lines | ||
| 3047 | 3057 | return ret; |
| 3048 | 3058 | } |
| 3049 | 3059 | |
| 3050 | −static int | |
| 3051 | −isert_check_accept_queue(struct isert_np *isert_np) | |
| 3052 | −{ | |
| 3053 | − int empty; | |
| 3054 | − | |
| 3055 | − mutex_lock(&isert_np->np_accept_mutex); | |
| 3056 | − empty = list_empty(&isert_np->np_accept_list); | |
| 3057 | − mutex_unlock(&isert_np->np_accept_mutex); | |
| 3058 | − | |
| 3059 | − return empty; | |
| 3060 | −} | |
| 3061 | − | |
| 3062 | 3060 | static int |
| 3063 | 3061 | isert_rdma_accept(struct isert_conn *isert_conn) |
| 3064 | 3062 | { |
| @@ -3151,16 +3149,14 @@ isert_accept_np(struct iscsi_np *np, struct iscsi_conn *conn) · 86 unmodified lines | ||
| 3151 | 3149 | int max_accept = 0, ret; |
| 3152 | 3150 | |
| 3153 | 3151 | accept_wait: |
| 3154 | − ret = wait_event_interruptible(isert_np->np_accept_wq, | |
| 3155 | − !isert_check_accept_queue(isert_np) || | |
| 3156 | − np->np_thread_state == ISCSI_NP_THREAD_RESET); | |
| 3152 | + ret = down_interruptible(&isert_np->np_sem); | |
| 3157 | 3153 | if (max_accept > 5) |
| 3158 | 3154 | return -ENODEV; |
| 3159 | 3155 | |
| 3160 | 3156 | spin_lock_bh(&np->np_thread_lock); |
| 3161 | 3157 | if (np->np_thread_state == ISCSI_NP_THREAD_RESET) { |
| 3162 | 3158 | spin_unlock_bh(&np->np_thread_lock); |
| 3163 | − pr_err("ISCSI_NP_THREAD_RESET for isert_accept_np\n"); | |
| 3159 | + pr_debug("ISCSI_NP_THREAD_RESET for isert_accept_np\n"); | |
| 3164 | 3160 | return -ENODEV; |
| 3165 | 3161 | } |
| 3166 | 3162 | spin_unlock_bh(&np->np_thread_lock); |
| @@ -182,7 +182,7 @@ struct isert_device { · 181 unmodified lines | ||
| 182 | 182 | }; |
| 183 | 183 | |
| 184 | 184 | struct isert_np { |
| 185 | − wait_queue_head_t np_accept_wq; | |
| 185 | + struct semaphore np_sem; | |
| 186 | 186 | struct rdma_cm_id *np_cm_id; |
| 187 | 187 | struct mutex np_accept_mutex; |
| 188 | 188 | struct list_head np_accept_list; |
| @@ -71,7 +71,7 @@ config KEYBOARD_ATKBD · 70 unmodified lines | ||
| 71 | 71 | default y |
| 72 | 72 | select SERIO |
| 73 | 73 | select SERIO_LIBPS2 |
| 74 | − select SERIO_I8042 if X86 | |
| 74 | + select SERIO_I8042 if ARCH_MIGHT_HAVE_PC_SERIO | |
| 75 | 75 | select SERIO_GSCPS2 if GSC |
| 76 | 76 | help |
| 77 | 77 | Say Y here if you want to use a standard AT or PS/2 keyboard. Usually |
| @@ -243,6 +243,12 @@ static void (*atkbd_platform_fixup)(struct atkbd *, const void *data); · 242 unmodified lines | ||
| 243 | 243 | static void *atkbd_platform_fixup_data; |
| 244 | 244 | static unsigned int (*atkbd_platform_scancode_fixup)(struct atkbd *, unsigned int); |
| 245 | 245 | |
| 246 | +/* | |
| 247 | + * Certain keyboards to not like ATKBD_CMD_RESET_DIS and stop responding | |
| 248 | + * to many commands until full reset (ATKBD_CMD_RESET_BAT) is performed. | |
| 249 | + */ | |
| 250 | +static bool atkbd_skip_deactivate; | |
| 251 | + | |
| 246 | 252 | static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, |
| 247 | 253 | ssize_t (*handler)(struct atkbd *, char *)); |
| 248 | 254 | static ssize_t atkbd_attr_set_helper(struct device *dev, const char *buf, size_t count, |
| @@ -768,7 +774,8 @@ static int atkbd_probe(struct atkbd *atkbd) · 519 unmodified lines | ||
| 768 | 774 | * Make sure nothing is coming from the keyboard and disturbs our |
| 769 | 775 | * internal state. |
| 770 | 776 | */ |
| 771 | − atkbd_deactivate(atkbd); | |
| 777 | + if (!atkbd_skip_deactivate) | |
| 778 | + atkbd_deactivate(atkbd); | |
| 772 | 779 | |
| 773 | 780 | return 0; |
| 774 | 781 | } |
| @@ -1638,6 +1645,12 @@ static int __init atkbd_setup_scancode_fixup(const struct dmi_system_id *id) · 863 unmodified lines | ||
| 1638 | 1645 | return 1; |
| 1639 | 1646 | } |
| 1640 | 1647 | |
| 1648 | +static int __init atkbd_deactivate_fixup(const struct dmi_system_id *id) | |
| 1649 | +{ | |
| 1650 | + atkbd_skip_deactivate = true; | |
| 1651 | + return 1; | |
| 1652 | +} | |
| 1653 | + | |
| 1641 | 1654 | static const struct dmi_system_id atkbd_dmi_quirk_table[] __initconst = { |
| 1642 | 1655 | { |
| 1643 | 1656 | .matches = { |
| @@ -1775,6 +1788,20 @@ static const struct dmi_system_id atkbd_dmi_quirk_table[] __initconst = { · 131 unmodified lines | ||
| 1775 | 1788 | .callback = atkbd_setup_scancode_fixup, |
| 1776 | 1789 | .driver_data = atkbd_oqo_01plus_scancode_fixup, |
| 1777 | 1790 | }, |
| 1791 | + { | |
| 1792 | + .matches = { | |
| 1793 | + DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"), | |
| 1794 | + DMI_MATCH(DMI_PRODUCT_NAME, "LW25-B7HV"), | |
| 1795 | + }, | |
| 1796 | + .callback = atkbd_deactivate_fixup, | |
| 1797 | + }, | |
| 1798 | + { | |
| 1799 | + .matches = { | |
| 1800 | + DMI_MATCH(DMI_SYS_VENDOR, "LG Electronics"), | |
| 1801 | + DMI_MATCH(DMI_PRODUCT_NAME, "P1-J273B"), | |
| 1802 | + }, | |
| 1803 | + .callback = atkbd_deactivate_fixup, | |
| 1804 | + }, | |
| 1778 | 1805 | { } |
| 1779 | 1806 | }; |
| 1780 | 1807 | |
| @@ -111,6 +111,8 @@ struct pxa27x_keypad { · 110 unmodified lines | ||
| 111 | 111 | unsigned short keycodes[MAX_KEYPAD_KEYS]; |
| 112 | 112 | int rotary_rel_code[2]; |
| 113 | 113 | |
| 114 | + unsigned int row_shift; | |
| 115 | + | |
| 114 | 116 | /* state row bits of each column scan */ |
| 115 | 117 | uint32_t matrix_key_state[MAX_MATRIX_KEY_COLS]; |
| 116 | 118 | uint32_t direct_key_state; |
| @@ -467,7 +469,8 @@ scan: · 350 unmodified lines | ||
| 467 | 469 | if ((bits_changed & (1 << row)) == 0) |
| 468 | 470 | continue; |
| 469 | 471 | |
| 470 | − code = MATRIX_SCAN_CODE(row, col, MATRIX_ROW_SHIFT); | |
| 472 | + code = MATRIX_SCAN_CODE(row, col, keypad->row_shift); | |
| 473 | + | |
| 471 | 474 | input_event(input_dev, EV_MSC, MSC_SCAN, code); |
| 472 | 475 | input_report_key(input_dev, keypad->keycodes[code], |
| 473 | 476 | new_state[col] & (1 << row)); |
| @@ -802,6 +805,8 @@ static int pxa27x_keypad_probe(struct platform_device *pdev) · 328 unmodified lines | ||
| 802 | 805 | goto failed_put_clk; |
| 803 | 806 | } |
| 804 | 807 | |
| 808 | + keypad->row_shift = get_count_order(pdata->matrix_key_cols); | |
| 809 | + | |
| 805 | 810 | if ((pdata->enable_rotary0 && keypad->rotary_rel_code[0] != -1) || |
| 806 | 811 | (pdata->enable_rotary1 && keypad->rotary_rel_code[1] != -1)) { |
| 807 | 812 | input_dev->evbit[0] |= BIT_MASK(EV_REL); |
| @@ -392,6 +392,13 @@ static const struct of_device_id tca8418_dt_ids[] = { · 391 unmodified lines | ||
| 392 | 392 | { } |
| 393 | 393 | }; |
| 394 | 394 | MODULE_DEVICE_TABLE(of, tca8418_dt_ids); |
| 395 | + | |
| 396 | +/* | |
| 397 | + * The device tree based i2c loader looks for | |
| 398 | + * "i2c:" + second_component_of(property("compatible")) | |
| 399 | + * and therefore we need an alias to be found. | |
| 400 | + */ | |
| 401 | +MODULE_ALIAS("i2c:tca8418"); | |
| 395 | 402 | #endif |
| 396 | 403 | |
| 397 | 404 | static struct i2c_driver tca8418_keypad_driver = { |
| @@ -70,6 +70,7 @@ · 69 unmodified lines | ||
| 70 | 70 | #define BMA150_CFG_5_REG 0x11 |
| 71 | 71 | |
| 72 | 72 | #define BMA150_CHIP_ID 2 |
| 73 | +#define BMA180_CHIP_ID 3 | |
| 73 | 74 | #define BMA150_CHIP_ID_REG BMA150_DATA_0_REG |
| 74 | 75 | |
| 75 | 76 | #define BMA150_ACC_X_LSB_REG BMA150_DATA_2_REG |
| @@ -539,7 +540,7 @@ static int bma150_probe(struct i2c_client *client, · 463 unmodified lines | ||
| 539 | 540 | } |
| 540 | 541 | |
| 541 | 542 | chip_id = i2c_smbus_read_byte_data(client, BMA150_CHIP_ID_REG); |
| 542 | − if (chip_id != BMA150_CHIP_ID) { | |
| 543 | + if (chip_id != BMA150_CHIP_ID && chip_id != BMA180_CHIP_ID) { | |
| 543 | 544 | dev_err(&client->dev, "BMA150 chip id error: %d\n", chip_id); |
| 544 | 545 | return -EINVAL; |
| 545 | 546 | } |
| @@ -643,6 +644,7 @@ static UNIVERSAL_DEV_PM_OPS(bma150_pm, bma150_suspend, bma150_resume, NULL); · 97 unmodified lines | ||
| 643 | 644 | |
| 644 | 645 | static const struct i2c_device_id bma150_id[] = { |
| 645 | 646 | { "bma150", 0 }, |
| 647 | + { "bma180", 0 }, | |
| 646 | 648 | { "smb380", 0 }, |
| 647 | 649 | { "bma023", 0 }, |
| 648 | 650 | { } |
| @@ -17,7 +17,7 @@ config MOUSE_PS2 · 16 unmodified lines | ||
| 17 | 17 | default y |
| 18 | 18 | select SERIO |
| 19 | 19 | select SERIO_LIBPS2 |
| 20 | − select SERIO_I8042 if X86 | |
| 20 | + select SERIO_I8042 if ARCH_MIGHT_HAVE_PC_SERIO | |
| 21 | 21 | select SERIO_GSCPS2 if GSC |
| 22 | 22 | help |
| 23 | 23 | Say Y here if you have a PS/2 mouse connected to your system. This |
| @@ -11,6 +11,7 @@ · 10 unmodified lines | ||
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | 13 | #include <linux/delay.h> |
| 14 | +#include <linux/dmi.h> | |
| 14 | 15 | #include <linux/slab.h> |
| 15 | 16 | #include <linux/module.h> |
| 16 | 17 | #include <linux/input.h> |
| @@ -831,7 +832,11 @@ static int elantech_set_absolute_mode(struct psmouse *psmouse) · 814 unmodified lines | ||
| 831 | 832 | break; |
| 832 | 833 | |
| 833 | 834 | case 3: |
| 834 | − etd->reg_10 = 0x0b; | |
| 835 | + if (etd->set_hw_resolution) | |
| 836 | + etd->reg_10 = 0x0b; | |
| 837 | + else | |
| 838 | + etd->reg_10 = 0x03; | |
| 839 | + | |
| 835 | 840 | if (elantech_write_reg(psmouse, 0x10, etd->reg_10)) |
| 836 | 841 | rc = -1; |
| 837 | 842 | |
| @@ -1330,6 +1335,22 @@ static int elantech_reconnect(struct psmouse *psmouse) · 492 unmodified lines | ||
| 1330 | 1335 | return 0; |
| 1331 | 1336 | } |
| 1332 | 1337 | |
| 1338 | +/* | |
| 1339 | + * Some hw_version 3 models go into error state when we try to set bit 3 of r10 | |
| 1340 | + */ | |
| 1341 | +static const struct dmi_system_id no_hw_res_dmi_table[] = { | |
| 1342 | +#if defined(CONFIG_DMI) && defined(CONFIG_X86) | |
| 1343 | + { | |
| 1344 | + /* Gigabyte U2442 */ | |
| 1345 | + .matches = { | |
| 1346 | + DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"), | |
| 1347 | + DMI_MATCH(DMI_PRODUCT_NAME, "U2442"), | |
| 1348 | + }, | |
| 1349 | + }, | |
| 1350 | +#endif | |
| 1351 | + { } | |
| 1352 | +}; | |
| 1353 | + | |
| 1333 | 1354 | /* |
| 1334 | 1355 | * determine hardware version and set some properties according to it. |
| 1335 | 1356 | */ |
| @@ -1390,6 +1411,9 @@ static int elantech_set_properties(struct elantech_data *etd) · 54 unmodified lines | ||
| 1390 | 1411 | */ |
| 1391 | 1412 | etd->crc_enabled = ((etd->fw_version & 0x4000) == 0x4000); |
| 1392 | 1413 | |
| 1414 | + /* Enable real hardware resolution on hw_version 3 ? */ | |
| 1415 | + etd->set_hw_resolution = !dmi_check_system(no_hw_res_dmi_table); | |
| 1416 | + | |
| 1393 | 1417 | return 0; |
| 1394 | 1418 | } |
| 1395 | 1419 | |
| @@ -130,6 +130,7 @@ struct elantech_data { · 129 unmodified lines | ||
| 130 | 130 | bool jumpy_cursor; |
| 131 | 131 | bool reports_pressure; |
| 132 | 132 | bool crc_enabled; |
| 133 | + bool set_hw_resolution; | |
| 133 | 134 | unsigned char hw_version; |
| 134 | 135 | unsigned int fw_version; |
| 135 | 136 | unsigned int single_finger_reports; |
| @@ -117,6 +117,31 @@ void synaptics_reset(struct psmouse *psmouse) · 116 unmodified lines | ||
| 117 | 117 | } |
| 118 | 118 | |
| 119 | 119 | #ifdef CONFIG_MOUSE_PS2_SYNAPTICS |
| 120 | +struct min_max_quirk { | |
| 121 | + const char * const *pnp_ids; | |
| 122 | + int x_min, x_max, y_min, y_max; | |
| 123 | +}; | |
| 124 | + | |
| 125 | +static const struct min_max_quirk min_max_pnpid_table[] = { | |
| 126 | + { | |
| 127 | + (const char * const []){"LEN0033", NULL}, | |
| 128 | + 1024, 5052, 2258, 4832 | |
| 129 | + }, | |
| 130 | + { | |
| 131 | + (const char * const []){"LEN0035", "LEN0042", NULL}, | |
| 132 | + 1232, 5710, 1156, 4696 | |
| 133 | + }, | |
| 134 | + { | |
| 135 | + (const char * const []){"LEN0034", "LEN0036", "LEN2004", NULL}, | |
| 136 | + 1024, 5112, 2024, 4832 | |
| 137 | + }, | |
| 138 | + { | |
| 139 | + (const char * const []){"LEN2001", NULL}, | |
| 140 | + 1024, 5022, 2508, 4832 | |
| 141 | + }, | |
| 142 | + { } | |
| 143 | +}; | |
| 144 | + | |
| 120 | 145 | /* This list has been kindly provided by Synaptics. */ |
| 121 | 146 | static const char * const topbuttonpad_pnp_ids[] = { |
| 122 | 147 | "LEN0017", |
| @@ -129,7 +154,7 @@ static const char * const topbuttonpad_pnp_ids[] = { · 6 unmodified lines | ||
| 129 | 154 | "LEN002D", |
| 130 | 155 | "LEN002E", |
| 131 | 156 | "LEN0033", /* Helix */ |
| 132 | − "LEN0034", /* T431s, T540, X1 Carbon 2nd */ | |
| 157 | + "LEN0034", /* T431s, L440, L540, T540, W540, X1 Carbon 2nd */ | |
| 133 | 158 | "LEN0035", /* X240 */ |
| 134 | 159 | "LEN0036", /* T440 */ |
| 135 | 160 | "LEN0037", |
| @@ -142,7 +167,7 @@ static const char * const topbuttonpad_pnp_ids[] = { · 6 unmodified lines | ||
| 142 | 167 | "LEN0048", |
| 143 | 168 | "LEN0049", |
| 144 | 169 | "LEN2000", |
| 145 | − "LEN2001", | |
| 170 | + "LEN2001", /* Edge E431 */ | |
| 146 | 171 | "LEN2002", |
| 147 | 172 | "LEN2003", |
| 148 | 173 | "LEN2004", /* L440 */ |
| @@ -156,6 +181,18 @@ static const char * const topbuttonpad_pnp_ids[] = { · 7 unmodified lines | ||
| 156 | 181 | NULL |
| 157 | 182 | }; |
| 158 | 183 | |
| 184 | +static bool matches_pnp_id(struct psmouse *psmouse, const char * const ids[]) | |
| 185 | +{ | |
| 186 | + int i; | |
| 187 | + | |
| 188 | + if (!strncmp(psmouse->ps2dev.serio->firmware_id, "PNP:", 4)) | |
| 189 | + for (i = 0; ids[i]; i++) | |
| 190 | + if (strstr(psmouse->ps2dev.serio->firmware_id, ids[i])) | |
| 191 | + return true; | |
| 192 | + | |
| 193 | + return false; | |
| 194 | +} | |
| 195 | + | |
| 159 | 196 | /***************************************************************************** |
| 160 | 197 | * Synaptics communications functions |
| 161 | 198 | ****************************************************************************/ |
| @@ -304,20 +341,20 @@ static int synaptics_identify(struct psmouse *psmouse) · 142 unmodified lines | ||
| 304 | 341 | * Resolution is left zero if touchpad does not support the query |
| 305 | 342 | */ |
| 306 | 343 | |
| 307 | −static const int *quirk_min_max; | |
| 308 | − | |
| 309 | 344 | static int synaptics_resolution(struct psmouse *psmouse) |
| 310 | 345 | { |
| 311 | 346 | struct synaptics_data *priv = psmouse->private; |
| 312 | 347 | unsigned char resp[3]; |
| 348 | + int i; | |
| 313 | 349 | |
| 314 | − if (quirk_min_max) { | |
| 315 | − priv->x_min = quirk_min_max[0]; | |
| 316 | − priv->x_max = quirk_min_max[1]; | |
| 317 | − priv->y_min = quirk_min_max[2]; | |
| 318 | − priv->y_max = quirk_min_max[3]; | |
| 319 | − return 0; | |
| 320 | − } | |
| 350 | + for (i = 0; min_max_pnpid_table[i].pnp_ids; i++) | |
| 351 | + if (matches_pnp_id(psmouse, min_max_pnpid_table[i].pnp_ids)) { | |
| 352 | + priv->x_min = min_max_pnpid_table[i].x_min; | |
| 353 | + priv->x_max = min_max_pnpid_table[i].x_max; | |
| 354 | + priv->y_min = min_max_pnpid_table[i].y_min; | |
| 355 | + priv->y_max = min_max_pnpid_table[i].y_max; | |
| 356 | + return 0; | |
| 357 | + } | |
| 321 | 358 | |
| 322 | 359 | if (SYN_ID_MAJOR(priv->identity) < 4) |
| 323 | 360 | return 0; |
| @@ -1365,17 +1402,8 @@ static void set_input_params(struct psmouse *psmouse, · 1041 unmodified lines | ||
| 1365 | 1402 | |
| 1366 | 1403 | if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) { |
| 1367 | 1404 | __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit); |
| 1368 | − /* See if this buttonpad has a top button area */ | |
| 1369 | − if (!strncmp(psmouse->ps2dev.serio->firmware_id, "PNP:", 4)) { | |
| 1370 | − for (i = 0; topbuttonpad_pnp_ids[i]; i++) { | |
| 1371 | − if (strstr(psmouse->ps2dev.serio->firmware_id, | |
| 1372 | − topbuttonpad_pnp_ids[i])) { | |
| 1373 | − __set_bit(INPUT_PROP_TOPBUTTONPAD, | |
| 1374 | − dev->propbit); | |
| 1375 | − break; | |
| 1376 | − } | |
| 1377 | − } | |
| 1378 | − } | |
| 1405 | + if (matches_pnp_id(psmouse, topbuttonpad_pnp_ids)) | |
| 1406 | + __set_bit(INPUT_PROP_TOPBUTTONPAD, dev->propbit); | |
| 1379 | 1407 | /* Clickpads report only left button */ |
| 1380 | 1408 | __clear_bit(BTN_RIGHT, dev->keybit); |
| 1381 | 1409 | __clear_bit(BTN_MIDDLE, dev->keybit); |
| @@ -1547,96 +1575,10 @@ static const struct dmi_system_id olpc_dmi_table[] __initconst = { · 165 unmodified lines | ||
| 1547 | 1575 | { } |
| 1548 | 1576 | }; |
| 1549 | 1577 | |
| 1550 | −static const struct dmi_system_id min_max_dmi_table[] __initconst = { | |
| 1551 | −#if defined(CONFIG_DMI) | |
| 1552 | − { | |
| 1553 | − /* Lenovo ThinkPad Helix */ | |
| 1554 | − .matches = { | |
| 1555 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1556 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Helix"), | |
| 1557 | − }, | |
| 1558 | − .driver_data = (int []){1024, 5052, 2258, 4832}, | |
| 1559 | − }, | |
| 1560 | − { | |
| 1561 | − /* Lenovo ThinkPad X240 */ | |
| 1562 | − .matches = { | |
| 1563 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1564 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad X240"), | |
| 1565 | − }, | |
| 1566 | − .driver_data = (int []){1232, 5710, 1156, 4696}, | |
| 1567 | − }, | |
| 1568 | − { | |
| 1569 | − /* Lenovo ThinkPad T431s */ | |
| 1570 | − .matches = { | |
| 1571 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1572 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T431"), | |
| 1573 | − }, | |
| 1574 | − .driver_data = (int []){1024, 5112, 2024, 4832}, | |
| 1575 | − }, | |
| 1576 | − { | |
| 1577 | − /* Lenovo ThinkPad T440s */ | |
| 1578 | − .matches = { | |
| 1579 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1580 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T440"), | |
| 1581 | − }, | |
| 1582 | − .driver_data = (int []){1024, 5112, 2024, 4832}, | |
| 1583 | − }, | |
| 1584 | − { | |
| 1585 | − /* Lenovo ThinkPad L440 */ | |
| 1586 | − .matches = { | |
| 1587 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1588 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L440"), | |
| 1589 | − }, | |
| 1590 | − .driver_data = (int []){1024, 5112, 2024, 4832}, | |
| 1591 | − }, | |
| 1592 | − { | |
| 1593 | − /* Lenovo ThinkPad T540p */ | |
| 1594 | − .matches = { | |
| 1595 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1596 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad T540"), | |
| 1597 | − }, | |
| 1598 | − .driver_data = (int []){1024, 5056, 2058, 4832}, | |
| 1599 | − }, | |
| 1600 | − { | |
| 1601 | − /* Lenovo ThinkPad L540 */ | |
| 1602 | − .matches = { | |
| 1603 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1604 | − DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad L540"), | |
| 1605 | − }, | |
| 1606 | − .driver_data = (int []){1024, 5112, 2024, 4832}, | |
| 1607 | − }, | |
| 1608 | − { | |
| 1609 | − /* Lenovo Yoga S1 */ | |
| 1610 | − .matches = { | |
| 1611 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1612 | − DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, | |
| 1613 | − "ThinkPad S1 Yoga"), | |
| 1614 | − }, | |
| 1615 | − .driver_data = (int []){1232, 5710, 1156, 4696}, | |
| 1616 | − }, | |
| 1617 | − { | |
| 1618 | − /* Lenovo ThinkPad X1 Carbon Haswell (3rd generation) */ | |
| 1619 | − .matches = { | |
| 1620 | − DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"), | |
| 1621 | − DMI_MATCH(DMI_PRODUCT_VERSION, | |
| 1622 | − "ThinkPad X1 Carbon 2nd"), | |
| 1623 | − }, | |
| 1624 | − .driver_data = (int []){1024, 5112, 2024, 4832}, | |
| 1625 | − }, | |
| 1626 | −#endif | |
| 1627 | − { } | |
| 1628 | −}; | |
| 1629 | − | |
| 1630 | 1578 | void __init synaptics_module_init(void) |
| 1631 | 1579 | { |
| 1632 | − const struct dmi_system_id *min_max_dmi; | |
| 1633 | − | |
| 1634 | 1580 | impaired_toshiba_kbc = dmi_check_system(toshiba_dmi_table); |
| 1635 | 1581 | broken_olpc_ec = dmi_check_system(olpc_dmi_table); |
| 1636 | − | |
| 1637 | − min_max_dmi = dmi_first_match(min_max_dmi_table); | |
| 1638 | − if (min_max_dmi) | |
| 1639 | − quirk_min_max = min_max_dmi->driver_data; | |
| 1640 | 1582 | } |
| 1641 | 1583 | |
| 1642 | 1584 | static int __synaptics_init(struct psmouse *psmouse, bool absolute_mode) |
| @@ -79,7 +79,8 @@ static int amba_kmi_open(struct serio *io) · 78 unmodified lines | ||
| 79 | 79 | writeb(divisor, KMICLKDIV); |
| 80 | 80 | writeb(KMICR_EN, KMICR); |
| 81 | 81 | |
| 82 | − ret = request_irq(kmi->irq, amba_kmi_int, 0, "kmi-pl050", kmi); | |
| 82 | + ret = request_irq(kmi->irq, amba_kmi_int, IRQF_SHARED, "kmi-pl050", | |
| 83 | + kmi); | |
| 83 | 84 | if (ret) { |
| 84 | 85 | printk(KERN_ERR "kmi: failed to claim IRQ%d\n", kmi->irq); |
| 85 | 86 | writeb(0, KMICR); |
| @@ -640,7 +640,7 @@ config TOUCHSCREEN_WM9713 · 639 unmodified lines | ||
| 640 | 640 | |
| 641 | 641 | config TOUCHSCREEN_WM97XX_ATMEL |
| 642 | 642 | tristate "WM97xx Atmel accelerated touch" |
| 643 | − depends on TOUCHSCREEN_WM97XX && (AVR32 || ARCH_AT91) | |
| 643 | + depends on TOUCHSCREEN_WM97XX && AVR32 | |
| 644 | 644 | help |
| 645 | 645 | Say Y here for support for streaming mode with WM97xx touchscreens |
| 646 | 646 | on Atmel AT91 or AVR32 systems with an AC97C module. |
| @@ -3999,7 +3999,7 @@ static struct irq_remap_table *get_irq_table(u16 devid, bool ioapic) · 3998 unmodified lines | ||
| 3999 | 3999 | iommu_flush_dte(iommu, devid); |
| 4000 | 4000 | if (devid != alias) { |
| 4001 | 4001 | irq_lookup_table[alias] = table; |
| 4002 | − set_dte_irq_entry(devid, table); | |
| 4002 | + set_dte_irq_entry(alias, table); | |
| 4003 | 4003 | iommu_flush_dte(iommu, alias); |
| 4004 | 4004 | } |
| 4005 | 4005 | |
| @@ -788,7 +788,7 @@ static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m) · 787 unmodified lines | ||
| 788 | 788 | * per device. But we can enable the exclusion range per |
| 789 | 789 | * device. This is done here |
| 790 | 790 | */ |
| 791 | − set_dev_entry_bit(m->devid, DEV_ENTRY_EX); | |
| 791 | + set_dev_entry_bit(devid, DEV_ENTRY_EX); | |
| 792 | 792 | iommu->exclusion_start = m->range_start; |
| 793 | 793 | iommu->exclusion_length = m->range_length; |
| 794 | 794 | } |
| @@ -504,8 +504,10 @@ static void do_fault(struct work_struct *work) · 503 unmodified lines | ||
| 504 | 504 | |
| 505 | 505 | write = !!(fault->flags & PPR_FAULT_WRITE); |
| 506 | 506 | |
| 507 | + down_read(&fault->state->mm->mmap_sem); | |
| 507 | 508 | npages = get_user_pages(fault->state->task, fault->state->mm, |
| 508 | 509 | fault->address, 1, write, 0, &page, NULL); |
| 510 | + up_read(&fault->state->mm->mmap_sem); | |
| 509 | 511 | |
| 510 | 512 | if (npages == 1) { |
| 511 | 513 | put_page(page); |
| @@ -2178,6 +2178,8 @@ static int cache_create(struct cache_args *ca, struct cache **result) · 2177 unmodified lines | ||
| 2178 | 2178 | ti->num_discard_bios = 1; |
| 2179 | 2179 | ti->discards_supported = true; |
| 2180 | 2180 | ti->discard_zeroes_data_unsupported = true; |
| 2181 | + /* Discard bios must be split on a block boundary */ | |
| 2182 | + ti->split_discard_bios = true; | |
| 2181 | 2183 | |
| 2182 | 2184 | cache->features = ca->features; |
| 2183 | 2185 | ti->per_bio_data_size = get_per_bio_data_size(cache); |
| @@ -19,7 +19,6 @@ · 18 unmodified lines | ||
| 19 | 19 | #include <linux/crypto.h> |
| 20 | 20 | #include <linux/workqueue.h> |
| 21 | 21 | #include <linux/backing-dev.h> |
| 22 | −#include <linux/percpu.h> | |
| 23 | 22 | #include <linux/atomic.h> |
| 24 | 23 | #include <linux/scatterlist.h> |
| 25 | 24 | #include <asm/page.h> |
| @@ -43,6 +42,7 @@ struct convert_context { · 17 unmodified lines | ||
| 43 | 42 | struct bvec_iter iter_out; |
| 44 | 43 | sector_t cc_sector; |
| 45 | 44 | atomic_t cc_pending; |
| 45 | + struct ablkcipher_request *req; | |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | 48 | /* |
| @@ -111,15 +111,7 @@ struct iv_tcw_private { · 62 unmodified lines | ||
| 111 | 111 | enum flags { DM_CRYPT_SUSPENDED, DM_CRYPT_KEY_VALID }; |
| 112 | 112 | |
| 113 | 113 | /* |
| 114 | − * Duplicated per-CPU state for cipher. | |
| 115 | − */ | |
| 116 | −struct crypt_cpu { | |
| 117 | − struct ablkcipher_request *req; | |
| 118 | −}; | |
| 119 | − | |
| 120 | −/* | |
| 121 | − * The fields in here must be read only after initialization, | |
| 122 | − * changing state should be in crypt_cpu. | |
| 114 | + * The fields in here must be read only after initialization. | |
| 123 | 115 | */ |
| 124 | 116 | struct crypt_config { |
| 125 | 117 | struct dm_dev *dev; |
| @@ -150,12 +142,6 @@ struct crypt_config { · 24 unmodified lines | ||
| 150 | 142 | sector_t iv_offset; |
| 151 | 143 | unsigned int iv_size; |
| 152 | 144 | |
| 153 | − /* | |
| 154 | − * Duplicated per cpu state. Access through | |
| 155 | − * per_cpu_ptr() only. | |
| 156 | − */ | |
| 157 | − struct crypt_cpu __percpu *cpu; | |
| 158 | − | |
| 159 | 145 | /* ESSIV: struct crypto_cipher *essiv_tfm */ |
| 160 | 146 | void *iv_private; |
| 161 | 147 | struct crypto_ablkcipher **tfms; |
| @@ -192,11 +178,6 @@ static void clone_init(struct dm_crypt_io *, struct bio *); · 30 unmodified lines | ||
| 192 | 178 | static void kcryptd_queue_crypt(struct dm_crypt_io *io); |
| 193 | 179 | static u8 *iv_of_dmreq(struct crypt_config *cc, struct dm_crypt_request *dmreq); |
| 194 | 180 | |
| 195 | −static struct crypt_cpu *this_crypt_config(struct crypt_config *cc) | |
| 196 | −{ | |
| 197 | − return this_cpu_ptr(cc->cpu); | |
| 198 | −} | |
| 199 | − | |
| 200 | 181 | /* |
| 201 | 182 | * Use this to access cipher attributes that are the same for each CPU. |
| 202 | 183 | */ |
| @@ -903,16 +884,15 @@ static void kcryptd_async_done(struct crypto_async_request *async_req, · 700 unmodified lines | ||
| 903 | 884 | static void crypt_alloc_req(struct crypt_config *cc, |
| 904 | 885 | struct convert_context *ctx) |
| 905 | 886 | { |
| 906 | − struct crypt_cpu *this_cc = this_crypt_config(cc); | |
| 907 | 887 | unsigned key_index = ctx->cc_sector & (cc->tfms_count - 1); |
| 908 | 888 | |
| 909 | − if (!this_cc->req) | |
| 910 | − this_cc->req = mempool_alloc(cc->req_pool, GFP_NOIO); | |
| 889 | + if (!ctx->req) | |
| 890 | + ctx->req = mempool_alloc(cc->req_pool, GFP_NOIO); | |
| 911 | 891 | |
| 912 | − ablkcipher_request_set_tfm(this_cc->req, cc->tfms[key_index]); | |
| 913 | − ablkcipher_request_set_callback(this_cc->req, | |
| 892 | + ablkcipher_request_set_tfm(ctx->req, cc->tfms[key_index]); | |
| 893 | + ablkcipher_request_set_callback(ctx->req, | |
| 914 | 894 | CRYPTO_TFM_REQ_MAY_BACKLOG | CRYPTO_TFM_REQ_MAY_SLEEP, |
| 915 | − kcryptd_async_done, dmreq_of_req(cc, this_cc->req)); | |
| 895 | + kcryptd_async_done, dmreq_of_req(cc, ctx->req)); | |
| 916 | 896 | } |
| 917 | 897 | |
| 918 | 898 | /* |
| @@ -921,7 +901,6 @@ static void crypt_alloc_req(struct crypt_config *cc, · 2 unmodified lines | ||
| 921 | 901 | static int crypt_convert(struct crypt_config *cc, |
| 922 | 902 | struct convert_context *ctx) |
| 923 | 903 | { |
| 924 | − struct crypt_cpu *this_cc = this_crypt_config(cc); | |
| 925 | 904 | int r; |
| 926 | 905 | |
| 927 | 906 | atomic_set(&ctx->cc_pending, 1); |
| @@ -932,7 +911,7 @@ static int crypt_convert(struct crypt_config *cc, · 4 unmodified lines | ||
| 932 | 911 | |
| 933 | 912 | atomic_inc(&ctx->cc_pending); |
| 934 | 913 | |
| 935 | − r = crypt_convert_block(cc, ctx, this_cc->req); | |
| 914 | + r = crypt_convert_block(cc, ctx, ctx->req); | |
| 936 | 915 | |
| 937 | 916 | switch (r) { |
| 938 | 917 | /* async */ |
| @@ -941,7 +920,7 @@ static int crypt_convert(struct crypt_config *cc, · 2 unmodified lines | ||
| 941 | 920 | reinit_completion(&ctx->restart); |
| 942 | 921 | /* fall through*/ |
| 943 | 922 | case -EINPROGRESS: |
| 944 | − this_cc->req = NULL; | |
| 923 | + ctx->req = NULL; | |
| 945 | 924 | ctx->cc_sector++; |
| 946 | 925 | continue; |
| 947 | 926 | |
| @@ -1040,6 +1019,7 @@ static struct dm_crypt_io *crypt_io_alloc(struct crypt_config *cc, · 92 unmodified lines | ||
| 1040 | 1019 | io->sector = sector; |
| 1041 | 1020 | io->error = 0; |
| 1042 | 1021 | io->base_io = NULL; |
| 1022 | + io->ctx.req = NULL; | |
| 1043 | 1023 | atomic_set(&io->io_pending, 0); |
| 1044 | 1024 | |
| 1045 | 1025 | return io; |
| @@ -1065,6 +1045,8 @@ static void crypt_dec_pending(struct dm_crypt_io *io) · 19 unmodified lines | ||
| 1065 | 1045 | if (!atomic_dec_and_test(&io->io_pending)) |
| 1066 | 1046 | return; |
| 1067 | 1047 | |
| 1048 | + if (io->ctx.req) | |
| 1049 | + mempool_free(io->ctx.req, cc->req_pool); | |
| 1068 | 1050 | mempool_free(io, cc->io_pool); |
| 1069 | 1051 | |
| 1070 | 1052 | if (likely(!base_io)) |
| @@ -1492,8 +1474,6 @@ static int crypt_wipe_key(struct crypt_config *cc) · 421 unmodified lines | ||
| 1492 | 1474 | static void crypt_dtr(struct dm_target *ti) |
| 1493 | 1475 | { |
| 1494 | 1476 | struct crypt_config *cc = ti->private; |
| 1495 | − struct crypt_cpu *cpu_cc; | |
| 1496 | − int cpu; | |
| 1497 | 1477 | |
| 1498 | 1478 | ti->private = NULL; |
| 1499 | 1479 | |
| @@ -1505,13 +1485,6 @@ static void crypt_dtr(struct dm_target *ti) · 5 unmodified lines | ||
| 1505 | 1485 | if (cc->crypt_queue) |
| 1506 | 1486 | destroy_workqueue(cc->crypt_queue); |
| 1507 | 1487 | |
| 1508 | − if (cc->cpu) | |
| 1509 | − for_each_possible_cpu(cpu) { | |
| 1510 | − cpu_cc = per_cpu_ptr(cc->cpu, cpu); | |
| 1511 | − if (cpu_cc->req) | |
| 1512 | − mempool_free(cpu_cc->req, cc->req_pool); | |
| 1513 | − } | |
| 1514 | − | |
| 1515 | 1488 | crypt_free_tfms(cc); |
| 1516 | 1489 | |
| 1517 | 1490 | if (cc->bs) |
| @@ -1530,9 +1503,6 @@ static void crypt_dtr(struct dm_target *ti) · 12 unmodified lines | ||
| 1530 | 1503 | if (cc->dev) |
| 1531 | 1504 | dm_put_device(ti, cc->dev); |
| 1532 | 1505 | |
| 1533 | − if (cc->cpu) | |
| 1534 | − free_percpu(cc->cpu); | |
| 1535 | − | |
| 1536 | 1506 | kzfree(cc->cipher); |
| 1537 | 1507 | kzfree(cc->cipher_string); |
| 1538 | 1508 | |
| @@ -1588,13 +1558,6 @@ static int crypt_ctr_cipher(struct dm_target *ti, · 49 unmodified lines | ||
| 1588 | 1558 | if (tmp) |
| 1589 | 1559 | DMWARN("Ignoring unexpected additional cipher options"); |
| 1590 | 1560 | |
| 1591 | − cc->cpu = __alloc_percpu(sizeof(*(cc->cpu)), | |
| 1592 | − __alignof__(struct crypt_cpu)); | |
| 1593 | − if (!cc->cpu) { | |
| 1594 | − ti->error = "Cannot allocate per cpu state"; | |
| 1595 | − goto bad_mem; | |
| 1596 | − } | |
| 1597 | − | |
| 1598 | 1561 | /* |
| 1599 | 1562 | * For compatibility with the original dm-crypt mapping format, if |
| 1600 | 1563 | * only the cipher name is supplied, use cbc-plain. |
| @@ -445,11 +445,11 @@ static int queue_if_no_path(struct multipath *m, unsigned queue_if_no_path, · 444 unmodified lines | ||
| 445 | 445 | else |
| 446 | 446 | m->saved_queue_if_no_path = queue_if_no_path; |
| 447 | 447 | m->queue_if_no_path = queue_if_no_path; |
| 448 | − if (!m->queue_if_no_path) | |
| 449 | − dm_table_run_md_queue_async(m->ti->table); | |
| 450 | − | |
| 451 | 448 | spin_unlock_irqrestore(&m->lock, flags); |
| 452 | 449 | |
| 450 | + if (!queue_if_no_path) | |
| 451 | + dm_table_run_md_queue_async(m->ti->table); | |
| 452 | + | |
| 453 | 453 | return 0; |
| 454 | 454 | } |
| 455 | 455 | |
| @@ -954,7 +954,7 @@ out: · 498 unmodified lines | ||
| 954 | 954 | */ |
| 955 | 955 | static int reinstate_path(struct pgpath *pgpath) |
| 956 | 956 | { |
| 957 | − int r = 0; | |
| 957 | + int r = 0, run_queue = 0; | |
| 958 | 958 | unsigned long flags; |
| 959 | 959 | struct multipath *m = pgpath->pg->m; |
| 960 | 960 | |
| @@ -978,7 +978,7 @@ static int reinstate_path(struct pgpath *pgpath) · 17 unmodified lines | ||
| 978 | 978 | |
| 979 | 979 | if (!m->nr_valid_paths++) { |
| 980 | 980 | m->current_pgpath = NULL; |
| 981 | − dm_table_run_md_queue_async(m->ti->table); | |
| 981 | + run_queue = 1; | |
| 982 | 982 | } else if (m->hw_handler_name && (m->current_pg == pgpath->pg)) { |
| 983 | 983 | if (queue_work(kmpath_handlerd, &pgpath->activate_path.work)) |
| 984 | 984 | m->pg_init_in_progress++; |
| @@ -991,6 +991,8 @@ static int reinstate_path(struct pgpath *pgpath) · 6 unmodified lines | ||
| 991 | 991 | |
| 992 | 992 | out: |
| 993 | 993 | spin_unlock_irqrestore(&m->lock, flags); |
| 994 | + if (run_queue) | |
| 995 | + dm_table_run_md_queue_async(m->ti->table); | |
| 994 | 996 | |
| 995 | 997 | return r; |
| 996 | 998 | } |
| @@ -27,6 +27,9 @@ · 26 unmodified lines | ||
| 27 | 27 | #define MAPPING_POOL_SIZE 1024 |
| 28 | 28 | #define PRISON_CELLS 1024 |
| 29 | 29 | #define COMMIT_PERIOD HZ |
| 30 | +#define NO_SPACE_TIMEOUT_SECS 60 | |
| 31 | + | |
| 32 | +static unsigned no_space_timeout_secs = NO_SPACE_TIMEOUT_SECS; | |
| 30 | 33 | |
| 31 | 34 | DECLARE_DM_KCOPYD_THROTTLE_WITH_MODULE_PARM(snapshot_copy_throttle, |
| 32 | 35 | "A percentage of time allocated for copy on write"); |
| @@ -175,6 +178,7 @@ struct pool { · 142 unmodified lines | ||
| 175 | 178 | struct workqueue_struct *wq; |
| 176 | 179 | struct work_struct worker; |
| 177 | 180 | struct delayed_work waker; |
| 181 | + struct delayed_work no_space_timeout; | |
| 178 | 182 | |
| 179 | 183 | unsigned long last_commit_jiffies; |
| 180 | 184 | unsigned ref_count; |
| @@ -935,7 +939,7 @@ static int commit(struct pool *pool) · 754 unmodified lines | ||
| 935 | 939 | { |
| 936 | 940 | int r; |
| 937 | 941 | |
| 938 | − if (get_pool_mode(pool) != PM_WRITE) | |
| 942 | + if (get_pool_mode(pool) >= PM_READ_ONLY) | |
| 939 | 943 | return -EINVAL; |
| 940 | 944 | |
| 941 | 945 | r = dm_pool_commit_metadata(pool->pmd); |
| @@ -1590,6 +1594,20 @@ static void do_waker(struct work_struct *ws) · 648 unmodified lines | ||
| 1590 | 1594 | queue_delayed_work(pool->wq, &pool->waker, COMMIT_PERIOD); |
| 1591 | 1595 | } |
| 1592 | 1596 | |
| 1597 | +/* | |
| 1598 | + * We're holding onto IO to allow userland time to react. After the | |
| 1599 | + * timeout either the pool will have been resized (and thus back in | |
| 1600 | + * PM_WRITE mode), or we degrade to PM_READ_ONLY and start erroring IO. | |
| 1601 | + */ | |
| 1602 | +static void do_no_space_timeout(struct work_struct *ws) | |
| 1603 | +{ | |
| 1604 | + struct pool *pool = container_of(to_delayed_work(ws), struct pool, | |
| 1605 | + no_space_timeout); | |
| 1606 | + | |
| 1607 | + if (get_pool_mode(pool) == PM_OUT_OF_DATA_SPACE && !pool->pf.error_if_no_space) | |
| 1608 | + set_pool_mode(pool, PM_READ_ONLY); | |
| 1609 | +} | |
| 1610 | + | |
| 1593 | 1611 | /*----------------------------------------------------------------*/ |
| 1594 | 1612 | |
| 1595 | 1613 | struct noflush_work { |
| @@ -1654,6 +1672,7 @@ static void set_pool_mode(struct pool *pool, enum pool_mode new_mode) · 58 unmodified lines | ||
| 1654 | 1672 | struct pool_c *pt = pool->ti->private; |
| 1655 | 1673 | bool needs_check = dm_pool_metadata_needs_check(pool->pmd); |
| 1656 | 1674 | enum pool_mode old_mode = get_pool_mode(pool); |
| 1675 | + unsigned long no_space_timeout = ACCESS_ONCE(no_space_timeout_secs) * HZ; | |
| 1657 | 1676 | |
| 1658 | 1677 | /* |
| 1659 | 1678 | * Never allow the pool to transition to PM_WRITE mode if user |
| @@ -1715,6 +1734,9 @@ static void set_pool_mode(struct pool *pool, enum pool_mode new_mode) · 55 unmodified lines | ||
| 1715 | 1734 | pool->process_discard = process_discard; |
| 1716 | 1735 | pool->process_prepared_mapping = process_prepared_mapping; |
| 1717 | 1736 | pool->process_prepared_discard = process_prepared_discard_passdown; |
| 1737 | + | |
| 1738 | + if (!pool->pf.error_if_no_space && no_space_timeout) | |
| 1739 | + queue_delayed_work(pool->wq, &pool->no_space_timeout, no_space_timeout); | |
| 1718 | 1740 | break; |
| 1719 | 1741 | |
| 1720 | 1742 | case PM_WRITE: |
| @@ -2100,6 +2122,7 @@ static struct pool *pool_create(struct mapped_device *pool_md, · 379 unmodified lines | ||
| 2100 | 2122 | |
| 2101 | 2123 | INIT_WORK(&pool->worker, do_worker); |
| 2102 | 2124 | INIT_DELAYED_WORK(&pool->waker, do_waker); |
| 2125 | + INIT_DELAYED_WORK(&pool->no_space_timeout, do_no_space_timeout); | |
| 2103 | 2126 | spin_lock_init(&pool->lock); |
| 2104 | 2127 | bio_list_init(&pool->deferred_flush_bios); |
| 2105 | 2128 | INIT_LIST_HEAD(&pool->prepared_mappings); |
| @@ -2662,6 +2685,7 @@ static void pool_postsuspend(struct dm_target *ti) · 556 unmodified lines | ||
| 2662 | 2685 | struct pool *pool = pt->pool; |
| 2663 | 2686 | |
| 2664 | 2687 | cancel_delayed_work(&pool->waker); |
| 2688 | + cancel_delayed_work(&pool->no_space_timeout); | |
| 2665 | 2689 | flush_workqueue(pool->wq); |
| 2666 | 2690 | (void) commit(pool); |
| 2667 | 2691 | } |
| @@ -3487,6 +3511,9 @@ static void dm_thin_exit(void) · 819 unmodified lines | ||
| 3487 | 3511 | module_init(dm_thin_init); |
| 3488 | 3512 | module_exit(dm_thin_exit); |
| 3489 | 3513 | |
| 3514 | +module_param_named(no_space_timeout, no_space_timeout_secs, uint, S_IRUGO | S_IWUSR); | |
| 3515 | +MODULE_PARM_DESC(no_space_timeout, "Out of data space queue IO timeout in seconds"); | |
| 3516 | + | |
| 3490 | 3517 | MODULE_DESCRIPTION(DM_NAME " thin provisioning target"); |
| 3491 | 3518 | MODULE_AUTHOR("Joe Thornber <dm-devel@redhat.com>"); |
| 3492 | 3519 | MODULE_LICENSE("GPL"); |
| @@ -8516,7 +8516,8 @@ static int md_notify_reboot(struct notifier_block *this, · 8515 unmodified lines | ||
| 8516 | 8516 | if (mddev_trylock(mddev)) { |
| 8517 | 8517 | if (mddev->pers) |
| 8518 | 8518 | __md_stop_writes(mddev); |
| 8519 | − mddev->safemode = 2; | |
| 8519 | + if (mddev->persistent) | |
| 8520 | + mddev->safemode = 2; | |
| 8520 | 8521 | mddev_unlock(mddev); |
| 8521 | 8522 | } |
| 8522 | 8523 | need_delay = 1; |
| @@ -1172,6 +1172,13 @@ static void __make_request(struct mddev *mddev, struct bio *bio) · 1171 unmodified lines | ||
| 1172 | 1172 | int max_sectors; |
| 1173 | 1173 | int sectors; |
| 1174 | 1174 | |
| 1175 | + /* | |
| 1176 | + * Register the new request and wait if the reconstruction | |
| 1177 | + * thread has put up a bar for new requests. | |
| 1178 | + * Continue immediately if no resync is active currently. | |
| 1179 | + */ | |
| 1180 | + wait_barrier(conf); | |
| 1181 | + | |
| 1175 | 1182 | sectors = bio_sectors(bio); |
| 1176 | 1183 | while (test_bit(MD_RECOVERY_RESHAPE, &mddev->recovery) && |
| 1177 | 1184 | bio->bi_iter.bi_sector < conf->reshape_progress && |
| @@ -1552,12 +1559,6 @@ static void make_request(struct mddev *mddev, struct bio *bio) · 374 unmodified lines | ||
| 1552 | 1559 | |
| 1553 | 1560 | md_write_start(mddev, bio); |
| 1554 | 1561 | |
| 1555 | − /* | |
| 1556 | − * Register the new request and wait if the reconstruction | |
| 1557 | − * thread has put up a bar for new requests. | |
| 1558 | − * Continue immediately if no resync is active currently. | |
| 1559 | − */ | |
| 1560 | − wait_barrier(conf); | |
| 1561 | 1562 | |
| 1562 | 1563 | do { |
| 1563 | 1564 | |
| @@ -1109,7 +1109,7 @@ static int ov7670_enum_framesizes(struct v4l2_subdev *sd, · 1108 unmodified lines | ||
| 1109 | 1109 | * windows that fall outside that. |
| 1110 | 1110 | */ |
| 1111 | 1111 | for (i = 0; i < n_win_sizes; i++) { |
| 1112 | − struct ov7670_win_size *win = &info->devtype->win_sizes[index]; | |
| 1112 | + struct ov7670_win_size *win = &info->devtype->win_sizes[i]; | |
| 1113 | 1113 | if (info->min_width && win->width < info->min_width) |
| 1114 | 1114 | continue; |
| 1115 | 1115 | if (info->min_height && win->height < info->min_height) |
| @@ -1616,7 +1616,7 @@ static int s5c73m3_get_platform_data(struct s5c73m3 *state) · 1615 unmodified lines | ||
| 1616 | 1616 | if (ret < 0) |
| 1617 | 1617 | return -EINVAL; |
| 1618 | 1618 | |
| 1619 | − node_ep = v4l2_of_get_next_endpoint(node, NULL); | |
| 1619 | + node_ep = of_graph_get_next_endpoint(node, NULL); | |
| 1620 | 1620 | if (!node_ep) { |
| 1621 | 1621 | dev_warn(dev, "no endpoint defined for node: %s\n", |
| 1622 | 1622 | node->full_name); |
| @@ -93,6 +93,7 @@ static long media_device_enum_entities(struct media_device *mdev, · 92 unmodified lines | ||
| 93 | 93 | struct media_entity *ent; |
| 94 | 94 | struct media_entity_desc u_ent; |
| 95 | 95 | |
| 96 | + memset(&u_ent, 0, sizeof(u_ent)); | |
| 96 | 97 | if (copy_from_user(&u_ent.id, &uent->id, sizeof(u_ent.id))) |
| 97 | 98 | return -EFAULT; |
| 98 | 99 | |
| @@ -372,18 +372,32 @@ static int vpbe_stop_streaming(struct vb2_queue *vq) · 371 unmodified lines | ||
| 372 | 372 | { |
| 373 | 373 | struct vpbe_fh *fh = vb2_get_drv_priv(vq); |
| 374 | 374 | struct vpbe_layer *layer = fh->layer; |
| 375 | + struct vpbe_display *disp = fh->disp_dev; | |
| 376 | + unsigned long flags; | |
| 375 | 377 | |
| 376 | 378 | if (!vb2_is_streaming(vq)) |
| 377 | 379 | return 0; |
| 378 | 380 | |
| 379 | 381 | /* release all active buffers */ |
| 382 | + spin_lock_irqsave(&disp->dma_queue_lock, flags); | |
| 383 | + if (layer->cur_frm == layer->next_frm) { | |
| 384 | + vb2_buffer_done(&layer->cur_frm->vb, VB2_BUF_STATE_ERROR); | |
| 385 | + } else { | |
| 386 | + if (layer->cur_frm != NULL) | |
| 387 | + vb2_buffer_done(&layer->cur_frm->vb, | |
| 388 | + VB2_BUF_STATE_ERROR); | |
| 389 | + if (layer->next_frm != NULL) | |
| 390 | + vb2_buffer_done(&layer->next_frm->vb, | |
| 391 | + VB2_BUF_STATE_ERROR); | |
| 392 | + } | |
| 393 | + | |
| 380 | 394 | while (!list_empty(&layer->dma_queue)) { |
| 381 | 395 | layer->next_frm = list_entry(layer->dma_queue.next, |
| 382 | 396 | struct vpbe_disp_buffer, list); |
| 383 | 397 | list_del(&layer->next_frm->list); |
| 384 | 398 | vb2_buffer_done(&layer->next_frm->vb, VB2_BUF_STATE_ERROR); |
| 385 | 399 | } |
| 386 | − | |
| 400 | + spin_unlock_irqrestore(&disp->dma_queue_lock, flags); | |
| 387 | 401 | return 0; |
| 388 | 402 | } |
| 389 | 403 | |
| @@ -734,6 +734,8 @@ static int vpfe_release(struct file *file) · 733 unmodified lines | ||
| 734 | 734 | } |
| 735 | 735 | vpfe_dev->io_usrs = 0; |
| 736 | 736 | vpfe_dev->numbuffers = config_params.numbuffers; |
| 737 | + videobuf_stop(&vpfe_dev->buffer_queue); | |
| 738 | + videobuf_mmap_free(&vpfe_dev->buffer_queue); | |
| 737 | 739 | } |
| 738 | 740 | |
| 739 | 741 | /* Decrement device usrs counter */ |
| @@ -358,8 +358,31 @@ static int vpif_stop_streaming(struct vb2_queue *vq) · 357 unmodified lines | ||
| 358 | 358 | |
| 359 | 359 | common = &ch->common[VPIF_VIDEO_INDEX]; |
| 360 | 360 | |
| 361 | + /* Disable channel as per its device type and channel id */ | |
| 362 | + if (VPIF_CHANNEL0_VIDEO == ch->channel_id) { | |
| 363 | + enable_channel0(0); | |
| 364 | + channel0_intr_enable(0); | |
| 365 | + } | |
| 366 | + if ((VPIF_CHANNEL1_VIDEO == ch->channel_id) || | |
| 367 | + (2 == common->started)) { | |
| 368 | + enable_channel1(0); | |
| 369 | + channel1_intr_enable(0); | |
| 370 | + } | |
| 371 | + common->started = 0; | |
| 372 | + | |
| 361 | 373 | /* release all active buffers */ |
| 362 | 374 | spin_lock_irqsave(&common->irqlock, flags); |
| 375 | + if (common->cur_frm == common->next_frm) { | |
| 376 | + vb2_buffer_done(&common->cur_frm->vb, VB2_BUF_STATE_ERROR); | |
| 377 | + } else { | |
| 378 | + if (common->cur_frm != NULL) | |
| 379 | + vb2_buffer_done(&common->cur_frm->vb, | |
| 380 | + VB2_BUF_STATE_ERROR); | |
| 381 | + if (common->next_frm != NULL) | |
| 382 | + vb2_buffer_done(&common->next_frm->vb, | |
| 383 | + VB2_BUF_STATE_ERROR); | |
| 384 | + } | |
| 385 | + | |
| 363 | 386 | while (!list_empty(&common->dma_queue)) { |
| 364 | 387 | common->next_frm = list_entry(common->dma_queue.next, |
| 365 | 388 | struct vpif_cap_buffer, list); |
| @@ -933,17 +956,6 @@ static int vpif_release(struct file *filep) · 567 unmodified lines | ||
| 933 | 956 | if (fh->io_allowed[VPIF_VIDEO_INDEX]) { |
| 934 | 957 | /* Reset io_usrs member of channel object */ |
| 935 | 958 | common->io_usrs = 0; |
| 936 | − /* Disable channel as per its device type and channel id */ | |
| 937 | − if (VPIF_CHANNEL0_VIDEO == ch->channel_id) { | |
| 938 | − enable_channel0(0); | |
| 939 | − channel0_intr_enable(0); | |
| 940 | − } | |
| 941 | − if ((VPIF_CHANNEL1_VIDEO == ch->channel_id) || | |
| 942 | − (2 == common->started)) { | |
| 943 | − enable_channel1(0); | |
| 944 | − channel1_intr_enable(0); | |
| 945 | − } | |
| 946 | − common->started = 0; | |
| 947 | 959 | /* Free buffers allocated */ |
| 948 | 960 | vb2_queue_release(&common->buffer_queue); |
| 949 | 961 | vb2_dma_contig_cleanup_ctx(common->alloc_ctx); |
| @@ -320,8 +320,31 @@ static int vpif_stop_streaming(struct vb2_queue *vq) · 319 unmodified lines | ||
| 320 | 320 | |
| 321 | 321 | common = &ch->common[VPIF_VIDEO_INDEX]; |
| 322 | 322 | |
| 323 | + /* Disable channel */ | |
| 324 | + if (VPIF_CHANNEL2_VIDEO == ch->channel_id) { | |
| 325 | + enable_channel2(0); | |
| 326 | + channel2_intr_enable(0); | |
| 327 | + } | |
| 328 | + if ((VPIF_CHANNEL3_VIDEO == ch->channel_id) || | |
| 329 | + (2 == common->started)) { | |
| 330 | + enable_channel3(0); | |
| 331 | + channel3_intr_enable(0); | |
| 332 | + } | |
| 333 | + common->started = 0; | |
| 334 | + | |
| 323 | 335 | /* release all active buffers */ |
| 324 | 336 | spin_lock_irqsave(&common->irqlock, flags); |
| 337 | + if (common->cur_frm == common->next_frm) { | |
| 338 | + vb2_buffer_done(&common->cur_frm->vb, VB2_BUF_STATE_ERROR); | |
| 339 | + } else { | |
| 340 | + if (common->cur_frm != NULL) | |
| 341 | + vb2_buffer_done(&common->cur_frm->vb, | |
| 342 | + VB2_BUF_STATE_ERROR); | |
| 343 | + if (common->next_frm != NULL) | |
| 344 | + vb2_buffer_done(&common->next_frm->vb, | |
| 345 | + VB2_BUF_STATE_ERROR); | |
| 346 | + } | |
| 347 | + | |
| 325 | 348 | while (!list_empty(&common->dma_queue)) { |
| 326 | 349 | common->next_frm = list_entry(common->dma_queue.next, |
| 327 | 350 | struct vpif_disp_buffer, list); |
| @@ -773,18 +796,6 @@ static int vpif_release(struct file *filep) · 445 unmodified lines | ||
| 773 | 796 | if (fh->io_allowed[VPIF_VIDEO_INDEX]) { |
| 774 | 797 | /* Reset io_usrs member of channel object */ |
| 775 | 798 | common->io_usrs = 0; |
| 776 | − /* Disable channel */ | |
| 777 | − if (VPIF_CHANNEL2_VIDEO == ch->channel_id) { | |
| 778 | − enable_channel2(0); | |
| 779 | − channel2_intr_enable(0); | |
| 780 | − } | |
| 781 | − if ((VPIF_CHANNEL3_VIDEO == ch->channel_id) || | |
| 782 | − (2 == common->started)) { | |
| 783 | − enable_channel3(0); | |
| 784 | − channel3_intr_enable(0); | |
| 785 | − } | |
| 786 | − common->started = 0; | |
| 787 | − | |
| 788 | 799 | /* Free buffers allocated */ |
| 789 | 800 | vb2_queue_release(&common->buffer_queue); |
| 790 | 801 | vb2_dma_contig_cleanup_ctx(common->alloc_ctx); |
| @@ -122,7 +122,7 @@ static struct fimc_fmt fimc_formats[] = { · 121 unmodified lines | ||
| 122 | 122 | }, { |
| 123 | 123 | .name = "YUV 4:2:2 planar, Y/Cb/Cr", |
| 124 | 124 | .fourcc = V4L2_PIX_FMT_YUV422P, |
| 125 | − .depth = { 12 }, | |
| 125 | + .depth = { 16 }, | |
| 126 | 126 | .color = FIMC_FMT_YCBYCR422, |
| 127 | 127 | .memplanes = 1, |
| 128 | 128 | .colplanes = 3, |
| @@ -195,7 +195,7 @@ static int fc2580_set_params(struct dvb_frontend *fe) · 194 unmodified lines | ||
| 195 | 195 | |
| 196 | 196 | f_ref = 2UL * priv->cfg->clock / r_val; |
| 197 | 197 | n_val = div_u64_rem(f_vco, f_ref, &k_val); |
| 198 | − k_val_reg = 1UL * k_val * (1 << 20) / f_ref; | |
| 198 | + k_val_reg = div_u64(1ULL * k_val * (1 << 20), f_ref); | |
| 199 | 199 | |
| 200 | 200 | ret = fc2580_wr_reg(priv, 0x18, r18_val | ((k_val_reg >> 16) & 0xff)); |
| 201 | 201 | if (ret < 0) |
| @@ -348,8 +348,8 @@ static int fc2580_set_params(struct dvb_frontend *fe) · 146 unmodified lines | ||
| 348 | 348 | if (ret < 0) |
| 349 | 349 | goto err; |
| 350 | 350 | |
| 351 | − ret = fc2580_wr_reg(priv, 0x37, 1UL * priv->cfg->clock * \ | |
| 352 | − fc2580_if_filter_lut[i].mul / 1000000000); | |
| 351 | + ret = fc2580_wr_reg(priv, 0x37, div_u64(1ULL * priv->cfg->clock * | |
| 352 | + fc2580_if_filter_lut[i].mul, 1000000000)); | |
| 353 | 353 | if (ret < 0) |
| 354 | 354 | goto err; |
| 355 | 355 | |
| @@ -22,6 +22,7 @@ · 21 unmodified lines | ||
| 22 | 22 | #define FC2580_PRIV_H |
| 23 | 23 | |
| 24 | 24 | #include "fc2580.h" |
| 25 | +#include <linux/math64.h> | |
| 25 | 26 | |
| 26 | 27 | struct fc2580_reg_val { |
| 27 | 28 | u8 reg; |
| @@ -41,4 +41,3 @@ ccflags-y += -I$(srctree)/drivers/media/dvb-core · 40 unmodified lines | ||
| 41 | 41 | ccflags-y += -I$(srctree)/drivers/media/dvb-frontends |
| 42 | 42 | ccflags-y += -I$(srctree)/drivers/media/tuners |
| 43 | 43 | ccflags-y += -I$(srctree)/drivers/media/common |
| 44 | −ccflags-y += -I$(srctree)/drivers/staging/media/rtl2832u_sdr | |
| @@ -24,7 +24,6 @@ · 23 unmodified lines | ||
| 24 | 24 | |
| 25 | 25 | #include "rtl2830.h" |
| 26 | 26 | #include "rtl2832.h" |
| 27 | −#include "rtl2832_sdr.h" | |
| 28 | 27 | |
| 29 | 28 | #include "qt1010.h" |
| 30 | 29 | #include "mt2060.h" |
| @@ -36,6 +35,45 @@ · 5 unmodified lines | ||
| 36 | 35 | #include "tua9001.h" |
| 37 | 36 | #include "r820t.h" |
| 38 | 37 | |
| 38 | +/* | |
| 39 | + * RTL2832_SDR module is in staging. That logic is added in order to avoid any | |
| 40 | + * hard dependency to drivers/staging/ directory as we want compile mainline | |
| 41 | + * driver even whole staging directory is missing. | |
| 42 | + */ | |
| 43 | +#include <media/v4l2-subdev.h> | |
| 44 | + | |
| 45 | +#if IS_ENABLED(CONFIG_DVB_RTL2832_SDR) | |
| 46 | +struct dvb_frontend *rtl2832_sdr_attach(struct dvb_frontend *fe, | |
| 47 | + struct i2c_adapter *i2c, const struct rtl2832_config *cfg, | |
| 48 | + struct v4l2_subdev *sd); | |
| 49 | +#else | |
| 50 | +static inline struct dvb_frontend *rtl2832_sdr_attach(struct dvb_frontend *fe, | |
| 51 | + struct i2c_adapter *i2c, const struct rtl2832_config *cfg, | |
| 52 | + struct v4l2_subdev *sd) | |
| 53 | +{ | |
| 54 | + return NULL; | |
| 55 | +} | |
| 56 | +#endif | |
| 57 | + | |
| 58 | +#ifdef CONFIG_MEDIA_ATTACH | |
| 59 | +#define dvb_attach_sdr(FUNCTION, ARGS...) ({ \ | |
| 60 | + void *__r = NULL; \ | |
| 61 | + typeof(&FUNCTION) __a = symbol_request(FUNCTION); \ | |
| 62 | + if (__a) { \ | |
| 63 | + __r = (void *) __a(ARGS); \ | |
| 64 | + if (__r == NULL) \ | |
| 65 | + symbol_put(FUNCTION); \ | |
| 66 | + } \ | |
| 67 | + __r; \ | |
| 68 | +}) | |
| 69 | + | |
| 70 | +#else | |
| 71 | +#define dvb_attach_sdr(FUNCTION, ARGS...) ({ \ | |
| 72 | + FUNCTION(ARGS); \ | |
| 73 | +}) | |
| 74 | + | |
| 75 | +#endif | |
| 76 | + | |
| 39 | 77 | static int rtl28xxu_disable_rc; |
| 40 | 78 | module_param_named(disable_rc, rtl28xxu_disable_rc, int, 0644); |
| 41 | 79 | MODULE_PARM_DESC(disable_rc, "disable RTL2832U remote controller"); |
| @@ -908,7 +946,7 @@ static int rtl2832u_tuner_attach(struct dvb_usb_adapter *adap) · 866 unmodified lines | ||
| 908 | 946 | adap->fe[0]->ops.tuner_ops.get_rf_strength; |
| 909 | 947 | |
| 910 | 948 | /* attach SDR */ |
| 911 | − dvb_attach(rtl2832_sdr_attach, adap->fe[0], &d->i2c_adap, | |
| 949 | + dvb_attach_sdr(rtl2832_sdr_attach, adap->fe[0], &d->i2c_adap, | |
| 912 | 950 | &rtl28xxu_rtl2832_fc0012_config, NULL); |
| 913 | 951 | break; |
| 914 | 952 | case TUNER_RTL2832_FC0013: |
| @@ -920,7 +958,7 @@ static int rtl2832u_tuner_attach(struct dvb_usb_adapter *adap) · 5 unmodified lines | ||
| 920 | 958 | adap->fe[0]->ops.tuner_ops.get_rf_strength; |
| 921 | 959 | |
| 922 | 960 | /* attach SDR */ |
| 923 | − dvb_attach(rtl2832_sdr_attach, adap->fe[0], &d->i2c_adap, | |
| 961 | + dvb_attach_sdr(rtl2832_sdr_attach, adap->fe[0], &d->i2c_adap, | |
| 924 | 962 | &rtl28xxu_rtl2832_fc0013_config, NULL); |
| 925 | 963 | break; |
| 926 | 964 | case TUNER_RTL2832_E4000: { |
| @@ -951,7 +989,7 @@ static int rtl2832u_tuner_attach(struct dvb_usb_adapter *adap) · 24 unmodified lines | ||
| 951 | 989 | i2c_set_adapdata(i2c_adap_internal, d); |
| 952 | 990 | |
| 953 | 991 | /* attach SDR */ |
| 954 | − dvb_attach(rtl2832_sdr_attach, adap->fe[0], | |
| 992 | + dvb_attach_sdr(rtl2832_sdr_attach, adap->fe[0], | |
| 955 | 993 | i2c_adap_internal, |
| 956 | 994 | &rtl28xxu_rtl2832_e4000_config, sd); |
| 957 | 995 | } |
| @@ -982,7 +1020,7 @@ static int rtl2832u_tuner_attach(struct dvb_usb_adapter *adap) · 24 unmodified lines | ||
| 982 | 1020 | adap->fe[0]->ops.tuner_ops.get_rf_strength; |
| 983 | 1021 | |
| 984 | 1022 | /* attach SDR */ |
| 985 | − dvb_attach(rtl2832_sdr_attach, adap->fe[0], &d->i2c_adap, | |
| 1023 | + dvb_attach_sdr(rtl2832_sdr_attach, adap->fe[0], &d->i2c_adap, | |
| 986 | 1024 | &rtl28xxu_rtl2832_r820t_config, NULL); |
| 987 | 1025 | break; |
| 988 | 1026 | case TUNER_RTL2832_R828D: |
| @@ -1430,10 +1430,8 @@ static const struct usb_device_id device_table[] = { · 1429 unmodified lines | ||
| 1430 | 1430 | {USB_DEVICE(0x0c45, 0x600d), SB(PAS106, 101)}, |
| 1431 | 1431 | {USB_DEVICE(0x0c45, 0x6011), SB(OV6650, 101)}, |
| 1432 | 1432 | {USB_DEVICE(0x0c45, 0x6019), SB(OV7630, 101)}, |
| 1433 | −#if !IS_ENABLED(CONFIG_USB_SN9C102) | |
| 1434 | 1433 | {USB_DEVICE(0x0c45, 0x6024), SB(TAS5130CXX, 102)}, |
| 1435 | 1434 | {USB_DEVICE(0x0c45, 0x6025), SB(TAS5130CXX, 102)}, |
| 1436 | −#endif | |
| 1437 | 1435 | {USB_DEVICE(0x0c45, 0x6027), SB(OV7630, 101)}, /* Genius Eye 310 */ |
| 1438 | 1436 | {USB_DEVICE(0x0c45, 0x6028), SB(PAS202, 102)}, |
| 1439 | 1437 | {USB_DEVICE(0x0c45, 0x6029), SB(PAS106, 102)}, |
| @@ -178,6 +178,9 @@ struct v4l2_create_buffers32 { · 177 unmodified lines | ||
| 178 | 178 | |
| 179 | 179 | static int __get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up) |
| 180 | 180 | { |
| 181 | + if (get_user(kp->type, &up->type)) | |
| 182 | + return -EFAULT; | |
| 183 | + | |
| 181 | 184 | switch (kp->type) { |
| 182 | 185 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: |
| 183 | 186 | case V4L2_BUF_TYPE_VIDEO_OUTPUT: |
| @@ -204,17 +207,16 @@ static int __get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __us · 20 unmodified lines | ||
| 204 | 207 | |
| 205 | 208 | static int get_v4l2_format32(struct v4l2_format *kp, struct v4l2_format32 __user *up) |
| 206 | 209 | { |
| 207 | − if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_format32)) || | |
| 208 | − get_user(kp->type, &up->type)) | |
| 209 | − return -EFAULT; | |
| 210 | + if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_format32))) | |
| 211 | + return -EFAULT; | |
| 210 | 212 | return __get_v4l2_format32(kp, up); |
| 211 | 213 | } |
| 212 | 214 | |
| 213 | 215 | static int get_v4l2_create32(struct v4l2_create_buffers *kp, struct v4l2_create_buffers32 __user *up) |
| 214 | 216 | { |
| 215 | 217 | if (!access_ok(VERIFY_READ, up, sizeof(struct v4l2_create_buffers32)) || |
| 216 | − copy_from_user(kp, up, offsetof(struct v4l2_create_buffers32, format.fmt))) | |
| 217 | − return -EFAULT; | |
| 218 | + copy_from_user(kp, up, offsetof(struct v4l2_create_buffers32, format))) | |
| 219 | + return -EFAULT; | |
| 218 | 220 | return __get_v4l2_format32(&kp->format, &up->format); |
| 219 | 221 | } |
| 220 | 222 | |
| @@ -108,8 +108,19 @@ static int devbus_set_timing_params(struct devbus *devbus, · 107 unmodified lines | ||
| 108 | 108 | node->full_name); |
| 109 | 109 | return err; |
| 110 | 110 | } |
| 111 | − /* Convert bit width to byte width */ | |
| 112 | − r.bus_width /= 8; | |
| 111 | + | |
| 112 | + /* | |
| 113 | + * The bus width is encoded into the register as 0 for 8 bits, | |
| 114 | + * and 1 for 16 bits, so we do the necessary conversion here. | |
| 115 | + */ | |
| 116 | + if (r.bus_width == 8) | |
| 117 | + r.bus_width = 0; | |
| 118 | + else if (r.bus_width == 16) | |
| 119 | + r.bus_width = 1; | |
| 120 | + else { | |
| 121 | + dev_err(devbus->dev, "invalid bus width %d\n", r.bus_width); | |
| 122 | + return -EINVAL; | |
| 123 | + } | |
| 113 | 124 | |
| 114 | 125 | err = get_timing_param_ps(devbus, node, "devbus,badr-skew-ps", |
| 115 | 126 | &r.badr_skew); |
| @@ -338,28 +338,58 @@ int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, · 337 unmodified lines | ||
| 338 | 338 | int num_sg, bool read, int timeout) |
| 339 | 339 | { |
| 340 | 340 | struct completion trans_done; |
| 341 | − int err = 0, count; | |
| 341 | + u8 dir; | |
| 342 | + int err = 0, i, count; | |
| 342 | 343 | long timeleft; |
| 343 | 344 | unsigned long flags; |
| 345 | + struct scatterlist *sg; | |
| 346 | + enum dma_data_direction dma_dir; | |
| 347 | + u32 val; | |
| 348 | + dma_addr_t addr; | |
| 349 | + unsigned int len; | |
| 350 | + | |
| 351 | + dev_dbg(&(pcr->pci->dev), "--> %s: num_sg = %d\n", __func__, num_sg); | |
| 352 | + | |
| 353 | + /* don't transfer data during abort processing */ | |
| 354 | + if (pcr->remove_pci) | |
| 355 | + return -EINVAL; | |
| 356 | + | |
| 357 | + if ((sglist == NULL) || (num_sg <= 0)) | |
| 358 | + return -EINVAL; | |
| 344 | 359 | |
| 345 | − count = rtsx_pci_dma_map_sg(pcr, sglist, num_sg, read); | |
| 360 | + if (read) { | |
| 361 | + dir = DEVICE_TO_HOST; | |
| 362 | + dma_dir = DMA_FROM_DEVICE; | |
| 363 | + } else { | |
| 364 | + dir = HOST_TO_DEVICE; | |
| 365 | + dma_dir = DMA_TO_DEVICE; | |
| 366 | + } | |
| 367 | + | |
| 368 | + count = dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir); | |
| 346 | 369 | if (count < 1) { |
| 347 | 370 | dev_err(&(pcr->pci->dev), "scatterlist map failed\n"); |
| 348 | 371 | return -EINVAL; |
| 349 | 372 | } |
| 350 | 373 | dev_dbg(&(pcr->pci->dev), "DMA mapping count: %d\n", count); |
| 351 | 374 | |
| 375 | + val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE; | |
| 376 | + pcr->sgi = 0; | |
| 377 | + for_each_sg(sglist, sg, count, i) { | |
| 378 | + addr = sg_dma_address(sg); | |
| 379 | + len = sg_dma_len(sg); | |
| 380 | + rtsx_pci_add_sg_tbl(pcr, addr, len, i == count - 1); | |
| 381 | + } | |
| 352 | 382 | |
| 353 | 383 | spin_lock_irqsave(&pcr->lock, flags); |
| 354 | 384 | |
| 355 | 385 | pcr->done = &trans_done; |
| 356 | 386 | pcr->trans_result = TRANS_NOT_READY; |
| 357 | 387 | init_completion(&trans_done); |
| 388 | + rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); | |
| 389 | + rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); | |
| 358 | 390 | |
| 359 | 391 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 360 | 392 | |
| 361 | − rtsx_pci_dma_transfer(pcr, sglist, count, read); | |
| 362 | − | |
| 363 | 393 | timeleft = wait_for_completion_interruptible_timeout( |
| 364 | 394 | &trans_done, msecs_to_jiffies(timeout)); |
| 365 | 395 | if (timeleft <= 0) { |
| @@ -383,7 +413,7 @@ out: · 17 unmodified lines | ||
| 383 | 413 | pcr->done = NULL; |
| 384 | 414 | spin_unlock_irqrestore(&pcr->lock, flags); |
| 385 | 415 | |
| 386 | − rtsx_pci_dma_unmap_sg(pcr, sglist, num_sg, read); | |
| 416 | + dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dma_dir); | |
| 387 | 417 | |
| 388 | 418 | if ((err < 0) && (err != -ENODEV)) |
| 389 | 419 | rtsx_pci_stop_cmd(pcr); |
| @@ -395,73 +425,6 @@ out: · 5 unmodified lines | ||
| 395 | 425 | } |
| 396 | 426 | EXPORT_SYMBOL_GPL(rtsx_pci_transfer_data); |
| 397 | 427 | |
| 398 | −int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, | |
| 399 | − int num_sg, bool read) | |
| 400 | −{ | |
| 401 | − enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE; | |
| 402 | − | |
| 403 | − if (pcr->remove_pci) | |
| 404 | − return -EINVAL; | |
| 405 | − | |
| 406 | − if ((sglist == NULL) || num_sg < 1) | |
| 407 | − return -EINVAL; | |
| 408 | − | |
| 409 | − return dma_map_sg(&(pcr->pci->dev), sglist, num_sg, dir); | |
| 410 | −} | |
| 411 | −EXPORT_SYMBOL_GPL(rtsx_pci_dma_map_sg); | |
| 412 | − | |
| 413 | −int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, | |
| 414 | − int num_sg, bool read) | |
| 415 | −{ | |
| 416 | − enum dma_data_direction dir = read ? DMA_FROM_DEVICE : DMA_TO_DEVICE; | |
| 417 | − | |
| 418 | − if (pcr->remove_pci) | |
| 419 | − return -EINVAL; | |
| 420 | − | |
| 421 | − if (sglist == NULL || num_sg < 1) | |
| 422 | − return -EINVAL; | |
| 423 | − | |
| 424 | − dma_unmap_sg(&(pcr->pci->dev), sglist, num_sg, dir); | |
| 425 | − return num_sg; | |
| 426 | −} | |
| 427 | −EXPORT_SYMBOL_GPL(rtsx_pci_dma_unmap_sg); | |
| 428 | − | |
| 429 | −int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, | |
| 430 | − int sg_count, bool read) | |
| 431 | −{ | |
| 432 | − struct scatterlist *sg; | |
| 433 | − dma_addr_t addr; | |
| 434 | − unsigned int len; | |
| 435 | − int i; | |
| 436 | − u32 val; | |
| 437 | − u8 dir = read ? DEVICE_TO_HOST : HOST_TO_DEVICE; | |
| 438 | − unsigned long flags; | |
| 439 | − | |
| 440 | − if (pcr->remove_pci) | |
| 441 | − return -EINVAL; | |
| 442 | − | |
| 443 | − if ((sglist == NULL) || (sg_count < 1)) | |
| 444 | − return -EINVAL; | |
| 445 | − | |
| 446 | − val = ((u32)(dir & 0x01) << 29) | TRIG_DMA | ADMA_MODE; | |
| 447 | − pcr->sgi = 0; | |
| 448 | − for_each_sg(sglist, sg, sg_count, i) { | |
| 449 | − addr = sg_dma_address(sg); | |
| 450 | − len = sg_dma_len(sg); | |
| 451 | − rtsx_pci_add_sg_tbl(pcr, addr, len, i == sg_count - 1); | |
| 452 | − } | |
| 453 | − | |
| 454 | − spin_lock_irqsave(&pcr->lock, flags); | |
| 455 | − | |
| 456 | − rtsx_pci_writel(pcr, RTSX_HDBAR, pcr->host_sg_tbl_addr); | |
| 457 | − rtsx_pci_writel(pcr, RTSX_HDBCTLR, val); | |
| 458 | − | |
| 459 | − spin_unlock_irqrestore(&pcr->lock, flags); | |
| 460 | − | |
| 461 | − return 0; | |
| 462 | −} | |
| 463 | −EXPORT_SYMBOL_GPL(rtsx_pci_dma_transfer); | |
| 464 | − | |
| 465 | 428 | int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len) |
| 466 | 429 | { |
| 467 | 430 | int err; |
| @@ -873,8 +836,6 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id) · 405 unmodified lines | ||
| 873 | 836 | int_reg = rtsx_pci_readl(pcr, RTSX_BIPR); |
| 874 | 837 | /* Clear interrupt flag */ |
| 875 | 838 | rtsx_pci_writel(pcr, RTSX_BIPR, int_reg); |
| 876 | − dev_dbg(&pcr->pci->dev, "=========== BIPR 0x%8x ==========\n", int_reg); | |
| 877 | − | |
| 878 | 839 | if ((int_reg & pcr->bier) == 0) { |
| 879 | 840 | spin_unlock(&pcr->lock); |
| 880 | 841 | return IRQ_NONE; |
| @@ -905,28 +866,17 @@ static irqreturn_t rtsx_pci_isr(int irq, void *dev_id) · 24 unmodified lines | ||
| 905 | 866 | } |
| 906 | 867 | |
| 907 | 868 | if (int_reg & (NEED_COMPLETE_INT | DELINK_INT)) { |
| 908 | − if (int_reg & (TRANS_FAIL_INT | DELINK_INT)) | |
| 869 | + if (int_reg & (TRANS_FAIL_INT | DELINK_INT)) { | |
| 909 | 870 | pcr->trans_result = TRANS_RESULT_FAIL; |
| 910 | − else if (int_reg & TRANS_OK_INT) | |
| 871 | + if (pcr->done) | |
| 872 | + complete(pcr->done); | |
| 873 | + } else if (int_reg & TRANS_OK_INT) { | |
| 911 | 874 | pcr->trans_result = TRANS_RESULT_OK; |
| 912 | − | |
| 913 | − if (pcr->done) | |
| 914 | − complete(pcr->done); | |
| 915 | − | |
| 916 | − if (int_reg & SD_EXIST) { | |
| 917 | − struct rtsx_slot *slot = &pcr->slots[RTSX_SD_CARD]; | |
| 918 | − if (slot && slot->done_transfer) | |
| 919 | − slot->done_transfer(slot->p_dev); | |
| 920 | − } | |
| 921 | − | |
| 922 | − if (int_reg & MS_EXIST) { | |
| 923 | − struct rtsx_slot *slot = &pcr->slots[RTSX_SD_CARD]; | |
| 924 | − if (slot && slot->done_transfer) | |
| 925 | − slot->done_transfer(slot->p_dev); | |
| 875 | + if (pcr->done) | |
| 876 | + complete(pcr->done); | |
| 926 | 877 | } |
| 927 | 878 | } |
| 928 | 879 | |
| 929 | − | |
| 930 | 880 | if (pcr->card_inserted || pcr->card_removed) |
| 931 | 881 | schedule_delayed_work(&pcr->carddet_work, |
| 932 | 882 | msecs_to_jiffies(200)); |
| @@ -31,28 +31,14 @@ · 30 unmodified lines | ||
| 31 | 31 | #include <linux/mfd/rtsx_pci.h> |
| 32 | 32 | #include <asm/unaligned.h> |
| 33 | 33 | |
| 34 | −struct realtek_next { | |
| 35 | − unsigned int sg_count; | |
| 36 | − s32 cookie; | |
| 37 | −}; | |
| 38 | − | |
| 39 | 34 | struct realtek_pci_sdmmc { |
| 40 | 35 | struct platform_device *pdev; |
| 41 | 36 | struct rtsx_pcr *pcr; |
| 42 | 37 | struct mmc_host *mmc; |
| 43 | 38 | struct mmc_request *mrq; |
| 44 | − struct mmc_command *cmd; | |
| 45 | − struct mmc_data *data; | |
| 46 | − | |
| 47 | − spinlock_t lock; | |
| 48 | − struct timer_list timer; | |
| 49 | − struct tasklet_struct cmd_tasklet; | |
| 50 | − struct tasklet_struct data_tasklet; | |
| 51 | − struct tasklet_struct finish_tasklet; | |
| 52 | − | |
| 53 | − u8 rsp_type; | |
| 54 | − u8 rsp_len; | |
| 55 | − int sg_count; | |
| 39 | + | |
| 40 | + struct mutex host_mutex; | |
| 41 | + | |
| 56 | 42 | u8 ssc_depth; |
| 57 | 43 | unsigned int clock; |
| 58 | 44 | bool vpclk; |
| @@ -62,13 +48,8 @@ struct realtek_pci_sdmmc { · 3 unmodified lines | ||
| 62 | 48 | int power_state; |
| 63 | 49 | #define SDMMC_POWER_ON 1 |
| 64 | 50 | #define SDMMC_POWER_OFF 0 |
| 65 | − | |
| 66 | − struct realtek_next next_data; | |
| 67 | 51 | }; |
| 68 | 52 | |
| 69 | −static int sd_start_multi_rw(struct realtek_pci_sdmmc *host, | |
| 70 | − struct mmc_request *mrq); | |
| 71 | − | |
| 72 | 53 | static inline struct device *sdmmc_dev(struct realtek_pci_sdmmc *host) |
| 73 | 54 | { |
| 74 | 55 | return &(host->pdev->dev); |
| @@ -105,95 +86,6 @@ static void sd_print_debug_regs(struct realtek_pci_sdmmc *host) · 30 unmodified lines | ||
| 105 | 86 | #define sd_print_debug_regs(host) |
| 106 | 87 | #endif /* DEBUG */ |
| 107 | 88 | |
| 108 | −static void sd_isr_done_transfer(struct platform_device *pdev) | |
| 109 | −{ | |
| 110 | − struct realtek_pci_sdmmc *host = platform_get_drvdata(pdev); | |
| 111 | − | |
| 112 | − spin_lock(&host->lock); | |
| 113 | − if (host->cmd) | |
| 114 | − tasklet_schedule(&host->cmd_tasklet); | |
| 115 | − if (host->data) | |
| 116 | − tasklet_schedule(&host->data_tasklet); | |
| 117 | − spin_unlock(&host->lock); | |
| 118 | −} | |
| 119 | − | |
| 120 | −static void sd_request_timeout(unsigned long host_addr) | |
| 121 | −{ | |
| 122 | − struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr; | |
| 123 | − unsigned long flags; | |
| 124 | − | |
| 125 | − spin_lock_irqsave(&host->lock, flags); | |
| 126 | − | |
| 127 | − if (!host->mrq) { | |
| 128 | − dev_err(sdmmc_dev(host), "error: no request exist\n"); | |
| 129 | − goto out; | |
| 130 | − } | |
| 131 | − | |
| 132 | − if (host->cmd) | |
| 133 | − host->cmd->error = -ETIMEDOUT; | |
| 134 | − if (host->data) | |
| 135 | − host->data->error = -ETIMEDOUT; | |
| 136 | − | |
| 137 | − dev_dbg(sdmmc_dev(host), "timeout for request\n"); | |
| 138 | − | |
| 139 | −out: | |
| 140 | − tasklet_schedule(&host->finish_tasklet); | |
| 141 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 142 | −} | |
| 143 | − | |
| 144 | −static void sd_finish_request(unsigned long host_addr) | |
| 145 | −{ | |
| 146 | − struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr; | |
| 147 | − struct rtsx_pcr *pcr = host->pcr; | |
| 148 | − struct mmc_request *mrq; | |
| 149 | − struct mmc_command *cmd; | |
| 150 | − struct mmc_data *data; | |
| 151 | − unsigned long flags; | |
| 152 | − bool any_error; | |
| 153 | − | |
| 154 | − spin_lock_irqsave(&host->lock, flags); | |
| 155 | − | |
| 156 | − del_timer(&host->timer); | |
| 157 | − mrq = host->mrq; | |
| 158 | − if (!mrq) { | |
| 159 | − dev_err(sdmmc_dev(host), "error: no request need finish\n"); | |
| 160 | − goto out; | |
| 161 | − } | |
| 162 | − | |
| 163 | − cmd = mrq->cmd; | |
| 164 | − data = mrq->data; | |
| 165 | − | |
| 166 | − any_error = (mrq->sbc && mrq->sbc->error) || | |
| 167 | − (mrq->stop && mrq->stop->error) || | |
| 168 | − (cmd && cmd->error) || (data && data->error); | |
| 169 | − | |
| 170 | − if (any_error) { | |
| 171 | − rtsx_pci_stop_cmd(pcr); | |
| 172 | − sd_clear_error(host); | |
| 173 | − } | |
| 174 | − | |
| 175 | − if (data) { | |
| 176 | − if (any_error) | |
| 177 | − data->bytes_xfered = 0; | |
| 178 | − else | |
| 179 | − data->bytes_xfered = data->blocks * data->blksz; | |
| 180 | − | |
| 181 | − if (!data->host_cookie) | |
| 182 | − rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, | |
| 183 | − data->flags & MMC_DATA_READ); | |
| 184 | − | |
| 185 | − } | |
| 186 | − | |
| 187 | − host->mrq = NULL; | |
| 188 | − host->cmd = NULL; | |
| 189 | − host->data = NULL; | |
| 190 | − | |
| 191 | −out: | |
| 192 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 193 | − mutex_unlock(&pcr->pcr_mutex); | |
| 194 | − mmc_request_done(host->mmc, mrq); | |
| 195 | −} | |
| 196 | − | |
| 197 | 89 | static int sd_read_data(struct realtek_pci_sdmmc *host, u8 *cmd, u16 byte_cnt, |
| 198 | 90 | u8 *buf, int buf_len, int timeout) |
| 199 | 91 | { |
| @@ -311,7 +203,8 @@ static int sd_write_data(struct realtek_pci_sdmmc *host, u8 *cmd, u16 byte_cnt, · 111 unmodified lines | ||
| 311 | 203 | return 0; |
| 312 | 204 | } |
| 313 | 205 | |
| 314 | −static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd) | |
| 206 | +static void sd_send_cmd_get_rsp(struct realtek_pci_sdmmc *host, | |
| 207 | + struct mmc_command *cmd) | |
| 315 | 208 | { |
| 316 | 209 | struct rtsx_pcr *pcr = host->pcr; |
| 317 | 210 | u8 cmd_idx = (u8)cmd->opcode; |
| @@ -319,14 +212,11 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd) · 1 unmodified line | ||
| 319 | 212 | int err = 0; |
| 320 | 213 | int timeout = 100; |
| 321 | 214 | int i; |
| 215 | + u8 *ptr; | |
| 216 | + int stat_idx = 0; | |
| 322 | 217 | u8 rsp_type; |
| 323 | 218 | int rsp_len = 5; |
| 324 | − unsigned long flags; | |
| 325 | − | |
| 326 | − if (host->cmd) | |
| 327 | − dev_err(sdmmc_dev(host), "error: cmd already exist\n"); | |
| 328 | − | |
| 329 | − host->cmd = cmd; | |
| 219 | + bool clock_toggled = false; | |
| 330 | 220 | |
| 331 | 221 | dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n", |
| 332 | 222 | __func__, cmd_idx, arg); |
| @@ -361,8 +251,6 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd) · 28 unmodified lines | ||
| 361 | 251 | err = -EINVAL; |
| 362 | 252 | goto out; |
| 363 | 253 | } |
| 364 | − host->rsp_type = rsp_type; | |
| 365 | − host->rsp_len = rsp_len; | |
| 366 | 254 | |
| 367 | 255 | if (rsp_type == SD_RSP_TYPE_R1b) |
| 368 | 256 | timeout = 3000; |
| @@ -372,6 +260,8 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd) · 3 unmodified lines | ||
| 372 | 260 | 0xFF, SD_CLK_TOGGLE_EN); |
| 373 | 261 | if (err < 0) |
| 374 | 262 | goto out; |
| 263 | + | |
| 264 | + clock_toggled = true; | |
| 375 | 265 | } |
| 376 | 266 | |
| 377 | 267 | rtsx_pci_init_cmd(pcr); |
| @@ -395,60 +285,25 @@ static void sd_send_cmd(struct realtek_pci_sdmmc *host, struct mmc_command *cmd) · 17 unmodified lines | ||
| 395 | 285 | /* Read data from ping-pong buffer */ |
| 396 | 286 | for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++) |
| 397 | 287 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0); |
| 288 | + stat_idx = 16; | |
| 398 | 289 | } else if (rsp_type != SD_RSP_TYPE_R0) { |
| 399 | 290 | /* Read data from SD_CMDx registers */ |
| 400 | 291 | for (i = SD_CMD0; i <= SD_CMD4; i++) |
| 401 | 292 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0); |
| 293 | + stat_idx = 5; | |
| 402 | 294 | } |
| 403 | 295 | |
| 404 | 296 | rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0); |
| 405 | 297 | |
| 406 | − mod_timer(&host->timer, jiffies + msecs_to_jiffies(timeout)); | |
| 407 | − | |
| 408 | − spin_lock_irqsave(&pcr->lock, flags); | |
| 409 | − pcr->trans_result = TRANS_NOT_READY; | |
| 410 | − rtsx_pci_send_cmd_no_wait(pcr); | |
| 411 | − spin_unlock_irqrestore(&pcr->lock, flags); | |
| 412 | − | |
| 413 | − return; | |
| 414 | − | |
| 415 | −out: | |
| 416 | − cmd->error = err; | |
| 417 | − tasklet_schedule(&host->finish_tasklet); | |
| 418 | −} | |
| 419 | − | |
| 420 | −static void sd_get_rsp(unsigned long host_addr) | |
| 421 | −{ | |
| 422 | − struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr; | |
| 423 | − struct rtsx_pcr *pcr = host->pcr; | |
| 424 | − struct mmc_command *cmd; | |
| 425 | − int i, err = 0, stat_idx; | |
| 426 | − u8 *ptr, rsp_type; | |
| 427 | − unsigned long flags; | |
| 428 | − | |
| 429 | − spin_lock_irqsave(&host->lock, flags); | |
| 430 | − | |
| 431 | − cmd = host->cmd; | |
| 432 | − host->cmd = NULL; | |
| 433 | − | |
| 434 | − if (!cmd) { | |
| 435 | − dev_err(sdmmc_dev(host), "error: cmd not exist\n"); | |
| 298 | + err = rtsx_pci_send_cmd(pcr, timeout); | |
| 299 | + if (err < 0) { | |
| 300 | + sd_print_debug_regs(host); | |
| 301 | + sd_clear_error(host); | |
| 302 | + dev_dbg(sdmmc_dev(host), | |
| 303 | + "rtsx_pci_send_cmd error (err = %d)\n", err); | |
| 436 | 304 | goto out; |
| 437 | 305 | } |
| 438 | 306 | |
| 439 | − spin_lock(&pcr->lock); | |
| 440 | − if (pcr->trans_result == TRANS_NO_DEVICE) | |
| 441 | − err = -ENODEV; | |
| 442 | − else if (pcr->trans_result != TRANS_RESULT_OK) | |
| 443 | − err = -EINVAL; | |
| 444 | − spin_unlock(&pcr->lock); | |
| 445 | − | |
| 446 | − if (err < 0) | |
| 447 | − goto out; | |
| 448 | − | |
| 449 | − rsp_type = host->rsp_type; | |
| 450 | − stat_idx = host->rsp_len; | |
| 451 | − | |
| 452 | 307 | if (rsp_type == SD_RSP_TYPE_R0) { |
| 453 | 308 | err = 0; |
| 454 | 309 | goto out; |
| @@ -485,106 +340,26 @@ static void sd_get_rsp(unsigned long host_addr) · 30 unmodified lines | ||
| 485 | 340 | cmd->resp[0]); |
| 486 | 341 | } |
| 487 | 342 | |
| 488 | − if (cmd == host->mrq->sbc) { | |
| 489 | − sd_send_cmd(host, host->mrq->cmd); | |
| 490 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 491 | − return; | |
| 492 | − } | |
| 493 | − | |
| 494 | − if (cmd == host->mrq->stop) | |
| 495 | − goto out; | |
| 496 | − | |
| 497 | − if (cmd->data) { | |
| 498 | − sd_start_multi_rw(host, host->mrq); | |
| 499 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 500 | − return; | |
| 501 | − } | |
| 502 | − | |
| 503 | 343 | out: |
| 504 | 344 | cmd->error = err; |
| 505 | 345 | |
| 506 | − tasklet_schedule(&host->finish_tasklet); | |
| 507 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 508 | −} | |
| 509 | − | |
| 510 | −static int sd_pre_dma_transfer(struct realtek_pci_sdmmc *host, | |
| 511 | − struct mmc_data *data, struct realtek_next *next) | |
| 512 | −{ | |
| 513 | − struct rtsx_pcr *pcr = host->pcr; | |
| 514 | − int read = data->flags & MMC_DATA_READ; | |
| 515 | − int sg_count = 0; | |
| 516 | − | |
| 517 | − if (!next && data->host_cookie && | |
| 518 | − data->host_cookie != host->next_data.cookie) { | |
| 519 | − dev_err(sdmmc_dev(host), | |
| 520 | − "error: invalid cookie data[%d] host[%d]\n", | |
| 521 | − data->host_cookie, host->next_data.cookie); | |
| 522 | − data->host_cookie = 0; | |
| 523 | − } | |
| 524 | − | |
| 525 | − if (next || (!next && data->host_cookie != host->next_data.cookie)) | |
| 526 | − sg_count = rtsx_pci_dma_map_sg(pcr, | |
| 527 | − data->sg, data->sg_len, read); | |
| 528 | − else | |
| 529 | − sg_count = host->next_data.sg_count; | |
| 530 | − | |
| 531 | − if (next) { | |
| 532 | − next->sg_count = sg_count; | |
| 533 | − if (++next->cookie < 0) | |
| 534 | − next->cookie = 1; | |
| 535 | − data->host_cookie = next->cookie; | |
| 536 | − } | |
| 537 | − | |
| 538 | − return sg_count; | |
| 539 | −} | |
| 540 | − | |
| 541 | −static void sdmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, | |
| 542 | − bool is_first_req) | |
| 543 | −{ | |
| 544 | − struct realtek_pci_sdmmc *host = mmc_priv(mmc); | |
| 545 | − struct mmc_data *data = mrq->data; | |
| 546 | − | |
| 547 | − if (data->host_cookie) { | |
| 548 | − dev_err(sdmmc_dev(host), | |
| 549 | − "error: descard already cookie data[%d]\n", | |
| 550 | − data->host_cookie); | |
| 551 | − data->host_cookie = 0; | |
| 552 | − } | |
| 553 | − | |
| 554 | − dev_dbg(sdmmc_dev(host), "dma sg prepared: %d\n", | |
| 555 | − sd_pre_dma_transfer(host, data, &host->next_data)); | |
| 556 | −} | |
| 557 | − | |
| 558 | −static void sdmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, | |
| 559 | − int err) | |
| 560 | −{ | |
| 561 | − struct realtek_pci_sdmmc *host = mmc_priv(mmc); | |
| 562 | − struct rtsx_pcr *pcr = host->pcr; | |
| 563 | − struct mmc_data *data = mrq->data; | |
| 564 | − int read = data->flags & MMC_DATA_READ; | |
| 565 | − | |
| 566 | − rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, read); | |
| 567 | − data->host_cookie = 0; | |
| 346 | + if (err && clock_toggled) | |
| 347 | + rtsx_pci_write_register(pcr, SD_BUS_STAT, | |
| 348 | + SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0); | |
| 568 | 349 | } |
| 569 | 350 | |
| 570 | −static int sd_start_multi_rw(struct realtek_pci_sdmmc *host, | |
| 571 | − struct mmc_request *mrq) | |
| 351 | +static int sd_rw_multi(struct realtek_pci_sdmmc *host, struct mmc_request *mrq) | |
| 572 | 352 | { |
| 573 | 353 | struct rtsx_pcr *pcr = host->pcr; |
| 574 | 354 | struct mmc_host *mmc = host->mmc; |
| 575 | 355 | struct mmc_card *card = mmc->card; |
| 576 | 356 | struct mmc_data *data = mrq->data; |
| 577 | 357 | int uhs = mmc_card_uhs(card); |
| 578 | − int read = data->flags & MMC_DATA_READ; | |
| 358 | + int read = (data->flags & MMC_DATA_READ) ? 1 : 0; | |
| 579 | 359 | u8 cfg2, trans_mode; |
| 580 | 360 | int err; |
| 581 | 361 | size_t data_len = data->blksz * data->blocks; |
| 582 | 362 | |
| 583 | − if (host->data) | |
| 584 | − dev_err(sdmmc_dev(host), "error: data already exist\n"); | |
| 585 | − | |
| 586 | − host->data = data; | |
| 587 | − | |
| 588 | 363 | if (read) { |
| 589 | 364 | cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 | |
| 590 | 365 | SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0; |
| @@ -635,54 +410,15 @@ static int sd_start_multi_rw(struct realtek_pci_sdmmc *host, · 44 unmodified lines | ||
| 635 | 410 | rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, |
| 636 | 411 | SD_TRANSFER_END, SD_TRANSFER_END); |
| 637 | 412 | |
| 638 | − mod_timer(&host->timer, jiffies + 10 * HZ); | |
| 639 | 413 | rtsx_pci_send_cmd_no_wait(pcr); |
| 640 | 414 | |
| 641 | − err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, read); | |
| 642 | − if (err < 0) { | |
| 643 | − data->error = err; | |
| 644 | − tasklet_schedule(&host->finish_tasklet); | |
| 645 | − } | |
| 646 | − return 0; | |
| 647 | −} | |
| 648 | − | |
| 649 | −static void sd_finish_multi_rw(unsigned long host_addr) | |
| 650 | −{ | |
| 651 | − struct realtek_pci_sdmmc *host = (struct realtek_pci_sdmmc *)host_addr; | |
| 652 | − struct rtsx_pcr *pcr = host->pcr; | |
| 653 | − struct mmc_data *data; | |
| 654 | − int err = 0; | |
| 655 | − unsigned long flags; | |
| 656 | − | |
| 657 | − spin_lock_irqsave(&host->lock, flags); | |
| 658 | − | |
| 659 | − if (!host->data) { | |
| 660 | − dev_err(sdmmc_dev(host), "error: no data exist\n"); | |
| 661 | − goto out; | |
| 662 | − } | |
| 663 | − | |
| 664 | − data = host->data; | |
| 665 | − host->data = NULL; | |
| 666 | − | |
| 667 | − if (pcr->trans_result == TRANS_NO_DEVICE) | |
| 668 | − err = -ENODEV; | |
| 669 | − else if (pcr->trans_result != TRANS_RESULT_OK) | |
| 670 | − err = -EINVAL; | |
| 671 | − | |
| 415 | + err = rtsx_pci_transfer_data(pcr, data->sg, data->sg_len, read, 10000); | |
| 672 | 416 | if (err < 0) { |
| 673 | − data->error = err; | |
| 674 | − goto out; | |
| 675 | − } | |
| 676 | − | |
| 677 | − if (!host->mrq->sbc && data->stop) { | |
| 678 | − sd_send_cmd(host, data->stop); | |
| 679 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 680 | − return; | |
| 417 | + sd_clear_error(host); | |
| 418 | + return err; | |
| 681 | 419 | } |
| 682 | 420 | |
| 683 | −out: | |
| 684 | − tasklet_schedule(&host->finish_tasklet); | |
| 685 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 421 | + return 0; | |
| 686 | 422 | } |
| 687 | 423 | |
| 688 | 424 | static inline void sd_enable_initial_mode(struct realtek_pci_sdmmc *host) |
| @@ -901,13 +637,6 @@ static int sd_tuning_rx(struct realtek_pci_sdmmc *host, u8 opcode) · 212 unmodified lines | ||
| 901 | 637 | return 0; |
| 902 | 638 | } |
| 903 | 639 | |
| 904 | −static inline bool sd_use_muti_rw(struct mmc_command *cmd) | |
| 905 | −{ | |
| 906 | − return mmc_op_multi(cmd->opcode) || | |
| 907 | − (cmd->opcode == MMC_READ_SINGLE_BLOCK) || | |
| 908 | − (cmd->opcode == MMC_WRITE_BLOCK); | |
| 909 | −} | |
| 910 | − | |
| 911 | 640 | static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 912 | 641 | { |
| 913 | 642 | struct realtek_pci_sdmmc *host = mmc_priv(mmc); |
| @@ -916,14 +645,6 @@ static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) · 2 unmodified lines | ||
| 916 | 645 | struct mmc_data *data = mrq->data; |
| 917 | 646 | unsigned int data_size = 0; |
| 918 | 647 | int err; |
| 919 | − unsigned long flags; | |
| 920 | − | |
| 921 | − mutex_lock(&pcr->pcr_mutex); | |
| 922 | − spin_lock_irqsave(&host->lock, flags); | |
| 923 | − | |
| 924 | − if (host->mrq) | |
| 925 | − dev_err(sdmmc_dev(host), "error: request already exist\n"); | |
| 926 | − host->mrq = mrq; | |
| 927 | 648 | |
| 928 | 649 | if (host->eject) { |
| 929 | 650 | cmd->error = -ENOMEDIUM; |
| @@ -936,6 +657,8 @@ static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) · 6 unmodified lines | ||
| 936 | 657 | goto finish; |
| 937 | 658 | } |
| 938 | 659 | |
| 660 | + mutex_lock(&pcr->pcr_mutex); | |
| 661 | + | |
| 939 | 662 | rtsx_pci_start_run(pcr); |
| 940 | 663 | |
| 941 | 664 | rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth, |
| @@ -944,28 +667,46 @@ static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq) · 2 unmodified lines | ||
| 944 | 667 | rtsx_pci_write_register(pcr, CARD_SHARE_MODE, |
| 945 | 668 | CARD_SHARE_MASK, CARD_SHARE_48_SD); |
| 946 | 669 | |
| 670 | + mutex_lock(&host->host_mutex); | |
| 671 | + host->mrq = mrq; | |
| 672 | + mutex_unlock(&host->host_mutex); | |
| 673 | + | |
| 947 | 674 | if (mrq->data) |
| 948 | 675 | data_size = data->blocks * data->blksz; |
| 949 | 676 | |
| 950 | − if (sd_use_muti_rw(cmd)) | |
| 951 | − host->sg_count = sd_pre_dma_transfer(host, data, NULL); | |
| 677 | + if (!data_size || mmc_op_multi(cmd->opcode) || | |
| 678 | + (cmd->opcode == MMC_READ_SINGLE_BLOCK) || | |
| 679 | + (cmd->opcode == MMC_WRITE_BLOCK)) { | |
| 680 | + sd_send_cmd_get_rsp(host, cmd); | |
| 952 | 681 | |
| 953 | − if (!data_size || sd_use_muti_rw(cmd)) { | |
| 954 | − if (mrq->sbc) | |
| 955 | − sd_send_cmd(host, mrq->sbc); | |
| 956 | − else | |
| 957 | − sd_send_cmd(host, cmd); | |
| 958 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 682 | + if (!cmd->error && data_size) { | |
| 683 | + sd_rw_multi(host, mrq); | |
| 684 | + | |
| 685 | + if (mmc_op_multi(cmd->opcode) && mrq->stop) | |
| 686 | + sd_send_cmd_get_rsp(host, mrq->stop); | |
| 687 | + } | |
| 959 | 688 | } else { |
| 960 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 961 | 689 | sd_normal_rw(host, mrq); |
| 962 | − tasklet_schedule(&host->finish_tasklet); | |
| 963 | 690 | } |
| 964 | − return; | |
| 691 | + | |
| 692 | + if (mrq->data) { | |
| 693 | + if (cmd->error || data->error) | |
| 694 | + data->bytes_xfered = 0; | |
| 695 | + else | |
| 696 | + data->bytes_xfered = data->blocks * data->blksz; | |
| 697 | + } | |
| 698 | + | |
| 699 | + mutex_unlock(&pcr->pcr_mutex); | |
| 965 | 700 | |
| 966 | 701 | finish: |
| 967 | − tasklet_schedule(&host->finish_tasklet); | |
| 968 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 702 | + if (cmd->error) | |
| 703 | + dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error); | |
| 704 | + | |
| 705 | + mutex_lock(&host->host_mutex); | |
| 706 | + host->mrq = NULL; | |
| 707 | + mutex_unlock(&host->host_mutex); | |
| 708 | + | |
| 709 | + mmc_request_done(mmc, mrq); | |
| 969 | 710 | } |
| 970 | 711 | |
| 971 | 712 | static int sd_set_bus_width(struct realtek_pci_sdmmc *host, |
| @@ -1400,8 +1141,6 @@ out: · 428 unmodified lines | ||
| 1400 | 1141 | } |
| 1401 | 1142 | |
| 1402 | 1143 | static const struct mmc_host_ops realtek_pci_sdmmc_ops = { |
| 1403 | − .pre_req = sdmmc_pre_req, | |
| 1404 | − .post_req = sdmmc_post_req, | |
| 1405 | 1144 | .request = sdmmc_request, |
| 1406 | 1145 | .set_ios = sdmmc_set_ios, |
| 1407 | 1146 | .get_ro = sdmmc_get_ro, |
| @@ -1465,7 +1204,6 @@ static int rtsx_pci_sdmmc_drv_probe(struct platform_device *pdev) · 57 unmodified lines | ||
| 1465 | 1204 | struct realtek_pci_sdmmc *host; |
| 1466 | 1205 | struct rtsx_pcr *pcr; |
| 1467 | 1206 | struct pcr_handle *handle = pdev->dev.platform_data; |
| 1468 | − unsigned long host_addr; | |
| 1469 | 1207 | |
| 1470 | 1208 | if (!handle) |
| 1471 | 1209 | return -ENXIO; |
| @@ -1489,15 +1227,8 @@ static int rtsx_pci_sdmmc_drv_probe(struct platform_device *pdev) · 17 unmodified lines | ||
| 1489 | 1227 | pcr->slots[RTSX_SD_CARD].p_dev = pdev; |
| 1490 | 1228 | pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event; |
| 1491 | 1229 | |
| 1492 | − host_addr = (unsigned long)host; | |
| 1493 | − host->next_data.cookie = 1; | |
| 1494 | − setup_timer(&host->timer, sd_request_timeout, host_addr); | |
| 1495 | − tasklet_init(&host->cmd_tasklet, sd_get_rsp, host_addr); | |
| 1496 | − tasklet_init(&host->data_tasklet, sd_finish_multi_rw, host_addr); | |
| 1497 | − tasklet_init(&host->finish_tasklet, sd_finish_request, host_addr); | |
| 1498 | − spin_lock_init(&host->lock); | |
| 1230 | + mutex_init(&host->host_mutex); | |
| 1499 | 1231 | |
| 1500 | − pcr->slots[RTSX_SD_CARD].done_transfer = sd_isr_done_transfer; | |
| 1501 | 1232 | realtek_init_host(host); |
| 1502 | 1233 | |
| 1503 | 1234 | mmc_add_host(mmc); |
| @@ -1510,8 +1241,6 @@ static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev) · 6 unmodified lines | ||
| 1510 | 1241 | struct realtek_pci_sdmmc *host = platform_get_drvdata(pdev); |
| 1511 | 1242 | struct rtsx_pcr *pcr; |
| 1512 | 1243 | struct mmc_host *mmc; |
| 1513 | − struct mmc_request *mrq; | |
| 1514 | − unsigned long flags; | |
| 1515 | 1244 | |
| 1516 | 1245 | if (!host) |
| 1517 | 1246 | return 0; |
| @@ -1519,33 +1248,22 @@ static int rtsx_pci_sdmmc_drv_remove(struct platform_device *pdev) · 1 unmodified line | ||
| 1519 | 1248 | pcr = host->pcr; |
| 1520 | 1249 | pcr->slots[RTSX_SD_CARD].p_dev = NULL; |
| 1521 | 1250 | pcr->slots[RTSX_SD_CARD].card_event = NULL; |
| 1522 | − pcr->slots[RTSX_SD_CARD].done_transfer = NULL; | |
| 1523 | 1251 | mmc = host->mmc; |
| 1524 | − mrq = host->mrq; | |
| 1525 | 1252 | |
| 1526 | − spin_lock_irqsave(&host->lock, flags); | |
| 1253 | + mutex_lock(&host->host_mutex); | |
| 1527 | 1254 | if (host->mrq) { |
| 1528 | 1255 | dev_dbg(&(pdev->dev), |
| 1529 | 1256 | "%s: Controller removed during transfer\n", |
| 1530 | 1257 | mmc_hostname(mmc)); |
| 1531 | 1258 | |
| 1532 | − if (mrq->sbc) | |
| 1533 | − mrq->sbc->error = -ENOMEDIUM; | |
| 1534 | − if (mrq->cmd) | |
| 1535 | − mrq->cmd->error = -ENOMEDIUM; | |
| 1536 | − if (mrq->stop) | |
| 1537 | − mrq->stop->error = -ENOMEDIUM; | |
| 1538 | − if (mrq->data) | |
| 1539 | − mrq->data->error = -ENOMEDIUM; | |
| 1259 | + rtsx_pci_complete_unfinished_transfer(pcr); | |
| 1540 | 1260 | |
| 1541 | − tasklet_schedule(&host->finish_tasklet); | |
| 1261 | + host->mrq->cmd->error = -ENOMEDIUM; | |
| 1262 | + if (host->mrq->stop) | |
| 1263 | + host->mrq->stop->error = -ENOMEDIUM; | |
| 1264 | + mmc_request_done(mmc, host->mrq); | |
| 1542 | 1265 | } |
| 1543 | − spin_unlock_irqrestore(&host->lock, flags); | |
| 1544 | − | |
| 1545 | − del_timer_sync(&host->timer); | |
| 1546 | − tasklet_kill(&host->cmd_tasklet); | |
| 1547 | − tasklet_kill(&host->data_tasklet); | |
| 1548 | − tasklet_kill(&host->finish_tasklet); | |
| 1266 | + mutex_unlock(&host->host_mutex); | |
| 1549 | 1267 | |
| 1550 | 1268 | mmc_remove_host(mmc); |
| 1551 | 1269 | host->eject = true; |
| @@ -523,6 +523,7 @@ static struct nand_ecclayout hwecc4_2048 = { · 522 unmodified lines | ||
| 523 | 523 | #if defined(CONFIG_OF) |
| 524 | 524 | static const struct of_device_id davinci_nand_of_match[] = { |
| 525 | 525 | {.compatible = "ti,davinci-nand", }, |
| 526 | + {.compatible = "ti,keystone-nand", }, | |
| 526 | 527 | {}, |
| 527 | 528 | }; |
| 528 | 529 | MODULE_DEVICE_TABLE(of, davinci_nand_of_match); |
| @@ -581,6 +582,11 @@ static struct davinci_nand_pdata · 52 unmodified lines | ||
| 581 | 582 | of_property_read_bool(pdev->dev.of_node, |
| 582 | 583 | "ti,davinci-nand-use-bbt")) |
| 583 | 584 | pdata->bbt_options = NAND_BBT_USE_FLASH; |
| 585 | + | |
| 586 | + if (of_device_is_compatible(pdev->dev.of_node, | |
| 587 | + "ti,keystone-nand")) { | |
| 588 | + pdata->options |= NAND_NO_SUBPAGE_WRITE; | |
| 589 | + } | |
| 584 | 590 | } |
| 585 | 591 | |
| 586 | 592 | return dev_get_platdata(&pdev->dev); |
| @@ -82,7 +82,8 @@ static inline struct arp_pkt *arp_pkt(const struct sk_buff *skb) · 81 unmodified lines | ||
| 82 | 82 | } |
| 83 | 83 | |
| 84 | 84 | /* Forward declaration */ |
| 85 | −static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[]); | |
| 85 | +static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[], | |
| 86 | + bool strict_match); | |
| 86 | 87 | static void rlb_purge_src_ip(struct bonding *bond, struct arp_pkt *arp); |
| 87 | 88 | static void rlb_src_unlink(struct bonding *bond, u32 index); |
| 88 | 89 | static void rlb_src_link(struct bonding *bond, u32 ip_src_hash, |
| @@ -459,7 +460,7 @@ static void rlb_teach_disabled_mac_on_primary(struct bonding *bond, u8 addr[]) · 370 unmodified lines | ||
| 459 | 460 | |
| 460 | 461 | bond->alb_info.rlb_promisc_timeout_counter = 0; |
| 461 | 462 | |
| 462 | − alb_send_learning_packets(bond->curr_active_slave, addr); | |
| 463 | + alb_send_learning_packets(bond->curr_active_slave, addr, true); | |
| 463 | 464 | } |
| 464 | 465 | |
| 465 | 466 | /* slave being removed should not be active at this point |
| @@ -995,7 +996,7 @@ static void rlb_clear_vlan(struct bonding *bond, unsigned short vlan_id) · 529 unmodified lines | ||
| 995 | 996 | /*********************** tlb/rlb shared functions *********************/ |
| 996 | 997 | |
| 997 | 998 | static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], |
| 998 | − u16 vid) | |
| 999 | + __be16 vlan_proto, u16 vid) | |
| 999 | 1000 | { |
| 1000 | 1001 | struct learning_pkt pkt; |
| 1001 | 1002 | struct sk_buff *skb; |
| @@ -1021,7 +1022,7 @@ static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], · 19 unmodified lines | ||
| 1021 | 1022 | skb->dev = slave->dev; |
| 1022 | 1023 | |
| 1023 | 1024 | if (vid) { |
| 1024 | − skb = vlan_put_tag(skb, htons(ETH_P_8021Q), vid); | |
| 1025 | + skb = vlan_put_tag(skb, vlan_proto, vid); | |
| 1025 | 1026 | if (!skb) { |
| 1026 | 1027 | pr_err("%s: Error: failed to insert VLAN tag\n", |
| 1027 | 1028 | slave->bond->dev->name); |
| @@ -1032,22 +1033,32 @@ static void alb_send_lp_vid(struct slave *slave, u8 mac_addr[], · 4 unmodified lines | ||
| 1032 | 1033 | dev_queue_xmit(skb); |
| 1033 | 1034 | } |
| 1034 | 1035 | |
| 1035 | − | |
| 1036 | −static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[]) | |
| 1036 | +static void alb_send_learning_packets(struct slave *slave, u8 mac_addr[], | |
| 1037 | + bool strict_match) | |
| 1037 | 1038 | { |
| 1038 | 1039 | struct bonding *bond = bond_get_bond_by_slave(slave); |
| 1039 | 1040 | struct net_device *upper; |
| 1040 | 1041 | struct list_head *iter; |
| 1041 | 1042 | |
| 1042 | 1043 | /* send untagged */ |
| 1043 | − alb_send_lp_vid(slave, mac_addr, 0); | |
| 1044 | + alb_send_lp_vid(slave, mac_addr, 0, 0); | |
| 1044 | 1045 | |
| 1045 | 1046 | /* loop through vlans and send one packet for each */ |
| 1046 | 1047 | rcu_read_lock(); |
| 1047 | 1048 | netdev_for_each_all_upper_dev_rcu(bond->dev, upper, iter) { |
| 1048 | − if (upper->priv_flags & IFF_802_1Q_VLAN) | |
| 1049 | − alb_send_lp_vid(slave, mac_addr, | |
| 1050 | − vlan_dev_vlan_id(upper)); | |
| 1049 | + if (is_vlan_dev(upper) && vlan_get_encap_level(upper) == 0) { | |
| 1050 | + if (strict_match && | |
| 1051 | + ether_addr_equal_64bits(mac_addr, | |
| 1052 | + upper->dev_addr)) { | |
| 1053 | + alb_send_lp_vid(slave, mac_addr, | |
| 1054 | + vlan_dev_vlan_proto(upper), | |
| 1055 | + vlan_dev_vlan_id(upper)); | |
| 1056 | + } else if (!strict_match) { | |
| 1057 | + alb_send_lp_vid(slave, upper->dev_addr, | |
| 1058 | + vlan_dev_vlan_proto(upper), | |
| 1059 | + vlan_dev_vlan_id(upper)); | |
| 1060 | + } | |
| 1061 | + } | |
| 1051 | 1062 | } |
| 1052 | 1063 | rcu_read_unlock(); |
| 1053 | 1064 | } |
| @@ -1107,7 +1118,7 @@ static void alb_fasten_mac_swap(struct bonding *bond, struct slave *slave1, · 53 unmodified lines | ||
| 1107 | 1118 | |
| 1108 | 1119 | /* fasten the change in the switch */ |
| 1109 | 1120 | if (SLAVE_IS_OK(slave1)) { |
| 1110 | − alb_send_learning_packets(slave1, slave1->dev->dev_addr); | |
| 1121 | + alb_send_learning_packets(slave1, slave1->dev->dev_addr, false); | |
| 1111 | 1122 | if (bond->alb_info.rlb_enabled) { |
| 1112 | 1123 | /* inform the clients that the mac address |
| 1113 | 1124 | * has changed |
| @@ -1119,7 +1130,7 @@ static void alb_fasten_mac_swap(struct bonding *bond, struct slave *slave1, · 5 unmodified lines | ||
| 1119 | 1130 | } |
| 1120 | 1131 | |
| 1121 | 1132 | if (SLAVE_IS_OK(slave2)) { |
| 1122 | − alb_send_learning_packets(slave2, slave2->dev->dev_addr); | |
| 1133 | + alb_send_learning_packets(slave2, slave2->dev->dev_addr, false); | |
| 1123 | 1134 | if (bond->alb_info.rlb_enabled) { |
| 1124 | 1135 | /* inform the clients that the mac address |
| 1125 | 1136 | * has changed |
| @@ -1490,6 +1501,8 @@ void bond_alb_monitor(struct work_struct *work) · 364 unmodified lines | ||
| 1490 | 1501 | |
| 1491 | 1502 | /* send learning packets */ |
| 1492 | 1503 | if (bond_info->lp_counter >= BOND_ALB_LP_TICKS(bond)) { |
| 1504 | + bool strict_match; | |
| 1505 | + | |
| 1493 | 1506 | /* change of curr_active_slave involves swapping of mac addresses. |
| 1494 | 1507 | * in order to avoid this swapping from happening while |
| 1495 | 1508 | * sending the learning packets, the curr_slave_lock must be held for |
| @@ -1497,8 +1510,15 @@ void bond_alb_monitor(struct work_struct *work) · 1 unmodified line | ||
| 1497 | 1510 | */ |
| 1498 | 1511 | read_lock(&bond->curr_slave_lock); |
| 1499 | 1512 | |
| 1500 | − bond_for_each_slave_rcu(bond, slave, iter) | |
| 1501 | − alb_send_learning_packets(slave, slave->dev->dev_addr); | |
| 1513 | + bond_for_each_slave_rcu(bond, slave, iter) { | |
| 1514 | + /* If updating current_active, use all currently | |
| 1515 | + * user mac addreses (!strict_match). Otherwise, only | |
| 1516 | + * use mac of the slave device. | |
| 1517 | + */ | |
| 1518 | + strict_match = (slave != bond->curr_active_slave); | |
| 1519 | + alb_send_learning_packets(slave, slave->dev->dev_addr, | |
| 1520 | + strict_match); | |
| 1521 | + } | |
| 1502 | 1522 | |
| 1503 | 1523 | read_unlock(&bond->curr_slave_lock); |
| 1504 | 1524 | |
| @@ -1721,7 +1741,8 @@ void bond_alb_handle_active_change(struct bonding *bond, struct slave *new_slave · 216 unmodified lines | ||
| 1721 | 1741 | } else { |
| 1722 | 1742 | /* set the new_slave to the bond mac address */ |
| 1723 | 1743 | alb_set_slave_mac_addr(new_slave, bond->dev->dev_addr); |
| 1724 | − alb_send_learning_packets(new_slave, bond->dev->dev_addr); | |
| 1744 | + alb_send_learning_packets(new_slave, bond->dev->dev_addr, | |
| 1745 | + false); | |
| 1725 | 1746 | } |
| 1726 | 1747 | |
| 1727 | 1748 | write_lock_bh(&bond->curr_slave_lock); |
| @@ -1764,7 +1785,8 @@ int bond_alb_set_mac_address(struct net_device *bond_dev, void *addr) · 36 unmodified lines | ||
| 1764 | 1785 | alb_set_slave_mac_addr(bond->curr_active_slave, bond_dev->dev_addr); |
| 1765 | 1786 | |
| 1766 | 1787 | read_lock(&bond->lock); |
| 1767 | − alb_send_learning_packets(bond->curr_active_slave, bond_dev->dev_addr); | |
| 1788 | + alb_send_learning_packets(bond->curr_active_slave, | |
| 1789 | + bond_dev->dev_addr, false); | |
| 1768 | 1790 | if (bond->alb_info.rlb_enabled) { |
| 1769 | 1791 | /* inform clients mac address has changed */ |
| 1770 | 1792 | rlb_req_update_slave_clients(bond, bond->curr_active_slave); |
| @@ -2126,10 +2126,10 @@ static bool bond_has_this_ip(struct bonding *bond, __be32 ip) · 2125 unmodified lines | ||
| 2126 | 2126 | */ |
| 2127 | 2127 | static void bond_arp_send(struct net_device *slave_dev, int arp_op, |
| 2128 | 2128 | __be32 dest_ip, __be32 src_ip, |
| 2129 | − struct bond_vlan_tag *inner, | |
| 2130 | − struct bond_vlan_tag *outer) | |
| 2129 | + struct bond_vlan_tag *tags) | |
| 2131 | 2130 | { |
| 2132 | 2131 | struct sk_buff *skb; |
| 2132 | + int i; | |
| 2133 | 2133 | |
| 2134 | 2134 | pr_debug("arp %d on slave %s: dst %pI4 src %pI4\n", |
| 2135 | 2135 | arp_op, slave_dev->name, &dest_ip, &src_ip); |
| @@ -2141,21 +2141,26 @@ static void bond_arp_send(struct net_device *slave_dev, int arp_op, · 5 unmodified lines | ||
| 2141 | 2141 | net_err_ratelimited("ARP packet allocation failed\n"); |
| 2142 | 2142 | return; |
| 2143 | 2143 | } |
| 2144 | − if (outer->vlan_id) { | |
| 2145 | − if (inner->vlan_id) { | |
| 2146 | − pr_debug("inner tag: proto %X vid %X\n", | |
| 2147 | − ntohs(inner->vlan_proto), inner->vlan_id); | |
| 2148 | − skb = __vlan_put_tag(skb, inner->vlan_proto, | |
| 2149 | − inner->vlan_id); | |
| 2150 | − if (!skb) { | |
| 2151 | − net_err_ratelimited("failed to insert inner VLAN tag\n"); | |
| 2152 | − return; | |
| 2153 | − } | |
| 2154 | − } | |
| 2155 | 2144 | |
| 2156 | − pr_debug("outer reg: proto %X vid %X\n", | |
| 2157 | − ntohs(outer->vlan_proto), outer->vlan_id); | |
| 2158 | − skb = vlan_put_tag(skb, outer->vlan_proto, outer->vlan_id); | |
| 2145 | + /* Go through all the tags backwards and add them to the packet */ | |
| 2146 | + for (i = BOND_MAX_VLAN_ENCAP - 1; i > 0; i--) { | |
| 2147 | + if (!tags[i].vlan_id) | |
| 2148 | + continue; | |
| 2149 | + | |
| 2150 | + pr_debug("inner tag: proto %X vid %X\n", | |
| 2151 | + ntohs(tags[i].vlan_proto), tags[i].vlan_id); | |
| 2152 | + skb = __vlan_put_tag(skb, tags[i].vlan_proto, | |
| 2153 | + tags[i].vlan_id); | |
| 2154 | + if (!skb) { | |
| 2155 | + net_err_ratelimited("failed to insert inner VLAN tag\n"); | |
| 2156 | + return; | |
| 2157 | + } | |
| 2158 | + } | |
| 2159 | + /* Set the outer tag */ | |
| 2160 | + if (tags[0].vlan_id) { | |
| 2161 | + pr_debug("outer tag: proto %X vid %X\n", | |
| 2162 | + ntohs(tags[0].vlan_proto), tags[0].vlan_id); | |
| 2163 | + skb = vlan_put_tag(skb, tags[0].vlan_proto, tags[0].vlan_id); | |
| 2159 | 2164 | if (!skb) { |
| 2160 | 2165 | net_err_ratelimited("failed to insert outer VLAN tag\n"); |
| 2161 | 2166 | return; |
| @@ -2164,22 +2169,52 @@ static void bond_arp_send(struct net_device *slave_dev, int arp_op, · 2 unmodified lines | ||
| 2164 | 2169 | arp_xmit(skb); |
| 2165 | 2170 | } |
| 2166 | 2171 | |
| 2172 | +/* Validate the device path between the @start_dev and the @end_dev. | |
| 2173 | + * The path is valid if the @end_dev is reachable through device | |
| 2174 | + * stacking. | |
| 2175 | + * When the path is validated, collect any vlan information in the | |
| 2176 | + * path. | |
| 2177 | + */ | |
| 2178 | +static bool bond_verify_device_path(struct net_device *start_dev, | |
| 2179 | + struct net_device *end_dev, | |
| 2180 | + struct bond_vlan_tag *tags) | |
| 2181 | +{ | |
| 2182 | + struct net_device *upper; | |
| 2183 | + struct list_head *iter; | |
| 2184 | + int idx; | |
| 2185 | + | |
| 2186 | + if (start_dev == end_dev) | |
| 2187 | + return true; | |
| 2188 | + | |
| 2189 | + netdev_for_each_upper_dev_rcu(start_dev, upper, iter) { | |
| 2190 | + if (bond_verify_device_path(upper, end_dev, tags)) { | |
| 2191 | + if (is_vlan_dev(upper)) { | |
| 2192 | + idx = vlan_get_encap_level(upper); | |
| 2193 | + if (idx >= BOND_MAX_VLAN_ENCAP) | |
| 2194 | + return false; | |
| 2195 | + | |
| 2196 | + tags[idx].vlan_proto = | |
| 2197 | + vlan_dev_vlan_proto(upper); | |
| 2198 | + tags[idx].vlan_id = vlan_dev_vlan_id(upper); | |
| 2199 | + } | |
| 2200 | + return true; | |
| 2201 | + } | |
| 2202 | + } | |
| 2203 | + | |
| 2204 | + return false; | |
| 2205 | +} | |
| 2167 | 2206 | |
| 2168 | 2207 | static void bond_arp_send_all(struct bonding *bond, struct slave *slave) |
| 2169 | 2208 | { |
| 2170 | − struct net_device *upper, *vlan_upper; | |
| 2171 | − struct list_head *iter, *vlan_iter; | |
| 2172 | 2209 | struct rtable *rt; |
| 2173 | − struct bond_vlan_tag inner, outer; | |
| 2210 | + struct bond_vlan_tag tags[BOND_MAX_VLAN_ENCAP]; | |
| 2174 | 2211 | __be32 *targets = bond->params.arp_targets, addr; |
| 2175 | 2212 | int i; |
| 2213 | + bool ret; | |
| 2176 | 2214 | |
| 2177 | 2215 | for (i = 0; i < BOND_MAX_ARP_TARGETS && targets[i]; i++) { |
| 2178 | 2216 | pr_debug("basa: target %pI4\n", &targets[i]); |
| 2179 | − inner.vlan_proto = 0; | |
| 2180 | − inner.vlan_id = 0; | |
| 2181 | − outer.vlan_proto = 0; | |
| 2182 | − outer.vlan_id = 0; | |
| 2217 | + memset(tags, 0, sizeof(tags)); | |
| 2183 | 2218 | |
| 2184 | 2219 | /* Find out through which dev should the packet go */ |
| 2185 | 2220 | rt = ip_route_output(dev_net(bond->dev), targets[i], 0, |
| @@ -2192,7 +2227,8 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) · 6 unmodified lines | ||
| 2192 | 2227 | net_warn_ratelimited("%s: no route to arp_ip_target %pI4 and arp_validate is set\n", |
| 2193 | 2228 | bond->dev->name, |
| 2194 | 2229 | &targets[i]); |
| 2195 | − bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], 0, &inner, &outer); | |
| 2230 | + bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], | |
| 2231 | + 0, tags); | |
| 2196 | 2232 | continue; |
| 2197 | 2233 | } |
| 2198 | 2234 | |
| @@ -2201,52 +2237,12 @@ static void bond_arp_send_all(struct bonding *bond, struct slave *slave) · 2 unmodified lines | ||
| 2201 | 2237 | goto found; |
| 2202 | 2238 | |
| 2203 | 2239 | rcu_read_lock(); |
| 2204 | − /* first we search only for vlan devices. for every vlan | |
| 2205 | − * found we verify its upper dev list, searching for the | |
| 2206 | − * rt->dst.dev. If found we save the tag of the vlan and | |
| 2207 | − * proceed to send the packet. | |
| 2208 | − */ | |
| 2209 | − netdev_for_each_all_upper_dev_rcu(bond->dev, vlan_upper, | |
| 2210 | − vlan_iter) { | |
| 2211 | − if (!is_vlan_dev(vlan_upper)) | |
| 2212 | − continue; | |
| 2213 | − | |
| 2214 | − if (vlan_upper == rt->dst.dev) { | |
| 2215 | − outer.vlan_proto = vlan_dev_vlan_proto(vlan_upper); | |
| 2216 | − outer.vlan_id = vlan_dev_vlan_id(vlan_upper); | |
| 2217 | − rcu_read_unlock(); | |
| 2218 | − goto found; | |
| 2219 | − } | |
| 2220 | − netdev_for_each_all_upper_dev_rcu(vlan_upper, upper, | |
| 2221 | − iter) { | |
| 2222 | − if (upper == rt->dst.dev) { | |
| 2223 | − /* If the upper dev is a vlan dev too, | |
| 2224 | − * set the vlan tag to inner tag. | |
| 2225 | − */ | |
| 2226 | − if (is_vlan_dev(upper)) { | |
| 2227 | − inner.vlan_proto = vlan_dev_vlan_proto(upper); | |
| 2228 | − inner.vlan_id = vlan_dev_vlan_id(upper); | |
| 2229 | − } | |
| 2230 | − outer.vlan_proto = vlan_dev_vlan_proto(vlan_upper); | |
| 2231 | − outer.vlan_id = vlan_dev_vlan_id(vlan_upper); | |
| 2232 | − rcu_read_unlock(); | |
| 2233 | − goto found; | |
| 2234 | − } | |
| 2235 | − } | |
| 2236 | − } | |
| 2237 | − | |
| 2238 | − /* if the device we're looking for is not on top of any of | |
| 2239 | − * our upper vlans, then just search for any dev that | |
| 2240 | − * matches, and in case it's a vlan - save the id | |
| 2241 | − */ | |
| 2242 | − netdev_for_each_all_upper_dev_rcu(bond->dev, upper, iter) { | |
| 2243 | − if (upper == rt->dst.dev) { | |
| 2244 | − rcu_read_unlock(); | |
| 2245 | − goto found; | |
| 2246 | − } | |
| 2247 | − } | |
| 2240 | + ret = bond_verify_device_path(bond->dev, rt->dst.dev, tags); | |
| 2248 | 2241 | rcu_read_unlock(); |
| 2249 | 2242 | |
| 2243 | + if (ret) | |
| 2244 | + goto found; | |
| 2245 | + | |
| 2250 | 2246 | /* Not our device - skip */ |
| 2251 | 2247 | pr_debug("%s: no path to arp_ip_target %pI4 via rt.dev %s\n", |
| 2252 | 2248 | bond->dev->name, &targets[i], |
| @@ -2259,7 +2255,7 @@ found: · 6 unmodified lines | ||
| 2259 | 2255 | addr = bond_confirm_addr(rt->dst.dev, targets[i], 0); |
| 2260 | 2256 | ip_rt_put(rt); |
| 2261 | 2257 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], |
| 2262 | − addr, &inner, &outer); | |
| 2258 | + addr, tags); | |
| 2263 | 2259 | } |
| 2264 | 2260 | } |
| 2265 | 2261 | |
| @@ -125,6 +125,7 @@ static const struct bond_opt_value bond_fail_over_mac_tbl[] = { · 124 unmodified lines | ||
| 125 | 125 | static const struct bond_opt_value bond_intmax_tbl[] = { |
| 126 | 126 | { "off", 0, BOND_VALFLAG_DEFAULT}, |
| 127 | 127 | { "maxval", INT_MAX, BOND_VALFLAG_MAX}, |
| 128 | + { NULL, -1, 0} | |
| 128 | 129 | }; |
| 129 | 130 | |
| 130 | 131 | static const struct bond_opt_value bond_lacp_rate_tbl[] = { |
| @@ -36,6 +36,7 @@ · 35 unmodified lines | ||
| 36 | 36 | |
| 37 | 37 | #define bond_version DRV_DESCRIPTION ": v" DRV_VERSION " (" DRV_RELDATE ")\n" |
| 38 | 38 | |
| 39 | +#define BOND_MAX_VLAN_ENCAP 2 | |
| 39 | 40 | #define BOND_MAX_ARP_TARGETS 16 |
| 40 | 41 | |
| 41 | 42 | #define BOND_DEFAULT_MIIMON 100 |
| @@ -14,13 +14,6 @@ config CAN_C_CAN_PLATFORM · 13 unmodified lines | ||
| 14 | 14 | SPEAr1310 and SPEAr320 evaluation boards & TI (www.ti.com) |
| 15 | 15 | boards like am335x, dm814x, dm813x and dm811x. |
| 16 | 16 | |
| 17 | −config CAN_C_CAN_STRICT_FRAME_ORDERING | |
| 18 | − bool "Force a strict RX CAN frame order (may cause frame loss)" | |
| 19 | − ---help--- | |
| 20 | − The RX split buffer prevents packet reordering but can cause packet | |
| 21 | − loss. Only enable this option when you accept to lose CAN frames | |
| 22 | − in favour of getting the received CAN frames in the correct order. | |
| 23 | − | |
| 24 | 17 | config CAN_C_CAN_PCI |
| 25 | 18 | tristate "Generic PCI Bus based C_CAN/D_CAN driver" |
| 26 | 19 | depends on PCI |
| @@ -732,26 +732,12 @@ static u32 c_can_adjust_pending(u32 pend) · 731 unmodified lines | ||
| 732 | 732 | static inline void c_can_rx_object_get(struct net_device *dev, |
| 733 | 733 | struct c_can_priv *priv, u32 obj) |
| 734 | 734 | { |
| 735 | −#ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING | |
| 736 | − if (obj < C_CAN_MSG_RX_LOW_LAST) | |
| 737 | − c_can_object_get(dev, IF_RX, obj, IF_COMM_RCV_LOW); | |
| 738 | − else | |
| 739 | −#endif | |
| 740 | 735 | c_can_object_get(dev, IF_RX, obj, priv->comm_rcv_high); |
| 741 | 736 | } |
| 742 | 737 | |
| 743 | 738 | static inline void c_can_rx_finalize(struct net_device *dev, |
| 744 | 739 | struct c_can_priv *priv, u32 obj) |
| 745 | 740 | { |
| 746 | −#ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING | |
| 747 | − if (obj < C_CAN_MSG_RX_LOW_LAST) | |
| 748 | − priv->rxmasked |= BIT(obj - 1); | |
| 749 | − else if (obj == C_CAN_MSG_RX_LOW_LAST) { | |
| 750 | − priv->rxmasked = 0; | |
| 751 | − /* activate all lower message objects */ | |
| 752 | − c_can_activate_all_lower_rx_msg_obj(dev, IF_RX); | |
| 753 | − } | |
| 754 | −#endif | |
| 755 | 741 | if (priv->type != BOSCH_D_CAN) |
| 756 | 742 | c_can_object_get(dev, IF_RX, obj, IF_COMM_CLR_NEWDAT); |
| 757 | 743 | } |
| @@ -799,9 +785,6 @@ static inline u32 c_can_get_pending(struct c_can_priv *priv) · 41 unmodified lines | ||
| 799 | 785 | { |
| 800 | 786 | u32 pend = priv->read_reg(priv, C_CAN_NEWDAT1_REG); |
| 801 | 787 | |
| 802 | −#ifdef CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING | |
| 803 | − pend &= ~priv->rxmasked; | |
| 804 | −#endif | |
| 805 | 788 | return pend; |
| 806 | 789 | } |
| 807 | 790 | |
| @@ -814,25 +797,6 @@ static inline u32 c_can_get_pending(struct c_can_priv *priv) · 6 unmodified lines | ||
| 814 | 797 | * has arrived. To work-around this issue, we keep two groups of message |
| 815 | 798 | * objects whose partitioning is defined by C_CAN_MSG_OBJ_RX_SPLIT. |
| 816 | 799 | * |
| 817 | − * If CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING = y | |
| 818 | − * | |
| 819 | − * To ensure in-order frame reception we use the following | |
| 820 | − * approach while re-activating a message object to receive further | |
| 821 | − * frames: | |
| 822 | − * - if the current message object number is lower than | |
| 823 | − * C_CAN_MSG_RX_LOW_LAST, do not clear the NEWDAT bit while clearing | |
| 824 | − * the INTPND bit. | |
| 825 | − * - if the current message object number is equal to | |
| 826 | − * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of all lower | |
| 827 | − * receive message objects. | |
| 828 | − * - if the current message object number is greater than | |
| 829 | − * C_CAN_MSG_RX_LOW_LAST then clear the NEWDAT bit of | |
| 830 | − * only this message object. | |
| 831 | − * | |
| 832 | − * This can cause packet loss! | |
| 833 | − * | |
| 834 | − * If CONFIG_CAN_C_CAN_STRICT_FRAME_ORDERING = n | |
| 835 | − * | |
| 836 | 800 | * We clear the newdat bit right away. |
| 837 | 801 | * |
| 838 | 802 | * This can result in packet reordering when the readout is slow. |
| @@ -551,7 +551,7 @@ static int peak_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) · 550 unmodified lines | ||
| 551 | 551 | { |
| 552 | 552 | struct sja1000_priv *priv; |
| 553 | 553 | struct peak_pci_chan *chan; |
| 554 | − struct net_device *dev; | |
| 554 | + struct net_device *dev, *prev_dev; | |
| 555 | 555 | void __iomem *cfg_base, *reg_base; |
| 556 | 556 | u16 sub_sys_id, icr; |
| 557 | 557 | int i, err, channels; |
| @@ -688,11 +688,13 @@ failure_remove_channels: · 130 unmodified lines | ||
| 688 | 688 | writew(0x0, cfg_base + PITA_ICR + 2); |
| 689 | 689 | |
| 690 | 690 | chan = NULL; |
| 691 | − for (dev = pci_get_drvdata(pdev); dev; dev = chan->prev_dev) { | |
| 692 | − unregister_sja1000dev(dev); | |
| 693 | − free_sja1000dev(dev); | |
| 691 | + for (dev = pci_get_drvdata(pdev); dev; dev = prev_dev) { | |
| 694 | 692 | priv = netdev_priv(dev); |
| 695 | 693 | chan = priv->priv; |
| 694 | + prev_dev = chan->prev_dev; | |
| 695 | + | |
| 696 | + unregister_sja1000dev(dev); | |
| 697 | + free_sja1000dev(dev); | |
| 696 | 698 | } |
| 697 | 699 | |
| 698 | 700 | /* free any PCIeC resources too */ |
| @@ -726,10 +728,12 @@ static void peak_pci_remove(struct pci_dev *pdev) · 27 unmodified lines | ||
| 726 | 728 | |
| 727 | 729 | /* Loop over all registered devices */ |
| 728 | 730 | while (1) { |
| 731 | + struct net_device *prev_dev = chan->prev_dev; | |
| 732 | + | |
| 729 | 733 | dev_info(&pdev->dev, "removing device %s\n", dev->name); |
| 730 | 734 | unregister_sja1000dev(dev); |
| 731 | 735 | free_sja1000dev(dev); |
| 732 | − dev = chan->prev_dev; | |
| 736 | + dev = prev_dev; | |
| 733 | 737 | |
| 734 | 738 | if (!dev) { |
| 735 | 739 | /* do that only for first channel */ |
| @@ -35,6 +35,18 @@ source "drivers/net/ethernet/calxeda/Kconfig" · 34 unmodified lines | ||
| 35 | 35 | source "drivers/net/ethernet/chelsio/Kconfig" |
| 36 | 36 | source "drivers/net/ethernet/cirrus/Kconfig" |
| 37 | 37 | source "drivers/net/ethernet/cisco/Kconfig" |
| 38 | + | |
| 39 | +config CX_ECAT | |
| 40 | + tristate "Beckhoff CX5020 EtherCAT master support" | |
| 41 | + depends on PCI | |
| 42 | + ---help--- | |
| 43 | + Driver for EtherCAT master module located on CCAT FPGA | |
| 44 | + that can be found on Beckhoff CX5020, and possibly other of CX | |
| 45 | + Beckhoff CX series industrial PCs. | |
| 46 | + | |
| 47 | + To compile this driver as a module, choose M here. The module | |
| 48 | + will be called ec_bhf. | |
| 49 | + | |
| 38 | 50 | source "drivers/net/ethernet/davicom/Kconfig" |
| 39 | 51 | |
| 40 | 52 | config DNET |
| @@ -21,6 +21,7 @@ obj-$(CONFIG_NET_CALXEDA_XGMAC) += calxeda/ · 20 unmodified lines | ||
| 21 | 21 | obj-$(CONFIG_NET_VENDOR_CHELSIO) += chelsio/ |
| 22 | 22 | obj-$(CONFIG_NET_VENDOR_CIRRUS) += cirrus/ |
| 23 | 23 | obj-$(CONFIG_NET_VENDOR_CISCO) += cisco/ |
| 24 | +obj-$(CONFIG_CX_ECAT) += ec_bhf.o | |
| 24 | 25 | obj-$(CONFIG_DM9000) += davicom/ |
| 25 | 26 | obj-$(CONFIG_DNET) += dnet.o |
| 26 | 27 | obj-$(CONFIG_NET_VENDOR_DEC) += dec/ |
| @@ -5,3 +5,4 @@ · 4 unmodified lines | ||
| 5 | 5 | obj-$(CONFIG_ALTERA_TSE) += altera_tse.o |
| 6 | 6 | altera_tse-objs := altera_tse_main.o altera_tse_ethtool.o \ |
| 7 | 7 | altera_msgdma.o altera_sgdma.o altera_utils.o |
| 8 | +ccflags-y += -D__CHECK_ENDIAN__ | |
| @@ -37,18 +37,16 @@ void msgdma_start_rxdma(struct altera_tse_private *priv) · 36 unmodified lines | ||
| 37 | 37 | void msgdma_reset(struct altera_tse_private *priv) |
| 38 | 38 | { |
| 39 | 39 | int counter; |
| 40 | − struct msgdma_csr *txcsr = | |
| 41 | − (struct msgdma_csr *)priv->tx_dma_csr; | |
| 42 | − struct msgdma_csr *rxcsr = | |
| 43 | − (struct msgdma_csr *)priv->rx_dma_csr; | |
| 44 | 40 | |
| 45 | 41 | /* Reset Rx mSGDMA */ |
| 46 | − iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status); | |
| 47 | − iowrite32(MSGDMA_CSR_CTL_RESET, &rxcsr->control); | |
| 42 | + csrwr32(MSGDMA_CSR_STAT_MASK, priv->rx_dma_csr, | |
| 43 | + msgdma_csroffs(status)); | |
| 44 | + csrwr32(MSGDMA_CSR_CTL_RESET, priv->rx_dma_csr, | |
| 45 | + msgdma_csroffs(control)); | |
| 48 | 46 | |
| 49 | 47 | counter = 0; |
| 50 | 48 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
| 51 | − if (tse_bit_is_clear(&rxcsr->status, | |
| 49 | + if (tse_bit_is_clear(priv->rx_dma_csr, msgdma_csroffs(status), | |
| 52 | 50 | MSGDMA_CSR_STAT_RESETTING)) |
| 53 | 51 | break; |
| 54 | 52 | udelay(1); |
| @@ -59,15 +57,18 @@ void msgdma_reset(struct altera_tse_private *priv) · 4 unmodified lines | ||
| 59 | 57 | "TSE Rx mSGDMA resetting bit never cleared!\n"); |
| 60 | 58 | |
| 61 | 59 | /* clear all status bits */ |
| 62 | − iowrite32(MSGDMA_CSR_STAT_MASK, &rxcsr->status); | |
| 60 | + csrwr32(MSGDMA_CSR_STAT_MASK, priv->rx_dma_csr, msgdma_csroffs(status)); | |
| 63 | 61 | |
| 64 | 62 | /* Reset Tx mSGDMA */ |
| 65 | − iowrite32(MSGDMA_CSR_STAT_MASK, &txcsr->status); | |
| 66 | − iowrite32(MSGDMA_CSR_CTL_RESET, &txcsr->control); | |
| 63 | + csrwr32(MSGDMA_CSR_STAT_MASK, priv->tx_dma_csr, | |
| 64 | + msgdma_csroffs(status)); | |
| 65 | + | |
| 66 | + csrwr32(MSGDMA_CSR_CTL_RESET, priv->tx_dma_csr, | |
| 67 | + msgdma_csroffs(control)); | |
| 67 | 68 | |
| 68 | 69 | counter = 0; |
| 69 | 70 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
| 70 | − if (tse_bit_is_clear(&txcsr->status, | |
| 71 | + if (tse_bit_is_clear(priv->tx_dma_csr, msgdma_csroffs(status), | |
| 71 | 72 | MSGDMA_CSR_STAT_RESETTING)) |
| 72 | 73 | break; |
| 73 | 74 | udelay(1); |
| @@ -78,58 +79,58 @@ void msgdma_reset(struct altera_tse_private *priv) · 4 unmodified lines | ||
| 78 | 79 | "TSE Tx mSGDMA resetting bit never cleared!\n"); |
| 79 | 80 | |
| 80 | 81 | /* clear all status bits */ |
| 81 | − iowrite32(MSGDMA_CSR_STAT_MASK, &txcsr->status); | |
| 82 | + csrwr32(MSGDMA_CSR_STAT_MASK, priv->tx_dma_csr, msgdma_csroffs(status)); | |
| 82 | 83 | } |
| 83 | 84 | |
| 84 | 85 | void msgdma_disable_rxirq(struct altera_tse_private *priv) |
| 85 | 86 | { |
| 86 | − struct msgdma_csr *csr = priv->rx_dma_csr; | |
| 87 | − tse_clear_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 87 | + tse_clear_bit(priv->rx_dma_csr, msgdma_csroffs(control), | |
| 88 | + MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 88 | 89 | } |
| 89 | 90 | |
| 90 | 91 | void msgdma_enable_rxirq(struct altera_tse_private *priv) |
| 91 | 92 | { |
| 92 | − struct msgdma_csr *csr = priv->rx_dma_csr; | |
| 93 | − tse_set_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 93 | + tse_set_bit(priv->rx_dma_csr, msgdma_csroffs(control), | |
| 94 | + MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 94 | 95 | } |
| 95 | 96 | |
| 96 | 97 | void msgdma_disable_txirq(struct altera_tse_private *priv) |
| 97 | 98 | { |
| 98 | − struct msgdma_csr *csr = priv->tx_dma_csr; | |
| 99 | − tse_clear_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 99 | + tse_clear_bit(priv->tx_dma_csr, msgdma_csroffs(control), | |
| 100 | + MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 100 | 101 | } |
| 101 | 102 | |
| 102 | 103 | void msgdma_enable_txirq(struct altera_tse_private *priv) |
| 103 | 104 | { |
| 104 | − struct msgdma_csr *csr = priv->tx_dma_csr; | |
| 105 | − tse_set_bit(&csr->control, MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 105 | + tse_set_bit(priv->tx_dma_csr, msgdma_csroffs(control), | |
| 106 | + MSGDMA_CSR_CTL_GLOBAL_INTR); | |
| 106 | 107 | } |
| 107 | 108 | |
| 108 | 109 | void msgdma_clear_rxirq(struct altera_tse_private *priv) |
| 109 | 110 | { |
| 110 | − struct msgdma_csr *csr = priv->rx_dma_csr; | |
| 111 | − iowrite32(MSGDMA_CSR_STAT_IRQ, &csr->status); | |
| 111 | + csrwr32(MSGDMA_CSR_STAT_IRQ, priv->rx_dma_csr, msgdma_csroffs(status)); | |
| 112 | 112 | } |
| 113 | 113 | |
| 114 | 114 | void msgdma_clear_txirq(struct altera_tse_private *priv) |
| 115 | 115 | { |
| 116 | − struct msgdma_csr *csr = priv->tx_dma_csr; | |
| 117 | − iowrite32(MSGDMA_CSR_STAT_IRQ, &csr->status); | |
| 116 | + csrwr32(MSGDMA_CSR_STAT_IRQ, priv->tx_dma_csr, msgdma_csroffs(status)); | |
| 118 | 117 | } |
| 119 | 118 | |
| 120 | 119 | /* return 0 to indicate transmit is pending */ |
| 121 | 120 | int msgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) |
| 122 | 121 | { |
| 123 | − struct msgdma_extended_desc *desc = priv->tx_dma_desc; | |
| 124 | − | |
| 125 | − iowrite32(lower_32_bits(buffer->dma_addr), &desc->read_addr_lo); | |
| 126 | − iowrite32(upper_32_bits(buffer->dma_addr), &desc->read_addr_hi); | |
| 127 | − iowrite32(0, &desc->write_addr_lo); | |
| 128 | − iowrite32(0, &desc->write_addr_hi); | |
| 129 | − iowrite32(buffer->len, &desc->len); | |
| 130 | − iowrite32(0, &desc->burst_seq_num); | |
| 131 | − iowrite32(MSGDMA_DESC_TX_STRIDE, &desc->stride); | |
| 132 | − iowrite32(MSGDMA_DESC_CTL_TX_SINGLE, &desc->control); | |
| 122 | + csrwr32(lower_32_bits(buffer->dma_addr), priv->tx_dma_desc, | |
| 123 | + msgdma_descroffs(read_addr_lo)); | |
| 124 | + csrwr32(upper_32_bits(buffer->dma_addr), priv->tx_dma_desc, | |
| 125 | + msgdma_descroffs(read_addr_hi)); | |
| 126 | + csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(write_addr_lo)); | |
| 127 | + csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(write_addr_hi)); | |
| 128 | + csrwr32(buffer->len, priv->tx_dma_desc, msgdma_descroffs(len)); | |
| 129 | + csrwr32(0, priv->tx_dma_desc, msgdma_descroffs(burst_seq_num)); | |
| 130 | + csrwr32(MSGDMA_DESC_TX_STRIDE, priv->tx_dma_desc, | |
| 131 | + msgdma_descroffs(stride)); | |
| 132 | + csrwr32(MSGDMA_DESC_CTL_TX_SINGLE, priv->tx_dma_desc, | |
| 133 | + msgdma_descroffs(control)); | |
| 133 | 134 | return 0; |
| 134 | 135 | } |
| 135 | 136 | |
| @@ -138,17 +139,16 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) · 2 unmodified lines | ||
| 138 | 139 | u32 ready = 0; |
| 139 | 140 | u32 inuse; |
| 140 | 141 | u32 status; |
| 141 | − struct msgdma_csr *txcsr = | |
| 142 | − (struct msgdma_csr *)priv->tx_dma_csr; | |
| 143 | 142 | |
| 144 | 143 | /* Get number of sent descriptors */ |
| 145 | − inuse = ioread32(&txcsr->rw_fill_level) & 0xffff; | |
| 144 | + inuse = csrrd32(priv->tx_dma_csr, msgdma_csroffs(rw_fill_level)) | |
| 145 | + & 0xffff; | |
| 146 | 146 | |
| 147 | 147 | if (inuse) { /* Tx FIFO is not empty */ |
| 148 | 148 | ready = priv->tx_prod - priv->tx_cons - inuse - 1; |
| 149 | 149 | } else { |
| 150 | 150 | /* Check for buffered last packet */ |
| 151 | − status = ioread32(&txcsr->status); | |
| 151 | + status = csrrd32(priv->tx_dma_csr, msgdma_csroffs(status)); | |
| 152 | 152 | if (status & MSGDMA_CSR_STAT_BUSY) |
| 153 | 153 | ready = priv->tx_prod - priv->tx_cons - 1; |
| 154 | 154 | else |
| @@ -162,7 +162,6 @@ u32 msgdma_tx_completions(struct altera_tse_private *priv) · 7 unmodified lines | ||
| 162 | 162 | void msgdma_add_rx_desc(struct altera_tse_private *priv, |
| 163 | 163 | struct tse_buffer *rxbuffer) |
| 164 | 164 | { |
| 165 | − struct msgdma_extended_desc *desc = priv->rx_dma_desc; | |
| 166 | 165 | u32 len = priv->rx_dma_buf_sz; |
| 167 | 166 | dma_addr_t dma_addr = rxbuffer->dma_addr; |
| 168 | 167 | u32 control = (MSGDMA_DESC_CTL_END_ON_EOP |
| @@ -172,14 +171,16 @@ void msgdma_add_rx_desc(struct altera_tse_private *priv, · 3 unmodified lines | ||
| 172 | 171 | | MSGDMA_DESC_CTL_TR_ERR_IRQ |
| 173 | 172 | | MSGDMA_DESC_CTL_GO); |
| 174 | 173 | |
| 175 | − iowrite32(0, &desc->read_addr_lo); | |
| 176 | − iowrite32(0, &desc->read_addr_hi); | |
| 177 | − iowrite32(lower_32_bits(dma_addr), &desc->write_addr_lo); | |
| 178 | − iowrite32(upper_32_bits(dma_addr), &desc->write_addr_hi); | |
| 179 | − iowrite32(len, &desc->len); | |
| 180 | − iowrite32(0, &desc->burst_seq_num); | |
| 181 | − iowrite32(0x00010001, &desc->stride); | |
| 182 | − iowrite32(control, &desc->control); | |
| 174 | + csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(read_addr_lo)); | |
| 175 | + csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(read_addr_hi)); | |
| 176 | + csrwr32(lower_32_bits(dma_addr), priv->rx_dma_desc, | |
| 177 | + msgdma_descroffs(write_addr_lo)); | |
| 178 | + csrwr32(upper_32_bits(dma_addr), priv->rx_dma_desc, | |
| 179 | + msgdma_descroffs(write_addr_hi)); | |
| 180 | + csrwr32(len, priv->rx_dma_desc, msgdma_descroffs(len)); | |
| 181 | + csrwr32(0, priv->rx_dma_desc, msgdma_descroffs(burst_seq_num)); | |
| 182 | + csrwr32(0x00010001, priv->rx_dma_desc, msgdma_descroffs(stride)); | |
| 183 | + csrwr32(control, priv->rx_dma_desc, msgdma_descroffs(control)); | |
| 183 | 184 | } |
| 184 | 185 | |
| 185 | 186 | /* status is returned on upper 16 bits, |
| @@ -190,14 +191,13 @@ u32 msgdma_rx_status(struct altera_tse_private *priv) · 4 unmodified lines | ||
| 190 | 191 | u32 rxstatus = 0; |
| 191 | 192 | u32 pktlength; |
| 192 | 193 | u32 pktstatus; |
| 193 | − struct msgdma_csr *rxcsr = | |
| 194 | − (struct msgdma_csr *)priv->rx_dma_csr; | |
| 195 | − struct msgdma_response *rxresp = | |
| 196 | − (struct msgdma_response *)priv->rx_dma_resp; | |
| 197 | − | |
| 198 | − if (ioread32(&rxcsr->resp_fill_level) & 0xffff) { | |
| 199 | − pktlength = ioread32(&rxresp->bytes_transferred); | |
| 200 | − pktstatus = ioread32(&rxresp->status); | |
| 194 | + | |
| 195 | + if (csrrd32(priv->rx_dma_csr, msgdma_csroffs(resp_fill_level)) | |
| 196 | + & 0xffff) { | |
| 197 | + pktlength = csrrd32(priv->rx_dma_resp, | |
| 198 | + msgdma_respoffs(bytes_transferred)); | |
| 199 | + pktstatus = csrrd32(priv->rx_dma_resp, | |
| 200 | + msgdma_respoffs(status)); | |
| 201 | 201 | rxstatus = pktstatus; |
| 202 | 202 | rxstatus = rxstatus << 16; |
| 203 | 203 | rxstatus |= (pktlength & 0xffff); |
| @@ -17,15 +17,6 @@ · 16 unmodified lines | ||
| 17 | 17 | #ifndef __ALTERA_MSGDMAHW_H__ |
| 18 | 18 | #define __ALTERA_MSGDMAHW_H__ |
| 19 | 19 | |
| 20 | −/* mSGDMA standard descriptor format | |
| 21 | − */ | |
| 22 | −struct msgdma_desc { | |
| 23 | − u32 read_addr; /* data buffer source address */ | |
| 24 | − u32 write_addr; /* data buffer destination address */ | |
| 25 | − u32 len; /* the number of bytes to transfer per descriptor */ | |
| 26 | − u32 control; /* characteristics of the transfer */ | |
| 27 | −}; | |
| 28 | − | |
| 29 | 20 | /* mSGDMA extended descriptor format |
| 30 | 21 | */ |
| 31 | 22 | struct msgdma_extended_desc { |
| @@ -159,6 +150,10 @@ struct msgdma_response { · 127 unmodified lines | ||
| 159 | 150 | u32 status; |
| 160 | 151 | }; |
| 161 | 152 | |
| 153 | +#define msgdma_respoffs(a) (offsetof(struct msgdma_response, a)) | |
| 154 | +#define msgdma_csroffs(a) (offsetof(struct msgdma_csr, a)) | |
| 155 | +#define msgdma_descroffs(a) (offsetof(struct msgdma_extended_desc, a)) | |
| 156 | + | |
| 162 | 157 | /* mSGDMA response register bit definitions |
| 163 | 158 | */ |
| 164 | 159 | #define MSGDMA_RESP_EARLY_TERM BIT(8) |
| @@ -20,8 +20,8 @@ · 19 unmodified lines | ||
| 20 | 20 | #include "altera_sgdmahw.h" |
| 21 | 21 | #include "altera_sgdma.h" |
| 22 | 22 | |
| 23 | −static void sgdma_setup_descrip(struct sgdma_descrip *desc, | |
| 24 | − struct sgdma_descrip *ndesc, | |
| 23 | +static void sgdma_setup_descrip(struct sgdma_descrip __iomem *desc, | |
| 24 | + struct sgdma_descrip __iomem *ndesc, | |
| 25 | 25 | dma_addr_t ndesc_phys, |
| 26 | 26 | dma_addr_t raddr, |
| 27 | 27 | dma_addr_t waddr, |
| @@ -31,17 +31,17 @@ static void sgdma_setup_descrip(struct sgdma_descrip *desc, · 3 unmodified lines | ||
| 31 | 31 | int wfixed); |
| 32 | 32 | |
| 33 | 33 | static int sgdma_async_write(struct altera_tse_private *priv, |
| 34 | − struct sgdma_descrip *desc); | |
| 34 | + struct sgdma_descrip __iomem *desc); | |
| 35 | 35 | |
| 36 | 36 | static int sgdma_async_read(struct altera_tse_private *priv); |
| 37 | 37 | |
| 38 | 38 | static dma_addr_t |
| 39 | 39 | sgdma_txphysaddr(struct altera_tse_private *priv, |
| 40 | − struct sgdma_descrip *desc); | |
| 40 | + struct sgdma_descrip __iomem *desc); | |
| 41 | 41 | |
| 42 | 42 | static dma_addr_t |
| 43 | 43 | sgdma_rxphysaddr(struct altera_tse_private *priv, |
| 44 | − struct sgdma_descrip *desc); | |
| 44 | + struct sgdma_descrip __iomem *desc); | |
| 45 | 45 | |
| 46 | 46 | static int sgdma_txbusy(struct altera_tse_private *priv); |
| 47 | 47 | |
| @@ -79,7 +79,8 @@ int sgdma_initialize(struct altera_tse_private *priv) · 31 unmodified lines | ||
| 79 | 79 | priv->rxdescphys = (dma_addr_t) 0; |
| 80 | 80 | priv->txdescphys = (dma_addr_t) 0; |
| 81 | 81 | |
| 82 | − priv->rxdescphys = dma_map_single(priv->device, priv->rx_dma_desc, | |
| 82 | + priv->rxdescphys = dma_map_single(priv->device, | |
| 83 | + (void __force *)priv->rx_dma_desc, | |
| 83 | 84 | priv->rxdescmem, DMA_BIDIRECTIONAL); |
| 84 | 85 | |
| 85 | 86 | if (dma_mapping_error(priv->device, priv->rxdescphys)) { |
| @@ -88,7 +89,8 @@ int sgdma_initialize(struct altera_tse_private *priv) · 2 unmodified lines | ||
| 88 | 89 | return -EINVAL; |
| 89 | 90 | } |
| 90 | 91 | |
| 91 | − priv->txdescphys = dma_map_single(priv->device, priv->tx_dma_desc, | |
| 92 | + priv->txdescphys = dma_map_single(priv->device, | |
| 93 | + (void __force *)priv->tx_dma_desc, | |
| 92 | 94 | priv->txdescmem, DMA_TO_DEVICE); |
| 93 | 95 | |
| 94 | 96 | if (dma_mapping_error(priv->device, priv->txdescphys)) { |
| @@ -98,8 +100,8 @@ int sgdma_initialize(struct altera_tse_private *priv) · 3 unmodified lines | ||
| 98 | 100 | } |
| 99 | 101 | |
| 100 | 102 | /* Initialize descriptor memory to all 0's, sync memory to cache */ |
| 101 | − memset(priv->tx_dma_desc, 0, priv->txdescmem); | |
| 102 | − memset(priv->rx_dma_desc, 0, priv->rxdescmem); | |
| 103 | + memset_io(priv->tx_dma_desc, 0, priv->txdescmem); | |
| 104 | + memset_io(priv->rx_dma_desc, 0, priv->rxdescmem); | |
| 103 | 105 | |
| 104 | 106 | dma_sync_single_for_device(priv->device, priv->txdescphys, |
| 105 | 107 | priv->txdescmem, DMA_TO_DEVICE); |
| @@ -126,22 +128,15 @@ void sgdma_uninitialize(struct altera_tse_private *priv) · 20 unmodified lines | ||
| 126 | 128 | */ |
| 127 | 129 | void sgdma_reset(struct altera_tse_private *priv) |
| 128 | 130 | { |
| 129 | − u32 *ptxdescripmem = (u32 *)priv->tx_dma_desc; | |
| 130 | − u32 txdescriplen = priv->txdescmem; | |
| 131 | − u32 *prxdescripmem = (u32 *)priv->rx_dma_desc; | |
| 132 | − u32 rxdescriplen = priv->rxdescmem; | |
| 133 | − struct sgdma_csr *ptxsgdma = (struct sgdma_csr *)priv->tx_dma_csr; | |
| 134 | − struct sgdma_csr *prxsgdma = (struct sgdma_csr *)priv->rx_dma_csr; | |
| 135 | − | |
| 136 | 131 | /* Initialize descriptor memory to 0 */ |
| 137 | − memset(ptxdescripmem, 0, txdescriplen); | |
| 138 | − memset(prxdescripmem, 0, rxdescriplen); | |
| 132 | + memset_io(priv->tx_dma_desc, 0, priv->txdescmem); | |
| 133 | + memset_io(priv->rx_dma_desc, 0, priv->rxdescmem); | |
| 139 | 134 | |
| 140 | − iowrite32(SGDMA_CTRLREG_RESET, &ptxsgdma->control); | |
| 141 | − iowrite32(0, &ptxsgdma->control); | |
| 135 | + csrwr32(SGDMA_CTRLREG_RESET, priv->tx_dma_csr, sgdma_csroffs(control)); | |
| 136 | + csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control)); | |
| 142 | 137 | |
| 143 | − iowrite32(SGDMA_CTRLREG_RESET, &prxsgdma->control); | |
| 144 | − iowrite32(0, &prxsgdma->control); | |
| 138 | + csrwr32(SGDMA_CTRLREG_RESET, priv->rx_dma_csr, sgdma_csroffs(control)); | |
| 139 | + csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control)); | |
| 145 | 140 | } |
| 146 | 141 | |
| 147 | 142 | /* For SGDMA, interrupts remain enabled after initially enabling, |
| @@ -167,14 +162,14 @@ void sgdma_disable_txirq(struct altera_tse_private *priv) · 19 unmodified lines | ||
| 167 | 162 | |
| 168 | 163 | void sgdma_clear_rxirq(struct altera_tse_private *priv) |
| 169 | 164 | { |
| 170 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | |
| 171 | − tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); | |
| 165 | + tse_set_bit(priv->rx_dma_csr, sgdma_csroffs(control), | |
| 166 | + SGDMA_CTRLREG_CLRINT); | |
| 172 | 167 | } |
| 173 | 168 | |
| 174 | 169 | void sgdma_clear_txirq(struct altera_tse_private *priv) |
| 175 | 170 | { |
| 176 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | |
| 177 | − tse_set_bit(&csr->control, SGDMA_CTRLREG_CLRINT); | |
| 171 | + tse_set_bit(priv->tx_dma_csr, sgdma_csroffs(control), | |
| 172 | + SGDMA_CTRLREG_CLRINT); | |
| 178 | 173 | } |
| 179 | 174 | |
| 180 | 175 | /* transmits buffer through SGDMA. Returns number of buffers |
| @@ -184,12 +179,11 @@ void sgdma_clear_txirq(struct altera_tse_private *priv) · 3 unmodified lines | ||
| 184 | 179 | */ |
| 185 | 180 | int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) |
| 186 | 181 | { |
| 187 | − int pktstx = 0; | |
| 188 | − struct sgdma_descrip *descbase = | |
| 189 | − (struct sgdma_descrip *)priv->tx_dma_desc; | |
| 182 | + struct sgdma_descrip __iomem *descbase = | |
| 183 | + (struct sgdma_descrip __iomem *)priv->tx_dma_desc; | |
| 190 | 184 | |
| 191 | − struct sgdma_descrip *cdesc = &descbase[0]; | |
| 192 | − struct sgdma_descrip *ndesc = &descbase[1]; | |
| 185 | + struct sgdma_descrip __iomem *cdesc = &descbase[0]; | |
| 186 | + struct sgdma_descrip __iomem *ndesc = &descbase[1]; | |
| 193 | 187 | |
| 194 | 188 | /* wait 'til the tx sgdma is ready for the next transmit request */ |
| 195 | 189 | if (sgdma_txbusy(priv)) |
| @@ -205,7 +199,7 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) · 9 unmodified lines | ||
| 205 | 199 | 0, /* read fixed */ |
| 206 | 200 | SGDMA_CONTROL_WR_FIXED); /* Generate SOP */ |
| 207 | 201 | |
| 208 | − pktstx = sgdma_async_write(priv, cdesc); | |
| 202 | + sgdma_async_write(priv, cdesc); | |
| 209 | 203 | |
| 210 | 204 | /* enqueue the request to the pending transmit queue */ |
| 211 | 205 | queue_tx(priv, buffer); |
| @@ -219,10 +213,10 @@ int sgdma_tx_buffer(struct altera_tse_private *priv, struct tse_buffer *buffer) · 7 unmodified lines | ||
| 219 | 213 | u32 sgdma_tx_completions(struct altera_tse_private *priv) |
| 220 | 214 | { |
| 221 | 215 | u32 ready = 0; |
| 222 | − struct sgdma_descrip *desc = (struct sgdma_descrip *)priv->tx_dma_desc; | |
| 223 | 216 | |
| 224 | 217 | if (!sgdma_txbusy(priv) && |
| 225 | − ((desc->control & SGDMA_CONTROL_HW_OWNED) == 0) && | |
| 218 | + ((csrrd8(priv->tx_dma_desc, sgdma_descroffs(control)) | |
| 219 | + & SGDMA_CONTROL_HW_OWNED) == 0) && | |
| 226 | 220 | (dequeue_tx(priv))) { |
| 227 | 221 | ready = 1; |
| 228 | 222 | } |
| @@ -246,32 +240,31 @@ void sgdma_add_rx_desc(struct altera_tse_private *priv, · 17 unmodified lines | ||
| 246 | 240 | */ |
| 247 | 241 | u32 sgdma_rx_status(struct altera_tse_private *priv) |
| 248 | 242 | { |
| 249 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | |
| 250 | − struct sgdma_descrip *base = (struct sgdma_descrip *)priv->rx_dma_desc; | |
| 251 | − struct sgdma_descrip *desc = NULL; | |
| 252 | − int pktsrx; | |
| 253 | − unsigned int rxstatus = 0; | |
| 254 | − unsigned int pktlength = 0; | |
| 255 | − unsigned int pktstatus = 0; | |
| 243 | + struct sgdma_descrip __iomem *base = | |
| 244 | + (struct sgdma_descrip __iomem *)priv->rx_dma_desc; | |
| 245 | + struct sgdma_descrip __iomem *desc = NULL; | |
| 256 | 246 | struct tse_buffer *rxbuffer = NULL; |
| 247 | + unsigned int rxstatus = 0; | |
| 257 | 248 | |
| 258 | − u32 sts = ioread32(&csr->status); | |
| 249 | + u32 sts = csrrd32(priv->rx_dma_csr, sgdma_csroffs(status)); | |
| 259 | 250 | |
| 260 | 251 | desc = &base[0]; |
| 261 | 252 | if (sts & SGDMA_STSREG_EOP) { |
| 253 | + unsigned int pktlength = 0; | |
| 254 | + unsigned int pktstatus = 0; | |
| 262 | 255 | dma_sync_single_for_cpu(priv->device, |
| 263 | 256 | priv->rxdescphys, |
| 264 | 257 | priv->sgdmadesclen, |
| 265 | 258 | DMA_FROM_DEVICE); |
| 266 | 259 | |
| 267 | − pktlength = desc->bytes_xferred; | |
| 268 | − pktstatus = desc->status & 0x3f; | |
| 269 | − rxstatus = pktstatus; | |
| 260 | + pktlength = csrrd16(desc, sgdma_descroffs(bytes_xferred)); | |
| 261 | + pktstatus = csrrd8(desc, sgdma_descroffs(status)); | |
| 262 | + rxstatus = pktstatus & ~SGDMA_STATUS_EOP; | |
| 270 | 263 | rxstatus = rxstatus << 16; |
| 271 | 264 | rxstatus |= (pktlength & 0xffff); |
| 272 | 265 | |
| 273 | 266 | if (rxstatus) { |
| 274 | − desc->status = 0; | |
| 267 | + csrwr8(0, desc, sgdma_descroffs(status)); | |
| 275 | 268 | |
| 276 | 269 | rxbuffer = dequeue_rx(priv); |
| 277 | 270 | if (rxbuffer == NULL) |
| @@ -279,12 +272,12 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) · 1 unmodified line | ||
| 279 | 272 | "sgdma rx and rx queue empty!\n"); |
| 280 | 273 | |
| 281 | 274 | /* Clear control */ |
| 282 | − iowrite32(0, &csr->control); | |
| 275 | + csrwr32(0, priv->rx_dma_csr, sgdma_csroffs(control)); | |
| 283 | 276 | /* clear status */ |
| 284 | − iowrite32(0xf, &csr->status); | |
| 277 | + csrwr32(0xf, priv->rx_dma_csr, sgdma_csroffs(status)); | |
| 285 | 278 | |
| 286 | 279 | /* kick the rx sgdma after reaping this descriptor */ |
| 287 | − pktsrx = sgdma_async_read(priv); | |
| 280 | + sgdma_async_read(priv); | |
| 288 | 281 | |
| 289 | 282 | } else { |
| 290 | 283 | /* If the SGDMA indicated an end of packet on recv, |
| @@ -298,10 +291,11 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) · 7 unmodified lines | ||
| 298 | 291 | */ |
| 299 | 292 | netdev_err(priv->dev, |
| 300 | 293 | "SGDMA RX Error Info: %x, %x, %x\n", |
| 301 | − sts, desc->status, rxstatus); | |
| 294 | + sts, csrrd8(desc, sgdma_descroffs(status)), | |
| 295 | + rxstatus); | |
| 302 | 296 | } |
| 303 | 297 | } else if (sts == 0) { |
| 304 | − pktsrx = sgdma_async_read(priv); | |
| 298 | + sgdma_async_read(priv); | |
| 305 | 299 | } |
| 306 | 300 | |
| 307 | 301 | return rxstatus; |
| @@ -309,8 +303,8 @@ u32 sgdma_rx_status(struct altera_tse_private *priv) · 1 unmodified line | ||
| 309 | 303 | |
| 310 | 304 | |
| 311 | 305 | /* Private functions */ |
| 312 | −static void sgdma_setup_descrip(struct sgdma_descrip *desc, | |
| 313 | − struct sgdma_descrip *ndesc, | |
| 306 | +static void sgdma_setup_descrip(struct sgdma_descrip __iomem *desc, | |
| 307 | + struct sgdma_descrip __iomem *ndesc, | |
| 314 | 308 | dma_addr_t ndesc_phys, |
| 315 | 309 | dma_addr_t raddr, |
| 316 | 310 | dma_addr_t waddr, |
| @@ -320,27 +314,30 @@ static void sgdma_setup_descrip(struct sgdma_descrip *desc, · 3 unmodified lines | ||
| 320 | 314 | int wfixed) |
| 321 | 315 | { |
| 322 | 316 | /* Clear the next descriptor as not owned by hardware */ |
| 323 | − u32 ctrl = ndesc->control; | |
| 317 | + | |
| 318 | + u32 ctrl = csrrd8(ndesc, sgdma_descroffs(control)); | |
| 324 | 319 | ctrl &= ~SGDMA_CONTROL_HW_OWNED; |
| 325 | − ndesc->control = ctrl; | |
| 320 | + csrwr8(ctrl, ndesc, sgdma_descroffs(control)); | |
| 326 | 321 | |
| 327 | − ctrl = 0; | |
| 328 | 322 | ctrl = SGDMA_CONTROL_HW_OWNED; |
| 329 | 323 | ctrl |= generate_eop; |
| 330 | 324 | ctrl |= rfixed; |
| 331 | 325 | ctrl |= wfixed; |
| 332 | 326 | |
| 333 | 327 | /* Channel is implicitly zero, initialized to 0 by default */ |
| 334 | − | |
| 335 | − desc->raddr = raddr; | |
| 336 | − desc->waddr = waddr; | |
| 337 | − desc->next = lower_32_bits(ndesc_phys); | |
| 338 | − desc->control = ctrl; | |
| 339 | − desc->status = 0; | |
| 340 | − desc->rburst = 0; | |
| 341 | − desc->wburst = 0; | |
| 342 | − desc->bytes = length; | |
| 343 | − desc->bytes_xferred = 0; | |
| 328 | + csrwr32(lower_32_bits(raddr), desc, sgdma_descroffs(raddr)); | |
| 329 | + csrwr32(lower_32_bits(waddr), desc, sgdma_descroffs(waddr)); | |
| 330 | + | |
| 331 | + csrwr32(0, desc, sgdma_descroffs(pad1)); | |
| 332 | + csrwr32(0, desc, sgdma_descroffs(pad2)); | |
| 333 | + csrwr32(lower_32_bits(ndesc_phys), desc, sgdma_descroffs(next)); | |
| 334 | + | |
| 335 | + csrwr8(ctrl, desc, sgdma_descroffs(control)); | |
| 336 | + csrwr8(0, desc, sgdma_descroffs(status)); | |
| 337 | + csrwr8(0, desc, sgdma_descroffs(wburst)); | |
| 338 | + csrwr8(0, desc, sgdma_descroffs(rburst)); | |
| 339 | + csrwr16(length, desc, sgdma_descroffs(bytes)); | |
| 340 | + csrwr16(0, desc, sgdma_descroffs(bytes_xferred)); | |
| 344 | 341 | } |
| 345 | 342 | |
| 346 | 343 | /* If hardware is busy, don't restart async read. |
| @@ -351,12 +348,11 @@ static void sgdma_setup_descrip(struct sgdma_descrip *desc, · 4 unmodified lines | ||
| 351 | 348 | */ |
| 352 | 349 | static int sgdma_async_read(struct altera_tse_private *priv) |
| 353 | 350 | { |
| 354 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | |
| 355 | − struct sgdma_descrip *descbase = | |
| 356 | − (struct sgdma_descrip *)priv->rx_dma_desc; | |
| 351 | + struct sgdma_descrip __iomem *descbase = | |
| 352 | + (struct sgdma_descrip __iomem *)priv->rx_dma_desc; | |
| 357 | 353 | |
| 358 | − struct sgdma_descrip *cdesc = &descbase[0]; | |
| 359 | − struct sgdma_descrip *ndesc = &descbase[1]; | |
| 354 | + struct sgdma_descrip __iomem *cdesc = &descbase[0]; | |
| 355 | + struct sgdma_descrip __iomem *ndesc = &descbase[1]; | |
| 360 | 356 | |
| 361 | 357 | struct tse_buffer *rxbuffer = NULL; |
| 362 | 358 | |
| @@ -382,11 +378,13 @@ static int sgdma_async_read(struct altera_tse_private *priv) · 19 unmodified lines | ||
| 382 | 378 | priv->sgdmadesclen, |
| 383 | 379 | DMA_TO_DEVICE); |
| 384 | 380 | |
| 385 | − iowrite32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), | |
| 386 | − &csr->next_descrip); | |
| 381 | + csrwr32(lower_32_bits(sgdma_rxphysaddr(priv, cdesc)), | |
| 382 | + priv->rx_dma_csr, | |
| 383 | + sgdma_csroffs(next_descrip)); | |
| 387 | 384 | |
| 388 | − iowrite32((priv->rxctrlreg | SGDMA_CTRLREG_START), | |
| 389 | − &csr->control); | |
| 385 | + csrwr32((priv->rxctrlreg | SGDMA_CTRLREG_START), | |
| 386 | + priv->rx_dma_csr, | |
| 387 | + sgdma_csroffs(control)); | |
| 390 | 388 | |
| 391 | 389 | return 1; |
| 392 | 390 | } |
| @@ -395,32 +393,32 @@ static int sgdma_async_read(struct altera_tse_private *priv) · 2 unmodified lines | ||
| 395 | 393 | } |
| 396 | 394 | |
| 397 | 395 | static int sgdma_async_write(struct altera_tse_private *priv, |
| 398 | − struct sgdma_descrip *desc) | |
| 396 | + struct sgdma_descrip __iomem *desc) | |
| 399 | 397 | { |
| 400 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | |
| 401 | − | |
| 402 | 398 | if (sgdma_txbusy(priv)) |
| 403 | 399 | return 0; |
| 404 | 400 | |
| 405 | 401 | /* clear control and status */ |
| 406 | − iowrite32(0, &csr->control); | |
| 407 | − iowrite32(0x1f, &csr->status); | |
| 402 | + csrwr32(0, priv->tx_dma_csr, sgdma_csroffs(control)); | |
| 403 | + csrwr32(0x1f, priv->tx_dma_csr, sgdma_csroffs(status)); | |
| 408 | 404 | |
| 409 | 405 | dma_sync_single_for_device(priv->device, priv->txdescphys, |
| 410 | 406 | priv->sgdmadesclen, DMA_TO_DEVICE); |
| 411 | 407 | |
| 412 | − iowrite32(lower_32_bits(sgdma_txphysaddr(priv, desc)), | |
| 413 | − &csr->next_descrip); | |
| 408 | + csrwr32(lower_32_bits(sgdma_txphysaddr(priv, desc)), | |
| 409 | + priv->tx_dma_csr, | |
| 410 | + sgdma_csroffs(next_descrip)); | |
| 414 | 411 | |
| 415 | − iowrite32((priv->txctrlreg | SGDMA_CTRLREG_START), | |
| 416 | − &csr->control); | |
| 412 | + csrwr32((priv->txctrlreg | SGDMA_CTRLREG_START), | |
| 413 | + priv->tx_dma_csr, | |
| 414 | + sgdma_csroffs(control)); | |
| 417 | 415 | |
| 418 | 416 | return 1; |
| 419 | 417 | } |
| 420 | 418 | |
| 421 | 419 | static dma_addr_t |
| 422 | 420 | sgdma_txphysaddr(struct altera_tse_private *priv, |
| 423 | − struct sgdma_descrip *desc) | |
| 421 | + struct sgdma_descrip __iomem *desc) | |
| 424 | 422 | { |
| 425 | 423 | dma_addr_t paddr = priv->txdescmem_busaddr; |
| 426 | 424 | uintptr_t offs = (uintptr_t)desc - (uintptr_t)priv->tx_dma_desc; |
| @@ -429,7 +427,7 @@ sgdma_txphysaddr(struct altera_tse_private *priv, · 2 unmodified lines | ||
| 429 | 427 | |
| 430 | 428 | static dma_addr_t |
| 431 | 429 | sgdma_rxphysaddr(struct altera_tse_private *priv, |
| 432 | − struct sgdma_descrip *desc) | |
| 430 | + struct sgdma_descrip __iomem *desc) | |
| 433 | 431 | { |
| 434 | 432 | dma_addr_t paddr = priv->rxdescmem_busaddr; |
| 435 | 433 | uintptr_t offs = (uintptr_t)desc - (uintptr_t)priv->rx_dma_desc; |
| @@ -518,8 +516,8 @@ queue_rx_peekhead(struct altera_tse_private *priv) · 82 unmodified lines | ||
| 518 | 516 | */ |
| 519 | 517 | static int sgdma_rxbusy(struct altera_tse_private *priv) |
| 520 | 518 | { |
| 521 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->rx_dma_csr; | |
| 522 | − return ioread32(&csr->status) & SGDMA_STSREG_BUSY; | |
| 519 | + return csrrd32(priv->rx_dma_csr, sgdma_csroffs(status)) | |
| 520 | + & SGDMA_STSREG_BUSY; | |
| 523 | 521 | } |
| 524 | 522 | |
| 525 | 523 | /* waits for the tx sgdma to finish it's current operation, returns 0 |
| @@ -528,13 +526,14 @@ static int sgdma_rxbusy(struct altera_tse_private *priv) · 2 unmodified lines | ||
| 528 | 526 | static int sgdma_txbusy(struct altera_tse_private *priv) |
| 529 | 527 | { |
| 530 | 528 | int delay = 0; |
| 531 | − struct sgdma_csr *csr = (struct sgdma_csr *)priv->tx_dma_csr; | |
| 532 | 529 | |
| 533 | 530 | /* if DMA is busy, wait for current transactino to finish */ |
| 534 | − while ((ioread32(&csr->status) & SGDMA_STSREG_BUSY) && (delay++ < 100)) | |
| 531 | + while ((csrrd32(priv->tx_dma_csr, sgdma_csroffs(status)) | |
| 532 | + & SGDMA_STSREG_BUSY) && (delay++ < 100)) | |
| 535 | 533 | udelay(1); |
| 536 | 534 | |
| 537 | − if (ioread32(&csr->status) & SGDMA_STSREG_BUSY) { | |
| 535 | + if (csrrd32(priv->tx_dma_csr, sgdma_csroffs(status)) | |
| 536 | + & SGDMA_STSREG_BUSY) { | |
| 538 | 537 | netdev_err(priv->dev, "timeout waiting for tx dma\n"); |
| 539 | 538 | return 1; |
| 540 | 539 | } |
| @@ -19,16 +19,16 @@ · 18 unmodified lines | ||
| 19 | 19 | |
| 20 | 20 | /* SGDMA descriptor structure */ |
| 21 | 21 | struct sgdma_descrip { |
| 22 | − unsigned int raddr; /* address of data to be read */ | |
| 23 | − unsigned int pad1; | |
| 24 | − unsigned int waddr; | |
| 25 | − unsigned int pad2; | |
| 26 | − unsigned int next; | |
| 27 | − unsigned int pad3; | |
| 28 | − unsigned short bytes; | |
| 29 | − unsigned char rburst; | |
| 30 | − unsigned char wburst; | |
| 31 | − unsigned short bytes_xferred; /* 16 bits, bytes xferred */ | |
| 22 | + u32 raddr; /* address of data to be read */ | |
| 23 | + u32 pad1; | |
| 24 | + u32 waddr; | |
| 25 | + u32 pad2; | |
| 26 | + u32 next; | |
| 27 | + u32 pad3; | |
| 28 | + u16 bytes; | |
| 29 | + u8 rburst; | |
| 30 | + u8 wburst; | |
| 31 | + u16 bytes_xferred; /* 16 bits, bytes xferred */ | |
| 32 | 32 | |
| 33 | 33 | /* bit 0: error |
| 34 | 34 | * bit 1: length error |
| @@ -39,7 +39,7 @@ struct sgdma_descrip { · 4 unmodified lines | ||
| 39 | 39 | * bit 6: reserved |
| 40 | 40 | * bit 7: status eop for recv case |
| 41 | 41 | */ |
| 42 | − unsigned char status; | |
| 42 | + u8 status; | |
| 43 | 43 | |
| 44 | 44 | /* bit 0: eop |
| 45 | 45 | * bit 1: read_fixed |
| @@ -47,7 +47,7 @@ struct sgdma_descrip { · 1 unmodified line | ||
| 47 | 47 | * bits 3,4,5,6: Channel (always 0) |
| 48 | 48 | * bit 7: hardware owned |
| 49 | 49 | */ |
| 50 | − unsigned char control; | |
| 50 | + u8 control; | |
| 51 | 51 | } __packed; |
| 52 | 52 | |
| 53 | 53 | |
| @@ -101,6 +101,8 @@ struct sgdma_csr { · 47 unmodified lines | ||
| 101 | 101 | u32 pad3[3]; |
| 102 | 102 | }; |
| 103 | 103 | |
| 104 | +#define sgdma_csroffs(a) (offsetof(struct sgdma_csr, a)) | |
| 105 | +#define sgdma_descroffs(a) (offsetof(struct sgdma_descrip, a)) | |
| 104 | 106 | |
| 105 | 107 | #define SGDMA_STSREG_ERR BIT(0) /* Error */ |
| 106 | 108 | #define SGDMA_STSREG_EOP BIT(1) /* EOP */ |
| @@ -357,6 +357,8 @@ struct altera_tse_mac { · 356 unmodified lines | ||
| 357 | 357 | u32 reserved5[42]; |
| 358 | 358 | }; |
| 359 | 359 | |
| 360 | +#define tse_csroffs(a) (offsetof(struct altera_tse_mac, a)) | |
| 361 | + | |
| 360 | 362 | /* Transmit and Receive Command Registers Bit Definitions |
| 361 | 363 | */ |
| 362 | 364 | #define ALTERA_TSE_TX_CMD_STAT_OMIT_CRC BIT(17) |
| @@ -487,4 +489,49 @@ struct altera_tse_private { · 124 unmodified lines | ||
| 487 | 489 | */ |
| 488 | 490 | void altera_tse_set_ethtool_ops(struct net_device *); |
| 489 | 491 | |
| 492 | +static inline | |
| 493 | +u32 csrrd32(void __iomem *mac, size_t offs) | |
| 494 | +{ | |
| 495 | + void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | |
| 496 | + return readl(paddr); | |
| 497 | +} | |
| 498 | + | |
| 499 | +static inline | |
| 500 | +u16 csrrd16(void __iomem *mac, size_t offs) | |
| 501 | +{ | |
| 502 | + void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | |
| 503 | + return readw(paddr); | |
| 504 | +} | |
| 505 | + | |
| 506 | +static inline | |
| 507 | +u8 csrrd8(void __iomem *mac, size_t offs) | |
| 508 | +{ | |
| 509 | + void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | |
| 510 | + return readb(paddr); | |
| 511 | +} | |
| 512 | + | |
| 513 | +static inline | |
| 514 | +void csrwr32(u32 val, void __iomem *mac, size_t offs) | |
| 515 | +{ | |
| 516 | + void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | |
| 517 | + | |
| 518 | + writel(val, paddr); | |
| 519 | +} | |
| 520 | + | |
| 521 | +static inline | |
| 522 | +void csrwr16(u16 val, void __iomem *mac, size_t offs) | |
| 523 | +{ | |
| 524 | + void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | |
| 525 | + | |
| 526 | + writew(val, paddr); | |
| 527 | +} | |
| 528 | + | |
| 529 | +static inline | |
| 530 | +void csrwr8(u8 val, void __iomem *mac, size_t offs) | |
| 531 | +{ | |
| 532 | + void __iomem *paddr = (void __iomem *)((uintptr_t)mac + offs); | |
| 533 | + | |
| 534 | + writeb(val, paddr); | |
| 535 | +} | |
| 536 | + | |
| 490 | 537 | #endif /* __ALTERA_TSE_H__ */ |
| @@ -96,54 +96,89 @@ static void tse_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, · 95 unmodified lines | ||
| 96 | 96 | u64 *buf) |
| 97 | 97 | { |
| 98 | 98 | struct altera_tse_private *priv = netdev_priv(dev); |
| 99 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 100 | 99 | u64 ext; |
| 101 | 100 | |
| 102 | − buf[0] = ioread32(&mac->frames_transmitted_ok); | |
| 103 | − buf[1] = ioread32(&mac->frames_received_ok); | |
| 104 | − buf[2] = ioread32(&mac->frames_check_sequence_errors); | |
| 105 | − buf[3] = ioread32(&mac->alignment_errors); | |
| 101 | + buf[0] = csrrd32(priv->mac_dev, | |
| 102 | + tse_csroffs(frames_transmitted_ok)); | |
| 103 | + buf[1] = csrrd32(priv->mac_dev, | |
| 104 | + tse_csroffs(frames_received_ok)); | |
| 105 | + buf[2] = csrrd32(priv->mac_dev, | |
| 106 | + tse_csroffs(frames_check_sequence_errors)); | |
| 107 | + buf[3] = csrrd32(priv->mac_dev, | |
| 108 | + tse_csroffs(alignment_errors)); | |
| 106 | 109 | |
| 107 | 110 | /* Extended aOctetsTransmittedOK counter */ |
| 108 | − ext = (u64) ioread32(&mac->msb_octets_transmitted_ok) << 32; | |
| 109 | − ext |= ioread32(&mac->octets_transmitted_ok); | |
| 111 | + ext = (u64) csrrd32(priv->mac_dev, | |
| 112 | + tse_csroffs(msb_octets_transmitted_ok)) << 32; | |
| 113 | + | |
| 114 | + ext |= csrrd32(priv->mac_dev, | |
| 115 | + tse_csroffs(octets_transmitted_ok)); | |
| 110 | 116 | buf[4] = ext; |
| 111 | 117 | |
| 112 | 118 | /* Extended aOctetsReceivedOK counter */ |
| 113 | − ext = (u64) ioread32(&mac->msb_octets_received_ok) << 32; | |
| 114 | − ext |= ioread32(&mac->octets_received_ok); | |
| 119 | + ext = (u64) csrrd32(priv->mac_dev, | |
| 120 | + tse_csroffs(msb_octets_received_ok)) << 32; | |
| 121 | + | |
| 122 | + ext |= csrrd32(priv->mac_dev, | |
| 123 | + tse_csroffs(octets_received_ok)); | |
| 115 | 124 | buf[5] = ext; |
| 116 | 125 | |
| 117 | − buf[6] = ioread32(&mac->tx_pause_mac_ctrl_frames); | |
| 118 | − buf[7] = ioread32(&mac->rx_pause_mac_ctrl_frames); | |
| 119 | − buf[8] = ioread32(&mac->if_in_errors); | |
| 120 | − buf[9] = ioread32(&mac->if_out_errors); | |
| 121 | − buf[10] = ioread32(&mac->if_in_ucast_pkts); | |
| 122 | − buf[11] = ioread32(&mac->if_in_multicast_pkts); | |
| 123 | − buf[12] = ioread32(&mac->if_in_broadcast_pkts); | |
| 124 | − buf[13] = ioread32(&mac->if_out_discards); | |
| 125 | − buf[14] = ioread32(&mac->if_out_ucast_pkts); | |
| 126 | − buf[15] = ioread32(&mac->if_out_multicast_pkts); | |
| 127 | − buf[16] = ioread32(&mac->if_out_broadcast_pkts); | |
| 128 | − buf[17] = ioread32(&mac->ether_stats_drop_events); | |
| 126 | + buf[6] = csrrd32(priv->mac_dev, | |
| 127 | + tse_csroffs(tx_pause_mac_ctrl_frames)); | |
| 128 | + buf[7] = csrrd32(priv->mac_dev, | |
| 129 | + tse_csroffs(rx_pause_mac_ctrl_frames)); | |
| 130 | + buf[8] = csrrd32(priv->mac_dev, | |
| 131 | + tse_csroffs(if_in_errors)); | |
| 132 | + buf[9] = csrrd32(priv->mac_dev, | |
| 133 | + tse_csroffs(if_out_errors)); | |
| 134 | + buf[10] = csrrd32(priv->mac_dev, | |
| 135 | + tse_csroffs(if_in_ucast_pkts)); | |
| 136 | + buf[11] = csrrd32(priv->mac_dev, | |
| 137 | + tse_csroffs(if_in_multicast_pkts)); | |
| 138 | + buf[12] = csrrd32(priv->mac_dev, | |
| 139 | + tse_csroffs(if_in_broadcast_pkts)); | |
| 140 | + buf[13] = csrrd32(priv->mac_dev, | |
| 141 | + tse_csroffs(if_out_discards)); | |
| 142 | + buf[14] = csrrd32(priv->mac_dev, | |
| 143 | + tse_csroffs(if_out_ucast_pkts)); | |
| 144 | + buf[15] = csrrd32(priv->mac_dev, | |
| 145 | + tse_csroffs(if_out_multicast_pkts)); | |
| 146 | + buf[16] = csrrd32(priv->mac_dev, | |
| 147 | + tse_csroffs(if_out_broadcast_pkts)); | |
| 148 | + buf[17] = csrrd32(priv->mac_dev, | |
| 149 | + tse_csroffs(ether_stats_drop_events)); | |
| 129 | 150 | |
| 130 | 151 | /* Extended etherStatsOctets counter */ |
| 131 | − ext = (u64) ioread32(&mac->msb_ether_stats_octets) << 32; | |
| 132 | − ext |= ioread32(&mac->ether_stats_octets); | |
| 152 | + ext = (u64) csrrd32(priv->mac_dev, | |
| 153 | + tse_csroffs(msb_ether_stats_octets)) << 32; | |
| 154 | + ext |= csrrd32(priv->mac_dev, | |
| 155 | + tse_csroffs(ether_stats_octets)); | |
| 133 | 156 | buf[18] = ext; |
| 134 | 157 | |
| 135 | − buf[19] = ioread32(&mac->ether_stats_pkts); | |
| 136 | − buf[20] = ioread32(&mac->ether_stats_undersize_pkts); | |
| 137 | − buf[21] = ioread32(&mac->ether_stats_oversize_pkts); | |
| 138 | − buf[22] = ioread32(&mac->ether_stats_pkts_64_octets); | |
| 139 | − buf[23] = ioread32(&mac->ether_stats_pkts_65to127_octets); | |
| 140 | − buf[24] = ioread32(&mac->ether_stats_pkts_128to255_octets); | |
| 141 | − buf[25] = ioread32(&mac->ether_stats_pkts_256to511_octets); | |
| 142 | − buf[26] = ioread32(&mac->ether_stats_pkts_512to1023_octets); | |
| 143 | − buf[27] = ioread32(&mac->ether_stats_pkts_1024to1518_octets); | |
| 144 | − buf[28] = ioread32(&mac->ether_stats_pkts_1519tox_octets); | |
| 145 | − buf[29] = ioread32(&mac->ether_stats_jabbers); | |
| 146 | − buf[30] = ioread32(&mac->ether_stats_fragments); | |
| 158 | + buf[19] = csrrd32(priv->mac_dev, | |
| 159 | + tse_csroffs(ether_stats_pkts)); | |
| 160 | + buf[20] = csrrd32(priv->mac_dev, | |
| 161 | + tse_csroffs(ether_stats_undersize_pkts)); | |
| 162 | + buf[21] = csrrd32(priv->mac_dev, | |
| 163 | + tse_csroffs(ether_stats_oversize_pkts)); | |
| 164 | + buf[22] = csrrd32(priv->mac_dev, | |
| 165 | + tse_csroffs(ether_stats_pkts_64_octets)); | |
| 166 | + buf[23] = csrrd32(priv->mac_dev, | |
| 167 | + tse_csroffs(ether_stats_pkts_65to127_octets)); | |
| 168 | + buf[24] = csrrd32(priv->mac_dev, | |
| 169 | + tse_csroffs(ether_stats_pkts_128to255_octets)); | |
| 170 | + buf[25] = csrrd32(priv->mac_dev, | |
| 171 | + tse_csroffs(ether_stats_pkts_256to511_octets)); | |
| 172 | + buf[26] = csrrd32(priv->mac_dev, | |
| 173 | + tse_csroffs(ether_stats_pkts_512to1023_octets)); | |
| 174 | + buf[27] = csrrd32(priv->mac_dev, | |
| 175 | + tse_csroffs(ether_stats_pkts_1024to1518_octets)); | |
| 176 | + buf[28] = csrrd32(priv->mac_dev, | |
| 177 | + tse_csroffs(ether_stats_pkts_1519tox_octets)); | |
| 178 | + buf[29] = csrrd32(priv->mac_dev, | |
| 179 | + tse_csroffs(ether_stats_jabbers)); | |
| 180 | + buf[30] = csrrd32(priv->mac_dev, | |
| 181 | + tse_csroffs(ether_stats_fragments)); | |
| 147 | 182 | } |
| 148 | 183 | |
| 149 | 184 | static int tse_sset_count(struct net_device *dev, int sset) |
| @@ -178,7 +213,6 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs, · 28 unmodified lines | ||
| 178 | 213 | { |
| 179 | 214 | int i; |
| 180 | 215 | struct altera_tse_private *priv = netdev_priv(dev); |
| 181 | − u32 *tse_mac_regs = (u32 *)priv->mac_dev; | |
| 182 | 216 | u32 *buf = regbuf; |
| 183 | 217 | |
| 184 | 218 | /* Set version to a known value, so ethtool knows |
| @@ -196,7 +230,7 @@ static void tse_get_regs(struct net_device *dev, struct ethtool_regs *regs, · 11 unmodified lines | ||
| 196 | 230 | regs->version = 1; |
| 197 | 231 | |
| 198 | 232 | for (i = 0; i < TSE_NUM_REGS; i++) |
| 199 | − buf[i] = ioread32(&tse_mac_regs[i]); | |
| 233 | + buf[i] = csrrd32(priv->mac_dev, i * 4); | |
| 200 | 234 | } |
| 201 | 235 | |
| 202 | 236 | static int tse_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| @@ -100,29 +100,30 @@ static inline u32 tse_tx_avail(struct altera_tse_private *priv) · 99 unmodified lines | ||
| 100 | 100 | */ |
| 101 | 101 | static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum) |
| 102 | 102 | { |
| 103 | − struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv; | |
| 104 | − unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0; | |
| 105 | − u32 data; | |
| 103 | + struct net_device *ndev = bus->priv; | |
| 104 | + struct altera_tse_private *priv = netdev_priv(ndev); | |
| 106 | 105 | |
| 107 | 106 | /* set MDIO address */ |
| 108 | − iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr); | |
| 107 | + csrwr32((mii_id & 0x1f), priv->mac_dev, | |
| 108 | + tse_csroffs(mdio_phy0_addr)); | |
| 109 | 109 | |
| 110 | 110 | /* get the data */ |
| 111 | − data = ioread32(&mdio_regs[regnum]) & 0xffff; | |
| 112 | − return data; | |
| 111 | + return csrrd32(priv->mac_dev, | |
| 112 | + tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff; | |
| 113 | 113 | } |
| 114 | 114 | |
| 115 | 115 | static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum, |
| 116 | 116 | u16 value) |
| 117 | 117 | { |
| 118 | − struct altera_tse_mac *mac = (struct altera_tse_mac *)bus->priv; | |
| 119 | − unsigned int *mdio_regs = (unsigned int *)&mac->mdio_phy0; | |
| 118 | + struct net_device *ndev = bus->priv; | |
| 119 | + struct altera_tse_private *priv = netdev_priv(ndev); | |
| 120 | 120 | |
| 121 | 121 | /* set MDIO address */ |
| 122 | − iowrite32((mii_id & 0x1f), &mac->mdio_phy0_addr); | |
| 122 | + csrwr32((mii_id & 0x1f), priv->mac_dev, | |
| 123 | + tse_csroffs(mdio_phy0_addr)); | |
| 123 | 124 | |
| 124 | 125 | /* write the data */ |
| 125 | − iowrite32((u32) value, &mdio_regs[regnum]); | |
| 126 | + csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4); | |
| 126 | 127 | return 0; |
| 127 | 128 | } |
| 128 | 129 | |
| @@ -168,7 +169,7 @@ static int altera_tse_mdio_create(struct net_device *dev, unsigned int id) · 39 unmodified lines | ||
| 168 | 169 | for (i = 0; i < PHY_MAX_ADDR; i++) |
| 169 | 170 | mdio->irq[i] = PHY_POLL; |
| 170 | 171 | |
| 171 | − mdio->priv = priv->mac_dev; | |
| 172 | + mdio->priv = dev; | |
| 172 | 173 | mdio->parent = priv->device; |
| 173 | 174 | |
| 174 | 175 | ret = of_mdiobus_register(mdio, mdio_node); |
| @@ -563,7 +564,6 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev) · 388 unmodified lines | ||
| 563 | 564 | unsigned int nopaged_len = skb_headlen(skb); |
| 564 | 565 | enum netdev_tx ret = NETDEV_TX_OK; |
| 565 | 566 | dma_addr_t dma_addr; |
| 566 | − int txcomplete = 0; | |
| 567 | 567 | |
| 568 | 568 | spin_lock_bh(&priv->tx_lock); |
| 569 | 569 | |
| @@ -599,7 +599,7 @@ static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev) · 29 unmodified lines | ||
| 599 | 599 | dma_sync_single_for_device(priv->device, buffer->dma_addr, |
| 600 | 600 | buffer->len, DMA_TO_DEVICE); |
| 601 | 601 | |
| 602 | − txcomplete = priv->dmaops->tx_buffer(priv, buffer); | |
| 602 | + priv->dmaops->tx_buffer(priv, buffer); | |
| 603 | 603 | |
| 604 | 604 | skb_tx_timestamp(skb); |
| 605 | 605 | |
| @@ -698,7 +698,6 @@ static struct phy_device *connect_local_phy(struct net_device *dev) · 92 unmodified lines | ||
| 698 | 698 | struct altera_tse_private *priv = netdev_priv(dev); |
| 699 | 699 | struct phy_device *phydev = NULL; |
| 700 | 700 | char phy_id_fmt[MII_BUS_ID_SIZE + 3]; |
| 701 | − int ret; | |
| 702 | 701 | |
| 703 | 702 | if (priv->phy_addr != POLL_PHY) { |
| 704 | 703 | snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, |
| @@ -712,6 +711,7 @@ static struct phy_device *connect_local_phy(struct net_device *dev) · 7 unmodified lines | ||
| 712 | 711 | netdev_err(dev, "Could not attach to PHY\n"); |
| 713 | 712 | |
| 714 | 713 | } else { |
| 714 | + int ret; | |
| 715 | 715 | phydev = phy_find_first(priv->mdio); |
| 716 | 716 | if (phydev == NULL) { |
| 717 | 717 | netdev_err(dev, "No PHY found\n"); |
| @@ -791,7 +791,6 @@ static int init_phy(struct net_device *dev) · 73 unmodified lines | ||
| 791 | 791 | |
| 792 | 792 | static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) |
| 793 | 793 | { |
| 794 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 795 | 794 | u32 msb; |
| 796 | 795 | u32 lsb; |
| 797 | 796 | |
| @@ -799,8 +798,8 @@ static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) · 1 unmodified line | ||
| 799 | 798 | lsb = ((addr[5] << 8) | addr[4]) & 0xffff; |
| 800 | 799 | |
| 801 | 800 | /* Set primary MAC address */ |
| 802 | − iowrite32(msb, &mac->mac_addr_0); | |
| 803 | − iowrite32(lsb, &mac->mac_addr_1); | |
| 801 | + csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0)); | |
| 802 | + csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1)); | |
| 804 | 803 | } |
| 805 | 804 | |
| 806 | 805 | /* MAC software reset. |
| @@ -811,26 +810,26 @@ static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr) · 4 unmodified lines | ||
| 811 | 810 | */ |
| 812 | 811 | static int reset_mac(struct altera_tse_private *priv) |
| 813 | 812 | { |
| 814 | − void __iomem *cmd_cfg_reg = &priv->mac_dev->command_config; | |
| 815 | 813 | int counter; |
| 816 | 814 | u32 dat; |
| 817 | 815 | |
| 818 | − dat = ioread32(cmd_cfg_reg); | |
| 816 | + dat = csrrd32(priv->mac_dev, tse_csroffs(command_config)); | |
| 819 | 817 | dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); |
| 820 | 818 | dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET; |
| 821 | − iowrite32(dat, cmd_cfg_reg); | |
| 819 | + csrwr32(dat, priv->mac_dev, tse_csroffs(command_config)); | |
| 822 | 820 | |
| 823 | 821 | counter = 0; |
| 824 | 822 | while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
| 825 | − if (tse_bit_is_clear(cmd_cfg_reg, MAC_CMDCFG_SW_RESET)) | |
| 823 | + if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config), | |
| 824 | + MAC_CMDCFG_SW_RESET)) | |
| 826 | 825 | break; |
| 827 | 826 | udelay(1); |
| 828 | 827 | } |
| 829 | 828 | |
| 830 | 829 | if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) { |
| 831 | − dat = ioread32(cmd_cfg_reg); | |
| 830 | + dat = csrrd32(priv->mac_dev, tse_csroffs(command_config)); | |
| 832 | 831 | dat &= ~MAC_CMDCFG_SW_RESET; |
| 833 | − iowrite32(dat, cmd_cfg_reg); | |
| 832 | + csrwr32(dat, priv->mac_dev, tse_csroffs(command_config)); | |
| 834 | 833 | return -1; |
| 835 | 834 | } |
| 836 | 835 | return 0; |
| @@ -840,41 +839,57 @@ static int reset_mac(struct altera_tse_private *priv) · 3 unmodified lines | ||
| 840 | 839 | */ |
| 841 | 840 | static int init_mac(struct altera_tse_private *priv) |
| 842 | 841 | { |
| 843 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 844 | 842 | unsigned int cmd = 0; |
| 845 | 843 | u32 frm_length; |
| 846 | 844 | |
| 847 | 845 | /* Setup Rx FIFO */ |
| 848 | − iowrite32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY, | |
| 849 | − &mac->rx_section_empty); | |
| 850 | − iowrite32(ALTERA_TSE_RX_SECTION_FULL, &mac->rx_section_full); | |
| 851 | − iowrite32(ALTERA_TSE_RX_ALMOST_EMPTY, &mac->rx_almost_empty); | |
| 852 | − iowrite32(ALTERA_TSE_RX_ALMOST_FULL, &mac->rx_almost_full); | |
| 846 | + csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY, | |
| 847 | + priv->mac_dev, tse_csroffs(rx_section_empty)); | |
| 848 | + | |
| 849 | + csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev, | |
| 850 | + tse_csroffs(rx_section_full)); | |
| 851 | + | |
| 852 | + csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev, | |
| 853 | + tse_csroffs(rx_almost_empty)); | |
| 854 | + | |
| 855 | + csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev, | |
| 856 | + tse_csroffs(rx_almost_full)); | |
| 853 | 857 | |
| 854 | 858 | /* Setup Tx FIFO */ |
| 855 | − iowrite32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY, | |
| 856 | − &mac->tx_section_empty); | |
| 857 | − iowrite32(ALTERA_TSE_TX_SECTION_FULL, &mac->tx_section_full); | |
| 858 | − iowrite32(ALTERA_TSE_TX_ALMOST_EMPTY, &mac->tx_almost_empty); | |
| 859 | − iowrite32(ALTERA_TSE_TX_ALMOST_FULL, &mac->tx_almost_full); | |
| 859 | + csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY, | |
| 860 | + priv->mac_dev, tse_csroffs(tx_section_empty)); | |
| 861 | + | |
| 862 | + csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev, | |
| 863 | + tse_csroffs(tx_section_full)); | |
| 864 | + | |
| 865 | + csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev, | |
| 866 | + tse_csroffs(tx_almost_empty)); | |
| 867 | + | |
| 868 | + csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev, | |
| 869 | + tse_csroffs(tx_almost_full)); | |
| 860 | 870 | |
| 861 | 871 | /* MAC Address Configuration */ |
| 862 | 872 | tse_update_mac_addr(priv, priv->dev->dev_addr); |
| 863 | 873 | |
| 864 | 874 | /* MAC Function Configuration */ |
| 865 | 875 | frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN; |
| 866 | − iowrite32(frm_length, &mac->frm_length); | |
| 867 | − iowrite32(ALTERA_TSE_TX_IPG_LENGTH, &mac->tx_ipg_length); | |
| 876 | + csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length)); | |
| 877 | + | |
| 878 | + csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev, | |
| 879 | + tse_csroffs(tx_ipg_length)); | |
| 868 | 880 | |
| 869 | 881 | /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit |
| 870 | 882 | * start address |
| 871 | 883 | */ |
| 872 | − tse_set_bit(&mac->rx_cmd_stat, ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); | |
| 873 | − tse_clear_bit(&mac->tx_cmd_stat, ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | |
| 874 | − ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | |
| 884 | + tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat), | |
| 885 | + ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16); | |
| 886 | + | |
| 887 | + tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat), | |
| 888 | + ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 | | |
| 889 | + ALTERA_TSE_TX_CMD_STAT_OMIT_CRC); | |
| 875 | 890 | |
| 876 | 891 | /* Set the MAC options */ |
| 877 | − cmd = ioread32(&mac->command_config); | |
| 892 | + cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config)); | |
| 878 | 893 | cmd &= ~MAC_CMDCFG_PAD_EN; /* No padding Removal on Receive */ |
| 879 | 894 | cmd &= ~MAC_CMDCFG_CRC_FWD; /* CRC Removal */ |
| 880 | 895 | cmd |= MAC_CMDCFG_RX_ERR_DISC; /* Automatically discard frames |
| @@ -889,9 +904,10 @@ static int init_mac(struct altera_tse_private *priv) · 8 unmodified lines | ||
| 889 | 904 | cmd &= ~MAC_CMDCFG_ETH_SPEED; |
| 890 | 905 | cmd &= ~MAC_CMDCFG_ENA_10; |
| 891 | 906 | |
| 892 | − iowrite32(cmd, &mac->command_config); | |
| 907 | + csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config)); | |
| 893 | 908 | |
| 894 | − iowrite32(ALTERA_TSE_PAUSE_QUANTA, &mac->pause_quanta); | |
| 909 | + csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev, | |
| 910 | + tse_csroffs(pause_quanta)); | |
| 895 | 911 | |
| 896 | 912 | if (netif_msg_hw(priv)) |
| 897 | 913 | dev_dbg(priv->device, |
| @@ -904,15 +920,14 @@ static int init_mac(struct altera_tse_private *priv) · 6 unmodified lines | ||
| 904 | 920 | */ |
| 905 | 921 | static void tse_set_mac(struct altera_tse_private *priv, bool enable) |
| 906 | 922 | { |
| 907 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 908 | − u32 value = ioread32(&mac->command_config); | |
| 923 | + u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config)); | |
| 909 | 924 | |
| 910 | 925 | if (enable) |
| 911 | 926 | value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA; |
| 912 | 927 | else |
| 913 | 928 | value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA); |
| 914 | 929 | |
| 915 | − iowrite32(value, &mac->command_config); | |
| 930 | + csrwr32(value, priv->mac_dev, tse_csroffs(command_config)); | |
| 916 | 931 | } |
| 917 | 932 | |
| 918 | 933 | /* Change the MTU |
| @@ -942,13 +957,12 @@ static int tse_change_mtu(struct net_device *dev, int new_mtu) · 23 unmodified lines | ||
| 942 | 957 | static void altera_tse_set_mcfilter(struct net_device *dev) |
| 943 | 958 | { |
| 944 | 959 | struct altera_tse_private *priv = netdev_priv(dev); |
| 945 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 946 | 960 | int i; |
| 947 | 961 | struct netdev_hw_addr *ha; |
| 948 | 962 | |
| 949 | 963 | /* clear the hash filter */ |
| 950 | 964 | for (i = 0; i < 64; i++) |
| 951 | − iowrite32(0, &(mac->hash_table[i])); | |
| 965 | + csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4); | |
| 952 | 966 | |
| 953 | 967 | netdev_for_each_mc_addr(ha, dev) { |
| 954 | 968 | unsigned int hash = 0; |
| @@ -964,7 +978,7 @@ static void altera_tse_set_mcfilter(struct net_device *dev) · 9 unmodified lines | ||
| 964 | 978 | |
| 965 | 979 | hash = (hash << 1) | xor_bit; |
| 966 | 980 | } |
| 967 | − iowrite32(1, &(mac->hash_table[hash])); | |
| 981 | + csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4); | |
| 968 | 982 | } |
| 969 | 983 | } |
| 970 | 984 | |
| @@ -972,12 +986,11 @@ static void altera_tse_set_mcfilter(struct net_device *dev) · 1 unmodified line | ||
| 972 | 986 | static void altera_tse_set_mcfilterall(struct net_device *dev) |
| 973 | 987 | { |
| 974 | 988 | struct altera_tse_private *priv = netdev_priv(dev); |
| 975 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 976 | 989 | int i; |
| 977 | 990 | |
| 978 | 991 | /* set the hash filter */ |
| 979 | 992 | for (i = 0; i < 64; i++) |
| 980 | − iowrite32(1, &(mac->hash_table[i])); | |
| 993 | + csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4); | |
| 981 | 994 | } |
| 982 | 995 | |
| 983 | 996 | /* Set or clear the multicast filter for this adaptor |
| @@ -985,12 +998,12 @@ static void altera_tse_set_mcfilterall(struct net_device *dev) · 1 unmodified line | ||
| 985 | 998 | static void tse_set_rx_mode_hashfilter(struct net_device *dev) |
| 986 | 999 | { |
| 987 | 1000 | struct altera_tse_private *priv = netdev_priv(dev); |
| 988 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 989 | 1001 | |
| 990 | 1002 | spin_lock(&priv->mac_cfg_lock); |
| 991 | 1003 | |
| 992 | 1004 | if (dev->flags & IFF_PROMISC) |
| 993 | − tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | |
| 1005 | + tse_set_bit(priv->mac_dev, tse_csroffs(command_config), | |
| 1006 | + MAC_CMDCFG_PROMIS_EN); | |
| 994 | 1007 | |
| 995 | 1008 | if (dev->flags & IFF_ALLMULTI) |
| 996 | 1009 | altera_tse_set_mcfilterall(dev); |
| @@ -1005,15 +1018,16 @@ static void tse_set_rx_mode_hashfilter(struct net_device *dev) · 8 unmodified lines | ||
| 1005 | 1018 | static void tse_set_rx_mode(struct net_device *dev) |
| 1006 | 1019 | { |
| 1007 | 1020 | struct altera_tse_private *priv = netdev_priv(dev); |
| 1008 | − struct altera_tse_mac *mac = priv->mac_dev; | |
| 1009 | 1021 | |
| 1010 | 1022 | spin_lock(&priv->mac_cfg_lock); |
| 1011 | 1023 | |
| 1012 | 1024 | if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || |
| 1013 | 1025 | !netdev_mc_empty(dev) || !netdev_uc_empty(dev)) |
| 1014 | − tse_set_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | |
| 1026 | + tse_set_bit(priv->mac_dev, tse_csroffs(command_config), | |
| 1027 | + MAC_CMDCFG_PROMIS_EN); | |
| 1015 | 1028 | else |
| 1016 | − tse_clear_bit(&mac->command_config, MAC_CMDCFG_PROMIS_EN); | |
| 1029 | + tse_clear_bit(priv->mac_dev, tse_csroffs(command_config), | |
| 1030 | + MAC_CMDCFG_PROMIS_EN); | |
| 1017 | 1031 | |
| 1018 | 1032 | spin_unlock(&priv->mac_cfg_lock); |
| 1019 | 1033 | } |
| @@ -1362,6 +1376,11 @@ static int altera_tse_probe(struct platform_device *pdev) · 342 unmodified lines | ||
| 1362 | 1376 | of_property_read_bool(pdev->dev.of_node, |
| 1363 | 1377 | "altr,has-hash-multicast-filter"); |
| 1364 | 1378 | |
| 1379 | + /* Set hash filter to not set for now until the | |
| 1380 | + * multicast filter receive issue is debugged | |
| 1381 | + */ | |
| 1382 | + priv->hash_filter = 0; | |
| 1383 | + | |
| 1365 | 1384 | /* get supplemental address settings for this instance */ |
| 1366 | 1385 | priv->added_unicast = |
| 1367 | 1386 | of_property_read_bool(pdev->dev.of_node, |
| @@ -1493,7 +1512,7 @@ static int altera_tse_remove(struct platform_device *pdev) · 125 unmodified lines | ||
| 1493 | 1512 | return 0; |
| 1494 | 1513 | } |
| 1495 | 1514 | |
| 1496 | −struct altera_dmaops altera_dtype_sgdma = { | |
| 1515 | +static const struct altera_dmaops altera_dtype_sgdma = { | |
| 1497 | 1516 | .altera_dtype = ALTERA_DTYPE_SGDMA, |
| 1498 | 1517 | .dmamask = 32, |
| 1499 | 1518 | .reset_dma = sgdma_reset, |
| @@ -1512,7 +1531,7 @@ struct altera_dmaops altera_dtype_sgdma = { · 12 unmodified lines | ||
| 1512 | 1531 | .start_rxdma = sgdma_start_rxdma, |
| 1513 | 1532 | }; |
| 1514 | 1533 | |
| 1515 | −struct altera_dmaops altera_dtype_msgdma = { | |
| 1534 | +static const struct altera_dmaops altera_dtype_msgdma = { | |
| 1516 | 1535 | .altera_dtype = ALTERA_DTYPE_MSGDMA, |
| 1517 | 1536 | .dmamask = 64, |
| 1518 | 1537 | .reset_dma = msgdma_reset, |
| @@ -17,28 +17,28 @@ · 16 unmodified lines | ||
| 17 | 17 | #include "altera_tse.h" |
| 18 | 18 | #include "altera_utils.h" |
| 19 | 19 | |
| 20 | −void tse_set_bit(void __iomem *ioaddr, u32 bit_mask) | |
| 20 | +void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) | |
| 21 | 21 | { |
| 22 | − u32 value = ioread32(ioaddr); | |
| 22 | + u32 value = csrrd32(ioaddr, offs); | |
| 23 | 23 | value |= bit_mask; |
| 24 | − iowrite32(value, ioaddr); | |
| 24 | + csrwr32(value, ioaddr, offs); | |
| 25 | 25 | } |
| 26 | 26 | |
| 27 | −void tse_clear_bit(void __iomem *ioaddr, u32 bit_mask) | |
| 27 | +void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask) | |
| 28 | 28 | { |
| 29 | − u32 value = ioread32(ioaddr); | |
| 29 | + u32 value = csrrd32(ioaddr, offs); | |
| 30 | 30 | value &= ~bit_mask; |
| 31 | − iowrite32(value, ioaddr); | |
| 31 | + csrwr32(value, ioaddr, offs); | |
| 32 | 32 | } |
| 33 | 33 | |
| 34 | −int tse_bit_is_set(void __iomem *ioaddr, u32 bit_mask) | |
| 34 | +int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask) | |
| 35 | 35 | { |
| 36 | − u32 value = ioread32(ioaddr); | |
| 36 | + u32 value = csrrd32(ioaddr, offs); | |
| 37 | 37 | return (value & bit_mask) ? 1 : 0; |
| 38 | 38 | } |
| 39 | 39 | |
| 40 | −int tse_bit_is_clear(void __iomem *ioaddr, u32 bit_mask) | |
| 40 | +int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask) | |
| 41 | 41 | { |
| 42 | − u32 value = ioread32(ioaddr); | |
| 42 | + u32 value = csrrd32(ioaddr, offs); | |
| 43 | 43 | return (value & bit_mask) ? 0 : 1; |
| 44 | 44 | } |
| @@ -19,9 +19,9 @@ · 18 unmodified lines | ||
| 19 | 19 | #ifndef __ALTERA_UTILS_H__ |
| 20 | 20 | #define __ALTERA_UTILS_H__ |
| 21 | 21 | |
| 22 | −void tse_set_bit(void __iomem *ioaddr, u32 bit_mask); | |
| 23 | −void tse_clear_bit(void __iomem *ioaddr, u32 bit_mask); | |
| 24 | −int tse_bit_is_set(void __iomem *ioaddr, u32 bit_mask); | |
| 25 | −int tse_bit_is_clear(void __iomem *ioaddr, u32 bit_mask); | |
| 22 | +void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); | |
| 23 | +void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask); | |
| 24 | +int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask); | |
| 25 | +int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask); | |
| 26 | 26 | |
| 27 | 27 | #endif /* __ALTERA_UTILS_H__*/ |
| @@ -10051,8 +10051,8 @@ static void bnx2x_prev_unload_close_mac(struct bnx2x *bp, · 10050 unmodified lines | ||
| 10051 | 10051 | #define BCM_5710_UNDI_FW_MF_MAJOR (0x07) |
| 10052 | 10052 | #define BCM_5710_UNDI_FW_MF_MINOR (0x08) |
| 10053 | 10053 | #define BCM_5710_UNDI_FW_MF_VERS (0x05) |
| 10054 | −#define BNX2X_PREV_UNDI_MF_PORT(p) (0x1a150c + ((p) << 4)) | |
| 10055 | −#define BNX2X_PREV_UNDI_MF_FUNC(f) (0x1a184c + ((f) << 4)) | |
| 10054 | +#define BNX2X_PREV_UNDI_MF_PORT(p) (BAR_TSTRORM_INTMEM + 0x150c + ((p) << 4)) | |
| 10055 | +#define BNX2X_PREV_UNDI_MF_FUNC(f) (BAR_TSTRORM_INTMEM + 0x184c + ((f) << 4)) | |
| 10056 | 10056 | static bool bnx2x_prev_unload_undi_fw_supports_mf(struct bnx2x *bp) |
| 10057 | 10057 | { |
| 10058 | 10058 | u8 major, minor, version; |
| @@ -10352,6 +10352,7 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) · 293 unmodified lines | ||
| 10352 | 10352 | /* Reset should be performed after BRB is emptied */ |
| 10353 | 10353 | if (reset_reg & MISC_REGISTERS_RESET_REG_1_RST_BRB1) { |
| 10354 | 10354 | u32 timer_count = 1000; |
| 10355 | + bool need_write = true; | |
| 10355 | 10356 | |
| 10356 | 10357 | /* Close the MAC Rx to prevent BRB from filling up */ |
| 10357 | 10358 | bnx2x_prev_unload_close_mac(bp, &mac_vals); |
| @@ -10398,7 +10399,10 @@ static int bnx2x_prev_unload_common(struct bnx2x *bp) · 40 unmodified lines | ||
| 10398 | 10399 | * cleaning methods - might be redundant but harmless. |
| 10399 | 10400 | */ |
| 10400 | 10401 | if (bnx2x_prev_unload_undi_fw_supports_mf(bp)) { |
| 10401 | − bnx2x_prev_unload_undi_mf(bp); | |
| 10402 | + if (need_write) { | |
| 10403 | + bnx2x_prev_unload_undi_mf(bp); | |
| 10404 | + need_write = false; | |
| 10405 | + } | |
| 10402 | 10406 | } else if (prev_undi) { |
| 10403 | 10407 | /* If UNDI resides in memory, |
| 10404 | 10408 | * manually increment it |
| @@ -2695,7 +2695,7 @@ out: · 2694 unmodified lines | ||
| 2695 | 2695 | bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC); |
| 2696 | 2696 | } |
| 2697 | 2697 | |
| 2698 | − return 0; | |
| 2698 | + return rc; | |
| 2699 | 2699 | } |
| 2700 | 2700 | |
| 2701 | 2701 | int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos) |
| @@ -747,7 +747,7 @@ int bnx2x_vfpf_config_mac(struct bnx2x *bp, u8 *addr, u8 vf_qid, bool set) · 746 unmodified lines | ||
| 747 | 747 | out: |
| 748 | 748 | bnx2x_vfpf_finalize(bp, &req->first_tlv); |
| 749 | 749 | |
| 750 | − return 0; | |
| 750 | + return rc; | |
| 751 | 751 | } |
| 752 | 752 | |
| 753 | 753 | /* request pf to config rss table for vf queues*/ |
| @@ -0,0 +1,706 @@ | ||
| 1 | + /* | |
| 2 | + * drivers/net/ethernet/beckhoff/ec_bhf.c | |
| 3 | + * | |
| 4 | + * Copyright (C) 2014 Darek Marcinkiewicz <reksio@newterm.pl> | |
| 5 | + * | |
| 6 | + * This software is licensed under the terms of the GNU General Public | |
| 7 | + * License version 2, as published by the Free Software Foundation, and | |
| 8 | + * may be copied, distributed, and modified under those terms. | |
| 9 | + * | |
| 10 | + * This program is distributed in the hope that it will be useful, | |
| 11 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 12 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 13 | + * GNU General Public License for more details. | |
| 14 | + * | |
| 15 | + */ | |
| 16 | + | |
| 17 | +/* This is a driver for EtherCAT master module present on CCAT FPGA. | |
| 18 | + * Those can be found on Bechhoff CX50xx industrial PCs. | |
| 19 | + */ | |
| 20 | + | |
| 21 | +#if 0 | |
| 22 | +#define DEBUG | |
| 23 | +#endif | |
| 24 | +#include <linux/kernel.h> | |
| 25 | +#include <linux/module.h> | |
| 26 | +#include <linux/moduleparam.h> | |
| 27 | +#include <linux/pci.h> | |
| 28 | +#include <linux/init.h> | |
| 29 | + | |
| 30 | +#include <linux/netdevice.h> | |
| 31 | +#include <linux/etherdevice.h> | |
| 32 | +#include <linux/ip.h> | |
| 33 | +#include <linux/skbuff.h> | |
| 34 | +#include <linux/hrtimer.h> | |
| 35 | +#include <linux/interrupt.h> | |
| 36 | +#include <linux/stat.h> | |
| 37 | + | |
| 38 | +#define TIMER_INTERVAL_NSEC 20000 | |
| 39 | + | |
| 40 | +#define INFO_BLOCK_SIZE 0x10 | |
| 41 | +#define INFO_BLOCK_TYPE 0x0 | |
| 42 | +#define INFO_BLOCK_REV 0x2 | |
| 43 | +#define INFO_BLOCK_BLK_CNT 0x4 | |
| 44 | +#define INFO_BLOCK_TX_CHAN 0x4 | |
| 45 | +#define INFO_BLOCK_RX_CHAN 0x5 | |
| 46 | +#define INFO_BLOCK_OFFSET 0x8 | |
| 47 | + | |
| 48 | +#define EC_MII_OFFSET 0x4 | |
| 49 | +#define EC_FIFO_OFFSET 0x8 | |
| 50 | +#define EC_MAC_OFFSET 0xc | |
| 51 | + | |
| 52 | +#define MAC_FRAME_ERR_CNT 0x0 | |
| 53 | +#define MAC_RX_ERR_CNT 0x1 | |
| 54 | +#define MAC_CRC_ERR_CNT 0x2 | |
| 55 | +#define MAC_LNK_LST_ERR_CNT 0x3 | |
| 56 | +#define MAC_TX_FRAME_CNT 0x10 | |
| 57 | +#define MAC_RX_FRAME_CNT 0x14 | |
| 58 | +#define MAC_TX_FIFO_LVL 0x20 | |
| 59 | +#define MAC_DROPPED_FRMS 0x28 | |
| 60 | +#define MAC_CONNECTED_CCAT_FLAG 0x78 | |
| 61 | + | |
| 62 | +#define MII_MAC_ADDR 0x8 | |
| 63 | +#define MII_MAC_FILT_FLAG 0xe | |
| 64 | +#define MII_LINK_STATUS 0xf | |
| 65 | + | |
| 66 | +#define FIFO_TX_REG 0x0 | |
| 67 | +#define FIFO_TX_RESET 0x8 | |
| 68 | +#define FIFO_RX_REG 0x10 | |
| 69 | +#define FIFO_RX_ADDR_VALID (1u << 31) | |
| 70 | +#define FIFO_RX_RESET 0x18 | |
| 71 | + | |
| 72 | +#define DMA_CHAN_OFFSET 0x1000 | |
| 73 | +#define DMA_CHAN_SIZE 0x8 | |
| 74 | + | |
| 75 | +#define DMA_WINDOW_SIZE_MASK 0xfffffffc | |
| 76 | + | |
| 77 | +static struct pci_device_id ids[] = { | |
| 78 | + { PCI_DEVICE(0x15ec, 0x5000), }, | |
| 79 | + { 0, } | |
| 80 | +}; | |
| 81 | +MODULE_DEVICE_TABLE(pci, ids); | |
| 82 | + | |
| 83 | +struct rx_header { | |
| 84 | +#define RXHDR_NEXT_ADDR_MASK 0xffffffu | |
| 85 | +#define RXHDR_NEXT_VALID (1u << 31) | |
| 86 | + __le32 next; | |
| 87 | +#define RXHDR_NEXT_RECV_FLAG 0x1 | |
| 88 | + __le32 recv; | |
| 89 | +#define RXHDR_LEN_MASK 0xfffu | |
| 90 | + __le16 len; | |
| 91 | + __le16 port; | |
| 92 | + __le32 reserved; | |
| 93 | + u8 timestamp[8]; | |
| 94 | +} __packed; | |
| 95 | + | |
| 96 | +#define PKT_PAYLOAD_SIZE 0x7e8 | |
| 97 | +struct rx_desc { | |
| 98 | + struct rx_header header; | |
| 99 | + u8 data[PKT_PAYLOAD_SIZE]; | |
| 100 | +} __packed; | |
| 101 | + | |
| 102 | +struct tx_header { | |
| 103 | + __le16 len; | |
| 104 | +#define TX_HDR_PORT_0 0x1 | |
| 105 | +#define TX_HDR_PORT_1 0x2 | |
| 106 | + u8 port; | |
| 107 | + u8 ts_enable; | |
| 108 | +#define TX_HDR_SENT 0x1 | |
| 109 | + __le32 sent; | |
| 110 | + u8 timestamp[8]; | |
| 111 | +} __packed; | |
| 112 | + | |
| 113 | +struct tx_desc { | |
| 114 | + struct tx_header header; | |
| 115 | + u8 data[PKT_PAYLOAD_SIZE]; | |
| 116 | +} __packed; | |
| 117 | + | |
| 118 | +#define FIFO_SIZE 64 | |
| 119 | + | |
| 120 | +static long polling_frequency = TIMER_INTERVAL_NSEC; | |
| 121 | + | |
| 122 | +struct bhf_dma { | |
| 123 | + u8 *buf; | |
| 124 | + size_t len; | |
| 125 | + dma_addr_t buf_phys; | |
| 126 | + | |
| 127 | + u8 *alloc; | |
| 128 | + size_t alloc_len; | |
| 129 | + dma_addr_t alloc_phys; | |
| 130 | +}; | |
| 131 | + | |
| 132 | +struct ec_bhf_priv { | |
| 133 | + struct net_device *net_dev; | |
| 134 | + | |
| 135 | + struct pci_dev *dev; | |
| 136 | + | |
| 137 | + void * __iomem io; | |
| 138 | + void * __iomem dma_io; | |
| 139 | + | |
| 140 | + struct hrtimer hrtimer; | |
| 141 | + | |
| 142 | + int tx_dma_chan; | |
| 143 | + int rx_dma_chan; | |
| 144 | + void * __iomem ec_io; | |
| 145 | + void * __iomem fifo_io; | |
| 146 | + void * __iomem mii_io; | |
| 147 | + void * __iomem mac_io; | |
| 148 | + | |
| 149 | + struct bhf_dma rx_buf; | |
| 150 | + struct rx_desc *rx_descs; | |
| 151 | + int rx_dnext; | |
| 152 | + int rx_dcount; | |
| 153 | + | |
| 154 | + struct bhf_dma tx_buf; | |
| 155 | + struct tx_desc *tx_descs; | |
| 156 | + int tx_dcount; | |
| 157 | + int tx_dnext; | |
| 158 | + | |
| 159 | + u64 stat_rx_bytes; | |
| 160 | + u64 stat_tx_bytes; | |
| 161 | +}; | |
| 162 | + | |
| 163 | +#define PRIV_TO_DEV(priv) (&(priv)->dev->dev) | |
| 164 | + | |
| 165 | +#define ETHERCAT_MASTER_ID 0x14 | |
| 166 | + | |
| 167 | +static void ec_bhf_print_status(struct ec_bhf_priv *priv) | |
| 168 | +{ | |
| 169 | + struct device *dev = PRIV_TO_DEV(priv); | |
| 170 | + | |
| 171 | + dev_dbg(dev, "Frame error counter: %d\n", | |
| 172 | + ioread8(priv->mac_io + MAC_FRAME_ERR_CNT)); | |
| 173 | + dev_dbg(dev, "RX error counter: %d\n", | |
| 174 | + ioread8(priv->mac_io + MAC_RX_ERR_CNT)); | |
| 175 | + dev_dbg(dev, "CRC error counter: %d\n", | |
| 176 | + ioread8(priv->mac_io + MAC_CRC_ERR_CNT)); | |
| 177 | + dev_dbg(dev, "TX frame counter: %d\n", | |
| 178 | + ioread32(priv->mac_io + MAC_TX_FRAME_CNT)); | |
| 179 | + dev_dbg(dev, "RX frame counter: %d\n", | |
| 180 | + ioread32(priv->mac_io + MAC_RX_FRAME_CNT)); | |
| 181 | + dev_dbg(dev, "TX fifo level: %d\n", | |
| 182 | + ioread8(priv->mac_io + MAC_TX_FIFO_LVL)); | |
| 183 | + dev_dbg(dev, "Dropped frames: %d\n", | |
| 184 | + ioread8(priv->mac_io + MAC_DROPPED_FRMS)); | |
| 185 | + dev_dbg(dev, "Connected with CCAT slot: %d\n", | |
| 186 | + ioread8(priv->mac_io + MAC_CONNECTED_CCAT_FLAG)); | |
| 187 | + dev_dbg(dev, "Link status: %d\n", | |
| 188 | + ioread8(priv->mii_io + MII_LINK_STATUS)); | |
| 189 | +} | |
| 190 | + | |
| 191 | +static void ec_bhf_reset(struct ec_bhf_priv *priv) | |
| 192 | +{ | |
| 193 | + iowrite8(0, priv->mac_io + MAC_FRAME_ERR_CNT); | |
| 194 | + iowrite8(0, priv->mac_io + MAC_RX_ERR_CNT); | |
| 195 | + iowrite8(0, priv->mac_io + MAC_CRC_ERR_CNT); | |
| 196 | + iowrite8(0, priv->mac_io + MAC_LNK_LST_ERR_CNT); | |
| 197 | + iowrite32(0, priv->mac_io + MAC_TX_FRAME_CNT); | |
| 198 | + iowrite32(0, priv->mac_io + MAC_RX_FRAME_CNT); | |
| 199 | + iowrite8(0, priv->mac_io + MAC_DROPPED_FRMS); | |
| 200 | + | |
| 201 | + iowrite8(0, priv->fifo_io + FIFO_TX_RESET); | |
| 202 | + iowrite8(0, priv->fifo_io + FIFO_RX_RESET); | |
| 203 | + | |
| 204 | + iowrite8(0, priv->mac_io + MAC_TX_FIFO_LVL); | |
| 205 | +} | |
| 206 | + | |
| 207 | +static void ec_bhf_send_packet(struct ec_bhf_priv *priv, struct tx_desc *desc) | |
| 208 | +{ | |
| 209 | + u32 len = le16_to_cpu(desc->header.len) + sizeof(desc->header); | |
| 210 | + u32 addr = (u8 *)desc - priv->tx_buf.buf; | |
| 211 | + | |
| 212 | + iowrite32((ALIGN(len, 8) << 24) | addr, priv->fifo_io + FIFO_TX_REG); | |
| 213 | + | |
| 214 | + dev_dbg(PRIV_TO_DEV(priv), "Done sending packet\n"); | |
| 215 | +} | |
| 216 | + | |
| 217 | +static int ec_bhf_desc_sent(struct tx_desc *desc) | |
| 218 | +{ | |
| 219 | + return le32_to_cpu(desc->header.sent) & TX_HDR_SENT; | |
| 220 | +} | |
| 221 | + | |
| 222 | +static void ec_bhf_process_tx(struct ec_bhf_priv *priv) | |
| 223 | +{ | |
| 224 | + if (unlikely(netif_queue_stopped(priv->net_dev))) { | |
| 225 | + /* Make sure that we perceive changes to tx_dnext. */ | |
| 226 | + smp_rmb(); | |
| 227 | + | |
| 228 | + if (ec_bhf_desc_sent(&priv->tx_descs[priv->tx_dnext])) | |
| 229 | + netif_wake_queue(priv->net_dev); | |
| 230 | + } | |
| 231 | +} | |
| 232 | + | |
| 233 | +static int ec_bhf_pkt_received(struct rx_desc *desc) | |
| 234 | +{ | |
| 235 | + return le32_to_cpu(desc->header.recv) & RXHDR_NEXT_RECV_FLAG; | |
| 236 | +} | |
| 237 | + | |
| 238 | +static void ec_bhf_add_rx_desc(struct ec_bhf_priv *priv, struct rx_desc *desc) | |
| 239 | +{ | |
| 240 | + iowrite32(FIFO_RX_ADDR_VALID | ((u8 *)(desc) - priv->rx_buf.buf), | |
| 241 | + priv->fifo_io + FIFO_RX_REG); | |
| 242 | +} | |
| 243 | + | |
| 244 | +static void ec_bhf_process_rx(struct ec_bhf_priv *priv) | |
| 245 | +{ | |
| 246 | + struct rx_desc *desc = &priv->rx_descs[priv->rx_dnext]; | |
| 247 | + struct device *dev = PRIV_TO_DEV(priv); | |
| 248 | + | |
| 249 | + while (ec_bhf_pkt_received(desc)) { | |
| 250 | + int pkt_size = (le16_to_cpu(desc->header.len) & | |
| 251 | + RXHDR_LEN_MASK) - sizeof(struct rx_header) - 4; | |
| 252 | + u8 *data = desc->data; | |
| 253 | + struct sk_buff *skb; | |
| 254 | + | |
| 255 | + skb = netdev_alloc_skb_ip_align(priv->net_dev, pkt_size); | |
| 256 | + dev_dbg(dev, "Received packet, size: %d\n", pkt_size); | |
| 257 | + | |
| 258 | + if (skb) { | |
| 259 | + memcpy(skb_put(skb, pkt_size), data, pkt_size); | |
| 260 | + skb->protocol = eth_type_trans(skb, priv->net_dev); | |
| 261 | + dev_dbg(dev, "Protocol type: %x\n", skb->protocol); | |
| 262 | + | |
| 263 | + priv->stat_rx_bytes += pkt_size; | |
| 264 | + | |
| 265 | + netif_rx(skb); | |
| 266 | + } else { | |
| 267 | + dev_err_ratelimited(dev, | |
| 268 | + "Couldn't allocate a skb_buff for a packet of size %u\n", | |
| 269 | + pkt_size); | |
| 270 | + } | |
| 271 | + | |
| 272 | + desc->header.recv = 0; | |
| 273 | + | |
| 274 | + ec_bhf_add_rx_desc(priv, desc); | |
| 275 | + | |
| 276 | + priv->rx_dnext = (priv->rx_dnext + 1) % priv->rx_dcount; | |
| 277 | + desc = &priv->rx_descs[priv->rx_dnext]; | |
| 278 | + } | |
| 279 | + | |
| 280 | +} | |
| 281 | + | |
| 282 | +static enum hrtimer_restart ec_bhf_timer_fun(struct hrtimer *timer) | |
| 283 | +{ | |
| 284 | + struct ec_bhf_priv *priv = container_of(timer, struct ec_bhf_priv, | |
| 285 | + hrtimer); | |
| 286 | + ec_bhf_process_rx(priv); | |
| 287 | + ec_bhf_process_tx(priv); | |
| 288 | + | |
| 289 | + if (!netif_running(priv->net_dev)) | |
| 290 | + return HRTIMER_NORESTART; | |
| 291 | + | |
| 292 | + hrtimer_forward_now(timer, ktime_set(0, polling_frequency)); | |
| 293 | + return HRTIMER_RESTART; | |
| 294 | +} | |
| 295 | + | |
| 296 | +static int ec_bhf_setup_offsets(struct ec_bhf_priv *priv) | |
| 297 | +{ | |
| 298 | + struct device *dev = PRIV_TO_DEV(priv); | |
| 299 | + unsigned block_count, i; | |
| 300 | + void * __iomem ec_info; | |
| 301 | + | |
| 302 | + dev_dbg(dev, "Info block:\n"); | |
| 303 | + dev_dbg(dev, "Type of function: %x\n", (unsigned)ioread16(priv->io)); | |
| 304 | + dev_dbg(dev, "Revision of function: %x\n", | |
| 305 | + (unsigned)ioread16(priv->io + INFO_BLOCK_REV)); | |
| 306 | + | |
| 307 | + block_count = ioread8(priv->io + INFO_BLOCK_BLK_CNT); | |
| 308 | + dev_dbg(dev, "Number of function blocks: %x\n", block_count); | |
| 309 | + | |
| 310 | + for (i = 0; i < block_count; i++) { | |
| 311 | + u16 type = ioread16(priv->io + i * INFO_BLOCK_SIZE + | |
| 312 | + INFO_BLOCK_TYPE); | |
| 313 | + if (type == ETHERCAT_MASTER_ID) | |
| 314 | + break; | |
| 315 | + } | |
| 316 | + if (i == block_count) { | |
| 317 | + dev_err(dev, "EtherCAT master with DMA block not found\n"); | |
| 318 | + return -ENODEV; | |
| 319 | + } | |
| 320 | + dev_dbg(dev, "EtherCAT master with DMA block found at pos: %d\n", i); | |
| 321 | + | |
| 322 | + ec_info = priv->io + i * INFO_BLOCK_SIZE; | |
| 323 | + dev_dbg(dev, "EtherCAT master revision: %d\n", | |
| 324 | + ioread16(ec_info + INFO_BLOCK_REV)); | |
| 325 | + | |
| 326 | + priv->tx_dma_chan = ioread8(ec_info + INFO_BLOCK_TX_CHAN); | |
| 327 | + dev_dbg(dev, "EtherCAT master tx dma channel: %d\n", | |
| 328 | + priv->tx_dma_chan); | |
| 329 | + | |
| 330 | + priv->rx_dma_chan = ioread8(ec_info + INFO_BLOCK_RX_CHAN); | |
| 331 | + dev_dbg(dev, "EtherCAT master rx dma channel: %d\n", | |
| 332 | + priv->rx_dma_chan); | |
| 333 | + | |
| 334 | + priv->ec_io = priv->io + ioread32(ec_info + INFO_BLOCK_OFFSET); | |
| 335 | + priv->mii_io = priv->ec_io + ioread32(priv->ec_io + EC_MII_OFFSET); | |
| 336 | + priv->fifo_io = priv->ec_io + ioread32(priv->ec_io + EC_FIFO_OFFSET); | |
| 337 | + priv->mac_io = priv->ec_io + ioread32(priv->ec_io + EC_MAC_OFFSET); | |
| 338 | + | |
| 339 | + dev_dbg(dev, | |
| 340 | + "EtherCAT block addres: %p, fifo address: %p, mii address: %p, mac address: %p\n", | |
| 341 | + priv->ec_io, priv->fifo_io, priv->mii_io, priv->mac_io); | |
| 342 | + | |
| 343 | + return 0; | |
| 344 | +} | |
| 345 | + | |
| 346 | +static netdev_tx_t ec_bhf_start_xmit(struct sk_buff *skb, | |
| 347 | + struct net_device *net_dev) | |
| 348 | +{ | |
| 349 | + struct ec_bhf_priv *priv = netdev_priv(net_dev); | |
| 350 | + struct tx_desc *desc; | |
| 351 | + unsigned len; | |
| 352 | + | |
| 353 | + dev_dbg(PRIV_TO_DEV(priv), "Starting xmit\n"); | |
| 354 | + | |
| 355 | + desc = &priv->tx_descs[priv->tx_dnext]; | |
| 356 | + | |
| 357 | + skb_copy_and_csum_dev(skb, desc->data); | |
| 358 | + len = skb->len; | |
| 359 | + | |
| 360 | + memset(&desc->header, 0, sizeof(desc->header)); | |
| 361 | + desc->header.len = cpu_to_le16(len); | |
| 362 | + desc->header.port = TX_HDR_PORT_0; | |
| 363 | + | |
| 364 | + ec_bhf_send_packet(priv, desc); | |
| 365 | + | |
| 366 | + priv->tx_dnext = (priv->tx_dnext + 1) % priv->tx_dcount; | |
| 367 | + | |
| 368 | + if (!ec_bhf_desc_sent(&priv->tx_descs[priv->tx_dnext])) { | |
| 369 | + /* Make sure that update updates to tx_dnext are perceived | |
| 370 | + * by timer routine. | |
| 371 | + */ | |
| 372 | + smp_wmb(); | |
| 373 | + | |
| 374 | + netif_stop_queue(net_dev); | |
| 375 | + | |
| 376 | + dev_dbg(PRIV_TO_DEV(priv), "Stopping netif queue\n"); | |
| 377 | + ec_bhf_print_status(priv); | |
| 378 | + } | |
| 379 | + | |
| 380 | + priv->stat_tx_bytes += len; | |
| 381 | + | |
| 382 | + dev_kfree_skb(skb); | |
| 383 | + | |
| 384 | + return NETDEV_TX_OK; | |
| 385 | +} | |
| 386 | + | |
| 387 | +static int ec_bhf_alloc_dma_mem(struct ec_bhf_priv *priv, | |
| 388 | + struct bhf_dma *buf, | |
| 389 | + int channel, | |
| 390 | + int size) | |
| 391 | +{ | |
| 392 | + int offset = channel * DMA_CHAN_SIZE + DMA_CHAN_OFFSET; | |
| 393 | + struct device *dev = PRIV_TO_DEV(priv); | |
| 394 | + u32 mask; | |
| 395 | + | |
| 396 | + iowrite32(0xffffffff, priv->dma_io + offset); | |
| 397 | + | |
| 398 | + mask = ioread32(priv->dma_io + offset); | |
| 399 | + mask &= DMA_WINDOW_SIZE_MASK; | |
| 400 | + dev_dbg(dev, "Read mask %x for channel %d\n", mask, channel); | |
| 401 | + | |
| 402 | + /* We want to allocate a chunk of memory that is: | |
| 403 | + * - aligned to the mask we just read | |
| 404 | + * - is of size 2^mask bytes (at most) | |
| 405 | + * In order to ensure that we will allocate buffer of | |
| 406 | + * 2 * 2^mask bytes. | |
| 407 | + */ | |
| 408 | + buf->len = min_t(int, ~mask + 1, size); | |
| 409 | + buf->alloc_len = 2 * buf->len; | |
| 410 | + | |
| 411 | + dev_dbg(dev, "Allocating %d bytes for channel %d", | |
| 412 | + (int)buf->alloc_len, channel); | |
| 413 | + buf->alloc = dma_alloc_coherent(dev, buf->alloc_len, &buf->alloc_phys, | |
| 414 | + GFP_KERNEL); | |
| 415 | + if (buf->alloc == NULL) { | |
| 416 | + dev_info(dev, "Failed to allocate buffer\n"); | |
| 417 | + return -ENOMEM; | |
| 418 | + } | |
| 419 | + | |
| 420 | + buf->buf_phys = (buf->alloc_phys + buf->len) & mask; | |
| 421 | + buf->buf = buf->alloc + (buf->buf_phys - buf->alloc_phys); | |
| 422 | + | |
| 423 | + iowrite32(0, priv->dma_io + offset + 4); | |
| 424 | + iowrite32(buf->buf_phys, priv->dma_io + offset); | |
| 425 | + dev_dbg(dev, "Buffer: %x and read from dev: %x", | |
| 426 | + (unsigned)buf->buf_phys, ioread32(priv->dma_io + offset)); | |
| 427 | + | |
| 428 | + return 0; | |
| 429 | +} | |
| 430 | + | |
| 431 | +static void ec_bhf_setup_tx_descs(struct ec_bhf_priv *priv) | |
| 432 | +{ | |
| 433 | + int i = 0; | |
| 434 | + | |
| 435 | + priv->tx_dcount = priv->tx_buf.len / sizeof(struct tx_desc); | |
| 436 | + priv->tx_descs = (struct tx_desc *) priv->tx_buf.buf; | |
| 437 | + priv->tx_dnext = 0; | |
| 438 | + | |
| 439 | + for (i = 0; i < priv->tx_dcount; i++) | |
| 440 | + priv->tx_descs[i].header.sent = cpu_to_le32(TX_HDR_SENT); | |
| 441 | +} | |
| 442 | + | |
| 443 | +static void ec_bhf_setup_rx_descs(struct ec_bhf_priv *priv) | |
| 444 | +{ | |
| 445 | + int i; | |
| 446 | + | |
| 447 | + priv->rx_dcount = priv->rx_buf.len / sizeof(struct rx_desc); | |
| 448 | + priv->rx_descs = (struct rx_desc *) priv->rx_buf.buf; | |
| 449 | + priv->rx_dnext = 0; | |
| 450 | + | |
| 451 | + for (i = 0; i < priv->rx_dcount; i++) { | |
| 452 | + struct rx_desc *desc = &priv->rx_descs[i]; | |
| 453 | + u32 next; | |
| 454 | + | |
| 455 | + if (i != priv->rx_dcount - 1) | |
| 456 | + next = (u8 *)(desc + 1) - priv->rx_buf.buf; | |
| 457 | + else | |
| 458 | + next = 0; | |
| 459 | + next |= RXHDR_NEXT_VALID; | |
| 460 | + desc->header.next = cpu_to_le32(next); | |
| 461 | + desc->header.recv = 0; | |
| 462 | + ec_bhf_add_rx_desc(priv, desc); | |
| 463 | + } | |
| 464 | +} | |
| 465 | + | |
| 466 | +static int ec_bhf_open(struct net_device *net_dev) | |
| 467 | +{ | |
| 468 | + struct ec_bhf_priv *priv = netdev_priv(net_dev); | |
| 469 | + struct device *dev = PRIV_TO_DEV(priv); | |
| 470 | + int err = 0; | |
| 471 | + | |
| 472 | + dev_info(dev, "Opening device\n"); | |
| 473 | + | |
| 474 | + ec_bhf_reset(priv); | |
| 475 | + | |
| 476 | + err = ec_bhf_alloc_dma_mem(priv, &priv->rx_buf, priv->rx_dma_chan, | |
| 477 | + FIFO_SIZE * sizeof(struct rx_desc)); | |
| 478 | + if (err) { | |
| 479 | + dev_err(dev, "Failed to allocate rx buffer\n"); | |
| 480 | + goto out; | |
| 481 | + } | |
| 482 | + ec_bhf_setup_rx_descs(priv); | |
| 483 | + | |
| 484 | + dev_info(dev, "RX buffer allocated, address: %x\n", | |
| 485 | + (unsigned)priv->rx_buf.buf_phys); | |
| 486 | + | |
| 487 | + err = ec_bhf_alloc_dma_mem(priv, &priv->tx_buf, priv->tx_dma_chan, | |
| 488 | + FIFO_SIZE * sizeof(struct tx_desc)); | |
| 489 | + if (err) { | |
| 490 | + dev_err(dev, "Failed to allocate tx buffer\n"); | |
| 491 | + goto error_rx_free; | |
| 492 | + } | |
| 493 | + dev_dbg(dev, "TX buffer allocated, addres: %x\n", | |
| 494 | + (unsigned)priv->tx_buf.buf_phys); | |
| 495 | + | |
| 496 | + iowrite8(0, priv->mii_io + MII_MAC_FILT_FLAG); | |
| 497 | + | |
| 498 | + ec_bhf_setup_tx_descs(priv); | |
| 499 | + | |
| 500 | + netif_start_queue(net_dev); | |
| 501 | + | |
| 502 | + hrtimer_init(&priv->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); | |
| 503 | + priv->hrtimer.function = ec_bhf_timer_fun; | |
| 504 | + hrtimer_start(&priv->hrtimer, ktime_set(0, polling_frequency), | |
| 505 | + HRTIMER_MODE_REL); | |
| 506 | + | |
| 507 | + dev_info(PRIV_TO_DEV(priv), "Device open\n"); | |
| 508 | + | |
| 509 | + ec_bhf_print_status(priv); | |
| 510 | + | |
| 511 | + return 0; | |
| 512 | + | |
| 513 | +error_rx_free: | |
| 514 | + dma_free_coherent(dev, priv->rx_buf.alloc_len, priv->rx_buf.alloc, | |
| 515 | + priv->rx_buf.alloc_len); | |
| 516 | +out: | |
| 517 | + return err; | |
| 518 | +} | |
| 519 | + | |
| 520 | +static int ec_bhf_stop(struct net_device *net_dev) | |
| 521 | +{ | |
| 522 | + struct ec_bhf_priv *priv = netdev_priv(net_dev); | |
| 523 | + struct device *dev = PRIV_TO_DEV(priv); | |
| 524 | + | |
| 525 | + hrtimer_cancel(&priv->hrtimer); | |
| 526 | + | |
| 527 | + ec_bhf_reset(priv); | |
| 528 | + | |
| 529 | + netif_tx_disable(net_dev); | |
| 530 | + | |
| 531 | + dma_free_coherent(dev, priv->tx_buf.alloc_len, | |
| 532 | + priv->tx_buf.alloc, priv->tx_buf.alloc_phys); | |
| 533 | + dma_free_coherent(dev, priv->rx_buf.alloc_len, | |
| 534 | + priv->rx_buf.alloc, priv->rx_buf.alloc_phys); | |
| 535 | + | |
| 536 | + return 0; | |
| 537 | +} | |
| 538 | + | |
| 539 | +static struct rtnl_link_stats64 * | |
| 540 | +ec_bhf_get_stats(struct net_device *net_dev, | |
| 541 | + struct rtnl_link_stats64 *stats) | |
| 542 | +{ | |
| 543 | + struct ec_bhf_priv *priv = netdev_priv(net_dev); | |
| 544 | + | |
| 545 | + stats->rx_errors = ioread8(priv->mac_io + MAC_RX_ERR_CNT) + | |
| 546 | + ioread8(priv->mac_io + MAC_CRC_ERR_CNT) + | |
| 547 | + ioread8(priv->mac_io + MAC_FRAME_ERR_CNT); | |
| 548 | + stats->rx_packets = ioread32(priv->mac_io + MAC_RX_FRAME_CNT); | |
| 549 | + stats->tx_packets = ioread32(priv->mac_io + MAC_TX_FRAME_CNT); | |
| 550 | + stats->rx_dropped = ioread8(priv->mac_io + MAC_DROPPED_FRMS); | |
| 551 | + | |
| 552 | + stats->tx_bytes = priv->stat_tx_bytes; | |
| 553 | + stats->rx_bytes = priv->stat_rx_bytes; | |
| 554 | + | |
| 555 | + return stats; | |
| 556 | +} | |
| 557 | + | |
| 558 | +static const struct net_device_ops ec_bhf_netdev_ops = { | |
| 559 | + .ndo_start_xmit = ec_bhf_start_xmit, | |
| 560 | + .ndo_open = ec_bhf_open, | |
| 561 | + .ndo_stop = ec_bhf_stop, | |
| 562 | + .ndo_get_stats64 = ec_bhf_get_stats, | |
| 563 | + .ndo_change_mtu = eth_change_mtu, | |
| 564 | + .ndo_validate_addr = eth_validate_addr, | |
| 565 | + .ndo_set_mac_address = eth_mac_addr | |
| 566 | +}; | |
| 567 | + | |
| 568 | +static int ec_bhf_probe(struct pci_dev *dev, const struct pci_device_id *id) | |
| 569 | +{ | |
| 570 | + struct net_device *net_dev; | |
| 571 | + struct ec_bhf_priv *priv; | |
| 572 | + void * __iomem dma_io; | |
| 573 | + void * __iomem io; | |
| 574 | + int err = 0; | |
| 575 | + | |
| 576 | + err = pci_enable_device(dev); | |
| 577 | + if (err) | |
| 578 | + return err; | |
| 579 | + | |
| 580 | + pci_set_master(dev); | |
| 581 | + | |
| 582 | + err = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); | |
| 583 | + if (err) { | |
| 584 | + dev_err(&dev->dev, | |
| 585 | + "Required dma mask not supported, failed to initialize device\n"); | |
| 586 | + err = -EIO; | |
| 587 | + goto err_disable_dev; | |
| 588 | + } | |
| 589 | + | |
| 590 | + err = pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(32)); | |
| 591 | + if (err) { | |
| 592 | + dev_err(&dev->dev, | |
| 593 | + "Required dma mask not supported, failed to initialize device\n"); | |
| 594 | + goto err_disable_dev; | |
| 595 | + } | |
| 596 | + | |
| 597 | + err = pci_request_regions(dev, "ec_bhf"); | |
| 598 | + if (err) { | |
| 599 | + dev_err(&dev->dev, "Failed to request pci memory regions\n"); | |
| 600 | + goto err_disable_dev; | |
| 601 | + } | |
| 602 | + | |
| 603 | + io = pci_iomap(dev, 0, 0); | |
| 604 | + if (!io) { | |
| 605 | + dev_err(&dev->dev, "Failed to map pci card memory bar 0"); | |
| 606 | + err = -EIO; | |
| 607 | + goto err_release_regions; | |
| 608 | + } | |
| 609 | + | |
| 610 | + dma_io = pci_iomap(dev, 2, 0); | |
| 611 | + if (!dma_io) { | |
| 612 | + dev_err(&dev->dev, "Failed to map pci card memory bar 2"); | |
| 613 | + err = -EIO; | |
| 614 | + goto err_unmap; | |
| 615 | + } | |
| 616 | + | |
| 617 | + net_dev = alloc_etherdev(sizeof(struct ec_bhf_priv)); | |
| 618 | + if (net_dev == 0) { | |
| 619 | + err = -ENOMEM; | |
| 620 | + goto err_unmap_dma_io; | |
| 621 | + } | |
| 622 | + | |
| 623 | + pci_set_drvdata(dev, net_dev); | |
| 624 | + SET_NETDEV_DEV(net_dev, &dev->dev); | |
| 625 | + | |
| 626 | + net_dev->features = 0; | |
| 627 | + net_dev->flags |= IFF_NOARP; | |
| 628 | + | |
| 629 | + net_dev->netdev_ops = &ec_bhf_netdev_ops; | |
| 630 | + | |
| 631 | + priv = netdev_priv(net_dev); | |
| 632 | + priv->net_dev = net_dev; | |
| 633 | + priv->io = io; | |
| 634 | + priv->dma_io = dma_io; | |
| 635 | + priv->dev = dev; | |
| 636 | + | |
| 637 | + err = ec_bhf_setup_offsets(priv); | |
| 638 | + if (err < 0) | |
| 639 | + goto err_free_net_dev; | |
| 640 | + | |
| 641 | + memcpy_fromio(net_dev->dev_addr, priv->mii_io + MII_MAC_ADDR, 6); | |
| 642 | + | |
| 643 | + dev_dbg(&dev->dev, "CX5020 Ethercat master address: %pM\n", | |
| 644 | + net_dev->dev_addr); | |
| 645 | + | |
| 646 | + err = register_netdev(net_dev); | |
| 647 | + if (err < 0) | |
| 648 | + goto err_free_net_dev; | |
| 649 | + | |
| 650 | + return 0; | |
| 651 | + | |
| 652 | +err_free_net_dev: | |
| 653 | + free_netdev(net_dev); | |
| 654 | +err_unmap_dma_io: | |
| 655 | + pci_iounmap(dev, dma_io); | |
| 656 | +err_unmap: | |
| 657 | + pci_iounmap(dev, io); | |
| 658 | +err_release_regions: | |
| 659 | + pci_release_regions(dev); | |
| 660 | +err_disable_dev: | |
| 661 | + pci_clear_master(dev); | |
| 662 | + pci_disable_device(dev); | |
| 663 | + | |
| 664 | + return err; | |
| 665 | +} | |
| 666 | + | |
| 667 | +static void ec_bhf_remove(struct pci_dev *dev) | |
| 668 | +{ | |
| 669 | + struct net_device *net_dev = pci_get_drvdata(dev); | |
| 670 | + struct ec_bhf_priv *priv = netdev_priv(net_dev); | |
| 671 | + | |
| 672 | + unregister_netdev(net_dev); | |
| 673 | + free_netdev(net_dev); | |
| 674 | + | |
| 675 | + pci_iounmap(dev, priv->dma_io); | |
| 676 | + pci_iounmap(dev, priv->io); | |
| 677 | + pci_release_regions(dev); | |
| 678 | + pci_clear_master(dev); | |
| 679 | + pci_disable_device(dev); | |
| 680 | +} | |
| 681 | + | |
| 682 | +static struct pci_driver pci_driver = { | |
| 683 | + .name = "ec_bhf", | |
| 684 | + .id_table = ids, | |
| 685 | + .probe = ec_bhf_probe, | |
| 686 | + .remove = ec_bhf_remove, | |
| 687 | +}; | |
| 688 | + | |
| 689 | +static int __init ec_bhf_init(void) | |
| 690 | +{ | |
| 691 | + return pci_register_driver(&pci_driver); | |
| 692 | +} | |
| 693 | + | |
| 694 | +static void __exit ec_bhf_exit(void) | |
| 695 | +{ | |
| 696 | + pci_unregister_driver(&pci_driver); | |
| 697 | +} | |
| 698 | + | |
| 699 | +module_init(ec_bhf_init); | |
| 700 | +module_exit(ec_bhf_exit); | |
| 701 | + | |
| 702 | +module_param(polling_frequency, long, S_IRUGO); | |
| 703 | +MODULE_PARM_DESC(polling_frequency, "Polling timer frequency in ns"); | |
| 704 | + | |
| 705 | +MODULE_LICENSE("GPL"); | |
| 706 | +MODULE_AUTHOR("Dariusz Marcinkiewicz <reksio@newterm.pl>"); | |
| @@ -4949,6 +4949,12 @@ static void be_eeh_resume(struct pci_dev *pdev) · 4948 unmodified lines | ||
| 4949 | 4949 | if (status) |
| 4950 | 4950 | goto err; |
| 4951 | 4951 | |
| 4952 | + /* On some BE3 FW versions, after a HW reset, | |
| 4953 | + * interrupts will remain disabled for each function. | |
| 4954 | + * So, explicitly enable interrupts | |
| 4955 | + */ | |
| 4956 | + be_intr_set(adapter, true); | |
| 4957 | + | |
| 4952 | 4958 | /* tell fw we're ready to fire cmds */ |
| 4953 | 4959 | status = be_cmd_fw_init(adapter); |
| 4954 | 4960 | if (status) |
| @@ -1988,7 +1988,7 @@ jme_alloc_txdesc(struct jme_adapter *jme, · 1987 unmodified lines | ||
| 1988 | 1988 | return idx; |
| 1989 | 1989 | } |
| 1990 | 1990 | |
| 1991 | −static void | |
| 1991 | +static int | |
| 1992 | 1992 | jme_fill_tx_map(struct pci_dev *pdev, |
| 1993 | 1993 | struct txdesc *txdesc, |
| 1994 | 1994 | struct jme_buffer_info *txbi, |
| @@ -2005,6 +2005,9 @@ jme_fill_tx_map(struct pci_dev *pdev, · 10 unmodified lines | ||
| 2005 | 2005 | len, |
| 2006 | 2006 | PCI_DMA_TODEVICE); |
| 2007 | 2007 | |
| 2008 | + if (unlikely(pci_dma_mapping_error(pdev, dmaaddr))) | |
| 2009 | + return -EINVAL; | |
| 2010 | + | |
| 2008 | 2011 | pci_dma_sync_single_for_device(pdev, |
| 2009 | 2012 | dmaaddr, |
| 2010 | 2013 | len, |
| @@ -2021,9 +2024,30 @@ jme_fill_tx_map(struct pci_dev *pdev, · 10 unmodified lines | ||
| 2021 | 2024 | |
| 2022 | 2025 | txbi->mapping = dmaaddr; |
| 2023 | 2026 | txbi->len = len; |
| 2027 | + return 0; | |
| 2024 | 2028 | } |
| 2025 | 2029 | |
| 2026 | −static void | |
| 2030 | +static void jme_drop_tx_map(struct jme_adapter *jme, int startidx, int count) | |
| 2031 | +{ | |
| 2032 | + struct jme_ring *txring = &(jme->txring[0]); | |
| 2033 | + struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; | |
| 2034 | + int mask = jme->tx_ring_mask; | |
| 2035 | + int j; | |
| 2036 | + | |
| 2037 | + for (j = 0 ; j < count ; j++) { | |
| 2038 | + ctxbi = txbi + ((startidx + j + 2) & (mask)); | |
| 2039 | + pci_unmap_page(jme->pdev, | |
| 2040 | + ctxbi->mapping, | |
| 2041 | + ctxbi->len, | |
| 2042 | + PCI_DMA_TODEVICE); | |
| 2043 | + | |
| 2044 | + ctxbi->mapping = 0; | |
| 2045 | + ctxbi->len = 0; | |
| 2046 | + } | |
| 2047 | + | |
| 2048 | +} | |
| 2049 | + | |
| 2050 | +static int | |
| 2027 | 2051 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
| 2028 | 2052 | { |
| 2029 | 2053 | struct jme_ring *txring = &(jme->txring[0]); |
| @@ -2034,25 +2058,37 @@ jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) · 4 unmodified lines | ||
| 2034 | 2058 | int mask = jme->tx_ring_mask; |
| 2035 | 2059 | const struct skb_frag_struct *frag; |
| 2036 | 2060 | u32 len; |
| 2061 | + int ret = 0; | |
| 2037 | 2062 | |
| 2038 | 2063 | for (i = 0 ; i < nr_frags ; ++i) { |
| 2039 | 2064 | frag = &skb_shinfo(skb)->frags[i]; |
| 2040 | 2065 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); |
| 2041 | 2066 | ctxbi = txbi + ((idx + i + 2) & (mask)); |
| 2042 | 2067 | |
| 2043 | − jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, | |
| 2068 | + ret = jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, | |
| 2044 | 2069 | skb_frag_page(frag), |
| 2045 | 2070 | frag->page_offset, skb_frag_size(frag), hidma); |
| 2071 | + if (ret) { | |
| 2072 | + jme_drop_tx_map(jme, idx, i); | |
| 2073 | + goto out; | |
| 2074 | + } | |
| 2075 | + | |
| 2046 | 2076 | } |
| 2047 | 2077 | |
| 2048 | 2078 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; |
| 2049 | 2079 | ctxdesc = txdesc + ((idx + 1) & (mask)); |
| 2050 | 2080 | ctxbi = txbi + ((idx + 1) & (mask)); |
| 2051 | − jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
| 2081 | + ret = jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
| 2052 | 2082 | offset_in_page(skb->data), len, hidma); |
| 2083 | + if (ret) | |
| 2084 | + jme_drop_tx_map(jme, idx, i); | |
| 2085 | + | |
| 2086 | +out: | |
| 2087 | + return ret; | |
| 2053 | 2088 | |
| 2054 | 2089 | } |
| 2055 | 2090 | |
| 2091 | + | |
| 2056 | 2092 | static int |
| 2057 | 2093 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
| 2058 | 2094 | { |
| @@ -2131,6 +2167,7 @@ jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) · 72 unmodified lines | ||
| 2131 | 2167 | struct txdesc *txdesc; |
| 2132 | 2168 | struct jme_buffer_info *txbi; |
| 2133 | 2169 | u8 flags; |
| 2170 | + int ret = 0; | |
| 2134 | 2171 | |
| 2135 | 2172 | txdesc = (struct txdesc *)txring->desc + idx; |
| 2136 | 2173 | txbi = txring->bufinf + idx; |
| @@ -2155,7 +2192,10 @@ jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) · 18 unmodified lines | ||
| 2155 | 2192 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) |
| 2156 | 2193 | jme_tx_csum(jme, skb, &flags); |
| 2157 | 2194 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); |
| 2158 | − jme_map_tx_skb(jme, skb, idx); | |
| 2195 | + ret = jme_map_tx_skb(jme, skb, idx); | |
| 2196 | + if (ret) | |
| 2197 | + return ret; | |
| 2198 | + | |
| 2159 | 2199 | txdesc->desc1.flags = flags; |
| 2160 | 2200 | /* |
| 2161 | 2201 | * Set tx buffer info after telling NIC to send |
| @@ -2228,7 +2268,8 @@ jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) · 66 unmodified lines | ||
| 2228 | 2268 | return NETDEV_TX_BUSY; |
| 2229 | 2269 | } |
| 2230 | 2270 | |
| 2231 | − jme_fill_tx_desc(jme, skb, idx); | |
| 2271 | + if (jme_fill_tx_desc(jme, skb, idx)) | |
| 2272 | + return NETDEV_TX_OK; | |
| 2232 | 2273 | |
| 2233 | 2274 | jwrite32(jme, JME_TXCS, jme->reg_txcs | |
| 2234 | 2275 | TXCS_SELECT_QUEUE0 | |
| @@ -1253,12 +1253,12 @@ static struct mlx4_cmd_info cmd_info[] = { · 1252 unmodified lines | ||
| 1253 | 1253 | }, |
| 1254 | 1254 | { |
| 1255 | 1255 | .opcode = MLX4_CMD_UPDATE_QP, |
| 1256 | − .has_inbox = false, | |
| 1256 | + .has_inbox = true, | |
| 1257 | 1257 | .has_outbox = false, |
| 1258 | 1258 | .out_is_imm = false, |
| 1259 | 1259 | .encode_slave_id = false, |
| 1260 | 1260 | .verify = NULL, |
| 1261 | − .wrapper = mlx4_CMD_EPERM_wrapper | |
| 1261 | + .wrapper = mlx4_UPDATE_QP_wrapper | |
| 1262 | 1262 | }, |
| 1263 | 1263 | { |
| 1264 | 1264 | .opcode = MLX4_CMD_GET_OP_REQ, |
| @@ -1195,6 +1195,12 @@ int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave, · 1194 unmodified lines | ||
| 1195 | 1195 | struct mlx4_cmd_mailbox *outbox, |
| 1196 | 1196 | struct mlx4_cmd_info *cmd); |
| 1197 | 1197 | |
| 1198 | +int mlx4_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave, | |
| 1199 | + struct mlx4_vhcr *vhcr, | |
| 1200 | + struct mlx4_cmd_mailbox *inbox, | |
| 1201 | + struct mlx4_cmd_mailbox *outbox, | |
| 1202 | + struct mlx4_cmd_info *cmd); | |
| 1203 | + | |
| 1198 | 1204 | int mlx4_PROMISC_wrapper(struct mlx4_dev *dev, int slave, |
| 1199 | 1205 | struct mlx4_vhcr *vhcr, |
| 1200 | 1206 | struct mlx4_cmd_mailbox *inbox, |
| @@ -389,6 +389,41 @@ err_icm: · 388 unmodified lines | ||
| 389 | 389 | |
| 390 | 390 | EXPORT_SYMBOL_GPL(mlx4_qp_alloc); |
| 391 | 391 | |
| 392 | +#define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC | |
| 393 | +int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp, | |
| 394 | + enum mlx4_update_qp_attr attr, | |
| 395 | + struct mlx4_update_qp_params *params) | |
| 396 | +{ | |
| 397 | + struct mlx4_cmd_mailbox *mailbox; | |
| 398 | + struct mlx4_update_qp_context *cmd; | |
| 399 | + u64 pri_addr_path_mask = 0; | |
| 400 | + int err = 0; | |
| 401 | + | |
| 402 | + mailbox = mlx4_alloc_cmd_mailbox(dev); | |
| 403 | + if (IS_ERR(mailbox)) | |
| 404 | + return PTR_ERR(mailbox); | |
| 405 | + | |
| 406 | + cmd = (struct mlx4_update_qp_context *)mailbox->buf; | |
| 407 | + | |
| 408 | + if (!attr || (attr & ~MLX4_UPDATE_QP_SUPPORTED_ATTRS)) | |
| 409 | + return -EINVAL; | |
| 410 | + | |
| 411 | + if (attr & MLX4_UPDATE_QP_SMAC) { | |
| 412 | + pri_addr_path_mask |= 1ULL << MLX4_UPD_QP_PATH_MASK_MAC_INDEX; | |
| 413 | + cmd->qp_context.pri_path.grh_mylmc = params->smac_index; | |
| 414 | + } | |
| 415 | + | |
| 416 | + cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask); | |
| 417 | + | |
| 418 | + err = mlx4_cmd(dev, mailbox->dma, qp->qpn & 0xffffff, 0, | |
| 419 | + MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A, | |
| 420 | + MLX4_CMD_NATIVE); | |
| 421 | + | |
| 422 | + mlx4_free_cmd_mailbox(dev, mailbox); | |
| 423 | + return err; | |
| 424 | +} | |
| 425 | +EXPORT_SYMBOL_GPL(mlx4_update_qp); | |
| 426 | + | |
| 392 | 427 | void mlx4_qp_remove(struct mlx4_dev *dev, struct mlx4_qp *qp) |
| 393 | 428 | { |
| 394 | 429 | struct mlx4_qp_table *qp_table = &mlx4_priv(dev)->qp_table; |
| @@ -3895,6 +3895,60 @@ static int add_eth_header(struct mlx4_dev *dev, int slave, · 3894 unmodified lines | ||
| 3895 | 3895 | |
| 3896 | 3896 | } |
| 3897 | 3897 | |
| 3898 | +#define MLX4_UPD_QP_PATH_MASK_SUPPORTED (1ULL << MLX4_UPD_QP_PATH_MASK_MAC_INDEX) | |
| 3899 | +int mlx4_UPDATE_QP_wrapper(struct mlx4_dev *dev, int slave, | |
| 3900 | + struct mlx4_vhcr *vhcr, | |
| 3901 | + struct mlx4_cmd_mailbox *inbox, | |
| 3902 | + struct mlx4_cmd_mailbox *outbox, | |
| 3903 | + struct mlx4_cmd_info *cmd_info) | |
| 3904 | +{ | |
| 3905 | + int err; | |
| 3906 | + u32 qpn = vhcr->in_modifier & 0xffffff; | |
| 3907 | + struct res_qp *rqp; | |
| 3908 | + u64 mac; | |
| 3909 | + unsigned port; | |
| 3910 | + u64 pri_addr_path_mask; | |
| 3911 | + struct mlx4_update_qp_context *cmd; | |
| 3912 | + int smac_index; | |
| 3913 | + | |
| 3914 | + cmd = (struct mlx4_update_qp_context *)inbox->buf; | |
| 3915 | + | |
| 3916 | + pri_addr_path_mask = be64_to_cpu(cmd->primary_addr_path_mask); | |
| 3917 | + if (cmd->qp_mask || cmd->secondary_addr_path_mask || | |
| 3918 | + (pri_addr_path_mask & ~MLX4_UPD_QP_PATH_MASK_SUPPORTED)) | |
| 3919 | + return -EPERM; | |
| 3920 | + | |
| 3921 | + /* Just change the smac for the QP */ | |
| 3922 | + err = get_res(dev, slave, qpn, RES_QP, &rqp); | |
| 3923 | + if (err) { | |
| 3924 | + mlx4_err(dev, "Updating qpn 0x%x for slave %d rejected\n", qpn, slave); | |
| 3925 | + return err; | |
| 3926 | + } | |
| 3927 | + | |
| 3928 | + port = (rqp->sched_queue >> 6 & 1) + 1; | |
| 3929 | + smac_index = cmd->qp_context.pri_path.grh_mylmc; | |
| 3930 | + err = mac_find_smac_ix_in_slave(dev, slave, port, | |
| 3931 | + smac_index, &mac); | |
| 3932 | + if (err) { | |
| 3933 | + mlx4_err(dev, "Failed to update qpn 0x%x, MAC is invalid. smac_ix: %d\n", | |
| 3934 | + qpn, smac_index); | |
| 3935 | + goto err_mac; | |
| 3936 | + } | |
| 3937 | + | |
| 3938 | + err = mlx4_cmd(dev, inbox->dma, | |
| 3939 | + vhcr->in_modifier, 0, | |
| 3940 | + MLX4_CMD_UPDATE_QP, MLX4_CMD_TIME_CLASS_A, | |
| 3941 | + MLX4_CMD_NATIVE); | |
| 3942 | + if (err) { | |
| 3943 | + mlx4_err(dev, "Failed to update qpn on qpn 0x%x, command failed\n", qpn); | |
| 3944 | + goto err_mac; | |
| 3945 | + } | |
| 3946 | + | |
| 3947 | +err_mac: | |
| 3948 | + put_res(dev, slave, qpn, RES_QP); | |
| 3949 | + return err; | |
| 3950 | +} | |
| 3951 | + | |
| 3898 | 3952 | int mlx4_QP_FLOW_STEERING_ATTACH_wrapper(struct mlx4_dev *dev, int slave, |
| 3899 | 3953 | struct mlx4_vhcr *vhcr, |
| 3900 | 3954 | struct mlx4_cmd_mailbox *inbox, |
| @@ -1719,22 +1719,6 @@ static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring) · 1718 unmodified lines | ||
| 1719 | 1719 | tx_ring->producer; |
| 1720 | 1720 | } |
| 1721 | 1721 | |
| 1722 | −static inline int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter, | |
| 1723 | − struct net_device *netdev) | |
| 1724 | −{ | |
| 1725 | − int err; | |
| 1726 | − | |
| 1727 | − netdev->num_tx_queues = adapter->drv_tx_rings; | |
| 1728 | − netdev->real_num_tx_queues = adapter->drv_tx_rings; | |
| 1729 | − | |
| 1730 | − err = netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings); | |
| 1731 | − if (err) | |
| 1732 | − netdev_err(netdev, "failed to set %d Tx queues\n", | |
| 1733 | − adapter->drv_tx_rings); | |
| 1734 | − | |
| 1735 | − return err; | |
| 1736 | −} | |
| 1737 | − | |
| 1738 | 1722 | struct qlcnic_nic_template { |
| 1739 | 1723 | int (*config_bridged_mode) (struct qlcnic_adapter *, u32); |
| 1740 | 1724 | int (*config_led) (struct qlcnic_adapter *, u32, u32); |
| @@ -2206,6 +2206,31 @@ static void qlcnic_82xx_set_mac_filter_count(struct qlcnic_adapter *adapter) · 2205 unmodified lines | ||
| 2206 | 2206 | ahw->max_uc_count = count; |
| 2207 | 2207 | } |
| 2208 | 2208 | |
| 2209 | +static int qlcnic_set_real_num_queues(struct qlcnic_adapter *adapter, | |
| 2210 | + u8 tx_queues, u8 rx_queues) | |
| 2211 | +{ | |
| 2212 | + struct net_device *netdev = adapter->netdev; | |
| 2213 | + int err = 0; | |
| 2214 | + | |
| 2215 | + if (tx_queues) { | |
| 2216 | + err = netif_set_real_num_tx_queues(netdev, tx_queues); | |
| 2217 | + if (err) { | |
| 2218 | + netdev_err(netdev, "failed to set %d Tx queues\n", | |
| 2219 | + tx_queues); | |
| 2220 | + return err; | |
| 2221 | + } | |
| 2222 | + } | |
| 2223 | + | |
| 2224 | + if (rx_queues) { | |
| 2225 | + err = netif_set_real_num_rx_queues(netdev, rx_queues); | |
| 2226 | + if (err) | |
| 2227 | + netdev_err(netdev, "failed to set %d Rx queues\n", | |
| 2228 | + rx_queues); | |
| 2229 | + } | |
| 2230 | + | |
| 2231 | + return err; | |
| 2232 | +} | |
| 2233 | + | |
| 2209 | 2234 | int |
| 2210 | 2235 | qlcnic_setup_netdev(struct qlcnic_adapter *adapter, struct net_device *netdev, |
| 2211 | 2236 | int pci_using_dac) |
| @@ -2269,7 +2294,8 @@ qlcnic_setup_netdev(struct qlcnic_adapter *adapter, struct net_device *netdev, · 57 unmodified lines | ||
| 2269 | 2294 | netdev->priv_flags |= IFF_UNICAST_FLT; |
| 2270 | 2295 | netdev->irq = adapter->msix_entries[0].vector; |
| 2271 | 2296 | |
| 2272 | − err = qlcnic_set_real_num_queues(adapter, netdev); | |
| 2297 | + err = qlcnic_set_real_num_queues(adapter, adapter->drv_tx_rings, | |
| 2298 | + adapter->drv_sds_rings); | |
| 2273 | 2299 | if (err) |
| 2274 | 2300 | return err; |
| 2275 | 2301 | |
| @@ -2943,9 +2969,13 @@ static void qlcnic_dump_tx_rings(struct qlcnic_adapter *adapter) · 667 unmodified lines | ||
| 2943 | 2969 | tx_ring->tx_stats.xmit_called, |
| 2944 | 2970 | tx_ring->tx_stats.xmit_on, |
| 2945 | 2971 | tx_ring->tx_stats.xmit_off); |
| 2972 | + | |
| 2973 | + if (tx_ring->crb_intr_mask) | |
| 2974 | + netdev_info(netdev, "crb_intr_mask=%d\n", | |
| 2975 | + readl(tx_ring->crb_intr_mask)); | |
| 2976 | + | |
| 2946 | 2977 | netdev_info(netdev, |
| 2947 | − "crb_intr_mask=%d, hw_producer=%d, sw_producer=%d sw_consumer=%d, hw_consumer=%d\n", | |
| 2948 | − readl(tx_ring->crb_intr_mask), | |
| 2978 | + "hw_producer=%d, sw_producer=%d sw_consumer=%d, hw_consumer=%d\n", | |
| 2949 | 2979 | readl(tx_ring->crb_cmd_producer), |
| 2950 | 2980 | tx_ring->producer, tx_ring->sw_consumer, |
| 2951 | 2981 | le32_to_cpu(*(tx_ring->hw_consumer))); |
| @@ -3978,12 +4008,21 @@ int qlcnic_validate_rings(struct qlcnic_adapter *adapter, __u32 ring_cnt, · 1026 unmodified lines | ||
| 3978 | 4008 | int qlcnic_setup_rings(struct qlcnic_adapter *adapter) |
| 3979 | 4009 | { |
| 3980 | 4010 | struct net_device *netdev = adapter->netdev; |
| 4011 | + u8 tx_rings, rx_rings; | |
| 3981 | 4012 | int err; |
| 3982 | 4013 | |
| 3983 | 4014 | if (test_bit(__QLCNIC_RESETTING, &adapter->state)) |
| 3984 | 4015 | return -EBUSY; |
| 3985 | 4016 | |
| 4017 | + tx_rings = adapter->drv_tss_rings; | |
| 4018 | + rx_rings = adapter->drv_rss_rings; | |
| 4019 | + | |
| 3986 | 4020 | netif_device_detach(netdev); |
| 4021 | + | |
| 4022 | + err = qlcnic_set_real_num_queues(adapter, tx_rings, rx_rings); | |
| 4023 | + if (err) | |
| 4024 | + goto done; | |
| 4025 | + | |
| 3987 | 4026 | if (netif_running(netdev)) |
| 3988 | 4027 | __qlcnic_down(adapter, netdev); |
| 3989 | 4028 | |
| @@ -4003,7 +4042,17 @@ int qlcnic_setup_rings(struct qlcnic_adapter *adapter) · 13 unmodified lines | ||
| 4003 | 4042 | return err; |
| 4004 | 4043 | } |
| 4005 | 4044 | |
| 4006 | − netif_set_real_num_tx_queues(netdev, adapter->drv_tx_rings); | |
| 4045 | + /* Check if we need to update real_num_{tx|rx}_queues because | |
| 4046 | + * qlcnic_setup_intr() may change Tx/Rx rings size | |
| 4047 | + */ | |
| 4048 | + if ((tx_rings != adapter->drv_tx_rings) || | |
| 4049 | + (rx_rings != adapter->drv_sds_rings)) { | |
| 4050 | + err = qlcnic_set_real_num_queues(adapter, | |
| 4051 | + adapter->drv_tx_rings, | |
| 4052 | + adapter->drv_sds_rings); | |
| 4053 | + if (err) | |
| 4054 | + goto done; | |
| 4055 | + } | |
| 4007 | 4056 | |
| 4008 | 4057 | if (qlcnic_83xx_check(adapter)) { |
| 4009 | 4058 | qlcnic_83xx_initialize_nic(adapter, 1); |
| @@ -156,13 +156,15 @@ void efx_nic_fini_interrupt(struct efx_nic *efx) · 155 unmodified lines | ||
| 156 | 156 | efx->net_dev->rx_cpu_rmap = NULL; |
| 157 | 157 | #endif |
| 158 | 158 | |
| 159 | − /* Disable MSI/MSI-X interrupts */ | |
| 160 | − efx_for_each_channel(channel, efx) | |
| 161 | − free_irq(channel->irq, &efx->msi_context[channel->channel]); | |
| 162 | − | |
| 163 | − /* Disable legacy interrupt */ | |
| 164 | − if (efx->legacy_irq) | |
| 159 | + if (EFX_INT_MODE_USE_MSI(efx)) { | |
| 160 | + /* Disable MSI/MSI-X interrupts */ | |
| 161 | + efx_for_each_channel(channel, efx) | |
| 162 | + free_irq(channel->irq, | |
| 163 | + &efx->msi_context[channel->channel]); | |
| 164 | + } else { | |
| 165 | + /* Disable legacy interrupt */ | |
| 165 | 166 | free_irq(efx->legacy_irq, efx); |
| 167 | + } | |
| 166 | 168 | } |
| 167 | 169 | |
| 168 | 170 | /* Register dump */ |
| @@ -1704,7 +1704,7 @@ static int stmmac_open(struct net_device *dev) · 1703 unmodified lines | ||
| 1704 | 1704 | if (ret) { |
| 1705 | 1705 | pr_err("%s: Cannot attach to PHY (error: %d)\n", |
| 1706 | 1706 | __func__, ret); |
| 1707 | − goto phy_error; | |
| 1707 | + return ret; | |
| 1708 | 1708 | } |
| 1709 | 1709 | } |
| 1710 | 1710 | |
| @@ -1779,8 +1779,6 @@ init_error: · 68 unmodified lines | ||
| 1779 | 1779 | dma_desc_error: |
| 1780 | 1780 | if (priv->phydev) |
| 1781 | 1781 | phy_disconnect(priv->phydev); |
| 1782 | −phy_error: | |
| 1783 | − clk_disable_unprepare(priv->stmmac_clk); | |
| 1784 | 1782 | |
| 1785 | 1783 | return ret; |
| 1786 | 1784 | } |
| @@ -246,7 +246,7 @@ static inline void cas_lock_tx(struct cas *cp) · 245 unmodified lines | ||
| 246 | 246 | int i; |
| 247 | 247 | |
| 248 | 248 | for (i = 0; i < N_TX_RINGS; i++) |
| 249 | − spin_lock(&cp->tx_lock[i]); | |
| 249 | + spin_lock_nested(&cp->tx_lock[i], i); | |
| 250 | 250 | } |
| 251 | 251 | |
| 252 | 252 | static inline void cas_lock_all(struct cas *cp) |
| @@ -1871,18 +1871,13 @@ static int cpsw_probe_dt(struct cpsw_platform_data *data, · 1870 unmodified lines | ||
| 1871 | 1871 | mdio_node = of_find_node_by_phandle(be32_to_cpup(parp)); |
| 1872 | 1872 | phyid = be32_to_cpup(parp+1); |
| 1873 | 1873 | mdio = of_find_device_by_node(mdio_node); |
| 1874 | − | |
| 1875 | − if (strncmp(mdio->name, "gpio", 4) == 0) { | |
| 1876 | − /* GPIO bitbang MDIO driver attached */ | |
| 1877 | − struct mii_bus *bus = dev_get_drvdata(&mdio->dev); | |
| 1878 | − | |
| 1879 | − snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), | |
| 1880 | − PHY_ID_FMT, bus->id, phyid); | |
| 1881 | − } else { | |
| 1882 | − /* davinci MDIO driver attached */ | |
| 1883 | − snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), | |
| 1884 | − PHY_ID_FMT, mdio->name, phyid); | |
| 1874 | + of_node_put(mdio_node); | |
| 1875 | + if (!mdio) { | |
| 1876 | + pr_err("Missing mdio platform device\n"); | |
| 1877 | + return -EINVAL; | |
| 1885 | 1878 | } |
| 1879 | + snprintf(slave_data->phy_id, sizeof(slave_data->phy_id), | |
| 1880 | + PHY_ID_FMT, mdio->name, phyid); | |
| 1886 | 1881 | |
| 1887 | 1882 | mac_addr = of_get_mac_address(slave_node); |
| 1888 | 1883 | if (mac_addr) |
| @@ -458,8 +458,10 @@ static void macvlan_change_rx_flags(struct net_device *dev, int change) · 457 unmodified lines | ||
| 458 | 458 | struct macvlan_dev *vlan = netdev_priv(dev); |
| 459 | 459 | struct net_device *lowerdev = vlan->lowerdev; |
| 460 | 460 | |
| 461 | − if (change & IFF_ALLMULTI) | |
| 462 | − dev_set_allmulti(lowerdev, dev->flags & IFF_ALLMULTI ? 1 : -1); | |
| 461 | + if (dev->flags & IFF_UP) { | |
| 462 | + if (change & IFF_ALLMULTI) | |
| 463 | + dev_set_allmulti(lowerdev, dev->flags & IFF_ALLMULTI ? 1 : -1); | |
| 464 | + } | |
| 463 | 465 | } |
| 464 | 466 | |
| 465 | 467 | static void macvlan_set_mac_lists(struct net_device *dev) |
| @@ -515,6 +517,11 @@ static struct lock_class_key macvlan_netdev_addr_lock_key; · 49 unmodified lines | ||
| 515 | 517 | #define MACVLAN_STATE_MASK \ |
| 516 | 518 | ((1<<__LINK_STATE_NOCARRIER) | (1<<__LINK_STATE_DORMANT)) |
| 517 | 519 | |
| 520 | +static int macvlan_get_nest_level(struct net_device *dev) | |
| 521 | +{ | |
| 522 | + return ((struct macvlan_dev *)netdev_priv(dev))->nest_level; | |
| 523 | +} | |
| 524 | + | |
| 518 | 525 | static void macvlan_set_lockdep_class_one(struct net_device *dev, |
| 519 | 526 | struct netdev_queue *txq, |
| 520 | 527 | void *_unused) |
| @@ -525,8 +532,9 @@ static void macvlan_set_lockdep_class_one(struct net_device *dev, · 4 unmodified lines | ||
| 525 | 532 | |
| 526 | 533 | static void macvlan_set_lockdep_class(struct net_device *dev) |
| 527 | 534 | { |
| 528 | − lockdep_set_class(&dev->addr_list_lock, | |
| 529 | − &macvlan_netdev_addr_lock_key); | |
| 535 | + lockdep_set_class_and_subclass(&dev->addr_list_lock, | |
| 536 | + &macvlan_netdev_addr_lock_key, | |
| 537 | + macvlan_get_nest_level(dev)); | |
| 530 | 538 | netdev_for_each_tx_queue(dev, macvlan_set_lockdep_class_one, NULL); |
| 531 | 539 | } |
| 532 | 540 | |
| @@ -721,6 +729,7 @@ static const struct net_device_ops macvlan_netdev_ops = { · 188 unmodified lines | ||
| 721 | 729 | .ndo_fdb_add = macvlan_fdb_add, |
| 722 | 730 | .ndo_fdb_del = macvlan_fdb_del, |
| 723 | 731 | .ndo_fdb_dump = ndo_dflt_fdb_dump, |
| 732 | + .ndo_get_lock_subclass = macvlan_get_nest_level, | |
| 724 | 733 | }; |
| 725 | 734 | |
| 726 | 735 | void macvlan_common_setup(struct net_device *dev) |
| @@ -849,6 +858,7 @@ int macvlan_common_newlink(struct net *src_net, struct net_device *dev, · 122 unmodified lines | ||
| 849 | 858 | vlan->dev = dev; |
| 850 | 859 | vlan->port = port; |
| 851 | 860 | vlan->set_features = MACVLAN_FEATURES; |
| 861 | + vlan->nest_level = dev_get_nest_level(lowerdev, netif_is_macvlan) + 1; | |
| 852 | 862 | |
| 853 | 863 | vlan->mode = MACVLAN_MODE_VEPA; |
| 854 | 864 | if (data && data[IFLA_MACVLAN_MODE]) |
| @@ -215,6 +215,10 @@ static int mdio_gpio_probe(struct platform_device *pdev) · 214 unmodified lines | ||
| 215 | 215 | if (pdev->dev.of_node) { |
| 216 | 216 | pdata = mdio_gpio_of_get_data(pdev); |
| 217 | 217 | bus_id = of_alias_get_id(pdev->dev.of_node, "mdio-gpio"); |
| 218 | + if (bus_id < 0) { | |
| 219 | + dev_warn(&pdev->dev, "failed to get alias id\n"); | |
| 220 | + bus_id = 0; | |
| 221 | + } | |
| 218 | 222 | } else { |
| 219 | 223 | pdata = dev_get_platdata(&pdev->dev); |
| 220 | 224 | bus_id = pdev->id; |
| @@ -715,7 +715,7 @@ void phy_state_machine(struct work_struct *work) · 714 unmodified lines | ||
| 715 | 715 | struct delayed_work *dwork = to_delayed_work(work); |
| 716 | 716 | struct phy_device *phydev = |
| 717 | 717 | container_of(dwork, struct phy_device, state_queue); |
| 718 | − int needs_aneg = 0, do_suspend = 0; | |
| 718 | + bool needs_aneg = false, do_suspend = false, do_resume = false; | |
| 719 | 719 | int err = 0; |
| 720 | 720 | |
| 721 | 721 | mutex_lock(&phydev->lock); |
| @@ -727,7 +727,7 @@ void phy_state_machine(struct work_struct *work) · 5 unmodified lines | ||
| 727 | 727 | case PHY_PENDING: |
| 728 | 728 | break; |
| 729 | 729 | case PHY_UP: |
| 730 | − needs_aneg = 1; | |
| 730 | + needs_aneg = true; | |
| 731 | 731 | |
| 732 | 732 | phydev->link_timeout = PHY_AN_TIMEOUT; |
| 733 | 733 | |
| @@ -757,7 +757,7 @@ void phy_state_machine(struct work_struct *work) · 23 unmodified lines | ||
| 757 | 757 | phydev->adjust_link(phydev->attached_dev); |
| 758 | 758 | |
| 759 | 759 | } else if (0 == phydev->link_timeout--) |
| 760 | − needs_aneg = 1; | |
| 760 | + needs_aneg = true; | |
| 761 | 761 | break; |
| 762 | 762 | case PHY_NOLINK: |
| 763 | 763 | err = phy_read_status(phydev); |
| @@ -791,7 +791,7 @@ void phy_state_machine(struct work_struct *work) · 27 unmodified lines | ||
| 791 | 791 | netif_carrier_on(phydev->attached_dev); |
| 792 | 792 | } else { |
| 793 | 793 | if (0 == phydev->link_timeout--) |
| 794 | − needs_aneg = 1; | |
| 794 | + needs_aneg = true; | |
| 795 | 795 | } |
| 796 | 796 | |
| 797 | 797 | phydev->adjust_link(phydev->attached_dev); |
| @@ -827,7 +827,7 @@ void phy_state_machine(struct work_struct *work) · 29 unmodified lines | ||
| 827 | 827 | phydev->link = 0; |
| 828 | 828 | netif_carrier_off(phydev->attached_dev); |
| 829 | 829 | phydev->adjust_link(phydev->attached_dev); |
| 830 | − do_suspend = 1; | |
| 830 | + do_suspend = true; | |
| 831 | 831 | } |
| 832 | 832 | break; |
| 833 | 833 | case PHY_RESUMING: |
| @@ -876,6 +876,7 @@ void phy_state_machine(struct work_struct *work) · 42 unmodified lines | ||
| 876 | 876 | } |
| 877 | 877 | phydev->adjust_link(phydev->attached_dev); |
| 878 | 878 | } |
| 879 | + do_resume = true; | |
| 879 | 880 | break; |
| 880 | 881 | } |
| 881 | 882 | |
| @@ -883,9 +884,10 @@ void phy_state_machine(struct work_struct *work) · 1 unmodified line | ||
| 883 | 884 | |
| 884 | 885 | if (needs_aneg) |
| 885 | 886 | err = phy_start_aneg(phydev); |
| 886 | − | |
| 887 | − if (do_suspend) | |
| 887 | + else if (do_suspend) | |
| 888 | 888 | phy_suspend(phydev); |
| 889 | + else if (do_resume) | |
| 890 | + phy_resume(phydev); | |
| 889 | 891 | |
| 890 | 892 | if (err < 0) |
| 891 | 893 | phy_error(phydev); |
| @@ -614,8 +614,8 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, · 613 unmodified lines | ||
| 614 | 614 | err = phy_init_hw(phydev); |
| 615 | 615 | if (err) |
| 616 | 616 | phy_detach(phydev); |
| 617 | − | |
| 618 | − phy_resume(phydev); | |
| 617 | + else | |
| 618 | + phy_resume(phydev); | |
| 619 | 619 | |
| 620 | 620 | return err; |
| 621 | 621 | } |
| @@ -120,6 +120,16 @@ static void cdc_mbim_unbind(struct usbnet *dev, struct usb_interface *intf) · 119 unmodified lines | ||
| 120 | 120 | cdc_ncm_unbind(dev, intf); |
| 121 | 121 | } |
| 122 | 122 | |
| 123 | +/* verify that the ethernet protocol is IPv4 or IPv6 */ | |
| 124 | +static bool is_ip_proto(__be16 proto) | |
| 125 | +{ | |
| 126 | + switch (proto) { | |
| 127 | + case htons(ETH_P_IP): | |
| 128 | + case htons(ETH_P_IPV6): | |
| 129 | + return true; | |
| 130 | + } | |
| 131 | + return false; | |
| 132 | +} | |
| 123 | 133 | |
| 124 | 134 | static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags) |
| 125 | 135 | { |
| @@ -128,6 +138,7 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb · 2 unmodified lines | ||
| 128 | 138 | struct cdc_ncm_ctx *ctx = info->ctx; |
| 129 | 139 | __le32 sign = cpu_to_le32(USB_CDC_MBIM_NDP16_IPS_SIGN); |
| 130 | 140 | u16 tci = 0; |
| 141 | + bool is_ip; | |
| 131 | 142 | u8 *c; |
| 132 | 143 | |
| 133 | 144 | if (!ctx) |
| @@ -137,25 +148,32 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb · 3 unmodified lines | ||
| 137 | 148 | if (skb->len <= ETH_HLEN) |
| 138 | 149 | goto error; |
| 139 | 150 | |
| 151 | + /* Some applications using e.g. packet sockets will | |
| 152 | + * bypass the VLAN acceleration and create tagged | |
| 153 | + * ethernet frames directly. We primarily look for | |
| 154 | + * the accelerated out-of-band tag, but fall back if | |
| 155 | + * required | |
| 156 | + */ | |
| 157 | + skb_reset_mac_header(skb); | |
| 158 | + if (vlan_get_tag(skb, &tci) < 0 && skb->len > VLAN_ETH_HLEN && | |
| 159 | + __vlan_get_tag(skb, &tci) == 0) { | |
| 160 | + is_ip = is_ip_proto(vlan_eth_hdr(skb)->h_vlan_encapsulated_proto); | |
| 161 | + skb_pull(skb, VLAN_ETH_HLEN); | |
| 162 | + } else { | |
| 163 | + is_ip = is_ip_proto(eth_hdr(skb)->h_proto); | |
| 164 | + skb_pull(skb, ETH_HLEN); | |
| 165 | + } | |
| 166 | + | |
| 140 | 167 | /* mapping VLANs to MBIM sessions: |
| 141 | 168 | * no tag => IPS session <0> |
| 142 | 169 | * 1 - 255 => IPS session <vlanid> |
| 143 | 170 | * 256 - 511 => DSS session <vlanid - 256> |
| 144 | 171 | * 512 - 4095 => unsupported, drop |
| 145 | 172 | */ |
| 146 | − vlan_get_tag(skb, &tci); | |
| 147 | − | |
| 148 | 173 | switch (tci & 0x0f00) { |
| 149 | 174 | case 0x0000: /* VLAN ID 0 - 255 */ |
| 150 | − /* verify that datagram is IPv4 or IPv6 */ | |
| 151 | − skb_reset_mac_header(skb); | |
| 152 | − switch (eth_hdr(skb)->h_proto) { | |
| 153 | − case htons(ETH_P_IP): | |
| 154 | − case htons(ETH_P_IPV6): | |
| 155 | − break; | |
| 156 | − default: | |
| 175 | + if (!is_ip) | |
| 157 | 176 | goto error; |
| 158 | − } | |
| 159 | 177 | c = (u8 *)&sign; |
| 160 | 178 | c[3] = tci; |
| 161 | 179 | break; |
| @@ -169,7 +187,6 @@ static struct sk_buff *cdc_mbim_tx_fixup(struct usbnet *dev, struct sk_buff *skb · 7 unmodified lines | ||
| 169 | 187 | "unsupported tci=0x%04x\n", tci); |
| 170 | 188 | goto error; |
| 171 | 189 | } |
| 172 | − skb_pull(skb, ETH_HLEN); | |
| 173 | 190 | } |
| 174 | 191 | |
| 175 | 192 | spin_lock_bh(&ctx->mtx); |
| @@ -204,17 +221,23 @@ static void do_neigh_solicit(struct usbnet *dev, u8 *buf, u16 tci) · 28 unmodified lines | ||
| 204 | 221 | return; |
| 205 | 222 | |
| 206 | 223 | /* need to send the NA on the VLAN dev, if any */ |
| 207 | − if (tci) | |
| 224 | + rcu_read_lock(); | |
| 225 | + if (tci) { | |
| 208 | 226 | netdev = __vlan_find_dev_deep(dev->net, htons(ETH_P_8021Q), |
| 209 | 227 | tci); |
| 210 | − else | |
| 228 | + if (!netdev) { | |
| 229 | + rcu_read_unlock(); | |
| 230 | + return; | |
| 231 | + } | |
| 232 | + } else { | |
| 211 | 233 | netdev = dev->net; |
| 212 | − if (!netdev) | |
| 213 | − return; | |
| 234 | + } | |
| 235 | + dev_hold(netdev); | |
| 236 | + rcu_read_unlock(); | |
| 214 | 237 | |
| 215 | 238 | in6_dev = in6_dev_get(netdev); |
| 216 | 239 | if (!in6_dev) |
| 217 | − return; | |
| 240 | + goto out; | |
| 218 | 241 | is_router = !!in6_dev->cnf.forwarding; |
| 219 | 242 | in6_dev_put(in6_dev); |
| 220 | 243 | |
| @@ -224,6 +247,8 @@ static void do_neigh_solicit(struct usbnet *dev, u8 *buf, u16 tci) · 3 unmodified lines | ||
| 224 | 247 | true /* solicited */, |
| 225 | 248 | false /* override */, |
| 226 | 249 | true /* inc_opt */); |
| 250 | +out: | |
| 251 | + dev_put(netdev); | |
| 227 | 252 | } |
| 228 | 253 | |
| 229 | 254 | static bool is_neigh_solicit(u8 *buf, size_t len) |
| @@ -95,8 +95,10 @@ static void ath9k_htc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) · 94 unmodified lines | ||
| 95 | 95 | |
| 96 | 96 | if ((vif->type == NL80211_IFTYPE_AP || |
| 97 | 97 | vif->type == NL80211_IFTYPE_MESH_POINT) && |
| 98 | − bss_conf->enable_beacon) | |
| 98 | + bss_conf->enable_beacon) { | |
| 99 | 99 | priv->reconfig_beacon = true; |
| 100 | + priv->rearm_ani = true; | |
| 101 | + } | |
| 100 | 102 | |
| 101 | 103 | if (bss_conf->assoc) { |
| 102 | 104 | priv->rearm_ani = true; |
| @@ -257,6 +259,7 @@ static int ath9k_htc_set_channel(struct ath9k_htc_priv *priv, · 154 unmodified lines | ||
| 257 | 259 | |
| 258 | 260 | ath9k_htc_ps_wakeup(priv); |
| 259 | 261 | |
| 262 | + ath9k_htc_stop_ani(priv); | |
| 260 | 263 | del_timer_sync(&priv->tx.cleanup_timer); |
| 261 | 264 | ath9k_htc_tx_drain(priv); |
| 262 | 265 | |
| @@ -4948,7 +4948,7 @@ static int brcmf_enable_bw40_2g(struct brcmf_if *ifp) · 4947 unmodified lines | ||
| 4948 | 4948 | if (!err) { |
| 4949 | 4949 | /* only set 2G bandwidth using bw_cap command */ |
| 4950 | 4950 | band_bwcap.band = cpu_to_le32(WLC_BAND_2G); |
| 4951 | − band_bwcap.bw_cap = cpu_to_le32(WLC_BW_40MHZ_BIT); | |
| 4951 | + band_bwcap.bw_cap = cpu_to_le32(WLC_BW_CAP_40MHZ); | |
| 4952 | 4952 | err = brcmf_fil_iovar_data_set(ifp, "bw_cap", &band_bwcap, |
| 4953 | 4953 | sizeof(band_bwcap)); |
| 4954 | 4954 | } else { |
| @@ -611,14 +611,14 @@ int iwl_send_bt_init_conf(struct iwl_mvm *mvm) · 610 unmodified lines | ||
| 611 | 611 | bt_cmd->flags |= cpu_to_le32(BT_COEX_SYNC2SCO); |
| 612 | 612 | |
| 613 | 613 | if (IWL_MVM_BT_COEX_CORUNNING) { |
| 614 | − bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_CORUN_LUT_20 | | |
| 615 | − BT_VALID_CORUN_LUT_40); | |
| 614 | + bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_CORUN_LUT_20 | | |
| 615 | + BT_VALID_CORUN_LUT_40); | |
| 616 | 616 | bt_cmd->flags |= cpu_to_le32(BT_COEX_CORUNNING); |
| 617 | 617 | } |
| 618 | 618 | |
| 619 | 619 | if (IWL_MVM_BT_COEX_MPLUT) { |
| 620 | 620 | bt_cmd->flags |= cpu_to_le32(BT_COEX_MPLUT); |
| 621 | − bt_cmd->valid_bit_msk = cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); | |
| 621 | + bt_cmd->valid_bit_msk |= cpu_to_le32(BT_VALID_MULTI_PRIO_LUT); | |
| 622 | 622 | } |
| 623 | 623 | |
| 624 | 624 | if (mvm->cfg->bt_shared_single_ant) |
| @@ -183,9 +183,9 @@ enum iwl_scan_type { · 182 unmodified lines | ||
| 183 | 183 | * this number of packets were received (typically 1) |
| 184 | 184 | * @passive2active: is auto switching from passive to active during scan allowed |
| 185 | 185 | * @rxchain_sel_flags: RXON_RX_CHAIN_* |
| 186 | − * @max_out_time: in usecs, max out of serving channel time | |
| 186 | + * @max_out_time: in TUs, max out of serving channel time | |
| 187 | 187 | * @suspend_time: how long to pause scan when returning to service channel: |
| 188 | − * bits 0-19: beacon interal in usecs (suspend before executing) | |
| 188 | + * bits 0-19: beacon interal in TUs (suspend before executing) | |
| 189 | 189 | * bits 20-23: reserved |
| 190 | 190 | * bits 24-31: number of beacons (suspend between channels) |
| 191 | 191 | * @rxon_flags: RXON_FLG_* |
| @@ -383,8 +383,8 @@ enum scan_framework_client { · 191 unmodified lines | ||
| 383 | 383 | * @quiet_plcp_th: quiet channel num of packets threshold |
| 384 | 384 | * @good_CRC_th: passive to active promotion threshold |
| 385 | 385 | * @rx_chain: RXON rx chain. |
| 386 | − * @max_out_time: max uSec to be out of assoceated channel | |
| 387 | − * @suspend_time: pause scan this long when returning to service channel | |
| 386 | + * @max_out_time: max TUs to be out of assoceated channel | |
| 387 | + * @suspend_time: pause scan this TUs when returning to service channel | |
| 388 | 388 | * @flags: RXON flags |
| 389 | 389 | * @filter_flags: RXONfilter |
| 390 | 390 | * @tx_cmd: tx command for active scan; for 2GHz and for 5GHz. |
| @@ -1007,7 +1007,7 @@ static void iwl_mvm_mc_iface_iterator(void *_data, u8 *mac, · 1006 unmodified lines | ||
| 1007 | 1007 | memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN); |
| 1008 | 1008 | len = roundup(sizeof(*cmd) + cmd->count * ETH_ALEN, 4); |
| 1009 | 1009 | |
| 1010 | − ret = iwl_mvm_send_cmd_pdu(mvm, MCAST_FILTER_CMD, CMD_SYNC, len, cmd); | |
| 1010 | + ret = iwl_mvm_send_cmd_pdu(mvm, MCAST_FILTER_CMD, CMD_ASYNC, len, cmd); | |
| 1011 | 1011 | if (ret) |
| 1012 | 1012 | IWL_ERR(mvm, "mcast filter cmd error. ret=%d\n", ret); |
| 1013 | 1013 | } |
| @@ -1023,7 +1023,7 @@ static void iwl_mvm_recalc_multicast(struct iwl_mvm *mvm) · 9 unmodified lines | ||
| 1023 | 1023 | if (WARN_ON_ONCE(!mvm->mcast_filter_cmd)) |
| 1024 | 1024 | return; |
| 1025 | 1025 | |
| 1026 | − ieee80211_iterate_active_interfaces( | |
| 1026 | + ieee80211_iterate_active_interfaces_atomic( | |
| 1027 | 1027 | mvm->hw, IEEE80211_IFACE_ITER_NORMAL, |
| 1028 | 1028 | iwl_mvm_mc_iface_iterator, &iter_data); |
| 1029 | 1029 | } |
| @@ -1807,6 +1807,11 @@ static int iwl_mvm_mac_sched_scan_start(struct ieee80211_hw *hw, · 777 unmodified lines | ||
| 1807 | 1807 | |
| 1808 | 1808 | mutex_lock(&mvm->mutex); |
| 1809 | 1809 | |
| 1810 | + if (!iwl_mvm_is_idle(mvm)) { | |
| 1811 | + ret = -EBUSY; | |
| 1812 | + goto out; | |
| 1813 | + } | |
| 1814 | + | |
| 1810 | 1815 | switch (mvm->scan_status) { |
| 1811 | 1816 | case IWL_MVM_SCAN_OS: |
| 1812 | 1817 | IWL_DEBUG_SCAN(mvm, "Stopping previous scan for sched_scan\n"); |
| @@ -1003,6 +1003,9 @@ static inline bool iwl_mvm_vif_low_latency(struct iwl_mvm_vif *mvmvif) · 1002 unmodified lines | ||
| 1003 | 1003 | return mvmvif->low_latency; |
| 1004 | 1004 | } |
| 1005 | 1005 | |
| 1006 | +/* Assoc status */ | |
| 1007 | +bool iwl_mvm_is_idle(struct iwl_mvm *mvm); | |
| 1008 | + | |
| 1006 | 1009 | /* Thermal management and CT-kill */ |
| 1007 | 1010 | void iwl_mvm_tt_tx_backoff(struct iwl_mvm *mvm, u32 backoff); |
| 1008 | 1011 | void iwl_mvm_tt_handler(struct iwl_mvm *mvm); |
| @@ -1010,7 +1010,7 @@ static void rs_tx_status(void *mvm_r, struct ieee80211_supported_band *sband, · 1009 unmodified lines | ||
| 1010 | 1010 | return; |
| 1011 | 1011 | } |
| 1012 | 1012 | |
| 1013 | −#ifdef CPTCFG_MAC80211_DEBUGFS | |
| 1013 | +#ifdef CONFIG_MAC80211_DEBUGFS | |
| 1014 | 1014 | /* Disable last tx check if we are debugging with fixed rate */ |
| 1015 | 1015 | if (lq_sta->dbg_fixed_rate) { |
| 1016 | 1016 | IWL_DEBUG_RATE(mvm, "Fixed rate. avoid rate scaling\n"); |
| @@ -277,51 +277,22 @@ static void iwl_mvm_scan_calc_params(struct iwl_mvm *mvm, · 276 unmodified lines | ||
| 277 | 277 | IEEE80211_IFACE_ITER_NORMAL, |
| 278 | 278 | iwl_mvm_scan_condition_iterator, |
| 279 | 279 | &global_bound); |
| 280 | − /* | |
| 281 | − * Under low latency traffic passive scan is fragmented meaning | |
| 282 | − * that dwell on a particular channel will be fragmented. Each fragment | |
| 283 | − * dwell time is 20ms and fragments period is 105ms. Skipping to next | |
| 284 | − * channel will be delayed by the same period - 105ms. So suspend_time | |
| 285 | − * parameter describing both fragments and channels skipping periods is | |
| 286 | − * set to 105ms. This value is chosen so that overall passive scan | |
| 287 | − * duration will not be too long. Max_out_time in this case is set to | |
| 288 | − * 70ms, so for active scanning operating channel will be left for 70ms | |
| 289 | − * while for passive still for 20ms (fragment dwell). | |
| 290 | − */ | |
| 291 | − if (global_bound) { | |
| 292 | − if (!iwl_mvm_low_latency(mvm)) { | |
| 293 | − params->suspend_time = ieee80211_tu_to_usec(100); | |
| 294 | − params->max_out_time = ieee80211_tu_to_usec(600); | |
| 295 | − } else { | |
| 296 | − params->suspend_time = ieee80211_tu_to_usec(105); | |
| 297 | − /* P2P doesn't support fragmented passive scan, so | |
| 298 | − * configure max_out_time to be at least longest dwell | |
| 299 | − * time for passive scan. | |
| 300 | − */ | |
| 301 | − if (vif->type == NL80211_IFTYPE_STATION && !vif->p2p) { | |
| 302 | − params->max_out_time = ieee80211_tu_to_usec(70); | |
| 303 | − params->passive_fragmented = true; | |
| 304 | − } else { | |
| 305 | − u32 passive_dwell; | |
| 306 | 280 | |
| 307 | − /* | |
| 308 | − * Use band G so that passive channel dwell time | |
| 309 | − * will be assigned with maximum value. | |
| 310 | − */ | |
| 311 | − band = IEEE80211_BAND_2GHZ; | |
| 312 | − passive_dwell = iwl_mvm_get_passive_dwell(band); | |
| 313 | − params->max_out_time = | |
| 314 | − ieee80211_tu_to_usec(passive_dwell); | |
| 315 | − } | |
| 316 | − } | |
| 281 | + if (!global_bound) | |
| 282 | + goto not_bound; | |
| 283 | + | |
| 284 | + params->suspend_time = 100; | |
| 285 | + params->max_out_time = 600; | |
| 286 | + | |
| 287 | + if (iwl_mvm_low_latency(mvm)) { | |
| 288 | + params->suspend_time = 250; | |
| 289 | + params->max_out_time = 250; | |
| 317 | 290 | } |
| 318 | 291 | |
| 292 | +not_bound: | |
| 293 | + | |
| 319 | 294 | for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { |
| 320 | − if (params->passive_fragmented) | |
| 321 | − params->dwell[band].passive = 20; | |
| 322 | − else | |
| 323 | − params->dwell[band].passive = | |
| 324 | − iwl_mvm_get_passive_dwell(band); | |
| 295 | + params->dwell[band].passive = iwl_mvm_get_passive_dwell(band); | |
| 325 | 296 | params->dwell[band].active = iwl_mvm_get_active_dwell(band, |
| 326 | 297 | n_ssids); |
| 327 | 298 | } |
| @@ -761,7 +732,7 @@ int iwl_mvm_config_sched_scan(struct iwl_mvm *mvm, · 433 unmodified lines | ||
| 761 | 732 | int band_2ghz = mvm->nvm_data->bands[IEEE80211_BAND_2GHZ].n_channels; |
| 762 | 733 | int band_5ghz = mvm->nvm_data->bands[IEEE80211_BAND_5GHZ].n_channels; |
| 763 | 734 | int head = 0; |
| 764 | − int tail = band_2ghz + band_5ghz; | |
| 735 | + int tail = band_2ghz + band_5ghz - 1; | |
| 765 | 736 | u32 ssid_bitmap; |
| 766 | 737 | int cmd_len; |
| 767 | 738 | int ret; |
| @@ -644,3 +644,22 @@ bool iwl_mvm_low_latency(struct iwl_mvm *mvm) · 643 unmodified lines | ||
| 644 | 644 | |
| 645 | 645 | return result; |
| 646 | 646 | } |
| 647 | + | |
| 648 | +static void iwl_mvm_idle_iter(void *_data, u8 *mac, struct ieee80211_vif *vif) | |
| 649 | +{ | |
| 650 | + bool *idle = _data; | |
| 651 | + | |
| 652 | + if (!vif->bss_conf.idle) | |
| 653 | + *idle = false; | |
| 654 | +} | |
| 655 | + | |
| 656 | +bool iwl_mvm_is_idle(struct iwl_mvm *mvm) | |
| 657 | +{ | |
| 658 | + bool idle = true; | |
| 659 | + | |
| 660 | + ieee80211_iterate_active_interfaces_atomic( | |
| 661 | + mvm->hw, IEEE80211_IFACE_ITER_NORMAL, | |
| 662 | + iwl_mvm_idle_iter, &idle); | |
| 663 | + | |
| 664 | + return idle; | |
| 665 | +} | |
| @@ -1749,6 +1749,10 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 1748 unmodified lines | ||
| 1749 | 1749 | * PCI Tx retries from interfering with C3 CPU state */ |
| 1750 | 1750 | pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); |
| 1751 | 1751 | |
| 1752 | + trans->dev = &pdev->dev; | |
| 1753 | + trans_pcie->pci_dev = pdev; | |
| 1754 | + iwl_disable_interrupts(trans); | |
| 1755 | + | |
| 1752 | 1756 | err = pci_enable_msi(pdev); |
| 1753 | 1757 | if (err) { |
| 1754 | 1758 | dev_err(&pdev->dev, "pci_enable_msi failed(0X%x)\n", err); |
| @@ -1760,8 +1764,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 5 unmodified lines | ||
| 1760 | 1764 | } |
| 1761 | 1765 | } |
| 1762 | 1766 | |
| 1763 | − trans->dev = &pdev->dev; | |
| 1764 | − trans_pcie->pci_dev = pdev; | |
| 1765 | 1767 | trans->hw_rev = iwl_read32(trans, CSR_HW_REV); |
| 1766 | 1768 | trans->hw_id = (pdev->device << 16) + pdev->subsystem_device; |
| 1767 | 1769 | snprintf(trans->hw_id_str, sizeof(trans->hw_id_str), |
| @@ -1787,8 +1789,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 19 unmodified lines | ||
| 1787 | 1789 | goto out_pci_disable_msi; |
| 1788 | 1790 | } |
| 1789 | 1791 | |
| 1790 | − trans_pcie->inta_mask = CSR_INI_SET_MASK; | |
| 1791 | − | |
| 1792 | 1792 | if (iwl_pcie_alloc_ict(trans)) |
| 1793 | 1793 | goto out_free_cmd_pool; |
| 1794 | 1794 | |
| @@ -1800,6 +1800,8 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev, · 5 unmodified lines | ||
| 1800 | 1800 | goto out_free_ict; |
| 1801 | 1801 | } |
| 1802 | 1802 | |
| 1803 | + trans_pcie->inta_mask = CSR_INI_SET_MASK; | |
| 1804 | + | |
| 1803 | 1805 | return trans; |
| 1804 | 1806 | |
| 1805 | 1807 | out_free_ict: |
| @@ -226,7 +226,7 @@ int xenvif_map_frontend_rings(struct xenvif *vif, · 225 unmodified lines | ||
| 226 | 226 | grant_ref_t rx_ring_ref); |
| 227 | 227 | |
| 228 | 228 | /* Check for SKBs from frontend and schedule backend processing */ |
| 229 | −void xenvif_check_rx_xenvif(struct xenvif *vif); | |
| 229 | +void xenvif_napi_schedule_or_enable_events(struct xenvif *vif); | |
| 230 | 230 | |
| 231 | 231 | /* Prevent the device from generating any further traffic. */ |
| 232 | 232 | void xenvif_carrier_off(struct xenvif *vif); |
| @@ -75,32 +75,8 @@ static int xenvif_poll(struct napi_struct *napi, int budget) · 74 unmodified lines | ||
| 75 | 75 | work_done = xenvif_tx_action(vif, budget); |
| 76 | 76 | |
| 77 | 77 | if (work_done < budget) { |
| 78 | − int more_to_do = 0; | |
| 79 | − unsigned long flags; | |
| 80 | − | |
| 81 | − /* It is necessary to disable IRQ before calling | |
| 82 | − * RING_HAS_UNCONSUMED_REQUESTS. Otherwise we might | |
| 83 | − * lose event from the frontend. | |
| 84 | − * | |
| 85 | − * Consider: | |
| 86 | − * RING_HAS_UNCONSUMED_REQUESTS | |
| 87 | − * <frontend generates event to trigger napi_schedule> | |
| 88 | − * __napi_complete | |
| 89 | − * | |
| 90 | − * This handler is still in scheduled state so the | |
| 91 | − * event has no effect at all. After __napi_complete | |
| 92 | − * this handler is descheduled and cannot get | |
| 93 | − * scheduled again. We lose event in this case and the ring | |
| 94 | − * will be completely stalled. | |
| 95 | − */ | |
| 96 | − | |
| 97 | − local_irq_save(flags); | |
| 98 | − | |
| 99 | − RING_FINAL_CHECK_FOR_REQUESTS(&vif->tx, more_to_do); | |
| 100 | − if (!more_to_do) | |
| 101 | − __napi_complete(napi); | |
| 102 | − | |
| 103 | − local_irq_restore(flags); | |
| 78 | + napi_complete(napi); | |
| 79 | + xenvif_napi_schedule_or_enable_events(vif); | |
| 104 | 80 | } |
| 105 | 81 | |
| 106 | 82 | return work_done; |
| @@ -194,7 +170,7 @@ static void xenvif_up(struct xenvif *vif) · 87 unmodified lines | ||
| 194 | 170 | enable_irq(vif->tx_irq); |
| 195 | 171 | if (vif->tx_irq != vif->rx_irq) |
| 196 | 172 | enable_irq(vif->rx_irq); |
| 197 | − xenvif_check_rx_xenvif(vif); | |
| 173 | + xenvif_napi_schedule_or_enable_events(vif); | |
| 198 | 174 | } |
| 199 | 175 | |
| 200 | 176 | static void xenvif_down(struct xenvif *vif) |
| @@ -104,7 +104,7 @@ static inline unsigned long idx_to_kaddr(struct xenvif *vif, · 103 unmodified lines | ||
| 104 | 104 | |
| 105 | 105 | /* Find the containing VIF's structure from a pointer in pending_tx_info array |
| 106 | 106 | */ |
| 107 | −static inline struct xenvif* ubuf_to_vif(struct ubuf_info *ubuf) | |
| 107 | +static inline struct xenvif *ubuf_to_vif(const struct ubuf_info *ubuf) | |
| 108 | 108 | { |
| 109 | 109 | u16 pending_idx = ubuf->desc; |
| 110 | 110 | struct pending_tx_info *temp = |
| @@ -322,6 +322,35 @@ static void xenvif_gop_frag_copy(struct xenvif *vif, struct sk_buff *skb, · 211 unmodified lines | ||
| 322 | 322 | } |
| 323 | 323 | } |
| 324 | 324 | |
| 325 | +/* | |
| 326 | + * Find the grant ref for a given frag in a chain of struct ubuf_info's | |
| 327 | + * skb: the skb itself | |
| 328 | + * i: the frag's number | |
| 329 | + * ubuf: a pointer to an element in the chain. It should not be NULL | |
| 330 | + * | |
| 331 | + * Returns a pointer to the element in the chain where the page were found. If | |
| 332 | + * not found, returns NULL. | |
| 333 | + * See the definition of callback_struct in common.h for more details about | |
| 334 | + * the chain. | |
| 335 | + */ | |
| 336 | +static const struct ubuf_info *xenvif_find_gref(const struct sk_buff *const skb, | |
| 337 | + const int i, | |
| 338 | + const struct ubuf_info *ubuf) | |
| 339 | +{ | |
| 340 | + struct xenvif *foreign_vif = ubuf_to_vif(ubuf); | |
| 341 | + | |
| 342 | + do { | |
| 343 | + u16 pending_idx = ubuf->desc; | |
| 344 | + | |
| 345 | + if (skb_shinfo(skb)->frags[i].page.p == | |
| 346 | + foreign_vif->mmap_pages[pending_idx]) | |
| 347 | + break; | |
| 348 | + ubuf = (struct ubuf_info *) ubuf->ctx; | |
| 349 | + } while (ubuf); | |
| 350 | + | |
| 351 | + return ubuf; | |
| 352 | +} | |
| 353 | + | |
| 325 | 354 | /* |
| 326 | 355 | * Prepare an SKB to be transmitted to the frontend. |
| 327 | 356 | * |
| @@ -346,9 +375,8 @@ static int xenvif_gop_skb(struct sk_buff *skb, · 18 unmodified lines | ||
| 346 | 375 | int head = 1; |
| 347 | 376 | int old_meta_prod; |
| 348 | 377 | int gso_type; |
| 349 | − struct ubuf_info *ubuf = skb_shinfo(skb)->destructor_arg; | |
| 350 | − grant_ref_t foreign_grefs[MAX_SKB_FRAGS]; | |
| 351 | − struct xenvif *foreign_vif = NULL; | |
| 378 | + const struct ubuf_info *ubuf = skb_shinfo(skb)->destructor_arg; | |
| 379 | + const struct ubuf_info *const head_ubuf = ubuf; | |
| 352 | 380 | |
| 353 | 381 | old_meta_prod = npo->meta_prod; |
| 354 | 382 | |
| @@ -386,19 +414,6 @@ static int xenvif_gop_skb(struct sk_buff *skb, · 31 unmodified lines | ||
| 386 | 414 | npo->copy_off = 0; |
| 387 | 415 | npo->copy_gref = req->gref; |
| 388 | 416 | |
| 389 | − if ((skb_shinfo(skb)->tx_flags & SKBTX_DEV_ZEROCOPY) && | |
| 390 | − (ubuf->callback == &xenvif_zerocopy_callback)) { | |
| 391 | − int i = 0; | |
| 392 | − foreign_vif = ubuf_to_vif(ubuf); | |
| 393 | − | |
| 394 | − do { | |
| 395 | − u16 pending_idx = ubuf->desc; | |
| 396 | − foreign_grefs[i++] = | |
| 397 | − foreign_vif->pending_tx_info[pending_idx].req.gref; | |
| 398 | − ubuf = (struct ubuf_info *) ubuf->ctx; | |
| 399 | − } while (ubuf); | |
| 400 | − } | |
| 401 | − | |
| 402 | 417 | data = skb->data; |
| 403 | 418 | while (data < skb_tail_pointer(skb)) { |
| 404 | 419 | unsigned int offset = offset_in_page(data); |
| @@ -415,13 +430,60 @@ static int xenvif_gop_skb(struct sk_buff *skb, · 10 unmodified lines | ||
| 415 | 430 | } |
| 416 | 431 | |
| 417 | 432 | for (i = 0; i < nr_frags; i++) { |
| 433 | + /* This variable also signals whether foreign_gref has a real | |
| 434 | + * value or not. | |
| 435 | + */ | |
| 436 | + struct xenvif *foreign_vif = NULL; | |
| 437 | + grant_ref_t foreign_gref; | |
| 438 | + | |
| 439 | + if ((skb_shinfo(skb)->tx_flags & SKBTX_DEV_ZEROCOPY) && | |
| 440 | + (ubuf->callback == &xenvif_zerocopy_callback)) { | |
| 441 | + const struct ubuf_info *const startpoint = ubuf; | |
| 442 | + | |
| 443 | + /* Ideally ubuf points to the chain element which | |
| 444 | + * belongs to this frag. Or if frags were removed from | |
| 445 | + * the beginning, then shortly before it. | |
| 446 | + */ | |
| 447 | + ubuf = xenvif_find_gref(skb, i, ubuf); | |
| 448 | + | |
| 449 | + /* Try again from the beginning of the list, if we | |
| 450 | + * haven't tried from there. This only makes sense in | |
| 451 | + * the unlikely event of reordering the original frags. | |
| 452 | + * For injected local pages it's an unnecessary second | |
| 453 | + * run. | |
| 454 | + */ | |
| 455 | + if (unlikely(!ubuf) && startpoint != head_ubuf) | |
| 456 | + ubuf = xenvif_find_gref(skb, i, head_ubuf); | |
| 457 | + | |
| 458 | + if (likely(ubuf)) { | |
| 459 | + u16 pending_idx = ubuf->desc; | |
| 460 | + | |
| 461 | + foreign_vif = ubuf_to_vif(ubuf); | |
| 462 | + foreign_gref = foreign_vif->pending_tx_info[pending_idx].req.gref; | |
| 463 | + /* Just a safety measure. If this was the last | |
| 464 | + * element on the list, the for loop will | |
| 465 | + * iterate again if a local page were added to | |
| 466 | + * the end. Using head_ubuf here prevents the | |
| 467 | + * second search on the chain. Or the original | |
| 468 | + * frags changed order, but that's less likely. | |
| 469 | + * In any way, ubuf shouldn't be NULL. | |
| 470 | + */ | |
| 471 | + ubuf = ubuf->ctx ? | |
| 472 | + (struct ubuf_info *) ubuf->ctx : | |
| 473 | + head_ubuf; | |
| 474 | + } else | |
| 475 | + /* This frag was a local page, added to the | |
| 476 | + * array after the skb left netback. | |
| 477 | + */ | |
| 478 | + ubuf = head_ubuf; | |
| 479 | + } | |
| 418 | 480 | xenvif_gop_frag_copy(vif, skb, npo, |
| 419 | 481 | skb_frag_page(&skb_shinfo(skb)->frags[i]), |
| 420 | 482 | skb_frag_size(&skb_shinfo(skb)->frags[i]), |
| 421 | 483 | skb_shinfo(skb)->frags[i].page_offset, |
| 422 | 484 | &head, |
| 423 | 485 | foreign_vif, |
| 424 | − foreign_grefs[i]); | |
| 486 | + foreign_vif ? foreign_gref : UINT_MAX); | |
| 425 | 487 | } |
| 426 | 488 | |
| 427 | 489 | return npo->meta_prod - old_meta_prod; |
| @@ -654,7 +716,7 @@ done: · 226 unmodified lines | ||
| 654 | 716 | notify_remote_via_irq(vif->rx_irq); |
| 655 | 717 | } |
| 656 | 718 | |
| 657 | −void xenvif_check_rx_xenvif(struct xenvif *vif) | |
| 719 | +void xenvif_napi_schedule_or_enable_events(struct xenvif *vif) | |
| 658 | 720 | { |
| 659 | 721 | int more_to_do; |
| 660 | 722 | |
| @@ -688,7 +750,7 @@ static void tx_credit_callback(unsigned long data) · 27 unmodified lines | ||
| 688 | 750 | { |
| 689 | 751 | struct xenvif *vif = (struct xenvif *)data; |
| 690 | 752 | tx_add_credit(vif); |
| 691 | − xenvif_check_rx_xenvif(vif); | |
| 753 | + xenvif_napi_schedule_or_enable_events(vif); | |
| 692 | 754 | } |
| 693 | 755 | |
| 694 | 756 | static void xenvif_tx_err(struct xenvif *vif, |
| @@ -1831,6 +1831,10 @@ int of_update_property(struct device_node *np, struct property *newprop) · 1830 unmodified lines | ||
| 1831 | 1831 | if (!found) |
| 1832 | 1832 | return -ENODEV; |
| 1833 | 1833 | |
| 1834 | + /* At early boot, bail out and defer setup to of_init() */ | |
| 1835 | + if (!of_kset) | |
| 1836 | + return found ? 0 : -ENODEV; | |
| 1837 | + | |
| 1834 | 1838 | /* Update the sysfs attribute */ |
| 1835 | 1839 | sysfs_remove_bin_file(&np->kobj, &oldprop->attr); |
| 1836 | 1840 | __of_add_property_sysfs(np, newprop); |
| @@ -293,6 +293,58 @@ static int mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port, · 292 unmodified lines | ||
| 293 | 293 | return PCIBIOS_SUCCESSFUL; |
| 294 | 294 | } |
| 295 | 295 | |
| 296 | +/* | |
| 297 | + * Remove windows, starting from the largest ones to the smallest | |
| 298 | + * ones. | |
| 299 | + */ | |
| 300 | +static void mvebu_pcie_del_windows(struct mvebu_pcie_port *port, | |
| 301 | + phys_addr_t base, size_t size) | |
| 302 | +{ | |
| 303 | + while (size) { | |
| 304 | + size_t sz = 1 << (fls(size) - 1); | |
| 305 | + | |
| 306 | + mvebu_mbus_del_window(base, sz); | |
| 307 | + base += sz; | |
| 308 | + size -= sz; | |
| 309 | + } | |
| 310 | +} | |
| 311 | + | |
| 312 | +/* | |
| 313 | + * MBus windows can only have a power of two size, but PCI BARs do not | |
| 314 | + * have this constraint. Therefore, we have to split the PCI BAR into | |
| 315 | + * areas each having a power of two size. We start from the largest | |
| 316 | + * one (i.e highest order bit set in the size). | |
| 317 | + */ | |
| 318 | +static void mvebu_pcie_add_windows(struct mvebu_pcie_port *port, | |
| 319 | + unsigned int target, unsigned int attribute, | |
| 320 | + phys_addr_t base, size_t size, | |
| 321 | + phys_addr_t remap) | |
| 322 | +{ | |
| 323 | + size_t size_mapped = 0; | |
| 324 | + | |
| 325 | + while (size) { | |
| 326 | + size_t sz = 1 << (fls(size) - 1); | |
| 327 | + int ret; | |
| 328 | + | |
| 329 | + ret = mvebu_mbus_add_window_remap_by_id(target, attribute, base, | |
| 330 | + sz, remap); | |
| 331 | + if (ret) { | |
| 332 | + dev_err(&port->pcie->pdev->dev, | |
| 333 | + "Could not create MBus window at 0x%x, size 0x%x: %d\n", | |
| 334 | + base, sz, ret); | |
| 335 | + mvebu_pcie_del_windows(port, base - size_mapped, | |
| 336 | + size_mapped); | |
| 337 | + return; | |
| 338 | + } | |
| 339 | + | |
| 340 | + size -= sz; | |
| 341 | + size_mapped += sz; | |
| 342 | + base += sz; | |
| 343 | + if (remap != MVEBU_MBUS_NO_REMAP) | |
| 344 | + remap += sz; | |
| 345 | + } | |
| 346 | +} | |
| 347 | + | |
| 296 | 348 | static void mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) |
| 297 | 349 | { |
| 298 | 350 | phys_addr_t iobase; |
| @@ -304,8 +356,8 @@ static void mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) · 5 unmodified lines | ||
| 304 | 356 | |
| 305 | 357 | /* If a window was configured, remove it */ |
| 306 | 358 | if (port->iowin_base) { |
| 307 | − mvebu_mbus_del_window(port->iowin_base, | |
| 308 | − port->iowin_size); | |
| 359 | + mvebu_pcie_del_windows(port, port->iowin_base, | |
| 360 | + port->iowin_size); | |
| 309 | 361 | port->iowin_base = 0; |
| 310 | 362 | port->iowin_size = 0; |
| 311 | 363 | } |
| @@ -331,11 +383,11 @@ static void mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) · 19 unmodified lines | ||
| 331 | 383 | port->iowin_base = port->pcie->io.start + iobase; |
| 332 | 384 | port->iowin_size = ((0xFFF | ((port->bridge.iolimit & 0xF0) << 8) | |
| 333 | 385 | (port->bridge.iolimitupper << 16)) - |
| 334 | − iobase); | |
| 386 | + iobase) + 1; | |
| 335 | 387 | |
| 336 | − mvebu_mbus_add_window_remap_by_id(port->io_target, port->io_attr, | |
| 337 | − port->iowin_base, port->iowin_size, | |
| 338 | − iobase); | |
| 388 | + mvebu_pcie_add_windows(port, port->io_target, port->io_attr, | |
| 389 | + port->iowin_base, port->iowin_size, | |
| 390 | + iobase); | |
| 339 | 391 | } |
| 340 | 392 | |
| 341 | 393 | static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) |
| @@ -346,8 +398,8 @@ static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) · 4 unmodified lines | ||
| 346 | 398 | |
| 347 | 399 | /* If a window was configured, remove it */ |
| 348 | 400 | if (port->memwin_base) { |
| 349 | − mvebu_mbus_del_window(port->memwin_base, | |
| 350 | − port->memwin_size); | |
| 401 | + mvebu_pcie_del_windows(port, port->memwin_base, | |
| 402 | + port->memwin_size); | |
| 351 | 403 | port->memwin_base = 0; |
| 352 | 404 | port->memwin_size = 0; |
| 353 | 405 | } |
| @@ -364,10 +416,11 @@ static void mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) · 10 unmodified lines | ||
| 364 | 416 | port->memwin_base = ((port->bridge.membase & 0xFFF0) << 16); |
| 365 | 417 | port->memwin_size = |
| 366 | 418 | (((port->bridge.memlimit & 0xFFF0) << 16) | 0xFFFFF) - |
| 367 | − port->memwin_base; | |
| 419 | + port->memwin_base + 1; | |
| 368 | 420 | |
| 369 | − mvebu_mbus_add_window_by_id(port->mem_target, port->mem_attr, | |
| 370 | − port->memwin_base, port->memwin_size); | |
| 421 | + mvebu_pcie_add_windows(port, port->mem_target, port->mem_attr, | |
| 422 | + port->memwin_base, port->memwin_size, | |
| 423 | + MVEBU_MBUS_NO_REMAP); | |
| 371 | 424 | } |
| 372 | 425 | |
| 373 | 426 | /* |
| @@ -743,14 +796,21 @@ static resource_size_t mvebu_pcie_align_resource(struct pci_dev *dev, · 369 unmodified lines | ||
| 743 | 796 | |
| 744 | 797 | /* |
| 745 | 798 | * On the PCI-to-PCI bridge side, the I/O windows must have at |
| 746 | − * least a 64 KB size and be aligned on their size, and the | |
| 747 | − * memory windows must have at least a 1 MB size and be | |
| 748 | − * aligned on their size | |
| 799 | + * least a 64 KB size and the memory windows must have at | |
| 800 | + * least a 1 MB size. Moreover, MBus windows need to have a | |
| 801 | + * base address aligned on their size, and their size must be | |
| 802 | + * a power of two. This means that if the BAR doesn't have a | |
| 803 | + * power of two size, several MBus windows will actually be | |
| 804 | + * created. We need to ensure that the biggest MBus window | |
| 805 | + * (which will be the first one) is aligned on its size, which | |
| 806 | + * explains the rounddown_pow_of_two() being done here. | |
| 749 | 807 | */ |
| 750 | 808 | if (res->flags & IORESOURCE_IO) |
| 751 | − return round_up(start, max_t(resource_size_t, SZ_64K, size)); | |
| 809 | + return round_up(start, max_t(resource_size_t, SZ_64K, | |
| 810 | + rounddown_pow_of_two(size))); | |
| 752 | 811 | else if (res->flags & IORESOURCE_MEM) |
| 753 | − return round_up(start, max_t(resource_size_t, SZ_1M, size)); | |
| 812 | + return round_up(start, max_t(resource_size_t, SZ_1M, | |
| 813 | + rounddown_pow_of_two(size))); | |
| 754 | 814 | else |
| 755 | 815 | return start; |
| 756 | 816 | } |
| @@ -282,8 +282,8 @@ static int board_added(struct slot *p_slot) · 281 unmodified lines | ||
| 282 | 282 | return WRONG_BUS_FREQUENCY; |
| 283 | 283 | } |
| 284 | 284 | |
| 285 | − bsp = ctrl->pci_dev->bus->cur_bus_speed; | |
| 286 | − msp = ctrl->pci_dev->bus->max_bus_speed; | |
| 285 | + bsp = ctrl->pci_dev->subordinate->cur_bus_speed; | |
| 286 | + msp = ctrl->pci_dev->subordinate->max_bus_speed; | |
| 287 | 287 | |
| 288 | 288 | /* Check if there are other slots or devices on the same bus */ |
| 289 | 289 | if (!list_empty(&ctrl->pci_dev->subordinate->devices)) |
| @@ -3067,7 +3067,8 @@ int pci_wait_for_pending_transaction(struct pci_dev *dev) · 3066 unmodified lines | ||
| 3067 | 3067 | if (!pci_is_pcie(dev)) |
| 3068 | 3068 | return 1; |
| 3069 | 3069 | |
| 3070 | − return pci_wait_for_pending(dev, PCI_EXP_DEVSTA, PCI_EXP_DEVSTA_TRPND); | |
| 3070 | + return pci_wait_for_pending(dev, pci_pcie_cap(dev) + PCI_EXP_DEVSTA, | |
| 3071 | + PCI_EXP_DEVSTA_TRPND); | |
| 3071 | 3072 | } |
| 3072 | 3073 | EXPORT_SYMBOL(pci_wait_for_pending_transaction); |
| 3073 | 3074 | |
| @@ -3109,7 +3110,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe) · 35 unmodified lines | ||
| 3109 | 3110 | return 0; |
| 3110 | 3111 | |
| 3111 | 3112 | /* Wait for Transaction Pending bit clean */ |
| 3112 | − if (pci_wait_for_pending(dev, PCI_AF_STATUS, PCI_AF_STATUS_TP)) | |
| 3113 | + if (pci_wait_for_pending(dev, pos + PCI_AF_STATUS, PCI_AF_STATUS_TP)) | |
| 3113 | 3114 | goto clear; |
| 3114 | 3115 | |
| 3115 | 3116 | dev_err(&dev->dev, "transaction is not cleared; " |
| @@ -523,17 +523,6 @@ static int wmt_gpio_get_direction(struct gpio_chip *chip, unsigned offset) · 522 unmodified lines | ||
| 523 | 523 | return GPIOF_DIR_IN; |
| 524 | 524 | } |
| 525 | 525 | |
| 526 | −static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |
| 527 | −{ | |
| 528 | − return pinctrl_gpio_direction_input(chip->base + offset); | |
| 529 | −} | |
| 530 | − | |
| 531 | −static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |
| 532 | − int value) | |
| 533 | −{ | |
| 534 | − return pinctrl_gpio_direction_output(chip->base + offset); | |
| 535 | −} | |
| 536 | − | |
| 537 | 526 | static int wmt_gpio_get_value(struct gpio_chip *chip, unsigned offset) |
| 538 | 527 | { |
| 539 | 528 | struct wmt_pinctrl_data *data = dev_get_drvdata(chip->dev); |
| @@ -568,6 +557,18 @@ static void wmt_gpio_set_value(struct gpio_chip *chip, unsigned offset, · 28 unmodified lines | ||
| 568 | 557 | wmt_clearbits(data, reg_data_out, BIT(bit)); |
| 569 | 558 | } |
| 570 | 559 | |
| 560 | +static int wmt_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | |
| 561 | +{ | |
| 562 | + return pinctrl_gpio_direction_input(chip->base + offset); | |
| 563 | +} | |
| 564 | + | |
| 565 | +static int wmt_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | |
| 566 | + int value) | |
| 567 | +{ | |
| 568 | + wmt_gpio_set_value(chip, offset, value); | |
| 569 | + return pinctrl_gpio_direction_output(chip->base + offset); | |
| 570 | +} | |
| 571 | + | |
| 571 | 572 | static struct gpio_chip wmt_gpio_chip = { |
| 572 | 573 | .label = "gpio-wmt", |
| 573 | 574 | .owner = THIS_MODULE, |
| @@ -37,7 +37,7 @@ __visible struct { · 36 unmodified lines | ||
| 37 | 37 | * kernel begins at offset 3GB... |
| 38 | 38 | */ |
| 39 | 39 | |
| 40 | −asmlinkage void pnp_bios_callfunc(void); | |
| 40 | +asmlinkage __visible void pnp_bios_callfunc(void); | |
| 41 | 41 | |
| 42 | 42 | __asm__(".text \n" |
| 43 | 43 | __ALIGN_STR "\n" |
| @@ -6,6 +6,7 @@ menu "PTP clock support" · 5 unmodified lines | ||
| 6 | 6 | |
| 7 | 7 | config PTP_1588_CLOCK |
| 8 | 8 | tristate "PTP clock support" |
| 9 | + depends on NET | |
| 9 | 10 | select PPS |
| 10 | 11 | select NET_PTP_CLASSIFY |
| 11 | 12 | help |
| @@ -74,7 +75,7 @@ config DP83640_PHY · 62 unmodified lines | ||
| 74 | 75 | config PTP_1588_CLOCK_PCH |
| 75 | 76 | tristate "Intel PCH EG20T as PTP clock" |
| 76 | 77 | depends on X86 || COMPILE_TEST |
| 77 | − depends on HAS_IOMEM | |
| 78 | + depends on HAS_IOMEM && NET | |
| 78 | 79 | select PTP_1588_CLOCK |
| 79 | 80 | help |
| 80 | 81 | This driver adds support for using the PCH EG20T as a PTP |
| @@ -569,6 +569,9 @@ static int hym8563_probe(struct i2c_client *client, · 568 unmodified lines | ||
| 569 | 569 | if (IS_ERR(hym8563->rtc)) |
| 570 | 570 | return PTR_ERR(hym8563->rtc); |
| 571 | 571 | |
| 572 | + /* the hym8563 alarm only supports a minute accuracy */ | |
| 573 | + hym8563->rtc->uie_unsupported = 1; | |
| 574 | + | |
| 572 | 575 | #ifdef CONFIG_COMMON_CLK |
| 573 | 576 | hym8563_clkout_register_clk(hym8563); |
| 574 | 577 | #endif |
| @@ -1621,8 +1621,6 @@ void sas_rphy_free(struct sas_rphy *rphy) · 1620 unmodified lines | ||
| 1621 | 1621 | list_del(&rphy->list); |
| 1622 | 1622 | mutex_unlock(&sas_host->lock); |
| 1623 | 1623 | |
| 1624 | − sas_bsg_remove(shost, rphy); | |
| 1625 | − | |
| 1626 | 1624 | transport_destroy_device(dev); |
| 1627 | 1625 | |
| 1628 | 1626 | put_device(dev); |
| @@ -1681,6 +1679,7 @@ sas_rphy_remove(struct sas_rphy *rphy) · 52 unmodified lines | ||
| 1681 | 1679 | } |
| 1682 | 1680 | |
| 1683 | 1681 | sas_rphy_unlink(rphy); |
| 1682 | + sas_bsg_remove(NULL, rphy); | |
| 1684 | 1683 | transport_remove_device(dev); |
| 1685 | 1684 | device_del(dev); |
| 1686 | 1685 | } |
| @@ -1,10 +1,12 @@ | ||
| 1 | 1 | # |
| 2 | 2 | # Makefile for the SuperH specific drivers. |
| 3 | 3 | # |
| 4 | −obj-y := intc/ | |
| 4 | +obj-$(CONFIG_SUPERH) += intc/ | |
| 5 | +obj-$(CONFIG_ARCH_SHMOBILE_LEGACY) += intc/ | |
| 6 | +ifneq ($(CONFIG_COMMON_CLK),y) | |
| 7 | +obj-$(CONFIG_HAVE_CLK) += clk/ | |
| 8 | +endif | |
| 9 | +obj-$(CONFIG_MAPLE) += maple/ | |
| 10 | +obj-$(CONFIG_SUPERHYWAY) += superhyway/ | |
| 5 | 11 | |
| 6 | −obj-$(CONFIG_HAVE_CLK) += clk/ | |
| 7 | −obj-$(CONFIG_MAPLE) += maple/ | |
| 8 | −obj-$(CONFIG_SUPERHYWAY) += superhyway/ | |
| 9 | − | |
| 10 | −obj-y += pm_runtime.o | |
| 12 | +obj-y += pm_runtime.o | |
| @@ -50,8 +50,25 @@ static struct pm_clk_notifier_block platform_bus_notifier = { · 49 unmodified lines | ||
| 50 | 50 | .con_ids = { NULL, }, |
| 51 | 51 | }; |
| 52 | 52 | |
| 53 | +static bool default_pm_on; | |
| 54 | + | |
| 53 | 55 | static int __init sh_pm_runtime_init(void) |
| 54 | 56 | { |
| 57 | + if (IS_ENABLED(CONFIG_ARCH_SHMOBILE_MULTI)) { | |
| 58 | + if (!of_machine_is_compatible("renesas,emev2") && | |
| 59 | + !of_machine_is_compatible("renesas,r7s72100") && | |
| 60 | + !of_machine_is_compatible("renesas,r8a73a4") && | |
| 61 | + !of_machine_is_compatible("renesas,r8a7740") && | |
| 62 | + !of_machine_is_compatible("renesas,r8a7778") && | |
| 63 | + !of_machine_is_compatible("renesas,r8a7779") && | |
| 64 | + !of_machine_is_compatible("renesas,r8a7790") && | |
| 65 | + !of_machine_is_compatible("renesas,r8a7791") && | |
| 66 | + !of_machine_is_compatible("renesas,sh7372") && | |
| 67 | + !of_machine_is_compatible("renesas,sh73a0")) | |
| 68 | + return 0; | |
| 69 | + } | |
| 70 | + | |
| 71 | + default_pm_on = true; | |
| 55 | 72 | pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier); |
| 56 | 73 | return 0; |
| 57 | 74 | } |
| @@ -59,7 +76,8 @@ core_initcall(sh_pm_runtime_init); · 1 unmodified line | ||
| 59 | 76 | |
| 60 | 77 | static int __init sh_pm_runtime_late_init(void) |
| 61 | 78 | { |
| 62 | − pm_genpd_poweroff_unused(); | |
| 79 | + if (default_pm_on) | |
| 80 | + pm_genpd_poweroff_unused(); | |
| 63 | 81 | return 0; |
| 64 | 82 | } |
| 65 | 83 | late_initcall(sh_pm_runtime_late_init); |
| @@ -29,18 +29,6 @@ static int pxa2xx_spi_map_dma_buffer(struct driver_data *drv_data, · 28 unmodified lines | ||
| 29 | 29 | struct sg_table *sgt; |
| 30 | 30 | void *buf, *pbuf; |
| 31 | 31 | |
| 32 | − /* | |
| 33 | − * Some DMA controllers have problems transferring buffers that are | |
| 34 | − * not multiple of 4 bytes. So we truncate the transfer so that it | |
| 35 | − * is suitable for such controllers, and handle the trailing bytes | |
| 36 | − * manually after the DMA completes. | |
| 37 | − * | |
| 38 | − * REVISIT: It would be better if this information could be | |
| 39 | − * retrieved directly from the DMA device in a similar way than | |
| 40 | − * ->copy_align etc. is done. | |
| 41 | − */ | |
| 42 | − len = ALIGN(drv_data->len, 4); | |
| 43 | − | |
| 44 | 32 | if (dir == DMA_TO_DEVICE) { |
| 45 | 33 | dmadev = drv_data->tx_chan->device->dev; |
| 46 | 34 | sgt = &drv_data->tx_sgt; |
| @@ -144,12 +132,8 @@ static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data, · 97 unmodified lines | ||
| 144 | 132 | if (!error) { |
| 145 | 133 | pxa2xx_spi_unmap_dma_buffers(drv_data); |
| 146 | 134 | |
| 147 | − /* Handle the last bytes of unaligned transfer */ | |
| 148 | 135 | drv_data->tx += drv_data->tx_map_len; |
| 149 | − drv_data->write(drv_data); | |
| 150 | − | |
| 151 | 136 | drv_data->rx += drv_data->rx_map_len; |
| 152 | − drv_data->read(drv_data); | |
| 153 | 137 | |
| 154 | 138 | msg->actual_length += drv_data->len; |
| 155 | 139 | msg->state = pxa2xx_spi_next_transfer(drv_data); |
| @@ -734,7 +734,7 @@ static int spi_qup_remove(struct platform_device *pdev) · 733 unmodified lines | ||
| 734 | 734 | int ret; |
| 735 | 735 | |
| 736 | 736 | ret = pm_runtime_get_sync(&pdev->dev); |
| 737 | − if (ret) | |
| 737 | + if (ret < 0) | |
| 738 | 738 | return ret; |
| 739 | 739 | |
| 740 | 740 | ret = spi_qup_set_state(controller, QUP_STATE_RESET); |
| @@ -580,6 +580,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable) · 579 unmodified lines | ||
| 580 | 580 | spi->master->set_cs(spi, !enable); |
| 581 | 581 | } |
| 582 | 582 | |
| 583 | +#ifdef CONFIG_HAS_DMA | |
| 583 | 584 | static int spi_map_buf(struct spi_master *master, struct device *dev, |
| 584 | 585 | struct sg_table *sgt, void *buf, size_t len, |
| 585 | 586 | enum dma_data_direction dir) |
| @@ -637,55 +638,12 @@ static void spi_unmap_buf(struct spi_master *master, struct device *dev, · 51 unmodified lines | ||
| 637 | 638 | } |
| 638 | 639 | } |
| 639 | 640 | |
| 640 | −static int spi_map_msg(struct spi_master *master, struct spi_message *msg) | |
| 641 | +static int __spi_map_msg(struct spi_master *master, struct spi_message *msg) | |
| 641 | 642 | { |
| 642 | 643 | struct device *tx_dev, *rx_dev; |
| 643 | 644 | struct spi_transfer *xfer; |
| 644 | − void *tmp; | |
| 645 | − unsigned int max_tx, max_rx; | |
| 646 | 645 | int ret; |
| 647 | 646 | |
| 648 | − if (master->flags & (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX)) { | |
| 649 | − max_tx = 0; | |
| 650 | − max_rx = 0; | |
| 651 | − | |
| 652 | − list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
| 653 | − if ((master->flags & SPI_MASTER_MUST_TX) && | |
| 654 | − !xfer->tx_buf) | |
| 655 | − max_tx = max(xfer->len, max_tx); | |
| 656 | − if ((master->flags & SPI_MASTER_MUST_RX) && | |
| 657 | − !xfer->rx_buf) | |
| 658 | − max_rx = max(xfer->len, max_rx); | |
| 659 | − } | |
| 660 | − | |
| 661 | − if (max_tx) { | |
| 662 | − tmp = krealloc(master->dummy_tx, max_tx, | |
| 663 | − GFP_KERNEL | GFP_DMA); | |
| 664 | − if (!tmp) | |
| 665 | − return -ENOMEM; | |
| 666 | − master->dummy_tx = tmp; | |
| 667 | − memset(tmp, 0, max_tx); | |
| 668 | − } | |
| 669 | − | |
| 670 | − if (max_rx) { | |
| 671 | − tmp = krealloc(master->dummy_rx, max_rx, | |
| 672 | − GFP_KERNEL | GFP_DMA); | |
| 673 | − if (!tmp) | |
| 674 | − return -ENOMEM; | |
| 675 | − master->dummy_rx = tmp; | |
| 676 | − } | |
| 677 | − | |
| 678 | − if (max_tx || max_rx) { | |
| 679 | − list_for_each_entry(xfer, &msg->transfers, | |
| 680 | − transfer_list) { | |
| 681 | − if (!xfer->tx_buf) | |
| 682 | − xfer->tx_buf = master->dummy_tx; | |
| 683 | − if (!xfer->rx_buf) | |
| 684 | − xfer->rx_buf = master->dummy_rx; | |
| 685 | − } | |
| 686 | − } | |
| 687 | − } | |
| 688 | − | |
| 689 | 647 | if (!master->can_dma) |
| 690 | 648 | return 0; |
| 691 | 649 | |
| @@ -742,6 +700,69 @@ static int spi_unmap_msg(struct spi_master *master, struct spi_message *msg) · 50 unmodified lines | ||
| 742 | 700 | |
| 743 | 701 | return 0; |
| 744 | 702 | } |
| 703 | +#else /* !CONFIG_HAS_DMA */ | |
| 704 | +static inline int __spi_map_msg(struct spi_master *master, | |
| 705 | + struct spi_message *msg) | |
| 706 | +{ | |
| 707 | + return 0; | |
| 708 | +} | |
| 709 | + | |
| 710 | +static inline int spi_unmap_msg(struct spi_master *master, | |
| 711 | + struct spi_message *msg) | |
| 712 | +{ | |
| 713 | + return 0; | |
| 714 | +} | |
| 715 | +#endif /* !CONFIG_HAS_DMA */ | |
| 716 | + | |
| 717 | +static int spi_map_msg(struct spi_master *master, struct spi_message *msg) | |
| 718 | +{ | |
| 719 | + struct spi_transfer *xfer; | |
| 720 | + void *tmp; | |
| 721 | + unsigned int max_tx, max_rx; | |
| 722 | + | |
| 723 | + if (master->flags & (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX)) { | |
| 724 | + max_tx = 0; | |
| 725 | + max_rx = 0; | |
| 726 | + | |
| 727 | + list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
| 728 | + if ((master->flags & SPI_MASTER_MUST_TX) && | |
| 729 | + !xfer->tx_buf) | |
| 730 | + max_tx = max(xfer->len, max_tx); | |
| 731 | + if ((master->flags & SPI_MASTER_MUST_RX) && | |
| 732 | + !xfer->rx_buf) | |
| 733 | + max_rx = max(xfer->len, max_rx); | |
| 734 | + } | |
| 735 | + | |
| 736 | + if (max_tx) { | |
| 737 | + tmp = krealloc(master->dummy_tx, max_tx, | |
| 738 | + GFP_KERNEL | GFP_DMA); | |
| 739 | + if (!tmp) | |
| 740 | + return -ENOMEM; | |
| 741 | + master->dummy_tx = tmp; | |
| 742 | + memset(tmp, 0, max_tx); | |
| 743 | + } | |
| 744 | + | |
| 745 | + if (max_rx) { | |
| 746 | + tmp = krealloc(master->dummy_rx, max_rx, | |
| 747 | + GFP_KERNEL | GFP_DMA); | |
| 748 | + if (!tmp) | |
| 749 | + return -ENOMEM; | |
| 750 | + master->dummy_rx = tmp; | |
| 751 | + } | |
| 752 | + | |
| 753 | + if (max_tx || max_rx) { | |
| 754 | + list_for_each_entry(xfer, &msg->transfers, | |
| 755 | + transfer_list) { | |
| 756 | + if (!xfer->tx_buf) | |
| 757 | + xfer->tx_buf = master->dummy_tx; | |
| 758 | + if (!xfer->rx_buf) | |
| 759 | + xfer->rx_buf = master->dummy_rx; | |
| 760 | + } | |
| 761 | + } | |
| 762 | + } | |
| 763 | + | |
| 764 | + return __spi_map_msg(master, msg); | |
| 765 | +} | |
| 745 | 766 | |
| 746 | 767 | /* |
| 747 | 768 | * spi_transfer_one_message - Default implementation of transfer_one_message() |
| @@ -1151,7 +1172,6 @@ static int spi_master_initialize_queue(struct spi_master *master) · 403 unmodified lines | ||
| 1151 | 1172 | { |
| 1152 | 1173 | int ret; |
| 1153 | 1174 | |
| 1154 | − master->queued = true; | |
| 1155 | 1175 | master->transfer = spi_queued_transfer; |
| 1156 | 1176 | if (!master->transfer_one_message) |
| 1157 | 1177 | master->transfer_one_message = spi_transfer_one_message; |
| @@ -1162,6 +1182,7 @@ static int spi_master_initialize_queue(struct spi_master *master) · 4 unmodified lines | ||
| 1162 | 1182 | dev_err(&master->dev, "problem initializing queue\n"); |
| 1163 | 1183 | goto err_init_queue; |
| 1164 | 1184 | } |
| 1185 | + master->queued = true; | |
| 1165 | 1186 | ret = spi_start_queue(master); |
| 1166 | 1187 | if (ret) { |
| 1167 | 1188 | dev_err(&master->dev, "problem starting queue\n"); |
| @@ -1171,8 +1192,8 @@ static int spi_master_initialize_queue(struct spi_master *master) · 3 unmodified lines | ||
| 1171 | 1192 | return 0; |
| 1172 | 1193 | |
| 1173 | 1194 | err_start_queue: |
| 1174 | −err_init_queue: | |
| 1175 | 1195 | spi_destroy_queue(master); |
| 1196 | +err_init_queue: | |
| 1176 | 1197 | return ret; |
| 1177 | 1198 | } |
| 1178 | 1199 | |
| @@ -1756,7 +1777,7 @@ EXPORT_SYMBOL_GPL(spi_busnum_to_master); · 577 unmodified lines | ||
| 1756 | 1777 | */ |
| 1757 | 1778 | int spi_setup(struct spi_device *spi) |
| 1758 | 1779 | { |
| 1759 | − unsigned bad_bits; | |
| 1780 | + unsigned bad_bits, ugly_bits; | |
| 1760 | 1781 | int status = 0; |
| 1761 | 1782 | |
| 1762 | 1783 | /* check mode to prevent that DUAL and QUAD set at the same time |
| @@ -1776,6 +1797,15 @@ int spi_setup(struct spi_device *spi) · 13 unmodified lines | ||
| 1776 | 1797 | * that aren't supported with their current master |
| 1777 | 1798 | */ |
| 1778 | 1799 | bad_bits = spi->mode & ~spi->master->mode_bits; |
| 1800 | + ugly_bits = bad_bits & | |
| 1801 | + (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD); | |
| 1802 | + if (ugly_bits) { | |
| 1803 | + dev_warn(&spi->dev, | |
| 1804 | + "setup: ignoring unsupported mode bits %x\n", | |
| 1805 | + ugly_bits); | |
| 1806 | + spi->mode &= ~ugly_bits; | |
| 1807 | + bad_bits &= ~ugly_bits; | |
| 1808 | + } | |
| 1779 | 1809 | if (bad_bits) { |
| 1780 | 1810 | dev_err(&spi->dev, "setup: unsupported mode bits %x\n", |
| 1781 | 1811 | bad_bits); |
| @@ -517,7 +517,7 @@ int imx_drm_encoder_get_mux_id(struct device_node *node, · 516 unmodified lines | ||
| 517 | 517 | of_node_put(port); |
| 518 | 518 | if (port == imx_crtc->port) { |
| 519 | 519 | ret = of_graph_parse_endpoint(ep, &endpoint); |
| 520 | − return ret ? ret : endpoint.id; | |
| 520 | + return ret ? ret : endpoint.port; | |
| 521 | 521 | } |
| 522 | 522 | } while (ep); |
| 523 | 523 | |
| @@ -675,6 +675,11 @@ static int imx_drm_platform_probe(struct platform_device *pdev) · 151 unmodified lines | ||
| 675 | 675 | if (!remote || !of_device_is_available(remote)) { |
| 676 | 676 | of_node_put(remote); |
| 677 | 677 | continue; |
| 678 | + } else if (!of_device_is_available(remote->parent)) { | |
| 679 | + dev_warn(&pdev->dev, "parent device of %s is not available\n", | |
| 680 | + remote->full_name); | |
| 681 | + of_node_put(remote); | |
| 682 | + continue; | |
| 678 | 683 | } |
| 679 | 684 | |
| 680 | 685 | ret = imx_drm_add_component(&pdev->dev, remote); |
| @@ -582,7 +582,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data) · 581 unmodified lines | ||
| 582 | 582 | tve->dev = dev; |
| 583 | 583 | spin_lock_init(&tve->lock); |
| 584 | 584 | |
| 585 | − ddc_node = of_parse_phandle(np, "i2c-ddc-bus", 0); | |
| 585 | + ddc_node = of_parse_phandle(np, "ddc-i2c-bus", 0); | |
| 586 | 586 | if (ddc_node) { |
| 587 | 587 | tve->ddc = of_find_i2c_adapter_by_node(ddc_node); |
| 588 | 588 | of_node_put(ddc_node); |
| @@ -1247,9 +1247,18 @@ static int vpfe_stop_streaming(struct vb2_queue *vq) · 1246 unmodified lines | ||
| 1247 | 1247 | struct vpfe_fh *fh = vb2_get_drv_priv(vq); |
| 1248 | 1248 | struct vpfe_video_device *video = fh->video; |
| 1249 | 1249 | |
| 1250 | − if (!vb2_is_streaming(vq)) | |
| 1251 | − return 0; | |
| 1252 | 1250 | /* release all active buffers */ |
| 1251 | + if (video->cur_frm == video->next_frm) { | |
| 1252 | + vb2_buffer_done(&video->cur_frm->vb, VB2_BUF_STATE_ERROR); | |
| 1253 | + } else { | |
| 1254 | + if (video->cur_frm != NULL) | |
| 1255 | + vb2_buffer_done(&video->cur_frm->vb, | |
| 1256 | + VB2_BUF_STATE_ERROR); | |
| 1257 | + if (video->next_frm != NULL) | |
| 1258 | + vb2_buffer_done(&video->next_frm->vb, | |
| 1259 | + VB2_BUF_STATE_ERROR); | |
| 1260 | + } | |
| 1261 | + | |
| 1253 | 1262 | while (!list_empty(&video->dma_queue)) { |
| 1254 | 1263 | video->next_frm = list_entry(video->dma_queue.next, |
| 1255 | 1264 | struct vpfe_cap_buffer, list); |
| @@ -48,10 +48,8 @@ static const struct usb_device_id sn9c102_id_table[] = { · 47 unmodified lines | ||
| 48 | 48 | { SN9C102_USB_DEVICE(0x0c45, 0x600d, BRIDGE_SN9C102), }, |
| 49 | 49 | /* { SN9C102_USB_DEVICE(0x0c45, 0x6011, BRIDGE_SN9C102), }, OV6650 */ |
| 50 | 50 | { SN9C102_USB_DEVICE(0x0c45, 0x6019, BRIDGE_SN9C102), }, |
| 51 | −#endif | |
| 52 | 51 | { SN9C102_USB_DEVICE(0x0c45, 0x6024, BRIDGE_SN9C102), }, |
| 53 | 52 | { SN9C102_USB_DEVICE(0x0c45, 0x6025, BRIDGE_SN9C102), }, |
| 54 | −#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE | |
| 55 | 53 | { SN9C102_USB_DEVICE(0x0c45, 0x6028, BRIDGE_SN9C102), }, |
| 56 | 54 | { SN9C102_USB_DEVICE(0x0c45, 0x6029, BRIDGE_SN9C102), }, |
| 57 | 55 | { SN9C102_USB_DEVICE(0x0c45, 0x602a, BRIDGE_SN9C102), }, |
| @@ -953,8 +953,6 @@ static int netdev_close(struct net_device *pnetdev) · 952 unmodified lines | ||
| 953 | 953 | #endif /* CONFIG_8723AU_P2P */ |
| 954 | 954 | |
| 955 | 955 | rtw_scan_abort23a(padapter); |
| 956 | − /* set this at the end */ | |
| 957 | − padapter->rtw_wdev->iftype = NL80211_IFTYPE_MONITOR; | |
| 958 | 956 | |
| 959 | 957 | RT_TRACE(_module_os_intfs_c_, _drv_info_, ("-871x_drv - drv_close\n")); |
| 960 | 958 | DBG_8723A("-871x_drv - drv_close, bup =%d\n", padapter->bup); |
| @@ -26,7 +26,7 @@ unsigned int ffaddr2pipehdl23a(struct dvobj_priv *pdvobj, u32 addr) · 25 unmodified lines | ||
| 26 | 26 | if (addr == RECV_BULK_IN_ADDR) { |
| 27 | 27 | pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[0]); |
| 28 | 28 | } else if (addr == RECV_INT_IN_ADDR) { |
| 29 | − pipe = usb_rcvbulkpipe(pusbd, pdvobj->RtInPipe[1]); | |
| 29 | + pipe = usb_rcvintpipe(pusbd, pdvobj->RtInPipe[1]); | |
| 30 | 30 | } else if (addr < HW_QUEUE_ENTRY) { |
| 31 | 31 | ep_num = pdvobj->Queue2Pipe[addr]; |
| 32 | 32 | pipe = usb_sndbulkpipe(pusbd, ep_num); |
| @@ -1593,7 +1593,9 @@ int iscsit_process_nop_out(struct iscsi_conn *conn, struct iscsi_cmd *cmd, · 1592 unmodified lines | ||
| 1593 | 1593 | * Initiator is expecting a NopIN ping reply.. |
| 1594 | 1594 | */ |
| 1595 | 1595 | if (hdr->itt != RESERVED_ITT) { |
| 1596 | − BUG_ON(!cmd); | |
| 1596 | + if (!cmd) | |
| 1597 | + return iscsit_add_reject(conn, ISCSI_REASON_PROTOCOL_ERROR, | |
| 1598 | + (unsigned char *)hdr); | |
| 1597 | 1599 | |
| 1598 | 1600 | spin_lock_bh(&conn->cmd_lock); |
| 1599 | 1601 | list_add_tail(&cmd->i_conn_node, &conn->conn_cmd_list); |
| @@ -775,6 +775,7 @@ struct iscsi_np { · 774 unmodified lines | ||
| 775 | 775 | int np_ip_proto; |
| 776 | 776 | int np_sock_type; |
| 777 | 777 | enum np_thread_state_table np_thread_state; |
| 778 | + bool enabled; | |
| 778 | 779 | enum iscsi_timer_flags_table np_login_timer_flags; |
| 779 | 780 | u32 np_exports; |
| 780 | 781 | enum np_flags_table np_flags; |
| @@ -436,7 +436,7 @@ static int iscsi_login_zero_tsih_s2( · 435 unmodified lines | ||
| 436 | 436 | } |
| 437 | 437 | off = mrdsl % PAGE_SIZE; |
| 438 | 438 | if (!off) |
| 439 | − return 0; | |
| 439 | + goto check_prot; | |
| 440 | 440 | |
| 441 | 441 | if (mrdsl < PAGE_SIZE) |
| 442 | 442 | mrdsl = PAGE_SIZE; |
| @@ -452,6 +452,31 @@ static int iscsi_login_zero_tsih_s2( · 9 unmodified lines | ||
| 452 | 452 | ISCSI_LOGIN_STATUS_NO_RESOURCES); |
| 453 | 453 | return -1; |
| 454 | 454 | } |
| 455 | + /* | |
| 456 | + * ISER currently requires that ImmediateData + Unsolicited | |
| 457 | + * Data be disabled when protection / signature MRs are enabled. | |
| 458 | + */ | |
| 459 | +check_prot: | |
| 460 | + if (sess->se_sess->sup_prot_ops & | |
| 461 | + (TARGET_PROT_DOUT_STRIP | TARGET_PROT_DOUT_PASS | | |
| 462 | + TARGET_PROT_DOUT_INSERT)) { | |
| 463 | + | |
| 464 | + sprintf(buf, "ImmediateData=No"); | |
| 465 | + if (iscsi_change_param_value(buf, conn->param_list, 0) < 0) { | |
| 466 | + iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR, | |
| 467 | + ISCSI_LOGIN_STATUS_NO_RESOURCES); | |
| 468 | + return -1; | |
| 469 | + } | |
| 470 | + | |
| 471 | + sprintf(buf, "InitialR2T=Yes"); | |
| 472 | + if (iscsi_change_param_value(buf, conn->param_list, 0) < 0) { | |
| 473 | + iscsit_tx_login_rsp(conn, ISCSI_STATUS_CLS_TARGET_ERR, | |
| 474 | + ISCSI_LOGIN_STATUS_NO_RESOURCES); | |
| 475 | + return -1; | |
| 476 | + } | |
| 477 | + pr_debug("Forcing ImmediateData=No + InitialR2T=Yes for" | |
| 478 | + " T10-PI enabled ISER session\n"); | |
| 479 | + } | |
| 455 | 480 | } |
| 456 | 481 | |
| 457 | 482 | return 0; |
| @@ -984,6 +1009,7 @@ int iscsi_target_setup_login_socket( · 526 unmodified lines | ||
| 984 | 1009 | } |
| 985 | 1010 | |
| 986 | 1011 | np->np_transport = t; |
| 1012 | + np->enabled = true; | |
| 987 | 1013 | return 0; |
| 988 | 1014 | } |
| 989 | 1015 | |
| @@ -184,6 +184,7 @@ static void iscsit_clear_tpg_np_login_thread( · 183 unmodified lines | ||
| 184 | 184 | return; |
| 185 | 185 | } |
| 186 | 186 | |
| 187 | + tpg_np->tpg_np->enabled = false; | |
| 187 | 188 | iscsit_reset_np_thread(tpg_np->tpg_np, tpg_np, tpg, shutdown); |
| 188 | 189 | } |
| 189 | 190 | |
| @@ -798,10 +798,10 @@ int se_dev_set_emulate_write_cache(struct se_device *dev, int flag) · 797 unmodified lines | ||
| 798 | 798 | pr_err("emulate_write_cache not supported for pSCSI\n"); |
| 799 | 799 | return -EINVAL; |
| 800 | 800 | } |
| 801 | − if (dev->transport->get_write_cache) { | |
| 802 | − pr_warn("emulate_write_cache cannot be changed when underlying" | |
| 803 | − " HW reports WriteCacheEnabled, ignoring request\n"); | |
| 804 | − return 0; | |
| 801 | + if (flag && | |
| 802 | + dev->transport->get_write_cache) { | |
| 803 | + pr_err("emulate_write_cache not supported for this device\n"); | |
| 804 | + return -EINVAL; | |
| 805 | 805 | } |
| 806 | 806 | |
| 807 | 807 | dev->dev_attrib.emulate_write_cache = flag; |
| @@ -936,6 +936,10 @@ int se_dev_set_pi_prot_type(struct se_device *dev, int flag) · 128 unmodified lines | ||
| 936 | 936 | return 0; |
| 937 | 937 | } |
| 938 | 938 | if (!dev->transport->init_prot || !dev->transport->free_prot) { |
| 939 | + /* 0 is only allowed value for non-supporting backends */ | |
| 940 | + if (flag == 0) | |
| 941 | + return 0; | |
| 942 | + | |
| 939 | 943 | pr_err("DIF protection not supported by backend: %s\n", |
| 940 | 944 | dev->transport->name); |
| 941 | 945 | return -ENOSYS; |
| @@ -1113,6 +1113,7 @@ void transport_init_se_cmd( · 1112 unmodified lines | ||
| 1113 | 1113 | init_completion(&cmd->cmd_wait_comp); |
| 1114 | 1114 | init_completion(&cmd->task_stop_comp); |
| 1115 | 1115 | spin_lock_init(&cmd->t_state_lock); |
| 1116 | + kref_init(&cmd->cmd_kref); | |
| 1116 | 1117 | cmd->transport_state = CMD_T_DEV_ACTIVE; |
| 1117 | 1118 | |
| 1118 | 1119 | cmd->se_tfo = tfo; |
| @@ -2357,7 +2358,6 @@ int target_get_sess_cmd(struct se_session *se_sess, struct se_cmd *se_cmd, · 1238 unmodified lines | ||
| 2357 | 2358 | unsigned long flags; |
| 2358 | 2359 | int ret = 0; |
| 2359 | 2360 | |
| 2360 | − kref_init(&se_cmd->cmd_kref); | |
| 2361 | 2361 | /* |
| 2362 | 2362 | * Add a second kref if the fabric caller is expecting to handle |
| 2363 | 2363 | * fabric acknowledgement that requires two target_put_sess_cmd() |
| @@ -90,18 +90,18 @@ static void ft_free_cmd(struct ft_cmd *cmd) · 89 unmodified lines | ||
| 90 | 90 | { |
| 91 | 91 | struct fc_frame *fp; |
| 92 | 92 | struct fc_lport *lport; |
| 93 | − struct se_session *se_sess; | |
| 93 | + struct ft_sess *sess; | |
| 94 | 94 | |
| 95 | 95 | if (!cmd) |
| 96 | 96 | return; |
| 97 | − se_sess = cmd->sess->se_sess; | |
| 97 | + sess = cmd->sess; | |
| 98 | 98 | fp = cmd->req_frame; |
| 99 | 99 | lport = fr_dev(fp); |
| 100 | 100 | if (fr_seq(fp)) |
| 101 | 101 | lport->tt.seq_release(fr_seq(fp)); |
| 102 | 102 | fc_frame_free(fp); |
| 103 | − percpu_ida_free(&se_sess->sess_tag_pool, cmd->se_cmd.map_tag); | |
| 104 | − ft_sess_put(cmd->sess); /* undo get from lookup at recv */ | |
| 103 | + percpu_ida_free(&sess->se_sess->sess_tag_pool, cmd->se_cmd.map_tag); | |
| 104 | + ft_sess_put(sess); /* undo get from lookup at recv */ | |
| 105 | 105 | } |
| 106 | 106 | |
| 107 | 107 | void ft_release_cmd(struct se_cmd *se_cmd) |
| @@ -66,7 +66,22 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue); · 65 unmodified lines | ||
| 66 | 66 | static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly; |
| 67 | 67 | static unsigned event_array_pages __read_mostly; |
| 68 | 68 | |
| 69 | +/* | |
| 70 | + * sync_set_bit() and friends must be unsigned long aligned on non-x86 | |
| 71 | + * platforms. | |
| 72 | + */ | |
| 73 | +#if !defined(CONFIG_X86) && BITS_PER_LONG > 32 | |
| 74 | + | |
| 75 | +#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL) | |
| 76 | +#define EVTCHN_FIFO_BIT(b, w) \ | |
| 77 | + (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b) | |
| 78 | + | |
| 79 | +#else | |
| 80 | + | |
| 69 | 81 | #define BM(w) ((unsigned long *)(w)) |
| 82 | +#define EVTCHN_FIFO_BIT(b, w) EVTCHN_FIFO_ ##b | |
| 83 | + | |
| 84 | +#endif | |
| 70 | 85 | |
| 71 | 86 | static inline event_word_t *event_word_from_port(unsigned port) |
| 72 | 87 | { |
| @@ -161,33 +176,38 @@ static void evtchn_fifo_bind_to_cpu(struct irq_info *info, unsigned cpu) · 88 unmodified lines | ||
| 161 | 176 | static void evtchn_fifo_clear_pending(unsigned port) |
| 162 | 177 | { |
| 163 | 178 | event_word_t *word = event_word_from_port(port); |
| 164 | − sync_clear_bit(EVTCHN_FIFO_PENDING, BM(word)); | |
| 179 | + sync_clear_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word)); | |
| 165 | 180 | } |
| 166 | 181 | |
| 167 | 182 | static void evtchn_fifo_set_pending(unsigned port) |
| 168 | 183 | { |
| 169 | 184 | event_word_t *word = event_word_from_port(port); |
| 170 | − sync_set_bit(EVTCHN_FIFO_PENDING, BM(word)); | |
| 185 | + sync_set_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word)); | |
| 171 | 186 | } |
| 172 | 187 | |
| 173 | 188 | static bool evtchn_fifo_is_pending(unsigned port) |
| 174 | 189 | { |
| 175 | 190 | event_word_t *word = event_word_from_port(port); |
| 176 | − return sync_test_bit(EVTCHN_FIFO_PENDING, BM(word)); | |
| 191 | + return sync_test_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word)); | |
| 177 | 192 | } |
| 178 | 193 | |
| 179 | 194 | static bool evtchn_fifo_test_and_set_mask(unsigned port) |
| 180 | 195 | { |
| 181 | 196 | event_word_t *word = event_word_from_port(port); |
| 182 | − return sync_test_and_set_bit(EVTCHN_FIFO_MASKED, BM(word)); | |
| 197 | + return sync_test_and_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word)); | |
| 183 | 198 | } |
| 184 | 199 | |
| 185 | 200 | static void evtchn_fifo_mask(unsigned port) |
| 186 | 201 | { |
| 187 | 202 | event_word_t *word = event_word_from_port(port); |
| 188 | − sync_set_bit(EVTCHN_FIFO_MASKED, BM(word)); | |
| 203 | + sync_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word)); | |
| 189 | 204 | } |
| 190 | 205 | |
| 206 | +static bool evtchn_fifo_is_masked(unsigned port) | |
| 207 | +{ | |
| 208 | + event_word_t *word = event_word_from_port(port); | |
| 209 | + return sync_test_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word)); | |
| 210 | +} | |
| 191 | 211 | /* |
| 192 | 212 | * Clear MASKED, spinning if BUSY is set. |
| 193 | 213 | */ |
| @@ -211,7 +231,7 @@ static void evtchn_fifo_unmask(unsigned port) · 17 unmodified lines | ||
| 211 | 231 | BUG_ON(!irqs_disabled()); |
| 212 | 232 | |
| 213 | 233 | clear_masked(word); |
| 214 | − if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))) { | |
| 234 | + if (evtchn_fifo_is_pending(port)) { | |
| 215 | 235 | struct evtchn_unmask unmask = { .port = port }; |
| 216 | 236 | (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask); |
| 217 | 237 | } |
| @@ -243,7 +263,7 @@ static void handle_irq_for_port(unsigned port) · 25 unmodified lines | ||
| 243 | 263 | |
| 244 | 264 | static void consume_one_event(unsigned cpu, |
| 245 | 265 | struct evtchn_fifo_control_block *control_block, |
| 246 | − unsigned priority, uint32_t *ready) | |
| 266 | + unsigned priority, unsigned long *ready) | |
| 247 | 267 | { |
| 248 | 268 | struct evtchn_fifo_queue *q = &per_cpu(cpu_queue, cpu); |
| 249 | 269 | uint32_t head; |
| @@ -273,10 +293,9 @@ static void consume_one_event(unsigned cpu, · 23 unmodified lines | ||
| 273 | 293 | * copy of the ready word. |
| 274 | 294 | */ |
| 275 | 295 | if (head == 0) |
| 276 | − clear_bit(priority, BM(ready)); | |
| 296 | + clear_bit(priority, ready); | |
| 277 | 297 | |
| 278 | − if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word)) | |
| 279 | − && !sync_test_bit(EVTCHN_FIFO_MASKED, BM(word))) | |
| 298 | + if (evtchn_fifo_is_pending(port) && !evtchn_fifo_is_masked(port)) | |
| 280 | 299 | handle_irq_for_port(port); |
| 281 | 300 | |
| 282 | 301 | q->head[priority] = head; |
| @@ -285,7 +304,7 @@ static void consume_one_event(unsigned cpu, · 2 unmodified lines | ||
| 285 | 304 | static void evtchn_fifo_handle_events(unsigned cpu) |
| 286 | 305 | { |
| 287 | 306 | struct evtchn_fifo_control_block *control_block; |
| 288 | − uint32_t ready; | |
| 307 | + unsigned long ready; | |
| 289 | 308 | unsigned q; |
| 290 | 309 | |
| 291 | 310 | control_block = per_cpu(cpu_control_block, cpu); |
| @@ -130,6 +130,15 @@ static void afs_cm_destructor(struct afs_call *call) · 129 unmodified lines | ||
| 130 | 130 | { |
| 131 | 131 | _enter(""); |
| 132 | 132 | |
| 133 | + /* Break the callbacks here so that we do it after the final ACK is | |
| 134 | + * received. The step number here must match the final number in | |
| 135 | + * afs_deliver_cb_callback(). | |
| 136 | + */ | |
| 137 | + if (call->unmarshall == 6) { | |
| 138 | + ASSERT(call->server && call->count && call->request); | |
| 139 | + afs_break_callbacks(call->server, call->count, call->request); | |
| 140 | + } | |
| 141 | + | |
| 133 | 142 | afs_put_server(call->server); |
| 134 | 143 | call->server = NULL; |
| 135 | 144 | kfree(call->buffer); |
| @@ -272,6 +281,16 @@ static int afs_deliver_cb_callback(struct afs_call *call, struct sk_buff *skb, · 136 unmodified lines | ||
| 272 | 281 | _debug("trailer"); |
| 273 | 282 | if (skb->len != 0) |
| 274 | 283 | return -EBADMSG; |
| 284 | + | |
| 285 | + /* Record that the message was unmarshalled successfully so | |
| 286 | + * that the call destructor can know do the callback breaking | |
| 287 | + * work, even if the final ACK isn't received. | |
| 288 | + * | |
| 289 | + * If the step number changes, then afs_cm_destructor() must be | |
| 290 | + * updated also. | |
| 291 | + */ | |
| 292 | + call->unmarshall++; | |
| 293 | + case 6: | |
| 275 | 294 | break; |
| 276 | 295 | } |
| 277 | 296 | |
| @@ -75,7 +75,7 @@ struct afs_call { · 74 unmodified lines | ||
| 75 | 75 | const struct afs_call_type *type; /* type of call */ |
| 76 | 76 | const struct afs_wait_mode *wait_mode; /* completion wait mode */ |
| 77 | 77 | wait_queue_head_t waitq; /* processes awaiting completion */ |
| 78 | − work_func_t async_workfn; | |
| 78 | + void (*async_workfn)(struct afs_call *call); /* asynchronous work function */ | |
| 79 | 79 | struct work_struct async_work; /* asynchronous work processor */ |
| 80 | 80 | struct work_struct work; /* actual work processor */ |
| 81 | 81 | struct sk_buff_head rx_queue; /* received packets */ |
| @@ -25,7 +25,7 @@ static void afs_wake_up_call_waiter(struct afs_call *); · 24 unmodified lines | ||
| 25 | 25 | static int afs_wait_for_call_to_complete(struct afs_call *); |
| 26 | 26 | static void afs_wake_up_async_call(struct afs_call *); |
| 27 | 27 | static int afs_dont_wait_for_call_to_complete(struct afs_call *); |
| 28 | −static void afs_process_async_call(struct work_struct *); | |
| 28 | +static void afs_process_async_call(struct afs_call *); | |
| 29 | 29 | static void afs_rx_interceptor(struct sock *, unsigned long, struct sk_buff *); |
| 30 | 30 | static int afs_deliver_cm_op_id(struct afs_call *, struct sk_buff *, bool); |
| 31 | 31 | |
| @@ -58,6 +58,13 @@ static void afs_collect_incoming_call(struct work_struct *); · 26 unmodified lines | ||
| 58 | 58 | static struct sk_buff_head afs_incoming_calls; |
| 59 | 59 | static DECLARE_WORK(afs_collect_incoming_call_work, afs_collect_incoming_call); |
| 60 | 60 | |
| 61 | +static void afs_async_workfn(struct work_struct *work) | |
| 62 | +{ | |
| 63 | + struct afs_call *call = container_of(work, struct afs_call, async_work); | |
| 64 | + | |
| 65 | + call->async_workfn(call); | |
| 66 | +} | |
| 67 | + | |
| 61 | 68 | /* |
| 62 | 69 | * open an RxRPC socket and bind it to be a server for callback notifications |
| 63 | 70 | * - the socket is left in blocking mode and non-blocking ops use MSG_DONTWAIT |
| @@ -183,6 +190,28 @@ static void afs_free_call(struct afs_call *call) · 119 unmodified lines | ||
| 183 | 190 | kfree(call); |
| 184 | 191 | } |
| 185 | 192 | |
| 193 | +/* | |
| 194 | + * End a call but do not free it | |
| 195 | + */ | |
| 196 | +static void afs_end_call_nofree(struct afs_call *call) | |
| 197 | +{ | |
| 198 | + if (call->rxcall) { | |
| 199 | + rxrpc_kernel_end_call(call->rxcall); | |
| 200 | + call->rxcall = NULL; | |
| 201 | + } | |
| 202 | + if (call->type->destructor) | |
| 203 | + call->type->destructor(call); | |
| 204 | +} | |
| 205 | + | |
| 206 | +/* | |
| 207 | + * End a call and free it | |
| 208 | + */ | |
| 209 | +static void afs_end_call(struct afs_call *call) | |
| 210 | +{ | |
| 211 | + afs_end_call_nofree(call); | |
| 212 | + afs_free_call(call); | |
| 213 | +} | |
| 214 | + | |
| 186 | 215 | /* |
| 187 | 216 | * allocate a call with flat request and reply buffers |
| 188 | 217 | */ |
| @@ -326,7 +355,8 @@ int afs_make_call(struct in_addr *addr, struct afs_call *call, gfp_t gfp, · 137 unmodified lines | ||
| 326 | 355 | atomic_read(&afs_outstanding_calls)); |
| 327 | 356 | |
| 328 | 357 | call->wait_mode = wait_mode; |
| 329 | − INIT_WORK(&call->async_work, afs_process_async_call); | |
| 358 | + call->async_workfn = afs_process_async_call; | |
| 359 | + INIT_WORK(&call->async_work, afs_async_workfn); | |
| 330 | 360 | |
| 331 | 361 | memset(&srx, 0, sizeof(srx)); |
| 332 | 362 | srx.srx_family = AF_RXRPC; |
| @@ -383,11 +413,8 @@ error_do_abort: · 50 unmodified lines | ||
| 383 | 413 | rxrpc_kernel_abort_call(rxcall, RX_USER_ABORT); |
| 384 | 414 | while ((skb = skb_dequeue(&call->rx_queue))) |
| 385 | 415 | afs_free_skb(skb); |
| 386 | − rxrpc_kernel_end_call(rxcall); | |
| 387 | − call->rxcall = NULL; | |
| 388 | 416 | error_kill_call: |
| 389 | − call->type->destructor(call); | |
| 390 | − afs_free_call(call); | |
| 417 | + afs_end_call(call); | |
| 391 | 418 | _leave(" = %d", ret); |
| 392 | 419 | return ret; |
| 393 | 420 | } |
| @@ -509,12 +536,8 @@ static void afs_deliver_to_call(struct afs_call *call) · 115 unmodified lines | ||
| 509 | 536 | if (call->state >= AFS_CALL_COMPLETE) { |
| 510 | 537 | while ((skb = skb_dequeue(&call->rx_queue))) |
| 511 | 538 | afs_free_skb(skb); |
| 512 | − if (call->incoming) { | |
| 513 | − rxrpc_kernel_end_call(call->rxcall); | |
| 514 | − call->rxcall = NULL; | |
| 515 | − call->type->destructor(call); | |
| 516 | − afs_free_call(call); | |
| 517 | − } | |
| 539 | + if (call->incoming) | |
| 540 | + afs_end_call(call); | |
| 518 | 541 | } |
| 519 | 542 | |
| 520 | 543 | _leave(""); |
| @@ -564,10 +587,7 @@ static int afs_wait_for_call_to_complete(struct afs_call *call) · 43 unmodified lines | ||
| 564 | 587 | } |
| 565 | 588 | |
| 566 | 589 | _debug("call complete"); |
| 567 | − rxrpc_kernel_end_call(call->rxcall); | |
| 568 | − call->rxcall = NULL; | |
| 569 | − call->type->destructor(call); | |
| 570 | − afs_free_call(call); | |
| 590 | + afs_end_call(call); | |
| 571 | 591 | _leave(" = %d", ret); |
| 572 | 592 | return ret; |
| 573 | 593 | } |
| @@ -603,11 +623,8 @@ static int afs_dont_wait_for_call_to_complete(struct afs_call *call) · 29 unmodified lines | ||
| 603 | 623 | /* |
| 604 | 624 | * delete an asynchronous call |
| 605 | 625 | */ |
| 606 | −static void afs_delete_async_call(struct work_struct *work) | |
| 626 | +static void afs_delete_async_call(struct afs_call *call) | |
| 607 | 627 | { |
| 608 | − struct afs_call *call = | |
| 609 | − container_of(work, struct afs_call, async_work); | |
| 610 | − | |
| 611 | 628 | _enter(""); |
| 612 | 629 | |
| 613 | 630 | afs_free_call(call); |
| @@ -620,11 +637,8 @@ static void afs_delete_async_call(struct work_struct *work) · 6 unmodified lines | ||
| 620 | 637 | * - on a multiple-thread workqueue this work item may try to run on several |
| 621 | 638 | * CPUs at the same time |
| 622 | 639 | */ |
| 623 | −static void afs_process_async_call(struct work_struct *work) | |
| 640 | +static void afs_process_async_call(struct afs_call *call) | |
| 624 | 641 | { |
| 625 | − struct afs_call *call = | |
| 626 | − container_of(work, struct afs_call, async_work); | |
| 627 | − | |
| 628 | 642 | _enter(""); |
| 629 | 643 | |
| 630 | 644 | if (!skb_queue_empty(&call->rx_queue)) |
| @@ -637,10 +651,7 @@ static void afs_process_async_call(struct work_struct *work) · 6 unmodified lines | ||
| 637 | 651 | call->reply = NULL; |
| 638 | 652 | |
| 639 | 653 | /* kill the call */ |
| 640 | − rxrpc_kernel_end_call(call->rxcall); | |
| 641 | − call->rxcall = NULL; | |
| 642 | − if (call->type->destructor) | |
| 643 | − call->type->destructor(call); | |
| 654 | + afs_end_call_nofree(call); | |
| 644 | 655 | |
| 645 | 656 | /* we can't just delete the call because the work item may be |
| 646 | 657 | * queued */ |
| @@ -663,13 +674,6 @@ void afs_transfer_reply(struct afs_call *call, struct sk_buff *skb) · 16 unmodified lines | ||
| 663 | 674 | call->reply_size += len; |
| 664 | 675 | } |
| 665 | 676 | |
| 666 | −static void afs_async_workfn(struct work_struct *work) | |
| 667 | −{ | |
| 668 | − struct afs_call *call = container_of(work, struct afs_call, async_work); | |
| 669 | − | |
| 670 | − call->async_workfn(work); | |
| 671 | −} | |
| 672 | − | |
| 673 | 677 | /* |
| 674 | 678 | * accept the backlog of incoming calls |
| 675 | 679 | */ |
| @@ -790,10 +794,7 @@ void afs_send_empty_reply(struct afs_call *call) · 114 unmodified lines | ||
| 790 | 794 | _debug("oom"); |
| 791 | 795 | rxrpc_kernel_abort_call(call->rxcall, RX_USER_ABORT); |
| 792 | 796 | default: |
| 793 | − rxrpc_kernel_end_call(call->rxcall); | |
| 794 | − call->rxcall = NULL; | |
| 795 | − call->type->destructor(call); | |
| 796 | − afs_free_call(call); | |
| 797 | + afs_end_call(call); | |
| 797 | 798 | _leave(" [error]"); |
| 798 | 799 | return; |
| 799 | 800 | } |
| @@ -823,17 +824,16 @@ void afs_send_simple_reply(struct afs_call *call, const void *buf, size_t len) · 23 unmodified lines | ||
| 823 | 824 | call->state = AFS_CALL_AWAIT_ACK; |
| 824 | 825 | n = rxrpc_kernel_send_data(call->rxcall, &msg, len); |
| 825 | 826 | if (n >= 0) { |
| 827 | + /* Success */ | |
| 826 | 828 | _leave(" [replied]"); |
| 827 | 829 | return; |
| 828 | 830 | } |
| 831 | + | |
| 829 | 832 | if (n == -ENOMEM) { |
| 830 | 833 | _debug("oom"); |
| 831 | 834 | rxrpc_kernel_abort_call(call->rxcall, RX_USER_ABORT); |
| 832 | 835 | } |
| 833 | − rxrpc_kernel_end_call(call->rxcall); | |
| 834 | − call->rxcall = NULL; | |
| 835 | − call->type->destructor(call); | |
| 836 | − afs_free_call(call); | |
| 836 | + afs_end_call(call); | |
| 837 | 837 | _leave(" [error]"); |
| 838 | 838 | } |
| 839 | 839 | |
| @@ -3120,6 +3120,8 @@ process_slot: · 3119 unmodified lines | ||
| 3120 | 3120 | } else if (type == BTRFS_FILE_EXTENT_INLINE) { |
| 3121 | 3121 | u64 skip = 0; |
| 3122 | 3122 | u64 trim = 0; |
| 3123 | + u64 aligned_end = 0; | |
| 3124 | + | |
| 3123 | 3125 | if (off > key.offset) { |
| 3124 | 3126 | skip = off - key.offset; |
| 3125 | 3127 | new_key.offset += skip; |
| @@ -3136,9 +3138,11 @@ process_slot: · 10 unmodified lines | ||
| 3136 | 3138 | size -= skip + trim; |
| 3137 | 3139 | datal -= skip + trim; |
| 3138 | 3140 | |
| 3141 | + aligned_end = ALIGN(new_key.offset + datal, | |
| 3142 | + root->sectorsize); | |
| 3139 | 3143 | ret = btrfs_drop_extents(trans, root, inode, |
| 3140 | 3144 | new_key.offset, |
| 3141 | − new_key.offset + datal, | |
| 3145 | + aligned_end, | |
| 3142 | 3146 | 1); |
| 3143 | 3147 | if (ret) { |
| 3144 | 3148 | if (ret != -EOPNOTSUPP) |
| @@ -1668,7 +1668,7 @@ static int get_first_ref(struct btrfs_root *root, u64 ino, · 1667 unmodified lines | ||
| 1668 | 1668 | goto out; |
| 1669 | 1669 | } |
| 1670 | 1670 | |
| 1671 | − if (key.type == BTRFS_INODE_REF_KEY) { | |
| 1671 | + if (found_key.type == BTRFS_INODE_REF_KEY) { | |
| 1672 | 1672 | struct btrfs_inode_ref *iref; |
| 1673 | 1673 | iref = btrfs_item_ptr(path->nodes[0], path->slots[0], |
| 1674 | 1674 | struct btrfs_inode_ref); |
| @@ -1737,6 +1737,9 @@ cifs_inode_needs_reval(struct inode *inode) · 1736 unmodified lines | ||
| 1737 | 1737 | if (cifs_i->time == 0) |
| 1738 | 1738 | return true; |
| 1739 | 1739 | |
| 1740 | + if (!cifs_sb->actimeo) | |
| 1741 | + return true; | |
| 1742 | + | |
| 1740 | 1743 | if (!time_in_range(jiffies, cifs_i->time, |
| 1741 | 1744 | cifs_i->time + cifs_sb->actimeo)) |
| 1742 | 1745 | return true; |
| @@ -441,42 +441,12 @@ void d_drop(struct dentry *dentry) · 440 unmodified lines | ||
| 441 | 441 | } |
| 442 | 442 | EXPORT_SYMBOL(d_drop); |
| 443 | 443 | |
| 444 | −/* | |
| 445 | − * Finish off a dentry we've decided to kill. | |
| 446 | − * dentry->d_lock must be held, returns with it unlocked. | |
| 447 | − * If ref is non-zero, then decrement the refcount too. | |
| 448 | − * Returns dentry requiring refcount drop, or NULL if we're done. | |
| 449 | − */ | |
| 450 | −static struct dentry * | |
| 451 | −dentry_kill(struct dentry *dentry, int unlock_on_failure) | |
| 452 | − __releases(dentry->d_lock) | |
| 444 | +static void __dentry_kill(struct dentry *dentry) | |
| 453 | 445 | { |
| 454 | − struct inode *inode; | |
| 455 | 446 | struct dentry *parent = NULL; |
| 456 | 447 | bool can_free = true; |
| 457 | − | |
| 458 | − if (unlikely(dentry->d_flags & DCACHE_DENTRY_KILLED)) { | |
| 459 | − can_free = dentry->d_flags & DCACHE_MAY_FREE; | |
| 460 | − spin_unlock(&dentry->d_lock); | |
| 461 | − goto out; | |
| 462 | − } | |
| 463 | − | |
| 464 | − inode = dentry->d_inode; | |
| 465 | − if (inode && !spin_trylock(&inode->i_lock)) { | |
| 466 | −relock: | |
| 467 | − if (unlock_on_failure) { | |
| 468 | − spin_unlock(&dentry->d_lock); | |
| 469 | − cpu_relax(); | |
| 470 | − } | |
| 471 | − return dentry; /* try again with same dentry */ | |
| 472 | − } | |
| 473 | 448 | if (!IS_ROOT(dentry)) |
| 474 | 449 | parent = dentry->d_parent; |
| 475 | − if (parent && !spin_trylock(&parent->d_lock)) { | |
| 476 | − if (inode) | |
| 477 | − spin_unlock(&inode->i_lock); | |
| 478 | − goto relock; | |
| 479 | − } | |
| 480 | 450 | |
| 481 | 451 | /* |
| 482 | 452 | * The dentry is now unrecoverably dead to the world. |
| @@ -520,9 +490,72 @@ relock: · 37 unmodified lines | ||
| 520 | 490 | can_free = false; |
| 521 | 491 | } |
| 522 | 492 | spin_unlock(&dentry->d_lock); |
| 523 | −out: | |
| 524 | 493 | if (likely(can_free)) |
| 525 | 494 | dentry_free(dentry); |
| 495 | +} | |
| 496 | + | |
| 497 | +/* | |
| 498 | + * Finish off a dentry we've decided to kill. | |
| 499 | + * dentry->d_lock must be held, returns with it unlocked. | |
| 500 | + * If ref is non-zero, then decrement the refcount too. | |
| 501 | + * Returns dentry requiring refcount drop, or NULL if we're done. | |
| 502 | + */ | |
| 503 | +static struct dentry *dentry_kill(struct dentry *dentry) | |
| 504 | + __releases(dentry->d_lock) | |
| 505 | +{ | |
| 506 | + struct inode *inode = dentry->d_inode; | |
| 507 | + struct dentry *parent = NULL; | |
| 508 | + | |
| 509 | + if (inode && unlikely(!spin_trylock(&inode->i_lock))) | |
| 510 | + goto failed; | |
| 511 | + | |
| 512 | + if (!IS_ROOT(dentry)) { | |
| 513 | + parent = dentry->d_parent; | |
| 514 | + if (unlikely(!spin_trylock(&parent->d_lock))) { | |
| 515 | + if (inode) | |
| 516 | + spin_unlock(&inode->i_lock); | |
| 517 | + goto failed; | |
| 518 | + } | |
| 519 | + } | |
| 520 | + | |
| 521 | + __dentry_kill(dentry); | |
| 522 | + return parent; | |
| 523 | + | |
| 524 | +failed: | |
| 525 | + spin_unlock(&dentry->d_lock); | |
| 526 | + cpu_relax(); | |
| 527 | + return dentry; /* try again with same dentry */ | |
| 528 | +} | |
| 529 | + | |
| 530 | +static inline struct dentry *lock_parent(struct dentry *dentry) | |
| 531 | +{ | |
| 532 | + struct dentry *parent = dentry->d_parent; | |
| 533 | + if (IS_ROOT(dentry)) | |
| 534 | + return NULL; | |
| 535 | + if (likely(spin_trylock(&parent->d_lock))) | |
| 536 | + return parent; | |
| 537 | + spin_unlock(&dentry->d_lock); | |
| 538 | + rcu_read_lock(); | |
| 539 | +again: | |
| 540 | + parent = ACCESS_ONCE(dentry->d_parent); | |
| 541 | + spin_lock(&parent->d_lock); | |
| 542 | + /* | |
| 543 | + * We can't blindly lock dentry until we are sure | |
| 544 | + * that we won't violate the locking order. | |
| 545 | + * Any changes of dentry->d_parent must have | |
| 546 | + * been done with parent->d_lock held, so | |
| 547 | + * spin_lock() above is enough of a barrier | |
| 548 | + * for checking if it's still our child. | |
| 549 | + */ | |
| 550 | + if (unlikely(parent != dentry->d_parent)) { | |
| 551 | + spin_unlock(&parent->d_lock); | |
| 552 | + goto again; | |
| 553 | + } | |
| 554 | + rcu_read_unlock(); | |
| 555 | + if (parent != dentry) | |
| 556 | + spin_lock_nested(&dentry->d_lock, DENTRY_D_LOCK_NESTED); | |
| 557 | + else | |
| 558 | + parent = NULL; | |
| 526 | 559 | return parent; |
| 527 | 560 | } |
| 528 | 561 | |
| @@ -579,7 +612,7 @@ repeat: · 50 unmodified lines | ||
| 579 | 612 | return; |
| 580 | 613 | |
| 581 | 614 | kill_it: |
| 582 | − dentry = dentry_kill(dentry, 1); | |
| 615 | + dentry = dentry_kill(dentry); | |
| 583 | 616 | if (dentry) |
| 584 | 617 | goto repeat; |
| 585 | 618 | } |
| @@ -797,8 +830,11 @@ static void shrink_dentry_list(struct list_head *list) · 211 unmodified lines | ||
| 797 | 830 | struct dentry *dentry, *parent; |
| 798 | 831 | |
| 799 | 832 | while (!list_empty(list)) { |
| 833 | + struct inode *inode; | |
| 800 | 834 | dentry = list_entry(list->prev, struct dentry, d_lru); |
| 801 | 835 | spin_lock(&dentry->d_lock); |
| 836 | + parent = lock_parent(dentry); | |
| 837 | + | |
| 802 | 838 | /* |
| 803 | 839 | * The dispose list is isolated and dentries are not accounted |
| 804 | 840 | * to the LRU here, so we can simply remove it from the list |
| @@ -812,26 +848,33 @@ static void shrink_dentry_list(struct list_head *list) · 7 unmodified lines | ||
| 812 | 848 | */ |
| 813 | 849 | if ((int)dentry->d_lockref.count > 0) { |
| 814 | 850 | spin_unlock(&dentry->d_lock); |
| 851 | + if (parent) | |
| 852 | + spin_unlock(&parent->d_lock); | |
| 815 | 853 | continue; |
| 816 | 854 | } |
| 817 | 855 | |
| 818 | − parent = dentry_kill(dentry, 0); | |
| 819 | − /* | |
| 820 | − * If dentry_kill returns NULL, we have nothing more to do. | |
| 821 | − */ | |
| 822 | − if (!parent) | |
| 856 | + | |
| 857 | + if (unlikely(dentry->d_flags & DCACHE_DENTRY_KILLED)) { | |
| 858 | + bool can_free = dentry->d_flags & DCACHE_MAY_FREE; | |
| 859 | + spin_unlock(&dentry->d_lock); | |
| 860 | + if (parent) | |
| 861 | + spin_unlock(&parent->d_lock); | |
| 862 | + if (can_free) | |
| 863 | + dentry_free(dentry); | |
| 823 | 864 | continue; |
| 865 | + } | |
| 824 | 866 | |
| 825 | − if (unlikely(parent == dentry)) { | |
| 826 | − /* | |
| 827 | − * trylocks have failed and d_lock has been held the | |
| 828 | − * whole time, so it could not have been added to any | |
| 829 | − * other lists. Just add it back to the shrink list. | |
| 830 | − */ | |
| 867 | + inode = dentry->d_inode; | |
| 868 | + if (inode && unlikely(!spin_trylock(&inode->i_lock))) { | |
| 831 | 869 | d_shrink_add(dentry, list); |
| 832 | 870 | spin_unlock(&dentry->d_lock); |
| 871 | + if (parent) | |
| 872 | + spin_unlock(&parent->d_lock); | |
| 833 | 873 | continue; |
| 834 | 874 | } |
| 875 | + | |
| 876 | + __dentry_kill(dentry); | |
| 877 | + | |
| 835 | 878 | /* |
| 836 | 879 | * We need to prune ancestors too. This is necessary to prevent |
| 837 | 880 | * quadratic behavior of shrink_dcache_parent(), but is also |
| @@ -839,8 +882,26 @@ static void shrink_dentry_list(struct list_head *list) · 1 unmodified line | ||
| 839 | 882 | * fragmentation. |
| 840 | 883 | */ |
| 841 | 884 | dentry = parent; |
| 842 | − while (dentry && !lockref_put_or_lock(&dentry->d_lockref)) | |
| 843 | − dentry = dentry_kill(dentry, 1); | |
| 885 | + while (dentry && !lockref_put_or_lock(&dentry->d_lockref)) { | |
| 886 | + parent = lock_parent(dentry); | |
| 887 | + if (dentry->d_lockref.count != 1) { | |
| 888 | + dentry->d_lockref.count--; | |
| 889 | + spin_unlock(&dentry->d_lock); | |
| 890 | + if (parent) | |
| 891 | + spin_unlock(&parent->d_lock); | |
| 892 | + break; | |
| 893 | + } | |
| 894 | + inode = dentry->d_inode; /* can't be NULL */ | |
| 895 | + if (unlikely(!spin_trylock(&inode->i_lock))) { | |
| 896 | + spin_unlock(&dentry->d_lock); | |
| 897 | + if (parent) | |
| 898 | + spin_unlock(&parent->d_lock); | |
| 899 | + cpu_relax(); | |
| 900 | + continue; | |
| 901 | + } | |
| 902 | + __dentry_kill(dentry); | |
| 903 | + dentry = parent; | |
| 904 | + } | |
| 844 | 905 | } |
| 845 | 906 | } |
| 846 | 907 | |
| @@ -657,10 +657,10 @@ int setup_arg_pages(struct linux_binprm *bprm, · 656 unmodified lines | ||
| 657 | 657 | unsigned long rlim_stack; |
| 658 | 658 | |
| 659 | 659 | #ifdef CONFIG_STACK_GROWSUP |
| 660 | − /* Limit stack size to 1GB */ | |
| 660 | + /* Limit stack size */ | |
| 661 | 661 | stack_base = rlimit_max(RLIMIT_STACK); |
| 662 | − if (stack_base > (1 << 30)) | |
| 663 | − stack_base = 1 << 30; | |
| 662 | + if (stack_base > STACK_SIZE_MAX) | |
| 663 | + stack_base = STACK_SIZE_MAX; | |
| 664 | 664 | |
| 665 | 665 | /* Make sure we didn't let the argument array grow too large. */ |
| 666 | 666 | if (vma->vm_end - vma->vm_start > stack_base) |
| @@ -1110,6 +1110,7 @@ void setup_new_exec(struct linux_binprm * bprm) · 443 unmodified lines | ||
| 1110 | 1110 | else |
| 1111 | 1111 | set_dumpable(current->mm, suid_dumpable); |
| 1112 | 1112 | |
| 1113 | + perf_event_exec(); | |
| 1113 | 1114 | set_task_comm(current, kbasename(bprm->filename)); |
| 1114 | 1115 | |
| 1115 | 1116 | /* Set the new mm task size. We have to do that late because it may |
| @@ -610,6 +610,7 @@ static void kernfs_put_open_node(struct kernfs_node *kn, · 609 unmodified lines | ||
| 610 | 610 | static int kernfs_fop_open(struct inode *inode, struct file *file) |
| 611 | 611 | { |
| 612 | 612 | struct kernfs_node *kn = file->f_path.dentry->d_fsdata; |
| 613 | + struct kernfs_root *root = kernfs_root(kn); | |
| 613 | 614 | const struct kernfs_ops *ops; |
| 614 | 615 | struct kernfs_open_file *of; |
| 615 | 616 | bool has_read, has_write, has_mmap; |
| @@ -624,14 +625,16 @@ static int kernfs_fop_open(struct inode *inode, struct file *file) · 8 unmodified lines | ||
| 624 | 625 | has_write = ops->write || ops->mmap; |
| 625 | 626 | has_mmap = ops->mmap; |
| 626 | 627 | |
| 627 | − /* check perms and supported operations */ | |
| 628 | − if ((file->f_mode & FMODE_WRITE) && | |
| 629 | − (!(inode->i_mode & S_IWUGO) || !has_write)) | |
| 630 | − goto err_out; | |
| 628 | + /* see the flag definition for details */ | |
| 629 | + if (root->flags & KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK) { | |
| 630 | + if ((file->f_mode & FMODE_WRITE) && | |
| 631 | + (!(inode->i_mode & S_IWUGO) || !has_write)) | |
| 632 | + goto err_out; | |
| 631 | 633 | |
| 632 | − if ((file->f_mode & FMODE_READ) && | |
| 633 | − (!(inode->i_mode & S_IRUGO) || !has_read)) | |
| 634 | − goto err_out; | |
| 634 | + if ((file->f_mode & FMODE_READ) && | |
| 635 | + (!(inode->i_mode & S_IRUGO) || !has_read)) | |
| 636 | + goto err_out; | |
| 637 | + } | |
| 635 | 638 | |
| 636 | 639 | /* allocate a kernfs_open_file for the file */ |
| 637 | 640 | error = -ENOMEM; |
| @@ -389,18 +389,6 @@ static int flock64_to_posix_lock(struct file *filp, struct file_lock *fl, · 388 unmodified lines | ||
| 389 | 389 | fl->fl_ops = NULL; |
| 390 | 390 | fl->fl_lmops = NULL; |
| 391 | 391 | |
| 392 | − /* Ensure that fl->fl_filp has compatible f_mode */ | |
| 393 | − switch (l->l_type) { | |
| 394 | − case F_RDLCK: | |
| 395 | − if (!(filp->f_mode & FMODE_READ)) | |
| 396 | − return -EBADF; | |
| 397 | − break; | |
| 398 | − case F_WRLCK: | |
| 399 | − if (!(filp->f_mode & FMODE_WRITE)) | |
| 400 | − return -EBADF; | |
| 401 | − break; | |
| 402 | − } | |
| 403 | − | |
| 404 | 392 | return assign_type(fl, l->l_type); |
| 405 | 393 | } |
| 406 | 394 | |
| @@ -2034,6 +2022,22 @@ static int do_lock_file_wait(struct file *filp, unsigned int cmd, · 1627 unmodified lines | ||
| 2034 | 2022 | return error; |
| 2035 | 2023 | } |
| 2036 | 2024 | |
| 2025 | +/* Ensure that fl->fl_filp has compatible f_mode for F_SETLK calls */ | |
| 2026 | +static int | |
| 2027 | +check_fmode_for_setlk(struct file_lock *fl) | |
| 2028 | +{ | |
| 2029 | + switch (fl->fl_type) { | |
| 2030 | + case F_RDLCK: | |
| 2031 | + if (!(fl->fl_file->f_mode & FMODE_READ)) | |
| 2032 | + return -EBADF; | |
| 2033 | + break; | |
| 2034 | + case F_WRLCK: | |
| 2035 | + if (!(fl->fl_file->f_mode & FMODE_WRITE)) | |
| 2036 | + return -EBADF; | |
| 2037 | + } | |
| 2038 | + return 0; | |
| 2039 | +} | |
| 2040 | + | |
| 2037 | 2041 | /* Apply the lock described by l to an open file descriptor. |
| 2038 | 2042 | * This implements both the F_SETLK and F_SETLKW commands of fcntl(). |
| 2039 | 2043 | */ |
| @@ -2071,6 +2075,10 @@ again: · 31 unmodified lines | ||
| 2071 | 2075 | if (error) |
| 2072 | 2076 | goto out; |
| 2073 | 2077 | |
| 2078 | + error = check_fmode_for_setlk(file_lock); | |
| 2079 | + if (error) | |
| 2080 | + goto out; | |
| 2081 | + | |
| 2074 | 2082 | /* |
| 2075 | 2083 | * If the cmd is requesting file-private locks, then set the |
| 2076 | 2084 | * FL_OFDLCK flag and override the owner. |
| @@ -2206,6 +2214,10 @@ again: · 129 unmodified lines | ||
| 2206 | 2214 | if (error) |
| 2207 | 2215 | goto out; |
| 2208 | 2216 | |
| 2217 | + error = check_fmode_for_setlk(file_lock); | |
| 2218 | + if (error) | |
| 2219 | + goto out; | |
| 2220 | + | |
| 2209 | 2221 | /* |
| 2210 | 2222 | * If the cmd is requesting file-private locks, then set the |
| 2211 | 2223 | * FL_OFDLCK flag and override the owner. |
| @@ -402,8 +402,10 @@ sort_pacl(struct posix_acl *pacl) · 401 unmodified lines | ||
| 402 | 402 | * by uid/gid. */ |
| 403 | 403 | int i, j; |
| 404 | 404 | |
| 405 | − if (pacl->a_count <= 4) | |
| 406 | − return; /* no users or groups */ | |
| 405 | + /* no users or groups */ | |
| 406 | + if (!pacl || pacl->a_count <= 4) | |
| 407 | + return; | |
| 408 | + | |
| 407 | 409 | i = 1; |
| 408 | 410 | while (pacl->a_entries[i].e_tag == ACL_USER) |
| 409 | 411 | i++; |
| @@ -530,13 +532,12 @@ posix_state_to_acl(struct posix_acl_state *state, unsigned int flags) · 120 unmodified lines | ||
| 530 | 532 | |
| 531 | 533 | /* |
| 532 | 534 | * ACLs with no ACEs are treated differently in the inheritable |
| 533 | − * and effective cases: when there are no inheritable ACEs, we | |
| 534 | − * set a zero-length default posix acl: | |
| 535 | + * and effective cases: when there are no inheritable ACEs, | |
| 536 | + * calls ->set_acl with a NULL ACL structure. | |
| 535 | 537 | */ |
| 536 | − if (state->empty && (flags & NFS4_ACL_TYPE_DEFAULT)) { | |
| 537 | − pacl = posix_acl_alloc(0, GFP_KERNEL); | |
| 538 | − return pacl ? pacl : ERR_PTR(-ENOMEM); | |
| 539 | − } | |
| 538 | + if (state->empty && (flags & NFS4_ACL_TYPE_DEFAULT)) | |
| 539 | + return NULL; | |
| 540 | + | |
| 540 | 541 | /* |
| 541 | 542 | * When there are no effective ACEs, the following will end |
| 542 | 543 | * up setting a 3-element effective posix ACL with all |
| @@ -589,7 +590,7 @@ posix_state_to_acl(struct posix_acl_state *state, unsigned int flags) · 46 unmodified lines | ||
| 589 | 590 | add_to_mask(state, &state->groups->aces[i].perms); |
| 590 | 591 | } |
| 591 | 592 | |
| 592 | − if (!state->users->n && !state->groups->n) { | |
| 593 | + if (state->users->n || state->groups->n) { | |
| 593 | 594 | pace++; |
| 594 | 595 | pace->e_tag = ACL_MASK; |
| 595 | 596 | low_mode_from_nfs4(state->mask.allow, &pace->e_perm, flags); |
| @@ -1078,6 +1078,18 @@ static struct nfs4_client *alloc_client(struct xdr_netobj name) · 1077 unmodified lines | ||
| 1078 | 1078 | return NULL; |
| 1079 | 1079 | } |
| 1080 | 1080 | clp->cl_name.len = name.len; |
| 1081 | + INIT_LIST_HEAD(&clp->cl_sessions); | |
| 1082 | + idr_init(&clp->cl_stateids); | |
| 1083 | + atomic_set(&clp->cl_refcount, 0); | |
| 1084 | + clp->cl_cb_state = NFSD4_CB_UNKNOWN; | |
| 1085 | + INIT_LIST_HEAD(&clp->cl_idhash); | |
| 1086 | + INIT_LIST_HEAD(&clp->cl_openowners); | |
| 1087 | + INIT_LIST_HEAD(&clp->cl_delegations); | |
| 1088 | + INIT_LIST_HEAD(&clp->cl_lru); | |
| 1089 | + INIT_LIST_HEAD(&clp->cl_callbacks); | |
| 1090 | + INIT_LIST_HEAD(&clp->cl_revoked); | |
| 1091 | + spin_lock_init(&clp->cl_lock); | |
| 1092 | + rpc_init_wait_queue(&clp->cl_cb_waitq, "Backchannel slot table"); | |
| 1081 | 1093 | return clp; |
| 1082 | 1094 | } |
| 1083 | 1095 | |
| @@ -1095,6 +1107,7 @@ free_client(struct nfs4_client *clp) · 11 unmodified lines | ||
| 1095 | 1107 | WARN_ON_ONCE(atomic_read(&ses->se_ref)); |
| 1096 | 1108 | free_session(ses); |
| 1097 | 1109 | } |
| 1110 | + rpc_destroy_wait_queue(&clp->cl_cb_waitq); | |
| 1098 | 1111 | free_svc_cred(&clp->cl_cred); |
| 1099 | 1112 | kfree(clp->cl_name.data); |
| 1100 | 1113 | idr_destroy(&clp->cl_stateids); |
| @@ -1347,7 +1360,6 @@ static struct nfs4_client *create_client(struct xdr_netobj name, · 246 unmodified lines | ||
| 1347 | 1360 | if (clp == NULL) |
| 1348 | 1361 | return NULL; |
| 1349 | 1362 | |
| 1350 | − INIT_LIST_HEAD(&clp->cl_sessions); | |
| 1351 | 1363 | ret = copy_cred(&clp->cl_cred, &rqstp->rq_cred); |
| 1352 | 1364 | if (ret) { |
| 1353 | 1365 | spin_lock(&nn->client_lock); |
| @@ -1355,20 +1367,9 @@ static struct nfs4_client *create_client(struct xdr_netobj name, · 1 unmodified line | ||
| 1355 | 1367 | spin_unlock(&nn->client_lock); |
| 1356 | 1368 | return NULL; |
| 1357 | 1369 | } |
| 1358 | − idr_init(&clp->cl_stateids); | |
| 1359 | − atomic_set(&clp->cl_refcount, 0); | |
| 1360 | − clp->cl_cb_state = NFSD4_CB_UNKNOWN; | |
| 1361 | − INIT_LIST_HEAD(&clp->cl_idhash); | |
| 1362 | − INIT_LIST_HEAD(&clp->cl_openowners); | |
| 1363 | − INIT_LIST_HEAD(&clp->cl_delegations); | |
| 1364 | − INIT_LIST_HEAD(&clp->cl_lru); | |
| 1365 | − INIT_LIST_HEAD(&clp->cl_callbacks); | |
| 1366 | − INIT_LIST_HEAD(&clp->cl_revoked); | |
| 1367 | − spin_lock_init(&clp->cl_lock); | |
| 1368 | 1370 | nfsd4_init_callback(&clp->cl_cb_null); |
| 1369 | 1371 | clp->cl_time = get_seconds(); |
| 1370 | 1372 | clear_bit(0, &clp->cl_cb_slot_busy); |
| 1371 | − rpc_init_wait_queue(&clp->cl_cb_waitq, "Backchannel slot table"); | |
| 1372 | 1373 | copy_verf(clp, verf); |
| 1373 | 1374 | rpc_copy_addr((struct sockaddr *) &clp->cl_addr, sa); |
| 1374 | 1375 | gen_confirm(clp); |
| @@ -3716,9 +3717,16 @@ out: · 2341 unmodified lines | ||
| 3716 | 3717 | static __be32 |
| 3717 | 3718 | nfsd4_free_lock_stateid(struct nfs4_ol_stateid *stp) |
| 3718 | 3719 | { |
| 3719 | − if (check_for_locks(stp->st_file, lockowner(stp->st_stateowner))) | |
| 3720 | + struct nfs4_lockowner *lo = lockowner(stp->st_stateowner); | |
| 3721 | + | |
| 3722 | + if (check_for_locks(stp->st_file, lo)) | |
| 3720 | 3723 | return nfserr_locks_held; |
| 3721 | − release_lock_stateid(stp); | |
| 3724 | + /* | |
| 3725 | + * Currently there's a 1-1 lock stateid<->lockowner | |
| 3726 | + * correspondance, and we have to delete the lockowner when we | |
| 3727 | + * delete the lock stateid: | |
| 3728 | + */ | |
| 3729 | + unhash_lockowner(lo); | |
| 3722 | 3730 | return nfs_ok; |
| 3723 | 3731 | } |
| 3724 | 3732 | |
| @@ -4158,6 +4166,10 @@ static bool same_lockowner_ino(struct nfs4_lockowner *lo, struct inode *inode, c · 433 unmodified lines | ||
| 4158 | 4166 | |
| 4159 | 4167 | if (!same_owner_str(&lo->lo_owner, owner, clid)) |
| 4160 | 4168 | return false; |
| 4169 | + if (list_empty(&lo->lo_owner.so_stateids)) { | |
| 4170 | + WARN_ON_ONCE(1); | |
| 4171 | + return false; | |
| 4172 | + } | |
| 4161 | 4173 | lst = list_first_entry(&lo->lo_owner.so_stateids, |
| 4162 | 4174 | struct nfs4_ol_stateid, st_perstateowner); |
| 4163 | 4175 | return lst->st_file->fi_inode == inode; |
| @@ -472,11 +472,15 @@ bail: · 471 unmodified lines | ||
| 472 | 472 | |
| 473 | 473 | void dlm_destroy_master_caches(void) |
| 474 | 474 | { |
| 475 | − if (dlm_lockname_cache) | |
| 475 | + if (dlm_lockname_cache) { | |
| 476 | 476 | kmem_cache_destroy(dlm_lockname_cache); |
| 477 | + dlm_lockname_cache = NULL; | |
| 478 | + } | |
| 477 | 479 | |
| 478 | − if (dlm_lockres_cache) | |
| 480 | + if (dlm_lockres_cache) { | |
| 479 | 481 | kmem_cache_destroy(dlm_lockres_cache); |
| 482 | + dlm_lockres_cache = NULL; | |
| 483 | + } | |
| 480 | 484 | } |
| 481 | 485 | |
| 482 | 486 | static void dlm_lockres_release(struct kref *kref) |
| @@ -1537,7 +1537,7 @@ static long vmsplice_to_user(struct file *file, const struct iovec __user *uiov, · 1536 unmodified lines | ||
| 1537 | 1537 | struct iovec iovstack[UIO_FASTIOV]; |
| 1538 | 1538 | struct iovec *iov = iovstack; |
| 1539 | 1539 | struct iov_iter iter; |
| 1540 | − ssize_t count = 0; | |
| 1540 | + ssize_t count; | |
| 1541 | 1541 | |
| 1542 | 1542 | pipe = get_pipe_info(file); |
| 1543 | 1543 | if (!pipe) |
| @@ -1546,8 +1546,9 @@ static long vmsplice_to_user(struct file *file, const struct iovec __user *uiov, · 2 unmodified lines | ||
| 1546 | 1546 | ret = rw_copy_check_uvector(READ, uiov, nr_segs, |
| 1547 | 1547 | ARRAY_SIZE(iovstack), iovstack, &iov); |
| 1548 | 1548 | if (ret <= 0) |
| 1549 | − return ret; | |
| 1549 | + goto out; | |
| 1550 | 1550 | |
| 1551 | + count = ret; | |
| 1551 | 1552 | iov_iter_init(&iter, iov, nr_segs, count, 0); |
| 1552 | 1553 | |
| 1553 | 1554 | sd.len = 0; |
| @@ -1560,6 +1561,7 @@ static long vmsplice_to_user(struct file *file, const struct iovec __user *uiov, · 6 unmodified lines | ||
| 1560 | 1561 | ret = __splice_from_pipe(pipe, &sd, pipe_to_user); |
| 1561 | 1562 | pipe_unlock(pipe); |
| 1562 | 1563 | |
| 1564 | +out: | |
| 1563 | 1565 | if (iov != iovstack) |
| 1564 | 1566 | kfree(iov); |
| 1565 | 1567 | |
| @@ -47,12 +47,13 @@ static int sysfs_kf_seq_show(struct seq_file *sf, void *v) · 46 unmodified lines | ||
| 47 | 47 | ssize_t count; |
| 48 | 48 | char *buf; |
| 49 | 49 | |
| 50 | − /* acquire buffer and ensure that it's >= PAGE_SIZE */ | |
| 50 | + /* acquire buffer and ensure that it's >= PAGE_SIZE and clear */ | |
| 51 | 51 | count = seq_get_buf(sf, &buf); |
| 52 | 52 | if (count < PAGE_SIZE) { |
| 53 | 53 | seq_commit(sf, -1); |
| 54 | 54 | return 0; |
| 55 | 55 | } |
| 56 | + memset(buf, 0, PAGE_SIZE); | |
| 56 | 57 | |
| 57 | 58 | /* |
| 58 | 59 | * Invoke show(). Control may reach here via seq file lseek even |
| @@ -63,7 +63,8 @@ int __init sysfs_init(void) · 62 unmodified lines | ||
| 63 | 63 | { |
| 64 | 64 | int err; |
| 65 | 65 | |
| 66 | − sysfs_root = kernfs_create_root(NULL, 0, NULL); | |
| 66 | + sysfs_root = kernfs_create_root(NULL, KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK, | |
| 67 | + NULL); | |
| 67 | 68 | if (IS_ERR(sysfs_root)) |
| 68 | 69 | return PTR_ERR(sysfs_root); |
| 69 | 70 | |
| @@ -213,7 +213,7 @@ xfs_attr_calc_size( · 212 unmodified lines | ||
| 213 | 213 | * Out of line attribute, cannot double split, but |
| 214 | 214 | * make room for the attribute value itself. |
| 215 | 215 | */ |
| 216 | − uint dblocks = XFS_B_TO_FSB(mp, valuelen); | |
| 216 | + uint dblocks = xfs_attr3_rmt_blocks(mp, valuelen); | |
| 217 | 217 | nblks += dblocks; |
| 218 | 218 | nblks += XFS_NEXTENTADD_SPACE_RES(mp, dblocks, XFS_ATTR_FORK); |
| 219 | 219 | } |
| @@ -698,11 +698,22 @@ xfs_attr_leaf_addname(xfs_da_args_t *args) · 478 unmodified lines | ||
| 698 | 698 | |
| 699 | 699 | trace_xfs_attr_leaf_replace(args); |
| 700 | 700 | |
| 701 | + /* save the attribute state for later removal*/ | |
| 701 | 702 | args->op_flags |= XFS_DA_OP_RENAME; /* an atomic rename */ |
| 702 | 703 | args->blkno2 = args->blkno; /* set 2nd entry info*/ |
| 703 | 704 | args->index2 = args->index; |
| 704 | 705 | args->rmtblkno2 = args->rmtblkno; |
| 705 | 706 | args->rmtblkcnt2 = args->rmtblkcnt; |
| 707 | + args->rmtvaluelen2 = args->rmtvaluelen; | |
| 708 | + | |
| 709 | + /* | |
| 710 | + * clear the remote attr state now that it is saved so that the | |
| 711 | + * values reflect the state of the attribute we are about to | |
| 712 | + * add, not the attribute we just found and will remove later. | |
| 713 | + */ | |
| 714 | + args->rmtblkno = 0; | |
| 715 | + args->rmtblkcnt = 0; | |
| 716 | + args->rmtvaluelen = 0; | |
| 706 | 717 | } |
| 707 | 718 | |
| 708 | 719 | /* |
| @@ -794,6 +805,7 @@ xfs_attr_leaf_addname(xfs_da_args_t *args) · 85 unmodified lines | ||
| 794 | 805 | args->blkno = args->blkno2; |
| 795 | 806 | args->rmtblkno = args->rmtblkno2; |
| 796 | 807 | args->rmtblkcnt = args->rmtblkcnt2; |
| 808 | + args->rmtvaluelen = args->rmtvaluelen2; | |
| 797 | 809 | if (args->rmtblkno) { |
| 798 | 810 | error = xfs_attr_rmtval_remove(args); |
| 799 | 811 | if (error) |
| @@ -999,13 +1011,22 @@ restart: · 199 unmodified lines | ||
| 999 | 1011 | |
| 1000 | 1012 | trace_xfs_attr_node_replace(args); |
| 1001 | 1013 | |
| 1014 | + /* save the attribute state for later removal*/ | |
| 1002 | 1015 | args->op_flags |= XFS_DA_OP_RENAME; /* atomic rename op */ |
| 1003 | 1016 | args->blkno2 = args->blkno; /* set 2nd entry info*/ |
| 1004 | 1017 | args->index2 = args->index; |
| 1005 | 1018 | args->rmtblkno2 = args->rmtblkno; |
| 1006 | 1019 | args->rmtblkcnt2 = args->rmtblkcnt; |
| 1020 | + args->rmtvaluelen2 = args->rmtvaluelen; | |
| 1021 | + | |
| 1022 | + /* | |
| 1023 | + * clear the remote attr state now that it is saved so that the | |
| 1024 | + * values reflect the state of the attribute we are about to | |
| 1025 | + * add, not the attribute we just found and will remove later. | |
| 1026 | + */ | |
| 1007 | 1027 | args->rmtblkno = 0; |
| 1008 | 1028 | args->rmtblkcnt = 0; |
| 1029 | + args->rmtvaluelen = 0; | |
| 1009 | 1030 | } |
| 1010 | 1031 | |
| 1011 | 1032 | retval = xfs_attr3_leaf_add(blk->bp, state->args); |
| @@ -1133,6 +1154,7 @@ restart: · 121 unmodified lines | ||
| 1133 | 1154 | args->blkno = args->blkno2; |
| 1134 | 1155 | args->rmtblkno = args->rmtblkno2; |
| 1135 | 1156 | args->rmtblkcnt = args->rmtblkcnt2; |
| 1157 | + args->rmtvaluelen = args->rmtvaluelen2; | |
| 1136 | 1158 | if (args->rmtblkno) { |
| 1137 | 1159 | error = xfs_attr_rmtval_remove(args); |
| 1138 | 1160 | if (error) |
| @@ -1229,6 +1229,7 @@ xfs_attr3_leaf_add_work( · 1228 unmodified lines | ||
| 1229 | 1229 | name_rmt->valueblk = 0; |
| 1230 | 1230 | args->rmtblkno = 1; |
| 1231 | 1231 | args->rmtblkcnt = xfs_attr3_rmt_blocks(mp, args->valuelen); |
| 1232 | + args->rmtvaluelen = args->valuelen; | |
| 1232 | 1233 | } |
| 1233 | 1234 | xfs_trans_log_buf(args->trans, bp, |
| 1234 | 1235 | XFS_DA_LOGRANGE(leaf, xfs_attr3_leaf_name(leaf, args->index), |
| @@ -2167,11 +2168,11 @@ xfs_attr3_leaf_lookup_int( · 932 unmodified lines | ||
| 2167 | 2168 | if (!xfs_attr_namesp_match(args->flags, entry->flags)) |
| 2168 | 2169 | continue; |
| 2169 | 2170 | args->index = probe; |
| 2170 | − args->valuelen = be32_to_cpu(name_rmt->valuelen); | |
| 2171 | + args->rmtvaluelen = be32_to_cpu(name_rmt->valuelen); | |
| 2171 | 2172 | args->rmtblkno = be32_to_cpu(name_rmt->valueblk); |
| 2172 | 2173 | args->rmtblkcnt = xfs_attr3_rmt_blocks( |
| 2173 | 2174 | args->dp->i_mount, |
| 2174 | − args->valuelen); | |
| 2175 | + args->rmtvaluelen); | |
| 2175 | 2176 | return XFS_ERROR(EEXIST); |
| 2176 | 2177 | } |
| 2177 | 2178 | } |
| @@ -2220,19 +2221,19 @@ xfs_attr3_leaf_getvalue( · 42 unmodified lines | ||
| 2220 | 2221 | name_rmt = xfs_attr3_leaf_name_remote(leaf, args->index); |
| 2221 | 2222 | ASSERT(name_rmt->namelen == args->namelen); |
| 2222 | 2223 | ASSERT(memcmp(args->name, name_rmt->name, args->namelen) == 0); |
| 2223 | − valuelen = be32_to_cpu(name_rmt->valuelen); | |
| 2224 | + args->rmtvaluelen = be32_to_cpu(name_rmt->valuelen); | |
| 2224 | 2225 | args->rmtblkno = be32_to_cpu(name_rmt->valueblk); |
| 2225 | 2226 | args->rmtblkcnt = xfs_attr3_rmt_blocks(args->dp->i_mount, |
| 2226 | − valuelen); | |
| 2227 | + args->rmtvaluelen); | |
| 2227 | 2228 | if (args->flags & ATTR_KERNOVAL) { |
| 2228 | − args->valuelen = valuelen; | |
| 2229 | + args->valuelen = args->rmtvaluelen; | |
| 2229 | 2230 | return 0; |
| 2230 | 2231 | } |
| 2231 | − if (args->valuelen < valuelen) { | |
| 2232 | − args->valuelen = valuelen; | |
| 2232 | + if (args->valuelen < args->rmtvaluelen) { | |
| 2233 | + args->valuelen = args->rmtvaluelen; | |
| 2233 | 2234 | return XFS_ERROR(ERANGE); |
| 2234 | 2235 | } |
| 2235 | − args->valuelen = valuelen; | |
| 2236 | + args->valuelen = args->rmtvaluelen; | |
| 2236 | 2237 | } |
| 2237 | 2238 | return 0; |
| 2238 | 2239 | } |
| @@ -2519,7 +2520,7 @@ xfs_attr3_leaf_clearflag( · 280 unmodified lines | ||
| 2519 | 2520 | ASSERT((entry->flags & XFS_ATTR_LOCAL) == 0); |
| 2520 | 2521 | name_rmt = xfs_attr3_leaf_name_remote(leaf, args->index); |
| 2521 | 2522 | name_rmt->valueblk = cpu_to_be32(args->rmtblkno); |
| 2522 | − name_rmt->valuelen = cpu_to_be32(args->valuelen); | |
| 2523 | + name_rmt->valuelen = cpu_to_be32(args->rmtvaluelen); | |
| 2523 | 2524 | xfs_trans_log_buf(args->trans, bp, |
| 2524 | 2525 | XFS_DA_LOGRANGE(leaf, name_rmt, sizeof(*name_rmt))); |
| 2525 | 2526 | } |
| @@ -2677,7 +2678,7 @@ xfs_attr3_leaf_flipflags( · 151 unmodified lines | ||
| 2677 | 2678 | ASSERT((entry1->flags & XFS_ATTR_LOCAL) == 0); |
| 2678 | 2679 | name_rmt = xfs_attr3_leaf_name_remote(leaf1, args->index); |
| 2679 | 2680 | name_rmt->valueblk = cpu_to_be32(args->rmtblkno); |
| 2680 | − name_rmt->valuelen = cpu_to_be32(args->valuelen); | |
| 2681 | + name_rmt->valuelen = cpu_to_be32(args->rmtvaluelen); | |
| 2681 | 2682 | xfs_trans_log_buf(args->trans, bp1, |
| 2682 | 2683 | XFS_DA_LOGRANGE(leaf1, name_rmt, sizeof(*name_rmt))); |
| 2683 | 2684 | } |
| @@ -447,6 +447,7 @@ xfs_attr3_leaf_list_int( · 446 unmodified lines | ||
| 447 | 447 | args.dp = context->dp; |
| 448 | 448 | args.whichfork = XFS_ATTR_FORK; |
| 449 | 449 | args.valuelen = valuelen; |
| 450 | + args.rmtvaluelen = valuelen; | |
| 450 | 451 | args.value = kmem_alloc(valuelen, KM_SLEEP | KM_NOFS); |
| 451 | 452 | args.rmtblkno = be32_to_cpu(name_rmt->valueblk); |
| 452 | 453 | args.rmtblkcnt = xfs_attr3_rmt_blocks( |
| @@ -337,7 +337,7 @@ xfs_attr_rmtval_get( · 336 unmodified lines | ||
| 337 | 337 | struct xfs_buf *bp; |
| 338 | 338 | xfs_dablk_t lblkno = args->rmtblkno; |
| 339 | 339 | __uint8_t *dst = args->value; |
| 340 | − int valuelen = args->valuelen; | |
| 340 | + int valuelen; | |
| 341 | 341 | int nmap; |
| 342 | 342 | int error; |
| 343 | 343 | int blkcnt = args->rmtblkcnt; |
| @@ -347,7 +347,9 @@ xfs_attr_rmtval_get( · 3 unmodified lines | ||
| 347 | 347 | trace_xfs_attr_rmtval_get(args); |
| 348 | 348 | |
| 349 | 349 | ASSERT(!(args->flags & ATTR_KERNOVAL)); |
| 350 | + ASSERT(args->rmtvaluelen == args->valuelen); | |
| 350 | 351 | |
| 352 | + valuelen = args->rmtvaluelen; | |
| 351 | 353 | while (valuelen > 0) { |
| 352 | 354 | nmap = ATTR_RMTVALUE_MAPSIZE; |
| 353 | 355 | error = xfs_bmapi_read(args->dp, (xfs_fileoff_t)lblkno, |
| @@ -415,7 +417,7 @@ xfs_attr_rmtval_set( · 61 unmodified lines | ||
| 415 | 417 | * attributes have headers, we can't just do a straight byte to FSB |
| 416 | 418 | * conversion and have to take the header space into account. |
| 417 | 419 | */ |
| 418 | − blkcnt = xfs_attr3_rmt_blocks(mp, args->valuelen); | |
| 420 | + blkcnt = xfs_attr3_rmt_blocks(mp, args->rmtvaluelen); | |
| 419 | 421 | error = xfs_bmap_first_unused(args->trans, args->dp, blkcnt, &lfileoff, |
| 420 | 422 | XFS_ATTR_FORK); |
| 421 | 423 | if (error) |
| @@ -480,7 +482,7 @@ xfs_attr_rmtval_set( · 58 unmodified lines | ||
| 480 | 482 | */ |
| 481 | 483 | lblkno = args->rmtblkno; |
| 482 | 484 | blkcnt = args->rmtblkcnt; |
| 483 | − valuelen = args->valuelen; | |
| 485 | + valuelen = args->rmtvaluelen; | |
| 484 | 486 | while (valuelen > 0) { |
| 485 | 487 | struct xfs_buf *bp; |
| 486 | 488 | xfs_daddr_t dblkno; |
| @@ -60,10 +60,12 @@ typedef struct xfs_da_args { · 59 unmodified lines | ||
| 60 | 60 | int index; /* index of attr of interest in blk */ |
| 61 | 61 | xfs_dablk_t rmtblkno; /* remote attr value starting blkno */ |
| 62 | 62 | int rmtblkcnt; /* remote attr value block count */ |
| 63 | + int rmtvaluelen; /* remote attr value length in bytes */ | |
| 63 | 64 | xfs_dablk_t blkno2; /* blkno of 2nd attr leaf of interest */ |
| 64 | 65 | int index2; /* index of 2nd attr in blk */ |
| 65 | 66 | xfs_dablk_t rmtblkno2; /* remote attr value starting blkno */ |
| 66 | 67 | int rmtblkcnt2; /* remote attr value block count */ |
| 68 | + int rmtvaluelen2; /* remote attr value length in bytes */ | |
| 67 | 69 | int op_flags; /* operation flags */ |
| 68 | 70 | enum xfs_dacmp cmpresult; /* name compare result for lookups */ |
| 69 | 71 | } xfs_da_args_t; |
| @@ -237,7 +237,7 @@ xfs_fs_nfs_commit_metadata( · 236 unmodified lines | ||
| 237 | 237 | |
| 238 | 238 | if (!lsn) |
| 239 | 239 | return 0; |
| 240 | − return _xfs_log_force_lsn(mp, lsn, XFS_LOG_SYNC, NULL); | |
| 240 | + return -_xfs_log_force_lsn(mp, lsn, XFS_LOG_SYNC, NULL); | |
| 241 | 241 | } |
| 242 | 242 | |
| 243 | 243 | const struct export_operations xfs_export_operations = { |
| @@ -155,7 +155,7 @@ xfs_dir_fsync( · 154 unmodified lines | ||
| 155 | 155 | |
| 156 | 156 | if (!lsn) |
| 157 | 157 | return 0; |
| 158 | − return _xfs_log_force_lsn(mp, lsn, XFS_LOG_SYNC, NULL); | |
| 158 | + return -_xfs_log_force_lsn(mp, lsn, XFS_LOG_SYNC, NULL); | |
| 159 | 159 | } |
| 160 | 160 | |
| 161 | 161 | STATIC int |
| @@ -295,7 +295,7 @@ xfs_file_aio_read( · 133 unmodified lines | ||
| 295 | 295 | xfs_rw_ilock(ip, XFS_IOLOCK_EXCL); |
| 296 | 296 | |
| 297 | 297 | if (inode->i_mapping->nrpages) { |
| 298 | − ret = -filemap_write_and_wait_range( | |
| 298 | + ret = filemap_write_and_wait_range( | |
| 299 | 299 | VFS_I(ip)->i_mapping, |
| 300 | 300 | pos, -1); |
| 301 | 301 | if (ret) { |
| @@ -837,7 +837,7 @@ xfs_file_fallocate( · 535 unmodified lines | ||
| 837 | 837 | unsigned blksize_mask = (1 << inode->i_blkbits) - 1; |
| 838 | 838 | |
| 839 | 839 | if (offset & blksize_mask || len & blksize_mask) { |
| 840 | − error = -EINVAL; | |
| 840 | + error = EINVAL; | |
| 841 | 841 | goto out_unlock; |
| 842 | 842 | } |
| 843 | 843 | |
| @@ -846,7 +846,7 @@ xfs_file_fallocate( · 2 unmodified lines | ||
| 846 | 846 | * in which case it is effectively a truncate operation |
| 847 | 847 | */ |
| 848 | 848 | if (offset + len >= i_size_read(inode)) { |
| 849 | − error = -EINVAL; | |
| 849 | + error = EINVAL; | |
| 850 | 850 | goto out_unlock; |
| 851 | 851 | } |
| 852 | 852 | |
| @@ -72,8 +72,8 @@ xfs_initxattrs( · 71 unmodified lines | ||
| 72 | 72 | int error = 0; |
| 73 | 73 | |
| 74 | 74 | for (xattr = xattr_array; xattr->name != NULL; xattr++) { |
| 75 | − error = xfs_attr_set(ip, xattr->name, xattr->value, | |
| 76 | − xattr->value_len, ATTR_SECURE); | |
| 75 | + error = -xfs_attr_set(ip, xattr->name, xattr->value, | |
| 76 | + xattr->value_len, ATTR_SECURE); | |
| 77 | 77 | if (error < 0) |
| 78 | 78 | break; |
| 79 | 79 | } |
| @@ -93,8 +93,8 @@ xfs_init_security( · 13 unmodified lines | ||
| 93 | 93 | struct inode *dir, |
| 94 | 94 | const struct qstr *qstr) |
| 95 | 95 | { |
| 96 | − return security_inode_init_security(inode, dir, qstr, | |
| 97 | − &xfs_initxattrs, NULL); | |
| 96 | + return -security_inode_init_security(inode, dir, qstr, | |
| 97 | + &xfs_initxattrs, NULL); | |
| 98 | 98 | } |
| 99 | 99 | |
| 100 | 100 | static void |
| @@ -124,15 +124,15 @@ xfs_cleanup_inode( · 23 unmodified lines | ||
| 124 | 124 | xfs_dentry_to_name(&teardown, dentry, 0); |
| 125 | 125 | |
| 126 | 126 | xfs_remove(XFS_I(dir), &teardown, XFS_I(inode)); |
| 127 | − iput(inode); | |
| 128 | 127 | } |
| 129 | 128 | |
| 130 | 129 | STATIC int |
| 131 | −xfs_vn_mknod( | |
| 130 | +xfs_generic_create( | |
| 132 | 131 | struct inode *dir, |
| 133 | 132 | struct dentry *dentry, |
| 134 | 133 | umode_t mode, |
| 135 | − dev_t rdev) | |
| 134 | + dev_t rdev, | |
| 135 | + bool tmpfile) /* unnamed file */ | |
| 136 | 136 | { |
| 137 | 137 | struct inode *inode; |
| 138 | 138 | struct xfs_inode *ip = NULL; |
| @@ -156,8 +156,12 @@ xfs_vn_mknod( · 17 unmodified lines | ||
| 156 | 156 | if (error) |
| 157 | 157 | return error; |
| 158 | 158 | |
| 159 | − xfs_dentry_to_name(&name, dentry, mode); | |
| 160 | − error = xfs_create(XFS_I(dir), &name, mode, rdev, &ip); | |
| 159 | + if (!tmpfile) { | |
| 160 | + xfs_dentry_to_name(&name, dentry, mode); | |
| 161 | + error = xfs_create(XFS_I(dir), &name, mode, rdev, &ip); | |
| 162 | + } else { | |
| 163 | + error = xfs_create_tmpfile(XFS_I(dir), dentry, mode, &ip); | |
| 164 | + } | |
| 161 | 165 | if (unlikely(error)) |
| 162 | 166 | goto out_free_acl; |
| 163 | 167 | |
| @@ -169,18 +173,22 @@ xfs_vn_mknod( · 5 unmodified lines | ||
| 169 | 173 | |
| 170 | 174 | #ifdef CONFIG_XFS_POSIX_ACL |
| 171 | 175 | if (default_acl) { |
| 172 | − error = xfs_set_acl(inode, default_acl, ACL_TYPE_DEFAULT); | |
| 176 | + error = -xfs_set_acl(inode, default_acl, ACL_TYPE_DEFAULT); | |
| 173 | 177 | if (error) |
| 174 | 178 | goto out_cleanup_inode; |
| 175 | 179 | } |
| 176 | 180 | if (acl) { |
| 177 | − error = xfs_set_acl(inode, acl, ACL_TYPE_ACCESS); | |
| 181 | + error = -xfs_set_acl(inode, acl, ACL_TYPE_ACCESS); | |
| 178 | 182 | if (error) |
| 179 | 183 | goto out_cleanup_inode; |
| 180 | 184 | } |
| 181 | 185 | #endif |
| 182 | 186 | |
| 183 | − d_instantiate(dentry, inode); | |
| 187 | + if (tmpfile) | |
| 188 | + d_tmpfile(dentry, inode); | |
| 189 | + else | |
| 190 | + d_instantiate(dentry, inode); | |
| 191 | + | |
| 184 | 192 | out_free_acl: |
| 185 | 193 | if (default_acl) |
| 186 | 194 | posix_acl_release(default_acl); |
| @@ -189,10 +197,22 @@ xfs_vn_mknod( · 2 unmodified lines | ||
| 189 | 197 | return -error; |
| 190 | 198 | |
| 191 | 199 | out_cleanup_inode: |
| 192 | − xfs_cleanup_inode(dir, inode, dentry); | |
| 200 | + if (!tmpfile) | |
| 201 | + xfs_cleanup_inode(dir, inode, dentry); | |
| 202 | + iput(inode); | |
| 193 | 203 | goto out_free_acl; |
| 194 | 204 | } |
| 195 | 205 | |
| 206 | +STATIC int | |
| 207 | +xfs_vn_mknod( | |
| 208 | + struct inode *dir, | |
| 209 | + struct dentry *dentry, | |
| 210 | + umode_t mode, | |
| 211 | + dev_t rdev) | |
| 212 | +{ | |
| 213 | + return xfs_generic_create(dir, dentry, mode, rdev, false); | |
| 214 | +} | |
| 215 | + | |
| 196 | 216 | STATIC int |
| 197 | 217 | xfs_vn_create( |
| 198 | 218 | struct inode *dir, |
| @@ -353,6 +373,7 @@ xfs_vn_symlink( · 154 unmodified lines | ||
| 353 | 373 | |
| 354 | 374 | out_cleanup_inode: |
| 355 | 375 | xfs_cleanup_inode(dir, inode, dentry); |
| 376 | + iput(inode); | |
| 356 | 377 | out: |
| 357 | 378 | return -error; |
| 358 | 379 | } |
| @@ -1053,25 +1074,7 @@ xfs_vn_tmpfile( · 694 unmodified lines | ||
| 1053 | 1074 | struct dentry *dentry, |
| 1054 | 1075 | umode_t mode) |
| 1055 | 1076 | { |
| 1056 | − int error; | |
| 1057 | − struct xfs_inode *ip; | |
| 1058 | − struct inode *inode; | |
| 1059 | − | |
| 1060 | − error = xfs_create_tmpfile(XFS_I(dir), dentry, mode, &ip); | |
| 1061 | − if (unlikely(error)) | |
| 1062 | − return -error; | |
| 1063 | − | |
| 1064 | − inode = VFS_I(ip); | |
| 1065 | − | |
| 1066 | − error = xfs_init_security(inode, dir, &dentry->d_name); | |
| 1067 | − if (unlikely(error)) { | |
| 1068 | − iput(inode); | |
| 1069 | − return -error; | |
| 1070 | − } | |
| 1071 | − | |
| 1072 | − d_tmpfile(dentry, inode); | |
| 1073 | − | |
| 1074 | − return 0; | |
| 1077 | + return xfs_generic_create(dir, dentry, mode, 0, true); | |
| 1075 | 1078 | } |
| 1076 | 1079 | |
| 1077 | 1080 | static const struct inode_operations xfs_inode_operations = { |
| @@ -616,11 +616,13 @@ xfs_log_mount( · 615 unmodified lines | ||
| 616 | 616 | int error = 0; |
| 617 | 617 | int min_logfsbs; |
| 618 | 618 | |
| 619 | − if (!(mp->m_flags & XFS_MOUNT_NORECOVERY)) | |
| 620 | − xfs_notice(mp, "Mounting Filesystem"); | |
| 621 | − else { | |
| 619 | + if (!(mp->m_flags & XFS_MOUNT_NORECOVERY)) { | |
| 620 | + xfs_notice(mp, "Mounting V%d Filesystem", | |
| 621 | + XFS_SB_VERSION_NUM(&mp->m_sb)); | |
| 622 | + } else { | |
| 622 | 623 | xfs_notice(mp, |
| 623 | −"Mounting filesystem in no-recovery mode. Filesystem will be inconsistent."); | |
| 624 | +"Mounting V%d filesystem in no-recovery mode. Filesystem will be inconsistent.", | |
| 625 | + XFS_SB_VERSION_NUM(&mp->m_sb)); | |
| 624 | 626 | ASSERT(mp->m_flags & XFS_MOUNT_RDONLY); |
| 625 | 627 | } |
| 626 | 628 | |
| @@ -743,8 +743,6 @@ xfs_mountfs( · 742 unmodified lines | ||
| 743 | 743 | new_size *= mp->m_sb.sb_inodesize / XFS_DINODE_MIN_SIZE; |
| 744 | 744 | if (mp->m_sb.sb_inoalignmt >= XFS_B_TO_FSBT(mp, new_size)) |
| 745 | 745 | mp->m_inode_cluster_size = new_size; |
| 746 | − xfs_info(mp, "Using inode cluster size of %d bytes", | |
| 747 | − mp->m_inode_cluster_size); | |
| 748 | 746 | } |
| 749 | 747 | |
| 750 | 748 | /* |
| @@ -843,22 +843,17 @@ xfs_qm_init_quotainfo( · 842 unmodified lines | ||
| 843 | 843 | |
| 844 | 844 | qinf = mp->m_quotainfo = kmem_zalloc(sizeof(xfs_quotainfo_t), KM_SLEEP); |
| 845 | 845 | |
| 846 | − if ((error = list_lru_init(&qinf->qi_lru))) { | |
| 847 | − kmem_free(qinf); | |
| 848 | − mp->m_quotainfo = NULL; | |
| 849 | − return error; | |
| 850 | − } | |
| 846 | + error = -list_lru_init(&qinf->qi_lru); | |
| 847 | + if (error) | |
| 848 | + goto out_free_qinf; | |
| 851 | 849 | |
| 852 | 850 | /* |
| 853 | 851 | * See if quotainodes are setup, and if not, allocate them, |
| 854 | 852 | * and change the superblock accordingly. |
| 855 | 853 | */ |
| 856 | − if ((error = xfs_qm_init_quotainos(mp))) { | |
| 857 | − list_lru_destroy(&qinf->qi_lru); | |
| 858 | − kmem_free(qinf); | |
| 859 | − mp->m_quotainfo = NULL; | |
| 860 | − return error; | |
| 861 | − } | |
| 854 | + error = xfs_qm_init_quotainos(mp); | |
| 855 | + if (error) | |
| 856 | + goto out_free_lru; | |
| 862 | 857 | |
| 863 | 858 | INIT_RADIX_TREE(&qinf->qi_uquota_tree, GFP_NOFS); |
| 864 | 859 | INIT_RADIX_TREE(&qinf->qi_gquota_tree, GFP_NOFS); |
| @@ -918,7 +913,7 @@ xfs_qm_init_quotainfo( · 53 unmodified lines | ||
| 918 | 913 | qinf->qi_isoftlimit = be64_to_cpu(ddqp->d_ino_softlimit); |
| 919 | 914 | qinf->qi_rtbhardlimit = be64_to_cpu(ddqp->d_rtb_hardlimit); |
| 920 | 915 | qinf->qi_rtbsoftlimit = be64_to_cpu(ddqp->d_rtb_softlimit); |
| 921 | − | |
| 916 | + | |
| 922 | 917 | xfs_qm_dqdestroy(dqp); |
| 923 | 918 | } else { |
| 924 | 919 | qinf->qi_btimelimit = XFS_QM_BTIMELIMIT; |
| @@ -935,6 +930,13 @@ xfs_qm_init_quotainfo( · 10 unmodified lines | ||
| 935 | 930 | qinf->qi_shrinker.flags = SHRINKER_NUMA_AWARE; |
| 936 | 931 | register_shrinker(&qinf->qi_shrinker); |
| 937 | 932 | return 0; |
| 933 | + | |
| 934 | +out_free_lru: | |
| 935 | + list_lru_destroy(&qinf->qi_lru); | |
| 936 | +out_free_qinf: | |
| 937 | + kmem_free(qinf); | |
| 938 | + mp->m_quotainfo = NULL; | |
| 939 | + return error; | |
| 938 | 940 | } |
| 939 | 941 | |
| 940 | 942 | |
| @@ -201,10 +201,6 @@ xfs_mount_validate_sb( · 200 unmodified lines | ||
| 201 | 201 | * write validation, we don't need to check feature masks. |
| 202 | 202 | */ |
| 203 | 203 | if (check_version && XFS_SB_VERSION_NUM(sbp) == XFS_SB_VERSION_5) { |
| 204 | − xfs_alert(mp, | |
| 205 | −"Version 5 superblock detected. This kernel has EXPERIMENTAL support enabled!\n" | |
| 206 | −"Use of these features in this kernel is at your own risk!"); | |
| 207 | − | |
| 208 | 204 | if (xfs_sb_has_compat_feature(sbp, |
| 209 | 205 | XFS_SB_FEAT_COMPAT_UNKNOWN)) { |
| 210 | 206 | xfs_warn(mp, |
| @@ -1433,11 +1433,11 @@ xfs_fs_fill_super( · 1432 unmodified lines | ||
| 1433 | 1433 | if (error) |
| 1434 | 1434 | goto out_free_fsname; |
| 1435 | 1435 | |
| 1436 | − error = xfs_init_mount_workqueues(mp); | |
| 1436 | + error = -xfs_init_mount_workqueues(mp); | |
| 1437 | 1437 | if (error) |
| 1438 | 1438 | goto out_close_devices; |
| 1439 | 1439 | |
| 1440 | − error = xfs_icsb_init_counters(mp); | |
| 1440 | + error = -xfs_icsb_init_counters(mp); | |
| 1441 | 1441 | if (error) |
| 1442 | 1442 | goto out_destroy_workqueues; |
| 1443 | 1443 | |
| @@ -12,7 +12,7 @@ · 11 unmodified lines | ||
| 12 | 12 | [RLIMIT_CPU] = { RLIM_INFINITY, RLIM_INFINITY }, \ |
| 13 | 13 | [RLIMIT_FSIZE] = { RLIM_INFINITY, RLIM_INFINITY }, \ |
| 14 | 14 | [RLIMIT_DATA] = { RLIM_INFINITY, RLIM_INFINITY }, \ |
| 15 | − [RLIMIT_STACK] = { _STK_LIM, _STK_LIM_MAX }, \ | |
| 15 | + [RLIMIT_STACK] = { _STK_LIM, RLIM_INFINITY }, \ | |
| 16 | 16 | [RLIMIT_CORE] = { 0, RLIM_INFINITY }, \ |
| 17 | 17 | [RLIMIT_RSS] = { RLIM_INFINITY, RLIM_INFINITY }, \ |
| 18 | 18 | [RLIMIT_NPROC] = { 0, 0 }, \ |
| @@ -637,6 +637,22 @@ · 636 unmodified lines | ||
| 637 | 637 | {0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
| 638 | 638 | {0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
| 639 | 639 | {0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
| 640 | + {0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 641 | + {0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 642 | + {0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 643 | + {0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 644 | + {0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 645 | + {0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 646 | + {0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 647 | + {0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 648 | + {0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 649 | + {0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 650 | + {0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 651 | + {0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 652 | + {0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 653 | + {0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 654 | + {0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 655 | + {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ | |
| 640 | 656 | {0x1002, 0x9900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
| 641 | 657 | {0x1002, 0x9901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
| 642 | 658 | {0x1002, 0x9903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \ |
| @@ -191,8 +191,8 @@ · 190 unmodified lines | ||
| 191 | 191 | INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \ |
| 192 | 192 | INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \ |
| 193 | 193 | INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \ |
| 194 | − INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \ | |
| 195 | − INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \ | |
| 194 | + INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \ | |
| 195 | + INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \ | |
| 196 | 196 | INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \ |
| 197 | 197 | INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \ |
| 198 | 198 | INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \ |
File renamed without changes.
| @@ -47,6 +47,7 @@ struct amba_driver { · 46 unmodified lines | ||
| 47 | 47 | enum amba_vendor { |
| 48 | 48 | AMBA_VENDOR_ARM = 0x41, |
| 49 | 49 | AMBA_VENDOR_ST = 0x80, |
| 50 | + AMBA_VENDOR_QCOM = 0x51, | |
| 50 | 51 | }; |
| 51 | 52 | |
| 52 | 53 | extern struct bus_type amba_bustype; |
| @@ -473,6 +473,7 @@ struct cftype { · 472 unmodified lines | ||
| 473 | 473 | }; |
| 474 | 474 | |
| 475 | 475 | extern struct cgroup_root cgrp_dfl_root; |
| 476 | +extern struct css_set init_css_set; | |
| 476 | 477 | |
| 477 | 478 | static inline bool cgroup_on_dfl(const struct cgroup *cgrp) |
| 478 | 479 | { |
| @@ -700,6 +701,20 @@ static inline struct cgroup_subsys_state *task_css(struct task_struct *task, · 221 unmodified lines | ||
| 700 | 701 | return task_css_check(task, subsys_id, false); |
| 701 | 702 | } |
| 702 | 703 | |
| 704 | +/** | |
| 705 | + * task_css_is_root - test whether a task belongs to the root css | |
| 706 | + * @task: the target task | |
| 707 | + * @subsys_id: the target subsystem ID | |
| 708 | + * | |
| 709 | + * Test whether @task belongs to the root css on the specified subsystem. | |
| 710 | + * May be invoked in any context. | |
| 711 | + */ | |
| 712 | +static inline bool task_css_is_root(struct task_struct *task, int subsys_id) | |
| 713 | +{ | |
| 714 | + return task_css_check(task, subsys_id, true) == | |
| 715 | + init_css_set.subsys[subsys_id]; | |
| 716 | +} | |
| 717 | + | |
| 703 | 718 | static inline struct cgroup *task_cgroup(struct task_struct *task, |
| 704 | 719 | int subsys_id) |
| 705 | 720 | { |
| @@ -429,6 +429,7 @@ typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); · 428 unmodified lines | ||
| 429 | 429 | typedef void (*dma_async_tx_callback)(void *dma_async_param); |
| 430 | 430 | |
| 431 | 431 | struct dmaengine_unmap_data { |
| 432 | + u8 map_cnt; | |
| 432 | 433 | u8 to_cnt; |
| 433 | 434 | u8 from_cnt; |
| 434 | 435 | u8 bidi_cnt; |
| @@ -56,6 +56,7 @@ struct macvlan_dev { · 55 unmodified lines | ||
| 56 | 56 | int numqueues; |
| 57 | 57 | netdev_features_t tap_features; |
| 58 | 58 | int minor; |
| 59 | + int nest_level; | |
| 59 | 60 | }; |
| 60 | 61 | |
| 61 | 62 | static inline void macvlan_count_rx(const struct macvlan_dev *vlan, |
| @@ -73,7 +73,7 @@ static inline struct vlan_ethhdr *vlan_eth_hdr(const struct sk_buff *skb) · 72 unmodified lines | ||
| 73 | 73 | /* found in socket.c */ |
| 74 | 74 | extern void vlan_ioctl_set(int (*hook)(struct net *, void __user *)); |
| 75 | 75 | |
| 76 | −static inline int is_vlan_dev(struct net_device *dev) | |
| 76 | +static inline bool is_vlan_dev(struct net_device *dev) | |
| 77 | 77 | { |
| 78 | 78 | return dev->priv_flags & IFF_802_1Q_VLAN; |
| 79 | 79 | } |
| @@ -159,6 +159,7 @@ struct vlan_dev_priv { · 79 unmodified lines | ||
| 159 | 159 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 160 | 160 | struct netpoll *netpoll; |
| 161 | 161 | #endif |
| 162 | + unsigned int nest_level; | |
| 162 | 163 | }; |
| 163 | 164 | |
| 164 | 165 | static inline struct vlan_dev_priv *vlan_dev_priv(const struct net_device *dev) |
| @@ -197,6 +198,12 @@ extern void vlan_vids_del_by_dev(struct net_device *dev, · 32 unmodified lines | ||
| 197 | 198 | const struct net_device *by_dev); |
| 198 | 199 | |
| 199 | 200 | extern bool vlan_uses_dev(const struct net_device *dev); |
| 201 | + | |
| 202 | +static inline int vlan_get_encap_level(struct net_device *dev) | |
| 203 | +{ | |
| 204 | + BUG_ON(!is_vlan_dev(dev)); | |
| 205 | + return vlan_dev_priv(dev)->nest_level; | |
| 206 | +} | |
| 200 | 207 | #else |
| 201 | 208 | static inline struct net_device * |
| 202 | 209 | __vlan_find_dev_deep(struct net_device *real_dev, |
| @@ -263,6 +270,11 @@ static inline bool vlan_uses_dev(const struct net_device *dev) · 60 unmodified lines | ||
| 263 | 270 | { |
| 264 | 271 | return false; |
| 265 | 272 | } |
| 273 | +static inline int vlan_get_encap_level(struct net_device *dev) | |
| 274 | +{ | |
| 275 | + BUG(); | |
| 276 | + return 0; | |
| 277 | +} | |
| 266 | 278 | #endif |
| 267 | 279 | |
| 268 | 280 | static inline bool vlan_hw_offload_capable(netdev_features_t features, |
| @@ -483,4 +495,5 @@ static inline void vlan_set_encap_proto(struct sk_buff *skb, · 214 unmodified lines | ||
| 483 | 495 | */ |
| 484 | 496 | skb->protocol = htons(ETH_P_802_2); |
| 485 | 497 | } |
| 498 | + | |
| 486 | 499 | #endif /* !(_LINUX_IF_VLAN_H_) */ |
| @@ -272,6 +272,11 @@ static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m) · 271 unmodified lines | ||
| 272 | 272 | return -EINVAL; |
| 273 | 273 | } |
| 274 | 274 | |
| 275 | +static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask) | |
| 276 | +{ | |
| 277 | + return 0; | |
| 278 | +} | |
| 279 | + | |
| 275 | 280 | static inline int irq_can_set_affinity(unsigned int irq) |
| 276 | 281 | { |
| 277 | 282 | return 0; |
| @@ -50,7 +50,24 @@ enum kernfs_node_flag { · 49 unmodified lines | ||
| 50 | 50 | |
| 51 | 51 | /* @flags for kernfs_create_root() */ |
| 52 | 52 | enum kernfs_root_flag { |
| 53 | − KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001, | |
| 53 | + /* | |
| 54 | + * kernfs_nodes are created in the deactivated state and invisible. | |
| 55 | + * They require explicit kernfs_activate() to become visible. This | |
| 56 | + * can be used to make related nodes become visible atomically | |
| 57 | + * after all nodes are created successfully. | |
| 58 | + */ | |
| 59 | + KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001, | |
| 60 | + | |
| 61 | + /* | |
| 62 | + * For regular flies, if the opener has CAP_DAC_OVERRIDE, open(2) | |
| 63 | + * succeeds regardless of the RW permissions. sysfs had an extra | |
| 64 | + * layer of enforcement where open(2) fails with -EACCES regardless | |
| 65 | + * of CAP_DAC_OVERRIDE if the permission doesn't have the | |
| 66 | + * respective read or write access at all (none of S_IRUGO or | |
| 67 | + * S_IWUGO) or the respective operation isn't implemented. The | |
| 68 | + * following flag enables that behavior. | |
| 69 | + */ | |
| 70 | + KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK = 0x0002, | |
| 54 | 71 | }; |
| 55 | 72 | |
| 56 | 73 | /* type-specific structures for kernfs_node union members */ |
| @@ -12,9 +12,9 @@ · 11 unmodified lines | ||
| 12 | 12 | #endif |
| 13 | 13 | |
| 14 | 14 | #ifdef __cplusplus |
| 15 | −#define CPP_ASMLINKAGE extern "C" __visible | |
| 15 | +#define CPP_ASMLINKAGE extern "C" | |
| 16 | 16 | #else |
| 17 | −#define CPP_ASMLINKAGE __visible | |
| 17 | +#define CPP_ASMLINKAGE | |
| 18 | 18 | #endif |
| 19 | 19 | |
| 20 | 20 | #ifndef asmlinkage |
| @@ -45,7 +45,6 @@ struct platform_device; · 44 unmodified lines | ||
| 45 | 45 | struct rtsx_slot { |
| 46 | 46 | struct platform_device *p_dev; |
| 47 | 47 | void (*card_event)(struct platform_device *p_dev); |
| 48 | − void (*done_transfer)(struct platform_device *p_dev); | |
| 49 | 48 | }; |
| 50 | 49 | |
| 51 | 50 | #endif |
| @@ -943,12 +943,6 @@ void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr); · 942 unmodified lines | ||
| 943 | 943 | int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout); |
| 944 | 944 | int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist, |
| 945 | 945 | int num_sg, bool read, int timeout); |
| 946 | −int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, | |
| 947 | − int num_sg, bool read); | |
| 948 | −int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist, | |
| 949 | − int num_sg, bool read); | |
| 950 | −int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist, | |
| 951 | − int sg_count, bool read); | |
| 952 | 946 | int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len); |
| 953 | 947 | int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len); |
| 954 | 948 | int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card); |
| @@ -421,6 +421,17 @@ struct mlx4_wqe_inline_seg { · 420 unmodified lines | ||
| 421 | 421 | __be32 byte_count; |
| 422 | 422 | }; |
| 423 | 423 | |
| 424 | +enum mlx4_update_qp_attr { | |
| 425 | + MLX4_UPDATE_QP_SMAC = 1 << 0, | |
| 426 | +}; | |
| 427 | + | |
| 428 | +struct mlx4_update_qp_params { | |
| 429 | + u8 smac_index; | |
| 430 | +}; | |
| 431 | + | |
| 432 | +int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp, | |
| 433 | + enum mlx4_update_qp_attr attr, | |
| 434 | + struct mlx4_update_qp_params *params); | |
| 424 | 435 | int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt, |
| 425 | 436 | enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state, |
| 426 | 437 | struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar, |
| @@ -248,24 +248,17 @@ do { \ · 247 unmodified lines | ||
| 248 | 248 | bool __net_get_random_once(void *buf, int nbytes, bool *done, |
| 249 | 249 | struct static_key *done_key); |
| 250 | 250 | |
| 251 | −#ifdef HAVE_JUMP_LABEL | |
| 252 | −#define ___NET_RANDOM_STATIC_KEY_INIT ((struct static_key) \ | |
| 253 | − { .enabled = ATOMIC_INIT(0), .entries = (void *)1 }) | |
| 254 | −#else /* !HAVE_JUMP_LABEL */ | |
| 255 | −#define ___NET_RANDOM_STATIC_KEY_INIT STATIC_KEY_INIT_FALSE | |
| 256 | −#endif /* HAVE_JUMP_LABEL */ | |
| 257 | − | |
| 258 | 251 | #define net_get_random_once(buf, nbytes) \ |
| 259 | 252 | ({ \ |
| 260 | 253 | bool ___ret = false; \ |
| 261 | 254 | static bool ___done = false; \ |
| 262 | − static struct static_key ___done_key = \ | |
| 263 | − ___NET_RANDOM_STATIC_KEY_INIT; \ | |
| 264 | − if (!static_key_true(&___done_key)) \ | |
| 255 | + static struct static_key ___once_key = \ | |
| 256 | + STATIC_KEY_INIT_TRUE; \ | |
| 257 | + if (static_key_true(&___once_key)) \ | |
| 265 | 258 | ___ret = __net_get_random_once(buf, \ |
| 266 | 259 | nbytes, \ |
| 267 | 260 | &___done, \ |
| 268 | − &___done_key); \ | |
| 261 | + &___once_key); \ | |
| 269 | 262 | ___ret; \ |
| 270 | 263 | }) |
| 271 | 264 | |
| @@ -1144,6 +1144,7 @@ struct net_device_ops { · 1143 unmodified lines | ||
| 1144 | 1144 | netdev_tx_t (*ndo_dfwd_start_xmit) (struct sk_buff *skb, |
| 1145 | 1145 | struct net_device *dev, |
| 1146 | 1146 | void *priv); |
| 1147 | + int (*ndo_get_lock_subclass)(struct net_device *dev); | |
| 1147 | 1148 | }; |
| 1148 | 1149 | |
| 1149 | 1150 | /** |
| @@ -2950,7 +2951,12 @@ static inline void netif_addr_lock(struct net_device *dev) · 1800 unmodified lines | ||
| 2950 | 2951 | |
| 2951 | 2952 | static inline void netif_addr_lock_nested(struct net_device *dev) |
| 2952 | 2953 | { |
| 2953 | − spin_lock_nested(&dev->addr_list_lock, SINGLE_DEPTH_NESTING); | |
| 2954 | + int subclass = SINGLE_DEPTH_NESTING; | |
| 2955 | + | |
| 2956 | + if (dev->netdev_ops->ndo_get_lock_subclass) | |
| 2957 | + subclass = dev->netdev_ops->ndo_get_lock_subclass(dev); | |
| 2958 | + | |
| 2959 | + spin_lock_nested(&dev->addr_list_lock, subclass); | |
| 2954 | 2960 | } |
| 2955 | 2961 | |
| 2956 | 2962 | static inline void netif_addr_lock_bh(struct net_device *dev) |
| @@ -3050,9 +3056,18 @@ extern int weight_p; · 93 unmodified lines | ||
| 3050 | 3056 | extern int bpf_jit_enable; |
| 3051 | 3057 | |
| 3052 | 3058 | bool netdev_has_upper_dev(struct net_device *dev, struct net_device *upper_dev); |
| 3059 | +struct net_device *netdev_upper_get_next_dev_rcu(struct net_device *dev, | |
| 3060 | + struct list_head **iter); | |
| 3053 | 3061 | struct net_device *netdev_all_upper_get_next_dev_rcu(struct net_device *dev, |
| 3054 | 3062 | struct list_head **iter); |
| 3055 | 3063 | |
| 3064 | +/* iterate through upper list, must be called under RCU read lock */ | |
| 3065 | +#define netdev_for_each_upper_dev_rcu(dev, updev, iter) \ | |
| 3066 | + for (iter = &(dev)->adj_list.upper, \ | |
| 3067 | + updev = netdev_upper_get_next_dev_rcu(dev, &(iter)); \ | |
| 3068 | + updev; \ | |
| 3069 | + updev = netdev_upper_get_next_dev_rcu(dev, &(iter))) | |
| 3070 | + | |
| 3056 | 3071 | /* iterate through upper list, must be called under RCU read lock */ |
| 3057 | 3072 | #define netdev_for_each_all_upper_dev_rcu(dev, updev, iter) \ |
| 3058 | 3073 | for (iter = &(dev)->all_adj_list.upper, \ |
| @@ -3077,6 +3092,14 @@ void *netdev_lower_get_next_private_rcu(struct net_device *dev, · 18 unmodified lines | ||
| 3077 | 3092 | priv; \ |
| 3078 | 3093 | priv = netdev_lower_get_next_private_rcu(dev, &(iter))) |
| 3079 | 3094 | |
| 3095 | +void *netdev_lower_get_next(struct net_device *dev, | |
| 3096 | + struct list_head **iter); | |
| 3097 | +#define netdev_for_each_lower_dev(dev, ldev, iter) \ | |
| 3098 | + for (iter = &(dev)->adj_list.lower, \ | |
| 3099 | + ldev = netdev_lower_get_next(dev, &(iter)); \ | |
| 3100 | + ldev; \ | |
| 3101 | + ldev = netdev_lower_get_next(dev, &(iter))) | |
| 3102 | + | |
| 3080 | 3103 | void *netdev_adjacent_get_private(struct list_head *adj_list); |
| 3081 | 3104 | void *netdev_lower_get_first_private_rcu(struct net_device *dev); |
| 3082 | 3105 | struct net_device *netdev_master_upper_dev_get(struct net_device *dev); |
| @@ -3092,6 +3115,8 @@ void netdev_upper_dev_unlink(struct net_device *dev, · 9 unmodified lines | ||
| 3092 | 3115 | void netdev_adjacent_rename_links(struct net_device *dev, char *oldname); |
| 3093 | 3116 | void *netdev_lower_dev_get_private(struct net_device *dev, |
| 3094 | 3117 | struct net_device *lower_dev); |
| 3118 | +int dev_get_nest_level(struct net_device *dev, | |
| 3119 | + bool (*type_check)(struct net_device *dev)); | |
| 3095 | 3120 | int skb_checksum_help(struct sk_buff *skb); |
| 3096 | 3121 | struct sk_buff *__skb_gso_segment(struct sk_buff *skb, |
| 3097 | 3122 | netdev_features_t features, bool tx_path); |
| @@ -3180,12 +3205,7 @@ void netdev_change_features(struct net_device *dev); · 82 unmodified lines | ||
| 3180 | 3205 | void netif_stacked_transfer_operstate(const struct net_device *rootdev, |
| 3181 | 3206 | struct net_device *dev); |
| 3182 | 3207 | |
| 3183 | −netdev_features_t netif_skb_dev_features(struct sk_buff *skb, | |
| 3184 | − const struct net_device *dev); | |
| 3185 | −static inline netdev_features_t netif_skb_features(struct sk_buff *skb) | |
| 3186 | −{ | |
| 3187 | − return netif_skb_dev_features(skb, skb->dev); | |
| 3188 | −} | |
| 3208 | +netdev_features_t netif_skb_features(struct sk_buff *skb); | |
| 3189 | 3209 | |
| 3190 | 3210 | static inline bool net_gso_ok(netdev_features_t features, int gso_type) |
| 3191 | 3211 | { |
| @@ -349,7 +349,7 @@ int of_device_is_stdout_path(struct device_node *dn); · 348 unmodified lines | ||
| 349 | 349 | |
| 350 | 350 | #else /* CONFIG_OF */ |
| 351 | 351 | |
| 352 | −static inline const char* of_node_full_name(struct device_node *np) | |
| 352 | +static inline const char* of_node_full_name(const struct device_node *np) | |
| 353 | 353 | { |
| 354 | 354 | return "<no-node>"; |
| 355 | 355 | } |
| @@ -31,7 +31,12 @@ extern struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np); · 30 unmodified lines | ||
| 31 | 31 | #else /* CONFIG_OF */ |
| 32 | 32 | static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np) |
| 33 | 33 | { |
| 34 | − return -ENOSYS; | |
| 34 | + /* | |
| 35 | + * Fall back to the non-DT function to register a bus. | |
| 36 | + * This way, we don't have to keep compat bits around in drivers. | |
| 37 | + */ | |
| 38 | + | |
| 39 | + return mdiobus_register(mdio); | |
| 35 | 40 | } |
| 36 | 41 | |
| 37 | 42 | static inline struct phy_device *of_phy_find_device(struct device_node *phy_np) |
| @@ -10,7 +10,7 @@ · 9 unmodified lines | ||
| 10 | 10 | |
| 11 | 11 | struct dma_chan; |
| 12 | 12 | |
| 13 | −#if defined(CONFIG_DMA_OMAP) || defined(CONFIG_DMA_OMAP_MODULE) | |
| 13 | +#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE)) | |
| 14 | 14 | bool omap_dma_filter_fn(struct dma_chan *, void *); |
| 15 | 15 | #else |
| 16 | 16 | static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d) |
| @@ -413,6 +413,8 @@ struct perf_event { · 412 unmodified lines | ||
| 413 | 413 | |
| 414 | 414 | struct ring_buffer *rb; |
| 415 | 415 | struct list_head rb_entry; |
| 416 | + unsigned long rcu_batches; | |
| 417 | + int rcu_pending; | |
| 416 | 418 | |
| 417 | 419 | /* poll related */ |
| 418 | 420 | wait_queue_head_t waitq; |
| @@ -704,6 +706,7 @@ extern struct perf_guest_info_callbacks *perf_guest_cbs; · 285 unmodified lines | ||
| 704 | 706 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
| 705 | 707 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
| 706 | 708 | |
| 709 | +extern void perf_event_exec(void); | |
| 707 | 710 | extern void perf_event_comm(struct task_struct *tsk); |
| 708 | 711 | extern void perf_event_fork(struct task_struct *tsk); |
| 709 | 712 | |
| @@ -781,7 +784,7 @@ extern void perf_event_enable(struct perf_event *event); · 71 unmodified lines | ||
| 781 | 784 | extern void perf_event_disable(struct perf_event *event); |
| 782 | 785 | extern int __perf_event_disable(void *info); |
| 783 | 786 | extern void perf_event_task_tick(void); |
| 784 | −#else | |
| 787 | +#else /* !CONFIG_PERF_EVENTS: */ | |
| 785 | 788 | static inline void |
| 786 | 789 | perf_event_task_sched_in(struct task_struct *prev, |
| 787 | 790 | struct task_struct *task) { } |
| @@ -811,6 +814,7 @@ static inline int perf_unregister_guest_info_callbacks · 23 unmodified lines | ||
| 811 | 814 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
| 812 | 815 | |
| 813 | 816 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
| 817 | +static inline void perf_event_exec(void) { } | |
| 814 | 818 | static inline void perf_event_comm(struct task_struct *tsk) { } |
| 815 | 819 | static inline void perf_event_fork(struct task_struct *tsk) { } |
| 816 | 820 | static inline void perf_event_init(void) { } |
| @@ -4,6 +4,7 @@ · 3 unmodified lines | ||
| 4 | 4 | |
| 5 | 5 | #include <linux/mutex.h> |
| 6 | 6 | #include <linux/netdevice.h> |
| 7 | +#include <linux/wait.h> | |
| 7 | 8 | #include <uapi/linux/rtnetlink.h> |
| 8 | 9 | |
| 9 | 10 | extern int rtnetlink_send(struct sk_buff *skb, struct net *net, u32 pid, u32 group, int echo); |
| @@ -22,6 +23,10 @@ extern void rtnl_lock(void); · 12 unmodified lines | ||
| 22 | 23 | extern void rtnl_unlock(void); |
| 23 | 24 | extern int rtnl_trylock(void); |
| 24 | 25 | extern int rtnl_is_locked(void); |
| 26 | + | |
| 27 | +extern wait_queue_head_t netdev_unregistering_wq; | |
| 28 | +extern struct mutex net_mutex; | |
| 29 | + | |
| 25 | 30 | #ifdef CONFIG_PROVE_LOCKING |
| 26 | 31 | extern int lockdep_rtnl_is_held(void); |
| 27 | 32 | #else |
| @@ -220,7 +220,7 @@ print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq); · 219 unmodified lines | ||
| 220 | 220 | #define TASK_PARKED 512 |
| 221 | 221 | #define TASK_STATE_MAX 1024 |
| 222 | 222 | |
| 223 | −#define TASK_STATE_TO_CHAR_STR "RSDTtZXxKWP" | |
| 223 | +#define TASK_STATE_TO_CHAR_STR "RSDTtXZxKWP" | |
| 224 | 224 | |
| 225 | 225 | extern char ___assert_task_state[1 - 2*!!( |
| 226 | 226 | sizeof(TASK_STATE_TO_CHAR_STR)-1 != ilog2(TASK_STATE_MAX)+1)]; |
| @@ -1153,9 +1153,12 @@ struct sched_dl_entity { · 926 unmodified lines | ||
| 1153 | 1153 | * |
| 1154 | 1154 | * @dl_boosted tells if we are boosted due to DI. If so we are |
| 1155 | 1155 | * outside bandwidth enforcement mechanism (but only until we |
| 1156 | − * exit the critical section). | |
| 1156 | + * exit the critical section); | |
| 1157 | + * | |
| 1158 | + * @dl_yielded tells if task gave up the cpu before consuming | |
| 1159 | + * all its available runtime during the last job. | |
| 1157 | 1160 | */ |
| 1158 | − int dl_throttled, dl_new, dl_boosted; | |
| 1161 | + int dl_throttled, dl_new, dl_boosted, dl_yielded; | |
| 1159 | 1162 | |
| 1160 | 1163 | /* |
| 1161 | 1164 | * Bandwidth enforcement timer. Each -deadline task has its |
| @@ -3668,6 +3668,18 @@ void cfg80211_sched_scan_results(struct wiphy *wiphy); · 3667 unmodified lines | ||
| 3668 | 3668 | */ |
| 3669 | 3669 | void cfg80211_sched_scan_stopped(struct wiphy *wiphy); |
| 3670 | 3670 | |
| 3671 | +/** | |
| 3672 | + * cfg80211_sched_scan_stopped_rtnl - notify that the scheduled scan has stopped | |
| 3673 | + * | |
| 3674 | + * @wiphy: the wiphy on which the scheduled scan stopped | |
| 3675 | + * | |
| 3676 | + * The driver can call this function to inform cfg80211 that the | |
| 3677 | + * scheduled scan had to be stopped, for whatever reason. The driver | |
| 3678 | + * is then called back via the sched_scan_stop operation when done. | |
| 3679 | + * This function should be called with rtnl locked. | |
| 3680 | + */ | |
| 3681 | +void cfg80211_sched_scan_stopped_rtnl(struct wiphy *wiphy); | |
| 3682 | + | |
| 3671 | 3683 | /** |
| 3672 | 3684 | * cfg80211_inform_bss_width_frame - inform cfg80211 of a received BSS frame |
| 3673 | 3685 | * |
| @@ -127,6 +127,7 @@ int rt6_dump_route(struct rt6_info *rt, void *p_arg); · 126 unmodified lines | ||
| 127 | 127 | void rt6_ifdown(struct net *net, struct net_device *dev); |
| 128 | 128 | void rt6_mtu_change(struct net_device *dev, unsigned int mtu); |
| 129 | 129 | void rt6_remove_prefsrc(struct inet6_ifaddr *ifp); |
| 130 | +void rt6_clean_tohost(struct net *net, struct in6_addr *gateway); | |
| 130 | 131 | |
| 131 | 132 | |
| 132 | 133 | /* |
| @@ -20,6 +20,11 @@ struct local_ports { · 19 unmodified lines | ||
| 20 | 20 | int range[2]; |
| 21 | 21 | }; |
| 22 | 22 | |
| 23 | +struct ping_group_range { | |
| 24 | + seqlock_t lock; | |
| 25 | + kgid_t range[2]; | |
| 26 | +}; | |
| 27 | + | |
| 23 | 28 | struct netns_ipv4 { |
| 24 | 29 | #ifdef CONFIG_SYSCTL |
| 25 | 30 | struct ctl_table_header *forw_hdr; |
| @@ -66,13 +71,13 @@ struct netns_ipv4 { · 40 unmodified lines | ||
| 66 | 71 | int sysctl_icmp_ratemask; |
| 67 | 72 | int sysctl_icmp_errors_use_inbound_ifaddr; |
| 68 | 73 | |
| 69 | − struct local_ports sysctl_local_ports; | |
| 74 | + struct local_ports ip_local_ports; | |
| 70 | 75 | |
| 71 | 76 | int sysctl_tcp_ecn; |
| 72 | 77 | int sysctl_ip_no_pmtu_disc; |
| 73 | 78 | int sysctl_ip_fwd_use_pmtu; |
| 74 | 79 | |
| 75 | − kgid_t sysctl_ping_group_range[2]; | |
| 80 | + struct ping_group_range ping_group_range; | |
| 76 | 81 | |
| 77 | 82 | atomic_t dev_addr_genid; |
| 78 | 83 | |
| @@ -80,7 +80,7 @@ DECLARE_EVENT_CLASS(module_refcnt, · 79 unmodified lines | ||
| 80 | 80 | |
| 81 | 81 | TP_fast_assign( |
| 82 | 82 | __entry->ip = ip; |
| 83 | − __entry->refcnt = __this_cpu_read(mod->refptr->incs) + __this_cpu_read(mod->refptr->decs); | |
| 83 | + __entry->refcnt = __this_cpu_read(mod->refptr->incs) - __this_cpu_read(mod->refptr->decs); | |
| 84 | 84 | __assign_str(name, mod->name); |
| 85 | 85 | ), |
| 86 | 86 | |
| @@ -57,12 +57,5 @@ · 56 unmodified lines | ||
| 57 | 57 | # define RLIM_INFINITY (~0UL) |
| 58 | 58 | #endif |
| 59 | 59 | |
| 60 | −/* | |
| 61 | − * RLIMIT_STACK default maximum - some architectures override it: | |
| 62 | − */ | |
| 63 | −#ifndef _STK_LIM_MAX | |
| 64 | −# define _STK_LIM_MAX RLIM_INFINITY | |
| 65 | −#endif | |
| 66 | − | |
| 67 | 60 | |
| 68 | 61 | #endif /* _UAPI_ASM_GENERIC_RESOURCE_H */ |
| @@ -697,9 +697,11 @@ __SYSCALL(__NR_finit_module, sys_finit_module) · 696 unmodified lines | ||
| 697 | 697 | __SYSCALL(__NR_sched_setattr, sys_sched_setattr) |
| 698 | 698 | #define __NR_sched_getattr 275 |
| 699 | 699 | __SYSCALL(__NR_sched_getattr, sys_sched_getattr) |
| 700 | +#define __NR_renameat2 276 | |
| 701 | +__SYSCALL(__NR_renameat2, sys_renameat2) | |
| 700 | 702 | |
| 701 | 703 | #undef __NR_syscalls |
| 702 | −#define __NR_syscalls 276 | |
| 704 | +#define __NR_syscalls 277 | |
| 703 | 705 | |
| 704 | 706 | /* |
| 705 | 707 | * All syscalls below here should go away really, |
| @@ -331,9 +331,17 @@ enum { · 330 unmodified lines | ||
| 331 | 331 | #define AUDIT_FAIL_PRINTK 1 |
| 332 | 332 | #define AUDIT_FAIL_PANIC 2 |
| 333 | 333 | |
| 334 | +/* | |
| 335 | + * These bits disambiguate different calling conventions that share an | |
| 336 | + * ELF machine type, bitness, and endianness | |
| 337 | + */ | |
| 338 | +#define __AUDIT_ARCH_CONVENTION_MASK 0x30000000 | |
| 339 | +#define __AUDIT_ARCH_CONVENTION_MIPS64_N32 0x20000000 | |
| 340 | + | |
| 334 | 341 | /* distinguish syscall tables */ |
| 335 | 342 | #define __AUDIT_ARCH_64BIT 0x80000000 |
| 336 | 343 | #define __AUDIT_ARCH_LE 0x40000000 |
| 344 | + | |
| 337 | 345 | #define AUDIT_ARCH_ALPHA (EM_ALPHA|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) |
| 338 | 346 | #define AUDIT_ARCH_ARM (EM_ARM|__AUDIT_ARCH_LE) |
| 339 | 347 | #define AUDIT_ARCH_ARMEB (EM_ARM) |
| @@ -346,7 +354,11 @@ enum { · 6 unmodified lines | ||
| 346 | 354 | #define AUDIT_ARCH_MIPS (EM_MIPS) |
| 347 | 355 | #define AUDIT_ARCH_MIPSEL (EM_MIPS|__AUDIT_ARCH_LE) |
| 348 | 356 | #define AUDIT_ARCH_MIPS64 (EM_MIPS|__AUDIT_ARCH_64BIT) |
| 357 | +#define AUDIT_ARCH_MIPS64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|\ | |
| 358 | + __AUDIT_ARCH_CONVENTION_MIPS64_N32) | |
| 349 | 359 | #define AUDIT_ARCH_MIPSEL64 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) |
| 360 | +#define AUDIT_ARCH_MIPSEL64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE|\ | |
| 361 | + __AUDIT_ARCH_CONVENTION_MIPS64_N32) | |
| 350 | 362 | #define AUDIT_ARCH_OPENRISC (EM_OPENRISC) |
| 351 | 363 | #define AUDIT_ARCH_PARISC (EM_PARISC) |
| 352 | 364 | #define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT) |
| @@ -3856,6 +3856,8 @@ enum nl80211_ap_sme_features { · 3855 unmodified lines | ||
| 3856 | 3856 | * @NL80211_FEATURE_CELL_BASE_REG_HINTS: This driver has been tested |
| 3857 | 3857 | * to work properly to suppport receiving regulatory hints from |
| 3858 | 3858 | * cellular base stations. |
| 3859 | + * @NL80211_FEATURE_P2P_DEVICE_NEEDS_CHANNEL: (no longer available, only | |
| 3860 | + * here to reserve the value for API/ABI compatibility) | |
| 3859 | 3861 | * @NL80211_FEATURE_SAE: This driver supports simultaneous authentication of |
| 3860 | 3862 | * equals (SAE) with user space SME (NL80211_CMD_AUTHENTICATE) in station |
| 3861 | 3863 | * mode |
| @@ -3897,7 +3899,7 @@ enum nl80211_feature_flags { · 35 unmodified lines | ||
| 3897 | 3899 | NL80211_FEATURE_HT_IBSS = 1 << 1, |
| 3898 | 3900 | NL80211_FEATURE_INACTIVITY_TIMER = 1 << 2, |
| 3899 | 3901 | NL80211_FEATURE_CELL_BASE_REG_HINTS = 1 << 3, |
| 3900 | − /* bit 4 is reserved - don't use */ | |
| 3902 | + NL80211_FEATURE_P2P_DEVICE_NEEDS_CHANNEL = 1 << 4, | |
| 3901 | 3903 | NL80211_FEATURE_SAE = 1 << 5, |
| 3902 | 3904 | NL80211_FEATURE_LOW_PRIORITY_SCAN = 1 << 6, |
| 3903 | 3905 | NL80211_FEATURE_SCAN_FLUSH = 1 << 7, |
| @@ -476,7 +476,7 @@ static void __init mm_init(void) · 475 unmodified lines | ||
| 476 | 476 | vmalloc_init(); |
| 477 | 477 | } |
| 478 | 478 | |
| 479 | −asmlinkage void __init start_kernel(void) | |
| 479 | +asmlinkage __visible void __init start_kernel(void) | |
| 480 | 480 | { |
| 481 | 481 | char * command_line; |
| 482 | 482 | extern const struct kernel_param __start___param[], __stop___param[]; |
| @@ -348,7 +348,7 @@ struct cgrp_cset_link { · 347 unmodified lines | ||
| 348 | 348 | * reference-counted, to improve performance when child cgroups |
| 349 | 349 | * haven't been created. |
| 350 | 350 | */ |
| 351 | −static struct css_set init_css_set = { | |
| 351 | +struct css_set init_css_set = { | |
| 352 | 352 | .refcount = ATOMIC_INIT(1), |
| 353 | 353 | .cgrp_links = LIST_HEAD_INIT(init_css_set.cgrp_links), |
| 354 | 354 | .tasks = LIST_HEAD_INIT(init_css_set.tasks), |
| @@ -1495,7 +1495,7 @@ static struct dentry *cgroup_mount(struct file_system_type *fs_type, · 1140 unmodified lines | ||
| 1495 | 1495 | */ |
| 1496 | 1496 | if (!use_task_css_set_links) |
| 1497 | 1497 | cgroup_enable_task_cg_lists(); |
| 1498 | −retry: | |
| 1498 | + | |
| 1499 | 1499 | mutex_lock(&cgroup_tree_mutex); |
| 1500 | 1500 | mutex_lock(&cgroup_mutex); |
| 1501 | 1501 | |
| @@ -1503,7 +1503,7 @@ retry: · 1 unmodified line | ||
| 1503 | 1503 | ret = parse_cgroupfs_options(data, &opts); |
| 1504 | 1504 | if (ret) |
| 1505 | 1505 | goto out_unlock; |
| 1506 | − | |
| 1506 | +retry: | |
| 1507 | 1507 | /* look for a matching existing root */ |
| 1508 | 1508 | if (!opts.subsys_mask && !opts.none && !opts.name) { |
| 1509 | 1509 | cgrp_dfl_root_visible = true; |
| @@ -1562,9 +1562,9 @@ retry: · 52 unmodified lines | ||
| 1562 | 1562 | if (!atomic_inc_not_zero(&root->cgrp.refcnt)) { |
| 1563 | 1563 | mutex_unlock(&cgroup_mutex); |
| 1564 | 1564 | mutex_unlock(&cgroup_tree_mutex); |
| 1565 | − kfree(opts.release_agent); | |
| 1566 | − kfree(opts.name); | |
| 1567 | 1565 | msleep(10); |
| 1566 | + mutex_lock(&cgroup_tree_mutex); | |
| 1567 | + mutex_lock(&cgroup_mutex); | |
| 1568 | 1568 | goto retry; |
| 1569 | 1569 | } |
| 1570 | 1570 | |
| @@ -21,6 +21,7 @@ · 20 unmodified lines | ||
| 21 | 21 | #include <linux/uaccess.h> |
| 22 | 22 | #include <linux/freezer.h> |
| 23 | 23 | #include <linux/seq_file.h> |
| 24 | +#include <linux/mutex.h> | |
| 24 | 25 | |
| 25 | 26 | /* |
| 26 | 27 | * A cgroup is freezing if any FREEZING flags are set. FREEZING_SELF is |
| @@ -42,9 +43,10 @@ enum freezer_state_flags { · 15 unmodified lines | ||
| 42 | 43 | struct freezer { |
| 43 | 44 | struct cgroup_subsys_state css; |
| 44 | 45 | unsigned int state; |
| 45 | − spinlock_t lock; | |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | +static DEFINE_MUTEX(freezer_mutex); | |
| 49 | + | |
| 48 | 50 | static inline struct freezer *css_freezer(struct cgroup_subsys_state *css) |
| 49 | 51 | { |
| 50 | 52 | return css ? container_of(css, struct freezer, css) : NULL; |
| @@ -93,7 +95,6 @@ freezer_css_alloc(struct cgroup_subsys_state *parent_css) · 42 unmodified lines | ||
| 93 | 95 | if (!freezer) |
| 94 | 96 | return ERR_PTR(-ENOMEM); |
| 95 | 97 | |
| 96 | − spin_lock_init(&freezer->lock); | |
| 97 | 98 | return &freezer->css; |
| 98 | 99 | } |
| 99 | 100 | |
| @@ -110,14 +111,7 @@ static int freezer_css_online(struct cgroup_subsys_state *css) · 10 unmodified lines | ||
| 110 | 111 | struct freezer *freezer = css_freezer(css); |
| 111 | 112 | struct freezer *parent = parent_freezer(freezer); |
| 112 | 113 | |
| 113 | − /* | |
| 114 | − * The following double locking and freezing state inheritance | |
| 115 | − * guarantee that @cgroup can never escape ancestors' freezing | |
| 116 | − * states. See css_for_each_descendant_pre() for details. | |
| 117 | − */ | |
| 118 | − if (parent) | |
| 119 | − spin_lock_irq(&parent->lock); | |
| 120 | − spin_lock_nested(&freezer->lock, SINGLE_DEPTH_NESTING); | |
| 114 | + mutex_lock(&freezer_mutex); | |
| 121 | 115 | |
| 122 | 116 | freezer->state |= CGROUP_FREEZER_ONLINE; |
| 123 | 117 | |
| @@ -126,10 +120,7 @@ static int freezer_css_online(struct cgroup_subsys_state *css) · 2 unmodified lines | ||
| 126 | 120 | atomic_inc(&system_freezing_cnt); |
| 127 | 121 | } |
| 128 | 122 | |
| 129 | − spin_unlock(&freezer->lock); | |
| 130 | − if (parent) | |
| 131 | − spin_unlock_irq(&parent->lock); | |
| 132 | − | |
| 123 | + mutex_unlock(&freezer_mutex); | |
| 133 | 124 | return 0; |
| 134 | 125 | } |
| 135 | 126 | |
| @@ -144,14 +135,14 @@ static void freezer_css_offline(struct cgroup_subsys_state *css) · 8 unmodified lines | ||
| 144 | 135 | { |
| 145 | 136 | struct freezer *freezer = css_freezer(css); |
| 146 | 137 | |
| 147 | − spin_lock_irq(&freezer->lock); | |
| 138 | + mutex_lock(&freezer_mutex); | |
| 148 | 139 | |
| 149 | 140 | if (freezer->state & CGROUP_FREEZING) |
| 150 | 141 | atomic_dec(&system_freezing_cnt); |
| 151 | 142 | |
| 152 | 143 | freezer->state = 0; |
| 153 | 144 | |
| 154 | − spin_unlock_irq(&freezer->lock); | |
| 145 | + mutex_unlock(&freezer_mutex); | |
| 155 | 146 | } |
| 156 | 147 | |
| 157 | 148 | static void freezer_css_free(struct cgroup_subsys_state *css) |
| @@ -175,7 +166,7 @@ static void freezer_attach(struct cgroup_subsys_state *new_css, · 17 unmodified lines | ||
| 175 | 166 | struct task_struct *task; |
| 176 | 167 | bool clear_frozen = false; |
| 177 | 168 | |
| 178 | − spin_lock_irq(&freezer->lock); | |
| 169 | + mutex_lock(&freezer_mutex); | |
| 179 | 170 | |
| 180 | 171 | /* |
| 181 | 172 | * Make the new tasks conform to the current state of @new_css. |
| @@ -197,21 +188,13 @@ static void freezer_attach(struct cgroup_subsys_state *new_css, · 15 unmodified lines | ||
| 197 | 188 | } |
| 198 | 189 | } |
| 199 | 190 | |
| 200 | − spin_unlock_irq(&freezer->lock); | |
| 201 | − | |
| 202 | − /* | |
| 203 | − * Propagate FROZEN clearing upwards. We may race with | |
| 204 | − * update_if_frozen(), but as long as both work bottom-up, either | |
| 205 | − * update_if_frozen() sees child's FROZEN cleared or we clear the | |
| 206 | − * parent's FROZEN later. No parent w/ !FROZEN children can be | |
| 207 | − * left FROZEN. | |
| 208 | − */ | |
| 191 | + /* propagate FROZEN clearing upwards */ | |
| 209 | 192 | while (clear_frozen && (freezer = parent_freezer(freezer))) { |
| 210 | − spin_lock_irq(&freezer->lock); | |
| 211 | 193 | freezer->state &= ~CGROUP_FROZEN; |
| 212 | 194 | clear_frozen = freezer->state & CGROUP_FREEZING; |
| 213 | − spin_unlock_irq(&freezer->lock); | |
| 214 | 195 | } |
| 196 | + | |
| 197 | + mutex_unlock(&freezer_mutex); | |
| 215 | 198 | } |
| 216 | 199 | |
| 217 | 200 | /** |
| @@ -228,9 +211,6 @@ static void freezer_fork(struct task_struct *task) · 10 unmodified lines | ||
| 228 | 211 | { |
| 229 | 212 | struct freezer *freezer; |
| 230 | 213 | |
| 231 | − rcu_read_lock(); | |
| 232 | − freezer = task_freezer(task); | |
| 233 | − | |
| 234 | 214 | /* |
| 235 | 215 | * The root cgroup is non-freezable, so we can skip locking the |
| 236 | 216 | * freezer. This is safe regardless of race with task migration. |
| @@ -238,24 +218,18 @@ static void freezer_fork(struct task_struct *task) · 1 unmodified line | ||
| 238 | 218 | * to do. If we lost and root is the new cgroup, noop is still the |
| 239 | 219 | * right thing to do. |
| 240 | 220 | */ |
| 241 | − if (!parent_freezer(freezer)) | |
| 242 | − goto out; | |
| 221 | + if (task_css_is_root(task, freezer_cgrp_id)) | |
| 222 | + return; | |
| 243 | 223 | |
| 244 | − /* | |
| 245 | − * Grab @freezer->lock and freeze @task after verifying @task still | |
| 246 | − * belongs to @freezer and it's freezing. The former is for the | |
| 247 | − * case where we have raced against task migration and lost and | |
| 248 | − * @task is already in a different cgroup which may not be frozen. | |
| 249 | − * This isn't strictly necessary as freeze_task() is allowed to be | |
| 250 | − * called spuriously but let's do it anyway for, if nothing else, | |
| 251 | − * documentation. | |
| 252 | − */ | |
| 253 | − spin_lock_irq(&freezer->lock); | |
| 254 | − if (freezer == task_freezer(task) && (freezer->state & CGROUP_FREEZING)) | |
| 224 | + mutex_lock(&freezer_mutex); | |
| 225 | + rcu_read_lock(); | |
| 226 | + | |
| 227 | + freezer = task_freezer(task); | |
| 228 | + if (freezer->state & CGROUP_FREEZING) | |
| 255 | 229 | freeze_task(task); |
| 256 | − spin_unlock_irq(&freezer->lock); | |
| 257 | −out: | |
| 230 | + | |
| 258 | 231 | rcu_read_unlock(); |
| 232 | + mutex_unlock(&freezer_mutex); | |
| 259 | 233 | } |
| 260 | 234 | |
| 261 | 235 | /** |
| @@ -281,22 +255,24 @@ static void update_if_frozen(struct cgroup_subsys_state *css) · 19 unmodified lines | ||
| 281 | 255 | struct css_task_iter it; |
| 282 | 256 | struct task_struct *task; |
| 283 | 257 | |
| 284 | − WARN_ON_ONCE(!rcu_read_lock_held()); | |
| 285 | − | |
| 286 | − spin_lock_irq(&freezer->lock); | |
| 258 | + lockdep_assert_held(&freezer_mutex); | |
| 287 | 259 | |
| 288 | 260 | if (!(freezer->state & CGROUP_FREEZING) || |
| 289 | 261 | (freezer->state & CGROUP_FROZEN)) |
| 290 | − goto out_unlock; | |
| 262 | + return; | |
| 291 | 263 | |
| 292 | 264 | /* are all (live) children frozen? */ |
| 265 | + rcu_read_lock(); | |
| 293 | 266 | css_for_each_child(pos, css) { |
| 294 | 267 | struct freezer *child = css_freezer(pos); |
| 295 | 268 | |
| 296 | 269 | if ((child->state & CGROUP_FREEZER_ONLINE) && |
| 297 | − !(child->state & CGROUP_FROZEN)) | |
| 298 | − goto out_unlock; | |
| 270 | + !(child->state & CGROUP_FROZEN)) { | |
| 271 | + rcu_read_unlock(); | |
| 272 | + return; | |
| 273 | + } | |
| 299 | 274 | } |
| 275 | + rcu_read_unlock(); | |
| 300 | 276 | |
| 301 | 277 | /* are all tasks frozen? */ |
| 302 | 278 | css_task_iter_start(css, &it); |
| @@ -317,21 +293,29 @@ static void update_if_frozen(struct cgroup_subsys_state *css) · 14 unmodified lines | ||
| 317 | 293 | freezer->state |= CGROUP_FROZEN; |
| 318 | 294 | out_iter_end: |
| 319 | 295 | css_task_iter_end(&it); |
| 320 | −out_unlock: | |
| 321 | − spin_unlock_irq(&freezer->lock); | |
| 322 | 296 | } |
| 323 | 297 | |
| 324 | 298 | static int freezer_read(struct seq_file *m, void *v) |
| 325 | 299 | { |
| 326 | 300 | struct cgroup_subsys_state *css = seq_css(m), *pos; |
| 327 | 301 | |
| 302 | + mutex_lock(&freezer_mutex); | |
| 328 | 303 | rcu_read_lock(); |
| 329 | 304 | |
| 330 | 305 | /* update states bottom-up */ |
| 331 | − css_for_each_descendant_post(pos, css) | |
| 306 | + css_for_each_descendant_post(pos, css) { | |
| 307 | + if (!css_tryget(pos)) | |
| 308 | + continue; | |
| 309 | + rcu_read_unlock(); | |
| 310 | + | |
| 332 | 311 | update_if_frozen(pos); |
| 333 | 312 | |
| 313 | + rcu_read_lock(); | |
| 314 | + css_put(pos); | |
| 315 | + } | |
| 316 | + | |
| 334 | 317 | rcu_read_unlock(); |
| 318 | + mutex_unlock(&freezer_mutex); | |
| 335 | 319 | |
| 336 | 320 | seq_puts(m, freezer_state_strs(css_freezer(css)->state)); |
| 337 | 321 | seq_putc(m, '\n'); |
| @@ -373,7 +357,7 @@ static void freezer_apply_state(struct freezer *freezer, bool freeze, · 35 unmodified lines | ||
| 373 | 357 | unsigned int state) |
| 374 | 358 | { |
| 375 | 359 | /* also synchronizes against task migration, see freezer_attach() */ |
| 376 | − lockdep_assert_held(&freezer->lock); | |
| 360 | + lockdep_assert_held(&freezer_mutex); | |
| 377 | 361 | |
| 378 | 362 | if (!(freezer->state & CGROUP_FREEZER_ONLINE)) |
| 379 | 363 | return; |
| @@ -414,31 +398,29 @@ static void freezer_change_state(struct freezer *freezer, bool freeze) · 34 unmodified lines | ||
| 414 | 398 | * descendant will try to inherit its parent's FREEZING state as |
| 415 | 399 | * CGROUP_FREEZING_PARENT. |
| 416 | 400 | */ |
| 401 | + mutex_lock(&freezer_mutex); | |
| 417 | 402 | rcu_read_lock(); |
| 418 | 403 | css_for_each_descendant_pre(pos, &freezer->css) { |
| 419 | 404 | struct freezer *pos_f = css_freezer(pos); |
| 420 | 405 | struct freezer *parent = parent_freezer(pos_f); |
| 421 | 406 | |
| 422 | − spin_lock_irq(&pos_f->lock); | |
| 407 | + if (!css_tryget(pos)) | |
| 408 | + continue; | |
| 409 | + rcu_read_unlock(); | |
| 423 | 410 | |
| 424 | − if (pos_f == freezer) { | |
| 411 | + if (pos_f == freezer) | |
| 425 | 412 | freezer_apply_state(pos_f, freeze, |
| 426 | 413 | CGROUP_FREEZING_SELF); |
| 427 | − } else { | |
| 428 | − /* | |
| 429 | − * Our update to @parent->state is already visible | |
| 430 | − * which is all we need. No need to lock @parent. | |
| 431 | − * For more info on synchronization, see | |
| 432 | − * freezer_post_create(). | |
| 433 | − */ | |
| 414 | + else | |
| 434 | 415 | freezer_apply_state(pos_f, |
| 435 | 416 | parent->state & CGROUP_FREEZING, |
| 436 | 417 | CGROUP_FREEZING_PARENT); |
| 437 | − } | |
| 438 | 418 | |
| 439 | − spin_unlock_irq(&pos_f->lock); | |
| 419 | + rcu_read_lock(); | |
| 420 | + css_put(pos); | |
| 440 | 421 | } |
| 441 | 422 | rcu_read_unlock(); |
| 423 | + mutex_unlock(&freezer_mutex); | |
| 442 | 424 | } |
| 443 | 425 | |
| 444 | 426 | static int freezer_write(struct cgroup_subsys_state *css, struct cftype *cft, |
| @@ -120,7 +120,7 @@ void context_tracking_user_enter(void) · 119 unmodified lines | ||
| 120 | 120 | * instead of preempt_schedule() to exit user context if needed before |
| 121 | 121 | * calling the scheduler. |
| 122 | 122 | */ |
| 123 | −asmlinkage void __sched notrace preempt_schedule_context(void) | |
| 123 | +asmlinkage __visible void __sched notrace preempt_schedule_context(void) | |
| 124 | 124 | { |
| 125 | 125 | enum ctx_state prev_ctx; |
| 126 | 126 | |
| @@ -726,10 +726,12 @@ void set_cpu_present(unsigned int cpu, bool present) · 725 unmodified lines | ||
| 726 | 726 | |
| 727 | 727 | void set_cpu_online(unsigned int cpu, bool online) |
| 728 | 728 | { |
| 729 | − if (online) | |
| 729 | + if (online) { | |
| 730 | 730 | cpumask_set_cpu(cpu, to_cpumask(cpu_online_bits)); |
| 731 | − else | |
| 731 | + cpumask_set_cpu(cpu, to_cpumask(cpu_active_bits)); | |
| 732 | + } else { | |
| 732 | 733 | cpumask_clear_cpu(cpu, to_cpumask(cpu_online_bits)); |
| 734 | + } | |
| 733 | 735 | } |
| 734 | 736 | |
| 735 | 737 | void set_cpu_active(unsigned int cpu, bool active) |
| @@ -2973,6 +2973,22 @@ out: · 2972 unmodified lines | ||
| 2973 | 2973 | local_irq_restore(flags); |
| 2974 | 2974 | } |
| 2975 | 2975 | |
| 2976 | +void perf_event_exec(void) | |
| 2977 | +{ | |
| 2978 | + struct perf_event_context *ctx; | |
| 2979 | + int ctxn; | |
| 2980 | + | |
| 2981 | + rcu_read_lock(); | |
| 2982 | + for_each_task_context_nr(ctxn) { | |
| 2983 | + ctx = current->perf_event_ctxp[ctxn]; | |
| 2984 | + if (!ctx) | |
| 2985 | + continue; | |
| 2986 | + | |
| 2987 | + perf_event_enable_on_exec(ctx); | |
| 2988 | + } | |
| 2989 | + rcu_read_unlock(); | |
| 2990 | +} | |
| 2991 | + | |
| 2976 | 2992 | /* |
| 2977 | 2993 | * Cross CPU call to read the hardware event |
| 2978 | 2994 | */ |
| @@ -3195,7 +3211,8 @@ static void free_event_rcu(struct rcu_head *head) · 216 unmodified lines | ||
| 3195 | 3211 | } |
| 3196 | 3212 | |
| 3197 | 3213 | static void ring_buffer_put(struct ring_buffer *rb); |
| 3198 | −static void ring_buffer_detach(struct perf_event *event, struct ring_buffer *rb); | |
| 3214 | +static void ring_buffer_attach(struct perf_event *event, | |
| 3215 | + struct ring_buffer *rb); | |
| 3199 | 3216 | |
| 3200 | 3217 | static void unaccount_event_cpu(struct perf_event *event, int cpu) |
| 3201 | 3218 | { |
| @@ -3259,8 +3276,6 @@ static void _free_event(struct perf_event *event) · 57 unmodified lines | ||
| 3259 | 3276 | unaccount_event(event); |
| 3260 | 3277 | |
| 3261 | 3278 | if (event->rb) { |
| 3262 | − struct ring_buffer *rb; | |
| 3263 | − | |
| 3264 | 3279 | /* |
| 3265 | 3280 | * Can happen when we close an event with re-directed output. |
| 3266 | 3281 | * |
| @@ -3268,12 +3283,7 @@ static void _free_event(struct perf_event *event) · 1 unmodified line | ||
| 3268 | 3283 | * over us; possibly making our ring_buffer_put() the last. |
| 3269 | 3284 | */ |
| 3270 | 3285 | mutex_lock(&event->mmap_mutex); |
| 3271 | − rb = event->rb; | |
| 3272 | − if (rb) { | |
| 3273 | − rcu_assign_pointer(event->rb, NULL); | |
| 3274 | − ring_buffer_detach(event, rb); | |
| 3275 | − ring_buffer_put(rb); /* could be last */ | |
| 3276 | − } | |
| 3286 | + ring_buffer_attach(event, NULL); | |
| 3277 | 3287 | mutex_unlock(&event->mmap_mutex); |
| 3278 | 3288 | } |
| 3279 | 3289 | |
| @@ -3870,28 +3880,47 @@ unlock: · 590 unmodified lines | ||
| 3870 | 3880 | static void ring_buffer_attach(struct perf_event *event, |
| 3871 | 3881 | struct ring_buffer *rb) |
| 3872 | 3882 | { |
| 3883 | + struct ring_buffer *old_rb = NULL; | |
| 3873 | 3884 | unsigned long flags; |
| 3874 | 3885 | |
| 3875 | − if (!list_empty(&event->rb_entry)) | |
| 3876 | − return; | |
| 3886 | + if (event->rb) { | |
| 3887 | + /* | |
| 3888 | + * Should be impossible, we set this when removing | |
| 3889 | + * event->rb_entry and wait/clear when adding event->rb_entry. | |
| 3890 | + */ | |
| 3891 | + WARN_ON_ONCE(event->rcu_pending); | |
| 3877 | 3892 | |
| 3878 | − spin_lock_irqsave(&rb->event_lock, flags); | |
| 3879 | − if (list_empty(&event->rb_entry)) | |
| 3880 | − list_add(&event->rb_entry, &rb->event_list); | |
| 3881 | − spin_unlock_irqrestore(&rb->event_lock, flags); | |
| 3882 | −} | |
| 3893 | + old_rb = event->rb; | |
| 3894 | + event->rcu_batches = get_state_synchronize_rcu(); | |
| 3895 | + event->rcu_pending = 1; | |
| 3883 | 3896 | |
| 3884 | −static void ring_buffer_detach(struct perf_event *event, struct ring_buffer *rb) | |
| 3885 | −{ | |
| 3886 | − unsigned long flags; | |
| 3897 | + spin_lock_irqsave(&old_rb->event_lock, flags); | |
| 3898 | + list_del_rcu(&event->rb_entry); | |
| 3899 | + spin_unlock_irqrestore(&old_rb->event_lock, flags); | |
| 3900 | + } | |
| 3887 | 3901 | |
| 3888 | − if (list_empty(&event->rb_entry)) | |
| 3889 | − return; | |
| 3902 | + if (event->rcu_pending && rb) { | |
| 3903 | + cond_synchronize_rcu(event->rcu_batches); | |
| 3904 | + event->rcu_pending = 0; | |
| 3905 | + } | |
| 3906 | + | |
| 3907 | + if (rb) { | |
| 3908 | + spin_lock_irqsave(&rb->event_lock, flags); | |
| 3909 | + list_add_rcu(&event->rb_entry, &rb->event_list); | |
| 3910 | + spin_unlock_irqrestore(&rb->event_lock, flags); | |
| 3911 | + } | |
| 3912 | + | |
| 3913 | + rcu_assign_pointer(event->rb, rb); | |
| 3890 | 3914 | |
| 3891 | − spin_lock_irqsave(&rb->event_lock, flags); | |
| 3892 | − list_del_init(&event->rb_entry); | |
| 3893 | − wake_up_all(&event->waitq); | |
| 3894 | − spin_unlock_irqrestore(&rb->event_lock, flags); | |
| 3915 | + if (old_rb) { | |
| 3916 | + ring_buffer_put(old_rb); | |
| 3917 | + /* | |
| 3918 | + * Since we detached before setting the new rb, so that we | |
| 3919 | + * could attach the new rb, we could have missed a wakeup. | |
| 3920 | + * Provide it now. | |
| 3921 | + */ | |
| 3922 | + wake_up_all(&event->waitq); | |
| 3923 | + } | |
| 3895 | 3924 | } |
| 3896 | 3925 | |
| 3897 | 3926 | static void ring_buffer_wakeup(struct perf_event *event) |
| @@ -3960,7 +3989,7 @@ static void perf_mmap_close(struct vm_area_struct *vma) · 62 unmodified lines | ||
| 3960 | 3989 | { |
| 3961 | 3990 | struct perf_event *event = vma->vm_file->private_data; |
| 3962 | 3991 | |
| 3963 | − struct ring_buffer *rb = event->rb; | |
| 3992 | + struct ring_buffer *rb = ring_buffer_get(event); | |
| 3964 | 3993 | struct user_struct *mmap_user = rb->mmap_user; |
| 3965 | 3994 | int mmap_locked = rb->mmap_locked; |
| 3966 | 3995 | unsigned long size = perf_data_size(rb); |
| @@ -3968,18 +3997,14 @@ static void perf_mmap_close(struct vm_area_struct *vma) · 1 unmodified line | ||
| 3968 | 3997 | atomic_dec(&rb->mmap_count); |
| 3969 | 3998 | |
| 3970 | 3999 | if (!atomic_dec_and_mutex_lock(&event->mmap_count, &event->mmap_mutex)) |
| 3971 | − return; | |
| 4000 | + goto out_put; | |
| 3972 | 4001 | |
| 3973 | − /* Detach current event from the buffer. */ | |
| 3974 | − rcu_assign_pointer(event->rb, NULL); | |
| 3975 | − ring_buffer_detach(event, rb); | |
| 4002 | + ring_buffer_attach(event, NULL); | |
| 3976 | 4003 | mutex_unlock(&event->mmap_mutex); |
| 3977 | 4004 | |
| 3978 | 4005 | /* If there's still other mmap()s of this buffer, we're done. */ |
| 3979 | − if (atomic_read(&rb->mmap_count)) { | |
| 3980 | − ring_buffer_put(rb); /* can't be last */ | |
| 3981 | − return; | |
| 3982 | − } | |
| 4006 | + if (atomic_read(&rb->mmap_count)) | |
| 4007 | + goto out_put; | |
| 3983 | 4008 | |
| 3984 | 4009 | /* |
| 3985 | 4010 | * No other mmap()s, detach from all other events that might redirect |
| @@ -4009,11 +4034,9 @@ again: · 23 unmodified lines | ||
| 4009 | 4034 | * still restart the iteration to make sure we're not now |
| 4010 | 4035 | * iterating the wrong list. |
| 4011 | 4036 | */ |
| 4012 | − if (event->rb == rb) { | |
| 4013 | − rcu_assign_pointer(event->rb, NULL); | |
| 4014 | − ring_buffer_detach(event, rb); | |
| 4015 | − ring_buffer_put(rb); /* can't be last, we still have one */ | |
| 4016 | − } | |
| 4037 | + if (event->rb == rb) | |
| 4038 | + ring_buffer_attach(event, NULL); | |
| 4039 | + | |
| 4017 | 4040 | mutex_unlock(&event->mmap_mutex); |
| 4018 | 4041 | put_event(event); |
| 4019 | 4042 | |
| @@ -4038,6 +4061,7 @@ again: · 18 unmodified lines | ||
| 4038 | 4061 | vma->vm_mm->pinned_vm -= mmap_locked; |
| 4039 | 4062 | free_uid(mmap_user); |
| 4040 | 4063 | |
| 4064 | +out_put: | |
| 4041 | 4065 | ring_buffer_put(rb); /* could be last */ |
| 4042 | 4066 | } |
| 4043 | 4067 | |
| @@ -4155,7 +4179,6 @@ again: · 111 unmodified lines | ||
| 4155 | 4179 | vma->vm_mm->pinned_vm += extra; |
| 4156 | 4180 | |
| 4157 | 4181 | ring_buffer_attach(event, rb); |
| 4158 | − rcu_assign_pointer(event->rb, rb); | |
| 4159 | 4182 | |
| 4160 | 4183 | perf_event_init_userpage(event); |
| 4161 | 4184 | perf_event_update_userpage(event); |
| @@ -5070,18 +5093,6 @@ static void perf_event_comm_event(struct perf_comm_event *comm_event) · 908 unmodified lines | ||
| 5070 | 5093 | void perf_event_comm(struct task_struct *task) |
| 5071 | 5094 | { |
| 5072 | 5095 | struct perf_comm_event comm_event; |
| 5073 | − struct perf_event_context *ctx; | |
| 5074 | − int ctxn; | |
| 5075 | − | |
| 5076 | − rcu_read_lock(); | |
| 5077 | − for_each_task_context_nr(ctxn) { | |
| 5078 | − ctx = task->perf_event_ctxp[ctxn]; | |
| 5079 | − if (!ctx) | |
| 5080 | − continue; | |
| 5081 | − | |
| 5082 | − perf_event_enable_on_exec(ctx); | |
| 5083 | − } | |
| 5084 | − rcu_read_unlock(); | |
| 5085 | 5096 | |
| 5086 | 5097 | if (!atomic_read(&nr_comm_events)) |
| 5087 | 5098 | return; |
| @@ -5439,6 +5450,9 @@ struct swevent_htable { · 351 unmodified lines | ||
| 5439 | 5450 | |
| 5440 | 5451 | /* Recursion avoidance in each contexts */ |
| 5441 | 5452 | int recursion[PERF_NR_CONTEXTS]; |
| 5453 | + | |
| 5454 | + /* Keeps track of cpu being initialized/exited */ | |
| 5455 | + bool online; | |
| 5442 | 5456 | }; |
| 5443 | 5457 | |
| 5444 | 5458 | static DEFINE_PER_CPU(struct swevent_htable, swevent_htable); |
| @@ -5685,8 +5699,14 @@ static int perf_swevent_add(struct perf_event *event, int flags) · 240 unmodified lines | ||
| 5685 | 5699 | hwc->state = !(flags & PERF_EF_START); |
| 5686 | 5700 | |
| 5687 | 5701 | head = find_swevent_head(swhash, event); |
| 5688 | − if (WARN_ON_ONCE(!head)) | |
| 5702 | + if (!head) { | |
| 5703 | + /* | |
| 5704 | + * We can race with cpu hotplug code. Do not | |
| 5705 | + * WARN if the cpu just got unplugged. | |
| 5706 | + */ | |
| 5707 | + WARN_ON_ONCE(swhash->online); | |
| 5689 | 5708 | return -EINVAL; |
| 5709 | + } | |
| 5690 | 5710 | |
| 5691 | 5711 | hlist_add_head_rcu(&event->hlist_entry, head); |
| 5692 | 5712 | |
| @@ -6956,7 +6976,7 @@ err_size: · 1263 unmodified lines | ||
| 6956 | 6976 | static int |
| 6957 | 6977 | perf_event_set_output(struct perf_event *event, struct perf_event *output_event) |
| 6958 | 6978 | { |
| 6959 | − struct ring_buffer *rb = NULL, *old_rb = NULL; | |
| 6979 | + struct ring_buffer *rb = NULL; | |
| 6960 | 6980 | int ret = -EINVAL; |
| 6961 | 6981 | |
| 6962 | 6982 | if (!output_event) |
| @@ -6984,8 +7004,6 @@ set: · 21 unmodified lines | ||
| 6984 | 7004 | if (atomic_read(&event->mmap_count)) |
| 6985 | 7005 | goto unlock; |
| 6986 | 7006 | |
| 6987 | − old_rb = event->rb; | |
| 6988 | − | |
| 6989 | 7007 | if (output_event) { |
| 6990 | 7008 | /* get the rb we want to redirect to */ |
| 6991 | 7009 | rb = ring_buffer_get(output_event); |
| @@ -6993,23 +7011,7 @@ set: · 1 unmodified line | ||
| 6993 | 7011 | goto unlock; |
| 6994 | 7012 | } |
| 6995 | 7013 | |
| 6996 | − if (old_rb) | |
| 6997 | − ring_buffer_detach(event, old_rb); | |
| 6998 | − | |
| 6999 | − if (rb) | |
| 7000 | − ring_buffer_attach(event, rb); | |
| 7001 | − | |
| 7002 | − rcu_assign_pointer(event->rb, rb); | |
| 7003 | − | |
| 7004 | − if (old_rb) { | |
| 7005 | − ring_buffer_put(old_rb); | |
| 7006 | − /* | |
| 7007 | − * Since we detached before setting the new rb, so that we | |
| 7008 | − * could attach the new rb, we could have missed a wakeup. | |
| 7009 | − * Provide it now. | |
| 7010 | − */ | |
| 7011 | − wake_up_all(&event->waitq); | |
| 7012 | − } | |
| 7014 | + ring_buffer_attach(event, rb); | |
| 7013 | 7015 | |
| 7014 | 7016 | ret = 0; |
| 7015 | 7017 | unlock: |
| @@ -7060,6 +7062,9 @@ SYSCALL_DEFINE5(perf_event_open, · 44 unmodified lines | ||
| 7060 | 7062 | if (attr.freq) { |
| 7061 | 7063 | if (attr.sample_freq > sysctl_perf_event_sample_rate) |
| 7062 | 7064 | return -EINVAL; |
| 7065 | + } else { | |
| 7066 | + if (attr.sample_period & (1ULL << 63)) | |
| 7067 | + return -EINVAL; | |
| 7063 | 7068 | } |
| 7064 | 7069 | |
| 7065 | 7070 | /* |
| @@ -7872,6 +7877,7 @@ static void perf_event_init_cpu(int cpu) · 806 unmodified lines | ||
| 7872 | 7877 | struct swevent_htable *swhash = &per_cpu(swevent_htable, cpu); |
| 7873 | 7878 | |
| 7874 | 7879 | mutex_lock(&swhash->hlist_mutex); |
| 7880 | + swhash->online = true; | |
| 7875 | 7881 | if (swhash->hlist_refcount > 0) { |
| 7876 | 7882 | struct swevent_hlist *hlist; |
| 7877 | 7883 | |
| @@ -7929,6 +7935,7 @@ static void perf_event_exit_cpu(int cpu) · 51 unmodified lines | ||
| 7929 | 7935 | perf_event_exit_cpu_context(cpu); |
| 7930 | 7936 | |
| 7931 | 7937 | mutex_lock(&swhash->hlist_mutex); |
| 7938 | + swhash->online = false; | |
| 7932 | 7939 | swevent_hlist_release(swhash); |
| 7933 | 7940 | mutex_unlock(&swhash->hlist_mutex); |
| 7934 | 7941 | } |
| @@ -745,7 +745,8 @@ void exit_pi_state_list(struct task_struct *curr) · 744 unmodified lines | ||
| 745 | 745 | |
| 746 | 746 | static int |
| 747 | 747 | lookup_pi_state(u32 uval, struct futex_hash_bucket *hb, |
| 748 | − union futex_key *key, struct futex_pi_state **ps) | |
| 748 | + union futex_key *key, struct futex_pi_state **ps, | |
| 749 | + struct task_struct *task) | |
| 749 | 750 | { |
| 750 | 751 | struct futex_pi_state *pi_state = NULL; |
| 751 | 752 | struct futex_q *this, *next; |
| @@ -786,6 +787,16 @@ lookup_pi_state(u32 uval, struct futex_hash_bucket *hb, · 34 unmodified lines | ||
| 786 | 787 | return -EINVAL; |
| 787 | 788 | } |
| 788 | 789 | |
| 790 | + /* | |
| 791 | + * Protect against a corrupted uval. If uval | |
| 792 | + * is 0x80000000 then pid is 0 and the waiter | |
| 793 | + * bit is set. So the deadlock check in the | |
| 794 | + * calling code has failed and we did not fall | |
| 795 | + * into the check above due to !pid. | |
| 796 | + */ | |
| 797 | + if (task && pi_state->owner == task) | |
| 798 | + return -EDEADLK; | |
| 799 | + | |
| 789 | 800 | atomic_inc(&pi_state->refcount); |
| 790 | 801 | *ps = pi_state; |
| 791 | 802 | |
| @@ -803,6 +814,11 @@ lookup_pi_state(u32 uval, struct futex_hash_bucket *hb, · 11 unmodified lines | ||
| 803 | 814 | if (!p) |
| 804 | 815 | return -ESRCH; |
| 805 | 816 | |
| 817 | + if (!p->mm) { | |
| 818 | + put_task_struct(p); | |
| 819 | + return -EPERM; | |
| 820 | + } | |
| 821 | + | |
| 806 | 822 | /* |
| 807 | 823 | * We need to look at the task state flags to figure out, |
| 808 | 824 | * whether the task is exiting. To protect against the do_exit |
| @@ -935,7 +951,7 @@ retry: · 126 unmodified lines | ||
| 935 | 951 | * We dont have the lock. Look up the PI state (or create it if |
| 936 | 952 | * we are the first waiter): |
| 937 | 953 | */ |
| 938 | − ret = lookup_pi_state(uval, hb, key, ps); | |
| 954 | + ret = lookup_pi_state(uval, hb, key, ps, task); | |
| 939 | 955 | |
| 940 | 956 | if (unlikely(ret)) { |
| 941 | 957 | switch (ret) { |
| @@ -1347,7 +1363,7 @@ void requeue_pi_wake_futex(struct futex_q *q, union futex_key *key, · 405 unmodified lines | ||
| 1347 | 1363 | * |
| 1348 | 1364 | * Return: |
| 1349 | 1365 | * 0 - failed to acquire the lock atomically; |
| 1350 | − * 1 - acquired the lock; | |
| 1366 | + * >0 - acquired the lock, return value is vpid of the top_waiter | |
| 1351 | 1367 | * <0 - error |
| 1352 | 1368 | */ |
| 1353 | 1369 | static int futex_proxy_trylock_atomic(u32 __user *pifutex, |
| @@ -1358,7 +1374,7 @@ static int futex_proxy_trylock_atomic(u32 __user *pifutex, · 4 unmodified lines | ||
| 1358 | 1374 | { |
| 1359 | 1375 | struct futex_q *top_waiter = NULL; |
| 1360 | 1376 | u32 curval; |
| 1361 | − int ret; | |
| 1377 | + int ret, vpid; | |
| 1362 | 1378 | |
| 1363 | 1379 | if (get_futex_value_locked(&curval, pifutex)) |
| 1364 | 1380 | return -EFAULT; |
| @@ -1386,11 +1402,13 @@ static int futex_proxy_trylock_atomic(u32 __user *pifutex, · 21 unmodified lines | ||
| 1386 | 1402 | * the contended case or if set_waiters is 1. The pi_state is returned |
| 1387 | 1403 | * in ps in contended cases. |
| 1388 | 1404 | */ |
| 1405 | + vpid = task_pid_vnr(top_waiter->task); | |
| 1389 | 1406 | ret = futex_lock_pi_atomic(pifutex, hb2, key2, ps, top_waiter->task, |
| 1390 | 1407 | set_waiters); |
| 1391 | − if (ret == 1) | |
| 1408 | + if (ret == 1) { | |
| 1392 | 1409 | requeue_pi_wake_futex(top_waiter, key2, hb2); |
| 1393 | − | |
| 1410 | + return vpid; | |
| 1411 | + } | |
| 1394 | 1412 | return ret; |
| 1395 | 1413 | } |
| 1396 | 1414 | |
| @@ -1421,7 +1439,6 @@ static int futex_requeue(u32 __user *uaddr1, unsigned int flags, · 24 unmodified lines | ||
| 1421 | 1439 | struct futex_pi_state *pi_state = NULL; |
| 1422 | 1440 | struct futex_hash_bucket *hb1, *hb2; |
| 1423 | 1441 | struct futex_q *this, *next; |
| 1424 | − u32 curval2; | |
| 1425 | 1442 | |
| 1426 | 1443 | if (requeue_pi) { |
| 1427 | 1444 | /* |
| @@ -1509,16 +1526,25 @@ retry_private: · 81 unmodified lines | ||
| 1509 | 1526 | * At this point the top_waiter has either taken uaddr2 or is |
| 1510 | 1527 | * waiting on it. If the former, then the pi_state will not |
| 1511 | 1528 | * exist yet, look it up one more time to ensure we have a |
| 1512 | − * reference to it. | |
| 1529 | + * reference to it. If the lock was taken, ret contains the | |
| 1530 | + * vpid of the top waiter task. | |
| 1513 | 1531 | */ |
| 1514 | − if (ret == 1) { | |
| 1532 | + if (ret > 0) { | |
| 1515 | 1533 | WARN_ON(pi_state); |
| 1516 | 1534 | drop_count++; |
| 1517 | 1535 | task_count++; |
| 1518 | − ret = get_futex_value_locked(&curval2, uaddr2); | |
| 1519 | − if (!ret) | |
| 1520 | − ret = lookup_pi_state(curval2, hb2, &key2, | |
| 1521 | − &pi_state); | |
| 1536 | + /* | |
| 1537 | + * If we acquired the lock, then the user | |
| 1538 | + * space value of uaddr2 should be vpid. It | |
| 1539 | + * cannot be changed by the top waiter as it | |
| 1540 | + * is blocked on hb2 lock if it tries to do | |
| 1541 | + * so. If something fiddled with it behind our | |
| 1542 | + * back the pi state lookup might unearth | |
| 1543 | + * it. So we rather use the known value than | |
| 1544 | + * rereading and handing potential crap to | |
| 1545 | + * lookup_pi_state. | |
| 1546 | + */ | |
| 1547 | + ret = lookup_pi_state(ret, hb2, &key2, &pi_state, NULL); | |
| 1522 | 1548 | } |
| 1523 | 1549 | |
| 1524 | 1550 | switch (ret) { |
| @@ -990,11 +990,8 @@ int __hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, · 989 unmodified lines | ||
| 990 | 990 | /* Remove an active timer from the queue: */ |
| 991 | 991 | ret = remove_hrtimer(timer, base); |
| 992 | 992 | |
| 993 | − /* Switch the timer base, if necessary: */ | |
| 994 | − new_base = switch_hrtimer_base(timer, base, mode & HRTIMER_MODE_PINNED); | |
| 995 | − | |
| 996 | 993 | if (mode & HRTIMER_MODE_REL) { |
| 997 | − tim = ktime_add_safe(tim, new_base->get_time()); | |
| 994 | + tim = ktime_add_safe(tim, base->get_time()); | |
| 998 | 995 | /* |
| 999 | 996 | * CONFIG_TIME_LOW_RES is a temporary way for architectures |
| 1000 | 997 | * to signal that they simply return xtime in |
| @@ -1009,6 +1006,9 @@ int __hrtimer_start_range_ns(struct hrtimer *timer, ktime_t tim, · 8 unmodified lines | ||
| 1009 | 1006 | |
| 1010 | 1007 | hrtimer_set_expires_range_ns(timer, tim, delta_ns); |
| 1011 | 1008 | |
| 1009 | + /* Switch the timer base, if necessary: */ | |
| 1010 | + new_base = switch_hrtimer_base(timer, base, mode & HRTIMER_MODE_PINNED); | |
| 1011 | + | |
| 1012 | 1012 | timer_stats_hrtimer_set_start_info(timer); |
| 1013 | 1013 | |
| 1014 | 1014 | leftmost = enqueue_hrtimer(timer, new_base); |
| @@ -1683,6 +1683,14 @@ int kernel_kexec(void) · 1682 unmodified lines | ||
| 1683 | 1683 | kexec_in_progress = true; |
| 1684 | 1684 | kernel_restart_prepare(NULL); |
| 1685 | 1685 | migrate_to_reboot_cpu(); |
| 1686 | + | |
| 1687 | + /* | |
| 1688 | + * migrate_to_reboot_cpu() disables CPU hotplug assuming that | |
| 1689 | + * no further code needs to use CPU hotplug (which is true in | |
| 1690 | + * the reboot case). However, the kexec path depends on using | |
| 1691 | + * CPU hotplug again; so re-enable it here. | |
| 1692 | + */ | |
| 1693 | + cpu_hotplug_enable(); | |
| 1686 | 1694 | printk(KERN_EMERG "Starting new kernel\n"); |
| 1687 | 1695 | machine_shutdown(); |
| 1688 | 1696 | } |
| @@ -4188,7 +4188,7 @@ void debug_show_held_locks(struct task_struct *task) · 4187 unmodified lines | ||
| 4188 | 4188 | } |
| 4189 | 4189 | EXPORT_SYMBOL_GPL(debug_show_held_locks); |
| 4190 | 4190 | |
| 4191 | −asmlinkage void lockdep_sys_exit(void) | |
| 4191 | +asmlinkage __visible void lockdep_sys_exit(void) | |
| 4192 | 4192 | { |
| 4193 | 4193 | struct task_struct *curr = current; |
| 4194 | 4194 | |
| @@ -343,9 +343,16 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, · 342 unmodified lines | ||
| 343 | 343 | * top_waiter can be NULL, when we are in the deboosting |
| 344 | 344 | * mode! |
| 345 | 345 | */ |
| 346 | − if (top_waiter && (!task_has_pi_waiters(task) || | |
| 347 | − top_waiter != task_top_pi_waiter(task))) | |
| 348 | − goto out_unlock_pi; | |
| 346 | + if (top_waiter) { | |
| 347 | + if (!task_has_pi_waiters(task)) | |
| 348 | + goto out_unlock_pi; | |
| 349 | + /* | |
| 350 | + * If deadlock detection is off, we stop here if we | |
| 351 | + * are not the top pi waiter of the task. | |
| 352 | + */ | |
| 353 | + if (!detect_deadlock && top_waiter != task_top_pi_waiter(task)) | |
| 354 | + goto out_unlock_pi; | |
| 355 | + } | |
| 349 | 356 | |
| 350 | 357 | /* |
| 351 | 358 | * When deadlock detection is off then we check, if further |
| @@ -361,7 +368,12 @@ static int rt_mutex_adjust_prio_chain(struct task_struct *task, · 9 unmodified lines | ||
| 361 | 368 | goto retry; |
| 362 | 369 | } |
| 363 | 370 | |
| 364 | − /* Deadlock detection */ | |
| 371 | + /* | |
| 372 | + * Deadlock detection. If the lock is the same as the original | |
| 373 | + * lock which caused us to walk the lock chain or if the | |
| 374 | + * current lock is owned by the task which initiated the chain | |
| 375 | + * walk, we detected a deadlock. | |
| 376 | + */ | |
| 365 | 377 | if (lock == orig_lock || rt_mutex_owner(lock) == top_task) { |
| 366 | 378 | debug_rt_mutex_deadlock(deadlock_detect, orig_waiter, lock); |
| 367 | 379 | raw_spin_unlock(&lock->wait_lock); |
| @@ -527,6 +539,18 @@ static int task_blocks_on_rt_mutex(struct rt_mutex *lock, · 159 unmodified lines | ||
| 527 | 539 | unsigned long flags; |
| 528 | 540 | int chain_walk = 0, res; |
| 529 | 541 | |
| 542 | + /* | |
| 543 | + * Early deadlock detection. We really don't want the task to | |
| 544 | + * enqueue on itself just to untangle the mess later. It's not | |
| 545 | + * only an optimization. We drop the locks, so another waiter | |
| 546 | + * can come in before the chain walk detects the deadlock. So | |
| 547 | + * the other will detect the deadlock and return -EDEADLOCK, | |
| 548 | + * which is wrong, as the other waiter is not in a deadlock | |
| 549 | + * situation. | |
| 550 | + */ | |
| 551 | + if (detect_deadlock && owner == task) | |
| 552 | + return -EDEADLK; | |
| 553 | + | |
| 530 | 554 | raw_spin_lock_irqsave(&task->pi_lock, flags); |
| 531 | 555 | __rt_mutex_adjust_prio(task); |
| 532 | 556 | waiter->task = task; |
| @@ -1586,7 +1586,7 @@ swsusp_alloc(struct memory_bitmap *orig_bm, struct memory_bitmap *copy_bm, · 1585 unmodified lines | ||
| 1586 | 1586 | return -ENOMEM; |
| 1587 | 1587 | } |
| 1588 | 1588 | |
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